type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
functions | void sync_inodes_sb(struct super_block *sb)
{
DECLARE_COMPLETION_ONSTACK(done);
struct wb_writeback_work work = {
.sb = sb,
.sync_mode = WB_SYNC_ALL,
.nr_pages = LONG_MAX,
.range_cyclic = 0,
.done = &done,
.reason = WB_REASON_SYNC,
} |
functions | int write_inode_now(struct inode *inode, int sync)
{
struct bdi_writeback *wb = &inode_to_bdi(inode)->wb;
int ret;
struct writeback_control wbc = {
.nr_to_write = LONG_MAX,
.sync_mode = sync ? WB_SYNC_ALL : WB_SYNC_NONE,
.range_start = 0,
.range_end = LLONG_MAX,
} |
functions | int sync_inode(struct inode *inode, struct writeback_control *wbc)
{
struct bdi_writeback *wb = &inode_to_bdi(inode)->wb;
int ret;
spin_lock(&wb->list_lock);
spin_lock(&inode->i_lock);
ret = writeback_single_inode(inode, wb, wbc);
spin_unlock(&inode->i_lock);
spin_unlock(&wb->list_lock);
return ret;
} |
functions | int sync_inode_metadata(struct inode *inode, int wait)
{
struct writeback_control wbc = {
.sync_mode = wait ? WB_SYNC_ALL : WB_SYNC_NONE,
.nr_to_write = 0, /* metadata-only */
} |
includes | #include <asm/arch/am_regs.h> |
includes | #include <asm/arch/am_eth_reg.h> |
includes | #include <asm/arch/pinmux.h> |
functions | int clear_mio_mux(unsigned mux_index, unsigned mux_mask)
{
unsigned mux_reg[] = {PERIPHS_PIN_MUX_0, PERIPHS_PIN_MUX_1, PERIPHS_PIN_MUX_2,PERIPHS_PIN_MUX_3,
PERIPHS_PIN_MUX_4,PERIPHS_PIN_MUX_5,PERIPHS_PIN_MUX_6,PERIPHS_PIN_MUX_7,PERIPHS_PIN_MUX_8,
PERIPHS_PIN_MUX_9,PERIPHS_PIN_MUX_10,PERIPHS_PIN_MUX_11,PERIPHS_... |
functions | int set_mio_mux(unsigned mux_index, unsigned mux_mask)
{
unsigned mux_reg[] = {PERIPHS_PIN_MUX_0, PERIPHS_PIN_MUX_1, PERIPHS_PIN_MUX_2,PERIPHS_PIN_MUX_3,
PERIPHS_PIN_MUX_4,PERIPHS_PIN_MUX_5,PERIPHS_PIN_MUX_6,PERIPHS_PIN_MUX_7,PERIPHS_PIN_MUX_8,
PERIPHS_PIN_MUX_9,PERIPHS_PIN_MUX_10,PERIPHS_PIN_MUX_11,PERIPHS_PI... |
functions | void clearall_pinmux(void)
{
int i;
for(i=0;i<13;i++)
clear_mio_mux(i,0xffffffff);
return;
} |
functions | int eth_set_pinmux(int bank_id,int clk_in_out_id,unsigned long ext_msk)
{
int ret=0;
switch(bank_id)
{
case ETH_BANK0_GPIOX46_X54:
if(ext_msk>0)
set_mio_mux(ETH_BANK0_REG1,ext_msk);
else
set_mio_mux(ETH_BANK0_REG1,ETH_BANK0_REG1_VAL);
break;
case ETH_BANK1_GPIOX59_X67:
if(ext_msk>0)
... |
defines |
#define LCD_SET_LOWER_COLUMN_ADDRESS ((char)0x00) |
defines | #define LCD_SET_HIGHER_COLUMN_ADDRESS ((char)0x10) |
defines | #define LCD_SET_INTERNAL_REGULATOR_RESISTOR_RATIO ((char)0x20) |
defines | #define LCD_SET_POWER_CONTROL_REGISTER ((char)0x28) |
defines | #define LCD_SET_DISPLAY_START_LINE ((char)0x40) |
defines | #define LCD_SET_CONTRAST_CONTROL_REGISTER ((char)0x81) |
defines | #define LCD_SET_SEGMENT_REMAP ((char)0xA0) |
defines | #define LCD_SET_LCD_BIAS ((char)0xA2) |
defines | #define LCD_SET_ENTIRE_DISPLAY_OFF ((char)0xA4) |
defines | #define LCD_SET_ENTIRE_DISPLAY_ON ((char)0xA5) |
defines | #define LCD_SET_NORMAL_DISPLAY ((char)0xA6) |
defines | #define LCD_SET_REVERSE_DISPLAY ((char)0xA7) |
defines | #define LCD_SET_MULTIPLEX_RATIO ((char)0xA8) |
defines | #define LCD_SET_BIAS_TC_OSC ((char)0xA9) |
defines | #define LCD_SET_1OVER4_BIAS_RATIO ((char)0xAA) |
defines | #define LCD_SET_INDICATOR_OFF ((char)0xAC) |
defines | #define LCD_SET_INDICATOR_ON ((char)0xAD) |
defines | #define LCD_SET_DISPLAY_OFF ((char)0xAE) |
defines | #define LCD_SET_DISPLAY_ON ((char)0xAF) |
defines | #define LCD_SET_PAGE_ADDRESS ((char)0xB0) |
defines | #define LCD_SET_COM_OUTPUT_SCAN_DIRECTION ((char)0xC0) |
defines | #define LCD_SET_TOTAL_FRAME_PHASES ((char)0xD2) |
defines | #define LCD_SET_DISPLAY_OFFSET ((char)0xD3) |
defines | #define LCD_SET_READ_MODIFY_WRITE_MODE ((char)0xE0) |
defines | #define LCD_SOFTWARE_RESET ((char)0xE2) |
defines | #define LCD_NOP ((char)0xE3) |
defines | #define LCD_SET_END_OF_READ_MODIFY_WRITE_MODE ((char)0xEE) |
defines | #define LCD_CNTL_RESET 0xe2 /* Software reset */ |
defines | #define LCD_CNTL_POWER 0x2f /* Power control */ |
defines | #define LCD_CNTL_CONTRAST 0x81 /* Contrast */ |
defines | #define LCD_CNTL_OUTSCAN 0xc8 /* Output scan direction */ |
defines | #define LCD_CNTL_SEGREMAP 0xa1 /* Segment remap */ |
defines | #define LCD_CNTL_DISPON 0xaf /* Display on */ |
defines |
#define LCD_CNTL_PAGE 0xb0 /* Page address */ |
defines | #define LCD_CNTL_HIGHCOL 0x10 /* Upper column address */ |
defines | #define LCD_CNTL_LOWCOL 0x00 /* Lower column address */ |
functions | int lcd_default_contrast(void)
{
return (HW_MASK & LCD_CONTRAST_BIAS) ? 31 : 49;
} |
functions | void lcd_set_contrast(int val)
{
lcd_write_command(LCD_CNTL_CONTRAST);
lcd_write_command(val);
} |
functions | void lcd_set_invert_display(bool yesno)
{
if (yesno)
lcd_write_command(LCD_SET_REVERSE_DISPLAY);
else
lcd_write_command(LCD_SET_NORMAL_DISPLAY);
} |
functions | void lcd_set_flip(bool yesno)
{
#ifdef HAVE_DISPLAY_FLIPPED
if (!yesno)
#else
if (yesno)
#endif
{
lcd_write_command(LCD_SET_SEGMENT_REMAP);
lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION);
xoffset = 132 - LCD_WIDTH; /* 132 colums minus the 112 we have */
} |
functions | void lcd_init_device(void)
{
/* Initialize PB0-3 as output pins */
PBCR2 &= 0xff00; /* MD = 00 */
PBIOR |= 0x000f; /* IOR = 1 */
/* inits like the original firmware */
lcd_write_command(LCD_SOFTWARE_RESET);
lcd_write_command(LCD_SET_INTERNAL_REGULATOR_RESISTOR_RATIO + 4);
lcd_write_command(... |
functions | void lcd_blit_mono(const unsigned char *data, int x, int by, int width,
int bheight, int stride)
{
/* Copy display bitmap to hardware */
while (bheight--)
{
lcd_write_command (LCD_CNTL_PAGE | (by++ & 0xf));
lcd_write_command (LCD_CNTL_HIGHCOL | (((x+xoffset)>>4) & 0xf));
... |
functions | void lcd_blit_grey_phase(unsigned char *values, unsigned char *phases,
int x, int by, int width, int bheight, int stride)
{
stride <<= 3; /* 8 pixels per block */
while (bheight--)
{
lcd_write_command (LCD_CNTL_PAGE | (by++ & 0xf));
lcd_write_command (LCD_CNTL_HIGHCO... |
functions | void lcd_update(void)
{
int y;
/* Copy display bitmap to hardware */
for (y = 0; y < LCD_FBHEIGHT; y++)
{
lcd_write_command (LCD_CNTL_PAGE | (y & 0xf));
lcd_write_command (LCD_CNTL_HIGHCOL | ((xoffset >> 4) & 0xf));
lcd_write_command (LCD_CNTL_LOWCOL | (xoffset & 0xf));
... |
functions | void lcd_update_rect(int x, int y, int width, int height)
{
int ymax;
/* The Y coordinates have to work on even 8 pixel rows */
ymax = (y + height-1) >> 3;
y >>= 3;
if(x + width > LCD_WIDTH)
width = LCD_WIDTH - x;
if (width <= 0)
return; /* nothing left to do, 0 is harmful to l... |
includes |
#include <typedefs.h> |
includes | #include <linuxver.h> |
includes | #include <osl.h> |
includes | #include <bcmutils.h> |
includes |
#include <dngl_stats.h> |
includes | #include <dhd.h> |
includes |
#include <wlioctl.h> |
includes | #include <wl_iw.h> |
includes | #include <mach/gpio.h> |
defines |
#define WL_ERROR(x) printf x |
defines | #define WL_TRACE(x) |
functions | int dhd_customer_oob_irq_map(unsigned long *irq_flags_ptr)
{
int host_oob_irq = 0;
#ifdef CUSTOMER_HW2
host_oob_irq = wifi_get_irq_number(irq_flags_ptr);
#else /* for NOT CUSTOMER_HW2 */
#if defined(CUSTOM_OOB_GPIO_NUM)
if (dhd_oob_gpio_num < 0) {
dhd_oob_gpio_num = CUSTOM_OOB_GPIO_NUM;
} |
functions | endif
if (dhd_oob_gpio_num < 0) {
WL_ERROR(("%s: ERROR customer specific Host GPIO is NOT defined \n",
__FUNCTION__));
return (dhd_oob_gpio_num);
} |
functions | void
dhd_customer_gpio_wlan_ctrl(int onoff)
{
switch (onoff) {
case WLAN_RESET_OFF:
WL_TRACE(("%s: call customer specific GPIO to insert WLAN RESET\n",
__FUNCTION__));
#ifdef CUSTOMER_HW_SAMSUNG
//bcm_wlan_power_off(2);
wlan_setup_power(0, 2);
#endif /* CUSTOMER_HW */
#ifdef CUSTOME... |
functions | int
dhd_custom_get_mac_address(unsigned char *buf)
{
int ret = 0;
WL_TRACE(("%s Enter\n", __FUNCTION__));
if (!buf)
return -EINVAL;
/* Customer access to MAC address stored outside of DHD driver */
#ifdef CUSTOMER_HW2
ret = wifi_get_mac_addr(buf);
#endif
#ifdef EXAMPLE_GET_MAC
/* EXAMPLE code */
{
struct ... |
functions | void get_customized_country_code(char *country_iso_code, wl_country_t *cspec)
{
#ifdef CUSTOMER_HW2
struct cntry_locales_custom *cloc_ptr;
if (!cspec)
return;
cloc_ptr = wifi_get_country_code(country_iso_code);
if (cloc_ptr) {
strlcpy(cspec->ccode, cloc_ptr->custom_locale, WLC_CNTRY_BUF_SZ);
cspec->rev = cl... |
includes | #include <apudrv.h> |
includes | #include <_apudrv.h> |
includes | #include <pooldefs.h> |
includes | #include <msgqdefs.h> |
includes |
#include <cfgmap.h> |
functions | if defined (PCPY_LINK)
{
"BUFPOOL", /* NAME : Name of the pool */
(FnPoolInit) &BUFPOOL_init, /* FXN_INIT : Init function for the pool */
(FnPoolExit) &BUFPOOL_exit, /* FXN_EXIT : Exit function for the pool */
&BUFPOOL_Interface ... |
includes |
#include <stdint.h> |
includes | #include <string.h> |
includes | #include <cbfs.h> |
includes | #include <cbmem.h> |
includes | #include <console/console.h> |
includes | #include <arch/cpu.h> |
includes | #include <cpu/x86/bist.h> |
includes | #include <cpu/x86/msr.h> |
includes | #include <cpu/x86/mtrr.h> |
includes | #include <halt.h> |
includes | #include <lib.h> |
includes | #include <timestamp.h> |
includes | #include <arch/io.h> |
includes | #include <arch/stages.h> |
includes | #include <device/pci_def.h> |
includes | #include <cpu/x86/lapic.h> |
includes | #include <cbfs.h> |
includes | #include <romstage_handoff.h> |
includes | #include <reset.h> |
includes | #include <stage_cache.h> |
includes | #include <vendorcode/google/chromeos/chromeos.h> |
includes | #include <ec/google/chromeec/ec.h> |
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