type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
functions | ssize_t subsys_debugfs_write(struct file *filp,
const char __user *ubuf, size_t cnt, loff_t *ppos)
{
struct subsys_device *subsys = filp->private_data;
char buf[10];
char *cmp;
cnt = min(cnt, sizeof(buf) - 1);
if (copy_from_user(&buf, ubuf, cnt))
return -EFAULT;
buf[cnt] = '\0';
cmp = strstrip(buf);
if (!... |
functions | __init subsys_debugfs_init(void)
{
subsys_base_dir = debugfs_create_dir("msm_subsys", NULL);
return !subsys_base_dir ? -ENOMEM : 0;
} |
functions | void subsys_debugfs_exit(void)
{
debugfs_remove_recursive(subsys_base_dir);
} |
functions | int subsys_debugfs_add(struct subsys_device *subsys)
{
if (!subsys_base_dir)
return -ENOMEM;
subsys->dentry = debugfs_create_file(subsys->desc->name,
S_IRUGO | S_IWUSR, subsys_base_dir,
subsys, &subsys_debugfs_fops);
return !subsys->dentry ? -ENOMEM : 0;
} |
functions | void subsys_debugfs_remove(struct subsys_device *subsys)
{
debugfs_remove(subsys->dentry);
} |
functions | __init subsys_debugfs_init(void) { return 0; } |
functions | void subsys_debugfs_exit(void) { } |
functions | int subsys_debugfs_add(struct subsys_device *subsys) { return 0; } |
functions | void subsys_debugfs_remove(struct subsys_device *subsys) { } |
functions | int subsys_device_open(struct inode *inode, struct file *file)
{
void *retval;
struct subsys_device *subsys_dev = container_of(file->private_data,
struct subsys_device, misc_dev);
if (!file->private_data)
return -EINVAL;
retval = subsystem_get(subsys_dev->desc->name);
if (IS_ERR(retval))
return PTR_ERR(ret... |
functions | int subsys_device_close(struct inode *inode, struct file *file)
{
struct subsys_device *subsys_dev = container_of(file->private_data,
struct subsys_device, misc_dev);
if (!file->private_data)
return -EINVAL;
subsystem_put(subsys_dev);
return 0;
} |
functions | void subsys_device_release(struct device *dev)
{
struct subsys_device *subsys = to_subsys(dev);
wake_lock_destroy(&subsys->wake_lock);
mutex_destroy(&subsys->track.lock);
ida_simple_remove(&subsys_ida, subsys->id);
kfree(subsys);
} |
functions | irqreturn_t subsys_err_ready_intr_handler(int irq, void *subsys)
{
struct subsys_device *subsys_dev = subsys;
dev_info(subsys_dev->desc->dev,
"Subsystem error monitoring/handling services are up\n");
if (subsys_dev->desc->is_not_loadable)
return IRQ_HANDLED;
complete(&subsys_dev->err_ready);
return IRQ_HANDL... |
functions | int subsys_misc_device_add(struct subsys_device *subsys_dev)
{
int ret;
memset(subsys_dev->miscdevice_name, 0,
ARRAY_SIZE(subsys_dev->miscdevice_name));
snprintf(subsys_dev->miscdevice_name,
ARRAY_SIZE(subsys_dev->miscdevice_name), "subsys_%s",
subsys_dev->desc->name);
subsys_dev->misc_dev.minor = MISC_... |
functions | void subsys_misc_device_remove(struct subsys_device *subsys_dev)
{
misc_deregister(&subsys_dev->misc_dev);
} |
functions | int __get_gpio(struct subsys_desc *desc, const char *prop,
int *gpio)
{
struct device_node *dnode = desc->dev->of_node;
int ret = -ENOENT;
if (of_find_property(dnode, prop, NULL)) {
*gpio = of_get_named_gpio(dnode, prop, 0);
ret = *gpio < 0 ? *gpio : 0;
} |
functions | int __get_irq(struct subsys_desc *desc, const char *prop,
unsigned int *irq)
{
int ret, gpio, irql;
ret = __get_gpio(desc, prop, &gpio);
if (ret)
return ret;
irql = gpio_to_irq(gpio);
if (irql == -ENOENT)
irql = -ENXIO;
if (irql < 0) {
pr_err("[%s]: Error getting IRQ \"%s\"\n", desc->name,
prop);
... |
functions | int subsys_parse_devicetree(struct subsys_desc *desc)
{
int ret;
struct platform_device *pdev = container_of(desc->dev,
struct platform_device, dev);
ret = __get_irq(desc, "qcom,gpio-err-fatal", &desc->err_fatal_irq);
if (ret && ret != -ENOENT)
return ret;
ret = __get_irq(desc, "qcom,gpio-err-ready", &des... |
functions | int subsys_setup_irqs(struct subsys_device *subsys)
{
struct subsys_desc *desc = subsys->desc;
int ret;
if (desc->err_fatal_irq && desc->err_fatal_handler) {
ret = devm_request_irq(desc->dev, desc->err_fatal_irq,
desc->err_fatal_handler,
IRQF_TRIGGER_RISING, desc->name, desc);
if (ret < 0) {
dev_err(... |
functions | void subsys_unregister(struct subsys_device *subsys)
{
if (IS_ERR_OR_NULL(subsys))
return;
if (get_device(&subsys->dev)) {
mutex_lock(&subsys->track.lock);
WARN_ON(subsys->count);
device_unregister(&subsys->dev);
mutex_unlock(&subsys->track.lock);
subsys_debugfs_remove(subsys);
subsys_misc_device_remov... |
functions | int subsys_panic(struct device *dev, void *data)
{
struct subsys_device *subsys = to_subsys(dev);
if (subsys->desc->crash_shutdown)
subsys->desc->crash_shutdown(subsys->desc);
return 0;
} |
functions | int ssr_panic_handler(struct notifier_block *this,
unsigned long event, void *ptr)
{
bus_for_each_dev(&subsys_bus_type, NULL, NULL, subsys_panic);
return NOTIFY_DONE;
} |
functions | __init ssr_init_soc_restart_orders(void)
{
int i;
atomic_notifier_chain_register(&panic_notifier_list,
&panic_nb);
if (cpu_is_msm8x60()) {
for (i = 0; i < ARRAY_SIZE(orders_8x60_all); i++) {
mutex_init(&orders_8x60_all[i]->track.lock);
spin_lock_init(&orders_8x60_all[i]->track.s_lock);
} |
functions | __init subsys_restart_init(void)
{
int ret;
ssr_wq = alloc_workqueue("ssr_wq", WQ_CPU_INTENSIVE, 0);
BUG_ON(!ssr_wq);
ret = bus_register(&subsys_bus_type);
if (ret)
goto err_bus;
ret = subsys_debugfs_init();
if (ret)
goto err_debugfs;
ret = ssr_init_soc_restart_orders();
if (ret)
goto err_soc;
return ... |
includes | #include <linux/init.h> |
includes | #include <linux/module.h> |
includes | #include <linux/platform_device.h> |
includes | #include <linux/delay.h> |
includes | #include <linux/i2c.h> |
includes | #include <linux/spinlock.h> |
includes | #include <linux/completion.h> |
includes | #include <linux/err.h> |
includes | #include <linux/interrupt.h> |
includes | #include <linux/clk.h> |
includes | #include <linux/io.h> |
includes | #include <linux/slab.h> |
defines | #define NAME "stu300"
|
defines | #define I2C_CR (0x00000000)
|
defines | #define I2C_CR_RESET_VALUE (0x00)
|
defines | #define I2C_CR_RESET_UMASK (0x00)
|
defines | #define I2C_CR_DDC1_ENABLE (0x80)
|
defines | #define I2C_CR_TRANS_ENABLE (0x40)
|
defines | #define I2C_CR_PERIPHERAL_ENABLE (0x20)
|
defines | #define I2C_CR_DDC2B_ENABLE (0x10)
|
defines | #define I2C_CR_START_ENABLE (0x08)
|
defines | #define I2C_CR_ACK_ENABLE (0x04)
|
defines | #define I2C_CR_STOP_ENABLE (0x02)
|
defines | #define I2C_CR_INTERRUPT_ENABLE (0x01)
|
defines | #define I2C_SR1 (0x00000004)
|
defines | #define I2C_SR1_RESET_VALUE (0x00)
|
defines | #define I2C_SR1_RESET_UMASK (0x00)
|
defines | #define I2C_SR1_EVF_IND (0x80)
|
defines | #define I2C_SR1_ADD10_IND (0x40)
|
defines | #define I2C_SR1_TRA_IND (0x20)
|
defines | #define I2C_SR1_BUSY_IND (0x10)
|
defines | #define I2C_SR1_BTF_IND (0x08)
|
defines | #define I2C_SR1_ADSL_IND (0x04)
|
defines | #define I2C_SR1_MSL_IND (0x02)
|
defines | #define I2C_SR1_SB_IND (0x01)
|
defines | #define I2C_SR2 (0x00000008)
|
defines | #define I2C_SR2_RESET_VALUE (0x00)
|
defines | #define I2C_SR2_RESET_UMASK (0x40)
|
defines | #define I2C_SR2_MASK (0xBF)
|
defines | #define I2C_SR2_SCLFAL_IND (0x80)
|
defines | #define I2C_SR2_ENDAD_IND (0x20)
|
defines | #define I2C_SR2_AF_IND (0x10)
|
defines | #define I2C_SR2_STOPF_IND (0x08)
|
defines | #define I2C_SR2_ARLO_IND (0x04)
|
defines | #define I2C_SR2_BERR_IND (0x02)
|
defines | #define I2C_SR2_DDC2BF_IND (0x01)
|
defines | #define I2C_CCR (0x0000000C)
|
defines | #define I2C_CCR_RESET_VALUE (0x00)
|
defines | #define I2C_CCR_RESET_UMASK (0x00)
|
defines | #define I2C_CCR_MASK (0xFF)
|
defines | #define I2C_CCR_FMSM (0x80)
|
defines | #define I2C_CCR_CC_MASK (0x7F)
|
defines | #define I2C_OAR1 (0x00000010)
|
defines | #define I2C_OAR1_RESET_VALUE (0x00)
|
defines | #define I2C_OAR1_RESET_UMASK (0x00)
|
defines | #define I2C_OAR1_ADD_MASK (0xFF)
|
defines | #define I2C_OAR2 (0x00000014)
|
defines | #define I2C_OAR2_RESET_VALUE (0x40)
|
defines | #define I2C_OAR2_RESET_UMASK (0x19)
|
defines | #define I2C_OAR2_MASK (0xE6)
|
defines | #define I2C_OAR2_FR_25_10MHZ (0x00)
|
defines | #define I2C_OAR2_FR_10_1667MHZ (0x20)
|
defines | #define I2C_OAR2_FR_1667_2667MHZ (0x40)
|
defines | #define I2C_OAR2_FR_2667_40MHZ (0x60)
|
defines | #define I2C_OAR2_FR_40_5333MHZ (0x80)
|
defines | #define I2C_OAR2_FR_5333_66MHZ (0xA0)
|
defines | #define I2C_OAR2_FR_66_80MHZ (0xC0)
|
defines | #define I2C_OAR2_FR_80_100MHZ (0xE0)
|
defines | #define I2C_OAR2_FR_MASK (0xE0)
|
defines | #define I2C_OAR2_ADD_MASK (0x06)
|
defines | #define I2C_DR (0x00000018)
|
defines | #define I2C_DR_RESET_VALUE (0x00)
|
defines | #define I2C_DR_RESET_UMASK (0xFF)
|
defines | #define I2C_DR_D_MASK (0xFF)
|
defines | #define I2C_ECCR (0x0000001C)
|
defines | #define I2C_ECCR_RESET_VALUE (0x00)
|
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