type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
defines | #define I2C_ECCR_RESET_UMASK (0xE0)
|
defines | #define I2C_ECCR_MASK (0x1F)
|
defines | #define I2C_ECCR_CC_MASK (0x1F)
|
defines | #define STU300_TIMEOUT (msecs_to_jiffies(1000))
|
defines | #define NUM_ADDR_RESEND_ATTEMPTS 12
|
defines | #define BUSY_RELEASE_ATTEMPTS 10
|
defines | #define stu300_suspend NULL
|
defines | #define stu300_resume NULL
|
structs | struct stu300_dev {
struct platform_device *pdev;
struct i2c_adapter adapter;
resource_size_t phybase;
resource_size_t physize;
void __iomem *virtbase;
struct clk *clk;
int irq;
spinlock_t cmd_issue_lock;
struct completion cmd_complete;
enum stu300_event cmd_event;
enum stu300_error cmd_err... |
structs | struct stu300_clkset {
unsigned long rate;
u32 setting;
}; |
functions | void stu300_wr8(u32 value, void __iomem *address)
{
writel((value << 16) | value, address);
} |
functions | u32 stu300_r8(void __iomem *address)
{
return readl(address) & 0x000000FFU;
} |
functions | void stu300_irq_enable(struct stu300_dev *dev)
{
u32 val;
val = stu300_r8(dev->virtbase + I2C_CR);
val |= I2C_CR_INTERRUPT_ENABLE;
/* Twice paranoia (possible HW glitch) */
stu300_wr8(val, dev->virtbase + I2C_CR);
stu300_wr8(val, dev->virtbase + I2C_CR);
} |
functions | void stu300_irq_disable(struct stu300_dev *dev)
{
u32 val;
val = stu300_r8(dev->virtbase + I2C_CR);
val &= ~I2C_CR_INTERRUPT_ENABLE;
/* Twice paranoia (possible HW glitch) */
stu300_wr8(val, dev->virtbase + I2C_CR);
stu300_wr8(val, dev->virtbase + I2C_CR);
} |
functions | int stu300_event_occurred(struct stu300_dev *dev,
enum stu300_event mr_event) {
u32 status1;
u32 status2;
/* What event happened? */
status1 = stu300_r8(dev->virtbase + I2C_SR1);
if (!(status1 & I2C_SR1_EVF_IND))
/* No event at all */
return 0;
status2 = stu300_r8(dev->virtbase + I2C_SR2... |
functions | else if (status2 & I2C_SR2_BERR_IND) {
dev->cmd_err = STU300_ERROR_BUS_ERROR;
return 1;
} |
functions | else if (status2 & I2C_SR2_ARLO_IND) {
dev->cmd_err = STU300_ERROR_ARBITRATION_LOST;
return 1;
} |
functions | irqreturn_t stu300_irh(int irq, void *data)
{
struct stu300_dev *dev = data;
int res;
/* Just make sure that the block is clocked */
clk_enable(dev->clk);
/* See if this was what we were waiting for */
spin_lock(&dev->cmd_issue_lock);
res = stu300_event_occurred(dev, dev->cmd_event);
if (res || d... |
functions | int stu300_start_and_await_event(struct stu300_dev *dev,
u8 cr_value,
enum stu300_event mr_event)
{
int ret;
if (unlikely(irqs_disabled())) {
/* TODO: implement polling for this case if need be. */
WARN(1, "irqs are disabled, cannot poll for event\n");
return -EIO;
} |
functions | int stu300_await_event(struct stu300_dev *dev,
enum stu300_event mr_event)
{
int ret;
if (unlikely(irqs_disabled())) {
/* TODO: implement polling for this case if need be. */
dev_err(&dev->pdev->dev, "irqs are disabled on this "
"system!\n");
return -EIO;
} |
functions | int stu300_wait_while_busy(struct stu300_dev *dev)
{
unsigned long timeout;
int i;
for (i = 0; i < BUSY_RELEASE_ATTEMPTS; i++) {
timeout = jiffies + STU300_TIMEOUT;
while (!time_after(jiffies, timeout)) {
/* Is not busy? */
if ((stu300_r8(dev->virtbase + I2C_SR1) &
I2C_SR1_BUSY_IND) ==... |
functions | int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
{
u32 val;
int i = 0;
/* Locate the appropriate clock setting */
while (i < ARRAY_SIZE(stu300_clktable) - 1 &&
stu300_clktable[i].rate < clkrate)
i++;
if (stu300_clktable[i].setting == 0xFFU) {
dev_err(&dev->pdev->dev, "to... |
functions | int stu300_init_hw(struct stu300_dev *dev)
{
u32 dummy;
unsigned long clkrate;
int ret;
/* Disable controller */
stu300_wr8(0x00, dev->virtbase + I2C_CR);
/*
* Set own address to some default value (0x00).
* We do not support slave mode anyway.
*/
stu300_wr8(0x00, dev->virtbase + I2C_OAR1);
... |
functions | int stu300_send_address(struct stu300_dev *dev,
struct i2c_msg *msg, int resend)
{
u32 val;
int ret;
if (msg->flags & I2C_M_TEN)
/* This is probably how 10 bit addresses look */
val = (0xf0 | (((u32) msg->addr & 0x300) >> 7)) &
I2C_DR_D_MASK;
else
val = ((msg->addr << 1) & I2C_DR_D_MASK);
... |
functions | int stu300_xfer_msg(struct i2c_adapter *adap,
struct i2c_msg *msg, int stop)
{
u32 cr;
u32 val;
u32 i;
int ret;
int attempts = 0;
struct stu300_dev *dev = i2c_get_adapdata(adap);
clk_enable(dev->clk);
/* Remove this if (0) to trace each and every message. */
if (0) {
dev_dbg(&dev->pde... |
functions | else if (attempts == NUM_ADDR_RESEND_ATTEMPTS) {
dev_dbg(&dev->pdev->dev, "I give up, tried %d times "
"to resend address.\n",
NUM_ADDR_RESEND_ATTEMPTS);
goto exit_disable;
} |
functions | int stu300_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
int num)
{
int ret = -1;
int i;
struct stu300_dev *dev = i2c_get_adapdata(adap);
dev->msg_len = num;
for (i = 0; i < num; i++) {
/*
* Another driver appears to send stop for each message,
* here we only do that for the last m... |
functions | u32 stu300_func(struct i2c_adapter *adap)
{
/* This is the simplest thing you can think of... */
return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR;
} |
functions | __init
stu300_probe(struct platform_device *pdev)
{
struct stu300_dev *dev;
struct i2c_adapter *adap;
struct resource *res;
int bus_nr;
int ret = 0;
char clk_name[] = "I2C0";
dev = kzalloc(sizeof(struct stu300_dev), GFP_KERNEL);
if (!dev) {
dev_err(&pdev->dev, "could not allocate device struct\n"... |
functions | int stu300_suspend(struct platform_device *pdev, pm_message_t state)
{
struct stu300_dev *dev = platform_get_drvdata(pdev);
/* Turn off everything */
stu300_wr8(0x00, dev->virtbase + I2C_CR);
return 0;
} |
functions | int stu300_resume(struct platform_device *pdev)
{
int ret = 0;
struct stu300_dev *dev = platform_get_drvdata(pdev);
clk_enable(dev->clk);
ret = stu300_init_hw(dev);
clk_disable(dev->clk);
if (ret != 0)
dev_err(&pdev->dev, "error re-initializing hardware.\n");
return ret;
} |
functions | __exit
stu300_remove(struct platform_device *pdev)
{
struct stu300_dev *dev = platform_get_drvdata(pdev);
i2c_del_adapter(&dev->adapter);
/* Turn off everything */
stu300_wr8(0x00, dev->virtbase + I2C_CR);
free_irq(dev->irq, dev);
iounmap(dev->virtbase);
release_mem_region(dev->phybase, dev->physize);... |
functions | __init stu300_init(void)
{
return platform_driver_probe(&stu300_i2c_driver, stu300_probe);
} |
functions | __exit stu300_exit(void)
{
platform_driver_unregister(&stu300_i2c_driver);
} |
includes |
#include <gnutls_int.h> |
includes | #include <gnutls_errors.h> |
includes | #include <gnutls_extensions.h> |
includes | #include <gnutls_openpgp.h> |
includes | #include <gnutls_extra.h> |
includes | #include <gnutls_extra_hooks.h> |
includes | #include <gnutls_algorithms.h> |
includes |
#include <strverscmp.h> |
functions | int
_gnutls_add_lzo_comp (void)
{
int i;
/* find the last element */
for (i = 0; i < _gnutls_comp_algorithms_size; i++)
{
if (_gnutls_compression_algorithms[i].name == NULL)
break;
} |
functions | int
gnutls_global_init_extra (void)
{
int ret;
/* If the version of libgnutls != version of
* libextra, then do not initialize the library.
* This is because it may break things.
*/
if (strcmp (gnutls_check_version (NULL), VERSION) != 0)
{
return GNUTLS_E_LIBRARY_VERSION_MISMATCH;
} |
includes | #include <rtthread.h> |
functions | void GPIO_Configuration(void)
{
uint8_t i;
for(i=0;i<13;i++)
{
GPIO_Pin_Setup(A,i,OUT,PP,NO);
} |
functions | void rt_thread_entry_core_test(void* parameter)
{
uint8_t i;
GPIO_Configuration();
while (1)
{
for(i=0;i<13;i++)
{
GPIO_Pin_Write(A,i,1);
} |
functions | int core_test_init(void)
{
rt_thread_init(&thread_core_test,
"core_test",
rt_thread_entry_core_test,
RT_NULL,
&thread_core_test_stack[0],
sizeof(thread_core_test_stack),24,5);
rt_thread_startup(&thread_core_test);
... |
includes |
#include <linux/init.h> |
includes | #include <linux/ioport.h> |
includes | #include <linux/platform_device.h> |
includes | #include <linux/bootmem.h> |
includes | #include <asm/mach-types.h> |
includes | #include <asm/mach/mmc.h> |
includes | #include <mach/msm_bus_board.h> |
includes | #include <mach/board.h> |
includes | #include <mach/gpio.h> |
includes | #include <mach/gpiomux.h> |
includes | #include <mach/socinfo.h> |
functions | __init apq8064_init_gpiomux(void)
{
int rc;
rc = msm_gpiomux_init(NR_GPIO_IRQS);
if (rc) {
pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
return;
} |
includes |
#include <omethlib.h> |
includes | #include <omethlibint.h> |
includes | #include <string.h> |
includes | #include <stdlib.h> |
includes | #include <omethlib_target.h> |
defines | #define OMETH_REG_RXMODE_MASK 0x0003 |
defines |
#define OMETH_REG_RXMODE_DEFAULT 0x0000 |
defines | #define OMETH_REG_RXMODE_HIGH_PRIO 0x0001 |
defines | #define OMETH_REG_RXMODE_BLOCK 0x0002 |
defines | #define OMETH_REG_RXMODE_AUTO 0x0003 |
defines |
#define OMETH_MAX_RES_IPG 0x3F // max response inter package gap |
defines |
#define OMETH_MIN_TX_FRAME 60 // minimal transmit frame length (without checksum) |
defines |
#define OMETH_INIT_LINK_SPEED 100 |
defines |
#define MICREL_KS8721_PHY_ID 0x22161 |
defines | #define MICREL_KS8721_IPG 40 // due to phy runtime of 460ns the ipg can be reduced to 40 (40+2*460 = 960 ... minimum ipg) |
defines | #define NATIONAL_DP83640_PHY_ID 0x20005CE |
defines | #define NATIONAL_DP83640_IPG ~0 //TODO: measure IPG and compensate |
defines |
#define MARVELL_88E1111_PHY_ID 0x001410CC |
defines | #define MARVELL_88E1111_IPG ~0 //TODO: measure IPG and compensate |
defines |
#define PHY_MICREL_REG1F_NOAUTOMDIX 0x2000 |
defines |
#define SMSC_LAN8700 0x7C0C |
defines | #define PHY_SMSC_REG1B_NOAUTOMDIX 0xA000 |
defines | #define PHY_SMSC_REG1B_NOAUTOMDIX 0x8000 |
defines |
#define PHY_REG1F_OP_10HALF 1 |
defines | #define PHY_REG1F_OP_10FULL 5 |
defines | #define PHY_REG1F_OP_100HALF 2 |
defines | #define PHY_REG1F_OP_100FULL 6 |
defines |
#define MII_REG_ENABLE 0x0080 // bit mask for reset bit in phy control |
defines | #define PHY_REG_READ 0x6000 // MII read flags |
defines | #define PHY_REG_WRITE 0x5002 // MII write flags |
defines |
#define SMI_REG_READ 0x4800 // SMI read flags (micrel switch) |
defines | #define SMI_REG_WRITE 0x4002 // SMI write flags (micrel switch) |
defines | #define OMETH_MAX_RETRY 0 |
defines | #define OMETH_TRANSMIT( ARG, TIME, addFlags, TX_QUEUE_INDEX ) \ |
defines | #define assert(x) |
functions | void omethPacketFree
(
ometh_packet_typ *pPacket /* address of rx packet */
)
{
ometh_pending_typ *pQueue; // ptr to buffer queue
OMETH_HOOK_H hHook; // hook handle leading to the data area of the buffer
ometh_buf_typ *pBuf; // ptr to buffer
// access... |
functions | void soft_irq_dummy
(
ometh_packet_typ *pPacket /* packet which should be released */
)
{
} |
functions | int omethMiiControl
(
void *pPhyBase, /* ptr to phy register */
unsigned short command /* combination of MII_CTRL_... values */
)
{
// enable phys
ometh_mii_typ* pPhy = OMETH_MAKE_NONCACHABLE(pPhyBase);
if(pPhyBase==0) return -1;
// reset and active at the same time ..... |
functions | void omethInit
(
void
)
{
// clear internal driver data
memset(&omethInternal,0,sizeof(omethInternal));
} |
functions | OMETH_H omethCreateInt
(
ometh_config_typ *pEthConfig /* ptr to ethernet config struct */
)
{
OMETH_H hEth;
unsigned long len,i,phyId;
unsigned char *pByte;
unsigned short data,readData;
unsigned char nbTxDesc[2]={0,0} |
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