type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
includes | #include <linux/qpnp/qpnp-adc.h> |
includes |
#include <linux/msm-bus.h> |
defines |
#define MSM_USB_BASE (motg->regs) |
defines | #define MSM_USB_PHY_CSR_BASE (motg->phy_csr_regs) |
defines |
#define DRIVER_NAME "msm_otg" |
defines |
#define ID_TIMER_FREQ (jiffies + msecs_to_jiffies(500)) |
defines | #define CHG_RECHECK_DELAY (jiffies + msecs_to_jiffies(2000)) |
defines | #define ULPI_IO_TIMEOUT_USEC (10 * 1000) |
defines | #define USB_PHY_3P3_VOL_MIN 3050000 /* uV */ |
defines | #define USB_PHY_3P3_VOL_MAX 3300000 /* uV */ |
defines | #define USB_PHY_3P3_HPM_LOAD 50000 /* uA */ |
defines | #define USB_PHY_3P3_LPM_LOAD 4000 /* uA */ |
defines |
#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */ |
defines | #define USB_PHY_1P8_VOL_MAX 1800000 /* uV */ |
defines | #define USB_PHY_1P8_HPM_LOAD 50000 /* uA */ |
defines | #define USB_PHY_1P8_LPM_LOAD 4000 /* uA */ |
defines |
#define USB_PHY_VDD_DIG_VOL_NONE 0 /*uV */ |
defines | #define USB_PHY_VDD_DIG_VOL_MIN 1045000 /* uV */ |
defines | #define USB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */ |
defines |
#define USB_SUSPEND_DELAY_TIME (500 * HZ/1000) /* 500 msec */ |
defines |
#define USB_DEFAULT_SYSTEM_CLOCK 80000000 /* 80 MHz */ |
defines |
#define LINK_RESET_TIMEOUT_USEC (250 * 1000) |
defines |
#define QUSB2PHY_PORT_POWERDOWN 0xB4 |
defines | #define QUSB2PHY_PORT_UTMI_CTRL2 0xC4 |
defines |
#define HOST_SUSPEND_WQ_TIMEOUT_MS msecs_to_jiffies(2000) /* 2 seconds */ |
defines |
#define PHY_SUSPEND_TIMEOUT_USEC (5 * 1000) |
defines | #define PHY_DEVICE_BUS_SUSPEND_TIMEOUT_USEC 100 |
defines | #define PHY_RESUME_TIMEOUT_USEC (100 * 1000) |
defines |
#define PHY_SUSPEND_RETRIES_MAX 3 |
defines |
#define MSM_CHG_DCD_TIMEOUT (750 * HZ/1000) /* 750 msec */ |
defines | #define MSM_CHG_DCD_POLL_TIME (50 * HZ/1000) /* 50 msec */ |
defines | #define MSM_CHG_PRIMARY_DET_TIME (50 * HZ/1000) /* TVDPSRC_ON */ |
defines | #define MSM_CHG_SECONDARY_DET_TIME (50 * HZ/1000) /* TVDMSRC_ON */ |
defines |
#define VBUS_INIT_TIMEOUT msecs_to_jiffies(5000) |
defines |
#define MSM_ID_STATUS_DELAY 5 /* 5msec */ |
defines |
#define MSM_OTG_CMD_ID 0x09 |
defines | #define MSM_OTG_DEVICE_ID 0x04 |
defines | #define MSM_OTG_VMID_IDX 0xFF |
defines | #define MSM_OTG_MEM_TYPE 0x02 |
functions | bool aca_enabled(void)
{
#ifdef CONFIG_USB_MSM_ACA
return true;
#else
return debug_aca_enabled;
#endif
} |
functions | void dbg_inc(unsigned *idx)
{
*idx = (*idx + 1) & (DEBUG_MAX_MSG-1);
} |
functions | void
msm_otg_dbg_log_event(struct usb_phy *phy, char *event, int d1, int d2)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
unsigned long flags;
unsigned long long t;
unsigned long nanosec;
if (!enable_dbg_log)
return;
write_lock_irqsave(&motg->dbg_lock, flags);
t = cpu_clock(smp_processor_... |
functions | int msm_hsusb_ldo_init(struct msm_otg *motg, int init)
{
int rc = 0;
if (init) {
hsusb_3p3 = devm_regulator_get(motg->phy.dev, "HSUSB_3p3");
if (IS_ERR(hsusb_3p3)) {
dev_err(motg->phy.dev, "unable to get hsusb 3p3\n");
return PTR_ERR(hsusb_3p3);
} |
functions | int msm_hsusb_config_vddcx(int high)
{
struct msm_otg *motg = the_msm_otg;
int max_vol = vdd_val[VDD_MAX];
int min_vol;
int ret;
min_vol = vdd_val[!!high];
ret = regulator_set_voltage(hsusb_vdd, min_vol, max_vol);
if (ret) {
pr_err("%s: unable to set the voltage for regulator "
"HSUSB_VDDCX\n", __func__);
... |
functions | int msm_hsusb_ldo_enable(struct msm_otg *motg,
enum msm_otg_phy_reg_mode mode)
{
int ret = 0;
if (IS_ERR(hsusb_1p8)) {
pr_err("%s: HSUSB_1p8 is not initialized\n", __func__);
return -ENODEV;
} |
functions | void msm_hsusb_mhl_switch_enable(struct msm_otg *motg, bool on)
{
struct msm_otg_platform_data *pdata = motg->pdata;
if (!pdata->mhl_enable)
return;
if (!mhl_usb_hs_switch) {
pr_err("%s: mhl_usb_hs_switch is NULL.\n", __func__);
return;
} |
functions | int ulpi_read(struct usb_phy *phy, u32 reg)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
int cnt = 0;
if (motg->pdata->emulation)
return 0;
if (motg->pdata->phy_type == QUSB_ULPI_PHY && reg > 0x3F) {
pr_debug("%s: ULPI vendor-specific reg 0x%02x not supported\n",
__func__, reg);
retur... |
functions | int ulpi_write(struct usb_phy *phy, u32 val, u32 reg)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
int cnt = 0;
if (motg->pdata->emulation)
return 0;
if (motg->pdata->phy_type == QUSB_ULPI_PHY && reg > 0x3F) {
pr_debug("%s: ULPI vendor-specific reg 0x%02x not supported\n",
__func__, reg... |
functions | void ulpi_init(struct msm_otg *motg)
{
struct msm_otg_platform_data *pdata = motg->pdata;
int aseq[10];
int *seq = NULL;
if (override_phy_init) {
pr_debug("%s(): HUSB PHY Init:%s\n", __func__,
override_phy_init);
get_options(override_phy_init, ARRAY_SIZE(aseq), aseq);
seq = &aseq[1];
} |
functions | int msm_otg_phy_clk_reset(struct msm_otg *motg)
{
int ret;
if (!motg->phy_reset_clk)
return 0;
if (motg->sleep_clk)
clk_disable_unprepare(motg->sleep_clk);
if (motg->phy_csr_clk)
clk_disable_unprepare(motg->phy_csr_clk);
ret = clk_reset(motg->phy_reset_clk, CLK_RESET_ASSERT);
if (ret < 0) {
pr_err("phy... |
functions | int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
{
int ret;
if (assert) {
/* Using asynchronous block reset to the hardware */
dev_dbg(motg->phy.dev, "block_reset ASSERT\n");
clk_disable_unprepare(motg->pclk);
clk_disable_unprepare(motg->core_clk);
ret = clk_reset(motg->core_clk, CLK_RESET_ASS... |
functions | int msm_otg_phy_reset(struct msm_otg *motg)
{
u32 val;
int ret;
struct msm_otg_platform_data *pdata = motg->pdata;
/*
* AHB2AHB Bypass mode shouldn't be enable before doing
* async clock reset. If it is enable, disable the same.
*/
val = readl_relaxed(USB_AHBMODE);
if (val & AHB2AHB_BYPASS) {
pr_err("%s(... |
functions | int msm_otg_link_reset(struct msm_otg *motg)
{
int cnt = 0;
struct msm_otg_platform_data *pdata = motg->pdata;
writel_relaxed(USBCMD_RESET, USB_USBCMD);
while (cnt < LINK_RESET_TIMEOUT_USEC) {
if (!(readl_relaxed(USB_USBCMD) & USBCMD_RESET))
break;
udelay(1);
cnt++;
} |
functions | void msm_usb_phy_reset(struct msm_otg *motg)
{
u32 val;
int ret, *seq;
switch (motg->pdata->phy_type) {
case SNPS_PICO_PHY:
/* Assert USB PHY_PON */
val = readl_relaxed(motg->usb_phy_ctrl_reg);
val &= ~PHY_POR_BIT_MASK;
val |= PHY_POR_ASSERT;
writel_relaxed(val, motg->usb_phy_ctrl_reg);
/* wait for m... |
functions | int msm_otg_reset(struct usb_phy *phy)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
struct msm_otg_platform_data *pdata = motg->pdata;
int ret;
u32 val = 0;
u32 ulpi_val = 0;
msm_otg_dbg_log_event(&motg->phy, "USB RESET", phy->state,
get_pm_runtime_counter(phy->dev));
/*
* USB PHY and L... |
functions | else if (pdata->disable_reset_on_disconnect && motg->reset_counter) {
return 0;
} |
functions | else if (pdata->mode == USB_PERIPHERAL) {
ulpi_val = ULPI_INT_SESS_VALID;
val |= OTGSC_BSVIE;
} |
functions | else if (pdata->otg_control == OTG_PMIC_CONTROL) {
ulpi_write(phy, OTG_COMP_DISABLE,
ULPI_SET(ULPI_PWR_CLK_MNG_REG));
/* Enable PMIC pull-up */
pm8xxx_usb_id_pullup(1);
if (motg->phy_irq)
writeb_relaxed(USB_PHY_ID_MASK,
USB2_PHY_USB_PHY_INTERRUPT_MASK1);
} |
functions | hrtimer_restart msm_otg_timer_func(struct hrtimer *hrtimer)
{
struct msm_otg *motg = container_of(hrtimer, struct msm_otg, timer);
switch (motg->active_tmout) {
case A_WAIT_VRISE:
/* TODO: use vbus_vld interrupt */
set_bit(A_VBUS_VLD, &motg->inputs);
break;
case A_TST_MAINT:
/* OTG PET: End session after T... |
functions | void msm_otg_del_timer(struct msm_otg *motg)
{
int bit = motg->active_tmout;
pr_debug("deleting %s timer. remaining %lld msec\n", timer_string(bit),
div_s64(ktime_to_us(hrtimer_get_remaining(
&motg->timer)), 1000));
hrtimer_cancel(&motg->timer);
clear_bit(bit, &motg->tmouts);
} |
functions | void msm_otg_start_timer(struct msm_otg *motg, int time, int bit)
{
clear_bit(bit, &motg->tmouts);
motg->active_tmout = bit;
pr_debug("starting %s timer\n", timer_string(bit));
hrtimer_start(&motg->timer,
ktime_set(time / 1000, (time % 1000) * 1000000),
HRTIMER_MODE_REL);
} |
functions | void msm_otg_init_timer(struct msm_otg *motg)
{
hrtimer_init(&motg->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
motg->timer.function = msm_otg_timer_func;
} |
functions | int msm_otg_start_hnp(struct usb_otg *otg)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
if (otg->phy->state != OTG_STATE_A_HOST) {
pr_err("HNP can not be initiated in %s state\n",
usb_otg_state_string(otg->phy->state));
return -EINVAL;
} |
functions | int msm_otg_start_srp(struct usb_otg *otg)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
u32 val;
int ret = 0;
if (otg->phy->state != OTG_STATE_B_IDLE) {
pr_err("SRP can not be initiated in %s state\n",
usb_otg_state_string(otg->phy->state));
ret = -EINVAL;
goto out;
} |
functions | void msm_otg_host_hnp_enable(struct usb_otg *otg, bool enable)
{
struct usb_hcd *hcd = bus_to_hcd(otg->host);
struct usb_device *rhub = otg->host->root_hub;
if (enable) {
pm_runtime_disable(&rhub->dev);
rhub->state = USB_STATE_NOTATTACHED;
hcd->driver->bus_suspend(hcd);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hc... |
functions | int msm_otg_set_suspend(struct usb_phy *phy, int suspend)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
if (aca_enabled())
return 0;
pr_debug("%s(%d) in %s state\n", __func__, suspend,
usb_otg_state_string(phy->state));
msm_otg_dbg_log_event(phy, "SET SUSPEND", suspend, phy->state);
/*
... |
functions | int msm_otg_bus_freq_get(struct device *dev, struct msm_otg *motg)
{
struct device_node *np = dev->of_node;
int len = 0;
int i;
int ret;
if (!np)
return -EINVAL;
of_find_property(np, "qcom,bus-clk-rate", &len);
if (!len || (len / sizeof(u32) != USB_NUM_BUS_CLOCKS)) {
pr_err("Invalid bus clock rate paramete... |
functions | void msm_otg_bus_clks_enable(struct msm_otg *motg)
{
int i;
int ret;
if (!bus_clk_rate_set || motg->bus_clks_enabled)
return;
for (i = 0; i < USB_NUM_BUS_CLOCKS; i++) {
ret = clk_prepare_enable(motg->bus_clks[i]);
if (ret) {
pr_err("%s enable rate failed: %d\n", bus_clkname[i],
ret);
goto err_clk_... |
functions | void msm_otg_bus_clks_disable(struct msm_otg *motg)
{
int i;
if (!bus_clk_rate_set || !motg->bus_clks_enabled)
return;
for (i = 0; i < USB_NUM_BUS_CLOCKS; i++)
clk_disable_unprepare(motg->bus_clks[i]);
motg->bus_clks_enabled = false;
} |
functions | void msm_otg_bus_vote(struct msm_otg *motg, enum usb_bus_vote vote)
{
int ret;
struct msm_otg_platform_data *pdata = motg->pdata;
msm_otg_dbg_log_event(&motg->phy, "BUS VOTE", vote, motg->phy.state);
/* Check if target allows min_vote to be same as no_vote */
if (pdata->bus_scale_table &&
vote >= pdata->bus_... |
functions | void msm_otg_enable_phy_hv_int(struct msm_otg *motg)
{
bool bsv_id_hv_int = false;
bool dp_dm_hv_int = false;
u32 val;
if (motg->pdata->otg_control == OTG_PHY_CONTROL ||
motg->phy_irq)
bsv_id_hv_int = true;
if (motg->host_bus_suspend || motg->device_bus_suspend)
dp_dm_hv_int = true;
if (!bsv_id_hv_int &... |
functions | void msm_otg_disable_phy_hv_int(struct msm_otg *motg)
{
bool bsv_id_hv_int = false;
bool dp_dm_hv_int = false;
u32 val;
if (motg->pdata->otg_control == OTG_PHY_CONTROL ||
motg->phy_irq)
bsv_id_hv_int = true;
if (motg->host_bus_suspend || motg->device_bus_suspend)
dp_dm_hv_int = true;
if (!bsv_id_hv_int ... |
functions | void msm_otg_enter_phy_retention(struct msm_otg *motg)
{
u32 val;
switch (motg->pdata->phy_type) {
case SNPS_PICO_PHY:
val = readl_relaxed(motg->usb_phy_ctrl_reg);
val &= ~PHY_RETEN;
writel_relaxed(val, motg->usb_phy_ctrl_reg);
break;
case SNPS_FEMTO_PHY:
/* Retention is supported via SIDDQ */
val = re... |
functions | void msm_otg_exit_phy_retention(struct msm_otg *motg)
{
int val;
switch (motg->pdata->phy_type) {
case SNPS_PICO_PHY:
val = readl_relaxed(motg->usb_phy_ctrl_reg);
val |= PHY_RETEN;
writel_relaxed(val, motg->usb_phy_ctrl_reg);
break;
case SNPS_FEMTO_PHY:
/*
* It is required to do USB block reset to bri... |
functions | irqreturn_t msm_otg_phy_irq_handler(int irq, void *data)
{
struct msm_otg *motg = data;
msm_otg_dbg_log_event(&motg->phy, "PHY ID IRQ",
atomic_read(&motg->in_lpm), motg->phy.state);
if (atomic_read(&motg->in_lpm)) {
pr_debug("PHY ID IRQ in LPM\n");
motg->phy_irq_pending = true;
if (!atomic_read(&motg->pm_s... |
functions | int msm_otg_suspend(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
struct usb_bus *bus = phy->otg->host;
struct msm_otg_platform_data *pdata = motg->pdata;
int cnt;
bool host_bus_suspend, device_bus_suspend, dcp, prop_charger;
bool floated_charger, sm_work_busy;
u32 cmd_val;
u32 portsc, config2;
u32... |
functions | else if (motg->caps & ALLOW_PHY_REGULATORS_LPM &&
!host_bus_suspend && !device_bus_suspend && !dcp) {
msm_hsusb_ldo_enable(motg, USB_PHY_REG_LPM_ON);
motg->lpm_flags |= PHY_REGULATORS_LPM;
} |
functions | int msm_otg_resume(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
struct usb_bus *bus = phy->otg->host;
struct usb_hcd *hcd = bus_to_hcd(phy->otg->host);
struct msm_otg_platform_data *pdata = motg->pdata;
int cnt = 0;
unsigned temp;
unsigned ret;
bool in_device_mode;
bool bus_is_suspended;
bool is_... |
functions | else if (motg->lpm_flags & PHY_REGULATORS_LPM) {
msm_hsusb_ldo_enable(motg, USB_PHY_REG_LPM_OFF);
motg->lpm_flags &= ~PHY_REGULATORS_LPM;
} |
functions | else if (motg->device_bus_suspend) {
msm_otg_disable_phy_hv_int(motg);
} |
functions | void msm_otg_notify_host_mode(struct msm_otg *motg, bool host_mode)
{
if (!psy) {
pr_err("No USB power supply registered!\n");
return;
} |
functions | int msm_otg_notify_chg_type(struct msm_otg *motg)
{
static int charger_type;
/*
* TODO
* Unify OTG driver charger types and power supply charger types
*/
if (charger_type == motg->chg_type)
return 0;
if (motg->chg_type == USB_SDP_CHARGER)
charger_type = POWER_SUPPLY_TYPE_USB;
else if (motg->chg_type ==... |
functions | int msm_otg_notify_power_supply(struct msm_otg *motg, unsigned mA)
{
if (!psy) {
dev_dbg(motg->phy.dev, "no usb power supply registered\n");
goto psy_error;
} |
functions | void msm_otg_set_online_status(struct msm_otg *motg)
{
if (!psy) {
dev_dbg(motg->phy.dev, "no usb power supply registered\n");
return;
} |
functions | void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA)
{
struct usb_gadget *g = motg->phy.otg->gadget;
if (g && g->is_a_peripheral)
return;
if ((motg->chg_type == USB_ACA_DOCK_CHARGER ||
motg->chg_type == USB_ACA_A_CHARGER ||
motg->chg_type == USB_ACA_B_CHARGER ||
motg->chg_type == USB_ACA_C_CHARGE... |
functions | int msm_otg_set_power(struct usb_phy *phy, unsigned mA)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
/*
* Gadget driver uses set_power method to notify about the
* available current based on suspend/configured states.
*
* IDEV_CHG can be drawn irrespective of suspend/un-configured
* sta... |
functions | void msm_otg_start_host(struct usb_otg *otg, int on)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
struct msm_otg_platform_data *pdata = motg->pdata;
struct usb_hcd *hcd;
u32 val;
if (!otg->host)
return;
hcd = bus_to_hcd(otg->host);
if (on) {
dev_dbg(otg->phy->dev, "host on\n");
... |
functions | int msm_otg_usbdev_notify(struct notifier_block *self,
unsigned long action, void *priv)
{
struct msm_otg *motg = container_of(self, struct msm_otg, usbdev_nb);
struct usb_otg *otg = motg->phy.otg;
struct usb_device *udev = priv;
if (action == USB_BUS_ADD || action == USB_BUS_REMOVE)
goto out;
if (udev->bus... |
functions | void msm_hsusb_vbus_power(struct msm_otg *motg, bool on)
{
int ret;
static bool vbus_is_on;
msm_otg_dbg_log_event(&motg->phy, "VBUS POWER", on, vbus_is_on);
if (vbus_is_on == on)
return;
if (motg->pdata->vbus_power) {
ret = motg->pdata->vbus_power(on);
if (!ret)
vbus_is_on = on;
return;
} |
functions | int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
struct usb_hcd *hcd;
/*
* Fail host registration if this board can support
* only peripheral configuration.
*/
if (motg->pdata->mode == USB_PERIPHERAL) {
dev_info(otg->phy->... |
functions | void msm_otg_start_peripheral(struct usb_otg *otg, int on)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
struct msm_otg_platform_data *pdata = motg->pdata;
struct pinctrl_state *set_state;
int ret;
if (!otg->gadget)
return;
if (on) {
dev_dbg(otg->phy->dev, "gadget on\n");
msm_otg_d... |
functions | int msm_otg_set_peripheral(struct usb_otg *otg,
struct usb_gadget *gadget)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
/*
* Fail peripheral registration if this board can support
* only host configuration.
*/
if (motg->pdata->mode == USB_HOST) {
dev_info(otg->phy->dev, "Periph... |
functions | bool msm_otg_read_pmic_id_state(struct msm_otg *motg)
{
unsigned long flags;
int id;
if (!motg->pdata->pmic_id_irq)
return -ENODEV;
local_irq_save(flags);
id = irq_read_line(motg->pdata->pmic_id_irq);
local_irq_restore(flags);
/*
* If we can not read ID line state for some reason, treat
* it as float. T... |
functions | bool msm_otg_read_phy_id_state(struct msm_otg *motg)
{
u8 val;
/*
* clear the pending/outstanding interrupts and
* read the ID status from the SRC_STATUS register.
*/
writeb_relaxed(USB_PHY_ID_MASK, USB2_PHY_USB_PHY_INTERRUPT_CLEAR1);
writeb_relaxed(0x1, USB2_PHY_USB_PHY_IRQ_CMD);
/*
* Databook says 200 ... |
functions | void msm_otg_mhl_notify_online(int on)
{
struct msm_otg *motg = the_msm_otg;
struct usb_phy *phy = &motg->phy;
bool queue = false;
dev_dbg(phy->dev, "notify MHL %s%s\n", on ? "" : "dis", "connected");
if (on) {
set_bit(MHL, &motg->inputs);
} |
functions | bool msm_otg_is_mhl(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
int is_mhl, ret;
ret = mhl_device_discovery(motg->pdata->mhl_dev_name, &is_mhl);
if (ret || is_mhl != MHL_DISCOVERY_RESULT_MHL) {
/*
* MHL driver calls our callback saying that MHL connected
* if RID_GND is detected. But at late... |
functions | bool msm_chg_mhl_detect(struct msm_otg *motg)
{
bool ret, id;
if (!motg->mhl_enabled)
return false;
id = msm_otg_read_pmic_id_state(motg);
if (id)
return false;
mhl_det_in_progress = true;
ret = msm_otg_is_mhl(motg);
mhl_det_in_progress = false;
return ret;
} |
functions | void msm_otg_chg_check_timer_func(unsigned long data)
{
struct msm_otg *motg = (struct msm_otg *) data;
struct usb_otg *otg = motg->phy.otg;
if (atomic_read(&motg->in_lpm) ||
!test_bit(B_SESS_VLD, &motg->inputs) ||
otg->phy->state != OTG_STATE_B_PERIPHERAL ||
otg->gadget->speed != USB_SPEED_UNKNOWN) {
dev_d... |
functions | bool msm_chg_aca_detect(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
u32 int_sts;
bool ret = false;
if (!aca_enabled())
goto out;
int_sts = ulpi_read(phy, 0x87);
switch (int_sts & 0x1C) {
case 0x08:
if (!test_and_set_bit(ID_A, &motg->inputs)) {
dev_dbg(phy->dev, "ID_A\n");
motg->chg_type... |
functions | void msm_chg_enable_aca_det(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
if (!aca_enabled())
return;
switch (motg->pdata->phy_type) {
case SNPS_PICO_PHY:
/* Disable ID_GND in link and PHY */
writel_relaxed(readl_relaxed(USB_OTGSC) & ~(OTGSC_IDPU |
OTGSC_IDIE), USB_OTGSC);
ulpi_write(phy, ... |
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