type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
functions | void EPWM_DisableZeroInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->INTEN0 &= ~((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum);
} |
functions | void EPWM_ClearZeroIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->INTSTS0 = ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum);
} |
functions | uint32_t EPWM_GetZeroIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
{
return ((((epwm)->INTSTS0 & ((1UL << EPWM_INTEN0_ZIEN0_Pos) << u32ChannelNum))) ? 1UL : 0UL);
} |
functions | void EPWM_EnableAcc(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32IntFlagCnt, uint32_t u32IntAccSrc)
{
(epwm)->IFA[u32ChannelNum] = (((epwm)->IFA[u32ChannelNum] & ~((EPWM_IFA0_IFACNT_Msk | EPWM_IFA0_IFASEL_Msk))) | \
(EPWM_IFA0_IFAEN_Msk | (u32IntAccSrc << EPWM_IFA0_IFASEL_Pos)... |
functions | void EPWM_DisableAcc(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->IFA[u32ChannelNum] = ((epwm)->IFA[u32ChannelNum] & ~(EPWM_IFA0_IFAEN_Msk));
} |
functions | void EPWM_EnableAccInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->AINTEN |= (1UL << (u32ChannelNum));
} |
functions | void EPWM_DisableAccInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->AINTEN &= ~(1UL << (u32ChannelNum));
} |
functions | void EPWM_ClearAccInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->AINTSTS = (1UL << (u32ChannelNum));
} |
functions | uint32_t EPWM_GetAccInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
return (((epwm)->AINTSTS & (1UL << (u32ChannelNum))) ? 1UL : 0UL);
} |
functions | void EPWM_EnableAccPDMA(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->APDMACTL |= (1UL << (u32ChannelNum));
} |
functions | void EPWM_DisableAccPDMA(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->APDMACTL &= ~(1UL << (u32ChannelNum));
} |
functions | void EPWM_EnableAccStopMode(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->IFA[u32ChannelNum] |= EPWM_IFA0_STPMOD_Msk;
} |
functions | void EPWM_DisableAccStopMode(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->IFA[u32ChannelNum] &= ~EPWM_IFA0_STPMOD_Msk;
} |
functions | void EPWM_ClearFTDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FTCI = ((EPWM_FTCI_FTCMU0_Msk | EPWM_FTCI_FTCMD0_Msk) << (u32ChannelNum >> 1U));
} |
functions | uint32_t EPWM_GetFTDutyIntFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
{
return (((epwm)->FTCI & ((EPWM_FTCI_FTCMU0_Msk | EPWM_FTCI_FTCMD0_Msk) << (u32ChannelNum >> 1U))) ? 1UL : 0UL);
} |
functions | void EPWM_EnableLoadMode(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32LoadMode)
{
(epwm)->CTL0 |= (u32LoadMode << u32ChannelNum);
} |
functions | void EPWM_DisableLoadMode(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32LoadMode)
{
(epwm)->CTL0 &= ~(u32LoadMode << u32ChannelNum);
} |
functions | void EPWM_ConfigSyncPhase(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32SyncSrc, uint32_t u32Direction, uint32_t u32StartPhase)
{
/* every two channels shares the same setting */
u32ChannelNum >>= 1U;
(epwm)->SYNC = (((epwm)->SYNC & ~(((3UL << EPWM_SYNC_SINSRC0_Pos) << (u32ChannelNum << 1U)) | ((1UL << ... |
functions | void EPWM_EnableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask)
{
uint32_t i;
for(i = 0U; i < EPWM_CHANNEL_NUM; i ++)
{
if(u32ChannelMask & (1UL << i))
{
(epwm)->SYNC |= ((1UL << EPWM_SYNC_PHSEN0_Pos) << (i >> 1U));
} |
functions | void EPWM_DisableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask)
{
uint32_t i;
for(i = 0U; i < EPWM_CHANNEL_NUM; i ++)
{
if(u32ChannelMask & (1UL << i))
{
(epwm)->SYNC &= ~((1UL << EPWM_SYNC_PHSEN0_Pos) << (i >> 1U));
} |
functions | void EPWM_EnableSyncNoiseFilter(EPWM_T *epwm, uint32_t u32ClkCnt, uint32_t u32ClkDivSel)
{
(epwm)->SYNC = ((epwm)->SYNC & ~(EPWM_SYNC_SFLTCNT_Msk | EPWM_SYNC_SFLTCSEL_Msk)) | \
((u32ClkCnt << EPWM_SYNC_SFLTCNT_Pos) | (u32ClkDivSel << EPWM_SYNC_SFLTCSEL_Pos) | EPWM_SYNC_SNFLTEN_Msk);
} |
functions | void EPWM_DisableSyncNoiseFilter(EPWM_T *epwm)
{
(epwm)->SYNC &= ~EPWM_SYNC_SNFLTEN_Msk;
} |
functions | void EPWM_EnableSyncPinInverse(EPWM_T *epwm)
{
(epwm)->SYNC |= EPWM_SYNC_SINPINV_Msk;
} |
functions | void EPWM_DisableSyncPinInverse(EPWM_T *epwm)
{
(epwm)->SYNC &= (~EPWM_SYNC_SINPINV_Msk);
} |
functions | void EPWM_SetClockSource(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel)
{
(epwm)->CLKSRC = ((epwm)->CLKSRC & ~(EPWM_CLKSRC_ECLKSRC0_Msk << ((u32ChannelNum >> 1U) << 3U))) | \
(u32ClkSrcSel << ((u32ChannelNum >> 1U) << 3U));
} |
functions | void EPWM_EnableBrakeNoiseFilter(EPWM_T *epwm, uint32_t u32BrakePinNum, uint32_t u32ClkCnt, uint32_t u32ClkDivSel)
{
(epwm)->BNF = ((epwm)->BNF & ~((EPWM_BNF_BRK0FCNT_Msk | EPWM_BNF_BRK0NFSEL_Msk) << (u32BrakePinNum << 3U))) | \
(((u32ClkCnt << EPWM_BNF_BRK0FCNT_Pos) | (u32ClkDivSel << EPWM_BNF_BR... |
functions | void EPWM_DisableBrakeNoiseFilter(EPWM_T *epwm, uint32_t u32BrakePinNum)
{
(epwm)->BNF &= ~(EPWM_BNF_BRK0NFEN_Msk << (u32BrakePinNum << 3U));
} |
functions | void EPWM_EnableBrakePinInverse(EPWM_T *epwm, uint32_t u32BrakePinNum)
{
(epwm)->BNF |= (EPWM_BNF_BRK0PINV_Msk << (u32BrakePinNum << 3U));
} |
functions | void EPWM_DisableBrakePinInverse(EPWM_T *epwm, uint32_t u32BrakePinNum)
{
(epwm)->BNF &= ~(EPWM_BNF_BRK0PINV_Msk << (u32BrakePinNum * (uint32_t)EPWM_BNF_BRK1NFEN_Pos));
} |
functions | void EPWM_SetBrakePinSource(EPWM_T *epwm, uint32_t u32BrakePinNum, uint32_t u32SelAnotherModule)
{
(epwm)->BNF = ((epwm)->BNF & ~(EPWM_BNF_BK0SRC_Msk << (u32BrakePinNum << 3U))) | (u32SelAnotherModule << ((uint32_t)EPWM_BNF_BK0SRC_Pos + (u32BrakePinNum << 3U)));
} |
functions | void EPWM_SetLeadingEdgeBlanking(EPWM_T *epwm, uint32_t u32TrigSrcSel, uint32_t u32TrigType, uint32_t u32BlankingCnt, uint32_t u32BlankingEnable)
{
(epwm)->LEBCTL = (u32TrigType) | (u32TrigSrcSel) | (u32BlankingEnable);
/* Blanking window size = LEBCNT + 1, so LEBCNT = u32BlankingCnt - 1 */
(epwm)->LEBCNT =... |
functions | uint32_t EPWM_GetWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
{
return (((epwm)->STATUS & (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum)) ? 1UL : 0UL);
} |
functions | void EPWM_ClearWrapAroundFlag(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->STATUS = (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum);
} |
functions | void EPWM_EnableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32AfterPrescaler, uint32_t u32ClkSel)
{
(epwm)->FDEN = ((epwm)->FDEN & ~(EPWM_FDEN_FDCKS0_Msk << (u32ChannelNum))) | \
((EPWM_FDEN_FDEN0_Msk | ((u32AfterPrescaler) << EPWM_FDEN_FDCKS0_Pos)) << (u32ChannelNum));
(epwm)... |
functions | void EPWM_DisableFaultDetect(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDEN &= ~(EPWM_FDEN_FDEN0_Msk << (u32ChannelNum));
} |
functions | void EPWM_EnableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDEN &= ~(EPWM_FDEN_FDODIS0_Msk << (u32ChannelNum));
} |
functions | void EPWM_DisableFaultDetectOutput(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDEN |= (EPWM_FDEN_FDODIS0_Msk << (u32ChannelNum));
} |
functions | void EPWM_EnableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32DeglitchSmpCycle)
{
(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & (~EPWM_FDCTL0_DGSMPCYC_Msk)) | \
(EPWM_FDCTL0_FDDGEN_Msk | ((u32DeglitchSmpCycle) << EPWM_FDCTL0_DGSMPCYC... |
functions | void EPWM_DisableFaultDetectDeglitch(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDCTL[(u32ChannelNum)] &= ~EPWM_FDCTL0_FDDGEN_Msk;
} |
functions | void EPWM_EnableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32MaskCnt)
{
(epwm)->FDCTL[(u32ChannelNum)] = ((epwm)->FDCTL[(u32ChannelNum)] & (~EPWM_FDCTL0_TRMSKCNT_Msk)) | (EPWM_FDCTL0_FDMSKEN_Msk | (u32MaskCnt));
} |
functions | void EPWM_DisableFaultDetectMask(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDCTL[(u32ChannelNum)] &= ~EPWM_FDCTL0_FDMSKEN_Msk;
} |
functions | void EPWM_EnableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDIEN |= (EPWM_FDIEN_FDIEN0_Msk << (u32ChannelNum));
} |
functions | void EPWM_DisableFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDIEN &= ~(EPWM_FDIEN_FDIEN0_Msk << (u32ChannelNum));
} |
functions | void EPWM_ClearFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
(epwm)->FDSTS = (EPWM_FDSTS_FDIF0_Msk << (u32ChannelNum));
} |
functions | uint32_t EPWM_GetFaultDetectInt(EPWM_T *epwm, uint32_t u32ChannelNum)
{
return (((epwm)->FDSTS & (EPWM_FDSTS_FDIF0_Msk << (u32ChannelNum))) ? 1UL : 0UL);
} |
defines |
#define R 0 |
defines | #define G 1 |
defines | #define B 2 |
defines | #define A 3 |
defines |
#define Y 0 |
defines | #define U 1 |
defines | #define V 2 |
defines |
#define FADE_IN 0 |
defines | #define FADE_OUT 1 |
defines | #define INTERP(c_name, c_idx) av_clip_uint8(((c[c_idx]<<16) + ((int)p[c_name] - (int)c[c_idx]) * s->factor + (1<<15)) >> 16) |
defines |
#define OFFSET(x) offsetof(FadeContext, x) |
defines | #define FLAGS AV_OPT_FLAG_VIDEO_PARAM|AV_OPT_FLAG_FILTERING_PARAM |
functions | int init(AVFilterContext *ctx)
{
FadeContext *s = ctx->priv;
s->fade_per_frame = (1 << 16) / s->nb_frames;
s->fade_state = VF_FADE_WAITING;
if (s->duration != 0) {
// If duration (seconds) is non-zero, assume that we are not fading based on frames
s->nb_frames = 0; // Mostly to clean u... |
functions | log
if (s->start_frame || s->nb_frames) {
av_log(ctx, AV_LOG_VERBOSE,
"type:%s start_frame:%d nb_frames:%d alpha:%d\n",
s->type == FADE_IN ? "in" : "out", s->start_frame,
s->nb_frames,s->alpha);
} |
functions | int query_formats(AVFilterContext *ctx)
{
const FadeContext *s = ctx->priv;
static const enum AVPixelFormat pix_fmts[] = {
AV_PIX_FMT_YUV444P, AV_PIX_FMT_YUV422P, AV_PIX_FMT_YUV420P,
AV_PIX_FMT_YUV411P, AV_PIX_FMT_YUV410P,
AV_PIX_FMT_YUVJ444P, AV_PIX_FMT_YUVJ422P, AV_PIX_FMT_YUVJ420P,... |
functions | int config_props(AVFilterLink *inlink)
{
FadeContext *s = inlink->dst->priv;
const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(inlink->format);
s->hsub = pixdesc->log2_chroma_w;
s->vsub = pixdesc->log2_chroma_h;
s->bpp = pixdesc->flags & AV_PIX_FMT_FLAG_PLANAR ?
1 :
... |
functions | void filter_rgb(FadeContext *s, const AVFrame *frame,
int slice_start, int slice_end,
int do_alpha, int step)
{
int i, j;
const uint8_t r_idx = s->rgba_map[R];
const uint8_t g_idx = s->rgba_map[G];
const uint8_t b_idx = s... |
functions | int filter_slice_rgb(AVFilterContext *ctx, void *arg, int jobnr,
int nb_jobs)
{
FadeContext *s = ctx->priv;
AVFrame *frame = arg;
int slice_start = (frame->height * jobnr ) / nb_jobs;
int slice_end = (frame->height * (jobnr+1)) / nb_jobs;
if (s->alpha) filte... |
functions | int filter_slice_luma(AVFilterContext *ctx, void *arg, int jobnr,
int nb_jobs)
{
FadeContext *s = ctx->priv;
AVFrame *frame = arg;
int slice_start = (frame->height * jobnr ) / nb_jobs;
int slice_end = (frame->height * (jobnr+1)) / nb_jobs;
int i, j;
for (i = sl... |
functions | int filter_slice_chroma(AVFilterContext *ctx, void *arg, int jobnr,
int nb_jobs)
{
FadeContext *s = ctx->priv;
AVFrame *frame = arg;
int i, j, plane;
const int width = FF_CEIL_RSHIFT(frame->width, s->hsub);
const int height= FF_CEIL_RSHIFT(frame->height, s->vsub);
... |
functions | int filter_slice_alpha(AVFilterContext *ctx, void *arg, int jobnr,
int nb_jobs)
{
FadeContext *s = ctx->priv;
AVFrame *frame = arg;
int plane = s->is_packed_rgb ? 0 : A;
int slice_start = (frame->height * jobnr ) / nb_jobs;
int slice_end = (frame->height * (jobnr+1... |
functions | int filter_frame(AVFilterLink *inlink, AVFrame *frame)
{
AVFilterContext *ctx = inlink->dst;
FadeContext *s = ctx->priv;
double frame_timestamp = frame->pts == AV_NOPTS_VALUE ? -1 : frame->pts * av_q2d(inlink->time_base);
// Calculate Fade assuming this is a Fade In
if (s->fade_state == VF_FA... |
functions | frames
if (s->start_time != 0 && s->start_frame == 0) {
s->start_frame = inlink->frame_count;
} |
functions | Out
if (s->type == FADE_OUT) {
s->factor=UINT16_MAX-s->factor;
} |
functions | else if (s->is_packed_rgb && !s->black_fade) {
ctx->internal->execute(ctx, filter_slice_rgb, frame, NULL,
FFMIN(frame->height, ctx->graph->nb_threads));
} |
includes |
#include <linux/init.h> |
includes | #include <linux/sched.h> |
includes | #include <linux/irq.h> |
includes | #include <linux/kernel_stat.h> |
includes | #include <linux/module.h> |
includes |
#include <asm/machvec.h> |
includes | #include <asm/dma.h> |
defines | #define MCHK_K_TPERR 0x0080 |
defines | #define MCHK_K_TCPERR 0x0082 |
defines | #define MCHK_K_HERR 0x0084 |
defines | #define MCHK_K_ECC_C 0x0086 |
defines | #define MCHK_K_ECC_NC 0x0088 |
defines | #define MCHK_K_OS_BUGCHECK 0x008A |
defines | #define MCHK_K_PAL_BUGCHECK 0x0090 |
functions | void
dummy_perf(unsigned long vector, struct pt_regs *regs)
{
irq_err_count++;
printk(KERN_CRIT "Performance counter interrupt!\n");
} |
functions | void
do_entInt(unsigned long type, unsigned long vector,
unsigned long la_ptr, struct pt_regs *regs)
{
struct pt_regs *old_regs;
switch (type) {
case 0:
#ifdef CONFIG_SMP
handle_ipi(regs);
return;
#else
irq_err_count++;
printk(KERN_CRIT "Interprocessor interrupt? "
"You must be kidding!\n");
#en... |
functions | __init
common_init_isa_dma(void)
{
outb(0, DMA1_RESET_REG);
outb(0, DMA2_RESET_REG);
outb(0, DMA1_CLR_MASK_REG);
outb(0, DMA2_CLR_MASK_REG);
} |
functions | __init
init_IRQ(void)
{
/* Just in case the platform init_irq() causes interrupts/mchecks
(as is the case with RAWHIDE, at least). */
wrent(entInt, 0);
alpha_mv.init_irq();
} |
functions | void
process_mcheck_info(unsigned long vector, unsigned long la_ptr,
const char *machine, int expected)
{
struct el_common *mchk_header;
const char *reason;
/*
* See if the machine check is due to a badaddr() and if so,
* ignore it.
*/
#ifdef CONFIG_VERBOSE_MCHECK
if (alpha_verbose_mcheck > 1) {
pri... |
functions | endif
if (expected) {
int cpu = smp_processor_id();
mcheck_expected(cpu) = 0;
mcheck_taken(cpu) = 1;
return;
} |
functions | CONFIG_VERBOSE_MCHECK
if (alpha_verbose_mcheck > 1) {
/* Dump the logout area to give all info. */
unsigned long *ptr = (unsigned long *)la_ptr;
long i;
for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
printk(KERN_CRIT " +%8lx %016lx %016lx\n",
i*sizeof(long), ptr[i], ptr[i+1]);
} |
functions | void rtc_enable_disable(unsigned int irq) { } |
functions | int rtc_startup(unsigned int irq) { return 0; } |
functions | __init
init_rtc_irq(void)
{
irq_desc[RTC_IRQ].status = IRQ_DISABLED;
irq_desc[RTC_IRQ].chip = &rtc_irq_type;
setup_irq(RTC_IRQ, &timer_irqaction);
} |
includes |
#include <sys/errno.h> |
includes | #include <sys/cpuvar.h> |
includes | #include <sys/stat.h> |
includes | #include <sys/modctl.h> |
includes | #include <sys/cmn_err.h> |
includes | #include <sys/ddi.h> |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.