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Datasets:
architect-ubc-capstone
/
rtl-augmented-v3
like
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ubc-capstone
5
Tasks:
Text Generation
Size:
1K<n<10K
Tags:
rtl
verilog
bug-fix
sft
License:
mit
Dataset card
Files
Files and versions
xet
Community
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main
rtl-augmented-v3
/
nimanaqavi_Verilog-MathFunctions
88.2 kB
4 contributors
History:
7 commits
AveryWong03
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eaf9351
verified
2 months ago
candidates
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2 months ago
source
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sim_script_map.json
70 Bytes
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simulations.jsonl
476 Bytes
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testbenches.json
768 Bytes
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waveform_map.json
72 Bytes
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2 months ago
