hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
a0db62ab01fdf6eee8107527e1df8317fef66029 | 1,666 | asm | Assembly | smsq/q40/cachemode_init.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/q40/cachemode_init.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/q40/cachemode_init.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; Q60 cachemodes 1.00 (wl)
; 2005-01-21 1.01 pre-configure to serialized & use config info really (wl)
section init
include 'dev8_keys_qdos_sms'
include 'dev8_keys_qdos_ioa'
include 'dev8_keys_sys'
include 'dev8_keys_qlv'
include 'dev8_mac_config02'
include 'dev8_mac_proc'
xref copyback
xref serialized
xref writethrough
xref smsq_end
section header
qx0c_vers equ '1.01'
header_base
dc.l qx0c_base-header_base ; length of header
dc.l 0 ; module length unknown
dc.l smsq_end-qx0c_base ; loaded length
dc.l 0 ; checksum
dc.l 0 ; always select
dc.b 0 ; main level
dc.b 0
dc.w smsq_name-*
smsq_name
dc.w smsq_name2-*-2,'Initialise Q40/Q60 Cache modes '
smsq_name2
dc.l qx0c_vers
dc.w $200a
xref.l smsq_vers
mkcfhead {Cache Mode},{smsq_vers}
mkcfitem 'OS60',code,'I',qx0c_cf,,,\
{Initial Cache mode}\
1,S,{Serialized = Cache OFF},2,W,{Writethrough},3,C,{Copyback}
mkcfend
ds.w 0
section base
qx0c_base
lea procs,a1 ; procedures
move.w sb.inipr,a2
jsr (a2) ; link them in
lea qx0c_cf(pc),a2
move.b (a2),d0 ; preconfigured cache mode
subq.b #1,d0 ; is it serialized?
bne.s qx0c_ns ; no ->...
lea serialized(pc),a2
bra.s qx0c_end
qx0c_ns subq.b #1,d0 ; is it writethrough?
bne.s qx0c_nw ; no->...
lea writethrough(pc),a2
bra.s qx0c_end
qx0c_nw lea copyback(pc),a2 ; copyback is default
qx0c_end
movem.l a3/a5,-(a7)
move.l a3,a5
jsr (a2) ; set cache mode now
movem.l (a7)+,a3/a5
moveq #0,d0 ; always return w/o error
rts
qx0c_cf dc.b 1,1
procs
proc_stt
proc_def COPYBACK
proc_def WRITETHROUGH
proc_def SERIALIZED
proc_end
proc_stt
proc_end
end
| 18.931818 | 76 | 0.698079 |
1cc1c1baa65fa52e4064c4fce6e6ef20b83a4575 | 7,328 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_34_1118.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_34_1118.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_34_1118.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1b608, %rdx
nop
cmp %rbx, %rbx
mov $0x6162636465666768, %rax
movq %rax, (%rdx)
nop
nop
nop
nop
xor %rbp, %rbp
lea addresses_WC_ht+0x8ec8, %rdi
nop
xor $7764, %r15
mov (%rdi), %edx
nop
add $2108, %rdi
lea addresses_WC_ht+0xf248, %r15
nop
nop
dec %r10
mov (%r15), %rbx
nop
nop
nop
nop
nop
add %r10, %r10
lea addresses_WC_ht+0x15f48, %rsi
lea addresses_WC_ht+0x14a48, %rdi
nop
sub %rbp, %rbp
mov $13, %rcx
rep movsl
nop
nop
nop
xor $2182, %r15
lea addresses_normal_ht+0x1e728, %rsi
lea addresses_WC_ht+0x7848, %rdi
nop
nop
cmp $14578, %r15
mov $18, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp $17918, %rsi
lea addresses_WC_ht+0xad70, %rbp
nop
nop
nop
nop
and $3621, %rax
mov (%rbp), %rbx
nop
and $12133, %rcx
lea addresses_UC_ht+0x1e648, %rsi
nop
nop
add %rdx, %rdx
vmovups (%rsi), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $0, %xmm2, %r15
nop
nop
nop
and %rdx, %rdx
lea addresses_normal_ht+0x1ca48, %rbp
nop
nop
nop
nop
nop
cmp $3696, %rbx
mov $0x6162636465666768, %rax
movq %rax, (%rbp)
nop
nop
nop
nop
inc %rcx
lea addresses_WT_ht+0xd6a0, %rax
nop
nop
nop
nop
add $6992, %rsi
mov $0x6162636465666768, %r15
movq %r15, %xmm4
vmovups %ymm4, (%rax)
nop
nop
nop
nop
nop
cmp %rdi, %rdi
lea addresses_normal_ht+0x15148, %rdi
nop
nop
sub $58441, %rdx
movb (%rdi), %r10b
nop
xor %rsi, %rsi
lea addresses_WT_ht+0x19b28, %rsi
lea addresses_A_ht+0x15a48, %rdi
nop
nop
add $1238, %rax
mov $17, %rcx
rep movsb
nop
nop
nop
nop
dec %rdi
lea addresses_A_ht+0x9a48, %rdx
inc %rcx
mov $0x6162636465666768, %rdi
movq %rdi, %xmm0
movups %xmm0, (%rdx)
nop
nop
nop
nop
and %rdx, %rdx
lea addresses_WC_ht+0xc348, %rsi
lea addresses_WT_ht+0x3248, %rdi
nop
add $24341, %rdx
mov $116, %rcx
rep movsb
nop
xor %rbp, %rbp
lea addresses_UC_ht+0x138d4, %r10
nop
nop
nop
xor $52771, %rcx
movl $0x61626364, (%r10)
nop
nop
nop
nop
and %r15, %r15
lea addresses_WC_ht+0x5448, %rsi
lea addresses_D_ht+0x19048, %rdi
clflush (%rdi)
add %r15, %r15
mov $112, %rcx
rep movsb
nop
nop
nop
nop
nop
cmp %rbp, %rbp
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r8
push %rbp
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_WC+0x11748, %rsi
lea addresses_WC+0x15d48, %rdi
clflush (%rsi)
nop
nop
xor $49153, %rbp
mov $86, %rcx
rep movsq
nop
nop
nop
xor %r11, %r11
// Store
mov $0x248, %r10
clflush (%r10)
nop
nop
nop
nop
nop
sub %rsi, %rsi
movl $0x51525354, (%r10)
nop
and $20821, %r10
// Store
lea addresses_WT+0xd248, %r10
and %r8, %r8
movw $0x5152, (%r10)
nop
inc %rdi
// Store
lea addresses_A+0x1f248, %rdi
nop
nop
nop
nop
add $14633, %rbp
movb $0x51, (%rdi)
nop
nop
nop
nop
nop
xor %rbp, %rbp
// Store
lea addresses_D+0xee48, %r10
nop
nop
nop
sub %r8, %r8
mov $0x5152535455565758, %rcx
movq %rcx, %xmm5
movups %xmm5, (%r10)
nop
nop
nop
cmp $61122, %rbp
// Store
lea addresses_A+0x11d9c, %rdi
clflush (%rdi)
nop
nop
nop
and $31343, %rcx
mov $0x5152535455565758, %rbp
movq %rbp, %xmm7
vmovups %ymm7, (%rdi)
nop
nop
nop
xor $58164, %rbp
// Store
lea addresses_WT+0xc248, %rdi
nop
and $18542, %rbp
movb $0x51, (%rdi)
nop
nop
nop
nop
xor $40208, %r8
// Store
lea addresses_WT+0x166c8, %rsi
nop
nop
nop
nop
and $24336, %rcx
mov $0x5152535455565758, %rbp
movq %rbp, %xmm4
vmovups %ymm4, (%rsi)
nop
nop
nop
nop
nop
inc %rcx
// Store
lea addresses_normal+0x15127, %r10
nop
and %r8, %r8
movw $0x5152, (%r10)
nop
nop
and %r10, %r10
// Faulty Load
lea addresses_A+0x1f248, %rbp
add %rcx, %rcx
mov (%rbp), %r10d
lea oracles, %rdi
and $0xff, %r10
shlq $12, %r10
mov (%rdi,%r10,1), %r10
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_WC', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': True, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}}
{'51': 34}
51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
*/
| 20.469274 | 152 | 0.647789 |
7aaf1831af6acb6627ca99461d1e9b8539ff0f2a | 6,304 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_42.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_42.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_42.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x53c8, %rdi
clflush (%rdi)
nop
xor %rsi, %rsi
movl $0x61626364, (%rdi)
nop
nop
cmp $5121, %rbx
lea addresses_UC_ht+0x182d2, %rcx
nop
lfence
mov $0x6162636465666768, %r10
movq %r10, (%rcx)
nop
nop
nop
sub %rdi, %rdi
lea addresses_WC_ht+0xb3c8, %rsi
lea addresses_UC_ht+0x113d0, %rdi
clflush (%rsi)
nop
nop
nop
sub $50396, %rdx
mov $58, %rcx
rep movsb
nop
nop
nop
nop
sub %r11, %r11
lea addresses_D_ht+0xd3c8, %rsi
lea addresses_D_ht+0x1bc8, %rdi
nop
nop
nop
nop
nop
dec %rax
mov $52, %rcx
rep movsq
and $54055, %r10
lea addresses_D_ht+0x1a838, %rsi
lea addresses_UC_ht+0x3040, %rdi
nop
add %rbx, %rbx
mov $66, %rcx
rep movsq
inc %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r9
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
// Store
lea addresses_UC+0x9fc8, %rbp
nop
nop
xor %rdx, %rdx
mov $0x5152535455565758, %rsi
movq %rsi, (%rbp)
nop
nop
nop
add $56368, %rbp
// REPMOV
lea addresses_D+0x1a3c8, %rsi
mov $0xa08, %rdi
nop
nop
and %rdx, %rdx
mov $3, %rcx
rep movsq
nop
nop
nop
nop
add $23590, %rcx
// Store
lea addresses_D+0x6848, %rdi
nop
nop
nop
xor %r9, %r9
mov $0x5152535455565758, %r10
movq %r10, (%rdi)
nop
nop
nop
nop
sub %r9, %r9
// Store
lea addresses_normal+0x59b7, %rdi
and %rbp, %rbp
mov $0x5152535455565758, %rsi
movq %rsi, %xmm6
movups %xmm6, (%rdi)
nop
nop
xor $18890, %rdx
// Faulty Load
lea addresses_D+0x1a3c8, %rsi
clflush (%rsi)
nop
nop
and $48443, %rbp
movb (%rsi), %dl
lea oracles, %r10
and $0xff, %rdx
shlq $12, %rdx
mov (%r10,%rdx,1), %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_D', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_UC', 'size': 8, 'AVXalign': False}}
{'src': {'type': 'addresses_D', 'congruent': 0, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_P', 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_D', 'size': 8, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 16, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_D', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'congruent': 1, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 37.301775 | 2,999 | 0.657836 |
f150abe82e2bb548070d73764ba4183ce854758e | 462 | asm | Assembly | assemblyMain.asm | vbacaksiz/Search | 355b1dc44a2db41d8ca4d82f61306cd1778d8b7d | [
"MIT"
] | null | null | null | assemblyMain.asm | vbacaksiz/Search | 355b1dc44a2db41d8ca4d82f61306cd1778d8b7d | [
"MIT"
] | null | null | null | assemblyMain.asm | vbacaksiz/Search | 355b1dc44a2db41d8ca4d82f61306cd1778d8b7d | [
"MIT"
] | null | null | null | .code
find proc
mov ebx,0
L1: mov eax,dword ptr[rcx]
add ebx,1
cmp eax,dword ptr[rdx]
je L3
cmp eax,0
je L2
add rcx,4
jmp L1
L2: mov eax,-1
ret
L3: mov r10,0
jmp L4
L4: add r10,4
add rcx,4
add rdx,4
mov eax,dword ptr[rdx]
cmp eax,0
je L5
mov eax,dword ptr[rcx]
cmp eax,0
je L2
mov eax,dword ptr[rdx]
cmp eax,dword ptr[rcx]
je L4
sub rdx,r10
sub r10,4
sub rcx,r10
jmp L1
L5: mov eax,ebx
ret
find endp
end | 13.2 | 27 | 0.621212 |
141b96ac1b30f6f24ed977bff3288e831151b55f | 3,875 | asm | Assembly | Codes/Chapter04/P09/P04-09.asm | ar-ekt/Dandamudi-Assembly-Solutions | 876097a20420b125b19ec9e71cc480cc08b47997 | [
"MIT"
] | 8 | 2021-03-04T18:31:42.000Z | 2021-11-03T04:41:25.000Z | Codes/Chapter04/P09/P04-09.asm | ar-ekt/Dandamudi-Assembly-Solutions | 876097a20420b125b19ec9e71cc480cc08b47997 | [
"MIT"
] | null | null | null | Codes/Chapter04/P09/P04-09.asm | ar-ekt/Dandamudi-Assembly-Solutions | 876097a20420b125b19ec9e71cc480cc08b47997 | [
"MIT"
] | 1 | 2021-11-09T09:49:00.000Z | 2021-11-09T09:49:00.000Z | global _start
extern ExitProcess
%INCLUDE "lib.h"
section .data
MAX_ADDRESS_SIZE EQU 100
NULL EQU 0
NEWLINE db 10, NULL
MSG_LOGICALADDRESS_INPUT db "Enter the hexadecimal logical address in segment:offset format(e.g. 1000:3A4): ", NULL
MSG_PHYSICALADDRESS_OUTPUT db "Equivalent physical address: ", NULL
section .bss
logicalAddress resb MAX_ADDRESS_SIZE
physicalAddress resb MAX_ADDRESS_SIZE
section .code
_start:
puts MSG_LOGICALADDRESS_INPUT
fgets logicalAddress, MAX_ADDRESS_SIZE
mov ESI, logicalAddress ; copy logical-address pointer to ESI
xor EBX, EBX ; segment-value as decimal
segmentToDecLoop: ; convert segment-value from hexadecimal to decimal
mov AL, [ESI] ;
cmp AL, BYTE ":" ; end of segment part
je offsetToDec
cmp AL, BYTE "9"
jg segmentToDecLoop_isLetter
segmentToDecLoop_isDigit: ; 0 <= digit <= 9
sub AL, BYTE "0" ; convert digit to equal value in decimal
jmp segmentToDecLoop_continue
segmentToDecLoop_isLetter: ; A <= digit <= F
sub AL, BYTE "A"-10 ; convert digit to equal value in decimal
segmentToDecLoop_continue:
shl EBX, 4
add BL, AL
inc ESI
jmp segmentToDecLoop
offsetToDec: ; convert offset-value from hexadecimal to decimal
inc ESI ; point to start of offset part
xor ECX, ECX ; offset-value as decimal
offsetToDecLoop:
mov AL, [ESI]
cmp AL, BYTE NULL ; end of offset part
je physicalAddressCalc
cmp AL, BYTE "9"
jg offsetToDecLoop_isLetter
offsetToDecLoop_isDigit: ; 0 <= digit <= 9
sub AL, BYTE "0" ; convert digit to equal value in decimal
jmp offsetToDecLoop_continue
offsetToDecLoop_isLetter: ; A <= digit <= F
sub AL, BYTE "A"-10 ; convert digit to equal value in decimal
offsetToDecLoop_continue:
shl ECX, 4
add CL, AL
inc ESI
jmp offsetToDecLoop
physicalAddressCalc:
shl EBX, 4 ; physical-address = segment-value * 16 + offset-value
add EBX, ECX
xor ECX, ECX ; physical-address length as hexadecimal
mov ESI, physicalAddress ; copy physical-address pointer to ESI
physicalAddressToHex: ; convert physical-address from decimal to hexadecimal
cmp EBX, 0
je physicalAddressToHexCalcDone
mov DL, BL
and DL, 0FH ; mod 16
shr EBX, 4 ; div 16
cmp DL, 9
jg physicalAddressToHex_toLetter
physicalAddressToHex_toDigit:
add DL, "0" ; convert to equal value in hexadecimal
jmp physicalAddressToHex_continue
physicalAddressToHex_toLetter:
add DL, "A"-10 ; convert to equal value in hexadecimal
physicalAddressToHex_continue:
xor DH, DH
push DX
inc ECX
jmp physicalAddressToHex
physicalAddressToHexCalcDone:
cmp ECX, 0
je physicalAddress_zero
physicalAddressMovLoop: ; place characters in reverse order
pop DX
mov [ESI], DX
inc ESI
loop physicalAddressMovLoop
jmp physicalAddressToHex_done
physicalAddress_zero:
mov [ESI], BYTE "0" ; set physical-address to zero
inc ESI
physicalAddressToHex_done:
mov [ESI], BYTE NULL ; terminate the physical-address string
puts MSG_PHYSICALADDRESS_OUTPUT
puts physicalAddress
puts NEWLINE
_end:
push DWORD 0
call ExitProcess
| 36.904762 | 119 | 0.596387 |
792c2ea27083183bb7a61e513efa939e8330ad32 | 10,268 | asm | Assembly | hmmc-Tex.asm | artrag/mz3d2 | c7c1af26213e19c7e336382cb0ac841ebfd0bcdb | [
"BSD-3-Clause"
] | 1 | 2020-10-29T00:51:20.000Z | 2020-10-29T00:51:20.000Z | hmmc-Tex.asm | artrag/mz3d2 | c7c1af26213e19c7e336382cb0ac841ebfd0bcdb | [
"BSD-3-Clause"
] | null | null | null | hmmc-Tex.asm | artrag/mz3d2 | c7c1af26213e19c7e336382cb0ac841ebfd0bcdb | [
"BSD-3-Clause"
] | 2 | 2020-10-29T00:51:32.000Z | 2022-03-10T04:18:14.000Z | psect text,class=CODE
global _RLEData,_workpage
global _CEIL,_FLOOR
muluw_hl_bc macro
db 0xed,0xc3 ;de:hl<-hl*bc
endm
mulub_a_b macro
db 0xED,0xC1 ;hl<- a*b
endm
;; void hmmcTexRender(uchar x, uint lineHeight, char* texData);
; input: e = x-coord (e & 3) == 0
; bc = lineHeight 64 means full height
; stack+2 = pointer to RLE texture data
;
; precondition:
; VDP R#17 points to CLR register
; VDP R#40 (NX) = 4
;
; TODO - use SP trick to access RLE data ... does that actually speed
; things up? Probably it does for the zoom out loop. Maybe not
; for zoom in (because we still need 'exx' and 'pop' fetches both
; values in the same set of (shadow) registers).
global _hmmcTexRender
_hmmcTexRender:
ld a,(_workpage) ; 0 or 1
add a,a ; 0 or 2
add a,e ; (e & 3) == 0, so no overflow
exx
ld hl,2
add hl,sp
ld e,(hl)
inc hl ; can be 'inc l' if we know SP is 2-aligned (only matters for Z80)
ld d,(hl) ; de' = texData
ld h,_RLEData/256
ld l,a ; hl' = &RLEData[x/4][workpage].low
ld a,(hl) ; old texData.low
cp e ; new texData.low
jp nz,DiffTex1
inc l
ld a,(hl) ; old texData.high
cp d ; new texData.high
jp nz,DiffTex2
SameTexture:
dec h ; hl' = &lineHeight[x/4][workpage].high
ld a,(hl) ; old lineHeight.high
exx
cp b ; new lineHeight.high
jr nz,DiffHeight1
ld a,c ; new lineHeight.low
exx
ld b,(hl) ; b' = old lineHeight.high
dec l ; hl' = &lineHeight[..][..].low
cp (hl) ; old lineHeight.low
jr nz,DiffHeight2
AllSame:
pop hl ; return address
inc sp ; pop parameter from stack
inc sp ; (on Z80 'pop af' is cheaper)
jp (hl) ; return
DiffTex1:
ld (hl),e ; store new texData.low
inc l
DiffTex2:
ld (hl),d ; store new texData.high
dec h ; hl = &lineHeight[x/4][workpage].high
exx
DiffHeight1:
ld a,b ; lineHeight.high
exx
ld b,(hl) ; b' = old lineHeight.high
ld (hl),a ; store new lineHeight.high
dec l
exx
ld a,c ; lineHeight.low
exx
DiffHeight2:
ld c,(hl) ; c' = old lineHeight.low
ld (hl),a ; store new lineHeight.low
; at this point:
; bc = lineHeight
; e = x-coord
; bc' = old lineHeight
; de' = texData
1: in a,(0x99)
rrca
jr c,1b ; wait for CE
di
exx
ld a,e ; x-coord
out (0x99),a
ld hl,-64
add hl,bc
ld a,36+128
out (0x99),a ; dx
jp c,ClipTex
NoClipTex:
; lineHeight < 64
; This means there's always at least 1 ceiling and 1 floor pixel.
; It also means 'lineHeight * 4' always fits in 8 bits
exx
ld a,b
or a
jr nz,ClipOld1 ; old lineHeight >= 256 -> clip to 64
ld a,c
cp 64+1 ; old lineHeight <= 64 -> no need to clip
jr c,ClipOld2
ClipOld1:
ld a,64
ClipOld2:
exx
ld d,a ; d = min(64, old_lineHeight)
sub c ; new lineHeight
jr c,Wall1
jr z,Wall1 ; new >= old -> no need to draw ceiling pixels
; lineHeight < 64 and smaller than previous frame
; -> only draw 'extra' ceiling/floor pixels
; -- ceiling segment
out (0x99),a
ld a,42+128
out (0x99),a ; ny
ld a,64
sub d ; old lineHeight
out (0x99),a
ld a,38+128
out (0x99),a ; dy
ld a,_CEIL
out (0x9b),a ; clr
ld a,0xc0 ; HMMV
out (0x99),a
ld a,46+128
out (0x99),a ; cmd
2:
in a,(0x99)
rrca
jr c,2b ; wait for CE
jr Wall2 ; skip setting dy
Wall1:
; lineHeight < 64, but bigger than previous frame
; -> no need to draw ceiling/floor pixels
ld a,64
sub c ; new lineHeight
out (0x99),a
ld a,38+128
out (0x99),a ; dy
; -- wall segment
; pseudo code for inner loop:
; y = (64 - lineHeight) << 8;
; do {
; y2 = y + (*p++ * lineHeight * 4);
; plot((y2 >> 8) - (y >> 8), *p++);
; y = y2;
; } while (*p);
Wall2:
ld a,64
sub c
exx
ld b,a ; tmp
ld a,d
ld d,b ; d' = 64 - lineHeight
exx
ld h,a ; h = texData.high
ld a,c ; lineHeight
add a,a ; lineHeight * 2
out (0x99),a
add a,a ; lineHeight < 64, so no overflow
exx
ld b,a ; b' = lineHeight * 4
ld a,e
ld e,0 ; de' = (64 - lineHeight) << 8 = y
exx
ld l,a ; hl = texData
dec hl ; cheaper than 'jr' to skip 'inc hl' instruction (on R800, but not on Z80)
ld a,42+128
out (0x99),a ; ny
Next0:
inc hl ; skip texData->color
ld a,(hl) ; texData->length
inc hl
exx
mulub_a_b ; hl' = a*b' = length * lineHeight * 4
add hl,de ; hl' = y2 = y + (.. * ..)
ex de,hl ; de' = y2 hl' = y
ld a,d
sub h ; (y2 >> 8) - (y >> 8)
exx
jr z,Next0 ; no need to check for (hl+1) == 0
add a,a ; 2 bytes per Y, cannot overflow (lineHeight < 64)
ld b,a ; b = segment length on screen
ld a,(hl) ; texData->color
out (0x9b),a ; clr first pixel needs to be send separately
ld a,0xf0 ; HMMC
out (0x99),a
ld a,46+128
out (0x99),a ; cmd
djnz hmmc4 ; always more than 1 pixel
; cannot fall-through
Next1:
inc hl ; skip texData->color
ld a,(hl) ; texData->length
DoWhile1:
inc hl
exx
mulub_a_b ; hl' = a*b' = length * lineHeight * 4
add hl,de ; hl' = y2 = y + (.. * ..)
ex de,hl ; de' = y2 hl' = y
ld a,d
sub h ; (y2 >> 8) - (y >> 8)
exx
jr z,Next1 ; no need to check for (hl+1)==0 (last segment is always visible)
add a,a ; 2 bytes (4 pixels) per Y, cannot overflow
ld b,a ; b = segment length (on screen) (2*N, with N >= 1)
hmmc4: ld a,(hl) ; texData: color
hmmc3: out (0x9b),a ; clr
djnz hmmc3
hmmc2: inc hl
ld a,(hl) ; texData->length
or a
jr nz,DoWhile1
; -- floor segment
floor: ld a,c ; new lineHeight
cp d ; old lineHeight
jr nc,TexEnd ; new >= old -> no need to draw floor pixels
ld a,d ; old lineHeight
sub c ; new lineHeight
out (0x99),a
ld a,42+128
out (0x99),a ; ny
ld a,_FLOOR
out (0x9b),a ; clr
ld a,0xc0 ; HMMV
out (0x99),a
ld a,46+128
out (0x99),a ; cmd
TexEnd:
pop hl ; return address
inc sp ; pop parameter from stack
inc sp ; (on Z80 'pop af' is cheaper)
ei
jp (hl) ; return
ClipTex:
; lineHeight >= 64. Texture is at least as high as the full screen
; height, so there are no ceiling or floor pixels.
; Or in other words: we need to draw exactly 128 texture pixels.
; at this point:
; bc = lineHeight
; de' = texData
xor a
out (0x99),a
ld a,c ; lineHeight.low
add a,a
exx
ld c,a ; c' = (lineHeight * 2).low
ld a,d ; texData.high
exx
ld d,a ; d = texData.high
ld a,38+128
out (0x99),a ; dy
ld a,b ; lineHeight.high
adc a,a ; (lineHeight * 2).high
exx
ld b,a ; bc' = lineHeight * 2
sla c
rl b ; bc' = lineHeight * 4 clears carry flag
; no overflow as long as lineHeight < 16384
ld a,e ; texData.low
exx
ld e,a ; de = texData
; y = (Hscr - lineHeight) << 8
ld a,128 ; full screen height
out (0x99),a
ld hl,64 ; carry-flag is already clear
sbc hl,bc ; hl = 64 - lineHeight
ld b,l
ld c,0 ; bc = (64 - lineHeight) << 8 (lower 16 bits)
ex de,hl ; d:bc = (64 - lineHeight) << 8 (full 24 bits)
dec hl ; hl = texData-1 (doesn't change flags)
ld a,42+128
out (0x99),a ; NY
jr z,TopDone0 ; lineHeight == 64 -> no need to skip texels
; lineHeight > 64
; -> y = 64 - lineHeight is negative
; skip texels till y becomes non-negative
SkipTop:
inc hl
ld a,(hl) ; texData->length
inc hl
exx
ld l,a
ld h,0 ; hl' = zero-extend(length)
muluw_hl_bc ; de':hl' = length * lineHeight * 4
ld a,l
exx
add a,c
ld c,a
exx
ld a,h
exx
adc a,b
ld b,a
exx
ld a,e
exx
adc a,d
ld d,a ; d:bc += e':hl'
jr nc,SkipTop ; while (d:bc < 0)
jp nz,LastSegment0 ; more than 256 Y -> draw 128 Y
ld a,b
or a
jr z,TopDone0 ; no need to draw partial segment (at top of screen)
cp 128
jp nc,LastSegment0 ; 128 or more Y -> draw 128 Y
add a,a ; 2 bytes per Y, cannot overflow
ld d,a ; d = length of first partial segment (register B is not free)
ld a,(hl)
out (0x9b),a ; clr
ld a,0xf0 ; HMMC
out (0x99),a
ld a,46+128
out (0x99),a ; cmd
dec d ; cannot become 0 at this point
ld a,(hl)
hmmc7: out (0x9b),a
dec d ; cannot use 'djnz' because reg B is not free
jr nz,hmmc7
TopDone:
; at this point
; bc = y ~= lastDrawnY << 8 (exclusive) (includes fractional part)
; hl = texData-1 (one byte before the segment that should be drawn from start)
; bc' = lineHeight * 4
set 7,b ; b = last-drawn-y-coord (exclusive)
; add 128, that way we can detect overflow and '>128'
; using the carry-flag (so using only 1 test)
ld d,b ; d = last-drawn-y-coord (exclusive)
ZoomLoop:
inc hl
ld a,(hl) ; texData->length
inc hl
exx
ld l,a
ld h,0 ; hl' = zero-extend(length)
muluw_hl_bc ; de':hl' = RLE-length * lineHeight * 4
ld a,l
exx
jr c,LastSegment ; carry set -> de' != 0 (result of muluw didn't fit in 16-bit)
add a,c
ld c,a
exx
ld a,h
exx
adc a,b
jr c,LastSegment
ld b,a ; bc += hl'
sub d
jr z,ZoomLoop
add a,a ; 2 bytes per Y, cannot overflow
ld e,a ; e = #bytes
ld d,b ; d = newY
hmmc8: ld a,(hl) ; texData->color
hmmc5: out (0x9b),a ; clr
dec e
jr nz,hmmc5
jr ZoomLoop
LastSegment:
; note: as soon as the last segment has more than one Y
; it's cheaper to draw it using HMMV instead of HMMC
xor a
sub d ; a = 128 - (y - 128) = 256 - y = 0 - y
dec a ; was at least 1
ld a,(hl) ; texData->color
out (0x9b),a ; clr
jr z,hmmc6 ; was only one Y, finish HMMC command
ld a,0xc0 ; otherwise finish with HMMV
out (0x99),a
ld a,46+128
out (0x99),a ; CMD
jp TexEnd
hmmc6: out (0x9b),a ; clr
jp TexEnd
TopDone0:
; this is similar to TopDone (above) except that the HMMC command is
; not yet started
ld b,128
ld d,b
ZoomLoop0:
inc hl
ld a,(hl) ; texData->length
inc hl
exx
ld l,a
ld h,0 ; hl' = zero-extend(length)
muluw_hl_bc ; de':hl' = RLE-length * lineHeight * 4
ld a,l
exx
jr c,LastSegment0 ; carry set -> de' != 0 (result of muluw didn't fit in 16-bit)
add a,c
ld c,a
exx
ld a,h
exx
adc a,b
jr c,LastSegment0
ld b,a ; bc += hl'
sub d
jr z,ZoomLoop0
add a,a ; 2 bytes per Y, cannot overflow
ld e,a ; e = #bytes
ld d,b ; d = newY
ld a,(hl)
out (0x9b),a ; first clr
ld a,0xf0 ; hmmc
out (0x99),a
ld a,46+128
out (0x99),a ; cmd
dec e ; cannot become 0 at this point
jr hmmc8
LastSegment0:
; we need to write 128 Y of the same color, use HMMV (even
; though this is the hmmc renderer).
ld a,(hl) ; texData->color
out (0x9b),a ; first clr
ld a,0xc0 ; hmmv
out (0x99),a
ld a,46+128
out (0x99),a ; cmd
jp TexEnd
| 21.084189 | 83 | 0.613654 |
69b3a2f687335f1027404355d9a5203e551b965b | 1,648 | asm | Assembly | maps/RivalHouse2F.asm | AtmaBuster/pokeplat-gen2 | fa83b2e75575949b8f72cb2c48f7a1042e97f70f | [
"blessing"
] | 6 | 2021-06-19T06:41:19.000Z | 2022-02-15T17:12:33.000Z | maps/RivalHouse2F.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | null | null | null | maps/RivalHouse2F.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | 2 | 2021-08-11T19:47:07.000Z | 2022-01-01T07:07:56.000Z | object_const_def ; object_event constants
const RIVALHOUSE2F_RIVAL
RivalHouse2F_MapScripts:
db 2 ; scene scripts
scene_script .Scene0 ; SCENE_DEFAULT
scene_script .Dummy ; SCENE_FINISHED
db 0 ; callbacks
.Scene0:
sdefer .FindRival
.Dummy:
end
.FindRival:
applymovement PLAYER, .StairsMovement
opentext
writetext .TakeStuffText
waitbutton
closetext
playmusic MUSIC_RIVAL_ENCOUNTER
turnobject RIVALHOUSE2F_RIVAL, RIGHT
showemote EMOTE_SHOCK, RIVALHOUSE2F_RIVAL, 15
opentext
writetext .WaitingText
waitbutton
closetext
applymovement RIVALHOUSE2F_RIVAL, .RivalExitMovement
applymovement PLAYER, .PlayerOutOfTheWayMovement
applymovement RIVALHOUSE2F_RIVAL, .RivalFinishExitMovement
disappear RIVALHOUSE2F_RIVAL
special RestartMapMusic
setevent EVENT_TALKED_TO_RIVAL_IN_ROOM
setscene SCENE_FINISHED
setmapscene TWINLEAF_TOWN, SCENE_TWINLEAFTOWN_NOTHING
end
.TakeStuffText:
text "<RIVAL>:…I'd better"
line "take my BAG and"
cont "JOURNAL, too…"
done
.WaitingText:
text "Oh, hey, <PLAYER>!"
para "I'll be waiting on"
line "the road! It's a"
cont "¥10 million fine"
cont "if you're late!"
done
.StairsMovement:
.PlayerOutOfTheWayMovement:
step DOWN
step_end
.RivalExitMovement:
step RIGHT
step RIGHT
step UP
turn_head RIGHT
step_end
.RivalFinishExitMovement:
step RIGHT
step UP
step_end
RivalHouse2F_MapEvents:
db 0, 0 ; filler
db 1 ; warp events
warp_event 7, 0, RIVAL_HOUSE_1F, 3
db 0 ; coord events
db 0 ; bg events
db 1 ; object events
object_event 4, 2, SPRITE_RIVAL, SPRITEMOVEDATA_STANDING_UP, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, ObjectEvent, EVENT_RIVALS_HOUSE_2F_RIVAL
| 19.855422 | 143 | 0.787015 |
5bce42d30266b65ca958508d238b6c131638a068 | 5,270 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2_notsx.log_1_111.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2_notsx.log_1_111.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2_notsx.log_1_111.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r8
push %r9
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x1bb68, %rsi
clflush (%rsi)
nop
xor %rax, %rax
mov (%rsi), %r13
nop
nop
nop
add %r8, %r8
lea addresses_WT_ht+0x4568, %r8
nop
nop
sub %rbx, %rbx
movb (%r8), %r9b
and $8259, %rsi
lea addresses_WC_ht+0x4908, %r9
clflush (%r9)
nop
nop
nop
nop
nop
and %r8, %r8
mov (%r9), %eax
nop
and $265, %rax
lea addresses_WC_ht+0x1526c, %rbp
nop
nop
nop
nop
nop
cmp $60131, %r13
mov $0x6162636465666768, %r8
movq %r8, (%rbp)
nop
sub %rbp, %rbp
lea addresses_UC_ht+0x14210, %rbx
nop
nop
nop
nop
nop
dec %rsi
mov (%rbx), %r13
nop
add $13469, %r13
lea addresses_A_ht+0x15768, %rbx
dec %r13
movb (%rbx), %al
nop
cmp %r8, %r8
lea addresses_A_ht+0x1e398, %rbx
nop
nop
nop
xor %r13, %r13
mov $0x6162636465666768, %r8
movq %r8, %xmm0
vmovups %ymm0, (%rbx)
nop
nop
cmp $26349, %rax
lea addresses_WT_ht+0x17908, %r8
nop
nop
dec %rbp
movl $0x61626364, (%r8)
nop
nop
nop
nop
add %rax, %rax
lea addresses_WT_ht+0x16268, %r8
sub %rsi, %rsi
movups (%r8), %xmm4
vpextrq $1, %xmm4, %r13
nop
sub $46186, %r9
lea addresses_WC_ht+0x1a924, %rbx
nop
nop
nop
cmp $28076, %r9
vmovups (%rbx), %ymm1
vextracti128 $0, %ymm1, %xmm1
vpextrq $0, %xmm1, %r8
nop
nop
sub $30518, %rbx
lea addresses_D_ht+0x82e8, %r9
nop
nop
dec %r13
mov (%r9), %bp
add %rbx, %rbx
lea addresses_UC_ht+0x12c1e, %rsi
nop
nop
nop
nop
cmp %r13, %r13
movb $0x61, (%rsi)
nop
nop
nop
xor %rbp, %rbp
lea addresses_D_ht+0x16108, %rax
inc %r13
mov $0x6162636465666768, %rbp
movq %rbp, %xmm6
movups %xmm6, (%rax)
nop
nop
nop
nop
sub %r8, %r8
lea addresses_normal_ht+0x2268, %rsi
nop
nop
nop
nop
and $54937, %rbx
mov (%rsi), %r13
nop
nop
nop
nop
sub %r9, %r9
lea addresses_normal_ht+0x18b90, %rsi
lea addresses_A_ht+0xd844, %rdi
clflush (%rdi)
nop
and $40165, %r9
mov $55, %rcx
rep movsq
nop
nop
nop
nop
nop
xor %r8, %r8
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
// Store
mov $0x125be00000000168, %rcx
nop
nop
add %rsi, %rsi
mov $0x5152535455565758, %rdi
movq %rdi, %xmm6
movaps %xmm6, (%rcx)
xor $3552, %rax
// Load
lea addresses_WT+0x16d68, %r13
nop
nop
nop
and $36152, %r9
mov (%r13), %esi
nop
cmp %rcx, %rcx
// Store
mov $0xc68, %r9
nop
nop
add $43629, %rbx
movl $0x51525354, (%r9)
nop
nop
nop
nop
nop
and $40485, %r13
// Faulty Load
lea addresses_A+0x8d68, %rcx
nop
nop
nop
xor %rsi, %rsi
mov (%rcx), %r13w
lea oracles, %rsi
and $0xff, %r13
shlq $12, %r13
mov (%rsi,%r13,1), %r13
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'size': 16, 'AVXalign': True, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': True, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}}
{'00': 1}
00
*/
| 20.585938 | 151 | 0.63833 |
c1041c2462d492d89af206819b0dd5b168a31a6b | 1,489 | asm | Assembly | projects/04/fill/Fill.asm | PhillipChaffee/n2t | 86ae5f978683a573a45c8595ba0e83ef9c21b473 | [
"MIT"
] | null | null | null | projects/04/fill/Fill.asm | PhillipChaffee/n2t | 86ae5f978683a573a45c8595ba0e83ef9c21b473 | [
"MIT"
] | null | null | null | projects/04/fill/Fill.asm | PhillipChaffee/n2t | 86ae5f978683a573a45c8595ba0e83ef9c21b473 | [
"MIT"
] | null | null | null | // This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/Fill.asm
// Runs an infinite loop that listens to the keyboard input.
// When a key is pressed (any key), the program blackens the screen,
// i.e. writes "black" in every pixel. When no key is pressed, the
// program clears the screen, i.e. writes "white" in every pixel.
(START)
@SCREEN
D=A // D=SCREEN
@i
M=D // i=SCREEN
@24576
D=M // D=RAM[24576] Sets D == keyboard ascii code
@FILL
D;JNE // Fill screen if RAM[24576](the keyboard memory) != 0
@CLEAR
D;JEQ // Clear more screen if RAM[24576](the keyboard memory) == 0
(FILL)
@i
A=M // Set A=i
M=-1 // Set RAM[i]==-1
@i
M=M+1 // Increment i
@24576
D=M // D=RAM[24576] Sets D == keyboard ascii code
@FILL
D;JNE // Fill more screen if RAM[24576](the keyboard memory) != 0
@START
D;JEQ // Go to beginning of screen if no keyboard button is being pressed
(CLEAR)
@i
A=M // Set A=i
M=0 // Set RAM[i]==0
@i
M=M+1 // Increment i
@24576
D=M // D=RAM[24576] Sets D == keyboard ascii code
@CLEAR
D;JEQ // Clear more screen if RAM[24576](the keyboard memory) == 0
@START
D;JNE // Go to beginning of screen if keyboard button is being pressed
| 29.78 | 80 | 0.572196 |
512d445d0d3f4058834c91e146defd7614b8db59 | 4,102 | asm | Assembly | coverage/IN_CTS/0488-COVERAGE-brw-fs-copy-propagation-691-brw-shader-565/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | null | null | null | coverage/IN_CTS/0488-COVERAGE-brw-fs-copy-propagation-691-brw-shader-565/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | 47 | 2021-03-11T07:42:51.000Z | 2022-03-14T06:30:14.000Z | coverage/IN_CTS/0488-COVERAGE-brw-fs-copy-propagation-691-brw-shader-565/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | 4 | 2021-03-09T13:37:19.000Z | 2022-02-25T07:32:11.000Z | ; SPIR-V
; Version: 1.0
; Generator: Khronos Glslang Reference Front End; 10
; Bound: 67
; Schema: 0
OpCapability Shader
%1 = OpExtInstImport "GLSL.std.450"
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %4 "main" %23 %55
OpExecutionMode %4 OriginUpperLeft
OpSource ESSL 320
OpName %4 "main"
OpName %8 "func("
OpName %20 "v"
OpName %23 "gl_FragCoord"
OpName %42 "buf1"
OpMemberName %42 0 "one"
OpName %44 ""
OpName %55 "_GLF_color"
OpName %59 "buf0"
OpMemberName %59 0 "_GLF_uniform_int_values"
OpName %61 ""
OpDecorate %23 BuiltIn FragCoord
OpMemberDecorate %42 0 Offset 0
OpDecorate %42 Block
OpDecorate %44 DescriptorSet 0
OpDecorate %44 Binding 1
OpDecorate %55 Location 0
OpDecorate %58 ArrayStride 16
OpMemberDecorate %59 0 Offset 0
OpDecorate %59 Block
OpDecorate %61 DescriptorSet 0
OpDecorate %61 Binding 0
%2 = OpTypeVoid
%3 = OpTypeFunction %2
%6 = OpTypeFloat 32
%7 = OpTypeFunction %6
%10 = OpTypeInt 32 1
%11 = OpConstant %10 1
%14 = OpConstant %6 1
%18 = OpTypeVector %6 4
%19 = OpTypePointer Function %18
%21 = OpConstantComposite %18 %14 %14 %14 %14
%22 = OpTypePointer Input %18
%23 = OpVariable %22 Input
%24 = OpTypeInt 32 0
%25 = OpConstant %24 1
%26 = OpTypePointer Input %6
%29 = OpConstant %6 0
%30 = OpTypeBool
%42 = OpTypeStruct %24
%43 = OpTypePointer Uniform %42
%44 = OpVariable %43 Uniform
%45 = OpConstant %10 0
%46 = OpTypePointer Uniform %24
%50 = OpConstant %24 2
%54 = OpTypePointer Output %18
%55 = OpVariable %54 Output
%56 = OpConstantComposite %18 %14 %29 %29 %14
%58 = OpTypeArray %10 %25
%59 = OpTypeStruct %58
%60 = OpTypePointer Uniform %59
%61 = OpVariable %60 Uniform
%62 = OpTypePointer Uniform %10
%4 = OpFunction %2 None %3
%5 = OpLabel
%20 = OpVariable %19 Function
OpStore %20 %21
%27 = OpAccessChain %26 %23 %25
%28 = OpLoad %6 %27
%31 = OpFOrdLessThan %30 %28 %29
OpSelectionMerge %33 None
OpBranchConditional %31 %32 %33
%32 = OpLabel
%34 = OpFunctionCall %6 %8
%35 = OpCompositeConstruct %18 %34 %34 %34 %34
OpStore %20 %35
OpBranch %33
%33 = OpLabel
%36 = OpLoad %18 %20
%37 = OpExtInst %24 %1 PackUnorm4x8 %36
%38 = OpIEqual %30 %37 %25
OpSelectionMerge %40 None
OpBranchConditional %38 %39 %40
%39 = OpLabel
OpReturn
%40 = OpLabel
%47 = OpAccessChain %46 %44 %45
%48 = OpLoad %24 %47
%49 = OpShiftLeftLogical %24 %25 %48
%51 = OpIEqual %30 %49 %50
OpSelectionMerge %53 None
OpBranchConditional %51 %52 %57
%52 = OpLabel
OpStore %55 %56
OpBranch %53
%57 = OpLabel
%63 = OpAccessChain %62 %61 %45 %45
%64 = OpLoad %10 %63
%65 = OpConvertSToF %6 %64
%66 = OpCompositeConstruct %18 %65 %65 %65 %65
OpStore %55 %66
OpBranch %53
%53 = OpLabel
OpReturn
OpFunctionEnd
%8 = OpFunction %6 None %7
%9 = OpLabel
OpSelectionMerge %13 None
OpSwitch %11 %13 0 %12
%12 = OpLabel
OpReturnValue %14
%13 = OpLabel
%17 = OpUndef %6
OpReturnValue %17
OpFunctionEnd
| 35.059829 | 59 | 0.492443 |
59affbb69640ee0e2c6611003c682765169cca82 | 438 | asm | Assembly | oeis/120/A120926.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/120/A120926.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/120/A120926.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A120926: Number of isolated 0's in all ternary words of length n on {0,1,2}.
; Submitted by Christian Krause
; 1,4,16,60,216,756,2592,8748,29160,96228,314928,1023516,3306744,10628820,34012224,108413964,344373768,1090516932,3443737680,10847773692,34093003032,106928054964,334731302496,1046035320300,3263630199336,10167463313316,31632108085872
mov $1,3
pow $1,$0
add $0,2
mul $1,$0
mul $1,2
div $1,3
add $1,1
mul $1,4
div $1,6
mov $0,$1
| 29.2 | 232 | 0.767123 |
6f688b63e0990a0792cf81f388058d94a64245a9 | 72,292 | asm | Assembly | worker/deps/openssl/config/archs/VC-WIN64A/asm_avx2/crypto/poly1305/poly1305-x86_64.asm | SteveMcFarlin/mediasoup | 05498223878408e9fa6c1bedec3c7a6ad642c462 | [
"0BSD"
] | 1,666 | 2017-01-12T03:58:44.000Z | 2017-08-20T23:39:20.000Z | worker/deps/openssl/config/archs/VC-WIN64A/asm_avx2/crypto/poly1305/poly1305-x86_64.asm | SteveMcFarlin/mediasoup | 05498223878408e9fa6c1bedec3c7a6ad642c462 | [
"0BSD"
] | 116 | 2021-05-29T16:32:51.000Z | 2021-08-13T16:05:29.000Z | worker/deps/openssl/config/archs/VC-WIN64A/asm_avx2/crypto/poly1305/poly1305-x86_64.asm | SteveMcFarlin/mediasoup | 05498223878408e9fa6c1bedec3c7a6ad642c462 | [
"0BSD"
] | 161 | 2017-08-25T20:20:01.000Z | 2022-02-08T02:59:03.000Z | default rel
%define XMMWORD
%define YMMWORD
%define ZMMWORD
section .text code align=64
EXTERN OPENSSL_ia32cap_P
global poly1305_init
global poly1305_blocks
global poly1305_emit
ALIGN 32
poly1305_init:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_init:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
xor rax,rax
mov QWORD[rdi],rax
mov QWORD[8+rdi],rax
mov QWORD[16+rdi],rax
cmp rsi,0
je NEAR $L$no_key
lea r10,[poly1305_blocks]
lea r11,[poly1305_emit]
mov r9,QWORD[((OPENSSL_ia32cap_P+4))]
lea rax,[poly1305_blocks_avx]
lea rcx,[poly1305_emit_avx]
bt r9,28
cmovc r10,rax
cmovc r11,rcx
lea rax,[poly1305_blocks_avx2]
bt r9,37
cmovc r10,rax
mov rax,2149646336
shr r9,32
and r9,rax
cmp r9,rax
je NEAR $L$init_base2_44
mov rax,0x0ffffffc0fffffff
mov rcx,0x0ffffffc0ffffffc
and rax,QWORD[rsi]
and rcx,QWORD[8+rsi]
mov QWORD[24+rdi],rax
mov QWORD[32+rdi],rcx
mov QWORD[rdx],r10
mov QWORD[8+rdx],r11
mov eax,1
$L$no_key:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_init:
ALIGN 32
poly1305_blocks:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
$L$blocks:
shr rdx,4
jz NEAR $L$no_data
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$blocks_body:
mov r15,rdx
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14,QWORD[rdi]
mov rbx,QWORD[8+rdi]
mov rbp,QWORD[16+rdi]
mov r12,r13
shr r13,2
mov rax,r12
add r13,r12
jmp NEAR $L$oop
ALIGN 32
$L$oop:
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
mul r14
mov r9,rax
mov rax,r11
mov r10,rdx
mul r14
mov r14,rax
mov rax,r11
mov r8,rdx
mul rbx
add r9,rax
mov rax,r13
adc r10,rdx
mul rbx
mov rbx,rbp
add r14,rax
adc r8,rdx
imul rbx,r13
add r9,rbx
mov rbx,r8
adc r10,0
imul rbp,r11
add rbx,r9
mov rax,-4
adc r10,rbp
and rax,r10
mov rbp,r10
shr r10,2
and rbp,3
add rax,r10
add r14,rax
adc rbx,0
adc rbp,0
mov rax,r12
dec r15
jnz NEAR $L$oop
mov QWORD[rdi],r14
mov QWORD[8+rdi],rbx
mov QWORD[16+rdi],rbp
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rsp,[48+rsp]
$L$no_data:
$L$blocks_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks:
ALIGN 32
poly1305_emit:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_emit:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
$L$emit:
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov r10,QWORD[16+rdi]
mov rax,r8
add r8,5
mov rcx,r9
adc r9,0
adc r10,0
shr r10,2
cmovnz rax,r8
cmovnz rcx,r9
add rax,QWORD[rdx]
adc rcx,QWORD[8+rdx]
mov QWORD[rsi],rax
mov QWORD[8+rsi],rcx
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_emit:
ALIGN 32
__poly1305_block:
mul r14
mov r9,rax
mov rax,r11
mov r10,rdx
mul r14
mov r14,rax
mov rax,r11
mov r8,rdx
mul rbx
add r9,rax
mov rax,r13
adc r10,rdx
mul rbx
mov rbx,rbp
add r14,rax
adc r8,rdx
imul rbx,r13
add r9,rbx
mov rbx,r8
adc r10,0
imul rbp,r11
add rbx,r9
mov rax,-4
adc r10,rbp
and rax,r10
mov rbp,r10
shr r10,2
and rbp,3
add rax,r10
add r14,rax
adc rbx,0
adc rbp,0
DB 0F3h,0C3h ;repret
ALIGN 32
__poly1305_init_avx:
mov r14,r11
mov rbx,r12
xor rbp,rbp
lea rdi,[((48+64))+rdi]
mov rax,r12
call __poly1305_block
mov eax,0x3ffffff
mov edx,0x3ffffff
mov r8,r14
and eax,r14d
mov r9,r11
and edx,r11d
mov DWORD[((-64))+rdi],eax
shr r8,26
mov DWORD[((-60))+rdi],edx
shr r9,26
mov eax,0x3ffffff
mov edx,0x3ffffff
and eax,r8d
and edx,r9d
mov DWORD[((-48))+rdi],eax
lea eax,[rax*4+rax]
mov DWORD[((-44))+rdi],edx
lea edx,[rdx*4+rdx]
mov DWORD[((-32))+rdi],eax
shr r8,26
mov DWORD[((-28))+rdi],edx
shr r9,26
mov rax,rbx
mov rdx,r12
shl rax,12
shl rdx,12
or rax,r8
or rdx,r9
and eax,0x3ffffff
and edx,0x3ffffff
mov DWORD[((-16))+rdi],eax
lea eax,[rax*4+rax]
mov DWORD[((-12))+rdi],edx
lea edx,[rdx*4+rdx]
mov DWORD[rdi],eax
mov r8,rbx
mov DWORD[4+rdi],edx
mov r9,r12
mov eax,0x3ffffff
mov edx,0x3ffffff
shr r8,14
shr r9,14
and eax,r8d
and edx,r9d
mov DWORD[16+rdi],eax
lea eax,[rax*4+rax]
mov DWORD[20+rdi],edx
lea edx,[rdx*4+rdx]
mov DWORD[32+rdi],eax
shr r8,26
mov DWORD[36+rdi],edx
shr r9,26
mov rax,rbp
shl rax,24
or r8,rax
mov DWORD[48+rdi],r8d
lea r8,[r8*4+r8]
mov DWORD[52+rdi],r9d
lea r9,[r9*4+r9]
mov DWORD[64+rdi],r8d
mov DWORD[68+rdi],r9d
mov rax,r12
call __poly1305_block
mov eax,0x3ffffff
mov r8,r14
and eax,r14d
shr r8,26
mov DWORD[((-52))+rdi],eax
mov edx,0x3ffffff
and edx,r8d
mov DWORD[((-36))+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[((-20))+rdi],edx
mov rax,rbx
shl rax,12
or rax,r8
and eax,0x3ffffff
mov DWORD[((-4))+rdi],eax
lea eax,[rax*4+rax]
mov r8,rbx
mov DWORD[12+rdi],eax
mov edx,0x3ffffff
shr r8,14
and edx,r8d
mov DWORD[28+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[44+rdi],edx
mov rax,rbp
shl rax,24
or r8,rax
mov DWORD[60+rdi],r8d
lea r8,[r8*4+r8]
mov DWORD[76+rdi],r8d
mov rax,r12
call __poly1305_block
mov eax,0x3ffffff
mov r8,r14
and eax,r14d
shr r8,26
mov DWORD[((-56))+rdi],eax
mov edx,0x3ffffff
and edx,r8d
mov DWORD[((-40))+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[((-24))+rdi],edx
mov rax,rbx
shl rax,12
or rax,r8
and eax,0x3ffffff
mov DWORD[((-8))+rdi],eax
lea eax,[rax*4+rax]
mov r8,rbx
mov DWORD[8+rdi],eax
mov edx,0x3ffffff
shr r8,14
and edx,r8d
mov DWORD[24+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[40+rdi],edx
mov rax,rbp
shl rax,24
or r8,rax
mov DWORD[56+rdi],r8d
lea r8,[r8*4+r8]
mov DWORD[72+rdi],r8d
lea rdi,[((-48-64))+rdi]
DB 0F3h,0C3h ;repret
ALIGN 32
poly1305_blocks_avx:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_avx:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8d,DWORD[20+rdi]
cmp rdx,128
jae NEAR $L$blocks_avx
test r8d,r8d
jz NEAR $L$blocks
$L$blocks_avx:
and rdx,-16
jz NEAR $L$no_data_avx
vzeroupper
test r8d,r8d
jz NEAR $L$base2_64_avx
test rdx,31
jz NEAR $L$even_avx
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$blocks_avx_body:
mov r15,rdx
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14d,r8d
and r8,-2147483648
mov r12,r9
mov ebx,r9d
and r9,-2147483648
shr r8,6
shl r12,52
add r14,r8
shr rbx,12
shr r9,18
add r14,r12
adc rbx,r9
mov r8,rbp
shl r8,40
shr rbp,24
add rbx,r8
adc rbp,0
mov r9,-4
mov r8,rbp
and r9,rbp
shr r8,2
and rbp,3
add r8,r9
add r14,r8
adc rbx,0
adc rbp,0
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
call __poly1305_block
test rcx,rcx
jz NEAR $L$store_base2_64_avx
mov rax,r14
mov rdx,r14
shr r14,52
mov r11,rbx
mov r12,rbx
shr rdx,26
and rax,0x3ffffff
shl r11,12
and rdx,0x3ffffff
shr rbx,14
or r14,r11
shl rbp,24
and r14,0x3ffffff
shr r12,40
and rbx,0x3ffffff
or rbp,r12
sub r15,16
jz NEAR $L$store_base2_26_avx
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
jmp NEAR $L$proceed_avx
ALIGN 32
$L$store_base2_64_avx:
mov QWORD[rdi],r14
mov QWORD[8+rdi],rbx
mov QWORD[16+rdi],rbp
jmp NEAR $L$done_avx
ALIGN 16
$L$store_base2_26_avx:
mov DWORD[rdi],eax
mov DWORD[4+rdi],edx
mov DWORD[8+rdi],r14d
mov DWORD[12+rdi],ebx
mov DWORD[16+rdi],ebp
ALIGN 16
$L$done_avx:
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rsp,[48+rsp]
$L$no_data_avx:
$L$blocks_avx_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
ALIGN 32
$L$base2_64_avx:
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$base2_64_avx_body:
mov r15,rdx
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14,QWORD[rdi]
mov rbx,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
test rdx,31
jz NEAR $L$init_avx
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
sub r15,16
call __poly1305_block
$L$init_avx:
mov rax,r14
mov rdx,r14
shr r14,52
mov r8,rbx
mov r9,rbx
shr rdx,26
and rax,0x3ffffff
shl r8,12
and rdx,0x3ffffff
shr rbx,14
or r14,r8
shl rbp,24
and r14,0x3ffffff
shr r9,40
and rbx,0x3ffffff
or rbp,r9
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
mov DWORD[20+rdi],1
call __poly1305_init_avx
$L$proceed_avx:
mov rdx,r15
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rax,[48+rsp]
lea rsp,[48+rsp]
$L$base2_64_avx_epilogue:
jmp NEAR $L$do_avx
ALIGN 32
$L$even_avx:
vmovd xmm0,DWORD[rdi]
vmovd xmm1,DWORD[4+rdi]
vmovd xmm2,DWORD[8+rdi]
vmovd xmm3,DWORD[12+rdi]
vmovd xmm4,DWORD[16+rdi]
$L$do_avx:
lea r11,[((-248))+rsp]
sub rsp,0x218
vmovdqa XMMWORD[80+r11],xmm6
vmovdqa XMMWORD[96+r11],xmm7
vmovdqa XMMWORD[112+r11],xmm8
vmovdqa XMMWORD[128+r11],xmm9
vmovdqa XMMWORD[144+r11],xmm10
vmovdqa XMMWORD[160+r11],xmm11
vmovdqa XMMWORD[176+r11],xmm12
vmovdqa XMMWORD[192+r11],xmm13
vmovdqa XMMWORD[208+r11],xmm14
vmovdqa XMMWORD[224+r11],xmm15
$L$do_avx_body:
sub rdx,64
lea rax,[((-32))+rsi]
cmovc rsi,rax
vmovdqu xmm14,XMMWORD[48+rdi]
lea rdi,[112+rdi]
lea rcx,[$L$const]
vmovdqu xmm5,XMMWORD[32+rsi]
vmovdqu xmm6,XMMWORD[48+rsi]
vmovdqa xmm15,XMMWORD[64+rcx]
vpsrldq xmm7,xmm5,6
vpsrldq xmm8,xmm6,6
vpunpckhqdq xmm9,xmm5,xmm6
vpunpcklqdq xmm5,xmm5,xmm6
vpunpcklqdq xmm8,xmm7,xmm8
vpsrlq xmm9,xmm9,40
vpsrlq xmm6,xmm5,26
vpand xmm5,xmm5,xmm15
vpsrlq xmm7,xmm8,4
vpand xmm6,xmm6,xmm15
vpsrlq xmm8,xmm8,30
vpand xmm7,xmm7,xmm15
vpand xmm8,xmm8,xmm15
vpor xmm9,xmm9,XMMWORD[32+rcx]
jbe NEAR $L$skip_loop_avx
vmovdqu xmm11,XMMWORD[((-48))+rdi]
vmovdqu xmm12,XMMWORD[((-32))+rdi]
vpshufd xmm13,xmm14,0xEE
vpshufd xmm10,xmm14,0x44
vmovdqa XMMWORD[(-144)+r11],xmm13
vmovdqa XMMWORD[rsp],xmm10
vpshufd xmm14,xmm11,0xEE
vmovdqu xmm10,XMMWORD[((-16))+rdi]
vpshufd xmm11,xmm11,0x44
vmovdqa XMMWORD[(-128)+r11],xmm14
vmovdqa XMMWORD[16+rsp],xmm11
vpshufd xmm13,xmm12,0xEE
vmovdqu xmm11,XMMWORD[rdi]
vpshufd xmm12,xmm12,0x44
vmovdqa XMMWORD[(-112)+r11],xmm13
vmovdqa XMMWORD[32+rsp],xmm12
vpshufd xmm14,xmm10,0xEE
vmovdqu xmm12,XMMWORD[16+rdi]
vpshufd xmm10,xmm10,0x44
vmovdqa XMMWORD[(-96)+r11],xmm14
vmovdqa XMMWORD[48+rsp],xmm10
vpshufd xmm13,xmm11,0xEE
vmovdqu xmm10,XMMWORD[32+rdi]
vpshufd xmm11,xmm11,0x44
vmovdqa XMMWORD[(-80)+r11],xmm13
vmovdqa XMMWORD[64+rsp],xmm11
vpshufd xmm14,xmm12,0xEE
vmovdqu xmm11,XMMWORD[48+rdi]
vpshufd xmm12,xmm12,0x44
vmovdqa XMMWORD[(-64)+r11],xmm14
vmovdqa XMMWORD[80+rsp],xmm12
vpshufd xmm13,xmm10,0xEE
vmovdqu xmm12,XMMWORD[64+rdi]
vpshufd xmm10,xmm10,0x44
vmovdqa XMMWORD[(-48)+r11],xmm13
vmovdqa XMMWORD[96+rsp],xmm10
vpshufd xmm14,xmm11,0xEE
vpshufd xmm11,xmm11,0x44
vmovdqa XMMWORD[(-32)+r11],xmm14
vmovdqa XMMWORD[112+rsp],xmm11
vpshufd xmm13,xmm12,0xEE
vmovdqa xmm14,XMMWORD[rsp]
vpshufd xmm12,xmm12,0x44
vmovdqa XMMWORD[(-16)+r11],xmm13
vmovdqa XMMWORD[128+rsp],xmm12
jmp NEAR $L$oop_avx
ALIGN 32
$L$oop_avx:
vpmuludq xmm10,xmm14,xmm5
vpmuludq xmm11,xmm14,xmm6
vmovdqa XMMWORD[32+r11],xmm2
vpmuludq xmm12,xmm14,xmm7
vmovdqa xmm2,XMMWORD[16+rsp]
vpmuludq xmm13,xmm14,xmm8
vpmuludq xmm14,xmm14,xmm9
vmovdqa XMMWORD[r11],xmm0
vpmuludq xmm0,xmm9,XMMWORD[32+rsp]
vmovdqa XMMWORD[16+r11],xmm1
vpmuludq xmm1,xmm2,xmm8
vpaddq xmm10,xmm10,xmm0
vpaddq xmm14,xmm14,xmm1
vmovdqa XMMWORD[48+r11],xmm3
vpmuludq xmm0,xmm2,xmm7
vpmuludq xmm1,xmm2,xmm6
vpaddq xmm13,xmm13,xmm0
vmovdqa xmm3,XMMWORD[48+rsp]
vpaddq xmm12,xmm12,xmm1
vmovdqa XMMWORD[64+r11],xmm4
vpmuludq xmm2,xmm2,xmm5
vpmuludq xmm0,xmm3,xmm7
vpaddq xmm11,xmm11,xmm2
vmovdqa xmm4,XMMWORD[64+rsp]
vpaddq xmm14,xmm14,xmm0
vpmuludq xmm1,xmm3,xmm6
vpmuludq xmm3,xmm3,xmm5
vpaddq xmm13,xmm13,xmm1
vmovdqa xmm2,XMMWORD[80+rsp]
vpaddq xmm12,xmm12,xmm3
vpmuludq xmm0,xmm4,xmm9
vpmuludq xmm4,xmm4,xmm8
vpaddq xmm11,xmm11,xmm0
vmovdqa xmm3,XMMWORD[96+rsp]
vpaddq xmm10,xmm10,xmm4
vmovdqa xmm4,XMMWORD[128+rsp]
vpmuludq xmm1,xmm2,xmm6
vpmuludq xmm2,xmm2,xmm5
vpaddq xmm14,xmm14,xmm1
vpaddq xmm13,xmm13,xmm2
vpmuludq xmm0,xmm3,xmm9
vpmuludq xmm1,xmm3,xmm8
vpaddq xmm12,xmm12,xmm0
vmovdqu xmm0,XMMWORD[rsi]
vpaddq xmm11,xmm11,xmm1
vpmuludq xmm3,xmm3,xmm7
vpmuludq xmm7,xmm4,xmm7
vpaddq xmm10,xmm10,xmm3
vmovdqu xmm1,XMMWORD[16+rsi]
vpaddq xmm11,xmm11,xmm7
vpmuludq xmm8,xmm4,xmm8
vpmuludq xmm9,xmm4,xmm9
vpsrldq xmm2,xmm0,6
vpaddq xmm12,xmm12,xmm8
vpaddq xmm13,xmm13,xmm9
vpsrldq xmm3,xmm1,6
vpmuludq xmm9,xmm5,XMMWORD[112+rsp]
vpmuludq xmm5,xmm4,xmm6
vpunpckhqdq xmm4,xmm0,xmm1
vpaddq xmm14,xmm14,xmm9
vmovdqa xmm9,XMMWORD[((-144))+r11]
vpaddq xmm10,xmm10,xmm5
vpunpcklqdq xmm0,xmm0,xmm1
vpunpcklqdq xmm3,xmm2,xmm3
vpsrldq xmm4,xmm4,5
vpsrlq xmm1,xmm0,26
vpand xmm0,xmm0,xmm15
vpsrlq xmm2,xmm3,4
vpand xmm1,xmm1,xmm15
vpand xmm4,xmm4,XMMWORD[rcx]
vpsrlq xmm3,xmm3,30
vpand xmm2,xmm2,xmm15
vpand xmm3,xmm3,xmm15
vpor xmm4,xmm4,XMMWORD[32+rcx]
vpaddq xmm0,xmm0,XMMWORD[r11]
vpaddq xmm1,xmm1,XMMWORD[16+r11]
vpaddq xmm2,xmm2,XMMWORD[32+r11]
vpaddq xmm3,xmm3,XMMWORD[48+r11]
vpaddq xmm4,xmm4,XMMWORD[64+r11]
lea rax,[32+rsi]
lea rsi,[64+rsi]
sub rdx,64
cmovc rsi,rax
vpmuludq xmm5,xmm9,xmm0
vpmuludq xmm6,xmm9,xmm1
vpaddq xmm10,xmm10,xmm5
vpaddq xmm11,xmm11,xmm6
vmovdqa xmm7,XMMWORD[((-128))+r11]
vpmuludq xmm5,xmm9,xmm2
vpmuludq xmm6,xmm9,xmm3
vpaddq xmm12,xmm12,xmm5
vpaddq xmm13,xmm13,xmm6
vpmuludq xmm9,xmm9,xmm4
vpmuludq xmm5,xmm4,XMMWORD[((-112))+r11]
vpaddq xmm14,xmm14,xmm9
vpaddq xmm10,xmm10,xmm5
vpmuludq xmm6,xmm7,xmm2
vpmuludq xmm5,xmm7,xmm3
vpaddq xmm13,xmm13,xmm6
vmovdqa xmm8,XMMWORD[((-96))+r11]
vpaddq xmm14,xmm14,xmm5
vpmuludq xmm6,xmm7,xmm1
vpmuludq xmm7,xmm7,xmm0
vpaddq xmm12,xmm12,xmm6
vpaddq xmm11,xmm11,xmm7
vmovdqa xmm9,XMMWORD[((-80))+r11]
vpmuludq xmm5,xmm8,xmm2
vpmuludq xmm6,xmm8,xmm1
vpaddq xmm14,xmm14,xmm5
vpaddq xmm13,xmm13,xmm6
vmovdqa xmm7,XMMWORD[((-64))+r11]
vpmuludq xmm8,xmm8,xmm0
vpmuludq xmm5,xmm9,xmm4
vpaddq xmm12,xmm12,xmm8
vpaddq xmm11,xmm11,xmm5
vmovdqa xmm8,XMMWORD[((-48))+r11]
vpmuludq xmm9,xmm9,xmm3
vpmuludq xmm6,xmm7,xmm1
vpaddq xmm10,xmm10,xmm9
vmovdqa xmm9,XMMWORD[((-16))+r11]
vpaddq xmm14,xmm14,xmm6
vpmuludq xmm7,xmm7,xmm0
vpmuludq xmm5,xmm8,xmm4
vpaddq xmm13,xmm13,xmm7
vpaddq xmm12,xmm12,xmm5
vmovdqu xmm5,XMMWORD[32+rsi]
vpmuludq xmm7,xmm8,xmm3
vpmuludq xmm8,xmm8,xmm2
vpaddq xmm11,xmm11,xmm7
vmovdqu xmm6,XMMWORD[48+rsi]
vpaddq xmm10,xmm10,xmm8
vpmuludq xmm2,xmm9,xmm2
vpmuludq xmm3,xmm9,xmm3
vpsrldq xmm7,xmm5,6
vpaddq xmm11,xmm11,xmm2
vpmuludq xmm4,xmm9,xmm4
vpsrldq xmm8,xmm6,6
vpaddq xmm2,xmm12,xmm3
vpaddq xmm3,xmm13,xmm4
vpmuludq xmm4,xmm0,XMMWORD[((-32))+r11]
vpmuludq xmm0,xmm9,xmm1
vpunpckhqdq xmm9,xmm5,xmm6
vpaddq xmm4,xmm14,xmm4
vpaddq xmm0,xmm10,xmm0
vpunpcklqdq xmm5,xmm5,xmm6
vpunpcklqdq xmm8,xmm7,xmm8
vpsrldq xmm9,xmm9,5
vpsrlq xmm6,xmm5,26
vmovdqa xmm14,XMMWORD[rsp]
vpand xmm5,xmm5,xmm15
vpsrlq xmm7,xmm8,4
vpand xmm6,xmm6,xmm15
vpand xmm9,xmm9,XMMWORD[rcx]
vpsrlq xmm8,xmm8,30
vpand xmm7,xmm7,xmm15
vpand xmm8,xmm8,xmm15
vpor xmm9,xmm9,XMMWORD[32+rcx]
vpsrlq xmm13,xmm3,26
vpand xmm3,xmm3,xmm15
vpaddq xmm4,xmm4,xmm13
vpsrlq xmm10,xmm0,26
vpand xmm0,xmm0,xmm15
vpaddq xmm1,xmm11,xmm10
vpsrlq xmm10,xmm4,26
vpand xmm4,xmm4,xmm15
vpsrlq xmm11,xmm1,26
vpand xmm1,xmm1,xmm15
vpaddq xmm2,xmm2,xmm11
vpaddq xmm0,xmm0,xmm10
vpsllq xmm10,xmm10,2
vpaddq xmm0,xmm0,xmm10
vpsrlq xmm12,xmm2,26
vpand xmm2,xmm2,xmm15
vpaddq xmm3,xmm3,xmm12
vpsrlq xmm10,xmm0,26
vpand xmm0,xmm0,xmm15
vpaddq xmm1,xmm1,xmm10
vpsrlq xmm13,xmm3,26
vpand xmm3,xmm3,xmm15
vpaddq xmm4,xmm4,xmm13
ja NEAR $L$oop_avx
$L$skip_loop_avx:
vpshufd xmm14,xmm14,0x10
add rdx,32
jnz NEAR $L$ong_tail_avx
vpaddq xmm7,xmm7,xmm2
vpaddq xmm5,xmm5,xmm0
vpaddq xmm6,xmm6,xmm1
vpaddq xmm8,xmm8,xmm3
vpaddq xmm9,xmm9,xmm4
$L$ong_tail_avx:
vmovdqa XMMWORD[32+r11],xmm2
vmovdqa XMMWORD[r11],xmm0
vmovdqa XMMWORD[16+r11],xmm1
vmovdqa XMMWORD[48+r11],xmm3
vmovdqa XMMWORD[64+r11],xmm4
vpmuludq xmm12,xmm14,xmm7
vpmuludq xmm10,xmm14,xmm5
vpshufd xmm2,XMMWORD[((-48))+rdi],0x10
vpmuludq xmm11,xmm14,xmm6
vpmuludq xmm13,xmm14,xmm8
vpmuludq xmm14,xmm14,xmm9
vpmuludq xmm0,xmm2,xmm8
vpaddq xmm14,xmm14,xmm0
vpshufd xmm3,XMMWORD[((-32))+rdi],0x10
vpmuludq xmm1,xmm2,xmm7
vpaddq xmm13,xmm13,xmm1
vpshufd xmm4,XMMWORD[((-16))+rdi],0x10
vpmuludq xmm0,xmm2,xmm6
vpaddq xmm12,xmm12,xmm0
vpmuludq xmm2,xmm2,xmm5
vpaddq xmm11,xmm11,xmm2
vpmuludq xmm3,xmm3,xmm9
vpaddq xmm10,xmm10,xmm3
vpshufd xmm2,XMMWORD[rdi],0x10
vpmuludq xmm1,xmm4,xmm7
vpaddq xmm14,xmm14,xmm1
vpmuludq xmm0,xmm4,xmm6
vpaddq xmm13,xmm13,xmm0
vpshufd xmm3,XMMWORD[16+rdi],0x10
vpmuludq xmm4,xmm4,xmm5
vpaddq xmm12,xmm12,xmm4
vpmuludq xmm1,xmm2,xmm9
vpaddq xmm11,xmm11,xmm1
vpshufd xmm4,XMMWORD[32+rdi],0x10
vpmuludq xmm2,xmm2,xmm8
vpaddq xmm10,xmm10,xmm2
vpmuludq xmm0,xmm3,xmm6
vpaddq xmm14,xmm14,xmm0
vpmuludq xmm3,xmm3,xmm5
vpaddq xmm13,xmm13,xmm3
vpshufd xmm2,XMMWORD[48+rdi],0x10
vpmuludq xmm1,xmm4,xmm9
vpaddq xmm12,xmm12,xmm1
vpshufd xmm3,XMMWORD[64+rdi],0x10
vpmuludq xmm0,xmm4,xmm8
vpaddq xmm11,xmm11,xmm0
vpmuludq xmm4,xmm4,xmm7
vpaddq xmm10,xmm10,xmm4
vpmuludq xmm2,xmm2,xmm5
vpaddq xmm14,xmm14,xmm2
vpmuludq xmm1,xmm3,xmm9
vpaddq xmm13,xmm13,xmm1
vpmuludq xmm0,xmm3,xmm8
vpaddq xmm12,xmm12,xmm0
vpmuludq xmm1,xmm3,xmm7
vpaddq xmm11,xmm11,xmm1
vpmuludq xmm3,xmm3,xmm6
vpaddq xmm10,xmm10,xmm3
jz NEAR $L$short_tail_avx
vmovdqu xmm0,XMMWORD[rsi]
vmovdqu xmm1,XMMWORD[16+rsi]
vpsrldq xmm2,xmm0,6
vpsrldq xmm3,xmm1,6
vpunpckhqdq xmm4,xmm0,xmm1
vpunpcklqdq xmm0,xmm0,xmm1
vpunpcklqdq xmm3,xmm2,xmm3
vpsrlq xmm4,xmm4,40
vpsrlq xmm1,xmm0,26
vpand xmm0,xmm0,xmm15
vpsrlq xmm2,xmm3,4
vpand xmm1,xmm1,xmm15
vpsrlq xmm3,xmm3,30
vpand xmm2,xmm2,xmm15
vpand xmm3,xmm3,xmm15
vpor xmm4,xmm4,XMMWORD[32+rcx]
vpshufd xmm9,XMMWORD[((-64))+rdi],0x32
vpaddq xmm0,xmm0,XMMWORD[r11]
vpaddq xmm1,xmm1,XMMWORD[16+r11]
vpaddq xmm2,xmm2,XMMWORD[32+r11]
vpaddq xmm3,xmm3,XMMWORD[48+r11]
vpaddq xmm4,xmm4,XMMWORD[64+r11]
vpmuludq xmm5,xmm9,xmm0
vpaddq xmm10,xmm10,xmm5
vpmuludq xmm6,xmm9,xmm1
vpaddq xmm11,xmm11,xmm6
vpmuludq xmm5,xmm9,xmm2
vpaddq xmm12,xmm12,xmm5
vpshufd xmm7,XMMWORD[((-48))+rdi],0x32
vpmuludq xmm6,xmm9,xmm3
vpaddq xmm13,xmm13,xmm6
vpmuludq xmm9,xmm9,xmm4
vpaddq xmm14,xmm14,xmm9
vpmuludq xmm5,xmm7,xmm3
vpaddq xmm14,xmm14,xmm5
vpshufd xmm8,XMMWORD[((-32))+rdi],0x32
vpmuludq xmm6,xmm7,xmm2
vpaddq xmm13,xmm13,xmm6
vpshufd xmm9,XMMWORD[((-16))+rdi],0x32
vpmuludq xmm5,xmm7,xmm1
vpaddq xmm12,xmm12,xmm5
vpmuludq xmm7,xmm7,xmm0
vpaddq xmm11,xmm11,xmm7
vpmuludq xmm8,xmm8,xmm4
vpaddq xmm10,xmm10,xmm8
vpshufd xmm7,XMMWORD[rdi],0x32
vpmuludq xmm6,xmm9,xmm2
vpaddq xmm14,xmm14,xmm6
vpmuludq xmm5,xmm9,xmm1
vpaddq xmm13,xmm13,xmm5
vpshufd xmm8,XMMWORD[16+rdi],0x32
vpmuludq xmm9,xmm9,xmm0
vpaddq xmm12,xmm12,xmm9
vpmuludq xmm6,xmm7,xmm4
vpaddq xmm11,xmm11,xmm6
vpshufd xmm9,XMMWORD[32+rdi],0x32
vpmuludq xmm7,xmm7,xmm3
vpaddq xmm10,xmm10,xmm7
vpmuludq xmm5,xmm8,xmm1
vpaddq xmm14,xmm14,xmm5
vpmuludq xmm8,xmm8,xmm0
vpaddq xmm13,xmm13,xmm8
vpshufd xmm7,XMMWORD[48+rdi],0x32
vpmuludq xmm6,xmm9,xmm4
vpaddq xmm12,xmm12,xmm6
vpshufd xmm8,XMMWORD[64+rdi],0x32
vpmuludq xmm5,xmm9,xmm3
vpaddq xmm11,xmm11,xmm5
vpmuludq xmm9,xmm9,xmm2
vpaddq xmm10,xmm10,xmm9
vpmuludq xmm7,xmm7,xmm0
vpaddq xmm14,xmm14,xmm7
vpmuludq xmm6,xmm8,xmm4
vpaddq xmm13,xmm13,xmm6
vpmuludq xmm5,xmm8,xmm3
vpaddq xmm12,xmm12,xmm5
vpmuludq xmm6,xmm8,xmm2
vpaddq xmm11,xmm11,xmm6
vpmuludq xmm8,xmm8,xmm1
vpaddq xmm10,xmm10,xmm8
$L$short_tail_avx:
vpsrldq xmm9,xmm14,8
vpsrldq xmm8,xmm13,8
vpsrldq xmm6,xmm11,8
vpsrldq xmm5,xmm10,8
vpsrldq xmm7,xmm12,8
vpaddq xmm13,xmm13,xmm8
vpaddq xmm14,xmm14,xmm9
vpaddq xmm10,xmm10,xmm5
vpaddq xmm11,xmm11,xmm6
vpaddq xmm12,xmm12,xmm7
vpsrlq xmm3,xmm13,26
vpand xmm13,xmm13,xmm15
vpaddq xmm14,xmm14,xmm3
vpsrlq xmm0,xmm10,26
vpand xmm10,xmm10,xmm15
vpaddq xmm11,xmm11,xmm0
vpsrlq xmm4,xmm14,26
vpand xmm14,xmm14,xmm15
vpsrlq xmm1,xmm11,26
vpand xmm11,xmm11,xmm15
vpaddq xmm12,xmm12,xmm1
vpaddq xmm10,xmm10,xmm4
vpsllq xmm4,xmm4,2
vpaddq xmm10,xmm10,xmm4
vpsrlq xmm2,xmm12,26
vpand xmm12,xmm12,xmm15
vpaddq xmm13,xmm13,xmm2
vpsrlq xmm0,xmm10,26
vpand xmm10,xmm10,xmm15
vpaddq xmm11,xmm11,xmm0
vpsrlq xmm3,xmm13,26
vpand xmm13,xmm13,xmm15
vpaddq xmm14,xmm14,xmm3
vmovd DWORD[(-112)+rdi],xmm10
vmovd DWORD[(-108)+rdi],xmm11
vmovd DWORD[(-104)+rdi],xmm12
vmovd DWORD[(-100)+rdi],xmm13
vmovd DWORD[(-96)+rdi],xmm14
vmovdqa xmm6,XMMWORD[80+r11]
vmovdqa xmm7,XMMWORD[96+r11]
vmovdqa xmm8,XMMWORD[112+r11]
vmovdqa xmm9,XMMWORD[128+r11]
vmovdqa xmm10,XMMWORD[144+r11]
vmovdqa xmm11,XMMWORD[160+r11]
vmovdqa xmm12,XMMWORD[176+r11]
vmovdqa xmm13,XMMWORD[192+r11]
vmovdqa xmm14,XMMWORD[208+r11]
vmovdqa xmm15,XMMWORD[224+r11]
lea rsp,[248+r11]
$L$do_avx_epilogue:
vzeroupper
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_avx:
ALIGN 32
poly1305_emit_avx:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_emit_avx:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
cmp DWORD[20+rdi],0
je NEAR $L$emit
mov eax,DWORD[rdi]
mov ecx,DWORD[4+rdi]
mov r8d,DWORD[8+rdi]
mov r11d,DWORD[12+rdi]
mov r10d,DWORD[16+rdi]
shl rcx,26
mov r9,r8
shl r8,52
add rax,rcx
shr r9,12
add r8,rax
adc r9,0
shl r11,14
mov rax,r10
shr r10,24
add r9,r11
shl rax,40
add r9,rax
adc r10,0
mov rax,r10
mov rcx,r10
and r10,3
shr rax,2
and rcx,-4
add rax,rcx
add r8,rax
adc r9,0
adc r10,0
mov rax,r8
add r8,5
mov rcx,r9
adc r9,0
adc r10,0
shr r10,2
cmovnz rax,r8
cmovnz rcx,r9
add rax,QWORD[rdx]
adc rcx,QWORD[8+rdx]
mov QWORD[rsi],rax
mov QWORD[8+rsi],rcx
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_emit_avx:
ALIGN 32
poly1305_blocks_avx2:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_avx2:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8d,DWORD[20+rdi]
cmp rdx,128
jae NEAR $L$blocks_avx2
test r8d,r8d
jz NEAR $L$blocks
$L$blocks_avx2:
and rdx,-16
jz NEAR $L$no_data_avx2
vzeroupper
test r8d,r8d
jz NEAR $L$base2_64_avx2
test rdx,63
jz NEAR $L$even_avx2
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$blocks_avx2_body:
mov r15,rdx
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14d,r8d
and r8,-2147483648
mov r12,r9
mov ebx,r9d
and r9,-2147483648
shr r8,6
shl r12,52
add r14,r8
shr rbx,12
shr r9,18
add r14,r12
adc rbx,r9
mov r8,rbp
shl r8,40
shr rbp,24
add rbx,r8
adc rbp,0
mov r9,-4
mov r8,rbp
and r9,rbp
shr r8,2
and rbp,3
add r8,r9
add r14,r8
adc rbx,0
adc rbp,0
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
$L$base2_26_pre_avx2:
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
sub r15,16
call __poly1305_block
mov rax,r12
test r15,63
jnz NEAR $L$base2_26_pre_avx2
test rcx,rcx
jz NEAR $L$store_base2_64_avx2
mov rax,r14
mov rdx,r14
shr r14,52
mov r11,rbx
mov r12,rbx
shr rdx,26
and rax,0x3ffffff
shl r11,12
and rdx,0x3ffffff
shr rbx,14
or r14,r11
shl rbp,24
and r14,0x3ffffff
shr r12,40
and rbx,0x3ffffff
or rbp,r12
test r15,r15
jz NEAR $L$store_base2_26_avx2
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
jmp NEAR $L$proceed_avx2
ALIGN 32
$L$store_base2_64_avx2:
mov QWORD[rdi],r14
mov QWORD[8+rdi],rbx
mov QWORD[16+rdi],rbp
jmp NEAR $L$done_avx2
ALIGN 16
$L$store_base2_26_avx2:
mov DWORD[rdi],eax
mov DWORD[4+rdi],edx
mov DWORD[8+rdi],r14d
mov DWORD[12+rdi],ebx
mov DWORD[16+rdi],ebp
ALIGN 16
$L$done_avx2:
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rsp,[48+rsp]
$L$no_data_avx2:
$L$blocks_avx2_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
ALIGN 32
$L$base2_64_avx2:
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$base2_64_avx2_body:
mov r15,rdx
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14,QWORD[rdi]
mov rbx,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
test rdx,63
jz NEAR $L$init_avx2
$L$base2_64_pre_avx2:
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
sub r15,16
call __poly1305_block
mov rax,r12
test r15,63
jnz NEAR $L$base2_64_pre_avx2
$L$init_avx2:
mov rax,r14
mov rdx,r14
shr r14,52
mov r8,rbx
mov r9,rbx
shr rdx,26
and rax,0x3ffffff
shl r8,12
and rdx,0x3ffffff
shr rbx,14
or r14,r8
shl rbp,24
and r14,0x3ffffff
shr r9,40
and rbx,0x3ffffff
or rbp,r9
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
mov DWORD[20+rdi],1
call __poly1305_init_avx
$L$proceed_avx2:
mov rdx,r15
mov r10d,DWORD[((OPENSSL_ia32cap_P+8))]
mov r11d,3221291008
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rax,[48+rsp]
lea rsp,[48+rsp]
$L$base2_64_avx2_epilogue:
jmp NEAR $L$do_avx2
ALIGN 32
$L$even_avx2:
mov r10d,DWORD[((OPENSSL_ia32cap_P+8))]
vmovd xmm0,DWORD[rdi]
vmovd xmm1,DWORD[4+rdi]
vmovd xmm2,DWORD[8+rdi]
vmovd xmm3,DWORD[12+rdi]
vmovd xmm4,DWORD[16+rdi]
$L$do_avx2:
cmp rdx,512
jb NEAR $L$skip_avx512
and r10d,r11d
test r10d,65536
jnz NEAR $L$blocks_avx512
$L$skip_avx512:
lea r11,[((-248))+rsp]
sub rsp,0x1c8
vmovdqa XMMWORD[80+r11],xmm6
vmovdqa XMMWORD[96+r11],xmm7
vmovdqa XMMWORD[112+r11],xmm8
vmovdqa XMMWORD[128+r11],xmm9
vmovdqa XMMWORD[144+r11],xmm10
vmovdqa XMMWORD[160+r11],xmm11
vmovdqa XMMWORD[176+r11],xmm12
vmovdqa XMMWORD[192+r11],xmm13
vmovdqa XMMWORD[208+r11],xmm14
vmovdqa XMMWORD[224+r11],xmm15
$L$do_avx2_body:
lea rcx,[$L$const]
lea rdi,[((48+64))+rdi]
vmovdqa ymm7,YMMWORD[96+rcx]
vmovdqu xmm9,XMMWORD[((-64))+rdi]
and rsp,-512
vmovdqu xmm10,XMMWORD[((-48))+rdi]
vmovdqu xmm6,XMMWORD[((-32))+rdi]
vmovdqu xmm11,XMMWORD[((-16))+rdi]
vmovdqu xmm12,XMMWORD[rdi]
vmovdqu xmm13,XMMWORD[16+rdi]
lea rax,[144+rsp]
vmovdqu xmm14,XMMWORD[32+rdi]
vpermd ymm9,ymm7,ymm9
vmovdqu xmm15,XMMWORD[48+rdi]
vpermd ymm10,ymm7,ymm10
vmovdqu xmm5,XMMWORD[64+rdi]
vpermd ymm6,ymm7,ymm6
vmovdqa YMMWORD[rsp],ymm9
vpermd ymm11,ymm7,ymm11
vmovdqa YMMWORD[(32-144)+rax],ymm10
vpermd ymm12,ymm7,ymm12
vmovdqa YMMWORD[(64-144)+rax],ymm6
vpermd ymm13,ymm7,ymm13
vmovdqa YMMWORD[(96-144)+rax],ymm11
vpermd ymm14,ymm7,ymm14
vmovdqa YMMWORD[(128-144)+rax],ymm12
vpermd ymm15,ymm7,ymm15
vmovdqa YMMWORD[(160-144)+rax],ymm13
vpermd ymm5,ymm7,ymm5
vmovdqa YMMWORD[(192-144)+rax],ymm14
vmovdqa YMMWORD[(224-144)+rax],ymm15
vmovdqa YMMWORD[(256-144)+rax],ymm5
vmovdqa ymm5,YMMWORD[64+rcx]
vmovdqu xmm7,XMMWORD[rsi]
vmovdqu xmm8,XMMWORD[16+rsi]
vinserti128 ymm7,ymm7,XMMWORD[32+rsi],1
vinserti128 ymm8,ymm8,XMMWORD[48+rsi],1
lea rsi,[64+rsi]
vpsrldq ymm9,ymm7,6
vpsrldq ymm10,ymm8,6
vpunpckhqdq ymm6,ymm7,ymm8
vpunpcklqdq ymm9,ymm9,ymm10
vpunpcklqdq ymm7,ymm7,ymm8
vpsrlq ymm10,ymm9,30
vpsrlq ymm9,ymm9,4
vpsrlq ymm8,ymm7,26
vpsrlq ymm6,ymm6,40
vpand ymm9,ymm9,ymm5
vpand ymm7,ymm7,ymm5
vpand ymm8,ymm8,ymm5
vpand ymm10,ymm10,ymm5
vpor ymm6,ymm6,YMMWORD[32+rcx]
vpaddq ymm2,ymm9,ymm2
sub rdx,64
jz NEAR $L$tail_avx2
jmp NEAR $L$oop_avx2
ALIGN 32
$L$oop_avx2:
vpaddq ymm0,ymm7,ymm0
vmovdqa ymm7,YMMWORD[rsp]
vpaddq ymm1,ymm8,ymm1
vmovdqa ymm8,YMMWORD[32+rsp]
vpaddq ymm3,ymm10,ymm3
vmovdqa ymm9,YMMWORD[96+rsp]
vpaddq ymm4,ymm6,ymm4
vmovdqa ymm10,YMMWORD[48+rax]
vmovdqa ymm5,YMMWORD[112+rax]
vpmuludq ymm13,ymm7,ymm2
vpmuludq ymm14,ymm8,ymm2
vpmuludq ymm15,ymm9,ymm2
vpmuludq ymm11,ymm10,ymm2
vpmuludq ymm12,ymm5,ymm2
vpmuludq ymm6,ymm8,ymm0
vpmuludq ymm2,ymm8,ymm1
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm4,YMMWORD[64+rsp]
vpaddq ymm15,ymm15,ymm6
vpaddq ymm11,ymm11,ymm2
vmovdqa ymm8,YMMWORD[((-16))+rax]
vpmuludq ymm6,ymm7,ymm0
vpmuludq ymm2,ymm7,ymm1
vpaddq ymm11,ymm11,ymm6
vpaddq ymm12,ymm12,ymm2
vpmuludq ymm6,ymm7,ymm3
vpmuludq ymm2,ymm7,ymm4
vmovdqu xmm7,XMMWORD[rsi]
vpaddq ymm14,ymm14,ymm6
vpaddq ymm15,ymm15,ymm2
vinserti128 ymm7,ymm7,XMMWORD[32+rsi],1
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm8,ymm4
vmovdqu xmm8,XMMWORD[16+rsi]
vpaddq ymm11,ymm11,ymm6
vpaddq ymm12,ymm12,ymm2
vmovdqa ymm2,YMMWORD[16+rax]
vpmuludq ymm6,ymm9,ymm1
vpmuludq ymm9,ymm9,ymm0
vpaddq ymm14,ymm14,ymm6
vpaddq ymm13,ymm13,ymm9
vinserti128 ymm8,ymm8,XMMWORD[48+rsi],1
lea rsi,[64+rsi]
vpmuludq ymm6,ymm2,ymm1
vpmuludq ymm2,ymm2,ymm0
vpsrldq ymm9,ymm7,6
vpaddq ymm15,ymm15,ymm6
vpaddq ymm14,ymm14,ymm2
vpmuludq ymm6,ymm10,ymm3
vpmuludq ymm2,ymm10,ymm4
vpsrldq ymm10,ymm8,6
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpunpckhqdq ymm6,ymm7,ymm8
vpmuludq ymm3,ymm5,ymm3
vpmuludq ymm4,ymm5,ymm4
vpunpcklqdq ymm7,ymm7,ymm8
vpaddq ymm2,ymm13,ymm3
vpaddq ymm3,ymm14,ymm4
vpunpcklqdq ymm10,ymm9,ymm10
vpmuludq ymm4,ymm0,YMMWORD[80+rax]
vpmuludq ymm0,ymm5,ymm1
vmovdqa ymm5,YMMWORD[64+rcx]
vpaddq ymm4,ymm15,ymm4
vpaddq ymm0,ymm11,ymm0
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm12,ymm11
vpsrlq ymm15,ymm4,26
vpand ymm4,ymm4,ymm5
vpsrlq ymm9,ymm10,4
vpsrlq ymm12,ymm1,26
vpand ymm1,ymm1,ymm5
vpaddq ymm2,ymm2,ymm12
vpaddq ymm0,ymm0,ymm15
vpsllq ymm15,ymm15,2
vpaddq ymm0,ymm0,ymm15
vpand ymm9,ymm9,ymm5
vpsrlq ymm8,ymm7,26
vpsrlq ymm13,ymm2,26
vpand ymm2,ymm2,ymm5
vpaddq ymm3,ymm3,ymm13
vpaddq ymm2,ymm2,ymm9
vpsrlq ymm10,ymm10,30
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm1,ymm11
vpsrlq ymm6,ymm6,40
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vpand ymm7,ymm7,ymm5
vpand ymm8,ymm8,ymm5
vpand ymm10,ymm10,ymm5
vpor ymm6,ymm6,YMMWORD[32+rcx]
sub rdx,64
jnz NEAR $L$oop_avx2
DB 0x66,0x90
$L$tail_avx2:
vpaddq ymm0,ymm7,ymm0
vmovdqu ymm7,YMMWORD[4+rsp]
vpaddq ymm1,ymm8,ymm1
vmovdqu ymm8,YMMWORD[36+rsp]
vpaddq ymm3,ymm10,ymm3
vmovdqu ymm9,YMMWORD[100+rsp]
vpaddq ymm4,ymm6,ymm4
vmovdqu ymm10,YMMWORD[52+rax]
vmovdqu ymm5,YMMWORD[116+rax]
vpmuludq ymm13,ymm7,ymm2
vpmuludq ymm14,ymm8,ymm2
vpmuludq ymm15,ymm9,ymm2
vpmuludq ymm11,ymm10,ymm2
vpmuludq ymm12,ymm5,ymm2
vpmuludq ymm6,ymm8,ymm0
vpmuludq ymm2,ymm8,ymm1
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm4,YMMWORD[68+rsp]
vpaddq ymm15,ymm15,ymm6
vpaddq ymm11,ymm11,ymm2
vpmuludq ymm6,ymm7,ymm0
vpmuludq ymm2,ymm7,ymm1
vpaddq ymm11,ymm11,ymm6
vmovdqu ymm8,YMMWORD[((-12))+rax]
vpaddq ymm12,ymm12,ymm2
vpmuludq ymm6,ymm7,ymm3
vpmuludq ymm2,ymm7,ymm4
vpaddq ymm14,ymm14,ymm6
vpaddq ymm15,ymm15,ymm2
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm8,ymm4
vpaddq ymm11,ymm11,ymm6
vpaddq ymm12,ymm12,ymm2
vmovdqu ymm2,YMMWORD[20+rax]
vpmuludq ymm6,ymm9,ymm1
vpmuludq ymm9,ymm9,ymm0
vpaddq ymm14,ymm14,ymm6
vpaddq ymm13,ymm13,ymm9
vpmuludq ymm6,ymm2,ymm1
vpmuludq ymm2,ymm2,ymm0
vpaddq ymm15,ymm15,ymm6
vpaddq ymm14,ymm14,ymm2
vpmuludq ymm6,ymm10,ymm3
vpmuludq ymm2,ymm10,ymm4
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpmuludq ymm3,ymm5,ymm3
vpmuludq ymm4,ymm5,ymm4
vpaddq ymm2,ymm13,ymm3
vpaddq ymm3,ymm14,ymm4
vpmuludq ymm4,ymm0,YMMWORD[84+rax]
vpmuludq ymm0,ymm5,ymm1
vmovdqa ymm5,YMMWORD[64+rcx]
vpaddq ymm4,ymm15,ymm4
vpaddq ymm0,ymm11,ymm0
vpsrldq ymm8,ymm12,8
vpsrldq ymm9,ymm2,8
vpsrldq ymm10,ymm3,8
vpsrldq ymm6,ymm4,8
vpsrldq ymm7,ymm0,8
vpaddq ymm12,ymm12,ymm8
vpaddq ymm2,ymm2,ymm9
vpaddq ymm3,ymm3,ymm10
vpaddq ymm4,ymm4,ymm6
vpaddq ymm0,ymm0,ymm7
vpermq ymm10,ymm3,0x2
vpermq ymm6,ymm4,0x2
vpermq ymm7,ymm0,0x2
vpermq ymm8,ymm12,0x2
vpermq ymm9,ymm2,0x2
vpaddq ymm3,ymm3,ymm10
vpaddq ymm4,ymm4,ymm6
vpaddq ymm0,ymm0,ymm7
vpaddq ymm12,ymm12,ymm8
vpaddq ymm2,ymm2,ymm9
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm12,ymm11
vpsrlq ymm15,ymm4,26
vpand ymm4,ymm4,ymm5
vpsrlq ymm12,ymm1,26
vpand ymm1,ymm1,ymm5
vpaddq ymm2,ymm2,ymm12
vpaddq ymm0,ymm0,ymm15
vpsllq ymm15,ymm15,2
vpaddq ymm0,ymm0,ymm15
vpsrlq ymm13,ymm2,26
vpand ymm2,ymm2,ymm5
vpaddq ymm3,ymm3,ymm13
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm1,ymm11
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vmovd DWORD[(-112)+rdi],xmm0
vmovd DWORD[(-108)+rdi],xmm1
vmovd DWORD[(-104)+rdi],xmm2
vmovd DWORD[(-100)+rdi],xmm3
vmovd DWORD[(-96)+rdi],xmm4
vmovdqa xmm6,XMMWORD[80+r11]
vmovdqa xmm7,XMMWORD[96+r11]
vmovdqa xmm8,XMMWORD[112+r11]
vmovdqa xmm9,XMMWORD[128+r11]
vmovdqa xmm10,XMMWORD[144+r11]
vmovdqa xmm11,XMMWORD[160+r11]
vmovdqa xmm12,XMMWORD[176+r11]
vmovdqa xmm13,XMMWORD[192+r11]
vmovdqa xmm14,XMMWORD[208+r11]
vmovdqa xmm15,XMMWORD[224+r11]
lea rsp,[248+r11]
$L$do_avx2_epilogue:
vzeroupper
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_avx2:
ALIGN 32
poly1305_blocks_avx512:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_avx512:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
$L$blocks_avx512:
mov eax,15
kmovw k2,eax
lea r11,[((-248))+rsp]
sub rsp,0x1c8
vmovdqa XMMWORD[80+r11],xmm6
vmovdqa XMMWORD[96+r11],xmm7
vmovdqa XMMWORD[112+r11],xmm8
vmovdqa XMMWORD[128+r11],xmm9
vmovdqa XMMWORD[144+r11],xmm10
vmovdqa XMMWORD[160+r11],xmm11
vmovdqa XMMWORD[176+r11],xmm12
vmovdqa XMMWORD[192+r11],xmm13
vmovdqa XMMWORD[208+r11],xmm14
vmovdqa XMMWORD[224+r11],xmm15
$L$do_avx512_body:
lea rcx,[$L$const]
lea rdi,[((48+64))+rdi]
vmovdqa ymm9,YMMWORD[96+rcx]
vmovdqu xmm11,XMMWORD[((-64))+rdi]
and rsp,-512
vmovdqu xmm12,XMMWORD[((-48))+rdi]
mov rax,0x20
vmovdqu xmm7,XMMWORD[((-32))+rdi]
vmovdqu xmm13,XMMWORD[((-16))+rdi]
vmovdqu xmm8,XMMWORD[rdi]
vmovdqu xmm14,XMMWORD[16+rdi]
vmovdqu xmm10,XMMWORD[32+rdi]
vmovdqu xmm15,XMMWORD[48+rdi]
vmovdqu xmm6,XMMWORD[64+rdi]
vpermd zmm16,zmm9,zmm11
vpbroadcastq zmm5,QWORD[64+rcx]
vpermd zmm17,zmm9,zmm12
vpermd zmm21,zmm9,zmm7
vpermd zmm18,zmm9,zmm13
vmovdqa64 ZMMWORD[rsp]{k2},zmm16
vpsrlq zmm7,zmm16,32
vpermd zmm22,zmm9,zmm8
vmovdqu64 ZMMWORD[rax*1+rsp]{k2},zmm17
vpsrlq zmm8,zmm17,32
vpermd zmm19,zmm9,zmm14
vmovdqa64 ZMMWORD[64+rsp]{k2},zmm21
vpermd zmm23,zmm9,zmm10
vpermd zmm20,zmm9,zmm15
vmovdqu64 ZMMWORD[64+rax*1+rsp]{k2},zmm18
vpermd zmm24,zmm9,zmm6
vmovdqa64 ZMMWORD[128+rsp]{k2},zmm22
vmovdqu64 ZMMWORD[128+rax*1+rsp]{k2},zmm19
vmovdqa64 ZMMWORD[192+rsp]{k2},zmm23
vmovdqu64 ZMMWORD[192+rax*1+rsp]{k2},zmm20
vmovdqa64 ZMMWORD[256+rsp]{k2},zmm24
vpmuludq zmm11,zmm16,zmm7
vpmuludq zmm12,zmm17,zmm7
vpmuludq zmm13,zmm18,zmm7
vpmuludq zmm14,zmm19,zmm7
vpmuludq zmm15,zmm20,zmm7
vpsrlq zmm9,zmm18,32
vpmuludq zmm25,zmm24,zmm8
vpmuludq zmm26,zmm16,zmm8
vpmuludq zmm27,zmm17,zmm8
vpmuludq zmm28,zmm18,zmm8
vpmuludq zmm29,zmm19,zmm8
vpsrlq zmm10,zmm19,32
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpmuludq zmm25,zmm23,zmm9
vpmuludq zmm26,zmm24,zmm9
vpmuludq zmm28,zmm17,zmm9
vpmuludq zmm29,zmm18,zmm9
vpmuludq zmm27,zmm16,zmm9
vpsrlq zmm6,zmm20,32
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm13,zmm13,zmm27
vpmuludq zmm25,zmm22,zmm10
vpmuludq zmm28,zmm16,zmm10
vpmuludq zmm29,zmm17,zmm10
vpmuludq zmm26,zmm23,zmm10
vpmuludq zmm27,zmm24,zmm10
vpaddq zmm11,zmm11,zmm25
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vpmuludq zmm28,zmm24,zmm6
vpmuludq zmm29,zmm16,zmm6
vpmuludq zmm25,zmm21,zmm6
vpmuludq zmm26,zmm22,zmm6
vpmuludq zmm27,zmm23,zmm6
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vmovdqu64 zmm10,ZMMWORD[rsi]
vmovdqu64 zmm6,ZMMWORD[64+rsi]
lea rsi,[128+rsi]
vpsrlq zmm28,zmm14,26
vpandq zmm14,zmm14,zmm5
vpaddq zmm15,zmm15,zmm28
vpsrlq zmm25,zmm11,26
vpandq zmm11,zmm11,zmm5
vpaddq zmm12,zmm12,zmm25
vpsrlq zmm29,zmm15,26
vpandq zmm15,zmm15,zmm5
vpsrlq zmm26,zmm12,26
vpandq zmm12,zmm12,zmm5
vpaddq zmm13,zmm13,zmm26
vpaddq zmm11,zmm11,zmm29
vpsllq zmm29,zmm29,2
vpaddq zmm11,zmm11,zmm29
vpsrlq zmm27,zmm13,26
vpandq zmm13,zmm13,zmm5
vpaddq zmm14,zmm14,zmm27
vpsrlq zmm25,zmm11,26
vpandq zmm11,zmm11,zmm5
vpaddq zmm12,zmm12,zmm25
vpsrlq zmm28,zmm14,26
vpandq zmm14,zmm14,zmm5
vpaddq zmm15,zmm15,zmm28
vpunpcklqdq zmm7,zmm10,zmm6
vpunpckhqdq zmm6,zmm10,zmm6
vmovdqa32 zmm25,ZMMWORD[128+rcx]
mov eax,0x7777
kmovw k1,eax
vpermd zmm16,zmm25,zmm16
vpermd zmm17,zmm25,zmm17
vpermd zmm18,zmm25,zmm18
vpermd zmm19,zmm25,zmm19
vpermd zmm20,zmm25,zmm20
vpermd zmm16{k1},zmm25,zmm11
vpermd zmm17{k1},zmm25,zmm12
vpermd zmm18{k1},zmm25,zmm13
vpermd zmm19{k1},zmm25,zmm14
vpermd zmm20{k1},zmm25,zmm15
vpslld zmm21,zmm17,2
vpslld zmm22,zmm18,2
vpslld zmm23,zmm19,2
vpslld zmm24,zmm20,2
vpaddd zmm21,zmm21,zmm17
vpaddd zmm22,zmm22,zmm18
vpaddd zmm23,zmm23,zmm19
vpaddd zmm24,zmm24,zmm20
vpbroadcastq zmm30,QWORD[32+rcx]
vpsrlq zmm9,zmm7,52
vpsllq zmm10,zmm6,12
vporq zmm9,zmm9,zmm10
vpsrlq zmm8,zmm7,26
vpsrlq zmm10,zmm6,14
vpsrlq zmm6,zmm6,40
vpandq zmm9,zmm9,zmm5
vpandq zmm7,zmm7,zmm5
vpaddq zmm2,zmm9,zmm2
sub rdx,192
jbe NEAR $L$tail_avx512
jmp NEAR $L$oop_avx512
ALIGN 32
$L$oop_avx512:
vpmuludq zmm14,zmm17,zmm2
vpaddq zmm0,zmm7,zmm0
vpmuludq zmm15,zmm18,zmm2
vpandq zmm8,zmm8,zmm5
vpmuludq zmm11,zmm23,zmm2
vpandq zmm10,zmm10,zmm5
vpmuludq zmm12,zmm24,zmm2
vporq zmm6,zmm6,zmm30
vpmuludq zmm13,zmm16,zmm2
vpaddq zmm1,zmm8,zmm1
vpaddq zmm3,zmm10,zmm3
vpaddq zmm4,zmm6,zmm4
vmovdqu64 zmm10,ZMMWORD[rsi]
vmovdqu64 zmm6,ZMMWORD[64+rsi]
lea rsi,[128+rsi]
vpmuludq zmm28,zmm19,zmm0
vpmuludq zmm29,zmm20,zmm0
vpmuludq zmm25,zmm16,zmm0
vpmuludq zmm26,zmm17,zmm0
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vpmuludq zmm28,zmm18,zmm1
vpmuludq zmm29,zmm19,zmm1
vpmuludq zmm25,zmm24,zmm1
vpmuludq zmm27,zmm18,zmm0
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm13,zmm13,zmm27
vpunpcklqdq zmm7,zmm10,zmm6
vpunpckhqdq zmm6,zmm10,zmm6
vpmuludq zmm28,zmm16,zmm3
vpmuludq zmm29,zmm17,zmm3
vpmuludq zmm26,zmm16,zmm1
vpmuludq zmm27,zmm17,zmm1
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vpmuludq zmm28,zmm24,zmm4
vpmuludq zmm29,zmm16,zmm4
vpmuludq zmm25,zmm22,zmm3
vpmuludq zmm26,zmm23,zmm3
vpaddq zmm14,zmm14,zmm28
vpmuludq zmm27,zmm24,zmm3
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vpmuludq zmm25,zmm21,zmm4
vpmuludq zmm26,zmm22,zmm4
vpmuludq zmm27,zmm23,zmm4
vpaddq zmm0,zmm11,zmm25
vpaddq zmm1,zmm12,zmm26
vpaddq zmm2,zmm13,zmm27
vpsrlq zmm9,zmm7,52
vpsllq zmm10,zmm6,12
vpsrlq zmm3,zmm14,26
vpandq zmm14,zmm14,zmm5
vpaddq zmm4,zmm15,zmm3
vporq zmm9,zmm9,zmm10
vpsrlq zmm11,zmm0,26
vpandq zmm0,zmm0,zmm5
vpaddq zmm1,zmm1,zmm11
vpandq zmm9,zmm9,zmm5
vpsrlq zmm15,zmm4,26
vpandq zmm4,zmm4,zmm5
vpsrlq zmm12,zmm1,26
vpandq zmm1,zmm1,zmm5
vpaddq zmm2,zmm2,zmm12
vpaddq zmm0,zmm0,zmm15
vpsllq zmm15,zmm15,2
vpaddq zmm0,zmm0,zmm15
vpaddq zmm2,zmm2,zmm9
vpsrlq zmm8,zmm7,26
vpsrlq zmm13,zmm2,26
vpandq zmm2,zmm2,zmm5
vpaddq zmm3,zmm14,zmm13
vpsrlq zmm10,zmm6,14
vpsrlq zmm11,zmm0,26
vpandq zmm0,zmm0,zmm5
vpaddq zmm1,zmm1,zmm11
vpsrlq zmm6,zmm6,40
vpsrlq zmm14,zmm3,26
vpandq zmm3,zmm3,zmm5
vpaddq zmm4,zmm4,zmm14
vpandq zmm7,zmm7,zmm5
sub rdx,128
ja NEAR $L$oop_avx512
$L$tail_avx512:
vpsrlq zmm16,zmm16,32
vpsrlq zmm17,zmm17,32
vpsrlq zmm18,zmm18,32
vpsrlq zmm23,zmm23,32
vpsrlq zmm24,zmm24,32
vpsrlq zmm19,zmm19,32
vpsrlq zmm20,zmm20,32
vpsrlq zmm21,zmm21,32
vpsrlq zmm22,zmm22,32
lea rsi,[rdx*1+rsi]
vpaddq zmm0,zmm7,zmm0
vpmuludq zmm14,zmm17,zmm2
vpmuludq zmm15,zmm18,zmm2
vpmuludq zmm11,zmm23,zmm2
vpandq zmm8,zmm8,zmm5
vpmuludq zmm12,zmm24,zmm2
vpandq zmm10,zmm10,zmm5
vpmuludq zmm13,zmm16,zmm2
vporq zmm6,zmm6,zmm30
vpaddq zmm1,zmm8,zmm1
vpaddq zmm3,zmm10,zmm3
vpaddq zmm4,zmm6,zmm4
vmovdqu xmm7,XMMWORD[rsi]
vpmuludq zmm28,zmm19,zmm0
vpmuludq zmm29,zmm20,zmm0
vpmuludq zmm25,zmm16,zmm0
vpmuludq zmm26,zmm17,zmm0
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vmovdqu xmm8,XMMWORD[16+rsi]
vpmuludq zmm28,zmm18,zmm1
vpmuludq zmm29,zmm19,zmm1
vpmuludq zmm25,zmm24,zmm1
vpmuludq zmm27,zmm18,zmm0
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm13,zmm13,zmm27
vinserti128 ymm7,ymm7,XMMWORD[32+rsi],1
vpmuludq zmm28,zmm16,zmm3
vpmuludq zmm29,zmm17,zmm3
vpmuludq zmm26,zmm16,zmm1
vpmuludq zmm27,zmm17,zmm1
vpaddq zmm14,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vinserti128 ymm8,ymm8,XMMWORD[48+rsi],1
vpmuludq zmm28,zmm24,zmm4
vpmuludq zmm29,zmm16,zmm4
vpmuludq zmm25,zmm22,zmm3
vpmuludq zmm26,zmm23,zmm3
vpmuludq zmm27,zmm24,zmm3
vpaddq zmm3,zmm14,zmm28
vpaddq zmm15,zmm15,zmm29
vpaddq zmm11,zmm11,zmm25
vpaddq zmm12,zmm12,zmm26
vpaddq zmm13,zmm13,zmm27
vpmuludq zmm25,zmm21,zmm4
vpmuludq zmm26,zmm22,zmm4
vpmuludq zmm27,zmm23,zmm4
vpaddq zmm0,zmm11,zmm25
vpaddq zmm1,zmm12,zmm26
vpaddq zmm2,zmm13,zmm27
mov eax,1
vpermq zmm14,zmm3,0xb1
vpermq zmm4,zmm15,0xb1
vpermq zmm11,zmm0,0xb1
vpermq zmm12,zmm1,0xb1
vpermq zmm13,zmm2,0xb1
vpaddq zmm3,zmm3,zmm14
vpaddq zmm4,zmm4,zmm15
vpaddq zmm0,zmm0,zmm11
vpaddq zmm1,zmm1,zmm12
vpaddq zmm2,zmm2,zmm13
kmovw k3,eax
vpermq zmm14,zmm3,0x2
vpermq zmm15,zmm4,0x2
vpermq zmm11,zmm0,0x2
vpermq zmm12,zmm1,0x2
vpermq zmm13,zmm2,0x2
vpaddq zmm3,zmm3,zmm14
vpaddq zmm4,zmm4,zmm15
vpaddq zmm0,zmm0,zmm11
vpaddq zmm1,zmm1,zmm12
vpaddq zmm2,zmm2,zmm13
vextracti64x4 ymm14,zmm3,0x1
vextracti64x4 ymm15,zmm4,0x1
vextracti64x4 ymm11,zmm0,0x1
vextracti64x4 ymm12,zmm1,0x1
vextracti64x4 ymm13,zmm2,0x1
vpaddq zmm3{k3}{z},zmm3,zmm14
vpaddq zmm4{k3}{z},zmm4,zmm15
vpaddq zmm0{k3}{z},zmm0,zmm11
vpaddq zmm1{k3}{z},zmm1,zmm12
vpaddq zmm2{k3}{z},zmm2,zmm13
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpsrldq ymm9,ymm7,6
vpsrldq ymm10,ymm8,6
vpunpckhqdq ymm6,ymm7,ymm8
vpaddq ymm4,ymm4,ymm14
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpunpcklqdq ymm9,ymm9,ymm10
vpunpcklqdq ymm7,ymm7,ymm8
vpaddq ymm1,ymm1,ymm11
vpsrlq ymm15,ymm4,26
vpand ymm4,ymm4,ymm5
vpsrlq ymm12,ymm1,26
vpand ymm1,ymm1,ymm5
vpsrlq ymm10,ymm9,30
vpsrlq ymm9,ymm9,4
vpaddq ymm2,ymm2,ymm12
vpaddq ymm0,ymm0,ymm15
vpsllq ymm15,ymm15,2
vpsrlq ymm8,ymm7,26
vpsrlq ymm6,ymm6,40
vpaddq ymm0,ymm0,ymm15
vpsrlq ymm13,ymm2,26
vpand ymm2,ymm2,ymm5
vpand ymm9,ymm9,ymm5
vpand ymm7,ymm7,ymm5
vpaddq ymm3,ymm3,ymm13
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm2,ymm9,ymm2
vpand ymm8,ymm8,ymm5
vpaddq ymm1,ymm1,ymm11
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpand ymm10,ymm10,ymm5
vpor ymm6,ymm6,YMMWORD[32+rcx]
vpaddq ymm4,ymm4,ymm14
lea rax,[144+rsp]
add rdx,64
jnz NEAR $L$tail_avx2
vpsubq ymm2,ymm2,ymm9
vmovd DWORD[(-112)+rdi],xmm0
vmovd DWORD[(-108)+rdi],xmm1
vmovd DWORD[(-104)+rdi],xmm2
vmovd DWORD[(-100)+rdi],xmm3
vmovd DWORD[(-96)+rdi],xmm4
vzeroall
movdqa xmm6,XMMWORD[80+r11]
movdqa xmm7,XMMWORD[96+r11]
movdqa xmm8,XMMWORD[112+r11]
movdqa xmm9,XMMWORD[128+r11]
movdqa xmm10,XMMWORD[144+r11]
movdqa xmm11,XMMWORD[160+r11]
movdqa xmm12,XMMWORD[176+r11]
movdqa xmm13,XMMWORD[192+r11]
movdqa xmm14,XMMWORD[208+r11]
movdqa xmm15,XMMWORD[224+r11]
lea rsp,[248+r11]
$L$do_avx512_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_avx512:
ALIGN 32
poly1305_init_base2_44:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_init_base2_44:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
xor rax,rax
mov QWORD[rdi],rax
mov QWORD[8+rdi],rax
mov QWORD[16+rdi],rax
$L$init_base2_44:
lea r10,[poly1305_blocks_vpmadd52]
lea r11,[poly1305_emit_base2_44]
mov rax,0x0ffffffc0fffffff
mov rcx,0x0ffffffc0ffffffc
and rax,QWORD[rsi]
mov r8,0x00000fffffffffff
and rcx,QWORD[8+rsi]
mov r9,0x00000fffffffffff
and r8,rax
shrd rax,rcx,44
mov QWORD[40+rdi],r8
and rax,r9
shr rcx,24
mov QWORD[48+rdi],rax
lea rax,[rax*4+rax]
mov QWORD[56+rdi],rcx
shl rax,2
lea rcx,[rcx*4+rcx]
shl rcx,2
mov QWORD[24+rdi],rax
mov QWORD[32+rdi],rcx
mov QWORD[64+rdi],-1
mov QWORD[rdx],r10
mov QWORD[8+rdx],r11
mov eax,1
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_init_base2_44:
ALIGN 32
poly1305_blocks_vpmadd52:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_vpmadd52:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
shr rdx,4
jz NEAR $L$no_data_vpmadd52
shl rcx,40
mov r8,QWORD[64+rdi]
mov rax,3
mov r10,1
cmp rdx,4
cmovae rax,r10
test r8,r8
cmovns rax,r10
and rax,rdx
jz NEAR $L$blocks_vpmadd52_4x
sub rdx,rax
mov r10d,7
mov r11d,1
kmovw k7,r10d
lea r10,[$L$2_44_inp_permd]
kmovw k1,r11d
vmovq xmm21,rcx
vmovdqa64 ymm19,YMMWORD[r10]
vmovdqa64 ymm20,YMMWORD[32+r10]
vpermq ymm21,ymm21,0xcf
vmovdqa64 ymm22,YMMWORD[64+r10]
vmovdqu64 ymm16{k7}{z},[rdi]
vmovdqu64 ymm3{k7}{z},[40+rdi]
vmovdqu64 ymm4{k7}{z},[32+rdi]
vmovdqu64 ymm5{k7}{z},[24+rdi]
vmovdqa64 ymm23,YMMWORD[96+r10]
vmovdqa64 ymm24,YMMWORD[128+r10]
jmp NEAR $L$oop_vpmadd52
ALIGN 32
$L$oop_vpmadd52:
vmovdqu32 xmm18,XMMWORD[rsi]
lea rsi,[16+rsi]
vpermd ymm18,ymm19,ymm18
vpsrlvq ymm18,ymm18,ymm20
vpandq ymm18,ymm18,ymm22
vporq ymm18,ymm18,ymm21
vpaddq ymm16,ymm16,ymm18
vpermq ymm0{k7}{z},ymm16,0
vpermq ymm1{k7}{z},ymm16,85
vpermq ymm2{k7}{z},ymm16,170
vpxord ymm16,ymm16,ymm16
vpxord ymm17,ymm17,ymm17
vpmadd52luq ymm16,ymm0,ymm3
vpmadd52huq ymm17,ymm0,ymm3
vpmadd52luq ymm16,ymm1,ymm4
vpmadd52huq ymm17,ymm1,ymm4
vpmadd52luq ymm16,ymm2,ymm5
vpmadd52huq ymm17,ymm2,ymm5
vpsrlvq ymm18,ymm16,ymm23
vpsllvq ymm17,ymm17,ymm24
vpandq ymm16,ymm16,ymm22
vpaddq ymm17,ymm17,ymm18
vpermq ymm17,ymm17,147
vpaddq ymm16,ymm16,ymm17
vpsrlvq ymm18,ymm16,ymm23
vpandq ymm16,ymm16,ymm22
vpermq ymm18,ymm18,147
vpaddq ymm16,ymm16,ymm18
vpermq ymm18{k1}{z},ymm16,147
vpaddq ymm16,ymm16,ymm18
vpsllq ymm18,ymm18,2
vpaddq ymm16,ymm16,ymm18
dec rax
jnz NEAR $L$oop_vpmadd52
vmovdqu64 YMMWORD[rdi]{k7},ymm16
test rdx,rdx
jnz NEAR $L$blocks_vpmadd52_4x
$L$no_data_vpmadd52:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_vpmadd52:
ALIGN 32
poly1305_blocks_vpmadd52_4x:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_vpmadd52_4x:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
shr rdx,4
jz NEAR $L$no_data_vpmadd52_4x
shl rcx,40
mov r8,QWORD[64+rdi]
$L$blocks_vpmadd52_4x:
vpbroadcastq ymm31,rcx
vmovdqa64 ymm28,YMMWORD[$L$x_mask44]
mov eax,5
vmovdqa64 ymm29,YMMWORD[$L$x_mask42]
kmovw k1,eax
test r8,r8
js NEAR $L$init_vpmadd52
vmovq xmm0,QWORD[rdi]
vmovq xmm1,QWORD[8+rdi]
vmovq xmm2,QWORD[16+rdi]
test rdx,3
jnz NEAR $L$blocks_vpmadd52_2x_do
$L$blocks_vpmadd52_4x_do:
vpbroadcastq ymm3,QWORD[64+rdi]
vpbroadcastq ymm4,QWORD[96+rdi]
vpbroadcastq ymm5,QWORD[128+rdi]
vpbroadcastq ymm16,QWORD[160+rdi]
$L$blocks_vpmadd52_4x_key_loaded:
vpsllq ymm17,ymm5,2
vpaddq ymm17,ymm17,ymm5
vpsllq ymm17,ymm17,2
test rdx,7
jz NEAR $L$blocks_vpmadd52_8x
vmovdqu64 ymm26,YMMWORD[rsi]
vmovdqu64 ymm27,YMMWORD[32+rsi]
lea rsi,[64+rsi]
vpunpcklqdq ymm25,ymm26,ymm27
vpunpckhqdq ymm27,ymm26,ymm27
vpsrlq ymm26,ymm27,24
vporq ymm26,ymm26,ymm31
vpaddq ymm2,ymm2,ymm26
vpandq ymm24,ymm25,ymm28
vpsrlq ymm25,ymm25,44
vpsllq ymm27,ymm27,20
vporq ymm25,ymm25,ymm27
vpandq ymm25,ymm25,ymm28
sub rdx,4
jz NEAR $L$tail_vpmadd52_4x
jmp NEAR $L$oop_vpmadd52_4x
ud2
ALIGN 32
$L$init_vpmadd52:
vmovq xmm16,QWORD[24+rdi]
vmovq xmm2,QWORD[56+rdi]
vmovq xmm17,QWORD[32+rdi]
vmovq xmm3,QWORD[40+rdi]
vmovq xmm4,QWORD[48+rdi]
vmovdqa ymm0,ymm3
vmovdqa ymm1,ymm4
vmovdqa ymm5,ymm2
mov eax,2
$L$mul_init_vpmadd52:
vpxorq ymm18,ymm18,ymm18
vpmadd52luq ymm18,ymm16,ymm2
vpxorq ymm19,ymm19,ymm19
vpmadd52huq ymm19,ymm16,ymm2
vpxorq ymm20,ymm20,ymm20
vpmadd52luq ymm20,ymm17,ymm2
vpxorq ymm21,ymm21,ymm21
vpmadd52huq ymm21,ymm17,ymm2
vpxorq ymm22,ymm22,ymm22
vpmadd52luq ymm22,ymm3,ymm2
vpxorq ymm23,ymm23,ymm23
vpmadd52huq ymm23,ymm3,ymm2
vpmadd52luq ymm18,ymm3,ymm0
vpmadd52huq ymm19,ymm3,ymm0
vpmadd52luq ymm20,ymm4,ymm0
vpmadd52huq ymm21,ymm4,ymm0
vpmadd52luq ymm22,ymm5,ymm0
vpmadd52huq ymm23,ymm5,ymm0
vpmadd52luq ymm18,ymm17,ymm1
vpmadd52huq ymm19,ymm17,ymm1
vpmadd52luq ymm20,ymm3,ymm1
vpmadd52huq ymm21,ymm3,ymm1
vpmadd52luq ymm22,ymm4,ymm1
vpmadd52huq ymm23,ymm4,ymm1
vpsrlq ymm30,ymm18,44
vpsllq ymm19,ymm19,8
vpandq ymm0,ymm18,ymm28
vpaddq ymm19,ymm19,ymm30
vpaddq ymm20,ymm20,ymm19
vpsrlq ymm30,ymm20,44
vpsllq ymm21,ymm21,8
vpandq ymm1,ymm20,ymm28
vpaddq ymm21,ymm21,ymm30
vpaddq ymm22,ymm22,ymm21
vpsrlq ymm30,ymm22,42
vpsllq ymm23,ymm23,10
vpandq ymm2,ymm22,ymm29
vpaddq ymm23,ymm23,ymm30
vpaddq ymm0,ymm0,ymm23
vpsllq ymm23,ymm23,2
vpaddq ymm0,ymm0,ymm23
vpsrlq ymm30,ymm0,44
vpandq ymm0,ymm0,ymm28
vpaddq ymm1,ymm1,ymm30
dec eax
jz NEAR $L$done_init_vpmadd52
vpunpcklqdq ymm4,ymm1,ymm4
vpbroadcastq xmm1,xmm1
vpunpcklqdq ymm5,ymm2,ymm5
vpbroadcastq xmm2,xmm2
vpunpcklqdq ymm3,ymm0,ymm3
vpbroadcastq xmm0,xmm0
vpsllq ymm16,ymm4,2
vpsllq ymm17,ymm5,2
vpaddq ymm16,ymm16,ymm4
vpaddq ymm17,ymm17,ymm5
vpsllq ymm16,ymm16,2
vpsllq ymm17,ymm17,2
jmp NEAR $L$mul_init_vpmadd52
ud2
ALIGN 32
$L$done_init_vpmadd52:
vinserti128 ymm4,ymm1,xmm4,1
vinserti128 ymm5,ymm2,xmm5,1
vinserti128 ymm3,ymm0,xmm3,1
vpermq ymm4,ymm4,216
vpermq ymm5,ymm5,216
vpermq ymm3,ymm3,216
vpsllq ymm16,ymm4,2
vpaddq ymm16,ymm16,ymm4
vpsllq ymm16,ymm16,2
vmovq xmm0,QWORD[rdi]
vmovq xmm1,QWORD[8+rdi]
vmovq xmm2,QWORD[16+rdi]
test rdx,3
jnz NEAR $L$done_init_vpmadd52_2x
vmovdqu64 YMMWORD[64+rdi],ymm3
vpbroadcastq ymm3,xmm3
vmovdqu64 YMMWORD[96+rdi],ymm4
vpbroadcastq ymm4,xmm4
vmovdqu64 YMMWORD[128+rdi],ymm5
vpbroadcastq ymm5,xmm5
vmovdqu64 YMMWORD[160+rdi],ymm16
vpbroadcastq ymm16,xmm16
jmp NEAR $L$blocks_vpmadd52_4x_key_loaded
ud2
ALIGN 32
$L$done_init_vpmadd52_2x:
vmovdqu64 YMMWORD[64+rdi],ymm3
vpsrldq ymm3,ymm3,8
vmovdqu64 YMMWORD[96+rdi],ymm4
vpsrldq ymm4,ymm4,8
vmovdqu64 YMMWORD[128+rdi],ymm5
vpsrldq ymm5,ymm5,8
vmovdqu64 YMMWORD[160+rdi],ymm16
vpsrldq ymm16,ymm16,8
jmp NEAR $L$blocks_vpmadd52_2x_key_loaded
ud2
ALIGN 32
$L$blocks_vpmadd52_2x_do:
vmovdqu64 ymm5{k1}{z},[((128+8))+rdi]
vmovdqu64 ymm16{k1}{z},[((160+8))+rdi]
vmovdqu64 ymm3{k1}{z},[((64+8))+rdi]
vmovdqu64 ymm4{k1}{z},[((96+8))+rdi]
$L$blocks_vpmadd52_2x_key_loaded:
vmovdqu64 ymm26,YMMWORD[rsi]
vpxorq ymm27,ymm27,ymm27
lea rsi,[32+rsi]
vpunpcklqdq ymm25,ymm26,ymm27
vpunpckhqdq ymm27,ymm26,ymm27
vpsrlq ymm26,ymm27,24
vporq ymm26,ymm26,ymm31
vpaddq ymm2,ymm2,ymm26
vpandq ymm24,ymm25,ymm28
vpsrlq ymm25,ymm25,44
vpsllq ymm27,ymm27,20
vporq ymm25,ymm25,ymm27
vpandq ymm25,ymm25,ymm28
jmp NEAR $L$tail_vpmadd52_2x
ud2
ALIGN 32
$L$oop_vpmadd52_4x:
vpaddq ymm0,ymm0,ymm24
vpaddq ymm1,ymm1,ymm25
vpxorq ymm18,ymm18,ymm18
vpmadd52luq ymm18,ymm16,ymm2
vpxorq ymm19,ymm19,ymm19
vpmadd52huq ymm19,ymm16,ymm2
vpxorq ymm20,ymm20,ymm20
vpmadd52luq ymm20,ymm17,ymm2
vpxorq ymm21,ymm21,ymm21
vpmadd52huq ymm21,ymm17,ymm2
vpxorq ymm22,ymm22,ymm22
vpmadd52luq ymm22,ymm3,ymm2
vpxorq ymm23,ymm23,ymm23
vpmadd52huq ymm23,ymm3,ymm2
vmovdqu64 ymm26,YMMWORD[rsi]
vmovdqu64 ymm27,YMMWORD[32+rsi]
lea rsi,[64+rsi]
vpmadd52luq ymm18,ymm3,ymm0
vpmadd52huq ymm19,ymm3,ymm0
vpmadd52luq ymm20,ymm4,ymm0
vpmadd52huq ymm21,ymm4,ymm0
vpmadd52luq ymm22,ymm5,ymm0
vpmadd52huq ymm23,ymm5,ymm0
vpunpcklqdq ymm25,ymm26,ymm27
vpunpckhqdq ymm27,ymm26,ymm27
vpmadd52luq ymm18,ymm17,ymm1
vpmadd52huq ymm19,ymm17,ymm1
vpmadd52luq ymm20,ymm3,ymm1
vpmadd52huq ymm21,ymm3,ymm1
vpmadd52luq ymm22,ymm4,ymm1
vpmadd52huq ymm23,ymm4,ymm1
vpsrlq ymm30,ymm18,44
vpsllq ymm19,ymm19,8
vpandq ymm0,ymm18,ymm28
vpaddq ymm19,ymm19,ymm30
vpsrlq ymm26,ymm27,24
vporq ymm26,ymm26,ymm31
vpaddq ymm20,ymm20,ymm19
vpsrlq ymm30,ymm20,44
vpsllq ymm21,ymm21,8
vpandq ymm1,ymm20,ymm28
vpaddq ymm21,ymm21,ymm30
vpandq ymm24,ymm25,ymm28
vpsrlq ymm25,ymm25,44
vpsllq ymm27,ymm27,20
vpaddq ymm22,ymm22,ymm21
vpsrlq ymm30,ymm22,42
vpsllq ymm23,ymm23,10
vpandq ymm2,ymm22,ymm29
vpaddq ymm23,ymm23,ymm30
vpaddq ymm2,ymm2,ymm26
vpaddq ymm0,ymm0,ymm23
vpsllq ymm23,ymm23,2
vpaddq ymm0,ymm0,ymm23
vporq ymm25,ymm25,ymm27
vpandq ymm25,ymm25,ymm28
vpsrlq ymm30,ymm0,44
vpandq ymm0,ymm0,ymm28
vpaddq ymm1,ymm1,ymm30
sub rdx,4
jnz NEAR $L$oop_vpmadd52_4x
$L$tail_vpmadd52_4x:
vmovdqu64 ymm5,YMMWORD[128+rdi]
vmovdqu64 ymm16,YMMWORD[160+rdi]
vmovdqu64 ymm3,YMMWORD[64+rdi]
vmovdqu64 ymm4,YMMWORD[96+rdi]
$L$tail_vpmadd52_2x:
vpsllq ymm17,ymm5,2
vpaddq ymm17,ymm17,ymm5
vpsllq ymm17,ymm17,2
vpaddq ymm0,ymm0,ymm24
vpaddq ymm1,ymm1,ymm25
vpxorq ymm18,ymm18,ymm18
vpmadd52luq ymm18,ymm16,ymm2
vpxorq ymm19,ymm19,ymm19
vpmadd52huq ymm19,ymm16,ymm2
vpxorq ymm20,ymm20,ymm20
vpmadd52luq ymm20,ymm17,ymm2
vpxorq ymm21,ymm21,ymm21
vpmadd52huq ymm21,ymm17,ymm2
vpxorq ymm22,ymm22,ymm22
vpmadd52luq ymm22,ymm3,ymm2
vpxorq ymm23,ymm23,ymm23
vpmadd52huq ymm23,ymm3,ymm2
vpmadd52luq ymm18,ymm3,ymm0
vpmadd52huq ymm19,ymm3,ymm0
vpmadd52luq ymm20,ymm4,ymm0
vpmadd52huq ymm21,ymm4,ymm0
vpmadd52luq ymm22,ymm5,ymm0
vpmadd52huq ymm23,ymm5,ymm0
vpmadd52luq ymm18,ymm17,ymm1
vpmadd52huq ymm19,ymm17,ymm1
vpmadd52luq ymm20,ymm3,ymm1
vpmadd52huq ymm21,ymm3,ymm1
vpmadd52luq ymm22,ymm4,ymm1
vpmadd52huq ymm23,ymm4,ymm1
mov eax,1
kmovw k1,eax
vpsrldq ymm24,ymm18,8
vpsrldq ymm0,ymm19,8
vpsrldq ymm25,ymm20,8
vpsrldq ymm1,ymm21,8
vpaddq ymm18,ymm18,ymm24
vpaddq ymm19,ymm19,ymm0
vpsrldq ymm26,ymm22,8
vpsrldq ymm2,ymm23,8
vpaddq ymm20,ymm20,ymm25
vpaddq ymm21,ymm21,ymm1
vpermq ymm24,ymm18,0x2
vpermq ymm0,ymm19,0x2
vpaddq ymm22,ymm22,ymm26
vpaddq ymm23,ymm23,ymm2
vpermq ymm25,ymm20,0x2
vpermq ymm1,ymm21,0x2
vpaddq ymm18{k1}{z},ymm18,ymm24
vpaddq ymm19{k1}{z},ymm19,ymm0
vpermq ymm26,ymm22,0x2
vpermq ymm2,ymm23,0x2
vpaddq ymm20{k1}{z},ymm20,ymm25
vpaddq ymm21{k1}{z},ymm21,ymm1
vpaddq ymm22{k1}{z},ymm22,ymm26
vpaddq ymm23{k1}{z},ymm23,ymm2
vpsrlq ymm30,ymm18,44
vpsllq ymm19,ymm19,8
vpandq ymm0,ymm18,ymm28
vpaddq ymm19,ymm19,ymm30
vpaddq ymm20,ymm20,ymm19
vpsrlq ymm30,ymm20,44
vpsllq ymm21,ymm21,8
vpandq ymm1,ymm20,ymm28
vpaddq ymm21,ymm21,ymm30
vpaddq ymm22,ymm22,ymm21
vpsrlq ymm30,ymm22,42
vpsllq ymm23,ymm23,10
vpandq ymm2,ymm22,ymm29
vpaddq ymm23,ymm23,ymm30
vpaddq ymm0,ymm0,ymm23
vpsllq ymm23,ymm23,2
vpaddq ymm0,ymm0,ymm23
vpsrlq ymm30,ymm0,44
vpandq ymm0,ymm0,ymm28
vpaddq ymm1,ymm1,ymm30
sub rdx,2
ja NEAR $L$blocks_vpmadd52_4x_do
vmovq QWORD[rdi],xmm0
vmovq QWORD[8+rdi],xmm1
vmovq QWORD[16+rdi],xmm2
vzeroall
$L$no_data_vpmadd52_4x:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_vpmadd52_4x:
ALIGN 32
poly1305_blocks_vpmadd52_8x:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_vpmadd52_8x:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
shr rdx,4
jz NEAR $L$no_data_vpmadd52_8x
shl rcx,40
mov r8,QWORD[64+rdi]
vmovdqa64 ymm28,YMMWORD[$L$x_mask44]
vmovdqa64 ymm29,YMMWORD[$L$x_mask42]
test r8,r8
js NEAR $L$init_vpmadd52
vmovq xmm0,QWORD[rdi]
vmovq xmm1,QWORD[8+rdi]
vmovq xmm2,QWORD[16+rdi]
$L$blocks_vpmadd52_8x:
vmovdqu64 ymm5,YMMWORD[128+rdi]
vmovdqu64 ymm16,YMMWORD[160+rdi]
vmovdqu64 ymm3,YMMWORD[64+rdi]
vmovdqu64 ymm4,YMMWORD[96+rdi]
vpsllq ymm17,ymm5,2
vpaddq ymm17,ymm17,ymm5
vpsllq ymm17,ymm17,2
vpbroadcastq ymm8,xmm5
vpbroadcastq ymm6,xmm3
vpbroadcastq ymm7,xmm4
vpxorq ymm18,ymm18,ymm18
vpmadd52luq ymm18,ymm16,ymm8
vpxorq ymm19,ymm19,ymm19
vpmadd52huq ymm19,ymm16,ymm8
vpxorq ymm20,ymm20,ymm20
vpmadd52luq ymm20,ymm17,ymm8
vpxorq ymm21,ymm21,ymm21
vpmadd52huq ymm21,ymm17,ymm8
vpxorq ymm22,ymm22,ymm22
vpmadd52luq ymm22,ymm3,ymm8
vpxorq ymm23,ymm23,ymm23
vpmadd52huq ymm23,ymm3,ymm8
vpmadd52luq ymm18,ymm3,ymm6
vpmadd52huq ymm19,ymm3,ymm6
vpmadd52luq ymm20,ymm4,ymm6
vpmadd52huq ymm21,ymm4,ymm6
vpmadd52luq ymm22,ymm5,ymm6
vpmadd52huq ymm23,ymm5,ymm6
vpmadd52luq ymm18,ymm17,ymm7
vpmadd52huq ymm19,ymm17,ymm7
vpmadd52luq ymm20,ymm3,ymm7
vpmadd52huq ymm21,ymm3,ymm7
vpmadd52luq ymm22,ymm4,ymm7
vpmadd52huq ymm23,ymm4,ymm7
vpsrlq ymm30,ymm18,44
vpsllq ymm19,ymm19,8
vpandq ymm6,ymm18,ymm28
vpaddq ymm19,ymm19,ymm30
vpaddq ymm20,ymm20,ymm19
vpsrlq ymm30,ymm20,44
vpsllq ymm21,ymm21,8
vpandq ymm7,ymm20,ymm28
vpaddq ymm21,ymm21,ymm30
vpaddq ymm22,ymm22,ymm21
vpsrlq ymm30,ymm22,42
vpsllq ymm23,ymm23,10
vpandq ymm8,ymm22,ymm29
vpaddq ymm23,ymm23,ymm30
vpaddq ymm6,ymm6,ymm23
vpsllq ymm23,ymm23,2
vpaddq ymm6,ymm6,ymm23
vpsrlq ymm30,ymm6,44
vpandq ymm6,ymm6,ymm28
vpaddq ymm7,ymm7,ymm30
vpunpcklqdq ymm26,ymm8,ymm5
vpunpckhqdq ymm5,ymm8,ymm5
vpunpcklqdq ymm24,ymm6,ymm3
vpunpckhqdq ymm3,ymm6,ymm3
vpunpcklqdq ymm25,ymm7,ymm4
vpunpckhqdq ymm4,ymm7,ymm4
vshufi64x2 zmm8,zmm26,zmm5,0x44
vshufi64x2 zmm6,zmm24,zmm3,0x44
vshufi64x2 zmm7,zmm25,zmm4,0x44
vmovdqu64 zmm26,ZMMWORD[rsi]
vmovdqu64 zmm27,ZMMWORD[64+rsi]
lea rsi,[128+rsi]
vpsllq zmm10,zmm8,2
vpsllq zmm9,zmm7,2
vpaddq zmm10,zmm10,zmm8
vpaddq zmm9,zmm9,zmm7
vpsllq zmm10,zmm10,2
vpsllq zmm9,zmm9,2
vpbroadcastq zmm31,rcx
vpbroadcastq zmm28,xmm28
vpbroadcastq zmm29,xmm29
vpbroadcastq zmm16,xmm9
vpbroadcastq zmm17,xmm10
vpbroadcastq zmm3,xmm6
vpbroadcastq zmm4,xmm7
vpbroadcastq zmm5,xmm8
vpunpcklqdq zmm25,zmm26,zmm27
vpunpckhqdq zmm27,zmm26,zmm27
vpsrlq zmm26,zmm27,24
vporq zmm26,zmm26,zmm31
vpaddq zmm2,zmm2,zmm26
vpandq zmm24,zmm25,zmm28
vpsrlq zmm25,zmm25,44
vpsllq zmm27,zmm27,20
vporq zmm25,zmm25,zmm27
vpandq zmm25,zmm25,zmm28
sub rdx,8
jz NEAR $L$tail_vpmadd52_8x
jmp NEAR $L$oop_vpmadd52_8x
ALIGN 32
$L$oop_vpmadd52_8x:
vpaddq zmm0,zmm0,zmm24
vpaddq zmm1,zmm1,zmm25
vpxorq zmm18,zmm18,zmm18
vpmadd52luq zmm18,zmm16,zmm2
vpxorq zmm19,zmm19,zmm19
vpmadd52huq zmm19,zmm16,zmm2
vpxorq zmm20,zmm20,zmm20
vpmadd52luq zmm20,zmm17,zmm2
vpxorq zmm21,zmm21,zmm21
vpmadd52huq zmm21,zmm17,zmm2
vpxorq zmm22,zmm22,zmm22
vpmadd52luq zmm22,zmm3,zmm2
vpxorq zmm23,zmm23,zmm23
vpmadd52huq zmm23,zmm3,zmm2
vmovdqu64 zmm26,ZMMWORD[rsi]
vmovdqu64 zmm27,ZMMWORD[64+rsi]
lea rsi,[128+rsi]
vpmadd52luq zmm18,zmm3,zmm0
vpmadd52huq zmm19,zmm3,zmm0
vpmadd52luq zmm20,zmm4,zmm0
vpmadd52huq zmm21,zmm4,zmm0
vpmadd52luq zmm22,zmm5,zmm0
vpmadd52huq zmm23,zmm5,zmm0
vpunpcklqdq zmm25,zmm26,zmm27
vpunpckhqdq zmm27,zmm26,zmm27
vpmadd52luq zmm18,zmm17,zmm1
vpmadd52huq zmm19,zmm17,zmm1
vpmadd52luq zmm20,zmm3,zmm1
vpmadd52huq zmm21,zmm3,zmm1
vpmadd52luq zmm22,zmm4,zmm1
vpmadd52huq zmm23,zmm4,zmm1
vpsrlq zmm30,zmm18,44
vpsllq zmm19,zmm19,8
vpandq zmm0,zmm18,zmm28
vpaddq zmm19,zmm19,zmm30
vpsrlq zmm26,zmm27,24
vporq zmm26,zmm26,zmm31
vpaddq zmm20,zmm20,zmm19
vpsrlq zmm30,zmm20,44
vpsllq zmm21,zmm21,8
vpandq zmm1,zmm20,zmm28
vpaddq zmm21,zmm21,zmm30
vpandq zmm24,zmm25,zmm28
vpsrlq zmm25,zmm25,44
vpsllq zmm27,zmm27,20
vpaddq zmm22,zmm22,zmm21
vpsrlq zmm30,zmm22,42
vpsllq zmm23,zmm23,10
vpandq zmm2,zmm22,zmm29
vpaddq zmm23,zmm23,zmm30
vpaddq zmm2,zmm2,zmm26
vpaddq zmm0,zmm0,zmm23
vpsllq zmm23,zmm23,2
vpaddq zmm0,zmm0,zmm23
vporq zmm25,zmm25,zmm27
vpandq zmm25,zmm25,zmm28
vpsrlq zmm30,zmm0,44
vpandq zmm0,zmm0,zmm28
vpaddq zmm1,zmm1,zmm30
sub rdx,8
jnz NEAR $L$oop_vpmadd52_8x
$L$tail_vpmadd52_8x:
vpaddq zmm0,zmm0,zmm24
vpaddq zmm1,zmm1,zmm25
vpxorq zmm18,zmm18,zmm18
vpmadd52luq zmm18,zmm9,zmm2
vpxorq zmm19,zmm19,zmm19
vpmadd52huq zmm19,zmm9,zmm2
vpxorq zmm20,zmm20,zmm20
vpmadd52luq zmm20,zmm10,zmm2
vpxorq zmm21,zmm21,zmm21
vpmadd52huq zmm21,zmm10,zmm2
vpxorq zmm22,zmm22,zmm22
vpmadd52luq zmm22,zmm6,zmm2
vpxorq zmm23,zmm23,zmm23
vpmadd52huq zmm23,zmm6,zmm2
vpmadd52luq zmm18,zmm6,zmm0
vpmadd52huq zmm19,zmm6,zmm0
vpmadd52luq zmm20,zmm7,zmm0
vpmadd52huq zmm21,zmm7,zmm0
vpmadd52luq zmm22,zmm8,zmm0
vpmadd52huq zmm23,zmm8,zmm0
vpmadd52luq zmm18,zmm10,zmm1
vpmadd52huq zmm19,zmm10,zmm1
vpmadd52luq zmm20,zmm6,zmm1
vpmadd52huq zmm21,zmm6,zmm1
vpmadd52luq zmm22,zmm7,zmm1
vpmadd52huq zmm23,zmm7,zmm1
mov eax,1
kmovw k1,eax
vpsrldq zmm24,zmm18,8
vpsrldq zmm0,zmm19,8
vpsrldq zmm25,zmm20,8
vpsrldq zmm1,zmm21,8
vpaddq zmm18,zmm18,zmm24
vpaddq zmm19,zmm19,zmm0
vpsrldq zmm26,zmm22,8
vpsrldq zmm2,zmm23,8
vpaddq zmm20,zmm20,zmm25
vpaddq zmm21,zmm21,zmm1
vpermq zmm24,zmm18,0x2
vpermq zmm0,zmm19,0x2
vpaddq zmm22,zmm22,zmm26
vpaddq zmm23,zmm23,zmm2
vpermq zmm25,zmm20,0x2
vpermq zmm1,zmm21,0x2
vpaddq zmm18,zmm18,zmm24
vpaddq zmm19,zmm19,zmm0
vpermq zmm26,zmm22,0x2
vpermq zmm2,zmm23,0x2
vpaddq zmm20,zmm20,zmm25
vpaddq zmm21,zmm21,zmm1
vextracti64x4 ymm24,zmm18,1
vextracti64x4 ymm0,zmm19,1
vpaddq zmm22,zmm22,zmm26
vpaddq zmm23,zmm23,zmm2
vextracti64x4 ymm25,zmm20,1
vextracti64x4 ymm1,zmm21,1
vextracti64x4 ymm26,zmm22,1
vextracti64x4 ymm2,zmm23,1
vpaddq ymm18{k1}{z},ymm18,ymm24
vpaddq ymm19{k1}{z},ymm19,ymm0
vpaddq ymm20{k1}{z},ymm20,ymm25
vpaddq ymm21{k1}{z},ymm21,ymm1
vpaddq ymm22{k1}{z},ymm22,ymm26
vpaddq ymm23{k1}{z},ymm23,ymm2
vpsrlq ymm30,ymm18,44
vpsllq ymm19,ymm19,8
vpandq ymm0,ymm18,ymm28
vpaddq ymm19,ymm19,ymm30
vpaddq ymm20,ymm20,ymm19
vpsrlq ymm30,ymm20,44
vpsllq ymm21,ymm21,8
vpandq ymm1,ymm20,ymm28
vpaddq ymm21,ymm21,ymm30
vpaddq ymm22,ymm22,ymm21
vpsrlq ymm30,ymm22,42
vpsllq ymm23,ymm23,10
vpandq ymm2,ymm22,ymm29
vpaddq ymm23,ymm23,ymm30
vpaddq ymm0,ymm0,ymm23
vpsllq ymm23,ymm23,2
vpaddq ymm0,ymm0,ymm23
vpsrlq ymm30,ymm0,44
vpandq ymm0,ymm0,ymm28
vpaddq ymm1,ymm1,ymm30
vmovq QWORD[rdi],xmm0
vmovq QWORD[8+rdi],xmm1
vmovq QWORD[16+rdi],xmm2
vzeroall
$L$no_data_vpmadd52_8x:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_vpmadd52_8x:
ALIGN 32
poly1305_emit_base2_44:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_emit_base2_44:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov r10,QWORD[16+rdi]
mov rax,r9
shr r9,20
shl rax,44
mov rcx,r10
shr r10,40
shl rcx,24
add r8,rax
adc r9,rcx
adc r10,0
mov rax,r8
add r8,5
mov rcx,r9
adc r9,0
adc r10,0
shr r10,2
cmovnz rax,r8
cmovnz rcx,r9
add rax,QWORD[rdx]
adc rcx,QWORD[8+rdx]
mov QWORD[rsi],rax
mov QWORD[8+rsi],rcx
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_emit_base2_44:
ALIGN 64
$L$const:
$L$mask24:
DD 0x0ffffff,0,0x0ffffff,0,0x0ffffff,0,0x0ffffff,0
$L$129:
DD 16777216,0,16777216,0,16777216,0,16777216,0
$L$mask26:
DD 0x3ffffff,0,0x3ffffff,0,0x3ffffff,0,0x3ffffff,0
$L$permd_avx2:
DD 2,2,2,3,2,0,2,1
$L$permd_avx512:
DD 0,0,0,1,0,2,0,3,0,4,0,5,0,6,0,7
$L$2_44_inp_permd:
DD 0,1,1,2,2,3,7,7
$L$2_44_inp_shift:
DQ 0,12,24,64
$L$2_44_mask:
DQ 0xfffffffffff,0xfffffffffff,0x3ffffffffff,0xffffffffffffffff
$L$2_44_shift_rgt:
DQ 44,44,42,64
$L$2_44_shift_lft:
DQ 8,8,10,64
ALIGN 64
$L$x_mask44:
DQ 0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
DQ 0xfffffffffff,0xfffffffffff,0xfffffffffff,0xfffffffffff
$L$x_mask42:
DQ 0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
DQ 0x3ffffffffff,0x3ffffffffff,0x3ffffffffff,0x3ffffffffff
DB 80,111,108,121,49,51,48,53,32,102,111,114,32,120,56,54
DB 95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32
DB 98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115
DB 108,46,111,114,103,62,0
ALIGN 16
global xor128_encrypt_n_pad
ALIGN 16
xor128_encrypt_n_pad:
sub rdx,r8
sub rcx,r8
mov r10,r9
shr r9,4
jz NEAR $L$tail_enc
nop
$L$oop_enc_xmm:
movdqu xmm0,XMMWORD[r8*1+rdx]
pxor xmm0,XMMWORD[r8]
movdqu XMMWORD[r8*1+rcx],xmm0
movdqa XMMWORD[r8],xmm0
lea r8,[16+r8]
dec r9
jnz NEAR $L$oop_enc_xmm
and r10,15
jz NEAR $L$done_enc
$L$tail_enc:
mov r9,16
sub r9,r10
xor eax,eax
$L$oop_enc_byte:
mov al,BYTE[r8*1+rdx]
xor al,BYTE[r8]
mov BYTE[r8*1+rcx],al
mov BYTE[r8],al
lea r8,[1+r8]
dec r10
jnz NEAR $L$oop_enc_byte
xor eax,eax
$L$oop_enc_pad:
mov BYTE[r8],al
lea r8,[1+r8]
dec r9
jnz NEAR $L$oop_enc_pad
$L$done_enc:
mov rax,r8
DB 0F3h,0C3h ;repret
global xor128_decrypt_n_pad
ALIGN 16
xor128_decrypt_n_pad:
sub rdx,r8
sub rcx,r8
mov r10,r9
shr r9,4
jz NEAR $L$tail_dec
nop
$L$oop_dec_xmm:
movdqu xmm0,XMMWORD[r8*1+rdx]
movdqa xmm1,XMMWORD[r8]
pxor xmm1,xmm0
movdqu XMMWORD[r8*1+rcx],xmm1
movdqa XMMWORD[r8],xmm0
lea r8,[16+r8]
dec r9
jnz NEAR $L$oop_dec_xmm
pxor xmm1,xmm1
and r10,15
jz NEAR $L$done_dec
$L$tail_dec:
mov r9,16
sub r9,r10
xor eax,eax
xor r11,r11
$L$oop_dec_byte:
mov r11b,BYTE[r8*1+rdx]
mov al,BYTE[r8]
xor al,r11b
mov BYTE[r8*1+rcx],al
mov BYTE[r8],r11b
lea r8,[1+r8]
dec r10
jnz NEAR $L$oop_dec_byte
xor eax,eax
$L$oop_dec_pad:
mov BYTE[r8],al
lea r8,[1+r8]
dec r9
jnz NEAR $L$oop_dec_pad
$L$done_dec:
mov rax,r8
DB 0F3h,0C3h ;repret
EXTERN __imp_RtlVirtualUnwind
ALIGN 16
se_handler:
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD[120+r8]
mov rbx,QWORD[248+r8]
mov rsi,QWORD[8+r9]
mov r11,QWORD[56+r9]
mov r10d,DWORD[r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jb NEAR $L$common_seh_tail
mov rax,QWORD[152+r8]
mov r10d,DWORD[4+r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jae NEAR $L$common_seh_tail
lea rax,[48+rax]
mov rbx,QWORD[((-8))+rax]
mov rbp,QWORD[((-16))+rax]
mov r12,QWORD[((-24))+rax]
mov r13,QWORD[((-32))+rax]
mov r14,QWORD[((-40))+rax]
mov r15,QWORD[((-48))+rax]
mov QWORD[144+r8],rbx
mov QWORD[160+r8],rbp
mov QWORD[216+r8],r12
mov QWORD[224+r8],r13
mov QWORD[232+r8],r14
mov QWORD[240+r8],r15
jmp NEAR $L$common_seh_tail
ALIGN 16
avx_handler:
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD[120+r8]
mov rbx,QWORD[248+r8]
mov rsi,QWORD[8+r9]
mov r11,QWORD[56+r9]
mov r10d,DWORD[r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jb NEAR $L$common_seh_tail
mov rax,QWORD[152+r8]
mov r10d,DWORD[4+r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jae NEAR $L$common_seh_tail
mov rax,QWORD[208+r8]
lea rsi,[80+rax]
lea rax,[248+rax]
lea rdi,[512+r8]
mov ecx,20
DD 0xa548f3fc
$L$common_seh_tail:
mov rdi,QWORD[8+rax]
mov rsi,QWORD[16+rax]
mov QWORD[152+r8],rax
mov QWORD[168+r8],rsi
mov QWORD[176+r8],rdi
mov rdi,QWORD[40+r9]
mov rsi,r8
mov ecx,154
DD 0xa548f3fc
mov rsi,r9
xor rcx,rcx
mov rdx,QWORD[8+rsi]
mov r8,QWORD[rsi]
mov r9,QWORD[16+rsi]
mov r10,QWORD[40+rsi]
lea r11,[56+rsi]
lea r12,[24+rsi]
mov QWORD[32+rsp],r10
mov QWORD[40+rsp],r11
mov QWORD[48+rsp],r12
mov QWORD[56+rsp],rcx
call QWORD[__imp_RtlVirtualUnwind]
mov eax,1
add rsp,64
popfq
pop r15
pop r14
pop r13
pop r12
pop rbp
pop rbx
pop rdi
pop rsi
DB 0F3h,0C3h ;repret
section .pdata rdata align=4
ALIGN 4
DD $L$SEH_begin_poly1305_init wrt ..imagebase
DD $L$SEH_end_poly1305_init wrt ..imagebase
DD $L$SEH_info_poly1305_init wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks wrt ..imagebase
DD $L$SEH_end_poly1305_blocks wrt ..imagebase
DD $L$SEH_info_poly1305_blocks wrt ..imagebase
DD $L$SEH_begin_poly1305_emit wrt ..imagebase
DD $L$SEH_end_poly1305_emit wrt ..imagebase
DD $L$SEH_info_poly1305_emit wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks_avx wrt ..imagebase
DD $L$base2_64_avx wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx_1 wrt ..imagebase
DD $L$base2_64_avx wrt ..imagebase
DD $L$even_avx wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx_2 wrt ..imagebase
DD $L$even_avx wrt ..imagebase
DD $L$SEH_end_poly1305_blocks_avx wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx_3 wrt ..imagebase
DD $L$SEH_begin_poly1305_emit_avx wrt ..imagebase
DD $L$SEH_end_poly1305_emit_avx wrt ..imagebase
DD $L$SEH_info_poly1305_emit_avx wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks_avx2 wrt ..imagebase
DD $L$base2_64_avx2 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx2_1 wrt ..imagebase
DD $L$base2_64_avx2 wrt ..imagebase
DD $L$even_avx2 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx2_2 wrt ..imagebase
DD $L$even_avx2 wrt ..imagebase
DD $L$SEH_end_poly1305_blocks_avx2 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx2_3 wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks_avx512 wrt ..imagebase
DD $L$SEH_end_poly1305_blocks_avx512 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx512 wrt ..imagebase
section .xdata rdata align=8
ALIGN 8
$L$SEH_info_poly1305_init:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$SEH_begin_poly1305_init wrt ..imagebase,$L$SEH_begin_poly1305_init wrt ..imagebase
$L$SEH_info_poly1305_blocks:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$blocks_body wrt ..imagebase,$L$blocks_epilogue wrt ..imagebase
$L$SEH_info_poly1305_emit:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$SEH_begin_poly1305_emit wrt ..imagebase,$L$SEH_begin_poly1305_emit wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx_1:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$blocks_avx_body wrt ..imagebase,$L$blocks_avx_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx_2:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$base2_64_avx_body wrt ..imagebase,$L$base2_64_avx_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx_3:
DB 9,0,0,0
DD avx_handler wrt ..imagebase
DD $L$do_avx_body wrt ..imagebase,$L$do_avx_epilogue wrt ..imagebase
$L$SEH_info_poly1305_emit_avx:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$SEH_begin_poly1305_emit_avx wrt ..imagebase,$L$SEH_begin_poly1305_emit_avx wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx2_1:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$blocks_avx2_body wrt ..imagebase,$L$blocks_avx2_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx2_2:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$base2_64_avx2_body wrt ..imagebase,$L$base2_64_avx2_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx2_3:
DB 9,0,0,0
DD avx_handler wrt ..imagebase
DD $L$do_avx2_body wrt ..imagebase,$L$do_avx2_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx512:
DB 9,0,0,0
DD avx_handler wrt ..imagebase
DD $L$do_avx512_body wrt ..imagebase,$L$do_avx512_epilogue wrt ..imagebase
| 18.109218 | 97 | 0.754496 |
5ae0b049aa1cae7f351787d308584673bb436a1b | 1,232 | asm | Assembly | misc/mips/factorial.asm | crunchbang/Higer | 3c0c59d35dd71dc829efa274b36b1cd197c27a09 | [
"BSD-3-Clause"
] | 3 | 2018-05-03T23:56:05.000Z | 2020-02-11T03:49:50.000Z | misc/mips/factorial.asm | crunchbang/Higer | 3c0c59d35dd71dc829efa274b36b1cd197c27a09 | [
"BSD-3-Clause"
] | null | null | null | misc/mips/factorial.asm | crunchbang/Higer | 3c0c59d35dd71dc829efa274b36b1cd197c27a09 | [
"BSD-3-Clause"
] | null | null | null | ## Recursive function to compute factorial
## factorial:
## $t0 - intermediate result
## $a0 - n (input)
## $v0 - n! (output)
##
.data
n: .word 5
error: .asciiz "Invalid input\n"
.text
main:
# Hardcode input
# lw $a0, n
# Get n from user
li $v0, 5
syscall
move $a0, $v0
# Call factorial
jal factorial
# Show result
beqz $v0, main_error
move $a0, $v0
li $v0, 1
syscall
b exit
# Error
main_error:
la $a0, error
li $v0, 4
syscall
# Exit
exit:
li $v0, 10
syscall
factorial:
# Save args & return address on stack
sub $sp, $sp, 4
sw $ra, 0($sp)
# Check base condition
li $v0, 0
blt $a0, 0, return
li $v0, 1
beq $a0, 0, return
# Save state
sub $sp, $sp, 4
sw $a0, 0($sp)
# Compute arg for recursive call
sub $a0, $a0, 1
# Call factorial(n-1)
jal factorial
# Restore state
lw $a0, 0($sp)
add $sp, $sp, 4
# Compute factorial(n)
mul $v0, $v0, $a0
# Restore return address
return:
lw $ra, 0($sp)
add $sp, $sp, 4
j $ra
# End of factorial
| 17.6 | 42 | 0.491883 |
9a2b3fb9c74df5c19cf0aeff375ff34dd6b817da | 3,699 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1333.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1333.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1333.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r15
push %r8
push %rcx
// Faulty Load
lea addresses_UC+0xdb54, %r13
clflush (%r13)
nop
nop
nop
nop
nop
and $37037, %r8
movb (%r13), %cl
lea oracles, %r13
and $0xff, %rcx
shlq $12, %rcx
mov (%r13,%rcx,1), %rcx
pop %rcx
pop %r8
pop %r15
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 1, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'37': 21829}
37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37
*/
| 84.068182 | 2,999 | 0.663693 |
48faf4afdd20f51f0c28bc72ddeb16ee2114a4db | 362 | asm | Assembly | programs/oeis/120/A120149.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/120/A120149.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/120/A120149.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A120149: a(1)=2; a(n)=floor((7+sum(a(1) to a(n-1)))/3).
; 2,3,4,5,7,9,12,16,21,28,38,50,67,89,119,159,212,282,376,502,669,892,1189,1586,2114,2819,3759,5012,6682,8910,11880,15840,21120,28160,37546,50062,66749,88999,118665,158220,210960,281280,375040,500053,666738
mov $1,2
mov $2,1
lpb $0
sub $0,1
mov $1,$2
add $1,8
div $1,3
add $2,$1
lpe
mov $0,$1
| 25.857143 | 206 | 0.651934 |
5ee534a1659a2ce17b5aa9498a7eb94ff836b24f | 941 | asm | Assembly | oeis/322/A322534.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/322/A322534.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/322/A322534.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A322534: Position of 2/3^n in the sequence of all numbers 1/2^m, 1/3^m, 2/3^m arranged in decreasing order.
; Submitted by Jon Maiga
; 1,5,8,12,15,19,23,26,30,33,37,41,44,48,51,55,58,62,66,69,73,76,80,84,87,91,94,98,101,105,109,112,116,119,123,127,130,134,137,141,144,148,152,155,159,162,166,170,173,177,180,184,188,191,195,198,202,205,209,213,216,220,223,227,231,234,238,241,245,248,252,256,259,263,266,270,274,277,281,284,288,291,295,299,302,306,309,313,317,320,324,327,331,334,338,342,345,349,352,356
mov $3,$0
mov $5,$0
lpb $3
mov $0,$5
sub $3,1
sub $0,$3
mov $6,$0
mov $7,0
mov $8,2
lpb $8
mov $0,$6
sub $8,1
add $0,$8
seq $0,122437 ; Allowable values of the "dropping time" of the Collatz (3x+1) iteration.
mov $2,5
mul $2,$0
mov $0,$2
div $0,5
mov $9,$8
mul $9,$0
add $7,$9
lpe
min $6,1
mul $6,$0
mov $0,$7
sub $0,$6
add $0,1
add $4,$0
lpe
mov $0,$4
add $0,1
| 26.138889 | 370 | 0.613177 |
312263c471d84b44dcce087a454f54e08a1337fc | 510 | asm | Assembly | lib/target/coleco/classic/coleco_crt0.asm | jg1uaa/z88dk | 6a850141690031634af15204ba4066b21c8892ff | [
"ClArtistic"
] | 1 | 2021-08-04T03:14:51.000Z | 2021-08-04T03:14:51.000Z | lib/target/coleco/classic/coleco_crt0.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | null | null | null | lib/target/coleco/classic/coleco_crt0.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | null | null | null | ; Coleco (Console + Adam + Bit90)
MODULE coleco_crt0
defc crt0 = 1
INCLUDE "zcc_opt.def"
EXTERN _main
EXTERN msxbios
PUBLIC l_dcal
PUBLIC cleanup
defc CONSOLE_COLUMNS = 32
defc CONSOLE_ROWS = 24
EXTERN __vdp_enable_status
EXTERN VDP_STATUS
defc __CPU_CLOCK = 3579545
IF (!DEFINED_startup || (startup=1))
INCLUDE "target/coleco/classic/rom.asm"
ELSE
INCLUDE "target/coleco/classic/allram.asm"
ENDIF
| 18.888889 | 43 | 0.621569 |
d5f343635e7d823d37a4ae68ed82136a0ad258f1 | 303 | asm | Assembly | libsrc/_DEVELOPMENT/l/sdcc/____sdcc_ll_sub_deix_bc_hl.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/l/sdcc/____sdcc_ll_sub_deix_bc_hl.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/l/sdcc/____sdcc_ll_sub_deix_bc_hl.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_clib
SECTION code_l_sdcc
PUBLIC ____sdcc_ll_sub_deix_bc_hl
EXTERN ____sdcc_ll_sub_de_bc_hl
____sdcc_ll_sub_deix_bc_hl:
push hl
IFDEF __SDCC_IX
push ix
pop hl
ELSE
push iy
pop hl
ENDIF
add hl,de
ex de,hl
pop hl
jp ____sdcc_ll_sub_de_bc_hl
| 9.774194 | 33 | 0.716172 |
977c4bdcc8446217a95daf734f19347005ffda77 | 2,932 | asm | Assembly | programs/oeis/101/A101376.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/101/A101376.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/101/A101376.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A101376: a(n) = n^2*(n^3 - n^2 + n + 1)/2.
; 0,1,14,99,424,1325,3366,7399,14624,26649,45550,73931,114984,172549,251174,356175,493696,670769,895374,1176499,1524200,1949661,2465254,3084599,3822624,4695625,5721326,6918939,8309224,9914549,11758950,13868191,16269824,18993249,22069774,25532675,29417256,33760909,38603174,43985799,49952800,56550521,63827694,71835499,80627624,90260325,100792486,112285679,124804224,138415249,153188750,169197651,186517864,205228349,225411174,247151575,270538016,295662249,322619374,351507899,382429800,415490581,450799334,488468799,528615424,571359425,616824846,665139619,716435624,770848749,828518950,889590311,954211104,1022533849,1094715374,1170916875,1251303976,1336046789,1425319974,1519302799,1618179200,1722137841,1831372174,1946080499,2066466024,2192736925,2325106406,2463792759,2609019424,2761015049,2920013550,3086254171,3259981544,3441445749,3630902374,3828612575,4034843136,4249866529,4473960974,4707410499,4950505000,5203540301,5466818214,5740646599,6025339424,6321216825,6628605166,6947837099,7279251624,7623194149,7980016550,8350077231,8733741184,9131380049,9543372174,9970102675,10411963496,10869353469,11342678374,11832350999,12338791200,12862425961,13403689454,13963023099,14540875624,15137703125,15753969126,16390144639,17046708224,17724146049,18422951950,19143627491,19886682024,20652632749,21442004774,22255331175,23093153056,23956019609,24844488174,25759124299,26700501800,27669202821,28665817894,29690945999,30745194624,31829179825,32943526286,34088867379,35265845224,36475110749,37717323750,38993152951,40303276064,41648379849,43029160174,44446322075,45900579816,47392656949,48923286374,50493210399,52103180800,53753958881,55446315534,57181031299,58958896424,60780710925,62647284646,64559437319,66517998624,68523808249,70577715950,72680581611,74833275304,77036677349,79291678374,81599179375,83960091776,86375337489,88845848974,91372569299,93956452200,96598462141,99299574374,102060774999,104883061024,107767440425,110714932206,113726566459,116803384424,119946438549,123156792550,126435521471,129783711744,133202461249,136692879374,140256087075,143893216936,147605413229,151393831974,155259640999,159204020000,163228160601,167333266414,171520553099,175791248424,180146592325,184587836966,189116246799,193733098624,198439681649,203237297550,208127260531,213110897384,218189547549,223364563174,228637309175,234009163296,239481516169,245055771374,250733345499,256515668200,262404182261,268400343654,274505621599,280721498624,287049470625,293491046926,300047750339,306721117224,313512697549,320424054950,327456766791,334612424224,341892632249,349299009774,356833189675,364496818856,372291558309,380219083174,388281082799,396479260800,404815335121,413291038094,421908116499,430668331624,439573459325,448625290086,457825629079,467176296224,476679126249
mov $2,$0
lpb $0
lpb $0
sub $0,1
add $4,$2
lpe
lpb $4
trn $3,1
add $3,$2
add $1,$3
sub $4,1
lpe
lpe
| 172.470588 | 2,753 | 0.878581 |
d09e4b09205a67a83d70ecefacdf1a60d5db30f4 | 375 | asm | Assembly | programs/oeis/126/A126446.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/126/A126446.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/126/A126446.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A126446: Column 0 of triangle A126445; a(n) = binomial( binomial(n+2,3), n).
; 1,1,6,120,4845,324632,32468436,4529365776,840261910995,200063149171380,59473554359599446,21592914273609648996,9403538945961296957821,4838670732821812768919800,2904538537066424425438417800,2011833832070058843657188795040,1592750845170051165316494786714111
mov $1,$0
add $0,2
bin $0,3
bin $0,$1
| 46.875 | 256 | 0.829333 |
e016bed25880ad2b5e5fddb6b457462d5d5b7eaf | 6,706 | asm | Assembly | gnu/gcc/gcc/config/sh/lib1funcs-Os-4-200.asm | ArrogantWombatics/openbsd-src | 75721e1d44322953075b7c4b89337b163a395291 | [
"BSD-3-Clause"
] | 105 | 2015-03-02T16:58:34.000Z | 2022-03-28T07:17:49.000Z | gnu/gcc/gcc/config/sh/lib1funcs-Os-4-200.asm | ArrogantWombatics/openbsd-src | 75721e1d44322953075b7c4b89337b163a395291 | [
"BSD-3-Clause"
] | 145 | 2015-03-18T10:08:17.000Z | 2022-03-31T01:27:08.000Z | gnu/gcc/gcc/config/sh/lib1funcs-Os-4-200.asm | ArrogantWombatics/openbsd-src | 75721e1d44322953075b7c4b89337b163a395291 | [
"BSD-3-Clause"
] | 26 | 2015-10-10T09:37:44.000Z | 2022-02-23T02:02:05.000Z | /* Copyright (C) 2006 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version.
In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file into combinations with other programs,
and to distribute those combinations without any restriction coming
from the use of this file. (The General Public License restrictions
do apply in other respects; for example, they cover modification of
the file, and distribution when not linked into a combine
executable.)
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA. */
/* Moderately Space-optimized libgcc routines for the Renesas SH /
STMicroelectronics ST40 CPUs.
Contributed by J"orn Rennecke joern.rennecke@st.com. */
#include "lib1funcs.h"
#if !__SHMEDIA__
#ifdef L_udivsi3_i4i
/* 88 bytes; sh4-200 cycle counts:
divisor >= 2G: 11 cycles
dividend < 2G: 48 cycles
dividend >= 2G: divisor != 1: 54 cycles
dividend >= 2G, divisor == 1: 22 cycles */
#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
!! args in r4 and r5, result in r0, clobber r1
.global GLOBAL(udivsi3_i4i)
FUNC(GLOBAL(udivsi3_i4i))
GLOBAL(udivsi3_i4i):
mova L1,r0
cmp/pz r5
sts fpscr,r1
lds.l @r0+,fpscr
sts.l fpul,@-r15
bf LOCAL(huge_divisor)
mov.l r1,@-r15
lds r4,fpul
cmp/pz r4
#ifdef FMOVD_WORKS
fmov.d dr0,@-r15
float fpul,dr0
fmov.d dr2,@-r15
bt LOCAL(dividend_adjusted)
mov #1,r1
fmov.d @r0,dr2
cmp/eq r1,r5
bt LOCAL(div_by_1)
fadd dr2,dr0
LOCAL(dividend_adjusted):
lds r5,fpul
float fpul,dr2
fdiv dr2,dr0
LOCAL(div_by_1):
fmov.d @r15+,dr2
ftrc dr0,fpul
fmov.d @r15+,dr0
#else /* !FMOVD_WORKS */
fmov.s DR01,@-r15
mov #1,r1
fmov.s DR00,@-r15
float fpul,dr0
fmov.s DR21,@-r15
bt/s LOCAL(dividend_adjusted)
fmov.s DR20,@-r15
cmp/eq r1,r5
bt LOCAL(div_by_1)
fmov.s @r0+,DR20
fmov.s @r0,DR21
fadd dr2,dr0
LOCAL(dividend_adjusted):
lds r5,fpul
float fpul,dr2
fdiv dr2,dr0
LOCAL(div_by_1):
fmov.s @r15+,DR20
fmov.s @r15+,DR21
ftrc dr0,fpul
fmov.s @r15+,DR00
fmov.s @r15+,DR01
#endif /* !FMOVD_WORKS */
lds.l @r15+,fpscr
sts fpul,r0
rts
lds.l @r15+,fpul
#ifdef FMOVD_WORKS
.p2align 3 ! make double below 8 byte aligned.
#endif
LOCAL(huge_divisor):
lds r1,fpscr
add #4,r15
cmp/hs r5,r4
rts
movt r0
.p2align 2
L1:
#ifndef FMOVD_WORKS
.long 0x80000
#else
.long 0x180000
#endif
.double 4294967296
ENDFUNC(GLOBAL(udivsi3_i4i))
#elif !defined (__sh1__) /* !__SH_FPU_DOUBLE__ */
#if 0
/* With 36 bytes, the following would probably be the most compact
implementation, but with 139 cycles on an sh4-200, it is extremely slow. */
GLOBAL(udivsi3_i4i):
mov.l r2,@-r15
mov #0,r1
div0u
mov r1,r2
mov.l r3,@-r15
mov r1,r3
sett
mov r4,r0
LOCAL(loop):
rotcr r2
;
bt/s LOCAL(end)
cmp/gt r2,r3
rotcl r0
bra LOCAL(loop)
div1 r5,r1
LOCAL(end):
rotcl r0
mov.l @r15+,r3
rts
mov.l @r15+,r2
#endif /* 0 */
/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
sh4-200 run times:
udiv small divisor: 55 cycles
udiv large divisor: 52 cycles
sdiv small divisor, positive result: 59 cycles
sdiv large divisor, positive result: 56 cycles
sdiv small divisor, negative result: 65 cycles (*)
sdiv large divisor, negative result: 62 cycles (*)
(*): r2 is restored in the rts delay slot and has a lingering latency
of two more cycles. */
.balign 4
.global GLOBAL(udivsi3_i4i)
FUNC(GLOBAL(udivsi3_i4i))
FUNC(GLOBAL(sdivsi3_i4i))
GLOBAL(udivsi3_i4i):
sts pr,r1
mov.l r4,@-r15
extu.w r5,r0
cmp/eq r5,r0
swap.w r4,r0
shlr16 r4
bf/s LOCAL(large_divisor)
div0u
mov.l r5,@-r15
shll16 r5
LOCAL(sdiv_small_divisor):
div1 r5,r4
bsr LOCAL(div6)
div1 r5,r4
div1 r5,r4
bsr LOCAL(div6)
div1 r5,r4
xtrct r4,r0
xtrct r0,r4
bsr LOCAL(div7)
swap.w r4,r4
div1 r5,r4
bsr LOCAL(div7)
div1 r5,r4
xtrct r4,r0
mov.l @r15+,r5
swap.w r0,r0
mov.l @r15+,r4
jmp @r1
rotcl r0
LOCAL(div7):
div1 r5,r4
LOCAL(div6):
div1 r5,r4; div1 r5,r4; div1 r5,r4
div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
LOCAL(divx3):
rotcl r0
div1 r5,r4
rotcl r0
div1 r5,r4
rotcl r0
rts
div1 r5,r4
LOCAL(large_divisor):
mov.l r5,@-r15
LOCAL(sdiv_large_divisor):
xor r4,r0
.rept 4
rotcl r0
bsr LOCAL(divx3)
div1 r5,r4
.endr
mov.l @r15+,r5
mov.l @r15+,r4
jmp @r1
rotcl r0
ENDFUNC(GLOBAL(udivsi3_i4i))
.global GLOBAL(sdivsi3_i4i)
GLOBAL(sdivsi3_i4i):
mov.l r4,@-r15
cmp/pz r5
mov.l r5,@-r15
bt/s LOCAL(pos_divisor)
cmp/pz r4
neg r5,r5
extu.w r5,r0
bt/s LOCAL(neg_result)
cmp/eq r5,r0
neg r4,r4
LOCAL(pos_result):
swap.w r4,r0
bra LOCAL(sdiv_check_divisor)
sts pr,r1
LOCAL(pos_divisor):
extu.w r5,r0
bt/s LOCAL(pos_result)
cmp/eq r5,r0
neg r4,r4
LOCAL(neg_result):
mova LOCAL(negate_result),r0
;
mov r0,r1
swap.w r4,r0
lds r2,macl
sts pr,r2
LOCAL(sdiv_check_divisor):
shlr16 r4
bf/s LOCAL(sdiv_large_divisor)
div0u
bra LOCAL(sdiv_small_divisor)
shll16 r5
.balign 4
LOCAL(negate_result):
neg r0,r0
jmp @r2
sts macl,r2
ENDFUNC(GLOBAL(sdivsi3_i4i))
#endif /* !__SH_FPU_DOUBLE__ */
#endif /* L_udivsi3_i4i */
#ifdef L_sdivsi3_i4i
#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
/* 48 bytes, 45 cycles on sh4-200 */
!! args in r4 and r5, result in r0, clobber r1
.global GLOBAL(sdivsi3_i4i)
FUNC(GLOBAL(sdivsi3_i4i))
GLOBAL(sdivsi3_i4i):
sts.l fpscr,@-r15
sts fpul,r1
mova L1,r0
lds.l @r0+,fpscr
lds r4,fpul
#ifdef FMOVD_WORKS
fmov.d dr0,@-r15
float fpul,dr0
lds r5,fpul
fmov.d dr2,@-r15
#else
fmov.s DR01,@-r15
fmov.s DR00,@-r15
float fpul,dr0
lds r5,fpul
fmov.s DR21,@-r15
fmov.s DR20,@-r15
#endif
float fpul,dr2
fdiv dr2,dr0
#ifdef FMOVD_WORKS
fmov.d @r15+,dr2
#else
fmov.s @r15+,DR20
fmov.s @r15+,DR21
#endif
ftrc dr0,fpul
#ifdef FMOVD_WORKS
fmov.d @r15+,dr0
#else
fmov.s @r15+,DR00
fmov.s @r15+,DR01
#endif
lds.l @r15+,fpscr
sts fpul,r0
rts
lds r1,fpul
.p2align 2
L1:
#ifndef FMOVD_WORKS
.long 0x80000
#else
.long 0x180000
#endif
ENDFUNC(GLOBAL(sdivsi3_i4i))
#endif /* __SH_FPU_DOUBLE__ */
#endif /* L_sdivsi3_i4i */
#endif /* !__SHMEDIA__ */
| 20.445122 | 79 | 0.716373 |
510e7c2b0ee42e58a7c692739daca850c30b4c30 | 1,276 | asm | Assembly | util/Random.asm | sidebog7/ZXWargame | 63e2f01fbdf4f31b6c7ea34f0cd3b293c69a8cc6 | [
"MIT"
] | 1 | 2018-09-03T15:10:12.000Z | 2018-09-03T15:10:12.000Z | util/Random.asm | sidebog7/ZXWargame | 63e2f01fbdf4f31b6c7ea34f0cd3b293c69a8cc6 | [
"MIT"
] | null | null | null | util/Random.asm | sidebog7/ZXWargame | 63e2f01fbdf4f31b6c7ea34f0cd3b293c69a8cc6 | [
"MIT"
] | null | null | null | ; 8-bit Complementary-Multiply-With-Carry (CMWC) random number generator.
; Created by Patrik Rak in 2012, and revised in 2014/2015,
; with optimization contribution from Einar Saukas and Alan Albrecht.
; See http://www.worldofspectrum.org/forums/showthread.php?t=39632
;org 40000
;call rnd ; BASIC driver
;ld c,a
;ld b,0
;ret
rnd:
ld hl,rnd_table
ld a,(hl) ; i = ( i & 7 ) + 1
and 7
inc a
ld (hl),a
inc l ; hl = &cy
ld d,h ; de = &q[i]
add a,l
ld e,a
ld a,(de) ; y = q[i]
ld b,a
ld c,a
ld a,(hl) ; ba = 256 * y + cy
sub c ; ba = 255 * y + cy
jr nc,$+3
dec b
sub c ; ba = 254 * y + cy
jr nc,$+3
dec b
sub c ; ba = 253 * y + cy
jr nc,$+3
dec b
ld (hl),b ; cy = ba >> 8, x = ba & 255
cpl ; x = (b-1) - x = -x - 1 = ~x + 1 - 1 = ~x
ld (de),a ; q[i] = x
ret
rnd_table:
db 0,0,82,97,120,111,102,116,20,15
if (rnd_table/256)-((rnd_table+9)/256)
error "whole table must be within single 256 byte block"
endif
| 22.785714 | 73 | 0.435737 |
f903bc2f4dbe9878f2d8297d42659423ffbf3822 | 600 | asm | Assembly | bootsector/print_hex.asm | mstniy/cerius | ac8a0e3e68243f3e38b2a259e7a7b6f87e6787e3 | [
"MIT"
] | 2 | 2018-01-28T19:04:56.000Z | 2018-12-12T20:59:40.000Z | bootsector/print_hex.asm | mstniy/cerius | ac8a0e3e68243f3e38b2a259e7a7b6f87e6787e3 | [
"MIT"
] | null | null | null | bootsector/print_hex.asm | mstniy/cerius | ac8a0e3e68243f3e38b2a259e7a7b6f87e6787e3 | [
"MIT"
] | null | null | null | ; Weight: 66 bytes
[bits 16]
; prints the value of DX as hex.
print_hex:
pusha
mov ah, 0x0e
mov al, '0'
int 0x10
mov al, 'x'
int 0x10
mov bl, dh
shr bl, 4
call print_hex_letter
mov bl, dh
call print_hex_letter
mov bl, dl
shr bl, 4
call print_hex_letter
mov bl, dl
call print_hex_letter
popa
ret
; print the value of BLL as a single hex letter
print_hex_letter:
pusha
mov ah, 0x0e
and bl, 0xf
cmp bl, 10
jae phl_bl_g_10
mov al, '0'
add al, bl
jmp phl_bl_cmp_end
phl_bl_g_10:
mov al, 'A'
add al, bl
sub al, 10
phl_bl_cmp_end:
int 0x10
popa
ret | 12 | 48 | 0.67 |
a2db7c81470e1e121ac4ed9c58051847ed0633e7 | 330 | asm | Assembly | oeis/284/A284557.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/284/A284557.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/284/A284557.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A284557: a(n) = A048727(n) mod 3.
; Submitted by Jamie Morken(s1)
; 0,1,2,0,1,0,0,0,2,0,0,1,0,2,0,0,1,2,0,1,0,2,2,2,0,1,1,2,0,2,0,0,2,0,1,2,0,2,2,2,0,1,1,2,1,0,1,1,0,1,2,0,2,1,1,1,0,1,1,2,0,2,0,0,1,2,0,1,2,1,1,1,0,1,1,2,1,0,1,1,0,1,2,0,2,1,1,1,2,0,0,1,2,1,2,2,0,1,2,0
seq $0,48727 ; a(n) = Xmult(n,7) or rule150(n,1).
mod $0,3
| 47.142857 | 201 | 0.542424 |
d96fd8a7cd6acb09410e79d538442358c488f2ff | 3,920 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i3-7100_9_0xca_notsx.log_191_1303.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i3-7100_9_0xca_notsx.log_191_1303.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i3-7100_9_0xca_notsx.log_191_1303.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x547d, %r11
nop
nop
nop
nop
xor $41842, %r14
movb (%r11), %cl
nop
nop
nop
nop
sub $63411, %rbx
lea addresses_D_ht+0xe145, %rsi
lea addresses_normal_ht+0x8453, %rdi
nop
sub $30496, %r8
mov $23, %rcx
rep movsl
nop
nop
nop
nop
xor %rcx, %rcx
lea addresses_WC_ht+0x12c53, %rcx
nop
nop
nop
cmp $23314, %rsi
movb $0x61, (%rcx)
nop
nop
inc %rbx
lea addresses_WC_ht+0x191b3, %rsi
lea addresses_WT_ht+0x6253, %rdi
nop
nop
nop
nop
nop
xor $4892, %rax
mov $65, %rcx
rep movsl
nop
nop
nop
add %rbx, %rbx
lea addresses_WC_ht+0x10953, %r14
nop
nop
nop
nop
nop
xor $54217, %r8
mov $0x6162636465666768, %rcx
movq %rcx, (%r14)
nop
nop
nop
nop
cmp %rax, %rax
lea addresses_normal_ht+0x1d853, %rsi
lea addresses_WC_ht+0x13163, %rdi
clflush (%rsi)
nop
nop
nop
xor %r11, %r11
mov $18, %rcx
rep movsq
sub $31327, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r8
push %r9
push %rax
push %rbx
push %rcx
push %rdx
// Store
lea addresses_PSE+0x2bb3, %rdx
nop
nop
nop
nop
nop
sub %r10, %r10
mov $0x5152535455565758, %r9
movq %r9, %xmm1
movntdq %xmm1, (%rdx)
add %r9, %r9
// Store
lea addresses_WC+0x290b, %rbx
and $41644, %rcx
movb $0x51, (%rbx)
and $51914, %rax
// Store
mov $0x213, %rdx
nop
nop
nop
nop
add %r10, %r10
mov $0x5152535455565758, %r9
movq %r9, %xmm1
vmovntdq %ymm1, (%rdx)
nop
nop
nop
nop
add %rcx, %rcx
// Faulty Load
lea addresses_US+0x18c53, %rcx
nop
nop
nop
nop
and %r9, %r9
vmovups (%rcx), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $0, %xmm1, %rax
lea oracles, %rcx
and $0xff, %rax
shlq $12, %rax
mov (%rcx,%rax,1), %rax
pop %rdx
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_US', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': True, 'type': 'addresses_PSE', 'size': 16, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_WC', 'size': 1, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': True, 'type': 'addresses_P', 'size': 32, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_US', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 1, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': True}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_WC_ht', 'size': 1, 'AVXalign': False}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 9, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 7, 'NT': False, 'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}}
{'00': 191}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 22.022472 | 572 | 0.653571 |
9e7a629287b6f1acaae6992b997845cc2eac0e5a | 2,342 | asm | Assembly | libtool/src/gmp-6.1.2/mpn/arm/v7a/cora15/neon/com.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 1,602 | 2015-01-06T11:26:31.000Z | 2022-03-30T06:17:21.000Z | libtool/src/gmp-6.1.2/mpn/arm/v7a/cora15/neon/com.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 11,789 | 2015-01-05T04:50:15.000Z | 2022-03-31T23:39:19.000Z | libtool/src/gmp-6.1.2/mpn/arm/v7a/cora15/neon/com.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 498 | 2015-01-08T18:58:18.000Z | 2022-03-20T15:37:45.000Z | dnl ARM Neon mpn_com optimised for A15.
dnl Copyright 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C StrongARM ?
C XScale ?
C Cortex-A8 ?
C Cortex-A9 2.1
C Cortex-A15 0.65
define(`rp', `r0')
define(`up', `r1')
define(`n', `r2')
ASM_START()
PROLOGUE(mpn_com)
cmp n, #7
ble L(bc)
C Perform a few initial operation until rp is 128-bit aligned
tst rp, #4
beq L(al1)
vld1.32 {d0[0]}, [up]!
sub n, n, #1
vmvn d0, d0
vst1.32 {d0[0]}, [rp]!
L(al1): tst rp, #8
beq L(al2)
vld1.32 {d0}, [up]!
sub n, n, #2
vmvn d0, d0
vst1.32 {d0}, [rp:64]!
L(al2): vld1.32 {q2}, [up]!
subs n, n, #12
blt L(end)
ALIGN(16)
L(top): vld1.32 {q0}, [up]!
vmvn q2, q2
subs n, n, #8
vst1.32 {q2}, [rp:128]!
vld1.32 {q2}, [up]!
vmvn q0, q0
vst1.32 {q0}, [rp:128]!
bge L(top)
L(end): vmvn q2, q2
vst1.32 {q2}, [rp:128]!
C Handle last 0-7 limbs. Note that rp is aligned after loop, but not when we
C arrive here via L(bc)
L(bc): tst n, #4
beq L(tl1)
vld1.32 {q0}, [up]!
vmvn q0, q0
vst1.32 {q0}, [rp]!
L(tl1): tst n, #2
beq L(tl2)
vld1.32 {d0}, [up]!
vmvn d0, d0
vst1.32 {d0}, [rp]!
L(tl2): tst n, #1
beq L(tl3)
vld1.32 {d0[0]}, [up]
vmvn d0, d0
vst1.32 {d0[0]}, [rp]
L(tl3): bx lr
EPILOGUE()
| 23.897959 | 79 | 0.65158 |
a6e43ffb427013fe6ee88ed8f682555e645c13a7 | 999 | asm | Assembly | data/phone/text/wilton_overworld.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | data/phone/text/wilton_overworld.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | data/phone/text/wilton_overworld.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | WiltonAskNumber1Text:
text "Eh, our battle was"
line "fun, I'd say…"
para "When I'm fishing,"
line "I sometimes snag"
para "items that people"
line "have dropped."
para "Do you want them?"
line "What's the number?"
done
WiltonAskNumber2Text:
text "If I snag an item"
line "while I'm fishing,"
para "it's yours. What's"
line "your number?"
done
WiltonNumberAcceptedText:
text "If I snag anything"
line "good, I'll be sure"
cont "to let you know."
done
WiltonNumberDeclinedText:
text "All right… Come"
line "back if you have a"
cont "change of heart."
done
WiltonPhoneFullText:
text "You can't register"
line "another number."
done
WiltonRematchText:
text "Argh! You startled"
line "POLIWAG into"
cont "fleeing again!"
done
WiltonGiftText:
text "So here you are."
para "See this?"
line "I snagged it just"
para "a little while"
line "ago. It's yours."
done
WiltonPackFullText:
text "Your PACK's full?"
para "I'll give it to"
line "you later."
done
| 16.112903 | 26 | 0.697698 |
410b1a7f231c90b9f798f38b95a7e0644a488c01 | 575 | asm | Assembly | oeis/022/A022536.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/022/A022536.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/022/A022536.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A022536: Nexus numbers (n+1)^20 - n^20.
; 1,1048575,3485735825,1096024843375,94267920012849,3560791008422351,76136107857549025,1073129238309234975,11004743954450081825,87842334540943071199,572749994932560009201,3161009997514915112975,15171203782433324316625,64663291650404002121775,248857417582680286330049,876400146606664086815551,2855305587032943347695425,8684004809748505652035775,24841737241149880018918225,67267626542454041806644399,173360829446951548637196401,427211069239452495570751375,1010726332648182298715947425
sub $2,$0
add $0,1
pow $0,20
pow $2,20
sub $0,$2
| 63.888889 | 482 | 0.888696 |
03152d74754228ed90bdae0e9cb9431a9217ea22 | 3,565 | asm | Assembly | source/function/graphics/rsppos.asm | mega65dev/rom-assembler | 1670a56a8246dcdcc18e83b345d577eba686cf32 | [
"MIT"
] | null | null | null | source/function/graphics/rsppos.asm | mega65dev/rom-assembler | 1670a56a8246dcdcc18e83b345d577eba686cf32 | [
"MIT"
] | null | null | null | source/function/graphics/rsppos.asm | mega65dev/rom-assembler | 1670a56a8246dcdcc18e83b345d577eba686cf32 | [
"MIT"
] | null | null | null | ; ********************************************************************************************
; ********************************************************************************************
;
; Name : rsppos.asm
; Purpose : ..
; Created : 15th Nov 1991
; Updated : 4th Jan 2021
; Authors : Fred Bowen
;
; ********************************************************************************************
; ********************************************************************************************
;******************************************************************
;* RSPPOS - Return sprite location / speed data
;*
;* Syntax: RSPPOS (sprite_number, argument)
;*
;* Where: sprite_number = [0..7]
;* argument = [0..2]
;* 0 : return X position
;* 1 : return Y position
;* 2 : return current speed
;******************************************************************
rsppos jsr conint ; get first arg, sprite #, in .X
; dex ;adjust [1..8] to [0..7] [910220]
cpx #8 ; (318018-03 mod ; fab)
bcs l304_1 ; value error
phx ; save sprite number
; jsr chkcom ;check for proper delimiter
; jsr getbyt ;do frmevl, get 1 byte arg (arg) in .X
jsr combyt ; [910820]
jsr chkcls ; look for closing paren
cpx #3
l304_1 +lbcs fcerr ; value error
ply ; sprite number
cpx #2
bne l304_2 ; branch if x or y position
ldx sproff,y ; get offset into speed data
ldy sprite_data,x ; get speed data
+lbra sngflt ; go float 1 byte arg in .Y
; Get msb of sprite position (in case this is for x position)
l304_2 sei
lda sbits,y ; get bit mask for this sprite
and vic+16 ; ???vic_save
beq l304_3
lda #1 ; change any non-zero to a '1'
l304_3 pha ; save msb
tya ; y = sprite# * 2
asl
tay
txa ; see if this is y position
lsr ; .C = 0 for x pos'n, 1 for y pos'n
bcc l304_4 ; branch if x pos'n
iny ; adjust pointer to point to y pos'n in register data
pla
lda #0 ; ..and force 'msb' to be zero
pha
l304_4 lda vic,y ; get correct location lsb ???vic_save
cli
tay
pla ; ..and get msb,
+lbra nosflt ; ..and go float 2 byte value in y,a
;.end
; ********************************************************************************************
;
; Date Changes
; ==== =======
;
; ********************************************************************************************
| 42.951807 | 109 | 0.286676 |
759f0133e5b7c0ce093a95132c4a742675fdbd5a | 87 | asm | Assembly | programs/test_stack.asm | tofu13/pyc64 | 1ffb1d864de1b4df64f6eceb724ff653ce68aa2a | [
"MIT"
] | null | null | null | programs/test_stack.asm | tofu13/pyc64 | 1ffb1d864de1b4df64f6eceb724ff653ce68aa2a | [
"MIT"
] | null | null | null | programs/test_stack.asm | tofu13/pyc64 | 1ffb1d864de1b4df64f6eceb724ff653ce68aa2a | [
"MIT"
] | null | null | null | * = $0C00
lda #$42
PHA
lda #$10
PHA
lda #$FF
PHA
PHP
CLC
CLI
CLV
CLD
PLP
PLA
PLA
PLA
| 4.578947 | 9 | 0.632184 |
b9c9ecf404043c9e269f9b51a9a59bf59ec5ee41 | 905 | asm | Assembly | programs/oeis/055/A055671.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/055/A055671.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/055/A055671.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A055671: Number of prime Hurwitz quaternions of norm n.
; 0,0,24,96,0,144,0,192,0,0,0,288,0,336,0,0,0,432,0,480,0,0,0,576,0,0,0,0,0,720,0,768,0,0,0,0,0,912,0,0,0,1008,0,1056,0,0,0,1152,0,0,0,0,0,1296,0,0,0,0,0,1440,0,1488,0,0,0,0,0,1632,0,0,0,1728,0,1776,0,0,0,0,0,1920,0,0,0,2016,0,0,0,0,0,2160,0,0,0,0,0,0,0,2352,0,0,0,2448,0,2496,0,0,0,2592,0,2640,0,0,0,2736,0,0,0,0,0,0,0,0,0,0,0,0,0,3072,0,0,0,3168,0,0,0,0,0,3312,0,3360,0,0,0,0,0,0,0,0,0,3600,0,3648,0,0,0,0,0,3792,0,0,0,0,0,3936,0,0,0,4032,0,0,0,0,0,4176,0,0,0,0,0,4320,0,4368,0,0,0,0,0,0,0,0,0,4608,0,4656,0,0,0,4752,0,4800,0,0,0,0,0,0,0,0,0,0,0,5088,0,0,0,0,0,0,0,0,0,0,0,5376,0,0,0,5472,0,5520,0,0,0,5616,0,0,0,0,0,5760,0,5808,0,0,0,0,0,0,0,0
add $0,1
mov $3,4
bin $3,$0
sub $0,1
mov $1,$0
trn $0,1
mov $2,$3
cmp $2,0
add $3,$2
div $1,$3
add $1,1
cal $0,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
mul $1,$0
mul $1,24
| 50.277778 | 646 | 0.61989 |
c05e2d847a149deb3825d847bfa86008d03cb55a | 1,917 | asm | Assembly | src/z3/randomizer/quickswap.asm | TarThoron/alttp_sm_combo_randomizer_rom | a5aee4ce288cae6408dbfb71b32f075452c94ef5 | [
"MIT"
] | null | null | null | src/z3/randomizer/quickswap.asm | TarThoron/alttp_sm_combo_randomizer_rom | a5aee4ce288cae6408dbfb71b32f075452c94ef5 | [
"MIT"
] | null | null | null | src/z3/randomizer/quickswap.asm | TarThoron/alttp_sm_combo_randomizer_rom | a5aee4ce288cae6408dbfb71b32f075452c94ef5 | [
"MIT"
] | null | null | null | ; Thanks to Kazuto for developing the original QS code that inspired this one
QuickSwap:
; We perform all other checks only if we are pushing L or R in order to have minimal
; perf impact, since this runs every frame
LDA.b $F6 : AND #$30 : BEQ .done
XBA ; stash away the value for after the checks.
LDA.l QuickSwapFlag : BEQ .done
LDA.w $0202 : BEQ .done ; Skip everything if we don't have any items
PHX
XBA ; restore the stashed value
CMP.b #$30 : BNE +
; If prossing both L and R this frame, then go directly to the special swap code
LDX.w $0202 : BRA .special_swap
+
BIT #$10 : BEQ + ; Only pressed R
JSR.w RCode
LDA.b $F2 : BIT #$20 : BNE .special_swap ; Still holding L from a previous frame
BRA .store
+
; Only pressed L
JSR.w LCode
LDA.b $F2 : BIT #$10 : BNE .special_swap ; Still holding R from a previous frame
BRA .store
.special_swap
LDA !INVENTORY_SWAP_2 : ORA #$01 : STA !INVENTORY_SWAP_2
CPX.b #$02 : BEQ + ; boomerang
CPX.b #$01 : BEQ + ; bow
CPX.b #$05 : BEQ + ; powder
CPX.b #$0D : BEQ + ; flute
CPX.b #$10 : BEQ + ; bottle
BRA .store
+ STX $0202 : JSL ProcessMenuButtons_y_pressed
.store
LDA.b #$20 : STA.w $012F
STX $0202
JSL HUD_RefreshIconLong
PLX
.done
LDA.b $F6 : AND.b #$40 ;what we wrote over
RTL
RCode:
LDX.w $0202
LDA.b $F2 : BIT #$20 : BNE ++ ; Still holding L from a previous frame
LDA !INVENTORY_SWAP_2 : AND #$FE : STA !INVENTORY_SWAP_2
BRA +
++
LDA !INVENTORY_SWAP_2 : BIT #$01 : BEQ +
RTS
-
+ CPX.b #$14 : BNE + : LDX.b #$00 ;will wrap around to 1
+ INX
.nextItem
LDA.l $7EF33F, X : BEQ -
RTS
LCode:
LDX.w $0202
LDA.b $F2 : BIT #$10 : BNE ++ ; Still holding R from a previous frame
LDA !INVENTORY_SWAP_2 : AND #$FE : STA !INVENTORY_SWAP_2
BRA +
++
LDA !INVENTORY_SWAP_2 : BIT #$01 : BEQ +
RTS
-
+ CPX.b #$01 : BNE + : LDX.b #$15 ; will wrap around to $14
+ DEX
.nextItem
LDA.l $7EF33F, X : BEQ -
RTS
| 24.265823 | 85 | 0.651539 |
33c681bb729177445d6966866fc8c0e38903cb4e | 3,865 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_640_1337.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_640_1337.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_640_1337.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x2bfe, %rsi
lea addresses_normal_ht+0x12f1e, %rdi
add $18975, %r11
mov $14, %rcx
rep movsw
nop
nop
and %rbp, %rbp
lea addresses_UC_ht+0x1dd5e, %rsi
lea addresses_A_ht+0x46de, %rdi
nop
nop
nop
nop
nop
cmp $14616, %rax
mov $35, %rcx
rep movsq
nop
nop
nop
sub $64539, %rbp
lea addresses_A_ht+0xf8de, %rdi
and $46344, %rsi
mov $0x6162636465666768, %rax
movq %rax, %xmm6
movups %xmm6, (%rdi)
nop
nop
nop
nop
nop
add $17404, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r15
push %r8
push %r9
push %rbp
push %rbx
// Store
mov $0xa3e40000000085e, %r9
nop
nop
nop
xor $2050, %r15
movw $0x5152, (%r9)
nop
nop
dec %rbp
// Faulty Load
lea addresses_normal+0xf2de, %rbx
nop
nop
nop
nop
nop
cmp %r8, %r8
movb (%rbx), %r10b
lea oracles, %r11
and $0xff, %r10
shlq $12, %r10
mov (%r11,%r10,1), %r10
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_NC', 'same': False, 'size': 2, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': True}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'34': 640}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 36.121495 | 1,919 | 0.662354 |
1dadebe175377bf3f7ae2e4c49d0d574c37bb1c8 | 187 | asm | Assembly | src/intel/tools/tests/gen9/bfi2.asm | SoftReaper/Mesa-Renoir-deb | 8d1de1f66058d62b41fe55d36522efea2bdf996d | [
"MIT"
] | null | null | null | src/intel/tools/tests/gen9/bfi2.asm | SoftReaper/Mesa-Renoir-deb | 8d1de1f66058d62b41fe55d36522efea2bdf996d | [
"MIT"
] | null | null | null | src/intel/tools/tests/gen9/bfi2.asm | SoftReaper/Mesa-Renoir-deb | 8d1de1f66058d62b41fe55d36522efea2bdf996d | [
"MIT"
] | null | null | null | bfi2(8) g31<1>UD g88<4,4,1>UD g90<4,4,1>UD g91<4,4,1>UD { align16 1Q };
bfi2(16) g5<1>UD g42<4,4,1>UD g40<4,4,1>UD g126<4,4,1>UD { align16 1H };
| 62.333333 | 93 | 0.475936 |
951dc7edcfd5db0ffb41f87f426f37148da2b775 | 456 | asm | Assembly | oeis/134/A134485.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/134/A134485.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/134/A134485.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A134485: Row sums of triangle A134484(n,k) = 2^[n(n-1) - k(k-1)] * C(n,k).
; Submitted by Jamie Morken(w1)
; 1,2,13,305,26881,9078017,11882207233,60716967030785,1217207202583019521,96068905115897742032897,29929069804525281689001787393,36877162272858587692985585499111425
mov $1,1
mov $3,$0
mov $4,1
lpb $3
pow $4,2
mul $1,$4
mul $1,$3
add $5,1
div $1,$5
add $2,$1
mul $2,4
sub $3,1
mov $4,2
pow $4,$3
lpe
mov $0,$2
div $0,4
add $0,1
| 19.826087 | 163 | 0.666667 |
f2c86e540229a5b38d8316ef3df3b9dec438a7ff | 236 | asm | Assembly | programs/oeis/152/A152179.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/152/A152179.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/152/A152179.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A152179: (n^2-2=A008865) mod 9. Period 9:repeat 8,2,7,5,5,7,2,8,7.
; 8,2,7,5,5,7,2,8,7,8,2,7,5,5,7,2,8,7,8,2,7,5,5,7,2,8,7,8,2,7,5,5,7,2,8,7,8,2,7,5,5,7,2,8,7,8,2,7,5,5,7,2,8,7
add $0,3
mov $2,$0
add $0,5
mul $0,$2
mod $0,9
add $0,2
| 23.6 | 109 | 0.538136 |
48667456b57cefef7a1ed9d4474557b024dcecd9 | 846 | asm | Assembly | programs/oeis/158/A158657.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/158/A158657.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/158/A158657.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A158657: a(n) = 784*n^2 - 28.
; 756,3108,7028,12516,19572,28196,38388,50148,63476,78372,94836,112868,132468,153636,176372,200676,226548,253988,282996,313572,345716,379428,414708,451556,489972,529956,571508,614628,659316,705572,753396,802788,853748,906276,960372,1016036,1073268,1132068,1192436,1254372,1317876,1382948,1449588,1517796,1587572,1658916,1731828,1806308,1882356,1959972,2039156,2119908,2202228,2286116,2371572,2458596,2547188,2637348,2729076,2822372,2917236,3013668,3111668,3211236,3312372,3415076,3519348,3625188,3732596,3841572,3952116,4064228,4177908,4293156,4409972,4528356,4648308,4769828,4892916,5017572,5143796,5271588,5400948,5531876,5664372,5798436,5934068,6071268,6210036,6350372,6492276,6635748,6780788,6927396,7075572,7225316,7376628,7529508,7683956,7839972
mov $1,2
add $1,$0
mul $1,$0
mul $1,784
add $1,756
mov $0,$1
| 84.6 | 751 | 0.827423 |
75dc8cf9c6121b4e6e1c7d195435c32e64696baa | 699 | asm | Assembly | programs/oeis/054/A054878.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/054/A054878.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/054/A054878.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A054878: Number of closed walks of length n along the edges of a tetrahedron based at a vertex.
; 1,0,3,6,21,60,183,546,1641,4920,14763,44286,132861,398580,1195743,3587226,10761681,32285040,96855123,290565366,871696101,2615088300,7845264903,23535794706,70607384121,211822152360,635466457083,1906399371246,5719198113741,17157594341220,51472783023663,154418349070986,463255047212961,1389765141638880,4169295424916643
mov $3,$0
mov $5,2
lpb $5,1
mov $0,$3
sub $5,1
add $0,$5
sub $0,1
mov $2,3
mov $6,$0
add $0,3
add $6,1
pow $2,$6
lpb $0,1
mov $0,0
add $2,6
lpe
div $2,8
mov $4,$5
lpb $4,1
mov $1,$2
sub $4,1
lpe
lpe
lpb $3,1
sub $1,$2
mov $3,0
lpe
| 22.548387 | 318 | 0.693848 |
64981b8784e2ea78ae865ec601bbf10915cd01e4 | 753 | asm | Assembly | oeis/294/A294567.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/294/A294567.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/294/A294567.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A294567: a(n) = Sum_{d|n} d^(1 + 2*n/d).
; Submitted by Jamie Morken(s2)
; 1,9,28,97,126,588,344,2049,2917,6174,1332,53764,2198,52320,258648,430081,4914,2463429,6860,8352582,15181712,8560308,12168,242240964,48843751,134606598,1167064120,1651526120,24390,14202123408,29792,25905102849,94162701936,34361197530,32494947744,1273091352397,50654,549758344860,7625660292824,7369602418374,68922,77993653953768,79508,105555479453004,636778434622182,140737494889008,103824,7265392278367108,4747561627593,2728736981778999,50031545509471032,27021608380744334,148878,486924605142526560
add $0,1
mov $1,1
mov $2,$0
lpb $0
mov $3,$2
dif $3,$0
mov $4,$3
cmp $3,$2
cmp $3,0
mul $3,$0
sub $0,1
mul $4,2
add $4,1
pow $3,$4
add $1,$3
lpe
mov $0,$1
| 34.227273 | 499 | 0.756972 |
30b7ebd28fd96c894a9187f3023d6613bd56b0e1 | 380 | asm | Assembly | programs/oeis/010/A010924.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/010/A010924.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/010/A010924.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A010924: Pisot sequence E(8,55), a(n) = floor(a(n-1)^2/a(n-2) + 1/2).
; 8,55,378,2598,17856,122724,843480,5797224,39844224,273848688,1882157472,12936036960,88909166592,611071221312,4199882327424,28865721292416,198393621719040,1363556058068736,9371698078726656,64411524820772352
add $0,2
cal $0,180167 ; a(0) = 1, a(1) = 7; a(n)= 6*a(n-1) + 6*a(n-2) for n>1.
mov $1,$0
div $1,6
| 47.5 | 207 | 0.715789 |
abdae4ef07fda96be3520cf5e55e802834a56d59 | 1,554 | asm | Assembly | Altair101/asm/programsUntested/pBootPlay.asm | tigerfarm/arduino | e51f111a092fe6737646b146a825f4eecbd05d44 | [
"OLDAP-2.4",
"OLDAP-2.7"
] | 2 | 2021-12-12T23:27:10.000Z | 2022-02-17T14:01:21.000Z | Altair101/asm/programsUntested/pBootPlay.asm | tigerfarm/arduino | e51f111a092fe6737646b146a825f4eecbd05d44 | [
"OLDAP-2.4",
"OLDAP-2.7"
] | null | null | null | Altair101/asm/programsUntested/pBootPlay.asm | tigerfarm/arduino | e51f111a092fe6737646b146a825f4eecbd05d44 | [
"OLDAP-2.4",
"OLDAP-2.7"
] | 4 | 2021-08-29T19:55:49.000Z | 2022-02-15T08:30:15.000Z | ; ------------------------------------------------
; Play MP3 files.
;
; ------------------------------------------------
Begin:
; ------------------------------------------------
MVI A,1 ; MP3 file: Operational.
OUT 10 ; Single play.
org 52 ; NOPs to give time to complete the playing of the MP3 and have silence after until the next MP3 is played.
HLT ;
; ------------------------------------------------
MVI A,11 ; MP3 file: Good morning.
OUT 10 ; Single play.
org 78 ; NOPs to give time to complete the playing of the MP3 and have silence after until the next MP3 is played.
HLT ;
; ------------------------------------------------
MVI A,8 ; MP3 file: Play a game.
OUT 10 ; Single play.
org 110 ; NOPs to give time to complete the playing of the MP3 and have silence after until the next MP3 is played.
HLT ;
; ------------------------------------------------
JMP Begin
END
| 64.75 | 143 | 0.268983 |
4d42c98ebca8524c50e3d65fd71ea2d59fa99058 | 1,915 | asm | Assembly | release/src-rt-6.x.4708/router/gmp/mpn/com.asm | zaion520/ATtomato | 4d48bb79f8d147f89a568cf18da9e0edc41f93fb | [
"FSFAP"
] | 2 | 2019-01-13T09:19:10.000Z | 2019-02-15T01:21:02.000Z | release/src-rt-6.x.4708/router/gmp/mpn/com.asm | zaion520/ATtomato | 4d48bb79f8d147f89a568cf18da9e0edc41f93fb | [
"FSFAP"
] | null | null | null | release/src-rt-6.x.4708/router/gmp/mpn/com.asm | zaion520/ATtomato | 4d48bb79f8d147f89a568cf18da9e0edc41f93fb | [
"FSFAP"
] | 2 | 2020-03-08T01:58:25.000Z | 2020-12-20T10:34:54.000Z | dnl ARM mpn_com.
dnl Copyright 2003, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C StrongARM ?
C XScale ?
C Cortex-A7 ?
C Cortex-A8 ?
C Cortex-A9 2.0
C Cortex-A15 1.75
define(`rp', `r0')
define(`up', `r1')
define(`n', `r2')
ASM_START()
PROLOGUE(mpn_com)
tst n, #1
beq L(skip1)
ldr r3, [up], #4
mvn r3, r3
str r3, [rp], #4
L(skip1):
tst n, #2
beq L(skip2)
ldmia up!, { r3, r12 } C load 2 limbs
mvn r3, r3
mvn r12, r12
stmia rp!, { r3, r12 } C store 2 limbs
L(skip2):
bics n, n, #3
beq L(rtn)
stmfd sp!, { r7, r8, r9 } C save regs on stack
L(top): ldmia up!, { r3, r8, r9, r12 } C load 4 limbs
subs n, n, #4
mvn r3, r3
mvn r8, r8
mvn r9, r9
mvn r12, r12
stmia rp!, { r3, r8, r9, r12 } C store 4 limbs
bne L(top)
ldmfd sp!, { r7, r8, r9 } C restore regs from stack
L(rtn): ret lr
EPILOGUE()
| 25.197368 | 79 | 0.686684 |
e2acae7b237c4465ad00da0e50891083db047278 | 34,303 | asm | Assembly | src/x86/looprestoration.asm | cyanreg/rav1e | 53f068fa003b674b46a2a0ab15f8e41f2fbb282e | [
"BSD-2-Clause"
] | 1 | 2020-12-17T06:19:40.000Z | 2020-12-17T06:19:40.000Z | src/x86/looprestoration.asm | cyanreg/rav1e | 53f068fa003b674b46a2a0ab15f8e41f2fbb282e | [
"BSD-2-Clause"
] | null | null | null | src/x86/looprestoration.asm | cyanreg/rav1e | 53f068fa003b674b46a2a0ab15f8e41f2fbb282e | [
"BSD-2-Clause"
] | null | null | null | ; Copyright © 2018, VideoLAN and dav1d authors
; Copyright © 2018, Two Orioles, LLC
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "ext/x86/x86inc.asm"
%if ARCH_X86_64
SECTION_RODATA 32
pb_right_ext_mask: times 32 db 0xff
times 32 db 0
pb_14x0_1_2: times 14 db 0
db 1, 2
pb_0_to_15_min_n: db 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 13
db 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 14
pb_15: times 16 db 15
pw_16: times 2 dw 16
pw_256: times 2 dw 256
pw_2048: times 2 dw 2048
pw_16380: times 2 dw 16380
pw_0_128: dw 0, 128
pw_5_6: dw 5, 6
pd_6: dd 6
pd_1024: dd 1024
pd_0xf0080029: dd 0xf0080029
pd_0xf00801c7: dd 0xf00801c7
cextern sgr_x_by_x
SECTION .text
INIT_YMM avx2
cglobal wiener_filter_h, 8, 12, 16, dst, left, src, stride, fh, w, h, edge
vpbroadcastb m15, [fhq+0]
vpbroadcastb m14, [fhq+2]
vpbroadcastb m13, [fhq+4]
vpbroadcastw m12, [fhq+6]
vpbroadcastd m11, [pw_2048]
vpbroadcastd m10, [pw_16380]
lea r11, [pb_right_ext_mask]
DEFINE_ARGS dst, left, src, stride, x, w, h, edge, srcptr, dstptr, xlim
; if (edge & has_right) align_w_to_32
; else w -= 32, and use that as limit in x loop
test edged, 2 ; has_right
jnz .align
mov xlimq, -3
jmp .loop
.align:
add wd, 31
and wd, ~31
xor xlimd, xlimd
; main y loop for vertical filter
.loop:
mov srcptrq, srcq
mov dstptrq, dstq
lea xq, [wq+xlimq]
; load left edge pixels
test edged, 1 ; have_left
jz .emu_left
test leftq, leftq ; left == NULL for the edge-extended bottom/top
jz .load_left_combined
movd xm0, [leftq]
add leftq, 4
pinsrd xm0, [srcq], 1
pslldq xm0, 9
jmp .left_load_done
.load_left_combined:
movq xm0, [srcq-3]
pslldq xm0, 10
jmp .left_load_done
.emu_left:
movd xm0, [srcq]
pshufb xm0, [pb_14x0_1_2]
; load right edge pixels
.left_load_done:
cmp xd, 32
jg .main_load
test xd, xd
jg .load_and_splat
je .splat_right
; for very small images (w=[1-2]), edge-extend the original cache,
; ugly, but only runs in very odd cases
add wd, wd
pshufb xm0, [r11-pb_right_ext_mask+pb_0_to_15_min_n+wq*8-16]
shr wd, 1
; main x loop, mostly this starts in .main_load
.splat_right:
; no need to load new pixels, just extend them from the (possibly previously
; extended) previous load into m0
pshufb xm1, xm0, [pb_15]
jmp .main_loop
.load_and_splat:
; load new pixels and extend edge for right-most
movu m1, [srcptrq+3]
sub r11, xq
movu m2, [r11-pb_right_ext_mask+pb_right_ext_mask+32]
add r11, xq
vpbroadcastb m3, [srcptrq+2+xq]
pand m1, m2
pandn m3, m2, m3
por m1, m3
jmp .main_loop
.main_load:
; load subsequent line
movu m1, [srcptrq+3]
.main_loop:
vinserti128 m0, xm1, 1
palignr m2, m1, m0, 10
palignr m3, m1, m0, 11
palignr m4, m1, m0, 12
palignr m5, m1, m0, 13
palignr m6, m1, m0, 14
palignr m7, m1, m0, 15
punpcklbw m0, m2, m1
punpckhbw m2, m1
punpcklbw m8, m3, m7
punpckhbw m3, m7
punpcklbw m7, m4, m6
punpckhbw m4, m6
pxor m9, m9
punpcklbw m6, m5, m9
punpckhbw m5, m9
pmaddubsw m0, m15
pmaddubsw m2, m15
pmaddubsw m8, m14
pmaddubsw m3, m14
pmaddubsw m7, m13
pmaddubsw m4, m13
paddw m0, m8
paddw m2, m3
psllw m8, m6, 7
psllw m3, m5, 7
psubw m8, m10
psubw m3, m10
pmullw m6, m12
pmullw m5, m12
paddw m0, m7
paddw m2, m4
paddw m0, m6
paddw m2, m5
paddsw m0, m8
paddsw m2, m3
psraw m0, 3
psraw m2, 3
paddw m0, m11
paddw m2, m11
mova [dstptrq], xm0
mova [dstptrq+16], xm2
vextracti128 [dstptrq+32], m0, 1
vextracti128 [dstptrq+48], m2, 1
vextracti128 xm0, m1, 1
add srcptrq, 32
add dstptrq, 64
sub xq, 32
cmp xd, 32
jg .main_load
test xd, xd
jg .load_and_splat
cmp xd, xlimd
jg .splat_right
add srcq, strideq
add dstq, 384*2
dec hd
jg .loop
RET
cglobal wiener_filter_v, 7, 10, 16, dst, stride, mid, w, h, fv, edge
vpbroadcastd m14, [fvq+4]
vpbroadcastd m15, [fvq]
vpbroadcastd m13, [pw_0_128]
paddw m14, m13
vpbroadcastd m12, [pd_1024]
DEFINE_ARGS dst, stride, mid, w, h, ylim, edge, y, mptr, dstptr
mov ylimd, edged
and ylimd, 8 ; have_bottom
shr ylimd, 2
sub ylimd, 3
; main x loop for vertical filter, does one column of 16 pixels
.loop_x:
mova m3, [midq] ; middle line
; load top pixels
test edged, 4 ; have_top
jz .emu_top
mova m0, [midq-384*4]
mova m2, [midq-384*2]
mova m1, m0
jmp .load_bottom_pixels
.emu_top:
mova m0, m3
mova m1, m3
mova m2, m3
; load bottom pixels
.load_bottom_pixels:
mov yd, hd
mov mptrq, midq
mov dstptrq, dstq
add yd, ylimd
jg .load_threelines
; the remainder here is somewhat messy but only runs in very weird
; circumstances at the bottom of the image in very small blocks (h=[1-3]),
; so performance is not terribly important here...
je .load_twolines
cmp yd, -1
je .load_oneline
; h == 1 case
mova m5, m3
mova m4, m3
mova m6, m3
jmp .loop
.load_oneline:
; h == 2 case
mova m4, [midq+384*2]
mova m5, m4
mova m6, m4
jmp .loop
.load_twolines:
; h == 3 case
mova m4, [midq+384*2]
mova m5, [midq+384*4]
mova m6, m5
jmp .loop
.load_threelines:
; h > 3 case
mova m4, [midq+384*2]
mova m5, [midq+384*4]
; third line loaded in main loop below
; main y loop for vertical filter
.loop_load:
; load one line into m6. if that pixel is no longer available, do
; nothing, since m6 still has the data from the previous line in it. We
; try to structure the loop so that the common case is evaluated fastest
mova m6, [mptrq+384*6]
.loop:
paddw m7, m0, m6
paddw m8, m1, m5
paddw m9, m2, m4
punpcklwd m10, m7, m8
punpckhwd m7, m8
punpcklwd m11, m9, m3
punpckhwd m9, m3
pmaddwd m10, m15
pmaddwd m7, m15
pmaddwd m11, m14
pmaddwd m9, m14
paddd m10, m11
paddd m7, m9
paddd m10, m12
paddd m7, m12
psrad m10, 11
psrad m7, 11
packssdw m10, m7
packuswb m10, m10
vpermq m10, m10, q3120
mova [dstptrq], xm10
; shift pixels one position
mova m0, m1
mova m1, m2
mova m2, m3
mova m3, m4
mova m4, m5
mova m5, m6
add dstptrq, strideq
add mptrq, 384*2
dec yd
jg .loop_load
; for the bottom pixels, continue using m6 (as extended edge)
cmp yd, ylimd
jg .loop
add dstq, 16
add midq, 32
sub wd, 16
jg .loop_x
RET
INIT_YMM avx2
cglobal sgr_box3_h, 8, 11, 8, sumsq, sum, left, src, stride, w, h, edge, x, xlim
mov xlimd, edged
and xlimd, 2 ; have_right
add wd, xlimd
xor xlimd, 2 ; 2*!have_right
jnz .no_right
add wd, 15
and wd, ~15
.no_right:
pxor m1, m1
lea srcq, [srcq+wq]
lea sumq, [sumq+wq*2-2]
lea sumsqq, [sumsqq+wq*4-4]
neg wq
lea r10, [pb_right_ext_mask+32]
.loop_y:
mov xq, wq
; load left
test edged, 1 ; have_left
jz .no_left
test leftq, leftq
jz .load_left_from_main
pinsrw xm0, [leftq+2], 7
add leftq, 4
jmp .expand_x
.no_left:
vpbroadcastb xm0, [srcq+xq]
jmp .expand_x
.load_left_from_main:
pinsrw xm0, [srcq+xq-2], 7
.expand_x:
punpckhbw xm0, xm1
; when we reach this, xm0 contains left two px in highest words
cmp xd, -16
jle .loop_x
.partial_load_and_extend:
vpbroadcastb m3, [srcq-1]
pmovzxbw m2, [srcq+xq]
punpcklbw m3, m1
movu m4, [r10+xq*2]
pand m2, m4
pandn m4, m3
por m2, m4
jmp .loop_x_noload
.right_extend:
psrldq xm2, xm0, 14
vpbroadcastw m2, xm2
jmp .loop_x_noload
.loop_x:
pmovzxbw m2, [srcq+xq]
.loop_x_noload:
vinserti128 m0, xm2, 1
palignr m3, m2, m0, 12
palignr m4, m2, m0, 14
punpcklwd m5, m3, m2
punpckhwd m6, m3, m2
paddw m3, m4
punpcklwd m7, m4, m1
punpckhwd m4, m1
pmaddwd m5, m5
pmaddwd m6, m6
pmaddwd m7, m7
pmaddwd m4, m4
paddd m5, m7
paddd m6, m4
paddw m3, m2
movu [sumq+xq*2], m3
movu [sumsqq+xq*4+ 0], xm5
movu [sumsqq+xq*4+16], xm6
vextracti128 [sumsqq+xq*4+32], m5, 1
vextracti128 [sumsqq+xq*4+48], m6, 1
vextracti128 xm0, m2, 1
add xq, 16
; if x <= -16 we can reload more pixels
; else if x < 0 we reload and extend (this implies have_right=0)
; else if x < xlimd we extend from previous load (this implies have_right=0)
; else we are done
cmp xd, -16
jle .loop_x
test xd, xd
jl .partial_load_and_extend
cmp xd, xlimd
jl .right_extend
add sumsqq, (384+16)*4
add sumq, (384+16)*2
add srcq, strideq
dec hd
jg .loop_y
RET
INIT_YMM avx2
cglobal sgr_box3_v, 5, 10, 9, sumsq, sum, w, h, edge, x, y, sumsq_ptr, sum_ptr, ylim
mov xq, -2
mov ylimd, edged
and ylimd, 8 ; have_bottom
shr ylimd, 2
sub ylimd, 2 ; -2 if have_bottom=0, else 0
.loop_x:
lea yd, [hq+ylimq+2]
lea sumsq_ptrq, [sumsqq+xq*4+4-(384+16)*4]
lea sum_ptrq, [sumq+xq*2+2-(384+16)*2]
test edged, 4 ; have_top
jnz .load_top
movu m0, [sumsq_ptrq+(384+16)*4*1]
movu m1, [sumsq_ptrq+(384+16)*4*1+32]
mova m2, m0
mova m3, m1
mova m4, m0
mova m5, m1
movu m6, [sum_ptrq+(384+16)*2*1]
mova m7, m6
mova m8, m6
jmp .loop_y_noload
.load_top:
movu m0, [sumsq_ptrq-(384+16)*4*1] ; l2sq [left]
movu m1, [sumsq_ptrq-(384+16)*4*1+32] ; l2sq [right]
movu m2, [sumsq_ptrq-(384+16)*4*0] ; l1sq [left]
movu m3, [sumsq_ptrq-(384+16)*4*0+32] ; l1sq [right]
movu m6, [sum_ptrq-(384+16)*2*1] ; l2
movu m7, [sum_ptrq-(384+16)*2*0] ; l1
.loop_y:
movu m4, [sumsq_ptrq+(384+16)*4*1] ; l0sq [left]
movu m5, [sumsq_ptrq+(384+16)*4*1+32] ; l0sq [right]
movu m8, [sum_ptrq+(384+16)*2*1] ; l0
.loop_y_noload:
paddd m0, m2
paddd m1, m3
paddw m6, m7
paddd m0, m4
paddd m1, m5
paddw m6, m8
movu [sumsq_ptrq+ 0], m0
movu [sumsq_ptrq+32], m1
movu [sum_ptrq], m6
; shift position down by one
mova m0, m2
mova m1, m3
mova m2, m4
mova m3, m5
mova m6, m7
mova m7, m8
add sumsq_ptrq, (384+16)*4
add sum_ptrq, (384+16)*2
dec yd
jg .loop_y
cmp yd, ylimd
jg .loop_y_noload
add xd, 16
cmp xd, wd
jl .loop_x
RET
INIT_YMM avx2
cglobal sgr_calc_ab1, 4, 6, 11, a, b, w, h, s
sub aq, (384+16-1)*4
sub bq, (384+16-1)*2
add hd, 2
lea r5, [sgr_x_by_x-0xf03]
%ifidn sd, sm
movd xm6, sd
vpbroadcastd m6, xm6
%else
vpbroadcastd m6, sm
%endif
vpbroadcastd m8, [pd_0xf00801c7]
vpbroadcastd m9, [pw_256]
pcmpeqb m7, m7
psrld m10, m9, 13 ; pd_2048
DEFINE_ARGS a, b, w, h, x
.loop_y:
mov xq, -2
.loop_x:
pmovzxwd m0, [bq+xq*2]
pmovzxwd m1, [bq+xq*2+(384+16)*2]
movu m2, [aq+xq*4]
movu m3, [aq+xq*4+(384+16)*4]
pslld m4, m2, 3
pslld m5, m3, 3
paddd m2, m4 ; aa * 9
paddd m3, m5
pmaddwd m4, m0, m0
pmaddwd m5, m1, m1
pmaddwd m0, m8
pmaddwd m1, m8
psubd m2, m4 ; p = aa * 9 - bb * bb
psubd m3, m5
pmulld m2, m6
pmulld m3, m6
paddusw m2, m8
paddusw m3, m8
psrld m2, 20 ; z
psrld m3, 20
mova m5, m7
vpgatherdd m4, [r5+m2], m5 ; xx
mova m5, m7
vpgatherdd m2, [r5+m3], m5
psrld m4, 24
psrld m2, 24
pmulld m0, m4
pmulld m1, m2
packssdw m4, m2
psubw m4, m9, m4
vpermq m4, m4, q3120
paddd m0, m10
paddd m1, m10
psrld m0, 12
psrld m1, 12
movu [bq+xq*2], xm4
vextracti128 [bq+xq*2+(384+16)*2], m4, 1
movu [aq+xq*4], m0
movu [aq+xq*4+(384+16)*4], m1
add xd, 8
cmp xd, wd
jl .loop_x
add aq, (384+16)*4*2
add bq, (384+16)*2*2
sub hd, 2
jg .loop_y
RET
INIT_YMM avx2
cglobal sgr_finish_filter1, 7, 13, 16, t, src, stride, a, b, w, h, \
tmp_ptr, src_ptr, a_ptr, b_ptr, x, y
vpbroadcastd m15, [pw_16]
xor xd, xd
.loop_x:
lea tmp_ptrq, [tq+xq*2]
lea src_ptrq, [srcq+xq*1]
lea a_ptrq, [aq+xq*4+(384+16)*4]
lea b_ptrq, [bq+xq*2+(384+16)*2]
movu m0, [aq+xq*4-(384+16)*4-4]
movu m2, [aq+xq*4-(384+16)*4+4]
mova m1, [aq+xq*4-(384+16)*4] ; a:top [first half]
paddd m0, m2 ; a:tl+tr [first half]
movu m2, [aq+xq*4-(384+16)*4-4+32]
movu m4, [aq+xq*4-(384+16)*4+4+32]
mova m3, [aq+xq*4-(384+16)*4+32] ; a:top [second half]
paddd m2, m4 ; a:tl+tr [second half]
movu m4, [aq+xq*4-4]
movu m5, [aq+xq*4+4]
paddd m1, [aq+xq*4] ; a:top+ctr [first half]
paddd m4, m5 ; a:l+r [first half]
movu m5, [aq+xq*4+32-4]
movu m6, [aq+xq*4+32+4]
paddd m3, [aq+xq*4+32] ; a:top+ctr [second half]
paddd m5, m6 ; a:l+r [second half]
movu m6, [bq+xq*2-(384+16)*2-2]
movu m8, [bq+xq*2-(384+16)*2+2]
mova m7, [bq+xq*2-(384+16)*2] ; b:top
paddw m6, m8 ; b:tl+tr
movu m8, [bq+xq*2-2]
movu m9, [bq+xq*2+2]
paddw m7, [bq+xq*2] ; b:top+ctr
paddw m8, m9 ; b:l+r
mov yd, hd
.loop_y:
movu m9, [b_ptrq-2]
movu m10, [b_ptrq+2]
paddw m7, [b_ptrq] ; b:top+ctr+bottom
paddw m9, m10 ; b:bl+br
paddw m10, m7, m8 ; b:top+ctr+bottom+l+r
paddw m6, m9 ; b:tl+tr+bl+br
psubw m7, [b_ptrq-(384+16)*2*2] ; b:ctr+bottom
paddw m10, m6
psllw m10, 2
psubw m10, m6 ; aa
pmovzxbw m12, [src_ptrq]
punpcklwd m6, m10, m15
punpckhwd m10, m15
punpcklwd m13, m12, m15
punpckhwd m12, m15
pmaddwd m6, m13 ; aa*src[x]+256 [first half]
pmaddwd m10, m12 ; aa*src[x]+256 [second half]
movu m11, [a_ptrq-4]
movu m12, [a_ptrq+4]
paddd m1, [a_ptrq] ; a:top+ctr+bottom [first half]
paddd m11, m12 ; a:bl+br [first half]
movu m12, [a_ptrq+32-4]
movu m13, [a_ptrq+32+4]
paddd m3, [a_ptrq+32] ; a:top+ctr+bottom [second half]
paddd m12, m13 ; a:bl+br [second half]
paddd m13, m1, m4 ; a:top+ctr+bottom+l+r [first half]
paddd m14, m3, m5 ; a:top+ctr+bottom+l+r [second half]
paddd m0, m11 ; a:tl+tr+bl+br [first half]
paddd m2, m12 ; a:tl+tr+bl+br [second half]
paddd m13, m0
paddd m14, m2
pslld m13, 2
pslld m14, 2
psubd m13, m0 ; bb [first half]
psubd m14, m2 ; bb [second half]
vperm2i128 m0, m13, m14, 0x31
vinserti128 m13, xm14, 1
psubd m1, [a_ptrq-(384+16)*4*2] ; a:ctr+bottom [first half]
psubd m3, [a_ptrq-(384+16)*4*2+32] ; a:ctr+bottom [second half]
paddd m6, m13
paddd m10, m0
psrad m6, 9
psrad m10, 9
packssdw m6, m10
mova [tmp_ptrq], m6
; shift to next row
mova m0, m4
mova m2, m5
mova m4, m11
mova m5, m12
mova m6, m8
mova m8, m9
add a_ptrq, (384+16)*4
add b_ptrq, (384+16)*2
add tmp_ptrq, 384*2
add src_ptrq, strideq
dec yd
jg .loop_y
add xd, 16
cmp xd, wd
jl .loop_x
RET
INIT_YMM avx2
cglobal sgr_weighted1, 6, 6, 7, dst, stride, t, w, h, wt
movd xm0, wtd
vpbroadcastw m0, xm0
psllw m0, 4
DEFINE_ARGS dst, stride, t, w, h, idx
.loop_y:
xor idxd, idxd
.loop_x:
mova m1, [tq+idxq*2+ 0]
mova m4, [tq+idxq*2+32]
pmovzxbw m2, [dstq+idxq+ 0]
pmovzxbw m5, [dstq+idxq+16]
psllw m3, m2, 4
psllw m6, m5, 4
psubw m1, m3
psubw m4, m6
pmulhrsw m1, m0
pmulhrsw m4, m0
paddw m1, m2
paddw m4, m5
packuswb m1, m4
vpermq m1, m1, q3120
mova [dstq+idxq], m1
add idxd, 32
cmp idxd, wd
jl .loop_x
add dstq, strideq
add tq, 384 * 2
dec hd
jg .loop_y
RET
INIT_YMM avx2
cglobal sgr_box5_h, 8, 11, 10, sumsq, sum, left, src, stride, w, h, edge, x, xlim
test edged, 2 ; have_right
jz .no_right
xor xlimd, xlimd
add wd, 2
add wd, 15
and wd, ~15
jmp .right_done
.no_right:
mov xlimd, 3
sub wd, 1
.right_done:
pxor m1, m1
lea srcq, [srcq+wq+1]
lea sumq, [sumq+wq*2-2]
lea sumsqq, [sumsqq+wq*4-4]
neg wq
lea r10, [pb_right_ext_mask+32]
.loop_y:
mov xq, wq
; load left
test edged, 1 ; have_left
jz .no_left
test leftq, leftq
jz .load_left_from_main
movd xm0, [leftq]
pinsrd xm0, [srcq+xq-1], 1
pslldq xm0, 11
add leftq, 4
jmp .expand_x
.no_left:
vpbroadcastb xm0, [srcq+xq-1]
jmp .expand_x
.load_left_from_main:
pinsrd xm0, [srcq+xq-4], 3
.expand_x:
punpckhbw xm0, xm1
; when we reach this, xm0 contains left two px in highest words
cmp xd, -16
jle .loop_x
test xd, xd
jge .right_extend
.partial_load_and_extend:
vpbroadcastb m3, [srcq-1]
pmovzxbw m2, [srcq+xq]
punpcklbw m3, m1
movu m4, [r10+xq*2]
pand m2, m4
pandn m4, m3
por m2, m4
jmp .loop_x_noload
.right_extend:
psrldq xm2, xm0, 14
vpbroadcastw m2, xm2
jmp .loop_x_noload
.loop_x:
pmovzxbw m2, [srcq+xq]
.loop_x_noload:
vinserti128 m0, xm2, 1
palignr m3, m2, m0, 8
palignr m4, m2, m0, 10
palignr m5, m2, m0, 12
palignr m6, m2, m0, 14
paddw m0, m3, m2
punpcklwd m7, m3, m2
punpckhwd m3, m2
paddw m0, m4
punpcklwd m8, m4, m5
punpckhwd m4, m5
paddw m0, m5
punpcklwd m9, m6, m1
punpckhwd m5, m6, m1
paddw m0, m6
pmaddwd m7, m7
pmaddwd m3, m3
pmaddwd m8, m8
pmaddwd m4, m4
pmaddwd m9, m9
pmaddwd m5, m5
paddd m7, m8
paddd m3, m4
paddd m7, m9
paddd m3, m5
movu [sumq+xq*2], m0
movu [sumsqq+xq*4+ 0], xm7
movu [sumsqq+xq*4+16], xm3
vextracti128 [sumsqq+xq*4+32], m7, 1
vextracti128 [sumsqq+xq*4+48], m3, 1
vextracti128 xm0, m2, 1
add xq, 16
; if x <= -16 we can reload more pixels
; else if x < 0 we reload and extend (this implies have_right=0)
; else if x < xlimd we extend from previous load (this implies have_right=0)
; else we are done
cmp xd, -16
jle .loop_x
test xd, xd
jl .partial_load_and_extend
cmp xd, xlimd
jl .right_extend
add sumsqq, (384+16)*4
add sumq, (384+16)*2
add srcq, strideq
dec hd
jg .loop_y
RET
INIT_YMM avx2
cglobal sgr_box5_v, 5, 10, 15, sumsq, sum, w, h, edge, x, y, sumsq_ptr, sum_ptr, ylim
mov xq, -2
mov ylimd, edged
and ylimd, 8 ; have_bottom
shr ylimd, 2
sub ylimd, 3 ; -3 if have_bottom=0, else -1
.loop_x:
lea yd, [hq+ylimq+2]
lea sumsq_ptrq, [sumsqq+xq*4+4-(384+16)*4]
lea sum_ptrq, [sumq+xq*2+2-(384+16)*2]
test edged, 4 ; have_top
jnz .load_top
movu m0, [sumsq_ptrq+(384+16)*4*1]
movu m1, [sumsq_ptrq+(384+16)*4*1+32]
mova m2, m0
mova m3, m1
mova m4, m0
mova m5, m1
mova m6, m0
mova m7, m1
movu m10, [sum_ptrq+(384+16)*2*1]
mova m11, m10
mova m12, m10
mova m13, m10
jmp .loop_y_second_load
.load_top:
movu m0, [sumsq_ptrq-(384+16)*4*1] ; l3/4sq [left]
movu m1, [sumsq_ptrq-(384+16)*4*1+32] ; l3/4sq [right]
movu m4, [sumsq_ptrq-(384+16)*4*0] ; l2sq [left]
movu m5, [sumsq_ptrq-(384+16)*4*0+32] ; l2sq [right]
mova m2, m0
mova m3, m1
movu m10, [sum_ptrq-(384+16)*2*1] ; l3/4
movu m12, [sum_ptrq-(384+16)*2*0] ; l2
mova m11, m10
.loop_y:
movu m6, [sumsq_ptrq+(384+16)*4*1] ; l1sq [left]
movu m7, [sumsq_ptrq+(384+16)*4*1+32] ; l1sq [right]
movu m13, [sum_ptrq+(384+16)*2*1] ; l1
.loop_y_second_load:
test yd, yd
jle .emulate_second_load
movu m8, [sumsq_ptrq+(384+16)*4*2] ; l0sq [left]
movu m9, [sumsq_ptrq+(384+16)*4*2+32] ; l0sq [right]
movu m14, [sum_ptrq+(384+16)*2*2] ; l0
.loop_y_noload:
paddd m0, m2
paddd m1, m3
paddw m10, m11
paddd m0, m4
paddd m1, m5
paddw m10, m12
paddd m0, m6
paddd m1, m7
paddw m10, m13
paddd m0, m8
paddd m1, m9
paddw m10, m14
movu [sumsq_ptrq+ 0], m0
movu [sumsq_ptrq+32], m1
movu [sum_ptrq], m10
; shift position down by one
mova m0, m4
mova m1, m5
mova m2, m6
mova m3, m7
mova m4, m8
mova m5, m9
mova m10, m12
mova m11, m13
mova m12, m14
add sumsq_ptrq, (384+16)*4*2
add sum_ptrq, (384+16)*2*2
sub yd, 2
jge .loop_y
; l1 = l0
mova m6, m8
mova m7, m9
mova m13, m14
cmp yd, ylimd
jg .loop_y_noload
add xd, 16
cmp xd, wd
jl .loop_x
RET
.emulate_second_load:
mova m8, m6
mova m9, m7
mova m14, m13
jmp .loop_y_noload
INIT_YMM avx2
cglobal sgr_calc_ab2, 4, 6, 11, a, b, w, h, s
sub aq, (384+16-1)*4
sub bq, (384+16-1)*2
add hd, 2
lea r5, [sgr_x_by_x-0xf03]
%ifidn sd, sm
movd xm6, sd
vpbroadcastd m6, xm6
%else
vpbroadcastd m6, sm
%endif
vpbroadcastd m8, [pd_0xf0080029]
vpbroadcastd m9, [pw_256]
pcmpeqb m7, m7
psrld m10, m9, 15 ; pd_512
DEFINE_ARGS a, b, w, h, x
.loop_y:
mov xq, -2
.loop_x:
pmovzxwd m0, [bq+xq*2+ 0]
pmovzxwd m1, [bq+xq*2+16]
movu m2, [aq+xq*4+ 0]
movu m3, [aq+xq*4+32]
pslld m4, m2, 3 ; aa * 8
pslld m5, m3, 3
paddd m2, m4 ; aa * 9
paddd m3, m5
paddd m4, m4 ; aa * 16
paddd m5, m5
paddd m2, m4 ; aa * 25
paddd m3, m5
pmaddwd m4, m0, m0
pmaddwd m5, m1, m1
psubd m2, m4 ; p = aa * 25 - bb * bb
psubd m3, m5
pmulld m2, m6
pmulld m3, m6
paddusw m2, m8
paddusw m3, m8
psrld m2, 20 ; z
psrld m3, 20
mova m5, m7
vpgatherdd m4, [r5+m2], m5 ; xx
mova m5, m7
vpgatherdd m2, [r5+m3], m5
psrld m4, 24
psrld m2, 24
packssdw m3, m4, m2
pmullw m4, m8
pmullw m2, m8
psubw m3, m9, m3
vpermq m3, m3, q3120
pmaddwd m0, m4
pmaddwd m1, m2
paddd m0, m10
paddd m1, m10
psrld m0, 10
psrld m1, 10
movu [bq+xq*2], m3
movu [aq+xq*4+ 0], m0
movu [aq+xq*4+32], m1
add xd, 16
cmp xd, wd
jl .loop_x
add aq, (384+16)*4*2
add bq, (384+16)*2*2
sub hd, 2
jg .loop_y
RET
INIT_YMM avx2
cglobal sgr_finish_filter2, 7, 13, 13, t, src, stride, a, b, w, h, \
tmp_ptr, src_ptr, a_ptr, b_ptr, x, y
vpbroadcastd m9, [pw_5_6]
vpbroadcastd m12, [pw_256]
psrlw m11, m12, 1 ; pw_128
psrlw m10, m12, 8 ; pw_1
xor xd, xd
.loop_x:
lea tmp_ptrq, [tq+xq*2]
lea src_ptrq, [srcq+xq*1]
lea a_ptrq, [aq+xq*4+(384+16)*4]
lea b_ptrq, [bq+xq*2+(384+16)*2]
movu m0, [aq+xq*4-(384+16)*4-4]
mova m1, [aq+xq*4-(384+16)*4]
movu m2, [aq+xq*4-(384+16)*4+4]
movu m3, [aq+xq*4-(384+16)*4-4+32]
mova m4, [aq+xq*4-(384+16)*4+32]
movu m5, [aq+xq*4-(384+16)*4+4+32]
paddd m0, m2
paddd m3, m5
paddd m0, m1
paddd m3, m4
pslld m2, m0, 2
pslld m5, m3, 2
paddd m2, m0
paddd m5, m3
paddd m0, m2, m1 ; prev_odd_b [first half]
paddd m1, m5, m4 ; prev_odd_b [second half]
movu m3, [bq+xq*2-(384+16)*2-2]
mova m4, [bq+xq*2-(384+16)*2]
movu m5, [bq+xq*2-(384+16)*2+2]
paddw m3, m5
punpcklwd m5, m3, m4
punpckhwd m3, m4
pmaddwd m5, m9
pmaddwd m3, m9
packssdw m2, m5, m3 ; prev_odd_a
mov yd, hd
.loop_y:
movu m3, [a_ptrq-4]
mova m4, [a_ptrq]
movu m5, [a_ptrq+4]
movu m6, [a_ptrq+32-4]
mova m7, [a_ptrq+32]
movu m8, [a_ptrq+32+4]
paddd m3, m5
paddd m6, m8
paddd m3, m4
paddd m6, m7
pslld m5, m3, 2
pslld m8, m6, 2
paddd m5, m3
paddd m8, m6
paddd m3, m5, m4 ; cur_odd_b [first half]
paddd m4, m8, m7 ; cur_odd_b [second half]
movu m5, [b_ptrq-2]
mova m6, [b_ptrq]
movu m7, [b_ptrq+2]
paddw m5, m7
punpcklwd m7, m5, m6
punpckhwd m5, m6
pmaddwd m7, m9
pmaddwd m5, m9
packssdw m5, m7, m5 ; cur_odd_a
paddd m0, m3 ; cur_even_b [first half]
paddd m1, m4 ; cur_even_b [second half]
paddw m2, m5 ; cur_even_a
pmovzxbw m6, [src_ptrq]
vperm2i128 m8, m0, m1, 0x31
vinserti128 m0, xm1, 1
punpcklwd m7, m6, m10
punpckhwd m6, m10
punpcklwd m1, m2, m12
punpckhwd m2, m12
pmaddwd m7, m1
pmaddwd m6, m2
paddd m7, m0
paddd m6, m8
psrad m7, 9
psrad m6, 9
pmovzxbw m8, [src_ptrq+strideq]
punpcklwd m0, m8, m10
punpckhwd m8, m10
punpcklwd m1, m5, m11
punpckhwd m2, m5, m11
pmaddwd m0, m1
pmaddwd m8, m2
vinserti128 m2, m3, xm4, 1
vperm2i128 m1, m3, m4, 0x31
paddd m0, m2
paddd m8, m1
psrad m0, 8
psrad m8, 8
packssdw m7, m6
packssdw m0, m8
mova [tmp_ptrq+384*2*0], m7
mova [tmp_ptrq+384*2*1], m0
mova m0, m3
mova m1, m4
mova m2, m5
add a_ptrq, (384+16)*4*2
add b_ptrq, (384+16)*2*2
add tmp_ptrq, 384*2*2
lea src_ptrq, [src_ptrq+strideq*2]
sub yd, 2
jg .loop_y
add xd, 16
cmp xd, wd
jl .loop_x
RET
INIT_YMM avx2
cglobal sgr_weighted2, 7, 7, 11, dst, stride, t1, t2, w, h, wt
vpbroadcastd m0, [wtq]
vpbroadcastd m10, [pd_1024]
DEFINE_ARGS dst, stride, t1, t2, w, h, idx
.loop_y:
xor idxd, idxd
.loop_x:
mova m1, [t1q+idxq*2+ 0]
mova m2, [t1q+idxq*2+32]
mova m3, [t2q+idxq*2+ 0]
mova m4, [t2q+idxq*2+32]
pmovzxbw m5, [dstq+idxq+ 0]
pmovzxbw m6, [dstq+idxq+16]
psllw m7, m5, 4
psllw m8, m6, 4
psubw m1, m7
psubw m2, m8
psubw m3, m7
psubw m4, m8
punpcklwd m9, m1, m3
punpckhwd m1, m3
punpcklwd m3, m2, m4
punpckhwd m2, m4
pmaddwd m9, m0
pmaddwd m1, m0
pmaddwd m3, m0
pmaddwd m2, m0
paddd m9, m10
paddd m1, m10
paddd m3, m10
paddd m2, m10
psrad m9, 11
psrad m1, 11
psrad m3, 11
psrad m2, 11
packssdw m1, m9, m1
packssdw m2, m3, m2
paddw m1, m5
paddw m2, m6
packuswb m1, m2
vpermq m1, m1, q3120
mova [dstq+idxq], m1
add idxd, 32
cmp idxd, wd
jl .loop_x
add dstq, strideq
add t1q, 384 * 2
add t2q, 384 * 2
dec hd
jg .loop_y
RET
%endif ; ARCH_X86_64
| 30.303004 | 88 | 0.475323 |
7b526dc52bf1eb1d5b963b2a17ad30c9d19adf56 | 189 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sccz80/l_f32_gt.asm | ahjelm/z88dk | c4de367f39a76b41f6390ceeab77737e148178fa | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sccz80/l_f32_gt.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sccz80/l_f32_gt.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_fp_am9511
PUBLIC l_f32_gt
EXTERN asm_am9511_compare_callee
.l_f32_gt
call asm_am9511_compare_callee
jr Z,gt1
ccf
ret C
.gt1
dec hl
ret
| 12.6 | 37 | 0.671958 |
d6ed12c630c408255f385db3a6b2ef9097ef896c | 712 | asm | Assembly | oeis/080/A080709.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/080/A080709.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/080/A080709.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A080709: Take sum of squares of digits of previous term, starting with 4.
; Submitted by Simon Strandgaard
; 4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58,89,145,42,20,4,16,37,58
mod $0,8
mov $1,$0
mov $2,$0
mov $3,$0
mov $4,$0
mov $5,$0
mov $6,$0
mov $7,$0
cmp $0,0
mul $0,4
cmp $1,1
mul $1,16
add $0,$1
cmp $2,2
mul $2,37
add $0,$2
cmp $3,3
mul $3,58
add $0,$3
cmp $4,4
mul $4,89
add $0,$4
cmp $5,5
mul $5,145
add $0,$5
cmp $6,6
mul $6,42
add $0,$6
cmp $7,7
mul $7,20
add $0,$7
| 19.777778 | 300 | 0.627809 |
72dd6ff354bddcf1644ce54f399ee0d0d5dbcde4 | 7,573 | asm | Assembly | 52-窗口图形绘制/OS-kernel-win-sheet/app_u.asm | wdkang123/MyOperatingSystem | 66d0fcbbde079a3fae75484871590df470229d7b | [
"MIT"
] | 7 | 2021-01-28T11:42:08.000Z | 2021-12-12T11:16:14.000Z | 52-窗口图形绘制/OS-kernel-win-sheet/app_u.asm | wdkang123/MyOperatingSystem | 66d0fcbbde079a3fae75484871590df470229d7b | [
"MIT"
] | 1 | 2021-09-09T03:52:11.000Z | 2021-09-13T00:20:23.000Z | 52-窗口图形绘制/OS-kernel-win-sheet/app_u.asm | wdkang123/MyOperatingSystem | 66d0fcbbde079a3fae75484871590df470229d7b | [
"MIT"
] | 1 | 2021-08-25T12:57:10.000Z | 2021-08-25T12:57:10.000Z | ; Disassembly of file: app.o
; Thu Aug 17 11:45:58 2017
; Mode: 32 bits
; Syntax: YASM/NASM
; Instruction set: 80386
global rand: function
global main: function
global ran
extern api_refreshwin ; near
extern api_linewin ; near
extern api_boxfilwin ; near
extern api_openwin ; near
SECTION .text align=1 execute ; section number 1, code
rand: ; Function begin
push ebp ; 0000 _ 55
mov ebp, esp ; 0001 _ 89. E5
mov eax, dword [ran] ; 0003 _ A1, 00000000(d)
imul eax, eax, 214013 ; 0008 _ 69. C0, 000343FD
add eax, 2531011 ; 000E _ 05, 00269EC3
mov dword [ran], eax ; 0013 _ A3, 00000000(d)
mov eax, dword [ran] ; 0018 _ A1, 00000000(d)
sar eax, 16 ; 001D _ C1. F8, 10
and eax, 7FFFH ; 0020 _ 25, 00007FFF
pop ebp ; 0025 _ 5D
ret ; 0026 _ C3
; rand End of function
main: ; Function begin
lea ecx, [esp+4H] ; 0027 _ 8D. 4C 24, 04
and esp, 0FFFFFFF0H ; 002B _ 83. E4, F0
push dword [ecx-4H] ; 002E _ FF. 71, FC
push ebp ; 0031 _ 55
mov ebp, esp ; 0032 _ 89. E5
push ecx ; 0034 _ 51
sub esp, 16020 ; 0035 _ 81. EC, 00003E94
sub esp, 12 ; 003B _ 83. EC, 0C
push ?_003 ; 003E _ 68, 00000000(d)
push -1 ; 0043 _ 6A, FF
push 100 ; 0045 _ 6A, 64
push 150 ; 0047 _ 68, 00000096
lea eax, [ebp-3E90H] ; 004C _ 8D. 85, FFFFC170
push eax ; 0052 _ 50
call api_openwin ; 0053 _ E8, FFFFFFFC(rel)
add esp, 32 ; 0058 _ 83. C4, 20
mov dword [ebp-10H], eax ; 005B _ 89. 45, F0
sub esp, 8 ; 005E _ 83. EC, 08
push 0 ; 0061 _ 6A, 00
push 93 ; 0063 _ 6A, 5D
push 143 ; 0065 _ 68, 0000008F
push 26 ; 006A _ 6A, 1A
push 6 ; 006C _ 6A, 06
push dword [ebp-10H] ; 006E _ FF. 75, F0
call api_boxfilwin ; 0071 _ E8, FFFFFFFC(rel)
add esp, 32 ; 0076 _ 83. C4, 20
mov dword [ebp-0CH], 0 ; 0079 _ C7. 45, F4, 00000000
mov dword [ebp-0CH], 0 ; 0080 _ C7. 45, F4, 00000000
jmp ?_002 ; 0087 _ EB, 4E
?_001: mov edx, dword [ebp-0CH] ; 0089 _ 8B. 55, F4
mov eax, edx ; 008C _ 89. D0
shl eax, 3 ; 008E _ C1. E0, 03
add eax, edx ; 0091 _ 01. D0
add eax, 26 ; 0093 _ 83. C0, 1A
sub esp, 8 ; 0096 _ 83. EC, 08
push dword [ebp-0CH] ; 0099 _ FF. 75, F4
push eax ; 009C _ 50
push 77 ; 009D _ 6A, 4D
push 26 ; 009F _ 6A, 1A
push 8 ; 00A1 _ 6A, 08
push dword [ebp-10H] ; 00A3 _ FF. 75, F0
call api_linewin ; 00A6 _ E8, FFFFFFFC(rel)
add esp, 32 ; 00AB _ 83. C4, 20
mov edx, dword [ebp-0CH] ; 00AE _ 8B. 55, F4
mov eax, edx ; 00B1 _ 89. D0
shl eax, 3 ; 00B3 _ C1. E0, 03
add eax, edx ; 00B6 _ 01. D0
add eax, 88 ; 00B8 _ 83. C0, 58
sub esp, 8 ; 00BB _ 83. EC, 08
push dword [ebp-0CH] ; 00BE _ FF. 75, F4
push 89 ; 00C1 _ 6A, 59
push eax ; 00C3 _ 50
push 26 ; 00C4 _ 6A, 1A
push 88 ; 00C6 _ 6A, 58
push dword [ebp-10H] ; 00C8 _ FF. 75, F0
call api_linewin ; 00CB _ E8, FFFFFFFC(rel)
add esp, 32 ; 00D0 _ 83. C4, 20
add dword [ebp-0CH], 1 ; 00D3 _ 83. 45, F4, 01
?_002: cmp dword [ebp-0CH], 7 ; 00D7 _ 83. 7D, F4, 07
jle ?_001 ; 00DB _ 7E, AC
sub esp, 12 ; 00DD _ 83. EC, 0C
push 90 ; 00E0 _ 6A, 5A
push 154 ; 00E2 _ 68, 0000009A
push 26 ; 00E7 _ 6A, 1A
push 6 ; 00E9 _ 6A, 06
push dword [ebp-10H] ; 00EB _ FF. 75, F0
call api_refreshwin ; 00EE _ E8, FFFFFFFC(rel)
add esp, 32 ; 00F3 _ 83. C4, 20
nop ; 00F6 _ 90
mov ecx, dword [ebp-4H] ; 00F7 _ 8B. 4D, FC
leave ; 00FA _ C9
lea esp, [ecx-4H] ; 00FB _ 8D. 61, FC
ret ; 00FE _ C3
; main End of function
SECTION .data align=4 noexecute ; section number 2, data
ran: ; dword
dd 00000017H ; 0000 _ 23
SECTION .bss align=1 noexecute ; section number 3, bss
SECTION .rodata align=1 noexecute ; section number 4, const
?_003: ; byte
db 73H, 74H, 61H, 72H, 00H ; 0000 _ star.
| 59.629921 | 86 | 0.302654 |
b312b67865c8237689850f84c159e126d265adcd | 309 | asm | Assembly | libsrc/_DEVELOPMENT/font/fzx/c/sdcc_iy/fzx_puts_justified_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/font/fzx/c/sdcc_iy/fzx_puts_justified_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/font/fzx/c/sdcc_iy/fzx_puts_justified_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; int fzx_puts_justified_callee(struct fzx_state *fs, char *s, uint16_t allowed_width)
SECTION code_font
SECTION code_font_fzx
PUBLIC _fzx_puts_justified_callee
EXTERN asm_fzx_puts_justified
_fzx_puts_justified_callee:
pop af
pop ix
pop hl
pop bc
push af
jp asm_fzx_puts_justified
| 15.45 | 86 | 0.786408 |
bba126b197b8f535bdab194fe8994f2c4bb7c770 | 7,311 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1623.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1623.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1623.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r15
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0xaaa0, %rsi
lea addresses_WT_ht+0xe860, %rdi
clflush (%rdi)
nop
nop
nop
sub %r11, %r11
mov $46, %rcx
rep movsq
nop
nop
nop
nop
xor %r15, %r15
lea addresses_normal_ht+0xb3ff, %rbp
nop
nop
nop
nop
and %r9, %r9
movb (%rbp), %r15b
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_UC_ht+0x68a8, %r9
add $19351, %r11
mov $0x6162636465666768, %r15
movq %r15, (%r9)
sub $49123, %rsi
lea addresses_WC_ht+0x10ea0, %rsi
clflush (%rsi)
nop
nop
nop
inc %rdi
mov (%rsi), %bp
nop
nop
nop
nop
nop
and %rsi, %rsi
lea addresses_WT_ht+0x57a0, %rsi
lea addresses_WC_ht+0x10610, %rdi
clflush (%rdi)
dec %r12
mov $125, %rcx
rep movsq
nop
nop
nop
nop
add %rdi, %rdi
lea addresses_A_ht+0x19aa0, %rdi
nop
nop
nop
nop
sub $8905, %rcx
mov $0x6162636465666768, %r15
movq %r15, (%rdi)
nop
nop
inc %r11
lea addresses_D_ht+0xeca0, %rcx
nop
cmp %rsi, %rsi
mov $0x6162636465666768, %r12
movq %r12, (%rcx)
nop
nop
nop
nop
xor %r12, %r12
lea addresses_UC_ht+0xfd89, %r12
nop
nop
and %rbp, %rbp
mov (%r12), %si
nop
nop
nop
nop
nop
cmp %r12, %r12
lea addresses_A_ht+0x13aa0, %rsi
lea addresses_normal_ht+0x90a0, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
nop
nop
add %r9, %r9
mov $87, %rcx
rep movsb
dec %rbp
lea addresses_WC_ht+0x196a0, %rsi
lea addresses_UC_ht+0x17aa0, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
add $54105, %rbp
mov $57, %rcx
rep movsq
sub $27376, %r12
lea addresses_A_ht+0x15aa0, %r11
nop
nop
nop
nop
nop
add $41922, %r12
movb (%r11), %r9b
nop
nop
nop
nop
sub %r11, %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r15
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
// Store
lea addresses_RW+0x148a0, %rsi
nop
nop
nop
nop
nop
add %r15, %r15
movl $0x51525354, (%rsi)
nop
nop
nop
and $57963, %rsi
// Store
lea addresses_A+0x15899, %rsi
nop
inc %rbp
movw $0x5152, (%rsi)
nop
nop
nop
inc %rdx
// Faulty Load
lea addresses_D+0x142a0, %rcx
nop
nop
xor $34504, %rdx
movups (%rcx), %xmm4
vpextrq $0, %xmm4, %rsi
lea oracles, %rbp
and $0xff, %rsi
shlq $12, %rsi
mov (%rbp,%rsi,1), %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': True, 'size': 2, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 6, 'type': 'addresses_WT_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 9}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 6}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': True, 'AVXalign': False, 'size': 2, 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_normal_ht'}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 11, 'type': 'addresses_UC_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 11}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 32.932432 | 2,999 | 0.657639 |
879229ce0ba9dd031e5857993a3f463962428542 | 865 | asm | Assembly | sw/552tests/rand_simple/t_1_slt.asm | JPShen-UWM/ThreadKraken | 849c510531f28e36d3469535737b2120bd774935 | [
"MIT"
] | 1 | 2022-02-15T16:03:25.000Z | 2022-02-15T16:03:25.000Z | sw/552tests/rand_simple/t_1_slt.asm | JPShen-UWM/ThreadKraken | 849c510531f28e36d3469535737b2120bd774935 | [
"MIT"
] | null | null | null | sw/552tests/rand_simple/t_1_slt.asm | JPShen-UWM/ThreadKraken | 849c510531f28e36d3469535737b2120bd774935 | [
"MIT"
] | null | null | null | // seed 1
lbi r0, 89 // icount 0
slbi r0, 59 // icount 1
lbi r1, 64 // icount 2
slbi r1, 30 // icount 3
lbi r2, 89 // icount 4
slbi r2, 10 // icount 5
lbi r3, 64 // icount 6
slbi r3, 199 // icount 7
lbi r4, 146 // icount 8
slbi r4, 50 // icount 9
lbi r5, 200 // icount 10
slbi r5, 41 // icount 11
lbi r6, 191 // icount 12
slbi r6, 190 // icount 13
lbi r7, 128 // icount 14
slbi r7, 112 // icount 15
slt r6, r6, r2 // icount 16
slt r1, r3, r1 // icount 17
slt r5, r1, r5 // icount 18
slt r6, r2, r0 // icount 19
slt r1, r1, r2 // icount 20
slt r0, r5, r6 // icount 21
slt r3, r0, r6 // icount 22
slt r6, r0, r0 // icount 23
slt r0, r6, r3 // icount 24
slt r0, r7, r1 // icount 25
slt r6, r0, r0 // icount 26
slt r5, r5, r1 // icount 27
slt r4, r1, r5 // icount 28
slt r7, r4, r1 // icount 29
slt r1, r4, r6 // icount 30
slt r3, r5, r1 // icount 31
halt // icount 32
| 24.714286 | 27 | 0.617341 |
2692c6908e549b63f19ec052c5963ff0c23e550f | 834 | asm | Assembly | src/boot.asm | krzem5/Assembly-32bit_OS_Simple_Kernel | 796d1e6becf59171f9f92e61706a8e98f05f7b7f | [
"BSD-3-Clause"
] | null | null | null | src/boot.asm | krzem5/Assembly-32bit_OS_Simple_Kernel | 796d1e6becf59171f9f92e61706a8e98f05f7b7f | [
"BSD-3-Clause"
] | null | null | null | src/boot.asm | krzem5/Assembly-32bit_OS_Simple_Kernel | 796d1e6becf59171f9f92e61706a8e98f05f7b7f | [
"BSD-3-Clause"
] | null | null | null | section .boot
[bits 16]
[org 0x7c00]
BOOT_DRIVE db 0
boot16:
mov [BOOT_DRIVE], dl
mov bp, 0x9000
mov sp, bp
mov bx, 0x1000
mov dh, 2
mov dl, [BOOT_DRIVE]
pusha
push dx
mov ah, 0x02
mov al, dh
mov cl, 0x02
mov ch, 0
mov dh, 0
int 0x13
jc err
pop dx
cmp al, dh
jne err
popa
cli
lgdt [gdt_pointer]
mov eax, cr0
or eax, 0x01
mov cr0, eax
jmp (gdt_code-gdt_start):boot32
err:
jmp $
gdt_start:
dq 0x00
gdt_code:
dw 0xffff
dw 0x00
db 0x00
db 0x9a
db 0xcf
db 0x00
gdt_data:
dw 0xffff
dw 0x00
db 0x00
db 0x92
db 0xcf
db 0x00
gdt_end:
gdt_pointer:
dw gdt_end-gdt_start
dd gdt_start
disk:
db 0x00
[bits 32]
boot32:
mov ax, (gdt_data-gdt_start)
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ebp, 0x90000
mov esp, ebp
call 0x1000
jmp $
times 510-($-$$) db 0
dw 0xaa55
global boot16
| 11.914286 | 32 | 0.681055 |
b74a2cbb022a2b0369d29b2c2380988377981cb8 | 2,428 | asm | Assembly | Kernel/asm/getTime.asm | gprinc/RoundTwo | afec4b592b7fb1226338c5af7c4574cb1a0cbc8f | [
"BSD-3-Clause"
] | 1 | 2016-06-11T22:15:03.000Z | 2016-06-11T22:15:03.000Z | Kernel/asm/getTime.asm | jcaracciolo/Arqui2016 | 180bbfd8cc657f2de72c5ec6a32912c0cadcf6c2 | [
"BSD-3-Clause"
] | null | null | null | Kernel/asm/getTime.asm | jcaracciolo/Arqui2016 | 180bbfd8cc657f2de72c5ec6a32912c0cadcf6c2 | [
"BSD-3-Clause"
] | null | null | null | global _getSeconds
global _getAlarmSeconds
global _getMinutes
global _getAlarmMinutes
global _getHoursASM
global _getAlarmHoursASM
global _getDayofWeek
global _getDayofMonth
global _getMonth
global _getYear
global _setAlarmSeconds
global _setAlarmMinutes
global _setAlarmHoursASM
section .text
%macro _setState 1
mov rax,0
mov al,0Bh
out 70h,al
in al,71h
or al,4
out 71h,al
mov al, %1
out 70h,al
%endmacro
_getSeconds:
push rbp
mov rbp,rsp
_setState 0
in al,71h
leave
ret
_getAlarmSeconds:
push rbp
mov rbp,rsp
_setState 1
in al,71h
leave
ret
_setAlarmSeconds:
push rbp
mov rbp,rsp
_setState 1
mov rax,rdi
out 71h,al
leave
ret
_getMinutes:
push rbp
mov rbp,rsp
_setState 2
in al,71h
leave
ret
_getAlarmMinutes:
push rbp
mov rbp,rsp
_setState 3
in al,71h
leave
ret
_setAlarmMinutes:
push rbp
mov rbp,rsp
_setState 3
mov rax,rdi
out 71h,al
leave
ret
_getHoursASM:
push rbp
mov rbp,rsp
_setState 4
in al,71h
leave
ret
_getAlarmHoursASM:
push rbp
mov rbp,rsp
_setState 5
in al,71h
leave
ret
_setAlarmHoursASM:
push rbp
mov rbp,rsp
_setState 5
mov rax,rdi
out 71h,al
leave
ret
_getDayofWeek:
push rbp
mov rbp,rsp
_setState 6
in al,71h
leave
ret
_getDayofMonth:
push rbp
mov rbp,rsp
_setState 7
in al,71h
leave
ret
_getMonth:
push rbp
mov rbp,rsp
_setState 8
in al,71h
leave
ret
_getYear:
push rbp
mov rbp,rsp
_setState 9
in al,71h
leave
ret
| 17.098592 | 24 | 0.446458 |
3ffd0eee3b61b1caff853a15c8823698ad0e2145 | 413 | asm | Assembly | oeis/263/A263394.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/263/A263394.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/263/A263394.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A263394: a(n) = Product_{i=1..n} (3^i - 2^i).
; Submitted by Christian Krause
; 1,5,95,6175,1302925,866445125,1784010512375,11248186280524375,215638979183932793125,12512451767147700321078125,2190917791975795178520458609375,1155369543009475708416871245360859375,1832567448623162714866960405275465241328125
mov $2,1
mov $3,2
mov $4,1
lpb $0
sub $0,1
mul $2,3
add $3,$2
mul $4,$3
mul $3,2
lpe
mov $0,$4
| 25.8125 | 226 | 0.760291 |
b6926196d2152bee23aaf4a9b1f53dee92a6deb1 | 516 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math32/c/sccz80/cm32_sccz80_fsfrexp_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math32/c/sccz80/cm32_sccz80_fsfrexp_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math32/c/sccz80/cm32_sccz80_fsfrexp_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_fp_math32
PUBLIC cm32_sccz80_frexp_callee
EXTERN m32_fsfrexp_callee
; float frexpf(float x, int16_t *pw2);
.cm32_sccz80_frexp_callee
; Entry:
; Stack: float left, ptr right, ret
; Reverse the stack
pop af ;my return
pop bc ;ptr
pop hl ;float
pop de
push bc ;ptr
push de ;float
push hl
push af ;my return
jp m32_fsfrexp_callee
| 22.434783 | 42 | 0.517442 |
65738ddcbf101598906fccd71a798f817304e6aa | 193 | asm | Assembly | src/WinEoP/Utils/EggTag.asm | quangnh89/WinEoP | b9c0f46a0bac8f4e4b68f289c127b87652d70004 | [
"MIT"
] | 25 | 2016-01-08T01:45:24.000Z | 2022-03-17T06:06:18.000Z | src/WinEoP/Utils/EggTag.asm | quangnh89/WinEoP | b9c0f46a0bac8f4e4b68f289c127b87652d70004 | [
"MIT"
] | null | null | null | src/WinEoP/Utils/EggTag.asm | quangnh89/WinEoP | b9c0f46a0bac8f4e4b68f289c127b87652d70004 | [
"MIT"
] | 10 | 2016-01-09T02:15:50.000Z | 2021-04-22T12:23:43.000Z | IFDEF I386
.586
.model flat, stdcall
ENDIF
.code wineop
IFDEF I386
EggTag PROC public
db 'Tx86Tx86'
EggTag ENDP
ELSEIFDEF AMD64
EggTag PROC public
db 'Tx64Tx64'
EggTag ENDP
ENDIF
END | 9.65 | 20 | 0.756477 |
5afc96ac0ae9e25ef9e64feb37a83c5c3254cf29 | 431 | asm | Assembly | programs/oeis/118/A118299.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/118/A118299.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/118/A118299.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A118299: Start with 24 and repeatedly reverse the digits and add 1 to get the next term.
; 24,43,35,54,46,65,57,76,68,87,79,98,90,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9,10,2,3,4,5,6,7,8,9
mov $2,$0
mov $0,24
lpb $2
seq $0,4086 ; Read n backwards (referred to as R(n) in many sequences).
add $0,1
sub $2,1
lpe
| 39.181818 | 211 | 0.614849 |
e52ea33c5aeab0b771ac0ef4279ceead2c6c0d29 | 5,646 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i7-8650U_0xd2_notsx.log_921_635.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i7-8650U_0xd2_notsx.log_921_635.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i7-8650U_0xd2_notsx.log_921_635.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r15
push %rax
push %rbx
push %rcx
push %rdx
lea addresses_A_ht+0x5af7, %rcx
nop
nop
nop
sub %rax, %rax
movl $0x61626364, (%rcx)
nop
nop
cmp $63706, %r15
lea addresses_UC_ht+0x1e377, %rbx
nop
nop
nop
nop
nop
add $18373, %r14
movw $0x6162, (%rbx)
nop
add %rcx, %rcx
lea addresses_WC_ht+0x1eef7, %rcx
nop
nop
nop
sub $45274, %r10
mov $0x6162636465666768, %r14
movq %r14, %xmm5
and $0xffffffffffffffc0, %rcx
vmovaps %ymm5, (%rcx)
nop
nop
sub $49912, %r14
lea addresses_UC_ht+0x31eb, %rcx
nop
nop
nop
nop
inc %rax
mov $0x6162636465666768, %r14
movq %r14, %xmm7
vmovups %ymm7, (%rcx)
nop
nop
sub %rbx, %rbx
lea addresses_WC_ht+0x13b97, %rcx
nop
nop
nop
nop
nop
sub $2605, %rdx
mov (%rcx), %r14d
nop
nop
nop
nop
nop
sub $53857, %rax
lea addresses_UC_ht+0x42f7, %r15
clflush (%r15)
nop
and %rdx, %rdx
movups (%r15), %xmm5
vpextrq $0, %xmm5, %rbx
nop
add %rdx, %rdx
lea addresses_UC_ht+0x56b7, %r14
clflush (%r14)
nop
nop
nop
nop
nop
add $12660, %r10
mov $0x6162636465666768, %rax
movq %rax, (%r14)
nop
nop
nop
nop
dec %rbx
lea addresses_WC_ht+0xd6f7, %rcx
nop
nop
xor %r14, %r14
movb (%rcx), %bl
nop
xor $3088, %rdx
pop %rdx
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r15
push %rbp
push %rdi
push %rdx
// Faulty Load
mov $0x4d495b0000000ef7, %r13
add $46815, %rbp
mov (%r13), %r14d
lea oracles, %rdx
and $0xff, %r14
shlq $12, %r14
mov (%rdx,%r14,1), %r14
pop %rdx
pop %rdi
pop %rbp
pop %r15
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': True, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'00': 921}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 37.892617 | 2,762 | 0.658165 |
ec54120dd56f0d8610ca335b8e7860af4280e346 | 879 | asm | Assembly | exercises/x86-64-assembly-2-b/.meta/start/3/x86_64_assembly_2_b.asm | ee7/exercism-research_experiment_1 | 92f875f53647f0da3dbcc32e13fdf53c77c3c460 | [
"MIT"
] | 8 | 2019-12-04T22:00:36.000Z | 2020-09-27T15:05:12.000Z | exercises/x86-64-assembly-2-b/.meta/start/3/x86_64_assembly_2_b.asm | ee7/exercism-research_experiment_1 | 92f875f53647f0da3dbcc32e13fdf53c77c3c460 | [
"MIT"
] | 92 | 2019-11-29T19:44:06.000Z | 2021-11-09T16:15:48.000Z | exercises/x86-64-assembly-2-b/.meta/start/3/x86_64_assembly_2_b.asm | ee7/exercism-research_experiment_1 | 92f875f53647f0da3dbcc32e13fdf53c77c3c460 | [
"MIT"
] | 27 | 2019-12-03T06:44:44.000Z | 2021-11-09T16:10:29.000Z | %include "debug.asm"
section .rodata
red: db "RED", 0
orange: db "ORANGE", 0
yellow: db "YELLOW", 0
green: db "GREEN", 0
blue: db "BLUE", 0
indigo: db "INDIGO", 0
violet: db "VIOLET", 0
jump_table:
dd label_red - jump_table
dd label_orange - jump_table
dd label_yellow - jump_table
dd label_green - jump_table
dd label_blue - jump_table
dd label_indigo - jump_table
dd label_violet - jump_table
section .text
global color_name
color_name:
mov edi, edi
lea rdx, [rel jump_table]
movsx rax, dword [rdx + rdi * 4]
add rax, rdx
jmp rax
label_red:
lea rax, [rel red]
ret
label_orange:
lea rax, [rel orange]
ret
label_yellow:
lea rax, [rel yellow]
ret
label_green:
lea rax, [rel green]
ret
label_blue:
lea rax, [rel blue]
ret
label_indigo:
lea rax, [rel indigo]
ret
label_violet:
lea rax, [rel violet]
ret
| 17.58 | 36 | 0.672355 |
f23c45acdcbaea2651323f9ea3cfd1a1f5535385 | 5,646 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_21829_1474.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_21829_1474.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_21829_1474.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r14
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x3f1, %rsi
lea addresses_normal_ht+0x1c451, %rdi
nop
nop
and $36797, %r11
mov $46, %rcx
rep movsl
nop
sub %r14, %r14
lea addresses_UC_ht+0x10611, %rsi
lea addresses_normal_ht+0x14125, %rdi
xor $13422, %rbx
mov $82, %rcx
rep movsw
nop
nop
dec %rdi
lea addresses_UC_ht+0x19d41, %rbx
inc %r13
movb (%rbx), %cl
nop
nop
nop
xor %rsi, %rsi
lea addresses_normal_ht+0x1d3a1, %rsi
clflush (%rsi)
nop
nop
and $32889, %r14
movb $0x61, (%rsi)
nop
nop
nop
nop
nop
sub %r13, %r13
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r14
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r9
push %rbp
push %rcx
push %rdi
push %rdx
// Store
mov $0xeaf, %r10
nop
nop
nop
nop
cmp %rcx, %rcx
mov $0x5152535455565758, %rdx
movq %rdx, %xmm7
movups %xmm7, (%r10)
nop
nop
nop
nop
nop
and $52045, %rdx
// Load
lea addresses_PSE+0x1e211, %r11
nop
nop
nop
xor %rbp, %rbp
mov (%r11), %rdi
nop
nop
nop
nop
xor %r11, %r11
// Store
lea addresses_D+0x53ab, %r10
nop
nop
nop
nop
nop
cmp %rcx, %rcx
movw $0x5152, (%r10)
nop
nop
nop
nop
nop
add $5768, %rcx
// Faulty Load
lea addresses_WT+0x16611, %rdi
dec %rdx
mov (%rdi), %r9w
lea oracles, %rdi
and $0xff, %r9
shlq $12, %r9
mov (%rdi,%r9,1), %r9
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 38.937931 | 2,999 | 0.657634 |
cee9866329552a3466410679410359673913f525 | 2,750 | asm | Assembly | src/coreclr/src/vm/amd64/UMThunkStub.asm | AlFasGD/runtime | 73ba11f3015216b39cb866d9fb7d3d25e93489f2 | [
"MIT"
] | 2 | 2020-06-06T08:29:06.000Z | 2020-06-06T09:08:57.000Z | src/coreclr/src/vm/amd64/UMThunkStub.asm | kerryjiang/runtime | 49f40c34e4e18a4b80c7aa5d11104c9624a2667e | [
"MIT"
] | 2 | 2020-06-06T09:07:48.000Z | 2020-06-06T09:13:07.000Z | src/coreclr/src/vm/amd64/UMThunkStub.asm | kerryjiang/runtime | 49f40c34e4e18a4b80c7aa5d11104c9624a2667e | [
"MIT"
] | 3 | 2021-02-10T16:20:05.000Z | 2021-03-12T07:55:36.000Z | ; Licensed to the .NET Foundation under one or more agreements.
; The .NET Foundation licenses this file to you under the MIT license.
; See the LICENSE file in the project root for more information.
; ==++==
;
;
; ==--==
include <AsmMacros.inc>
include AsmConstants.inc
extern TheUMEntryPrestubWorker:proc
extern UMEntryPrestubUnwindFrameChainHandler:proc
;
; METHODDESC_REGISTER: UMEntryThunk*
;
NESTED_ENTRY TheUMEntryPrestub, _TEXT, UMEntryPrestubUnwindFrameChainHandler
TheUMEntryPrestub_STACK_FRAME_SIZE = SIZEOF_MAX_OUTGOING_ARGUMENT_HOMES
; XMM save area
TheUMEntryPrestub_XMM_SAVE_OFFSET = TheUMEntryPrestub_STACK_FRAME_SIZE
TheUMEntryPrestub_STACK_FRAME_SIZE = TheUMEntryPrestub_STACK_FRAME_SIZE + SIZEOF_MAX_FP_ARG_SPILL
; Ensure that the new rsp will be 16-byte aligned. Note that the caller has
; already pushed the return address.
if ((TheUMEntryPrestub_STACK_FRAME_SIZE + 8) MOD 16) ne 0
TheUMEntryPrestub_STACK_FRAME_SIZE = TheUMEntryPrestub_STACK_FRAME_SIZE + 8
endif
alloc_stack TheUMEntryPrestub_STACK_FRAME_SIZE
save_reg_postrsp rcx, TheUMEntryPrestub_STACK_FRAME_SIZE + 8h
save_reg_postrsp rdx, TheUMEntryPrestub_STACK_FRAME_SIZE + 10h
save_reg_postrsp r8, TheUMEntryPrestub_STACK_FRAME_SIZE + 18h
save_reg_postrsp r9, TheUMEntryPrestub_STACK_FRAME_SIZE + 20h
save_xmm128_postrsp xmm0, TheUMEntryPrestub_XMM_SAVE_OFFSET
save_xmm128_postrsp xmm1, TheUMEntryPrestub_XMM_SAVE_OFFSET + 10h
save_xmm128_postrsp xmm2, TheUMEntryPrestub_XMM_SAVE_OFFSET + 20h
save_xmm128_postrsp xmm3, TheUMEntryPrestub_XMM_SAVE_OFFSET + 30h
END_PROLOGUE
;
; Do prestub-specific stuff
;
mov rcx, METHODDESC_REGISTER
call TheUMEntryPrestubWorker
;
; we're going to tail call to the exec stub that we just setup
;
mov rcx, [rsp + TheUMEntryPrestub_STACK_FRAME_SIZE + 8h]
mov rdx, [rsp + TheUMEntryPrestub_STACK_FRAME_SIZE + 10h]
mov r8, [rsp + TheUMEntryPrestub_STACK_FRAME_SIZE + 18h]
mov r9, [rsp + TheUMEntryPrestub_STACK_FRAME_SIZE + 20h]
movdqa xmm0, xmmword ptr [rsp + TheUMEntryPrestub_XMM_SAVE_OFFSET]
movdqa xmm1, xmmword ptr [rsp + TheUMEntryPrestub_XMM_SAVE_OFFSET + 10h]
movdqa xmm2, xmmword ptr [rsp + TheUMEntryPrestub_XMM_SAVE_OFFSET + 20h]
movdqa xmm3, xmmword ptr [rsp + TheUMEntryPrestub_XMM_SAVE_OFFSET + 30h]
;
; epilogue
;
add rsp, TheUMEntryPrestub_STACK_FRAME_SIZE
TAILJMP_RAX
NESTED_END TheUMEntryPrestub, _TEXT
end
| 35.714286 | 97 | 0.713455 |
676dd577182e46a36fa23cfc8cfed03a26e91c6a | 5,746 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_1047.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_1047.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_1047.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r12
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x3fa4, %rsi
lea addresses_WC_ht+0x2ca4, %rdi
clflush (%rsi)
nop
nop
nop
nop
inc %r12
mov $15, %rcx
rep movsl
nop
nop
nop
nop
dec %r10
lea addresses_A_ht+0xd0b4, %rbx
nop
nop
nop
nop
dec %rbp
movl $0x61626364, (%rbx)
nop
nop
nop
nop
cmp %rsi, %rsi
lea addresses_D_ht+0x7a4, %rsi
lea addresses_normal_ht+0x1d2a4, %rdi
nop
nop
nop
inc %rbp
mov $127, %rcx
rep movsq
nop
cmp %rbp, %rbp
lea addresses_UC_ht+0x18104, %rcx
nop
nop
nop
nop
nop
sub %r10, %r10
movb $0x61, (%rcx)
nop
nop
nop
nop
add $19781, %rcx
lea addresses_normal_ht+0x84a4, %rsi
lea addresses_WC_ht+0x3a64, %rdi
nop
nop
nop
sub %r11, %r11
mov $120, %rcx
rep movsq
nop
nop
sub $21775, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r12
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %rax
push %rbp
push %rcx
push %rdx
// Load
lea addresses_UC+0xc6a4, %r14
and %r11, %r11
movups (%r14), %xmm7
vpextrq $1, %xmm7, %rax
nop
nop
nop
nop
nop
sub %r14, %r14
// Load
lea addresses_PSE+0xdfd4, %rbp
clflush (%rbp)
nop
nop
nop
and %rcx, %rcx
mov (%rbp), %r11
nop
nop
nop
nop
sub $64544, %rax
// Faulty Load
lea addresses_PSE+0x10ca4, %rbp
sub $35465, %rdx
mov (%rbp), %rax
lea oracles, %rbp
and $0xff, %rax
shlq $12, %rax
mov (%rbp,%rax,1), %rax
pop %rdx
pop %rcx
pop %rbp
pop %rax
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'AVXalign': False, 'congruent': 8, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 4, 'size': 8, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 8, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 3, 'size': 4, 'same': False, 'NT': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 5, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': True}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 37.802632 | 2,999 | 0.660285 |
178e63a2aa7adc9d937db20452403b50b83243b9 | 8,590 | asm | Assembly | ggsound_nesasm/demo.asm | bunder2015/ggsound | cdf78933ce7300ec3e4aae795ea3352e7817c0e3 | [
"Unlicense"
] | 38 | 2017-03-18T19:15:04.000Z | 2022-03-13T09:03:49.000Z | ggsound_nesasm/demo.asm | bunder2015/ggsound | cdf78933ce7300ec3e4aae795ea3352e7817c0e3 | [
"Unlicense"
] | 3 | 2017-12-31T17:07:30.000Z | 2019-10-04T09:29:55.000Z | ggsound_nesasm/demo.asm | bunder2015/ggsound | cdf78933ce7300ec3e4aae795ea3352e7817c0e3 | [
"Unlicense"
] | 8 | 2018-01-26T16:50:10.000Z | 2021-04-28T20:55:03.000Z | include "ppu.inc"
include "ggsound.inc"
include "controller.inc"
include "sprite.inc"
;****************************************************************
;iNES header
;****************************************************************
.inesprg 2 ;2x 16KB PRG code
.ineschr 1 ;1x 8KB CHR data
.inesmap 0 ;mapper 0 = NROM, no bank swapping
.inesmir 1 ;background mirroring
;****************************************************************
;ZP variables
;****************************************************************
.rsset $0000
include "demo_zp.inc"
include "ggsound_zp.inc"
;****************************************************************
;RAM variables
;****************************************************************
.rsset $0200
include "demo_ram.inc"
include "ggsound_ram.inc"
;****************************************************************
;Engine code, music data, and helper modules
;****************************************************************
.bank 0
.org $8000
include "track_data.inc"
.bank 1
.org $A000
include "get_tv_system.asm"
include "ggsound.asm"
.bank 2
.org $C000
include "track_dpcm.inc"
.bank 3
.org $E000
include "sprite.asm"
include "ppu.asm"
include "controller.asm"
;****************************************************************
;Data used for demo
;****************************************************************
palette:
.db $0e,$08,$18,$20,$0e,$0e,$12,$20,$0e,$0e,$0e,$0e,$0e,$0e,$0e,$0e
.db $0e,$0e,$09,$1a,$0e,$0e,$0e,$0e,$0e,$0e,$0e,$0e,$0e,$0e,$0e,$0e
tv_system_to_sound_region:
.db SOUND_REGION_NTSC, SOUND_REGION_PAL, SOUND_REGION_DENDY, SOUND_REGION_NTSC
;****************************************************************
;Demo entry point
;****************************************************************
reset:
;Set interrupt disable flag.
sei
;Clear binary encoded decimal flag.
cld
;Disable APU frame IRQ.
lda #$40
sta $4017
;Initialize stack.
ldx #$FF
txs
;Turn off all graphics, and clear PPU registers.
lda #$00
sta ppu_2000
sta ppu_2001
upload_ppu_2000
upload_ppu_2001
;Disable DMC IRQs.
lda #$00
sta $4010
;Clear the vblank flag, so we know that we are waiting for the
;start of a vertical blank and not powering on with the
;vblank flag spuriously set.
bit $2002
;Wait for PPU to be ready.
vblankwait1:
bit $2002
bpl vblankwait1
vblankwait2:
bit $2002
bpl vblankwait2
;Install nmi routine for just counting nmis (detecting system)
lda #low(vblank_get_tv_system)
sta vblank_routine
lda #high(vblank_get_tv_system)
sta vblank_routine+1
;Initialize ppu registers with settings we're never going to change.
set_ppu_2000_bit PPU0_EXECUTE_NMI
set_ppu_2001_bit PPU1_SPRITE_CLIPPING
set_ppu_2001_bit PPU1_BACKGROUND_CLIPPING
clear_ppu_2000_bit PPU0_BACKGROUND_PATTERN_TABLE_ADDRESS
set_ppu_2000_bit PPU0_SPRITE_PATTERN_TABLE_ADDRESS
upload_ppu_2000
upload_ppu_2001
;Load palette.
lda #low(palette)
sta palette_address
lda #high(palette)
sta palette_address+1
jsr ppu_load_palette
;Load nametable.
lda #$20
sta ppu_2006
lda #$00
sta ppu_2006+1
upload_ppu_2006
lda #low(name_table)
sta w0
lda #high(name_table)
sta w0+1
jsr ppu_load_nametable
lda #0
sta next_sprite_address
;Draw sprite overlay.
lda #low(sprite_overlay)
sta w0
lda #high(sprite_overlay)
sta w0+1
jsr sprite_draw_overlay
;Get the sprites on the screen.
lda #high(sprite)
sta $4014
lda #$20
sta ppu_2006+1
lda #0
sta ppu_2006
sta ppu_2005
lda #-8
sta ppu_2005+1
upload_ppu_2006
upload_ppu_2005
;Turn on graphics and sprites.
set_ppu_2001_bit PPU1_SPRITE_VISIBILITY
set_ppu_2001_bit PPU1_BACKGROUND_VISIBILITY
upload_ppu_2001
lda #0
sta current_song
sta pause_flag
wait_vblank
;initialize modules
lda #0
sta nmis
jsr get_tv_system
tax
lda tv_system_to_sound_region,x
sta sound_param_byte_0
lda #low(song_list)
sta sound_param_word_0
lda #high(song_list)
sta sound_param_word_0+1
lda #low(sfx_list)
sta sound_param_word_1
lda #high(sfx_list)
sta sound_param_word_1+1
lda #low(instrument_list)
sta sound_param_word_2
lda #high(instrument_list)
sta sound_param_word_2+1
lda #low(dpcm_list)
sta sound_param_word_3
lda #high(dpcm_list)
sta sound_param_word_3+1
jsr sound_initialize
;load a song
lda current_song
sta sound_param_byte_0
jsr play_song
lda #low(vblank_demo)
sta vblank_routine
lda #high(vblank_demo)
sta vblank_routine+1
main_loop:
clear_vblank_done
wait_vblank_done
jsr controller_read
lda controller_buffer+buttons_a
and #%00000011
cmp #%00000001
bne .skipa
lda #sfx_index_sfx_collide
sta sound_param_byte_0
lda #soundeffect_one
sta sound_param_byte_1
jsr play_sfx
.skipa:
lda controller_buffer+buttons_b
and #%00000011
cmp #%00000001
bne .skipb
lda #sfx_index_sfx_dpcm
sta sound_param_byte_0
lda #soundeffect_two
sta sound_param_byte_1
jsr play_sfx
.skipb:
lda controller_buffer+buttons_up
and #%00000011
cmp #%00000001
bne .skipup
inc current_song
lda current_song
cmp #7
bne .skipcap
lda #6
sta current_song
.skipcap:
lda #0
sta pause_flag
lda current_song
sta sound_param_byte_0
jsr play_song
.skipup:
lda controller_buffer+buttons_down
and #%00000011
cmp #%00000001
bne .skipdown
dec current_song
lda current_song
cmp #$ff
bne .skipcap2
lda #0
sta current_song
.skipcap2:
lda #0
sta pause_flag
lda current_song
sta sound_param_byte_0
jsr play_song
.skipdown:
lda controller_buffer+buttons_start
and #%00000011
cmp #%00000001
bne .skipstart
lda pause_flag
eor #1
sta pause_flag
lda pause_flag
beq .unpause
.pause:
jsr pause_song
jmp .done
.unpause:
jsr resume_song
.done:
.skipstart:
jmp main_loop
vblank_get_tv_system:
inc nmis
rts
vblank_demo:
;Just use up vblank cycles to push monochrome bit
;CPU usage display of sound engine onto the screen.
ldy #130
lda sound_region
cmp #SOUND_REGION_PAL
bne .l1
ldy #255
.l1
.l2 ldx #7
.l3 dex
bne .l3
dey
bne .l2
;turn on monochrome color while the sound engine runs
set_ppu_2001_bit PPU1_DISPLAY_TYPE
upload_ppu_2001
;update the sound engine. This should always be done at the
;end of vblank, this way it is always running at the same speed
;even if your game slows down.
soundengine_update
;turn off monochrome color now that the sound engine is
;done. You should see a nice gray bar that shows how much
;cpu time the sound engine is using.
clear_ppu_2001_bit PPU1_DISPLAY_TYPE
upload_ppu_2001
rts
vblank:
pha
txa
pha
tya
pha
php
jsr vblank_indirect
lda #1
sta vblank_done_flag
plp
pla
tay
pla
tax
pla
irq:
rti
vblank_indirect:
jmp [vblank_routine]
name_table:
include "name_table.inc"
sprite_overlay:
include "sprite_overlay.inc"
;****************************************************************
;Vectors
;****************************************************************
.bank 3
.org $FFFA ;first of the three vectors starts here
.dw vblank ;when an NMI happens (once per frame if enabled) the
;processor will jump to the label NMI:
.dw reset ;when the processor first turns on or is reset, it will jump
;to the label RESET:
.dw irq ;external interrupt IRQ is not used in this tutorial
;****************************************************************
;CHR-ROM data
;****************************************************************
.bank 4
.rsset $0000
include "bg_chr.inc"
.org $1000
include "spr_chr.inc"
| 21.969309 | 83 | 0.563562 |
62d7a9a5e87495b2ac6703e8de1896250e3297e2 | 324 | asm | Assembly | oeis/198/A198630.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/198/A198630.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/198/A198630.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A198630: Alternating sums of powers of 1,2,...,7.
; Submitted by Christian Krause
; 1,4,28,208,1540,11344,83188,607408,4416580,31986064,230784148,1659338608,11892395620,84983496784,605698755508,4306834677808,30560156566660
mov $2,7
lpb $2
add $1,$3
mul $1,-1
mov $3,$2
sub $2,1
pow $3,$0
lpe
mov $0,$1
add $0,1
| 21.6 | 140 | 0.709877 |
2f5603e504ee9afafc83e7510013f0bacc97cdf5 | 5,430 | asm | Assembly | kernel/kernel.asm | gniuk/BOS | 5e144deaab35e84b572c5374dcda25490dd5c737 | [
"Unlicense"
] | 16 | 2015-01-21T18:19:25.000Z | 2022-02-10T02:56:59.000Z | kernel/kernel.asm | gniuk/BOS | 5e144deaab35e84b572c5374dcda25490dd5c737 | [
"Unlicense"
] | 1 | 2018-12-27T20:57:54.000Z | 2018-12-31T20:00:09.000Z | kernel/kernel.asm | gniuk/BOS | 5e144deaab35e84b572c5374dcda25490dd5c737 | [
"Unlicense"
] | 5 | 2015-01-16T13:31:14.000Z | 2019-07-01T15:17:44.000Z | ;-------------------------------------------------------;
; BOS kernel ;
;-------------------------------------------------------;
; BOS 32-bit kernel, expects to be loaded at 32kb ;
; in mem. Small amount of 16-bit code included. ;
; ;
; Homepage: http://bos.asmhackers.net/ ;
; Repository: http://github.com/bubach/BOS ;
; ;
; by: Christoffer Bubach, 2003-2015 ;
;-------------------------------------------------------;
use16
org 0x8000
;---------------------------;
; jump to starting point ;
;---------------------------;
jmp start
;----------------------------------------;
; 16-bit include files ;
;----------------------------------------;
include '16bit/a20.asm' ; Function to set the a20-gate.
include '16bit/gdt.asm' ; Global Description Table.
include '16bit/idt.asm' ; The Interrupt Description Table.
include '16bit/mem.asm' ; Get memory size.
include '16bit/variables.asm' ; For/from realmode.
include '16bit/init16bit.asm' ; Save "go back to 16-bit"-info.
;--------------------------;
; 16-bit entry point ;
;--------------------------;
start:
cli
mov ax, cs
mov ds, ax
; fasm is more strict about
xor eax, eax ; "org 0x10000" then nasm, so
mov es, ax ; i have to do -0x10000 from
mov fs, ax ; all variable addresses while
mov gs, ax ; in realmode.
sti
call enable_a20
call init16bit ; ... :P
cli
mov ax, cs ; save cs
mov [realmode_cs], ax ; in variables.inc
lgdt [gdtr] ; Load the GDT descriptor
lidt [idtr] ; Load the IDT descriptor
mov eax, cr0
or al, 1
mov cr0, eax
jmp pword 0x08:flush ; dword in nasm
;--------------------------;
; 32-bit entry point ;
;--------------------------;
use32
flush:
mov ax, 0x10 ; refresh all segment registers
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov esp, 0xFFFC
call bos_init ; fix everything
mov bx, 0x04B1 ; start the shell
call setcursor
mov esi, bos_shell
mov bl, 0x07
call print
call init_cmd
jmp shell
;int 0x32
.hang:
cli
hlt
jmp .hang ; hang, just in case..
;----------------------------------------;
; 32-bit include files ;
;----------------------------------------;
include 'int/idt.asm' ; The Interrupt Description Table.
include 'vga/text.asm' ; The default textmode functions.
include 'init/init32b.asm' ; Function that starts up BOS
include 'vars/strings.asm' ; All strings in english (soon).
include 'init/bios.asm' ; Get back to realmode and do an INT.
include 'init/pic.asm' ; PIC rutines.
include 'system/services.asm' ; System service handler (int 0x32).
include 'kbd/keyboard.asm' ; Keyboard ISR.
include 'kbd/keymap.asm' ; Keymap(s).
include 'shell/shell.asm' ; File with shell/kernel monitor functions.
include 'shell/commands.asm' ; Command table, for valid shell commands.
include 'int/isr.asm' ; Interrupt Service Rutines.
include 'int/debug.asm' ; Print contents of all regs and hang.
include 'init/cmos.asm' ; To get CMOS data.
include 'shell/clock.asm' ; Print time and date.
include 'init/timer.asm' ; Timer IRQ.
include 'vga/vga.asm' ; VGA functions.
; include 'vga/font8x16.asm' ; Standard font.
include 'fdc/dma.asm' ; DMA code.
include 'fdc/fdc.asm' ; Floppy code.
include 'vga/mario.asm' ; Mario sprite.
include 'sound/speaker.asm' ; PC speaker.
include 'ram/mem.asm' ; Memory allocation and freeing.
include 'vfs/parse.asm' ; Path parser for VFS functions. | 44.876033 | 98 | 0.367403 |
3ec2b151b7a23fd2f303817e51cae39af47c3f12 | 363 | asm | Assembly | text/maps/copycats_house_1f.asm | etdv-thevoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | 9 | 2020-07-12T19:44:21.000Z | 2022-03-03T23:32:40.000Z | text/maps/CopycatsHouse1F.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 7 | 2020-07-16T10:48:52.000Z | 2021-01-28T18:32:02.000Z | text/maps/CopycatsHouse1F.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 2 | 2021-03-28T18:33:43.000Z | 2021-05-06T13:12:09.000Z | _CopycatsHouse1FText1::
text "My daughter is so"
line "self-centered."
cont "She only has a"
cont "few friends."
done
_CopycatsHouse1FText2::
text "My daughter likes"
line "to mimic people."
para "Her mimicry has"
line "earned her the"
cont "nickname COPYCAT"
cont "around here!"
done
_CopycatsHouse1FText3::
text "CHANSEY: Chaan!"
line "Sii!@@"
| 17.285714 | 25 | 0.713499 |
a5265650c5566dd1ca71336816bc8b996116d436 | 310 | asm | Assembly | programs/oeis/021/A021865.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/021/A021865.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/021/A021865.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A021865: Decimal expansion of 1/861.
; 0,0,1,1,6,1,4,4,0,1,8,5,8,3,0,4,2,9,7,3,2,8,6,8,7,5,7,2,5,9,0,0,1,1,6,1,4,4,0,1,8,5,8,3,0,4,2,9,7,3,2,8,6,8,7,5,7,2,5,9,0,0,1,1,6,1,4,4,0,1,8,5,8,3,0,4,2,9,7,3,2,8,6,8,7,5,7,2,5,9,0,0,1,1,6,1,4,4,0
add $0,1
mov $1,10
pow $1,$0
mul $1,7
div $1,6027
mod $1,10
mov $0,$1
| 28.181818 | 199 | 0.541935 |
b77fc8c6e93bfaf008e9a905b31dae68f77ca94c | 603 | asm | Assembly | oeis/008/A008505.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/008/A008505.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/008/A008505.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A008505: 11-dimensional centered tetrahedral numbers.
; 1,13,91,455,1820,6188,18564,50388,125970,293930,646646,1352078,2704155,5200287,9657609,17383405,30419935,51889747,86474661,141070137,225666870,354523390,547707394,833099722,1248973544,1847282696,2697817448,3893413576,5556431725,7846758985,10971623663,15197557739,20864889773,28405204425,38362263615,51416949051,68416856768,90411251840,118692175952,154842592464,200792553390,258884480790,331948771882,423391063186,537292624687,678525500835,852884171685,1067235675129,1329690310507,1649795235439
mov $2,$0
add $0,12
bin $0,12
bin $2,12
sub $0,$2
| 67 | 495 | 0.859038 |
288d5419cfc29f88ebb64cf02a6f978d0ed2d1c6 | 10,564 | asm | Assembly | c0-compiler/test.asm | lzh97/C0-Compiler | c92c05726de12b0378114776821c3970588e9cdc | [
"Apache-2.0"
] | null | null | null | c0-compiler/test.asm | lzh97/C0-Compiler | c92c05726de12b0378114776821c3970588e9cdc | [
"Apache-2.0"
] | null | null | null | c0-compiler/test.asm | lzh97/C0-Compiler | c92c05726de12b0378114776821c3970588e9cdc | [
"Apache-2.0"
] | null | null | null | .data
base: .space 800
exp: .space 800
cnt: .word 0
$str0: .asciiz "Number is out of range."
$str1: .asciiz "Number is out of range."
$str2: .asciiz "="
$str3: .asciiz "*"
$str4: .asciiz "^"
$str5: .asciiz "Number is out of range."
$str6: .asciiz "Number is out of range."
$str7: .asciiz "Prime numbers:"
$str8: .asciiz " "
.text
jal main
li $v0, 10
syscall
mod:
subi $gp, $gp, 8
sw $fp, 0($sp)
sw $ra, -4($sp)
lw $s0, 0($gp)
lw $s1, 4($gp)
move $t8, $s0
move $t9, $s1
div $t8, $t9
mflo $t8
move $a1, $t8
move $t8, $a1
move $t9, $s1
mul $t8, $t8, $t9
move $a2, $t8
move $t8, $s0
move $t9, $a2
sub $t8, $t8, $t9
move $a3, $t8
move $v0, $a3
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
init:
sw $fp, 0($sp)
sw $ra, -4($sp)
li $t8, 2
move $s0, $t8
li $t8, 0
la $t9, cnt
sw $t8, 0($t9)
$lab0:
addi $t8, $sp, -40
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
sub $t8, $t8, $t9
li $t9, 1
sw $t9, 0($t8)
move $t8, $s0
li $t9, 1
add $t8, $t8, $t9
move $s0, $t8
move $t8, $s0
li $t9, 1000
sle $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
bne $t8, $0, $lab0
li $t8, 2
move $s0, $t8
$lab1:
addi $t8, $sp, -40
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
sub $t8, $t8, $t9
lw $t8, 0($t8)
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab3
la $t8, base
la $t9, cnt
lw $t9, 0($t9)
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
move $t9, $s0
sw $t9, 0($t8)
la $t8, exp
la $t9, cnt
lw $t9, 0($t9)
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
li $t9, 0
sw $t9, 0($t8)
la $t8, cnt
lw $t8, 0($t8)
li $t9, 1
add $t8, $t8, $t9
la $t9, cnt
sw $t8, 0($t9)
li $t8, 2
move $s1, $t8
move $t8, $s0
move $t9, $s1
mul $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
li $t9, 1000
sle $t8, $t8, $t9
move $a2, $t8
move $t8, $a2
beq $t8, $0, $lab3
$lab4:
move $t8, $s0
move $t9, $s1
mul $t8, $t8, $t9
move $a1, $t8
addi $t8, $sp, -40
move $t9, $a1
li $at, 4
mul $t9, $t9, $at
sub $t8, $t8, $t9
li $t9, 0
sw $t9, 0($t8)
move $t8, $s1
li $t9, 1
add $t8, $t8, $t9
move $s1, $t8
move $t8, $s0
move $t9, $s1
mul $t8, $t8, $t9
move $a2, $t8
move $t8, $a2
li $t9, 1000
sle $t8, $t8, $t9
move $a3, $t8
move $t8, $a3
bne $t8, $0, $lab4
$lab3:
move $t8, $s0
li $t9, 1
add $t8, $t8, $t9
move $s0, $t8
move $t8, $s0
li $t9, 1000
sle $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
bne $t8, $0, $lab1
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
resolve:
subi $gp, $gp, 8
sw $fp, 0($sp)
sw $ra, -4($sp)
lw $s1, 0($gp)
lw $s0, 4($gp)
move $t8, $s1
li $t9, 1
seq $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab5
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab5:
sw $s1, 0($gp)
addi $gp, $gp, 4
la $t8, base
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
addi $t9, $sp, -40
sw $t8, 0($t9)
lw $t8, -40($sp)
sw $t8, 0($gp)
addi $gp, $gp, 4
sw $s0, -8($sp)
sw $s1, -12($sp)
sw $s2, -16($sp)
sw $s3, -20($sp)
sw $s4, -24($sp)
sw $s5, -28($sp)
sw $s6, -32($sp)
sw $s7, -36($sp)
move $fp, $sp
subi $sp, $sp, 64
jal mod
move $a1, $v0
move $t8, $a1
li $t9, 0
seq $t8, $t8, $t9
move $a2, $t8
move $t8, $a2
beq $t8, $0, $lab6
la $t8, exp
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
addi $t9, $sp, -44
sw $t8, 0($t9)
lw $t8, -44($sp)
li $t9, 1
add $t8, $t8, $t9
sw $t8, -48($sp)
la $t8, exp
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t9, -48($sp)
sw $t9, 0($t8)
la $t8, base
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
addi $t9, $sp, -52
sw $t8, 0($t9)
move $t8, $s1
lw $t9, -52($sp)
div $t8, $t9
mflo $t8
sw $t8, -56($sp)
lw $t8, -56($sp)
sw $t8, 0($gp)
addi $gp, $gp, 4
sw $s0, 0($gp)
addi $gp, $gp, 4
sw $s0, -8($sp)
sw $s1, -12($sp)
sw $s2, -16($sp)
sw $s3, -20($sp)
sw $s4, -24($sp)
sw $s5, -28($sp)
sw $s6, -32($sp)
sw $s7, -36($sp)
move $fp, $sp
subi $sp, $sp, 64
jal resolve
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab6:
sw $s1, 0($gp)
addi $gp, $gp, 4
move $t8, $s0
li $t9, 1
add $t8, $t8, $t9
sw $t8, -60($sp)
lw $t8, -60($sp)
sw $t8, 0($gp)
addi $gp, $gp, 4
sw $s0, -8($sp)
sw $s1, -12($sp)
sw $s2, -16($sp)
sw $s3, -20($sp)
sw $s4, -24($sp)
sw $s5, -28($sp)
sw $s6, -32($sp)
sw $s7, -36($sp)
move $fp, $sp
subi $sp, $sp, 64
jal resolve
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
main:
sw $fp, 0($sp)
sw $ra, -4($sp)
sw $s0, -8($sp)
sw $s1, -12($sp)
sw $s2, -16($sp)
sw $s3, -20($sp)
sw $s4, -24($sp)
sw $s5, -28($sp)
sw $s6, -32($sp)
sw $s7, -36($sp)
move $fp, $sp
subi $sp, $sp, 48
jal init
li $v0, 12
syscall
move $s2, $v0
li $v0, 5
syscall
move $s1, $v0
move $t8, $s2
li $t9, 114
seq $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab7
move $t8, $s1
li $t9, 2
slt $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab8
la $a0, $str0
li $v0, 4
syscall
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab8:
move $t8, $s1
li $t9, 1000
sgt $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab9
la $a0, $str1
li $v0, 4
syscall
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab9:
sw $s1, 0($gp)
addi $gp, $gp, 4
li $t8, 0
sw $t8, 0($gp)
addi $gp, $gp, 4
sw $s0, -8($sp)
sw $s1, -12($sp)
sw $s2, -16($sp)
sw $s3, -20($sp)
sw $s4, -24($sp)
sw $s5, -28($sp)
sw $s6, -32($sp)
sw $s7, -36($sp)
move $fp, $sp
subi $sp, $sp, 48
jal resolve
move $a0, $s1
li $v0, 1
syscall
la $a0, $str2
li $v0, 4
syscall
li $t8, 0
move $s3, $t8
li $t8, 0
move $s0, $t8
$lab10:
la $t8, exp
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
move $a1, $t8
move $t8, $a1
li $t9, 0
sgt $t8, $t8, $t9
move $a2, $t8
move $t8, $a2
beq $t8, $0, $lab11
move $t8, $s3
beq $t8, $0, $lab12
la $a0, $str3
li $v0, 4
syscall
$lab12:
la $t8, base
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
move $a1, $t8
move $a0, $a1
li $v0, 1
syscall
la $t8, exp
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
move $a2, $t8
move $t8, $a2
li $t9, 1
sgt $t8, $t8, $t9
move $a3, $t8
move $t8, $a3
beq $t8, $0, $lab13
la $a0, $str4
li $v0, 4
syscall
la $t8, exp
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
move $a1, $t8
move $a0, $a1
li $v0, 1
syscall
$lab13:
li $t8, 1
move $s3, $t8
$lab11:
move $t8, $s0
li $t9, 1
add $t8, $t8, $t9
move $s0, $t8
move $t8, $s0
la $t9, cnt
lw $t9, 0($t9)
slt $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
bne $t8, $0, $lab10
$lab7:
move $t8, $s2
li $t9, 116
seq $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab14
move $t8, $s1
li $t9, 2
slt $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab15
la $a0, $str5
li $v0, 4
syscall
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab15:
move $t8, $s1
li $t9, 1000
sgt $t8, $t8, $t9
move $a1, $t8
move $t8, $a1
beq $t8, $0, $lab16
la $a0, $str6
li $v0, 4
syscall
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab16:
la $a0, $str7
li $v0, 4
syscall
li $t8, 0
move $s0, $t8
$lab17:
la $a0, $str8
li $v0, 4
syscall
la $t8, base
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
move $a1, $t8
move $a0, $a1
li $v0, 1
syscall
move $t8, $s0
li $t9, 1
add $t8, $t8, $t9
move $s0, $t8
move $t8, $s0
la $t9, cnt
lw $t9, 0($t9)
sge $t8, $t8, $t9
move $a2, $t8
move $t8, $a2
beq $t8, $0, $lab18
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
$lab18:
la $t8, base
move $t9, $s0
li $at, 4
mul $t9, $t9, $at
add $t8, $t8, $t9
lw $t8, 0($t8)
move $a1, $t8
move $t8, $a1
move $t9, $s1
sle $t8, $t8, $t9
move $a2, $t8
move $t8, $a2
bne $t8, $0, $lab17
$lab14:
lw $ra, -4($sp)
lw $sp, 0($sp)
lw $s0, -8($sp)
lw $s1, -12($sp)
lw $s2, -16($sp)
lw $s3, -20($sp)
lw $s4, -24($sp)
lw $s5, -28($sp)
lw $s6, -32($sp)
lw $s7, -36($sp)
jr $ra
| 17.724832 | 40 | 0.434684 |
4661c1e89b1ecd86e44ae9a5b3d626190e5ab8ff | 268 | asm | Assembly | oeis/108/A108225.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/108/A108225.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/108/A108225.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A108225: a(0) = 0, a(1) = 2; for n >= 2, a(n) = (a(n-1) + a(n-2))*(a(n-1) - a(n-2) + 1)/2.
; 0,2,3,5,12,68,2280,2598062,3374961778893,5695183504492614029263280,16217557574922386301420536972254869595782763547562
lpb $0
sub $0,1
bin $1,2
add $1,2
lpe
mov $0,$1
| 26.8 | 119 | 0.626866 |
9bccd89b74f4071b1ff7eb62630ae89becde6821 | 7,594 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1802.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1802.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1802.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %r9
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x15cbf, %r15
nop
nop
nop
add $8916, %r9
mov $0x6162636465666768, %rsi
movq %rsi, (%r15)
nop
nop
and $62563, %rbp
lea addresses_WT_ht+0xa0bf, %rsi
lea addresses_WT_ht+0x1c93b, %rdi
inc %r10
mov $69, %rcx
rep movsw
nop
dec %rbp
lea addresses_A_ht+0x15e3f, %r15
nop
nop
nop
nop
and $23682, %r9
mov $0x6162636465666768, %rdi
movq %rdi, %xmm2
vmovups %ymm2, (%r15)
xor %r15, %r15
lea addresses_D_ht+0x16b9f, %rsi
lea addresses_D_ht+0x18e3f, %rdi
nop
nop
sub %rdx, %rdx
mov $6, %rcx
rep movsq
xor %rbp, %rbp
lea addresses_A_ht+0x1617f, %r9
nop
nop
nop
nop
nop
dec %rbp
movl $0x61626364, (%r9)
nop
inc %rdi
lea addresses_WC_ht+0x13d9f, %rbp
nop
nop
cmp %rdi, %rdi
vmovups (%rbp), %ymm6
vextracti128 $1, %ymm6, %xmm6
vpextrq $1, %xmm6, %rsi
nop
nop
nop
nop
add %rbp, %rbp
lea addresses_normal_ht+0xe36c, %rsi
lea addresses_WT_ht+0x1efd3, %rdi
nop
nop
nop
nop
nop
inc %r15
mov $32, %rcx
rep movsb
and %rdx, %rdx
lea addresses_D_ht+0x133bf, %r15
nop
nop
nop
cmp %rsi, %rsi
movl $0x61626364, (%r15)
sub %rdx, %rdx
lea addresses_WT_ht+0xb53f, %rdx
nop
nop
sub $40152, %r15
mov (%rdx), %di
nop
nop
nop
nop
add $48071, %r15
lea addresses_WC_ht+0x2e3f, %rdi
clflush (%rdi)
nop
nop
cmp $634, %r10
movb (%rdi), %r15b
inc %rcx
lea addresses_WT_ht+0xd233, %rdi
nop
nop
add $1788, %r15
mov (%rdi), %r9
nop
nop
nop
nop
nop
inc %rdx
lea addresses_normal_ht+0xe43f, %rsi
lea addresses_D_ht+0x9c7f, %rdi
nop
nop
xor $24961, %rdx
mov $49, %rcx
rep movsl
nop
nop
nop
nop
and $57850, %r15
lea addresses_WC_ht+0xcc0f, %rsi
lea addresses_normal_ht+0x633f, %rdi
clflush (%rsi)
clflush (%rdi)
nop
inc %r9
mov $20, %rcx
rep movsl
nop
nop
nop
cmp $49910, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r15
push %rbp
push %rdi
push %rsi
// Store
lea addresses_PSE+0x7b3f, %r14
nop
nop
nop
nop
nop
dec %r13
mov $0x5152535455565758, %r15
movq %r15, (%r14)
nop
nop
nop
nop
inc %r14
// Faulty Load
lea addresses_PSE+0x463f, %rsi
nop
nop
nop
add %r11, %r11
vmovups (%rsi), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rdi
lea oracles, %r11
and $0xff, %rdi
shlq $12, %rdi
mov (%r11,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rbp
pop %r15
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 7, 'NT': False, 'type': 'addresses_PSE', 'size': 8, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_D_ht', 'size': 8, 'AVXalign': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False}}
{'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 7, 'NT': False, 'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_WC_ht', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 34.518182 | 2,999 | 0.659073 |
3d504469ab0acce873f1fd0fe11a6a36154b8a78 | 379 | asm | Assembly | programs/oeis/120/A120179.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/120/A120179.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/120/A120179.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A120179: a(1)=2; a(n)=floor((13+sum(a(1) to a(n-1)))/6).
; 2,2,2,3,3,4,4,5,6,7,8,9,11,13,15,17,20,24,28,32,38,44,51,60,70,81,95,111,129,151,176,205,239,279,326,380,443,517,603,704,821,958,1118,1304,1521,1775,2071,2416,2819,3288,3836,4476,5222,6092,7107,8292,9674,11286
add $0,1
mov $2,$0
mov $3,1
lpb $2
mov $0,$3
div $0,6
add $3,2
add $3,$0
add $0,2
sub $2,1
lpe
| 25.266667 | 211 | 0.617414 |
1010965e986d45c4f46cbf9750ec5a8b5943ffc7 | 7,519 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1700.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1700.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1700.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r8
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_UC_ht+0x176ea, %rbx
nop
nop
nop
sub $32821, %r10
mov (%rbx), %r11
nop
nop
nop
add %r11, %r11
lea addresses_normal_ht+0x5eb2, %rbp
nop
nop
nop
nop
nop
cmp $530, %r10
vmovups (%rbp), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $0, %xmm2, %r8
nop
nop
add $48532, %rbp
lea addresses_A_ht+0x5aea, %rbp
nop
nop
xor $13379, %rdx
vmovups (%rbp), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $0, %xmm1, %r10
nop
nop
nop
nop
and %rdx, %rdx
lea addresses_UC_ht+0x18a4c, %r10
nop
nop
nop
nop
nop
xor %r8, %r8
vmovups (%r10), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rdx
nop
nop
nop
nop
nop
dec %rbp
lea addresses_UC_ht+0x82ea, %rdx
nop
nop
nop
nop
and %rax, %rax
movb $0x61, (%rdx)
nop
nop
nop
add $54368, %rbx
lea addresses_WC_ht+0x199ea, %r10
nop
nop
xor %r11, %r11
and $0xffffffffffffffc0, %r10
vmovntdqa (%r10), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %rbx
nop
nop
cmp $59393, %rbp
lea addresses_D_ht+0x4ee8, %rsi
lea addresses_WT_ht+0x198ea, %rdi
nop
dec %r8
mov $99, %rcx
rep movsl
nop
nop
nop
cmp %rdx, %rdx
lea addresses_D_ht+0x13a6a, %rdx
clflush (%rdx)
nop
cmp $3105, %r10
mov $0x6162636465666768, %r8
movq %r8, %xmm2
vmovups %ymm2, (%rdx)
nop
nop
nop
nop
xor %r8, %r8
lea addresses_WT_ht+0x4cea, %rsi
lea addresses_WC_ht+0x114aa, %rdi
nop
cmp $54632, %r8
mov $15, %rcx
rep movsw
nop
nop
add $59820, %rdi
lea addresses_normal_ht+0xa52a, %r11
nop
and %rdx, %rdx
mov $0x6162636465666768, %r10
movq %r10, %xmm0
vmovups %ymm0, (%r11)
nop
nop
nop
nop
xor %rcx, %rcx
lea addresses_normal_ht+0x1193a, %rbp
inc %r10
mov $0x6162636465666768, %r11
movq %r11, %xmm5
movups %xmm5, (%rbp)
cmp %rdi, %rdi
lea addresses_A_ht+0x11eea, %rsi
lea addresses_normal_ht+0x966a, %rdi
nop
nop
nop
nop
xor $55705, %rax
mov $67, %rcx
rep movsb
sub %r10, %r10
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %rbp
push %rbx
push %rcx
push %rsi
// Store
lea addresses_D+0x1e6ea, %rbp
nop
nop
xor $57496, %rbx
movl $0x51525354, (%rbp)
nop
nop
nop
nop
and $9272, %rbp
// Faulty Load
lea addresses_D+0x150ea, %rbp
nop
nop
nop
cmp $56926, %rcx
movups (%rbp), %xmm3
vpextrq $1, %xmm3, %rsi
lea oracles, %r11
and $0xff, %rsi
shlq $12, %rsi
mov (%r11,%rsi,1), %rsi
pop %rsi
pop %rcx
pop %rbx
pop %rbp
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': False, 'type': 'addresses_D'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9, 'same': False, 'type': 'addresses_D'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_D'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 9, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 5, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'STOR'}
{'src': {'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 7, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 1, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 3, 'same': True, 'type': 'addresses_D_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_WT_ht'}, 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 5, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM'}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 34.177273 | 2,999 | 0.65913 |
27ef2811164ffd66af28dbd2a80fc94aff9a4333 | 2,984 | asm | Assembly | source/tvision/hardware.asm | g8kig/tvision | cefdb52ce008446679f8a7af4d15f4749e6fa39c | [
"MIT"
] | 1,202 | 2020-05-10T18:43:45.000Z | 2022-03-31T18:23:27.000Z | source/tvision/hardware.asm | skywind3000/tvision | 7ab5f195c572de0d496e92f4e3f7b3b0771ac699 | [
"MIT"
] | 54 | 2020-05-10T17:36:55.000Z | 2022-03-15T12:22:07.000Z | source/tvision/hardware.asm | skywind3000/tvision | 7ab5f195c572de0d496e92f4e3f7b3b0771ac699 | [
"MIT"
] | 90 | 2020-06-28T13:51:47.000Z | 2022-03-26T21:00:17.000Z | ;/*------------------------------------------------------------*/
;/* filename - hardware.cpp */
;/* */
;/* function(s) */
;/* THardwareInfo member functions and */
;/* variables. */
;/*------------------------------------------------------------*/
;
; Turbo Vision - Version 2.0
;
; Copyright (c) 1994 by Borland International
; All Rights Reserved.
;
INCLUDE TV.INC
IFNDEF __FLAT__
PUBLIC @THardwareInfo@$bctr$qv
PUBLIC @THardwareInfo@$bdtr$qv
PUBLIC @THardwareInfo@getBiosEquipmentFlag$qi
PUBLIC @THardwareInfo@getBiosSelector$qv
EXTRN @THardwareInfo@dpmiFlag : BYTE
EXTRN @THardwareInfo@colorSel : WORD
EXTRN @THardwareInfo@monoSel : WORD
EXTRN @THardwareInfo@biosSel : WORD
ENDIF
CODESEG
ASSUME DS:DGROUP
; THardwareInfo non-inline functions
IFNDEF __FLAT__
@THardwareInfo@$bctr$qv PROC FAR
; Are we running in protected mode?
MOV AX, 352FH ; Check for a null INT 2F handler first
INT 21H ; just in case.
MOV AX, ES
OR AX, BX
JZ @@nodpmi
MOV AX, 0FB42H
MOV BX, 01H
INT 2FH
CMP AX, 01H
JNE @@nodpmi
; Yes, in protected mode, thus we need to allocate selectors...
MOV [@THardwareInfo@dpmiFlag], 01H
MOV AX, 02H
MOV BX, 0040H
INT 31H
MOV [@THardwareInfo@biosSel], AX
MOV AX, 02H
MOV BX, 0B000H
INT 31H
MOV [@THardwareInfo@monoSel], AX
MOV AX, 02H
MOV BX, 0B800H
INT 31H
MOV [@THardwareInfo@colorSel], AX
RET
@@nodpmi:
MOV [@THardwareInfo@dpmiFlag], 00H
MOV [@THardwareInfo@biosSel], 00040H
MOV [@THardwareInfo@monoSel], 0B000H
MOV [@THardwareInfo@colorSel], 0B800H
RET
@THardwareInfo@$bctr$qv ENDP
@THardwareInfo@$bdtr$qv PROC FAR
RET
@THardwareInfo@$bdtr$qv ENDP
@THardwareInfo@getBiosEquipmentFlag$qi PROC FAR
PUSH DS
MOV AX, SEG DGROUP
MOV DS, AX
MOV BX, 10H
MOV ES, WORD PTR DGROUP:[@THardwareInfo@biosSel]
MOV AX, ES:[BX]
POP DS
RET
@THardwareInfo@getBiosEquipmentFlag$qi ENDP
@THardwareInfo@getBiosSelector$qv PROC FAR
PUSH DS
MOV AX, SEG DGROUP
MOV DS, AX
MOV AX, WORD PTR DGROUP:[@THardwareInfo@biosSel]
POP DS
RET
@THardwareInfo@getBiosSelector$qv ENDP
ENDIF
END
| 26.882883 | 68 | 0.470509 |
f08093b6559e85ce72c5945239d45eff2557aa16 | 730 | asm | Assembly | oeis/048/A048922.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/048/A048922.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/048/A048922.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A048922: Indices of 9-gonal numbers which are also octagonal.
; Submitted by Jon Maiga
; 1,425,286209,192904201,130017145025,87631362842409,59063408538638401,39808649723679439625,26830970850351403668609,18084034544487122393202601,12188612452013470141614884225,8215106708622534388326038764809,5536969732999136164261608512596801,3731909384934709152177935811451478825,2515301388476260969431764475309784131009,1695309403923614958687857078422983052821001,1142636022943128005894646239092615267817223425,770134984154264352358032877291344267525755767209
mul $0,2
mov $1,2
mov $2,3
lpb $0
sub $0,1
add $1,1
add $1,$2
add $2,$1
add $1,$2
add $1,$2
add $2,$1
add $1,$2
add $2,$1
lpe
mov $0,$1
mul $0,2
div $0,7
add $0,1
| 31.73913 | 458 | 0.815068 |
40cfcf66a72604d88485b54dd1a2400d031bc7a9 | 164 | asm | Assembly | libsrc/_DEVELOPMENT/adt/bv_stack/c/sccz80/bv_stack_pop.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 8 | 2017-01-18T12:02:17.000Z | 2021-06-12T09:40:28.000Z | libsrc/_DEVELOPMENT/adt/bv_stack/c/sccz80/bv_stack_pop.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2017-03-06T07:41:56.000Z | 2017-03-06T07:41:56.000Z | libsrc/_DEVELOPMENT/adt/bv_stack/c/sccz80/bv_stack_pop.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 3 | 2017-03-07T03:19:40.000Z | 2021-09-15T17:59:19.000Z |
; int bv_stack_pop(bv_stack_t *s)
SECTION code_clib
SECTION code_adt_bv_stack
PUBLIC bv_stack_pop
EXTERN asm_bv_stack_pop
defc bv_stack_pop = asm_bv_stack_pop
| 13.666667 | 36 | 0.841463 |
b713b38424d9232813b1d06c2d83546e14dab854 | 7,613 | asm | Assembly | sms/aplib-z80.asm | nicklausw/pong-console | c83b864ff4512bef3dee1e09e838b5cf177e7de4 | [
"Unlicense"
] | 4 | 2015-12-29T19:35:42.000Z | 2020-08-13T02:44:22.000Z | sms/aplib-z80.asm | nicklausw/pong-console | c83b864ff4512bef3dee1e09e838b5cf177e7de4 | [
"Unlicense"
] | 1 | 2015-12-30T20:27:24.000Z | 2016-01-01T07:57:13.000Z | sms/aplib-z80.asm | nicklausw/pong-console | c83b864ff4512bef3dee1e09e838b5cf177e7de4 | [
"Unlicense"
] | null | null | null | ; Z80/SMS aPLib decompression library
; version 1.2
; 1/12/2008
; Maxim (http://www.smspower.org/maxim)
; based on code by Dan Weiss (Dwedit) - see readme.txt
;
; Usage:
;
; .include this file in your code
; somewhere after that, an aPLibMemoryStruct called aPLibMemory must be defined
; somewhere in RAM, ie. "aPLibMemory instanceof aPLibMemoryStruct" inside a
; .ramsection or .enum
;
; Then either do
;
; ld hl,<source address>
; ld de,<destination address>
; call depack
;
; to decompress from ROM to RAM, or do
;
; ld hl,<source address>
; ld de,<destination address>
; di
; call vram_depack
; ei
;
; to decompress from ROM to VRAM (on Sega 8-bit systems). You don't need the
; di/ei if you don't have interrupts changing the VRAM address.
;
; ROM usage:
;
; Shared: 41 bytes Using depack only: 233 bytes
; RAM-only: 192 bytes -> Using vram_depack only: 294 bytes
; VRAM-only: 253 bytes Using both depackers: 486 bytes
;
; RAM usage:
;
; aPLibMemoryStruct uses 5 bytes, and can be re-used after decompression. The
; amount of stack space it uses will depend on the data, but in my tests it
; never used more than 12 bytes.
;
; CPU usage:
;
; Speed depends on the data being decompressed. When decompressing from ROM to
; VRAM, better compressed data will tend to decompress slower; in a simple test,
; decompression was around 10KB per second. Decompression to RAM has not been
; benchmarked.
;
; Assembler dialect:
;
; This file is using WLA-DX syntax quite heavily. It may be possible to convert
; it to other assemblers which have compatible conditional directives.
; comment out this line to suppress the block size notifications
; (useful for optimising to see size changes)
.struct aPLibMemoryStruct
bits db
byte db ; not directly referenced, assumed to come after bits
LWM db
R0 dw
.endst
; Reader's note:
;
; The code has been split into three sections:
; 1. Subroutines which are only referenced by calls, and which do no reading to
; or writing from the destination, are arranged first. This allows better
; code packing in the output (more finely divided blobs), and these
; subroutines are common to both unpackers.
; 2. The original memory-to-memory (usually ROM-to-RAM) depacker follows. Its
; structure has been arranged such that the entry point is in the middle -
; this is so it can use jr to branch out to the various subsections to save
; a few bytes, but it makes it somewhat harder to read. "depack" is the
; entry point and "_aploop" is the main loop.
; 3. Part 2 was then copied and pasted and all parts reading from or writing to
; the destination were replaced such that they correctly address and access
; VRAM via ports $BE and $BF. Replacement functions were written for OUTI
; and OTIR to perform the same tasks.
; Thus, this part may have more potential for optimisation, since it's a
; fairly "dumb" conversion.
; More optimisations may be possible; in general, size optimisations are
; favoured over speed.
.section "aPLib ap_getbit" free
.ifdef calcblocks
.block "aPLibPart1"
.endif
ap_getbit:
push bc
ld bc,(aPLibMemory.bits)
rrc c
jr nc,+
ld b,(hl)
inc hl
+: ld a,c
and b
ld (aPLibMemory.bits),bc
pop bc
ret
.ifdef calcblocks
.endb
.endif
.ends
.section "aPLib ap_getbitbc" free
.ifdef calcblocks
.block "aPLibPart2"
.endif
ap_getbitbc: ;doubles BC and adds the read bit
sla c
rl b
call ap_getbit
ret z
inc bc
ret
.ifdef calcblocks
.endb
.endif
.ends
.section "aPLib ap_getgamma" free
.ifdef calcblocks
.block "aPLibPart3"
.endif
ap_getgamma:
ld bc,1
-:call ap_getbitbc
call ap_getbit
jr nz,-
ret
.ifdef calcblocks
.endb
.endif
.ends
.section "aPLib VRAM extra stuff" free
.ifdef calcblocks
.block "aPLibVRAMPart5"
.endif
ap_VRAMToDE_write:
push af
ld a,e
out ($bf),a
ld a,d
or $40
-: out ($bf),a
pop af
ret
ap_VRAMToHL_read:
push af
ld a,l
out ($bf),a
ld a,h
jr - ; space optimisation
ap_VRAM_ldi_src_to_dest:
call ap_VRAMToDE_write
push bc
ld c,$be
outi
pop bc
dec bc
inc de
ret
ap_VRAM_ldir_dest_to_dest:
; This may be a major speed bottleneck
; possibly could take some stack space for a buffer? but that'd need a lot more code space
; if it uses overlapping source/dest then a buffer will break it
push af
-: call ap_VRAMToHL_read
in a,($be)
call ap_VRAMToDE_write
out ($be),a
dec bc
inc de
inc hl
ld a,b
or c
jr nz,-
pop af
ret
.ifdef calcblocks
.endb
.endif
.ends
.section "VRAM aPLib main section" free
.ifdef calcblocks
.block "aPLibVRAMPart6"
.endif
_vram_apbranch2:
;use a gamma code * 256 for offset, another gamma code for length
call ap_getgamma
dec bc
dec bc
ld a,(aPLibMemory.LWM)
or a
jr nz,_vram_ap_not_LWM
;bc = 2? ; Maxim: I think he means 0
ld a,b
or c
jr nz,_vram_ap_not_zero_gamma
;if gamma code is 2, use old R0 offset, and a new gamma code for length
call ap_getgamma
push hl
ld h,d
ld l,e
push bc
ld bc,(aPLibMemory.R0)
sbc hl,bc
pop bc
call ap_VRAM_ldir_dest_to_dest
pop hl
jr _vram_ap_finishup
_vram_ap_not_zero_gamma:
dec bc
_vram_ap_not_LWM:
;do I even need this code? ; Maxim: seems so, it's broken without it
;bc=bc*256+(hl), lazy 16bit way
ld b,c
ld c,(hl)
inc hl
ld (aPLibMemory.R0),bc
push bc
call ap_getgamma
ex (sp),hl
;bc = len, hl=offs
push de
ex de,hl
;some comparison junk for some reason
; Maxim: optimised to use add instead of sbc
ld hl,-32000
add hl,de
jr nc,+
inc bc
+: ld hl,-1280
add hl,de
jr nc,+
inc bc
+: ld hl,-128
add hl,de
jr c,+
inc bc
inc bc
+: ;bc = len, de = offs, hl=junk
pop hl
push hl
or a
sbc hl,de
pop de
;hl=dest-offs, bc=len, de = dest
call ap_VRAM_ldir_dest_to_dest
pop hl
_vram_ap_finishup:
ld a,1
ld (aPLibMemory.LWM),a
jr _vram_aploop
_vram_apbranch1: ; Maxim: moved this one closer to where it's jumped from to allow jr to work and save 2 bytes
call ap_VRAM_ldi_src_to_dest
xor a
ld (aPLibMemory.LWM),a
jr _vram_aploop
vram_depack:
;hl = source
;de = dest (in VRAM)
;VRAM addresses are assumed to be stable (ie. di/ei around it)
call ap_VRAM_ldi_src_to_dest ; first byte is always uncompressed
xor a
ld (aPLibMemory.LWM),a
inc a
ld (aPLibMemory.bits),a
_vram_aploop:
call ap_getbit
jr z, _vram_apbranch1
call ap_getbit
jr z, _vram_apbranch2
call ap_getbit
jr z, _vram_apbranch3
;LWM = 0
xor a
ld (aPLibMemory.LWM),a
;get an offset
ld bc,0
call ap_getbitbc
call ap_getbitbc
call ap_getbitbc
call ap_getbitbc
ld a,b
or c
jr nz,_vram_apbranch4
; xor a ;write a 0 ; Maxim: a is zero already (just failed nz test), optimise this line away
_WriteAToVRAMAndLoop:
call ap_VRAMToDE_write
out ($be),a
inc de
jr _vram_aploop
_vram_apbranch4:
ex de,hl ;write a previous bit (1-15 away from dest)
push hl
sbc hl,bc
call ap_VRAMToHL_read
in a,($be)
pop hl
ex de,hl
jr _WriteAToVRAMAndLoop
_vram_apbranch3:
;use 7 bit offset, length = 2 or 3
;if a zero is encountered here, it's EOF
ld c,(hl)
inc hl
rr c
ret z
ld b,2
jr nc,+
inc b
+:;LWM = 1
ld a,1
ld (aPLibMemory.LWM),a
push hl
ld a,b
ld b,0
;R0 = c
ld (aPLibMemory.R0),bc
ld h,d
ld l,e
or a
sbc hl,bc
ld c,a
call ap_VRAM_ldir_dest_to_dest
pop hl
jr _vram_aploop
.ifdef calcblocks
.endb
.endif
.ends
| 22.325513 | 110 | 0.68672 |
ec7a579f068a08fa27aa333ffb252946a2138ab5 | 445 | asm | Assembly | programs/oeis/263/A263804.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/263/A263804.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/263/A263804.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A263804: Triangle read by rows giving successive states of cellular automaton generated by "Rule 157" initiated with a single ON (black) cell.
; 1,0,1,1,0,0,1,1,1,0,1,0,1,1,1,1,0,0,1,0,1,1,1,1,1,0,1,0,1,0,1,1,1,1,1,1,0,0,1,0,1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1
lpb $0
dif $0,4
seq $0,38759 ; a(n) = ceiling(sqrt(n))*floor(sqrt(n)).
lpe
add $0,1
mod $0,2
| 44.5 | 201 | 0.606742 |
48c863794e35fb56e6acaae58d65d6dae20d1b1d | 827 | asm | Assembly | oeis/142/A142850.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/142/A142850.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/142/A142850.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A142850: Primes congruent to 52 mod 61.
; Submitted by Jon Maiga
; 113,479,601,967,1699,2309,2797,3041,3163,3407,3529,4139,4261,4871,4993,5237,6091,6701,6823,7433,8287,9629,11093,12923,13411,14143,14387,14753,15241,15607,15973,16217,16339,17681,18047,18169,18413,19267,20731,21341,22073,23293,23537,24391,25367,25733,26099,26953,27197,28051,28661,29027,29759,29881,30491,31223,32077,32321,32443,32687,33053,34273,34883,36469,36713,37201,37567,37811,38177,38299,38543,39397,40129,40739,41227,41593,41959,42569,43789,44887,45131,45497,45863,46229,46351,49157,49279
mov $1,56
mov $2,$0
add $2,2
pow $2,2
lpb $2
sub $2,1
mov $3,$1
mul $3,2
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,61
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
lpe
mov $0,$1
mul $0,2
sub $0,121
| 34.458333 | 497 | 0.73156 |
9e8151674720ece733e429bf061936b71b59ba1d | 537 | asm | Assembly | programs/oeis/097/A097070.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/097/A097070.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/097/A097070.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A097070: Consider all compositions (ordered partitions) of n into n parts, allowing zeros. E.g., for n = 3 we get 300, 030, 003, 210, 120, 201, 102, 021, 012, 111. Then a(n) is the total number of 1's.
; 1,2,9,40,175,756,3234,13728,57915,243100,1016158,4232592,17577014,72804200,300874500,1240940160,5109183315,21002455980,86213785350,353452638000,1447388552610,5920836618840,24197138082780,98801168731200,403095046038750,1643337883690776,6694900194799404
mov $1,$0
add $1,1
mov $2,$0
mov $3,$0
sub $3,1
add $2,$3
bin $2,$0
mul $1,$2
| 44.75 | 253 | 0.756052 |
6c81f4afb53f8fbbf21a547ab4287ab60fdade81 | 741 | asm | Assembly | oeis/079/A079398.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/079/A079398.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/079/A079398.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A079398: a(0)=0, a(1)=1, a(2)=1, a(3)=1, a(n) = a(n-3) + a(n-4) for n > 3.
; Submitted by Christian Krause
; 0,1,1,1,1,2,2,2,3,4,4,5,7,8,9,12,15,17,21,27,32,38,48,59,70,86,107,129,156,193,236,285,349,429,521,634,778,950,1155,1412,1728,2105,2567,3140,3833,4672,5707,6973,8505,10379,12680,15478,18884,23059,28158,34362,41943,51217,62520,76305,93160,113737,138825,169465,206897,252562,308290,376362,459459,560852,684652,835821,1020311,1245504,1520473,1856132,2265815,2765977,3376605,4121947,5031792,6142582,7498552,9153739,11174374,13641134,16652291,20328113,24815508,30293425,36980404,45143621,55108933
mov $2,1
lpb $0
sub $0,1
sub $3,$4
mov $4,$2
mov $2,$3
add $2,$1
mov $1,$3
trn $4,$5
add $5,$4
mov $3,$5
lpe
mov $0,$3
| 41.166667 | 493 | 0.700405 |
d497dd72c4ffdd342102e07d32077a807cfda2df | 836 | asm | Assembly | programs/oeis/056/A056572.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/056/A056572.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/056/A056572.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A056572: Fifth power of Fibonacci numbers A000045.
; 0,1,1,32,243,3125,32768,371293,4084101,45435424,503284375,5584059449,61917364224,686719856393,7615646045657,84459630100000,936668172433707,10387823949447757,115202670521319424,1277617458486664901,14168993617568728125,157136551895768914976,1742671044798615789551,19326518128014212635057,214334370099947863277568,2377004590722802744140625,26361384861716322814590193,292352238096435536675521568,3242236003808840039125110051,35956948280475177898499562149,398768667086996122009702400000,4422412286246072721588335082349,49045303815757195578236017290549,543920754259730266208749091534368,6032173600672133354886972344563207,66897830361655979288042024095915625,741908307578876120282055416749228032
seq $0,45 ; Fibonacci numbers: F(n) = F(n-1) + F(n-2) with F(0) = 0 and F(1) = 1.
pow $0,5
| 139.333333 | 690 | 0.88756 |
bc0a11644ca874ea9f115843a0b17a5461cfdb83 | 830 | asm | Assembly | oeis/142/A142634.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/142/A142634.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/142/A142634.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A142634: Primes congruent to 47 mod 55.
; Submitted by Jon Maiga
; 47,157,487,1367,1697,2027,2137,2357,2467,2687,2797,3347,3457,3677,4007,4337,4447,5107,5437,5657,5987,6317,6427,6977,7307,7417,8297,8627,8737,9067,9397,10607,10937,11047,11597,11927,12037,12697,12917,13577,13687,13907,14347,14897,15227,15667,15887,16217,16547,16657,16987,17207,17317,17977,18307,18637,20177,20287,20507,20947,21277,21937,22157,22817,23917,24137,24247,24907,25127,25237,25457,26227,26557,26777,27107,27437,27767,28097,28537,28867,29527,30187,30517,31177,31397,31727,32057,32497,32717
mov $1,23
mov $2,$0
add $2,2
pow $2,2
lpb $2
sub $2,1
mov $3,$1
mul $3,2
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,55
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
lpe
mov $0,$1
mul $0,2
sub $0,109
| 34.583333 | 500 | 0.73012 |
b0c06f4eae09d7d554a8c1ca604dfa5cfb1f0900 | 917 | asm | Assembly | data/pokemon/base_stats/kecleon.asm | TastySnax12/pokecrystal16-493-plus | 9de36c8803c9bdf4b8564ed547f988b0b66f0c41 | [
"blessing"
] | 2 | 2021-07-31T07:05:06.000Z | 2021-10-16T03:32:26.000Z | data/pokemon/base_stats/kecleon.asm | TastySnax12/pokecrystal16-493-plus | 9de36c8803c9bdf4b8564ed547f988b0b66f0c41 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/kecleon.asm | TastySnax12/pokecrystal16-493-plus | 9de36c8803c9bdf4b8564ed547f988b0b66f0c41 | [
"blessing"
] | 3 | 2021-01-15T18:45:40.000Z | 2021-10-16T03:35:27.000Z | db 0 ; species ID placeholder
db 60, 90, 70, 40, 60, 120
; hp atk def spd sat sdf
db NORMAL, NORMAL ; type
db 200 ; catch rate
db 132 ; base exp
db NO_ITEM, BITTER_BERRY ; items
db GENDER_F50 ; gender ratio
db 100 ; unknown 1
db 20 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/kecleon/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_MEDIUM_SLOW ; growth rate
dn EGG_GROUND, EGG_GROUND ; egg groups
; tm/hm learnset
tmhm DYNAMICPUNCH, HEADBUTT, CURSE, ROLLOUT, TOXIC, ZAP_CANNON, ROCK_SMASH, PSYCH_UP, HIDDEN_POWER, SUNNY_DAY, SNORE, BLIZZARD, ICY_WIND, PROTECT, RAIN_DANCE, ENDURE, FRUSTRATION, SOLARBEAM, IRON_TAIL, THUNDER, RETURN, DIG, SHADOW_BALL, MUD_SLAP, DOUBLE_TEAM, ICE_PUNCH, SWAGGER, SLEEP_TALK, FIRE_BLAST, SWIFT, DEFENSE_CURL, THUNDERPUNCH, REST, ATTRACT, THIEF, FIRE_PUNCH, FURY_CUTTER, CUT, STRENGTH, FLASH, FLAMETHROWER, THUNDERBOLT, ICE_BEAM
; end
| 41.681818 | 444 | 0.739368 |
3da5e02e1981654949b6104c11a6bccefc4e6635 | 1,066 | asm | Assembly | dataToTestOn/asm/3/20.asm | Epacik/8051-ASM-Plugin | 3e2cf55c82733d66198bd41a68f8363c0129043b | [
"MIT"
] | 1 | 2020-11-10T18:42:46.000Z | 2020-11-10T18:42:46.000Z | dataToTestOn/asm/3/20.asm | Epacik/8051-ASM-Plugin | 3e2cf55c82733d66198bd41a68f8363c0129043b | [
"MIT"
] | null | null | null | dataToTestOn/asm/3/20.asm | Epacik/8051-ASM-Plugin | 3e2cf55c82733d66198bd41a68f8363c0129043b | [
"MIT"
] | null | null | null | TAB EQU 30H
LJMP START
ORG 100H
START:
MOV TAB,#1
MOV TAB+1,#2
MOV TAB+2,#3
MOV TAB+3,#5
MOV TAB+4,#7
MOV TAB+5,#11
MOV TAB+6,#13
MOV TAB+7,#17
MOV TAB+8,#19
MOV TAB+9,#23
MOV TAB+10,#29
MOV TAB+11,#31
MOV TAB+12,#37
MOV TAB+13,#41
MOV TAB+14,#43
MOV TAB+15,#47
MOV TAB+16,#53
MOV R0,#TAB
CALL LCD_CLR
ABCD:
MOV A,@R0
CALL HTB
CALL WRITE_HEX
MOV A,#5
CALL DELAY_100MS
CALL LCD_CLR
INC R0
CJNE R0,#TAB+17,ABCD
MOV R0,#TAB
SJMP ABCD
XRL A, @R1
CLR C
CPL C
SETB address
ANL A, @R0
ORL address, address
HTB:
MOV R1,#00h
MOV R2,#00h
CJNE A,#00h,CALC_HTB
RET
CALC_HTB:
MOV B,#100 ; dzielenie przez 100
DIV AB
MOV R1,A ; zapisz Akumulator do R0
MOV A,B
MOV B,#10 ; podziel przez 10
DIV AB
SWAP A
MOV R2,A ; zapisz dziesiątki do R1
MOV A,B
ORL A,R2
MOV R2,A ;zapisz jedności do R1
RET | 17.47541 | 42 | 0.514071 |
a1b3b7f15056c16ea52ab54945a402944dda31f1 | 368 | asm | Assembly | programs/oeis/063/A063945.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/063/A063945.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/063/A063945.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A063945: Number of nonnegative integers with n digits.
; 10,90,900,9000,90000,900000,9000000,90000000,900000000,9000000000,90000000000,900000000000,9000000000000,90000000000000,900000000000000,9000000000000000,90000000000000000,900000000000000000,9000000000000000000,90000000000000000000
mov $1,10
pow $1,$0
mul $1,6
add $1,5
mul $1,3
div $1,20
mul $1,10
mov $0,$1
| 30.666667 | 232 | 0.8125 |
f61c211ff919bd309373e7877a237fc47f0c5533 | 966 | asm | Assembly | programs/oeis/168/A168675.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/168/A168675.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/168/A168675.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A168675: a(n) = n^8*(n + 1)/2.
; 0,1,384,13122,163840,1171875,5878656,23059204,75497472,215233605,550000000,1286153286,2794881024,5710115047,11068417920,20503125000,36507222016,62781816969,104689625472,169835630410,268800000000,416051452971,631072545664,939731823372,1375941427200,1983642578125,2819165371776,3954013510734,5478128975872,7503696194415,10169550000000,13646256599056,18141941858304,23908946510097,31251393335680,40533757031250,52190533287936,66737109624499,84781946700672,107040185209620,134348800000000,167683429811541,208177017922944,257140406107222,316085031567360,386747883984375,471118887450496,571470879882264,690392370511872,830823264240025,996093750000000,1189966558830426,1416682806083584,1681011641106747,1988303936826240,2344550260937500,2756443379859456,3231445556248029,3777860910681472,4404913128129630,5122828800000000,5942926702915711,6877713325924224,7940984968560672,9147936743096320
mov $1,$0
pow $0,9
pow $1,8
add $1,$0
div $1,2
| 107.333333 | 884 | 0.887164 |
95c5f419ff229379918943d1487fb29781fba32e | 63,671 | asm | Assembly | Assembly/Project/IO.asm | Myself086/Project-Nested | 89153325af8e5e2d443994352eae60ad06ed5922 | [
"MIT"
] | 338 | 2020-07-26T23:26:20.000Z | 2022-03-31T15:26:49.000Z | Assembly/Project/IO.asm | Myself086/Project-Nested | 89153325af8e5e2d443994352eae60ad06ed5922 | [
"MIT"
] | 47 | 2020-08-08T10:21:02.000Z | 2022-03-30T16:28:35.000Z | Assembly/Project/IO.asm | Myself086/Project-Nested | 89153325af8e5e2d443994352eae60ad06ed5922 | [
"MIT"
] | 8 | 2020-08-10T19:04:09.000Z | 2021-09-27T07:25:02.000Z |
// ---------------------------------------------------------------------------
.mx 0x30
IO__Error:
rtl
// ---------------------------------------------------------------------------
// PPUCTRL $2000 VPHB SINN NMI enable (V), PPU master/slave (P), sprite height (H), background tile select (B), sprite tile select (S), increment mode (I), nametable select (NN)
// PPUMASK $2001 BGRs bMmG color emphasis (BGR), sprite enable (s), background enable (b), sprite left column enable (M), background left column enable (m), greyscale (G)
// PPUSTATUS $2002 VSO- ---- vblank (V), sprite 0 hit (S), sprite overflow (O), read resets write pair for $2005/2006
// OAMADDR $2003 aaaa aaaa OAM read/write address
// OAMDATA $2004 dddd dddd OAM data read/write
// PPUSCROLL $2005 xxxx xxxx fine scroll position (two writes: X, Y)
// PPUADDR $2006 aaaa aaaa PPU read/write address (two writes: MSB, LSB)
// PPUDATA $2007 dddd dddd PPU data read/write
// OAMDMA $4014 aaaa aaaa OAM DMA high address
.mx 0x30
IO__r2000_a:
IO__r2000_a_i:
IO__r2000_x:
IO__r2000_y:
rtl
IO__w2000_a:
CoreCall_Begin
CoreCall_Lock
CoreCall_Push
CoreCall_Call IO__w2000_a_i
CoreCall_Pull
CoreCall_End
IO__w2000_x:
CoreCall_Begin
CoreCall_Lock
CoreCall_Push
CoreCall_CopyUpTo +b_1
stx $_IO_2000
b_1:
CoreCall_Call IO__w2000_in
CoreCall_Pull
CoreCall_End
IO__w2000_y:
CoreCall_Begin
CoreCall_Lock
CoreCall_Push
CoreCall_CopyUpTo +b_1
sty $_IO_2000
b_1:
CoreCall_Call IO__w2000_in
CoreCall_Pull
CoreCall_End
IO__w2000_a_i:
sta $_IO_2000
IO__w2000_in:
php
lock
xba
IO__w2000_in2:
lda $_IO_2000
bit #0x04
bne $+IO__w2000_a_inc32
// Change name tables
and #0x03
sta $_PPU_SCROLL_X+1
lsr a
sta $_PPU_SCROLL_Y+1
// Inc 1
lda #.VramQ_PpuAddrInc
sta $0x2180
lda #0x01
sta $0x2180
sta $_IO_PPUADDR_INC
xba
plp
rtl
IO__w2000_a_inc32:
// Change name tables
and #0x03
sta $_PPU_SCROLL_X+1
lsr a
sta $_PPU_SCROLL_Y+1
// Inc 32
lda #.VramQ_PpuAddrInc
sta $0x2180
lda #0x20
sta $0x2180
sta $_IO_PPUADDR_INC
xba
plp
rtl
IO__r2001_a:
IO__r2001_a_i:
IO__r2001_x:
IO__r2001_y:
rtl
IO__w2001_a_i:
sta $_IO_2001
rtl
IO__w2001_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_IO_2001
b_1:
CoreCall_End
IO__w2001_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_IO_2001
b_1:
CoreCall_End
IO__w2001_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_IO_2001
b_1:
CoreCall_End
IO__r2002_a:
IO__r2002_a_i:
IO__r2002_x:
IO__r2002_y:
php
pha
stz $_IO_HILO
// Did we hit sprite 0?
lda $3,s
cmp $_IO_2002_LastReturn
bne $+IO__r2002_NewCall
lda $4,s
sbc $_IO_2002_LastReturn+1
bne $+IO__r2002_NewCall
// Increment and compare with 3 to set bit 6, assuming A==0 and carry set from cmp+!bne
inc $_IO_2002_CallCount
adc $_IO_2002_CallCount
adc #0x3c
and #0x40
beq $+IO__r2002_NoSprite0
stz $_IO_2002_CallCount
ora $_IO_2002
eor #0x80
sta $_IO_2002
sta $_IO_Temp
// Change scanline to sprite 0
lda $_Sprite0Line
sta $_Scanline
// Add new HDMA coordinates
phx
phy
rep #0x10
.mx 0x20
.vstack _VSTACK_START
call Hdma__UpdateScrolling
// Change mode back
sep #0x30
.mx 0x30
ply
plx
pla
plp
rtl
IO__r2002_NoSprite0:
ora $_IO_2002
and #0xbf
eor #0x80
sta $_IO_2002
sta $_IO_Temp
pla
plp
rtl
IO__r2002_NewCall:
lda $3,s
sta $_IO_2002_LastReturn
lda $4,s
sta $_IO_2002_LastReturn+1
stz $_IO_2002_CallCount
lda $_IO_2002
and #0xbf
eor #0x80
sta $_IO_2002
sta $_IO_Temp
pla
plp
rtl
IO__w2002_a:
IO__w2002_a_i:
rtl
IO__w2002_x:
rtl
IO__w2002_y:
rtl
IO__r2003_a:
IO__r2003_a_i:
IO__r2003_x:
IO__r2003_y:
rtl
IO__w2003_a:
IO__w2003_a_i:
rtl
IO__w2003_x:
rtl
IO__w2003_y:
rtl
IO__r2004_a:
IO__r2004_a_i:
IO__r2004_x:
IO__r2004_y:
rtl
IO__w2004_a:
IO__w2004_a_i:
rtl
IO__w2004_x:
rtl
IO__w2004_y:
rtl
IO__r2005_a:
IO__r2005_a_i:
IO__r2005_x:
IO__r2005_y:
rtl
.macro IO__w2005_Mac reg
php
bit $_IO_HILO
bmi $+b_high
b_low:
sec
ror $_IO_HILO
st{0} $_PPU_SCROLL_X
plp
rtl
b_high:
stz $_IO_HILO
st{0} $_PPU_SCROLL_Y
plp
rtl
.endm
IO__w2005_a:
IO__w2005_a_i:
IO__w2005_Mac a
IO__w2005_x:
IO__w2005_Mac x
IO__w2005_y:
IO__w2005_Mac y
IO__r2006_a:
IO__r2006_a_i:
IO__r2006_x:
IO__r2006_y:
rtl
// Note: Value is in X rather than IO_Temp
.macro IO__w2006_Low_Mac
// Write 2
stz $_IO_HILO
lda #.VramQ_PpuAddrLow
sta $0x2180
stx $_IO_PPUADDR+0
stx $0x2180
// Change scroll values (also transfer new scroll values)
lda $_PPU_SCROLL_Y
and #0xc7
ora $=IO__w2006_SR2AND38,x
sta $_PPU_SCROLL_Y
sta $_IO_SCROLL_Y
lda $_PPU_SCROLL_X
and #0x07
ora $=IO__w2006_SL3,x
sta $_PPU_SCROLL_X
sta $_IO_SCROLL_X
lda $_PPU_SCROLL_X+1
sta $_IO_SCROLL_X+1
lsr a
sta $_IO_SCROLL_Y+1
.endm
.macro IO__w2006_High_Mac
// Write 1
ora #0x80
sta $_IO_HILO
lda #.VramQ_PpuAddrHigh
sta $0x2180
txa
and #0x3f
sta $_IO_PPUADDR+1
sta $0x2180
// Change scroll values
lda $_PPU_SCROLL_Y
and #0x38
ora $=IO__w2006_SR4AND03_OR_SL6,x
sta $_PPU_SCROLL_Y
lda $=IO__w2006_SR2AND03,x
sta $_PPU_SCROLL_X+1
lsr a
sta $_PPU_SCROLL_Y+1
.endm
IO__w2006_y:
php
phx
xba
tyx
lock
lda $_IO_HILO
bpl $+b_high
IO__w2006_Low_Mac
xba
plx
plp
rtl
b_high:
IO__w2006_High_Mac
xba
plx
plp
rtl
IO__w2006_x:
php
xba
lock
lda $_IO_HILO
bpl $+b_high
IO__w2006_Low_Mac
xba
plp
rtl
b_high:
IO__w2006_High_Mac
xba
plp
rtl
IO__w2006_a:
IO__w2006_a_i:
php
phx
tax
lock
lda $_IO_HILO
bpl $+b_high
IO__w2006_Low_Mac
txa
plx
plp
rtl
b_high:
IO__w2006_High_Mac
txa
plx
plp
rtl
//IO__w2006_SR4AND03:
// .fill 0x10, 0
// .fill 0x10, 1
// .fill 0x10, 2
// .fill 0x10, 3
// .fill 0x10, 0
// .fill 0x10, 1
// .fill 0x10, 2
// .fill 0x10, 3
// .fill 0x10, 0
// .fill 0x10, 1
// .fill 0x10, 2
// .fill 0x10, 3
// .fill 0x10, 0
// .fill 0x10, 1
// .fill 0x10, 2
// .fill 0x10, 3
//IO__w2006_SL6:
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
// .data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
IO__w2006_SR4AND03_OR_SL6:
.data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
.data8 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1
.data8 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2
.data8 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3
.data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
.data8 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1
.data8 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2
.data8 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3
.data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
.data8 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1
.data8 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2
.data8 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3
.data8 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0, 0x00, 0x40, 0x80, 0xc0
.data8 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1, 0x01, 0x41, 0x81, 0xc1
.data8 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2, 0x02, 0x42, 0x82, 0xc2
.data8 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3, 0x03, 0x43, 0x83, 0xc3
IO__w2006_SR2AND03:
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
.data8 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3
IO__w2006_SL3:
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
.data8 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78, 0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, 0xd8, 0xe0, 0xe8, 0xf0, 0xf8
IO__w2006_SR2AND38:
.fill 0x20, 0x00
.fill 0x20, 0x08
.fill 0x20, 0x10
.fill 0x20, 0x18
.fill 0x20, 0x20
.fill 0x20, 0x28
.fill 0x20, 0x30
.fill 0x20, 0x38
IO__r2007_ChrRamReadCode:
// This code is copied to RAM at "ChrRam_Read"
lda $=ChrRam_CONSTBANK
jmp $_IO__r2007_ChrRamCallBack
IO__r2007_ChrRamWriteCode:
// This code is copied to RAM at "ChrRam_Write"
sta $=ChrRam_CONSTBANK
pla
plp
rtl
IO__r2007_a:
IO__r2007_a_i:
IO__r2007_x:
IO__r2007_y:
php
pha
// Queue a dummy read
lda #.VramQ_Read
sta $0x2180
// Return last byte read
lda $_IO_2007r
sta $_IO_Temp
// Load higher bits of address
lda $_IO_PPUADDR+1
// Is it CHR banks?
cmp #0x20
bcs $+b_1
phx
// Is this game using CHR RAM?
ldx $_CHR_0_PageLength
bne $+b_2
// Read from CHR RAM clone
lda $_ChrRam_Page
trapeq
Exception "Reading CHR RAM{}{}{}CPU attempted to read CHR RAM.{}{}CHR RAM clone must be turned on for this game."
// Calculate destination address, assume carry clear from BCS
//clc
adc $_IO_PPUADDR+1
sta $_ChrRam_Read+2
lda $_IO_PPUADDR+0
sta $_ChrRam_Read+1
// Increment PPU address, assume carry clear because ADC shouldn't wrap the bank
//clc
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR+0
bcc $+b_3
inc $_IO_PPUADDR+1
b_3:
// Call
plx
jmp $_ChrRam_Read
IO__r2007_ChrRamCallBack:
// "Return" value
sta $_IO_2007r
pla
plp
rtl
b_2:
phy
// Apply pattern swap
tay
lda $_IO_MapperChrBankSwap
lsr a
tya
bcc $+b_2
eor #0x10
b_2:
// Push bank only for CHR ROM
phb
// Which page are we in? Keep carry set during the loop
ldy #0xff
sec
b_loop:
iny
sbc $_CHR_0_PageLength,y
bcs $-b_loop
// Go back by 1 index, assume carry clear from BCS
adc $_CHR_0_PageLength,y
// Push incomplete address to stack
pha
lda $_IO_PPUADDR
pha
// Load CHR page and bank
lda $_CHR_0_NesBank,y
tax
lda $=RomInfo_ChrBankLut_hi,x
pha
plb
lda $=RomInfo_ChrBankLut_lo,x
clc
adc $2,s
sta $2,s
// Read byte
ldy #0
lda ($1,s),y
// Clear pointer and restore DB
ply
ply
plb
sta $_IO_2007r
// Increment address
lda $_IO_PPUADDR
clc
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
bcc $+b_2
inc $_IO_PPUADDR+1
b_2:
ply
plx
pla
plp
rtl
b_1:
// Is it name tables?
cmp #0x30
bcs $+IO__r2007_skip20
phx
tax
lda $_NameTable_Remap_Main-0x20,x
xba
lda $_IO_PPUADDR
rep #0x11
.mx 0x20
tax
lda $=Nes_Nametables-0x2000,x
sta $_IO_2007r
// Increment address
lda $_IO_PPUADDR
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
sep #0x30
.mx 0x30
plx
pla
plp
rtl
IO__r2007_skip20:
// Is it palette?
cmp #0x3f
bne $+IO__r2007_skip3f
phx
ldx $_IO_PPUADDR
lda $=IO__w2007_PaletteMirror,x
tax
lda $_PaletteNes,x
// Immediate return instead of next read
sta $_IO_Temp
// Increment address
lda $_IO_PPUADDR
clc
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
plx
pla
plp
rtl
IO__r2007_skip3f:
pla
plp
rtl
IO__w2007_y:
sty $_IO_Temp
bra $+IO__w2007_In
IO__w2007_x:
stx $_IO_Temp
bra $+IO__w2007_In
IO__w2007_a:
IO__w2007_a_i:
sta $_IO_Temp
//bra $+IO__w2007_In
IO__w2007_In:
php
pha
// TODO: Properly fix port 2002 shortcut
stz $_IO_2002_LastReturn+1
// Load higher bits of address
lda $_IO_PPUADDR+1
and #0x3f
// Is it CHR banks?
cmp #0x20
bcs $+IO__w2007_skip00
// Is this game using CHR RAM?
lda $_CHR_0_PageLength
bne $+IO__w2007_skip00
// Write to CHR banks
lda #.VramQ_Tile
lock
sta $0x2180
lda $_IO_Temp
sta $0x2180
// Write to CHR RAM clone
lda $_ChrRam_Page
beq $+b_2
// Calculate destination address, assume carry clear from BCS
//clc
adc $_IO_PPUADDR+1
sta $_ChrRam_Write+2
lda $_IO_PPUADDR+0
sta $_ChrRam_Write+1
// Increment PPU address, assume carry clear because ADC shouldn't wrap the bank
//clc
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR+0
bcc $+b_3
inc $_IO_PPUADDR+1
b_3:
// Call
jmp $_ChrRam_Write
b_2:
pla
plp
rtl
IO__w2007_skip00:
// Is it name tables?
cmp #0x30
jcs $_IO__w2007_skip20
phx
tax
lda $_NameTable_Remap_Main-0x20,x
xba
lda $_IO_PPUADDR
rep #0x11
.mx 0x20
tax
rep #0x10
.mx 0x20
lda $_IO_Temp
cmp $=Nes_Nametables-0x2000,x
beq $+IO__w2007_NoChanges_16bit
sta $=Nes_Nametables-0x2000,x
rep #0x31
.mx 0x00
// Is it attribute?
txa
and #0x03c0
eor #0x03c0
bne $+IO__w2007_skipAttribute
lda $_IO_PPUADDR
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
sep #0x34
.mx 0x30
// Write to queue
lda #.VramQ_TileAttribute
//lock
sta $0x2180
lda $_IO_Temp
sta $0x2180
plx
pla
plp
rtl
IO__w2007_skipAttribute:
.mx 0x00
lda $_IO_PPUADDR
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
sep #0x34
.mx 0x30
// Write to queue
lda #.VramQ_Tile
//lock
sta $0x2180
lda $_IO_Temp
sta $0x2180
plx
pla
plp
rtl
IO__w2007_NoChanges_16bit:
rep #0x31
.mx 0x00
lda $_IO_PPUADDR
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
sep #0x30
.mx 0x30
// Value written is unchanged, queue a dummy read instead
lda #.VramQ_Read
sta $0x2180
plx
pla
plp
rtl
IO__w2007_NoChanges:
// Value written is unchanged, queue a dummy read instead
lda #.VramQ_Read
sta $0x2180
// Increment address
lda $_IO_PPUADDR
clc
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
plx
pla
plp
rtl
IO__w2007_skip20:
// Is it palette?
cmp #0x3f
bne $+IO__w2007_skip3f
phx
ldx $_IO_PPUADDR
lda $=IO__w2007_PaletteMirror,x
tax
lda $_IO_Temp
cmp $_PaletteNes,x
beq $-IO__w2007_NoChanges
sta $_PaletteNes,x
rep #0x31
.mx 0x00
lda $_IO_PPUADDR
adc $_IO_PPUADDR_INC
sta $_IO_PPUADDR
sep #0x34
.mx 0x30
// Write to queue
lda #.VramQ_Palette
//lock
sta $0x2180
lda $_IO_Temp
asl a
sta $0x2180
plx
pla
plp
rtl
IO__w2007_skip3f:
// Return
pla
plp
rtl
IO__w2007_PaletteMirror:
.repeat 8, ".data8 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00, 0x11, 0x12, 0x13, 0x04, 0x15, 0x16, 0x17, 0x08, 0x19, 0x1a, 0x1b, 0x0c, 0x1d, 0x1e, 0x1f"
.macro IO__w4014_mac8x8 addr
//ldy #0xef
cpy $.Zero+0+{0}
bcc $+b_next
// A
ldx $.Zero+2+{0}
lda $_IO__SpriteAttributeLUT,x
eor $_IO_Temp
pha
// Y, T
pei ($.Zero+0+{0})
// X
ldx $.Zero+3+{0}
phx
b_next:
.endm
.macro IO__w4014_mac8x16 addr
{1}stz $_Sprite0Line
cmp $.Zero+0+{0}
bcc $+b_end
b_in:
ldy $.Zero+2+{0}
bpl $+b_NoYFlip
// With Y flip
// Prepare T1 and A1, keep A1/A2 in A and T1/T2 in X
lda $.Zero+1+{0}
ora #0x01
tax
eor $.Zero+1+{0}
eor $_IO__SpriteAttributeLUT2,y
eor $_IO_Temp
// A1
pha
// T1
phx
// Y1
ldy $.Zero+0+{0}
phy
// X1
ldy $.Zero+3+{0}
phy
// A2
pha
// T2
dex
phx
// Y2, assume carry set from BCC
lda $.Zero+0+{0}
tay
adc #7
{1}sta $_Sprite0Line
pha
// Mark scanline for potentially hitting the 8 sprites limit
ldx $_IO__SR3,y
dec $_Sprites_CountdownPer8Lines+0,x
dec $_Sprites_CountdownPer8Lines+1,x
dec $_Sprites_CountdownPer8Lines+2,x
// X2
ldy $.Zero+3+{0}
phy
// Compare next (TODO: Compare and jump directly into the next macro)
lda #0xef
bra $+b_end
// Else
b_NoYFlip:
// Without Y flip
// Prepare T1 and A1, keep A1/A2 in A and T1/T2 in X
lda $.Zero+1+{0}
and #0xfe
tax
eor $.Zero+1+{0}
eor $_IO__SpriteAttributeLUT,y
eor $_IO_Temp
// A1
pha
// T1
phx
// Y1
ldy $.Zero+0+{0}
phy
// X1
ldy $.Zero+3+{0}
phy
// A2
pha
// T2
inx
phx
// Y2, assume carry set from BCC
lda $.Zero+0+{0}
tay
adc #7
{1}sta $_Sprite0Line
pha
// Mark scanline for potentially hitting the 8 sprites limit
ldx $_IO__SR3,y
dec $_Sprites_CountdownPer8Lines+0,x
dec $_Sprites_CountdownPer8Lines+1,x
dec $_Sprites_CountdownPer8Lines+2,x
// X2
ldy $.Zero+3+{0}
phy
// Compare next
lda #0xef
b_end:
.endm
.macro IO__w4014_mac8x16_nolimit addr
cmp $.Zero+0+{0}
bcc $+b_end
b_in:
ldy $.Zero+2+{0}
bpl $+b_NoYFlip
// With Y flip
// Prepare T1 and A1, keep A1/A2 in A and T1/T2 in X
lda $.Zero+1+{0}
ora #0x01
tax
eor $.Zero+1+{0}
eor $_IO__SpriteAttributeLUT2,y
eor $_IO_Temp
// A1
pha
// T1
phx
// Y1
ldy $.Zero+0+{0}
phy
// X1
ldy $.Zero+3+{0}
phy
// A2
pha
// T2
dex
phx
// Y2, assume carry set from BCC
lda $.Zero+0+{0}
adc #7
pha
// X2
phy
// Compare next (TODO: Compare and jump directly into the next macro)
lda #0xef
bra $+b_end
// Else
b_NoYFlip:
// Without Y flip
// Prepare T1 and A1, keep A1/A2 in A and T1/T2 in X
lda $.Zero+1+{0}
and #0xfe
tax
eor $.Zero+1+{0}
eor $_IO__SpriteAttributeLUT,y
eor $_IO_Temp
// A1
pha
// T1
phx
// Y1
ldy $.Zero+0+{0}
phy
// X1
ldy $.Zero+3+{0}
phy
// A2
pha
// T2
inx
phx
// Y2, assume carry set from BCC
lda $.Zero+0+{0}
adc #7
pha
// X2
phy
// Compare next
lda #0xef
b_end:
.endm
.mx 0x30
IO__r4014_RangeFix:
// Is it between 0x08-0x1f?
cmp #0x20
bcs $+b_1
and #0x07
sta $_IO_Temp
bra $+IO__w4014_RangeFixExit
b_1:
// Is it between 0x20-0x5f? (TODO: Support mappers using this range?)
cmp #0x60
trapcc
Exception "DMA Transfer Failed{}{}{}IO.w4014 attempted to copy bytes from page 0x{a:X}"
// Is between 0x60-0xff
// Load correct bank
and #0xe0
tax
lda $_Program_Bank+2,x
pha
plb
// Prepare countdown before changing to 16-bit mode
ldy #0x10
smx 0x00
// Copy sprite data
ldx $_IO_Temp-1
b_loop:
lda $0x0000,x
sta $_NesSpriteRemap+0x00,x
lda $0x0020,x
sta $_NesSpriteRemap+0x20,x
lda $0x0040,x
sta $_NesSpriteRemap+0x40,x
lda $0x0060,x
sta $_NesSpriteRemap+0x60,x
lda $0x0080,x
sta $_NesSpriteRemap+0x80,x
lda $0x00a0,x
sta $_NesSpriteRemap+0xa0,x
lda $0x00c0,x
sta $_NesSpriteRemap+0xc0,x
lda $0x00e0,x
sta $_NesSpriteRemap+0xe0,x
inx
inx
dey
bne $-b_loop
smx 0x30
// Change page
lda #.NesSpriteRemap/0x100
sta $_IO_Temp
bra $+IO__w4014_RangeFixExit
.mx 0x30
IO__r4014_a:
IO__r4014_a_i:
IO__r4014_x:
IO__r4014_y:
stz $_IO_Temp
rtl
IO__w4014_x:
stx $_IO_Temp
bra $+IO__w4014_In
IO__w4014_y:
sty $_IO_Temp
bra $+IO__w4014_In
IO__w4014_a:
IO__w4014_a_i:
sta $_IO_Temp
//bra $+IO__w4014_In
IO__w4014_In:
php
phb
pha
phx
phy
lock
// Do we need to fix the page number?
lda $_IO_Temp
cmp #0x08
bcs $-IO__r4014_RangeFix
IO__w4014_RangeFixExit:
phk
plb
// Nes: Y, T, A, X
// Snes: X, Y, T, A
// What size are sprites?
lda $_IO_2000_EarlyValue
and #0x20
beq $+IO__w4014_8x8
jmp $_IO__w4014_8x16
IO__w4014_8x8:
// Sprite limit?
lda $=RomInfo_SpriteLimit
bpl $+IO__w4014_8x8_nolimit
jmp $_IO__w4014_8x8_limit
IO__w4014_8x8_nolimit:
// Change mode
.mx 0x00
rep #0x31
// Change DP to point to Nes sprite
lda $_IO_Temp-1
tcd
// Keep stack pointer and replace it to the sprite buffer
tsc
sta $_IO_Temp16
// Replace stack pointer to the sprite buffer
lda #_Sprites_Buffer+0x0ff
tcs
// Change mode
.mx 0x30
sep #0x30
// Nes: Y, T, A, X
// Snes: X, Y, T, A
// Update sprite 0 hit, assume carry clear from REP
lda $0x00
adc $=RomInfo_SpriteZeroOffset
bcc $+b_1
lda #0xf0
b_1:
sta $_Sprite0Line
// Which sprite bank to use?
lda $_IO_2000_EarlyValue
lsr a
lsr a
lsr a
eor $_IO_MapperChrBankSwap
and #0x01
sta $_IO_Temp
// Convert all sprites
ldy #0xef
IO__w4014_mac8x8 0xfc
IO__w4014_mac8x8 0xf8
IO__w4014_mac8x8 0xf4
IO__w4014_mac8x8 0xf0
IO__w4014_mac8x8 0xec
IO__w4014_mac8x8 0xe8
IO__w4014_mac8x8 0xe4
IO__w4014_mac8x8 0xe0
IO__w4014_mac8x8 0xdc
IO__w4014_mac8x8 0xd8
IO__w4014_mac8x8 0xd4
IO__w4014_mac8x8 0xd0
IO__w4014_mac8x8 0xcc
IO__w4014_mac8x8 0xc8
IO__w4014_mac8x8 0xc4
IO__w4014_mac8x8 0xc0
IO__w4014_mac8x8 0xbc
IO__w4014_mac8x8 0xb8
IO__w4014_mac8x8 0xb4
IO__w4014_mac8x8 0xb0
IO__w4014_mac8x8 0xac
IO__w4014_mac8x8 0xa8
IO__w4014_mac8x8 0xa4
IO__w4014_mac8x8 0xa0
IO__w4014_mac8x8 0x9c
IO__w4014_mac8x8 0x98
IO__w4014_mac8x8 0x94
IO__w4014_mac8x8 0x90
IO__w4014_mac8x8 0x8c
IO__w4014_mac8x8 0x88
IO__w4014_mac8x8 0x84
IO__w4014_mac8x8 0x80
IO__w4014_mac8x8 0x7c
IO__w4014_mac8x8 0x78
IO__w4014_mac8x8 0x74
IO__w4014_mac8x8 0x70
IO__w4014_mac8x8 0x6c
IO__w4014_mac8x8 0x68
IO__w4014_mac8x8 0x64
IO__w4014_mac8x8 0x60
IO__w4014_mac8x8 0x5c
IO__w4014_mac8x8 0x58
IO__w4014_mac8x8 0x54
IO__w4014_mac8x8 0x50
IO__w4014_mac8x8 0x4c
IO__w4014_mac8x8 0x48
IO__w4014_mac8x8 0x44
IO__w4014_mac8x8 0x40
IO__w4014_mac8x8 0x3c
IO__w4014_mac8x8 0x38
IO__w4014_mac8x8 0x34
IO__w4014_mac8x8 0x30
IO__w4014_mac8x8 0x2c
IO__w4014_mac8x8 0x28
IO__w4014_mac8x8 0x24
IO__w4014_mac8x8 0x20
IO__w4014_mac8x8 0x1c
IO__w4014_mac8x8 0x18
IO__w4014_mac8x8 0x14
IO__w4014_mac8x8 0x10
IO__w4014_mac8x8 0x0c
IO__w4014_mac8x8 0x08
IO__w4014_mac8x8 0x04
IO__w4014_mac8x8 0x00
// Are extra sprites already loaded?
bit $_IO_4014_SpriteSize
bpl $+b_1
// Change mode
.mx 0x00
rep #0x30
// Clear the second half of sprite memory and extra bits
lda #0xf000
ldx #0x001c
b_loop:
sta $_Sprites_Buffer+0x100,x
sta $_Sprites_Buffer+0x120,x
sta $_Sprites_Buffer+0x140,x
sta $_Sprites_Buffer+0x160,x
sta $_Sprites_Buffer+0x180,x
sta $_Sprites_Buffer+0x1a0,x
sta $_Sprites_Buffer+0x1c0,x
sta $_Sprites_Buffer+0x1e0,x
stz $_Sprites_Buffer+0x200,x
dex
dex
dex
dex
bpl $-b_loop
// Change mode
.mx 0x30
sep #0x30
b_1:
// Queue sprite DMA (TODO: No priority transfer)
lda #.VramQ_SpriteXfer8x8
sta $0x2180
tsc
inc a
lsr a
sta $0x2180
// Change mode
.mx 0x20
rep #0x10
// Save sprite size
stz $_IO_4014_SpriteSize
// Fill remaining space in the sprite buffer
tsx
lda #0xf0
jmp ($_IO__w4014_FillSwitch+1-Sprites_Buffer,x)
IO__w4014_8x8_limit:
// Change mode
.mx 0x00
rep #0x31
// Change DP to point to Nes sprite
lda $_IO_Temp-1
tcd
// Keep stack pointer and replace it to the sprite buffer
tsc
sta $_IO_Temp16
// Replace stack pointer to the sprite buffer
lda #_Sprites_Buffer+0x0ff
tcs
// Change mode
.mx 0x30
sep #0x30
// Nes: Y, T, A, X
// Snes: X, Y, T, A
// Update sprite 0 hit, assume carry clear from REP
lda $0x00
adc $=RomInfo_SpriteZeroOffset
bcc $+b_1
lda #0xf0
b_1:
sta $_Sprite0Line
// Which sprite bank to use?
lda $_IO_2000_EarlyValue
lsr a
lsr a
lsr a
eor $_IO_MapperChrBankSwap
and #0x01
sta $_IO_Temp
// Convert all sprites
ldy #0xef
IO__w4014_mac8x8 0x00
IO__w4014_mac8x8 0x04
IO__w4014_mac8x8 0x08
IO__w4014_mac8x8 0x0c
IO__w4014_mac8x8 0x10
IO__w4014_mac8x8 0x14
IO__w4014_mac8x8 0x18
IO__w4014_mac8x8 0x1c
IO__w4014_mac8x8 0x20
IO__w4014_mac8x8 0x24
IO__w4014_mac8x8 0x28
IO__w4014_mac8x8 0x2c
IO__w4014_mac8x8 0x30
IO__w4014_mac8x8 0x34
IO__w4014_mac8x8 0x38
IO__w4014_mac8x8 0x3c
IO__w4014_mac8x8 0x40
IO__w4014_mac8x8 0x44
IO__w4014_mac8x8 0x48
IO__w4014_mac8x8 0x4c
IO__w4014_mac8x8 0x50
IO__w4014_mac8x8 0x54
IO__w4014_mac8x8 0x58
IO__w4014_mac8x8 0x5c
IO__w4014_mac8x8 0x60
IO__w4014_mac8x8 0x64
IO__w4014_mac8x8 0x68
IO__w4014_mac8x8 0x6c
IO__w4014_mac8x8 0x70
IO__w4014_mac8x8 0x74
IO__w4014_mac8x8 0x78
IO__w4014_mac8x8 0x7c
IO__w4014_mac8x8 0x80
IO__w4014_mac8x8 0x84
IO__w4014_mac8x8 0x88
IO__w4014_mac8x8 0x8c
IO__w4014_mac8x8 0x90
IO__w4014_mac8x8 0x94
IO__w4014_mac8x8 0x98
IO__w4014_mac8x8 0x9c
IO__w4014_mac8x8 0xa0
IO__w4014_mac8x8 0xa4
IO__w4014_mac8x8 0xa8
IO__w4014_mac8x8 0xac
IO__w4014_mac8x8 0xb0
IO__w4014_mac8x8 0xb4
IO__w4014_mac8x8 0xb8
IO__w4014_mac8x8 0xbc
IO__w4014_mac8x8 0xc0
IO__w4014_mac8x8 0xc4
IO__w4014_mac8x8 0xc8
IO__w4014_mac8x8 0xcc
IO__w4014_mac8x8 0xd0
IO__w4014_mac8x8 0xd4
IO__w4014_mac8x8 0xd8
IO__w4014_mac8x8 0xdc
IO__w4014_mac8x8 0xe0
IO__w4014_mac8x8 0xe4
IO__w4014_mac8x8 0xe8
IO__w4014_mac8x8 0xec
IO__w4014_mac8x8 0xf0
IO__w4014_mac8x8 0xf4
IO__w4014_mac8x8 0xf8
IO__w4014_mac8x8 0xfc
// Are extra sprites already loaded?
bit $_IO_4014_SpriteSize
bpl $+b_1
// Change mode
.mx 0x00
rep #0x30
// Adjust sprite size
ldx #0xffff
stx $_Sprites_Buffer+0x210
ldx #0x55ff
stx $_Sprites_Buffer+0x212
ldx #0x5555
stx $_Sprites_Buffer+0x214
stx $_Sprites_Buffer+0x216
stx $_Sprites_Buffer+0x218
stx $_Sprites_Buffer+0x21a
stx $_Sprites_Buffer+0x21c
stx $_Sprites_Buffer+0x21e
// Write 60 8x8 sprites, 2 for each 8 lines (some of which are overwritten after this loop)
lda #0xf000
ldx #0x0074
sec
b_loop:
sbc #0x0800
sta $_Sprites_Buffer+0x110,x
sta $_Sprites_Buffer+0x188,x
dex
dex
dex
dex
bpl $-b_loop
// Write big sprites
stz $_Sprites_Buffer+0x100
stz $_Sprites_Buffer+0x110
stz $_Sprites_Buffer+0x120
lda #0xc000
sta $_Sprites_Buffer+0x104
sta $_Sprites_Buffer+0x114
sta $_Sprites_Buffer+0x124
asl a
sta $_Sprites_Buffer+0x108
sta $_Sprites_Buffer+0x118
sta $_Sprites_Buffer+0x128
lsr a
sta $_Sprites_Buffer+0x10c
sta $_Sprites_Buffer+0x11c
sta $_Sprites_Buffer+0x12c
// Change mode
.mx 0x30
sep #0x30
b_1:
// Change mode
.mx 0x20
rep #0x10
// Queue sprite DMA
lda #.VramQ_SpriteXfer8x8
sta $0x2180
tsc
inc a
lsr a
sta $0x2180
// Do we have 8 free sprites?
tsx
cpx #_Sprites_Buffer+0x021
bcc $+b_1
// Are these 8 sprites already written?
lda #0x01
and $_IO_4014_SpriteSize
bne $+b_2
// Move our 8 sprites offscreen
ldy #0x5555
sty $_Sprites_Buffer+0x200
// Write our 8 sprites
ldy #0x0000
sty $_Sprites_Buffer+0x000
ldy #0x0800
sty $_Sprites_Buffer+0x004
ldy #0x1000
sty $_Sprites_Buffer+0x008
ldy #0x1800
sty $_Sprites_Buffer+0x00c
ldy #0x2000
sty $_Sprites_Buffer+0x010
ldy #0x2800
sty $_Sprites_Buffer+0x014
ldy #0x3000
sty $_Sprites_Buffer+0x018
ldy #0x3800
sty $_Sprites_Buffer+0x01c
// Save sprite size
lda #0x01
sta $_IO_4014_SpriteSize
b_2:
// Fill remaining space in the sprite buffer (Except first 8 sprites)
//tsx
lda #0xf0
jmp ($_IO__w4014_FillSwitch2+1-Sprites_Buffer,x)
b_1:
// Move sprites on screen
stz $_Sprites_Buffer+0x200
stz $_Sprites_Buffer+0x201
// Save sprite size
stz $_IO_4014_SpriteSize
// Fill remaining space in the sprite buffer
//tsx
lda #0xf0
jmp ($_IO__w4014_FillSwitch+1-Sprites_Buffer,x)
.mx 0x30
IO__w4014_8x16:
// Sprite limit?
lda $=RomInfo_SpriteLimit
bpl $+IO__w4014_8x16_nolimit
jmp $_IO__w4014_8x16_limit
IO__w4014_8x16_nolimit:
// Change mode and clear carry for sprite 0 math
.mx 0x10
rep #0x21
// Change DP to point to Nes sprite
lda $_IO_Temp-1
tcd
// Keep stack pointer
tsc
sta $_IO_Temp16
// Replace stack pointer to the sprite buffer
lda #_Sprites_Buffer+0x1ff
tcs
// Change mode
.mx 0x30
sep #0x30
// Which sprite bank to use?
lda $_IO_MapperChrBankSwap
and #0x01
sta $_IO_Temp
// Nes: Y, T, A, X
// Snes: X, Y, T, A
// Update sprite 0 hit, assume carry clear from REP
lda $0x00
adc $=RomInfo_SpriteZeroOffset
bcc $+b_1
lda #0xf0
b_1:
sta $_Sprite0Line
lda #0xef
IO__w4014_mac8x16_nolimit 0xfc
IO__w4014_mac8x16_nolimit 0xf8
IO__w4014_mac8x16_nolimit 0xf4
IO__w4014_mac8x16_nolimit 0xf0
IO__w4014_mac8x16_nolimit 0xec
IO__w4014_mac8x16_nolimit 0xe8
IO__w4014_mac8x16_nolimit 0xe4
IO__w4014_mac8x16_nolimit 0xe0
IO__w4014_mac8x16_nolimit 0xdc
IO__w4014_mac8x16_nolimit 0xd8
IO__w4014_mac8x16_nolimit 0xd4
IO__w4014_mac8x16_nolimit 0xd0
IO__w4014_mac8x16_nolimit 0xcc
IO__w4014_mac8x16_nolimit 0xc8
IO__w4014_mac8x16_nolimit 0xc4
IO__w4014_mac8x16_nolimit 0xc0
IO__w4014_mac8x16_nolimit 0xbc
IO__w4014_mac8x16_nolimit 0xb8
IO__w4014_mac8x16_nolimit 0xb4
IO__w4014_mac8x16_nolimit 0xb0
IO__w4014_mac8x16_nolimit 0xac
IO__w4014_mac8x16_nolimit 0xa8
IO__w4014_mac8x16_nolimit 0xa4
IO__w4014_mac8x16_nolimit 0xa0
IO__w4014_mac8x16_nolimit 0x9c
IO__w4014_mac8x16_nolimit 0x98
IO__w4014_mac8x16_nolimit 0x94
IO__w4014_mac8x16_nolimit 0x90
IO__w4014_mac8x16_nolimit 0x8c
IO__w4014_mac8x16_nolimit 0x88
IO__w4014_mac8x16_nolimit 0x84
IO__w4014_mac8x16_nolimit 0x80
IO__w4014_mac8x16_nolimit 0x7c
IO__w4014_mac8x16_nolimit 0x78
IO__w4014_mac8x16_nolimit 0x74
IO__w4014_mac8x16_nolimit 0x70
IO__w4014_mac8x16_nolimit 0x6c
IO__w4014_mac8x16_nolimit 0x68
IO__w4014_mac8x16_nolimit 0x64
IO__w4014_mac8x16_nolimit 0x60
IO__w4014_mac8x16_nolimit 0x5c
IO__w4014_mac8x16_nolimit 0x58
IO__w4014_mac8x16_nolimit 0x54
IO__w4014_mac8x16_nolimit 0x50
IO__w4014_mac8x16_nolimit 0x4c
IO__w4014_mac8x16_nolimit 0x48
IO__w4014_mac8x16_nolimit 0x44
IO__w4014_mac8x16_nolimit 0x40
IO__w4014_mac8x16_nolimit 0x3c
IO__w4014_mac8x16_nolimit 0x38
IO__w4014_mac8x16_nolimit 0x34
IO__w4014_mac8x16_nolimit 0x30
IO__w4014_mac8x16_nolimit 0x2c
IO__w4014_mac8x16_nolimit 0x28
IO__w4014_mac8x16_nolimit 0x24
IO__w4014_mac8x16_nolimit 0x20
IO__w4014_mac8x16_nolimit 0x1c
IO__w4014_mac8x16_nolimit 0x18
IO__w4014_mac8x16_nolimit 0x14
IO__w4014_mac8x16_nolimit 0x10
IO__w4014_mac8x16_nolimit 0x0c
IO__w4014_mac8x16_nolimit 0x08
IO__w4014_mac8x16_nolimit 0x04
IO__w4014_mac8x16_nolimit 0x00
// Queue sprite DMA (TODO: No priority transfer)
lda #.VramQ_SpriteXfer8x8
sta $0x2180
tsc
inc a
lsr a
sta $0x2180
// Change mode
.mx 0x20
rep #0x10
// Save sprite size and fill remaining space in the sprite buffer
tsx
lda #0xf0
sta $_IO_4014_SpriteSize
jmp ($_IO__w4014_FillSwitch+1-Sprites_Buffer,x)
IO__w4014_8x16_limit:
// Change mode and clear carry for sprite 0 math
.mx 0x10
rep #0x21
// Change DP to point to Nes sprite
lda $_IO_Temp-1
tcd
// Keep stack pointer
tsc
sta $_IO_Temp16
// Reset sprite count per scanline
lda #_Sprites_CountdownPer8Lines+0x1d
tcs
lda #0x0808
pha
pha
pha
pha
pha
pha
pha
pha
pha
pha
pha
pha
pha
pha
pha
// Replace stack pointer to the sprite buffer (Already done from overriding extra attribute bits)
//lda #_Sprites_Buffer+0x1ff
//tcs
// Change mode
.mx 0x30
sep #0x30
// Which sprite bank to use?
lda $_IO_MapperChrBankSwap
and #0x01
sta $_IO_Temp
// Nes: Y, T, A, X
// Snes: X, Y, T, A
// Update sprite 0 hit, assume carry clear from REP
lda $0x00
adc $=RomInfo_SpriteZeroOffset
bcc $+b_1
lda #0xf0
b_1:
sta $_Sprite0Line
lda #0xef
IO__w4014_mac8x16 0x00, "//"
IO__w4014_mac8x16 0x04, "//"
IO__w4014_mac8x16 0x08, "//"
IO__w4014_mac8x16 0x0c, "//"
IO__w4014_mac8x16 0x10, "//"
IO__w4014_mac8x16 0x14, "//"
IO__w4014_mac8x16 0x18, "//"
IO__w4014_mac8x16 0x1c, "//"
IO__w4014_mac8x16 0x20, "//"
IO__w4014_mac8x16 0x24, "//"
IO__w4014_mac8x16 0x28, "//"
IO__w4014_mac8x16 0x2c, "//"
IO__w4014_mac8x16 0x30, "//"
IO__w4014_mac8x16 0x34, "//"
IO__w4014_mac8x16 0x38, "//"
IO__w4014_mac8x16 0x3c, "//"
IO__w4014_mac8x16 0x40, "//"
IO__w4014_mac8x16 0x44, "//"
IO__w4014_mac8x16 0x48, "//"
IO__w4014_mac8x16 0x4c, "//"
IO__w4014_mac8x16 0x50, "//"
IO__w4014_mac8x16 0x54, "//"
IO__w4014_mac8x16 0x58, "//"
IO__w4014_mac8x16 0x5c, "//"
IO__w4014_mac8x16 0x60, "//"
IO__w4014_mac8x16 0x64, "//"
IO__w4014_mac8x16 0x68, "//"
IO__w4014_mac8x16 0x6c, "//"
IO__w4014_mac8x16 0x70, "//"
IO__w4014_mac8x16 0x74, "//"
IO__w4014_mac8x16 0x78, "//"
IO__w4014_mac8x16 0x7c, "//"
IO__w4014_mac8x16 0x80, "//"
IO__w4014_mac8x16 0x84, "//"
IO__w4014_mac8x16 0x88, "//"
IO__w4014_mac8x16 0x8c, "//"
IO__w4014_mac8x16 0x90, "//"
IO__w4014_mac8x16 0x94, "//"
IO__w4014_mac8x16 0x98, "//"
IO__w4014_mac8x16 0x9c, "//"
IO__w4014_mac8x16 0xa0, "//"
IO__w4014_mac8x16 0xa4, "//"
IO__w4014_mac8x16 0xa8, "//"
IO__w4014_mac8x16 0xac, "//"
IO__w4014_mac8x16 0xb0, "//"
IO__w4014_mac8x16 0xb4, "//"
IO__w4014_mac8x16 0xb8, "//"
IO__w4014_mac8x16 0xbc, "//"
IO__w4014_mac8x16 0xc0, "//"
IO__w4014_mac8x16 0xc4, "//"
IO__w4014_mac8x16 0xc8, "//"
IO__w4014_mac8x16 0xcc, "//"
IO__w4014_mac8x16 0xd0, "//"
IO__w4014_mac8x16 0xd4, "//"
IO__w4014_mac8x16 0xd8, "//"
IO__w4014_mac8x16 0xdc, "//"
IO__w4014_mac8x16 0xe0, "//"
IO__w4014_mac8x16 0xe4, "//"
IO__w4014_mac8x16 0xe8, "//"
IO__w4014_mac8x16 0xec, "//"
IO__w4014_mac8x16 0xf0, "//"
IO__w4014_mac8x16 0xf4, "//"
IO__w4014_mac8x16 0xf8, "//"
IO__w4014_mac8x16 0xfc, "//"
// Queue sprite transfer with sprite priority
.mx 0x10
rep #0x20
tsc
lsr a
inc a
tax
cmp #_Sprites_Buffer/2+0x100
bne $+b_1
// No sprite on screen
ldy #.VramQ_SpriteXferEmpty
sty $0x2180
bra $+b_2
b_1:
ldy #.VramQ_SpriteXfer8x16
sty $0x2180
stx $0x2180
b_2:
// Adjust our pointer from 1-byte empty address to 4-byte full offset
.mx 0x00
rep #0x30
txa
asl a
tax
// Add 12 big sprites
sbc #_Zero-1+0x30
// Do we have enough free space?
jmi $_IO__w4014_8x16_exit
tax
// Add big sprites regardless of need, at least in this version
stz $_Sprites_Buffer+0x00,x
stz $_Sprites_Buffer+0x10,x
stz $_Sprites_Buffer+0x20,x
lda #0xc000
sta $_Sprites_Buffer+0x04,x
sta $_Sprites_Buffer+0x14,x
sta $_Sprites_Buffer+0x24,x
asl a
sta $_Sprites_Buffer+0x08,x
sta $_Sprites_Buffer+0x18,x
sta $_Sprites_Buffer+0x28,x
lsr a
sta $_Sprites_Buffer+0x0c,x
sta $_Sprites_Buffer+0x1c,x
sta $_Sprites_Buffer+0x2c,x
.macro IO__w4014_SpriteLimit_mac8x16 linePair
//lda #0x0080
bit $_Sprites_CountdownPer8Lines+{0}
bmi $+b_both
beq $+b_none
b_even: // 00f0
// Reserve 2 sprites
txa
sec
sbc #8
jmi $_IO__w4014_8x16_exit
tax
// Add 2 sprites
lda #_Zero+{0}*0x800
sta $_Sprites_Buffer+0x00,x
sta $_Sprites_Buffer+0x04,x
// Next
lda #0x0080
bra $+b_none
b_both: // f0f0
beq $+b_odd
// Reserve 4 sprites
txa
sec
sbc #16
jmi $_IO__w4014_8x16_exit
tax
// Add 4 sprites
lda #_Zero+{0}*0x800
sta $_Sprites_Buffer+0x00,x
sta $_Sprites_Buffer+0x04,x
lda #_Zero+{0}*0x800+0x800
sta $_Sprites_Buffer+0x08,x
sta $_Sprites_Buffer+0x0c,x
// Next
lda #0x0080
bra $+b_none
b_odd: // f000
// Reserve 2 sprites
txa
sec
sbc #8
jmi $_IO__w4014_8x16_exit
tax
// Add 2 sprites
lda #_Zero+{0}*0x800+0x800
sta $_Sprites_Buffer+0x00,x
sta $_Sprites_Buffer+0x04,x
// Next
lda #0x0080
//bra $+b_none
b_none: // 0000
.endm
lda #0x0080
IO__w4014_SpriteLimit_mac8x16 0x00
IO__w4014_SpriteLimit_mac8x16 0x02
IO__w4014_SpriteLimit_mac8x16 0x04
IO__w4014_SpriteLimit_mac8x16 0x06
IO__w4014_SpriteLimit_mac8x16 0x08
IO__w4014_SpriteLimit_mac8x16 0x0a
IO__w4014_SpriteLimit_mac8x16 0x0c
IO__w4014_SpriteLimit_mac8x16 0x0e
IO__w4014_SpriteLimit_mac8x16 0x10
IO__w4014_SpriteLimit_mac8x16 0x12
IO__w4014_SpriteLimit_mac8x16 0x14
IO__w4014_SpriteLimit_mac8x16 0x16
IO__w4014_SpriteLimit_mac8x16 0x18
IO__w4014_SpriteLimit_mac8x16 0x1a
IO__w4014_SpriteLimit_mac8x16 0x1c
//IO__w4014_SpriteLimit_mac8x16 0x1e
IO__w4014_8x16_exit:
sep #0x20
.mx 0x20
// Save sprite size, write any non-zero value for 8x16
lda #0xf0
sta $_IO_4014_SpriteSize
// Fill remaining space in the sprite buffer
//lda #0xf0
jmp ($_IO__w4014_FillSwitch,x)
IO__w4014_FillSwitch:
switch 0x200, IO__w4014_FillSwitch_End, IO__w4014_FillSwitch_End
.macro IO__w4014_FillSwitch_mac
case {0}
sta $_Sprites_Buffer+1+{0}*2-4
.endm
.macro IO__w4014_FillSwitch_mac2
IO__w4014_FillSwitch_mac {0}e
IO__w4014_FillSwitch_mac {0}c
IO__w4014_FillSwitch_mac {0}a
IO__w4014_FillSwitch_mac {0}8
IO__w4014_FillSwitch_mac {0}6
IO__w4014_FillSwitch_mac {0}4
IO__w4014_FillSwitch_mac {0}2
{1}IO__w4014_FillSwitch_mac {0}0
.endm
IO__w4014_FillSwitch_mac2 0x1f, ""
IO__w4014_FillSwitch_mac2 0x1e, ""
IO__w4014_FillSwitch_mac2 0x1d, ""
IO__w4014_FillSwitch_mac2 0x1c, ""
IO__w4014_FillSwitch_mac2 0x1b, ""
IO__w4014_FillSwitch_mac2 0x1a, ""
IO__w4014_FillSwitch_mac2 0x19, ""
IO__w4014_FillSwitch_mac2 0x18, ""
IO__w4014_FillSwitch_mac2 0x17, ""
IO__w4014_FillSwitch_mac2 0x16, ""
IO__w4014_FillSwitch_mac2 0x15, ""
IO__w4014_FillSwitch_mac2 0x14, ""
IO__w4014_FillSwitch_mac2 0x13, ""
IO__w4014_FillSwitch_mac2 0x12, ""
IO__w4014_FillSwitch_mac2 0x11, ""
IO__w4014_FillSwitch_mac2 0x10, ""
IO__w4014_FillSwitch_mac2 0x0f, ""
IO__w4014_FillSwitch_mac2 0x0e, ""
IO__w4014_FillSwitch_mac2 0x0d, ""
IO__w4014_FillSwitch_mac2 0x0c, ""
IO__w4014_FillSwitch_mac2 0x0b, ""
IO__w4014_FillSwitch_mac2 0x0a, ""
IO__w4014_FillSwitch_mac2 0x09, ""
IO__w4014_FillSwitch_mac2 0x08, ""
IO__w4014_FillSwitch_mac2 0x07, ""
IO__w4014_FillSwitch_mac2 0x06, ""
IO__w4014_FillSwitch_mac2 0x05, ""
IO__w4014_FillSwitch_mac2 0x04, ""
IO__w4014_FillSwitch_mac2 0x03, ""
IO__w4014_FillSwitch_mac2 0x02, ""
IO__w4014_FillSwitch_mac2 0x01, ""
IO__w4014_FillSwitch_mac2 0x00, "//"
IO__w4014_FillSwitch_End:
// Fix DP
rep #0x20
.mx 0x00
lda #0x0000
tcd
// Fix stack pointer
lda $_IO_Temp16
tcs
// Change mode back
sep #0x30
.mx 0x30
ply
plx
pla
plb
plp
rtl
IO__w4014_FillSwitch2:
switch 0x200, IO__w4014_FillSwitch2_End, IO__w4014_FillSwitch2_End
IO__w4014_FillSwitch_mac2 0x1f, ""
IO__w4014_FillSwitch_mac2 0x1e, ""
IO__w4014_FillSwitch_mac2 0x1d, ""
IO__w4014_FillSwitch_mac2 0x1c, ""
IO__w4014_FillSwitch_mac2 0x1b, ""
IO__w4014_FillSwitch_mac2 0x1a, ""
IO__w4014_FillSwitch_mac2 0x19, ""
IO__w4014_FillSwitch_mac2 0x18, ""
IO__w4014_FillSwitch_mac2 0x17, ""
IO__w4014_FillSwitch_mac2 0x16, ""
IO__w4014_FillSwitch_mac2 0x15, ""
IO__w4014_FillSwitch_mac2 0x14, ""
IO__w4014_FillSwitch_mac2 0x13, ""
IO__w4014_FillSwitch_mac2 0x12, ""
IO__w4014_FillSwitch_mac2 0x11, ""
IO__w4014_FillSwitch_mac2 0x10, ""
IO__w4014_FillSwitch_mac2 0x0f, ""
IO__w4014_FillSwitch_mac2 0x0e, ""
IO__w4014_FillSwitch_mac2 0x0d, ""
IO__w4014_FillSwitch_mac2 0x0c, ""
IO__w4014_FillSwitch_mac2 0x0b, ""
IO__w4014_FillSwitch_mac2 0x0a, ""
IO__w4014_FillSwitch_mac2 0x09, ""
IO__w4014_FillSwitch_mac2 0x08, ""
IO__w4014_FillSwitch_mac2 0x07, ""
IO__w4014_FillSwitch_mac2 0x06, ""
IO__w4014_FillSwitch_mac2 0x05, ""
IO__w4014_FillSwitch_mac2 0x04, ""
IO__w4014_FillSwitch_mac2 0x03, ""
IO__w4014_FillSwitch_mac2 0x02, ""
IO__w4014_FillSwitch_mac2 0x01, "//"
IO__w4014_FillSwitch2_End:
// Fix DP
rep #0x20
.mx 0x00
lda #0x0000
tcd
// Fix stack pointer
lda $_IO_Temp16
tcs
// Change mode back
sep #0x30
.mx 0x30
ply
plx
pla
plb
plp
rtl
// Align to avoid page boundary crossing penalty (TODO: Move this to a better place within the bank)
.align 0x100
IO__SpriteAttributeLUT:
.data8 0x20, 0x22, 0x24, 0x26, 0x20, 0x22, 0x24, 0x26, 0x20, 0x22, 0x24, 0x26, 0x20, 0x22, 0x24, 0x26
.data8 0x20, 0x22, 0x24, 0x26, 0x20, 0x22, 0x24, 0x26, 0x20, 0x22, 0x24, 0x26, 0x20, 0x22, 0x24, 0x26
.data8 0x00, 0x02, 0x04, 0x06, 0x00, 0x02, 0x04, 0x06, 0x00, 0x02, 0x04, 0x06, 0x00, 0x02, 0x04, 0x06
.data8 0x00, 0x02, 0x04, 0x06, 0x00, 0x02, 0x04, 0x06, 0x00, 0x02, 0x04, 0x06, 0x00, 0x02, 0x04, 0x06
.data8 0x60, 0x62, 0x64, 0x66, 0x60, 0x62, 0x64, 0x66, 0x60, 0x62, 0x64, 0x66, 0x60, 0x62, 0x64, 0x66
.data8 0x60, 0x62, 0x64, 0x66, 0x60, 0x62, 0x64, 0x66, 0x60, 0x62, 0x64, 0x66, 0x60, 0x62, 0x64, 0x66
.data8 0x40, 0x42, 0x44, 0x46, 0x40, 0x42, 0x44, 0x46, 0x40, 0x42, 0x44, 0x46, 0x40, 0x42, 0x44, 0x46
.data8 0x40, 0x42, 0x44, 0x46, 0x40, 0x42, 0x44, 0x46, 0x40, 0x42, 0x44, 0x46, 0x40, 0x42, 0x44, 0x46
.data8 0xa0, 0xa2, 0xa4, 0xa6, 0xa0, 0xa2, 0xa4, 0xa6, 0xa0, 0xa2, 0xa4, 0xa6, 0xa0, 0xa2, 0xa4, 0xa6
.data8 0xa0, 0xa2, 0xa4, 0xa6, 0xa0, 0xa2, 0xa4, 0xa6, 0xa0, 0xa2, 0xa4, 0xa6, 0xa0, 0xa2, 0xa4, 0xa6
.data8 0x80, 0x82, 0x84, 0x86, 0x80, 0x82, 0x84, 0x86, 0x80, 0x82, 0x84, 0x86, 0x80, 0x82, 0x84, 0x86
.data8 0x80, 0x82, 0x84, 0x86, 0x80, 0x82, 0x84, 0x86, 0x80, 0x82, 0x84, 0x86, 0x80, 0x82, 0x84, 0x86
.data8 0xe0, 0xe2, 0xe4, 0xe6, 0xe0, 0xe2, 0xe4, 0xe6, 0xe0, 0xe2, 0xe4, 0xe6, 0xe0, 0xe2, 0xe4, 0xe6
.data8 0xe0, 0xe2, 0xe4, 0xe6, 0xe0, 0xe2, 0xe4, 0xe6, 0xe0, 0xe2, 0xe4, 0xe6, 0xe0, 0xe2, 0xe4, 0xe6
.data8 0xc0, 0xc2, 0xc4, 0xc6, 0xc0, 0xc2, 0xc4, 0xc6, 0xc0, 0xc2, 0xc4, 0xc6, 0xc0, 0xc2, 0xc4, 0xc6
.data8 0xc0, 0xc2, 0xc4, 0xc6, 0xc0, 0xc2, 0xc4, 0xc6, 0xc0, 0xc2, 0xc4, 0xc6, 0xc0, 0xc2, 0xc4, 0xc6
IO__SpriteAttributeLUT2:
.data8 0x21, 0x23, 0x25, 0x27, 0x21, 0x23, 0x25, 0x27, 0x21, 0x23, 0x25, 0x27, 0x21, 0x23, 0x25, 0x27
.data8 0x21, 0x23, 0x25, 0x27, 0x21, 0x23, 0x25, 0x27, 0x21, 0x23, 0x25, 0x27, 0x21, 0x23, 0x25, 0x27
.data8 0x01, 0x03, 0x05, 0x07, 0x01, 0x03, 0x05, 0x07, 0x01, 0x03, 0x05, 0x07, 0x01, 0x03, 0x05, 0x07
.data8 0x01, 0x03, 0x05, 0x07, 0x01, 0x03, 0x05, 0x07, 0x01, 0x03, 0x05, 0x07, 0x01, 0x03, 0x05, 0x07
.data8 0x61, 0x63, 0x65, 0x67, 0x61, 0x63, 0x65, 0x67, 0x61, 0x63, 0x65, 0x67, 0x61, 0x63, 0x65, 0x67
.data8 0x61, 0x63, 0x65, 0x67, 0x61, 0x63, 0x65, 0x67, 0x61, 0x63, 0x65, 0x67, 0x61, 0x63, 0x65, 0x67
.data8 0x41, 0x43, 0x45, 0x47, 0x41, 0x43, 0x45, 0x47, 0x41, 0x43, 0x45, 0x47, 0x41, 0x43, 0x45, 0x47
.data8 0x41, 0x43, 0x45, 0x47, 0x41, 0x43, 0x45, 0x47, 0x41, 0x43, 0x45, 0x47, 0x41, 0x43, 0x45, 0x47
.data8 0xa1, 0xa3, 0xa5, 0xa7, 0xa1, 0xa3, 0xa5, 0xa7, 0xa1, 0xa3, 0xa5, 0xa7, 0xa1, 0xa3, 0xa5, 0xa7
.data8 0xa1, 0xa3, 0xa5, 0xa7, 0xa1, 0xa3, 0xa5, 0xa7, 0xa1, 0xa3, 0xa5, 0xa7, 0xa1, 0xa3, 0xa5, 0xa7
.data8 0x81, 0x83, 0x85, 0x87, 0x81, 0x83, 0x85, 0x87, 0x81, 0x83, 0x85, 0x87, 0x81, 0x83, 0x85, 0x87
.data8 0x81, 0x83, 0x85, 0x87, 0x81, 0x83, 0x85, 0x87, 0x81, 0x83, 0x85, 0x87, 0x81, 0x83, 0x85, 0x87
.data8 0xe1, 0xe3, 0xe5, 0xe7, 0xe1, 0xe3, 0xe5, 0xe7, 0xe1, 0xe3, 0xe5, 0xe7, 0xe1, 0xe3, 0xe5, 0xe7
.data8 0xe1, 0xe3, 0xe5, 0xe7, 0xe1, 0xe3, 0xe5, 0xe7, 0xe1, 0xe3, 0xe5, 0xe7, 0xe1, 0xe3, 0xe5, 0xe7
.data8 0xc1, 0xc3, 0xc5, 0xc7, 0xc1, 0xc3, 0xc5, 0xc7, 0xc1, 0xc3, 0xc5, 0xc7, 0xc1, 0xc3, 0xc5, 0xc7
.data8 0xc1, 0xc3, 0xc5, 0xc7, 0xc1, 0xc3, 0xc5, 0xc7, 0xc1, 0xc3, 0xc5, 0xc7, 0xc1, 0xc3, 0xc5, 0xc7
IO__SR3:
.fill 8, 0x00
.fill 8, 0x01
.fill 8, 0x02
.fill 8, 0x03
.fill 8, 0x04
.fill 8, 0x05
.fill 8, 0x06
.fill 8, 0x07
.fill 8, 0x08
.fill 8, 0x09
.fill 8, 0x0a
.fill 8, 0x0b
.fill 8, 0x0c
.fill 8, 0x0d
.fill 8, 0x0e
.fill 8, 0x0f
.fill 8, 0x10
.fill 8, 0x11
.fill 8, 0x12
.fill 8, 0x13
.fill 8, 0x14
.fill 8, 0x15
.fill 8, 0x16
.fill 8, 0x17
.fill 8, 0x18
.fill 8, 0x19
.fill 8, 0x1a
.fill 8, 0x1b
.fill 8, 0x1c
.fill 8, 0x1d
.fill 8, 0x1e
.fill 8, 0x1f
// ---------------------------------------------------------------------------
// Sound registers
IO__w4000_Switch_Trap:
trap
Exception "IO Index Failed{}{}{}A direct indexed IO access in page 0x40 failed."
IO__w4000_Switch:
switch 0x80, IO__w4000_Switch_Trap, IO__w4000_Switch_Trap
caseat 0x00, IO__w4000_ind
caseat 0x01, IO__w4001_ind
caseat 0x02, IO__w4002_ind
caseat 0x03, IO__w4003_ind
caseat 0x04, IO__w4004_ind
caseat 0x05, IO__w4005_ind
caseat 0x06, IO__w4006_ind
caseat 0x07, IO__w4007_ind
caseat 0x08, IO__w4008_ind
caseat 0x09, IO__w4009_ind
caseat 0x0a, IO__w400a_ind
caseat 0x0b, IO__w400b_ind
caseat 0x0c, IO__w400c_ind
caseat 0x0d, IO__w400d_ind
caseat 0x0e, IO__w400e_ind
caseat 0x0f, IO__w400f_ind
caseat 0x10, IO__w4010_ind
caseat 0x11, IO__w4011_ind
caseat 0x12, IO__w4012_ind
caseat 0x13, IO__w4013_ind
caseat 0x15, IO__w4015_ind
.macro IO_w40xx offset, indexReg
php
phx
xba
//lda $_Addition+{0},{1}
t{1}a
asl a
tax
jmp ($_IO__w4000_Switch+{0}*2,x)
.endm
.macro IO_w40xx_Return
plx
plp
rtl
.endm
IO__w4000_a_x: IO_w40xx 0x00, x
IO__w4000_a_y: IO_w40xx 0x00, y
IO__w4001_a_x: IO_w40xx 0x01, x
IO__w4001_a_y: IO_w40xx 0x01, y
IO__w4002_a_x: IO_w40xx 0x02, x
IO__w4002_a_y: IO_w40xx 0x02, y
IO__w4003_a_x: IO_w40xx 0x03, x
IO__w4003_a_y: IO_w40xx 0x03, y
IO__w4004_a_x: IO_w40xx 0x04, x
IO__w4004_a_y: IO_w40xx 0x04, y
IO__w4005_a_x: IO_w40xx 0x05, x
IO__w4005_a_y: IO_w40xx 0x05, y
IO__w4006_a_x: IO_w40xx 0x06, x
IO__w4006_a_y: IO_w40xx 0x06, y
IO__w4007_a_x: IO_w40xx 0x07, x
IO__w4007_a_y: IO_w40xx 0x07, y
IO__w4008_a_x: IO_w40xx 0x08, x
IO__w4008_a_y: IO_w40xx 0x08, y
IO__w4009_a_x: IO_w40xx 0x09, x
IO__w4009_a_y: IO_w40xx 0x09, y
IO__w400a_a_x: IO_w40xx 0x0a, x
IO__w400a_a_y: IO_w40xx 0x0a, y
IO__w400b_a_x: IO_w40xx 0x0b, x
IO__w400b_a_y: IO_w40xx 0x0b, y
IO__w400c_a_x: IO_w40xx 0x0c, x
IO__w400c_a_y: IO_w40xx 0x0c, y
IO__w400d_a_x: IO_w40xx 0x0d, x
IO__w400d_a_y: IO_w40xx 0x0d, y
IO__w400e_a_x: IO_w40xx 0x0e, x
IO__w400e_a_y: IO_w40xx 0x0e, y
IO__w400f_a_x: IO_w40xx 0x0f, x
IO__w400f_a_y: IO_w40xx 0x0f, y
IO__w4010_a_x: IO_w40xx 0x10, x
IO__w4010_a_y: IO_w40xx 0x10, y
IO__w4011_a_x: IO_w40xx 0x11, x
IO__w4011_a_y: IO_w40xx 0x11, y
IO__w4012_a_x: IO_w40xx 0x12, x
IO__w4012_a_y: IO_w40xx 0x12, y
IO__w4013_a_x: IO_w40xx 0x13, x
IO__w4013_a_y: IO_w40xx 0x13, y
IO__r4000_a:
IO__r4000_a_i:
IO__r4000_x:
IO__r4000_y:
rtl
IO__w4000_ind:
xba
sta $_Sound_NesRegs+0x0
IO_w40xx_Return
IO__w4000_a_i:
sta $_Sound_NesRegs+0x0
rtl
IO__w4000_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x0
b_1:
CoreCall_End
IO__w4000_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x0
b_1:
CoreCall_End
IO__w4000_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x0
b_1:
CoreCall_End
IO__r4001_a:
IO__r4001_a_i:
IO__r4001_x:
IO__r4001_y:
rtl
IO__w4001_ind:
lda #0x40
tsb $_Sound_ExtraControl
xba
sta $_Sound_NesRegs+0x1
IO_w40xx_Return
IO__w4001_a_i:
sta $_Sound_NesRegs+0x1
php
xba
lda #0x40
tsb $_Sound_ExtraControl
xba
plp
rtl
IO__w4001_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x1
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
lda #0x40
tsb $_Sound_ExtraControl
b_1:
CoreCall_Pull
CoreCall_End
IO__w4001_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x1
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
lda #0x40
tsb $_Sound_ExtraControl
b_1:
CoreCall_Pull
CoreCall_End
IO__w4001_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x1
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
lda #0x40
tsb $_Sound_ExtraControl
b_1:
CoreCall_Pull
CoreCall_End
IO__r4002_a:
IO__r4002_a_i:
IO__r4002_x:
IO__r4002_y:
rtl
IO__w4002_ind:
xba
sta $_Sound_NesRegs+0x2
IO_w40xx_Return
IO__w4002_a_i:
sta $_Sound_NesRegs+0x2
rtl
IO__w4002_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x2
b_1:
CoreCall_End
IO__w4002_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x2
b_1:
CoreCall_End
IO__w4002_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x2
b_1:
CoreCall_End
IO__r4003_a:
IO__r4003_a_i:
IO__r4003_x:
IO__r4003_y:
rtl
.macro IO__w4003_Mac
lda $=Sound__EmulateLengthCounter_length_d3_mixed,x
sta $_Sound_square0_length
lda #0x01
tsb $_Sound_NesRegs+0x15
tsb $_Sound_ExtraControl
.endm
IO__w4003_ind:
xba
sta $_Sound_NesRegs+0x3
tax
IO__w4003_Mac
txa
IO_w40xx_Return
IO__w4003_a_i:
sta $_Sound_NesRegs+0x3
php
phx
tax
IO__w4003_Mac
txa
plx
plp
rtl
IO__w4003_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x3
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
IO__w4003_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w4003_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x3
b_1:
CoreCall_UseA8
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tyx
IO__w4003_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w4003_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x3
b_1:
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tax
IO__w4003_Mac
txa // Removed when A is unused
b_1:
CoreCall_IfNotFreeA +b_1
CoreCall_Remove 1
b_1:
CoreCall_Pull
CoreCall_End
IO__r4004_a:
IO__r4004_a_i:
IO__r4004_x:
IO__r4004_y:
rtl
IO__w4004_ind:
xba
sta $_Sound_NesRegs+0x4
IO_w40xx_Return
IO__w4004_a_i:
sta $_Sound_NesRegs+0x4
rtl
IO__w4004_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x4
b_1:
CoreCall_End
IO__w4004_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x4
b_1:
CoreCall_End
IO__w4004_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x4
b_1:
CoreCall_End
IO__r4005_a:
IO__r4005_a_i:
IO__r4005_x:
IO__r4005_y:
rtl
IO__w4005_ind:
lda #0x80
tsb $_Sound_ExtraControl
xba
sta $_Sound_NesRegs+0x5
IO_w40xx_Return
IO__w4005_a_i:
sta $_Sound_NesRegs+0x5
php
xba
lda #0x80
tsb $_Sound_ExtraControl
xba
plp
rtl
IO__w4005_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x5
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
lda #0x80
tsb $_Sound_ExtraControl
b_1:
CoreCall_Pull
CoreCall_End
IO__w4005_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x5
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
lda #0x80
tsb $_Sound_ExtraControl
b_1:
CoreCall_Pull
CoreCall_End
IO__w4005_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x5
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
lda #0x80
tsb $_Sound_ExtraControl
b_1:
CoreCall_Pull
CoreCall_End
IO__r4006_a:
IO__r4006_a_i:
IO__r4006_x:
IO__r4006_y:
rtl
IO__w4006_ind:
xba
sta $_Sound_NesRegs+0x6
IO_w40xx_Return
IO__w4006_a_i:
sta $_Sound_NesRegs+0x6
rtl
IO__w4006_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x6
b_1:
CoreCall_End
IO__w4006_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x6
b_1:
CoreCall_End
IO__w4006_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x6
b_1:
CoreCall_End
IO__r4007_a:
IO__r4007_a_i:
IO__r4007_x:
IO__r4007_y:
rtl
.macro IO__w4007_Mac
lda $=Sound__EmulateLengthCounter_length_d3_mixed,x
sta $_Sound_square1_length
lda #0x02
tsb $_Sound_NesRegs+0x15
tsb $_Sound_ExtraControl
.endm
IO__w4007_ind:
xba
sta $_Sound_NesRegs+0x7
tax
IO__w4007_Mac
txa
IO_w40xx_Return
IO__w4007_a_i:
sta $_Sound_NesRegs+0x7
php
phx
tax
IO__w4007_Mac
txa
plx
plp
rtl
IO__w4007_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x7
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
IO__w4007_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w4007_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x7
b_1:
CoreCall_UseA8
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tyx
IO__w4007_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w4007_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x7
b_1:
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tax
IO__w4007_Mac
txa // Removed when A is unused
b_1:
CoreCall_IfNotFreeA +b_1
CoreCall_Remove 1
b_1:
CoreCall_Pull
CoreCall_End
IO__r4008_a:
IO__r4008_a_i:
IO__r4008_x:
IO__r4008_y:
rtl
IO__w4008_ind:
xba
sta $_Sound_NesRegs+0x8
IO_w40xx_Return
IO__w4008_a_i:
sta $_Sound_NesRegs+0x8
rtl
IO__w4008_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x8
b_1:
CoreCall_End
IO__w4008_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x8
b_1:
CoreCall_End
IO__w4008_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x8
b_1:
CoreCall_End
IO__r4009_a:
IO__r4009_a_i:
IO__r4009_x:
IO__r4009_y:
rtl
IO__w4009_ind:
xba
sta $_Sound_NesRegs+0x9
IO_w40xx_Return
IO__w4009_a_i:
sta $_Sound_NesRegs+0x9
rtl
IO__w4009_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x9
b_1:
CoreCall_End
IO__w4009_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x9
b_1:
CoreCall_End
IO__w4009_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x9
b_1:
CoreCall_End
IO__r400a_a:
IO__r400a_a_i:
IO__r400a_x:
IO__r400a_y:
rtl
IO__w400a_ind:
xba
sta $_Sound_NesRegs+0xa
IO_w40xx_Return
IO__w400a_a_i:
sta $_Sound_NesRegs+0xa
rtl
IO__w400a_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0xa
b_1:
CoreCall_End
IO__w400a_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0xa
b_1:
CoreCall_End
IO__w400a_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0xa
b_1:
CoreCall_End
IO__r400b_a:
IO__r400b_a_i:
IO__r400b_x:
IO__r400b_y:
rtl
.macro IO__w400b_Mac
lda #0x04
tsb $_Sound_ExtraControl
tsb $_Sound_NesRegs+0x15
lda $=Sound__EmulateLengthCounter_length_d3_mixed,x
sta $_Sound_triangle_length
.endm
IO__w400b_ind:
xba
sta $_Sound_NesRegs+0xb
tax
IO__w400b_Mac
txa
IO_w40xx_Return
IO__w400b_a_i:
sta $_Sound_NesRegs+0xb
php
phx
tax
IO__w400b_Mac
txa
plx
plp
rtl
IO__w400b_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0xb
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
IO__w400b_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w400b_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0xb
b_1:
CoreCall_UseA8
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tyx
IO__w400b_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w400b_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0xb
b_1:
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tax
IO__w400b_Mac
txa // Removed when A is unused
b_1:
CoreCall_IfNotFreeA +b_1
CoreCall_Remove 1
b_1:
CoreCall_Pull
CoreCall_End
IO__r400c_a:
IO__r400c_a_i:
IO__r400c_x:
IO__r400c_y:
rtl
IO__w400c_ind:
xba
sta $_Sound_NesRegs+0xc
IO_w40xx_Return
IO__w400c_a_i:
sta $_Sound_NesRegs+0xc
rtl
IO__w400c_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0xc
b_1:
CoreCall_End
IO__w400c_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0xc
b_1:
CoreCall_End
IO__w400c_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0xc
b_1:
CoreCall_End
IO__r400d_a:
IO__r400d_a_i:
IO__r400d_x:
IO__r400d_y:
rtl
IO__w400d_ind:
xba
sta $_Sound_NesRegs+0xd
IO_w40xx_Return
IO__w400d_a_i:
sta $_Sound_NesRegs+0xd
rtl
IO__w400d_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0xd
b_1:
CoreCall_End
IO__w400d_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0xd
b_1:
CoreCall_End
IO__w400d_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0xd
b_1:
CoreCall_End
IO__r400e_a:
IO__r400e_a_i:
IO__r400e_x:
IO__r400e_y:
rtl
IO__w400e_ind:
xba
sta $_Sound_NesRegs+0xe
IO_w40xx_Return
IO__w400e_a_i:
sta $_Sound_NesRegs+0xe
rtl
IO__w400e_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0xe
b_1:
CoreCall_End
IO__w400e_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0xe
b_1:
CoreCall_End
IO__w400e_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0xe
b_1:
CoreCall_End
IO__r400f_a:
IO__r400f_a_i:
IO__r400f_x:
IO__r400f_y:
rtl
.macro IO__w400f_Mac
// Update length
lda $=Sound__EmulateLengthCounter_length_d3_mixed,x
sta $_Sound_noise_length
// Enable noise
lda #0x08
tsb $_Sound_NesRegs+0x15
tsb $_Sound_ExtraControl
.endm
IO__w400f_ind:
xba
sta $_Sound_NesRegs+0xf
tax
IO__w400f_Mac
txa
IO_w40xx_Return
IO__w400f_a_i:
sta $_Sound_NesRegs+0xf
php
phx
tax
IO__w400f_Mac
txa
plx
plp
rtl
IO__w400f_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0xf
b_1:
CoreCall_UseA8
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
IO__w400f_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w400f_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0xf
b_1:
CoreCall_UseA8
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tyx
IO__w400f_Mac
b_1:
CoreCall_Pull
CoreCall_End
IO__w400f_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0xf
b_1:
CoreCall_UseX
CoreCall_UseN
CoreCall_UseZ
CoreCall_Push
CoreCall_CopyUpTo +b_1
tax
IO__w400f_Mac
txa // Removed when A is unused
b_1:
CoreCall_IfNotFreeA +b_1
CoreCall_Remove 1
b_1:
CoreCall_Pull
CoreCall_End
IO__r4010_a:
IO__r4010_a_i:
IO__r4010_x:
IO__r4010_y:
rtl
IO__w4010_ind:
xba
sta $_Sound_NesRegs+0x10
IO_w40xx_Return
IO__w4010_a_i:
sta $_Sound_NesRegs+0x10
rtl
IO__w4010_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x10
b_1:
CoreCall_End
IO__w4010_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x10
b_1:
CoreCall_End
IO__w4010_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x10
b_1:
CoreCall_End
IO__r4011_a:
IO__r4011_a_i:
IO__r4011_x:
IO__r4011_y:
rtl
IO__w4011_ind:
xba
sta $_Sound_NesRegs+0x11
IO_w40xx_Return
IO__w4011_a_i:
sta $_Sound_NesRegs+0x11
rtl
IO__w4011_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x11
b_1:
CoreCall_End
IO__w4011_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x11
b_1:
CoreCall_End
IO__w4011_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x11
b_1:
CoreCall_End
IO__r4012_a:
IO__r4012_a_i:
IO__r4012_x:
IO__r4012_y:
rtl
IO__w4012_ind:
xba
sta $_Sound_NesRegs+0x12
IO_w40xx_Return
IO__w4012_a_i:
sta $_Sound_NesRegs+0x12
rtl
IO__w4012_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x12
b_1:
CoreCall_End
IO__w4012_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x12
b_1:
CoreCall_End
IO__w4012_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x12
b_1:
CoreCall_End
IO__r4013_a:
IO__r4013_a_i:
IO__r4013_x:
IO__r4013_y:
rtl
IO__w4013_ind:
xba
sta $_Sound_NesRegs+0x13
IO_w40xx_Return
IO__w4013_a_i:
sta $_Sound_NesRegs+0x13
rtl
IO__w4013_a:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sta $_Sound_NesRegs+0x13
b_1:
CoreCall_End
IO__w4013_x:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
stx $_Sound_NesRegs+0x13
b_1:
CoreCall_End
IO__w4013_y:
CoreCall_Begin
CoreCall_CopyUpTo +b_1
sty $_Sound_NesRegs+0x13
b_1:
CoreCall_End
IO__r4015_a:
IO__r4015_a_i:
IO__r4015_x:
IO__r4015_y:
php
xba
lda $_Sound_NesRegs+0x15
and #0x1f
sta $_IO_Temp
xba
plp
rtl
IO__w4015_ind:
plx
xba
sta $_IO_Temp
bra $+IO__w4015_in2
IO__w4015_x:
stx $_IO_Temp
bra $+IO__w4015_in
IO__w4015_y:
sty $_IO_Temp
bra $+IO__w4015_in
IO__w4015_a:
IO__w4015_a_i:
sta $_IO_Temp
//bra $+IO__w4015_in
IO__w4015_in:
php
xba
lda $_IO_Temp
IO__w4015_in2:
eor #0xff
and #0x1f
trb $_Sound_NesRegs+0x15
trb $_Sound_ExtraControl
lsr $_IO_Temp
bcs $+b_1
// Channel 0
//lda #0x20
//tsb $_Sound_NesRegs+0x0
stz $_Sound_NesRegs+0x3
stz $_Sound_square0_length
b_1:
lsr $_IO_Temp
bcs $+b_1
// Channel 1
//lda #0x20
//tsb $_Sound_NesRegs+0x4
stz $_Sound_NesRegs+0x7
stz $_Sound_square1_length
b_1:
lsr $_IO_Temp
bcs $+b_1
// Channel 2
//stz $_Sound_NesRegs+0x8
stz $_Sound_triangle_length
b_1:
lsr $_IO_Temp
bcs $+b_1
// Channel 3
stz $_Sound_NesRegs+0xc
stz $_Sound_noise_length
b_1:
xba
plp
rtl
// ---------------------------------------------------------------------------
// Input registers
IO__r4016_a:
IO__r4016_a_i:
xba
lda $0x4016
sta $_IO_Temp
xba
rtl
IO__r4016_a_x:
lda $0x4016,x
rtl
IO__r4016_a_y:
lda $0x4016,y
rtl
IO__w4016_x:
stx $0x4016
rtl
IO__w4016_y:
sty $0x4016
rtl
IO__w4016_a:
IO__w4016_a_i:
sta $0x4016
rtl
IO__r4017_a:
IO__r4017_a_i:
xba
lda $0x4017
sta $_IO_Temp
xba
rtl
IO__r4017_a_x:
lda $0x4017,x
rtl
IO__r4017_a_y:
lda $0x4017,y
rtl
IO__w4017_x:
stx $0x4017
rtl
IO__w4017_y:
sty $0x4017
rtl
IO__w4017_a:
IO__w4017_a_i:
sta $0x4017
rtl
| 18.482148 | 212 | 0.725856 |
cf03789982b96e3aa99247d16daa78be57684957 | 619 | asm | Assembly | oeis/153/A153309.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/153/A153309.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/153/A153309.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A153309: Numbers k such that 3*k + 1 is not prime.
; Submitted by Jamie Morken(s2)
; 0,1,3,5,7,8,9,11,13,15,16,17,18,19,21,23,25,27,28,29,30,31,33,35,37,38,39,40,41,43,44,45,47,48,49,51,53,55,56,57,58,59,61,62,63,65,67,68,69,71,72,73,75,77,78,79,81,82,83,84,85,86,87,88,89,91,93,95,96,97,98,99,100,101,103,105,106,107,108,109,111,113,114,115,117,118,119,120,121,123,125,127,128,129,130,131,133,134,135,137
mov $2,$0
add $2,1
lpb $2
sub $2,1
mov $3,$1
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
lpb $3
add $1,3
trn $3,9
lpe
add $1,3
lpe
sub $1,3
mov $0,$1
div $0,3
| 30.95 | 322 | 0.646204 |
a1e16975c53883128e3e90747703beeb3a3f49f1 | 6,920 | asm | Assembly | src/shaders/h264/mc/intra_Pred_Chroma.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | src/shaders/h264/mc/intra_Pred_Chroma.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | src/shaders/h264/mc/intra_Pred_Chroma.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | /*
* Intra predict 8x8 chroma block
* Copyright © <2010>, Intel Corporation.
*
* This program is licensed under the terms and conditions of the
* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
* http://www.opensource.org/licenses/eclipse-1.0.php.
*
*/
#if !defined(__INTRA_PRED_CHROMA__) // Make sure this is only included once
#define __INTRA_PRED_CHROMA__
// Module name: intra_Pred_Chroma.asm
//
// Intra predict 8x8 chroma block
//
shr (1) PINTRAPRED_UV<1>:w REG_INTRA_CHROMA_PRED_MODE<0;1,0>:ub INTRA_CHROMA_PRED_MODE_SHIFT:w // Bits 1:0 = intra chroma pred mode
// WA for "jmpi" restriction
mov (1) REG_INTRA_TEMP_1<1>:d r[PINTRAPRED_UV, INTRA_CHROMA_OFFSET]:b
jmpi (1) REG_INTRA_TEMP_1<0;1,0>:d
// Mode 0
INTRA_CHROMA_DC:
and.nz.f0.0 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_AVAIL_FLAG:ud // Top macroblock available for intra prediction?
// Calculate DC values for sub-block 0 and 3
//
// Rearrange reference samples for unified DC prediction code
// Need to check INTRA_PRED_LEFT_TH_AVAIL_FLAG for blk0 and INTRA_PRED_LEFT_BH_AVAIL_FLAG for blk3
//
(-f0.0.any8h) mov (8) INTRA_REF_TOP_W(0)<1> 0x8080:uw // Up not available
and.nz.f0.1 (4) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG:ud
(-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0)<2> INTRA_REF_TOP_W(0)REGION(4,1) // Left top half macroblock not available for intra prediction
and.nz.f0.1 (4) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_BH_AVAIL_FLAG:ud
(-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0,8)<2> INTRA_REF_TOP_W(0,4)REGION(4,1) // Left bottom half macroblock not available for intra prediction
(-f0.0.any8h) mov (8) INTRA_REF_TOP_W(0)<1> INTRA_REF_LEFT_W(0)REGION(8,2) // Up not available
// Calculate DC prediction
//
add (16) PRED_UVW(0)<1> INTRA_REF_TOP(0)REGION(16,1) INTRA_REF_LEFT_UV(0)<4;2,1> // Sum of top and left reference
add (8) PRED_UVW(0)<1> PRED_UVW(0)<4;2,1> PRED_UVW(0,2)<4;2,1> // Sum of first half (blk #0) and second half (blk #3)
add (8) PRED_UVW(9)<1> PRED_UVW(0)<0;2,1> PRED_UVW(0,2)<0;2,1> // Sum of blk #0
add (8) PRED_UVW(11,8)<1> PRED_UVW(0,4)<0;2,1> PRED_UVW(0,6)<0;2,1> // Sum of blk #3
// Calculate DC values for sub-block 1 and 2
//
// Rearrange reference samples for unified DC prediction code
//
// Blk #2
(-f0.0.any4h) mov (4) INTRA_REF_TOP_W(0)<1> 0x8080:uw
(f0.1.any4h) mov (4) INTRA_REF_TOP_W(0)<1> INTRA_REF_LEFT_W(0,8)REGION(4,2) // Always use available left reference
(-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0,8)<2> INTRA_REF_TOP_W(0)REGION(4,1)
// Blk #1
and.nz.f0.1 (4) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG:ud
(-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0)<2> 0x8080:uw
(f0.0.any4h) mov (4) INTRA_REF_LEFT_W(0)<2> INTRA_REF_TOP_W(0,4)REGION(4,1) // Always use available top reference
(-f0.0.any4h) mov (4) INTRA_REF_TOP_W(0,4)<1> INTRA_REF_LEFT_W(0)REGION(4,2)
// Calculate DC prediction
//
add (8) PRED_UVW(0)<1> INTRA_REF_TOP(0)REGION(8,1) INTRA_REF_LEFT_UV(0,16)<4;2,1> // Sum of top and left reference for blk #2
add (8) PRED_UVW(0,8)<1> INTRA_REF_LEFT_UV(0)<4;2,1> INTRA_REF_TOP(0,8)REGION(8,1) // Sum of top and left reference for blk #1
add (8) PRED_UVW(0)<1> PRED_UVW(0)<4;2,1> PRED_UVW(0,2)<4;2,1> // Sum of first half (blk #2) and second half (blk #1)
add (8) PRED_UVW(9,8)<1> PRED_UVW(0,4)<0;2,1> PRED_UVW(0,6)<0;2,1> // Sum of blk #1
add (8) PRED_UVW(11)<1> PRED_UVW(0)<0;2,1> PRED_UVW(0,2)<0;2,1> // Sum of blk #2
// Now, PRED_UVW(9) holds sums for blks #0 and #1 and PRED_UVW(11) holds sums for blks #2 and #3
//
add (32) acc0<1>:w PRED_UVW(9)REGION(16,1) 4:w {Compr} // Add rounder
$for(0; <4; 2) {
shr (32) PRED_UVW(%1)<1> acc0:w 3:w {Compr}
}
add (32) acc0<1>:w PRED_UVW(11)REGION(16,1) 4:w {Compr} // Add rounder
$for(4; <8; 2) {
shr (32) PRED_UVW(%1)<1> acc0:w 3:w {Compr}
}
jmpi (1) End_of_intra_Pred_Chroma
// Mode 1
INTRA_CHROMA_HORIZONTAL:
mov (1) PREF_LEFT_UD<1>:ud INTRA_REF_LEFT_ID*GRFWIB*0x00010001+0x00040000:ud // Set address registers for instruction compression
$for(0,0; <8; 2,8) {
mov (32) PRED_UVW(%1)<1> r[PREF_LEFT,%2+2]<0;2,1>:ub {Compr} // Actual left column reference data start at offset 2
}
jmpi (1) End_of_intra_Pred_Chroma
// Mode 2
INTRA_CHROMA_VERTICAL:
$for(0; <8; 2) {
mov (32) PRED_UVW(%1)<1> INTRA_REF_TOP(0) {Compr}
}
jmpi (1) End_of_intra_Pred_Chroma
// Mode 3
INTRA_Chroma_PLANE:
// Refer to H.264/AVC spec Section 8.3.4.4
#undef C
#define A REG_INTRA_TEMP_2.0 // All are WORD type
#define B REG_INTRA_TEMP_3.0 // B[U] & B[V]
#define C REG_INTRA_TEMP_3.2 // C[U] & C[V]
#define YP REG_INTRA_TEMP_0 // Store intermediate results of c*(y-3). Make sure it's an even GRF
#define YP1 REG_INTRA_TEMP_1 // Store intermediate results of c*(y-3). Make sure it's an odd GRF
#define XP REG_INTRA_TEMP_5 // Store intermediate results of a+b*(x-3)+16. Make sure it's an odd GRF
// First Calculate constants H and V
// H1 = sum((x'+1)*p[4+x',-1]), x'=0,1,2,3
// H2 = sum((-x'-1)*p[2-x',-1]), x'=3,2,1,0
// H = H1 + H2
// The same calculation holds for V
//
mul (8) H1(0)<1> INTRA_REF_TOP(0,8)REGION(8,1) 0x44332211:v
mul (8) H2(0)<1> INTRA_REF_TOP(0,-2)REGION(8,1) 0xFFEEDDCC:v
mul (8) V1(0)<1> INTRA_REF_LEFT_UV(0,4*4)<4;2,1> 0x44332211:v
mul (8) V2(0)<1> INTRA_REF_LEFT_UV(0)<4;2,1> 0x00FFEEDD:v
mul (2) V2(0,6)<1> INTRA_REF_TOP(0,-2)REGION(2,1) -4:w // Replace 0*p[-1,3] with -4*p[-1,-1]
// Now, REG_INTRA_TEMP_0 holds [H2, H1] and REG_INTRA_TEMP_1 holds [V2, V1]
// Sum up [H2, H1] and [V2, V1] using instruction compression
// ExecSize = 16 is restricted by B-spec for instruction compression
// Actual intermediate results are in lower sub-registers after each summing step
add (16) H1(0)<1> H1(0) H2(0) {Compr} // Results in lower 8 WORDs
add (16) H1(0)<1> H1(0) H1(0,4) {Compr} // Results in lower 4 WORDs
add (16) H1(0)<1> H1(0) H1(0,2) {Compr} // Results in lower 2 WORDs
// Calculate a, b, c and further derivations
mov (16) acc0<1>:w 32:w
mac (4) acc0<1>:w H1(0)<16;2,1> 34:w
shr (4) B<1>:w acc0:w 6:w // Done b,c
mov (16) acc0<1>:w 16:w
mac (16) acc0<1>:w INTRA_REF_TOP(0,7*2)<0;2,1> 16:w
mac (16) A<1>:w INTRA_REF_LEFT_UV(0,7*4)<0;2,1> 16:w // A = a+16
mac (16) XP<1>:w B<0;2,1>:w XY_3<1;2,0>:b // XP = A+b*(x-3)
mul (8) YP<1>:w C<0;2,1>:w XY_3<2;2,0>:b // YP = c*(y-3), Even portion
mul (8) YP1<1>:w C<0;2,1>:w XY_3_1<2;2,0>:b // YP = c*(y-3), Odd portion
// Finally the intra_Chroma plane prediction
$for(0; <8; 2) {
add (32) acc0<1>:w XP<16;16,1>:w YP.%1<0;2,1>:w {Compr}
shr.sat (32) PRED_UV(%1)<2> acc0<16;16,1>:w 5:w {Compr}
}
End_of_intra_Pred_Chroma:
// End of intra_Pred_Chroma
#endif // !defined(__INTRA_PRED_CHROMA__)
| 44.358974 | 147 | 0.663006 |
f9720dec1272d1f5bd46825cbe669c0cc3546c5a | 25,894 | asm | Assembly | dimension/cell/lib/string/utf8/utf8.asm | ekscrypto/Unununium | 4b67e7c5e63cf1be2157382ffd4c1e9d12957a1f | [
"BSD-2-Clause"
] | 7 | 2019-03-04T08:53:33.000Z | 2022-01-28T19:32:12.000Z | dimension/cell/lib/string/utf8/utf8.asm | ekscrypto/Unununium | 4b67e7c5e63cf1be2157382ffd4c1e9d12957a1f | [
"BSD-2-Clause"
] | null | null | null | dimension/cell/lib/string/utf8/utf8.asm | ekscrypto/Unununium | 4b67e7c5e63cf1be2157382ffd4c1e9d12957a1f | [
"BSD-2-Clause"
] | null | null | null | ; UTF-8 and UCS-4 String Routines
; Copyright (C) 2002, Dave Poirier & Davison Avery
; Distributed under the X11 License
;
; UTF-8 and UCS-4 string routines
section .c_init
global _start
_start:
;; no initialisation required
;; do nothing
retn
section .c_info
db 0,0,1,'a'
dd str_cellname
dd str_author
dd str_copyrights
str_cellname: dd "common UCS4 & UFT8 string functions"
str_author: dd 'Dave Poirier',0x0A,'Davison Avery'
str_copyrights: dd 'Copyright 2002 by Dave Poirier & Davison Avery; distributed under the X11 license'
section .text
globalfunc utf8.strlen
;utf8.strlen:
;-----------------------------------------------------------------------------
; Return number of characters in UTF-8 string, excluding terminating Nil.
; The routine will raise the carry flag if the string is not a valid UTF-8
; string.
;
; This routine is dependant on utf8.decode_ucs4.from_utf8
;
; parameters:
;------------
; ESI = pointer to UTF-8 string
;
; returns:
;---------
; EAX = string length (including 0 length)
; CF = 0, valid UTF-8 string
; EAX = 0
; CF = 0, string is 0 length
; EAX = destroyed
; CF = 1, invalid UTF-8 (sub)string
push esi ; save register that will be modified
push ecx
mov ecx, -1 ; initialize counter
.stringcount:
inc ecx
call utf8.decode_ucs4.from_utf8
jc .done ; carry flag has been set
test eax, eax ; have we reached Nil?
jnz .stringcount
.done:
mov eax, ecx
pop ecx
pop esi
retn
;-----------------------------------------------------------------------------
globalfunc utf8.strsize
;utf8.strsize:
;-----------------------------------------------------------------------------
; Returns size in bytes of UTF-8 encoded string up until terminating Nil
; character.
;
; parameters:
;------------
; ESI = pointer to UTF-8 encoded string
;
; returns:
;---------
; EAX = size of string in bytes
;
push esi ; save registers to be modified
push ecx
xor ecx, ecx ; zero byte counter
.stringsize:
mov al, [esi]
inc ecx ; increment character counter
inc esi ; move to next char to compare
test al, al ; test for Nil terminator
jnz .stringsize
.done:
lea eax, [ecx - 1] ; move result into eax
pop ecx ; restore ecx
pop esi ; restore esi
retn
;-----------------------------------------------------------------------------
globalfunc utf8.strncmp
;utf8.strncmp:
;-----------------------------------------------------------------------------
; Compares two UTF-8 encoded strings for first n characters, or up until
; the Nil terminaters - whichever is reached first
;
; parameters:
;------------
; ESI = UTF-8 encoded string1
; EDI = UTF-8 encoded string2
; ECX = number of characters to compare from beginning of two strings
;
; returns:
;---------
; EAX = 0, CF = 0, strings are equal
; EAX = 1, CF = 0, strings are not equal
; CF = 1, one or more strings are invalid
pushad ; save registers
.strcmp:
xor eax, eax ; clear eax
dec ecx ; decrement character counter
jz .finished ;
call utf8.decode_ucs4.from_utf8
jc .invalid
mov ebx, eax ; save string1 UCS4 char
mov ebp, esi ; save incremented esi pointer for string1
mov esi, edi ; setup utf8.decode_ucs4.from_utf8 for string2
call utf8.decode_ucs4.from_utf8
jc .invalid
cmp eax, ebx ; are the two chars equal?
jnz .finished ; no not equal - zero flag set
mov edi, esi ; setup incremented string2 pointer to edi
mov esi, ebp ; setup incremented string1 pointer to esi
test eax, ebx ; have we reached terminating Nils before count is up?
jnz .strcmp
.finished:
clc ; clear the carry flag
.invalid: ; carry flag already raised
mov [esp + 28], eax
popad
retn
;-----------------------------------------------------------------------------
globalfunc utf8.strcmp
;utf8.strcmp:
;-----------------------------------------------------------------------------
; Determines if two UTF-8 encoded strings are equivalent.
;
; parameters:
;------------
; ESI = UTF-8 encoded string1
; EDI = UTF-8 encoded string2
;
; returns:
;---------
; EAX = 0, CF = 0, strings are equal
; EAX = 1, CF = 0, strings are not equal
; CF = 1, one or more strings are invalid
;
;;; use strncmp with exc=7fffffff
mov ecx, 0x7fffffff
call utf8.strncmp
retn
;-----------------------------------------------------------------------------
globalfunc utf8.strstr
;utf8.strstr:
;-----------------------------------------------------------------------------
; Locate first occurance of a substring in a UTF-8 encoded string.
;
; ** Still needs to be coded **
;-----------------------------------------------------------------------------
; Universal Multiple-Octet Coded Character Set (UCS) Routines
; Copyright (C) 2002, Dave Poirier
; Distributed under the X11 License
;
; Compliant with ISO/IEC 2022, 4873 and 10646
; See http://www.cl.cam.ac.uk/~mgk25/ucs/ISO-10646-UTF-8.html
;
; If you have any comment/question about this code, feel free to write to
; me at instinc@users.sf.net
globalfunc utf8.decode_ucs4.from_utf8
;utf8.decode_ucs4.from_utf8:
;-----------------------------------------------------------------------------
; Retrieve a UCS-4 character from a UTF-8 encoded string and move the string
; pointer fowards accordingly.
;
; UCS-4 encoded in UTF-8 can be from 1 to 6 bytes in length. The first byte
; indicates how many bytes are required in order to reconstruct the entire
; character.
;
; This function also checks for the validity of the UTF-8 data being retrieved.
; In the event that the string would be out of sync or simply invalid, it would
; raise the Carry Flag and return ESI identical to when it was received. When
; the character is decoded from a valid UTF-8 string, the Carry Flag is cleared,
; the UCS-4 placed in EAX and ESI moved foward past the end of the now decoded
; character.
;
; parameters:
;------------
; esi: pointer to utf8 string
;
; returns:
;---------
; CF = 0, valid character found
; EAX = UCS
; CF = 1, invalid character detected
; EAX = destroyed
; note: ESI is left unmodified
;
; Determine The Encoding Length
;---------------------------------------------
mov eax, [esi] ; tentatively load 4 bytes
test al, byte 0x80 ; bit 7 of 1st byte = 0?
jz short .case_1byte ; 0xxxxxxx ->> range 00-7F
test al, byte 0x40 ; bit 6 of 1st byte = 0?
jz short .case_invalid ; 10xxxxxx .. out of sync!
push ebx ; backup EBX, it will be used
test al, byte 0x20 ; bit 5 of 1st byte = 0?
jz short .case_2bytes ; 110xxxxx ->> range 80-7FF
push ecx ; backup ECX, it will be used
test al, byte 0x10 ; bit 4 of 1st byte = 0?
jz short .case_3bytes ; 1110xxxx ->> range 800-FFFF
push edx ; backup EDX, it will be used
test al, byte 0x08 ; bit 3 of 1st byte = 0?
jz near .case_4bytes ; 11110xxx ->> range 10000-1FFFFF
test al, byte 0x04 ; bit 2 of 1st byte = 0?
jz near .case_5bytes ; 111110xx ->> range 200000-3FFFFFF
test al, byte 0x02 ; bit 1 of 1st byte = 0?
jz near .case_6bytes ; 1111110x ->> range 4000000-7FFFFFFF
;
; 1111111x invalid..
;
.case_invalid_pop3: ;
pop edx ; restore EDX
.case_invalid_pop2: ;
pop ecx ; restore ECX
.case_invalid_pop1: ;
pop ebx ; restore EBX
;
.case_invalid: ;
stc ; set CF = 1 to indicate invalid input
retn ; return to caler with error
;
;
.case_1byte: ; Encoded In a Single Byte
;---------------------------------------------
and eax, byte 0x7F ; set CF to 0, zeroize extra bytes read
inc esi ; doesn't affect CF
retn ; return 00-7F range UCS-4
;
.case_2bytes: ; Encoded In 2 Bytes
;---------------------------------------------
mov ebx, eax ; move 1st byte in bl
mov al, ah ; move 2nd byte in al
and ah, byte 0xC0 ; keep highest 2bits of 2nd byte
cmp ah, byte 0x80 ; check to make sure they are 10
jnz short .case_invalid_pop1 ;
shl ebx, byte 6 ; shift 1st byte by 6bit at the right position
and eax, byte 0x3F ; keep only the meaningful bit of 2nd byte
inc esi ; move string pointer foward once (1st byte)
or eax, ebx ; or 2nd and 1st byte
inc esi ; move string pointer foward once (2nd byte)
and eax, dword 0x7FF ; set CF to 0, zeroize extra bytes read
pop ebx ; restore EBX
retn ; return 80-7FF range UCS-4
;
.case_3bytes: ; Encoded In 3 Bytes
;---------------------------------------------
mov ebx, eax ; move 3rd byte in EBX(23:16)
and eax, dword 0x00C0C000 ; keep 2highest bits of 2nd and 3rd byte
mov ecx, ebx ; move 2nd byte in ECX(15:8)
cmp eax, dword 0x00808000 ; make sure they are 10xxxxxx
mov eax, ecx ; move 1st byte in EAX(7:0)
jnz short .case_invalid_pop2 ;
shr ebx, byte 16 ; shift 3rd byte in final position
and eax, byte 0x0F ; keep low 4bits of 1st byte
shr ecx, byte 2 ; shift 2nd byte in final position
and ebx, byte 0x0000003F ; keep low 6bits of 3rd byte
shl eax, 12 ; shift 1st byte in final position
and ecx, dword 0x00000FC0 ; keep low 6bits of 2nd byte
or eax, ebx ; merge 1st and 3rd bytes
inc esi ; move string pointer foward once (1st byte)
or eax, ecx ; merge in 2nd byte, clear CF
inc esi ; move string pointer foward once (2nd byte)
pop ecx ; restore ECX
inc esi ; move string pointer foward once (3rd byte)
pop ebx ; restore EBX
retn ; return 800-FFFF range UCS-4
;
.case_4bytes: ; Encoded In 4 Bytes
;---------------------------------------------
mov ebx, eax ; move 4th byte in EBX(31:24)
and eax, dword 0xC0C0C000 ; keep highest 2bits of 2nd,3rd and 4th bytes
mov ecx, ebx ; move 3rd byte in ECX(23:16)
cmp eax, dword 0x80808000 ; make sure the pairs of bits are all 10
mov edx, ebx ; move 2nd byte in EDX(15:8)
jnz short .case_invalid_pop3 ;
xor edx, eax ; keep lowest 6bits of 4th byte
shr ecx, byte 10 ; shift 3rd byte into position
mov eax, ebx ; move 1st byte in EAX(7:0)
shr edx, byte 24 ; shift 4th byte into position
and eax, byte 0x07 ; keep lowest 3bits of 1st byte
shl ebx, byte 4 ; shift 2nd byte into position
and ecx, dword 0x00000FC0 ; keep lowest 6bits of 3rd byte
shl eax, byte 18 ; shift 1st byte into position
and ebx, dword 0x0003F000 ; keep lowest 6bits of 2nd byte
or ecx, edx ; merge in 3rd and 4th bytes
or eax, ebx ; merge in 1st and 2nd bytes
add esi, byte 4 ; move string pointer foward 4 bytes
or eax, ecx ; merge in all 4bytes
pop edx ; restore EDX
pop ecx ; restore ECX
pop ebx ; restore EBX
retn ; return 10000-1FFFFF range UCS-4
;
.case_5bytes: ; Encoded In 5 Bytes
;---------------------------------------------
mov ebx, eax ; move 4th byte in EBX(31:24)
and eax, dword 0xC0C0C000 ; keep highest 2bits of 2nd,3rd and 4th bytes
mov ecx, ebx ; move 3rd byte in ECX(23:16)
cmp eax, dword 0x80808000 ; make sure the pairs of bits are all 10
mov edx, ebx ; move 2nd byte in EDX(15:8)
.case_invalid_relay3: ;
jnz near .case_invalid_pop3 ;
xor edx, eax ; keep lowest 6bits of 4th byte
shr ecx, byte 10 ; shift 3rd byte into temporary position
mov eax, ebx ; move 1st byte in EAX(7:0)
shr edx, byte 24 ; shift 4th byte into temporary position
and eax, byte 0x03 ; keep lowest 2bits of 1st byte
shl ebx, byte 4 ; shift 2nd byte into temporary position
and ecx, dword 0x00000FC0 ; keep lowest 6bits of 3rd byte
shl eax, byte 18 ; shift 1st byte into temporary position
and ebx, dword 0x0003F000 ; keep lowest 6bits of 2nd byte
or ecx, edx ; merge in 3rd and 4th bytes
or eax, ebx ; merge in 1st and 2nd bytes
mov dl, byte [esi + 4] ; read in the 5th byte
or ecx, eax ; merge in all first 4 bytes
mov al, dl ; copy 5th byte for validity check
and al, 0xC0 ; keep highest 2 bits of 5th byte
cmp al, 0x80 ; make sure they are 10
jnz short .case_invalid_relay3;
xor dl, al ; keep lowest 6bits of 5th byte
shl ecx, byte 6 ; shift byte 1-4 into final position
mov eax, edx ; move 5th byte into final position
add esi, byte 5 ; move string pointer foward 5 bytes
or eax, ecx ; merge in bytes 1-4 with 5th byte
pop edx ; restore EDX
pop ecx ; restore ECX
pop ebx ; restore EBX
retn ; return 200000-3FFFFFF range UCS-4
;
.case_6bytes: ; Encoded In 6 Bytes
;---------------------------------------------
mov ebx, eax ; move 4th byte in EBX(31:24)
and eax, dword 0xC0C0C000 ; keep highest 2bits of 2nd,3rd and 4th bytes
mov ecx, ebx ; move 3rd byte in ECX(23:16)
cmp eax, dword 0x80808000 ; make sure the pairs of bits are all 10
mov edx, ebx ; move 2nd byte in EDX(15:8)
.case_invalid_relay3_2:
jnz short .case_invalid_relay3;
xor edx, eax ; keep lowest 6bits of 4th byte
shr ecx, byte 10 ; shift 3rd byte into temporary position
mov eax, ebx ; move 1st byte in EAX(7:0)
shr edx, byte 24 ; shift 4th byte into temporary position
and eax, byte 0x01 ; keep lowest bit of 1st byte
shl ebx, byte 4 ; shift 2nd byte into temporary position
and ecx, dword 0x00000FC0 ; keep lowest 6bits of 3rd byte
shl eax, byte 18 ; shift 1st byte into temporary position
and ebx, dword 0x0003F000 ; keep lowest 6bits of 2nd byte
or ecx, edx ; merge in 3rd and 4th bytes
or eax, ebx ; merge in 1st and 2nd bytes
mov edx, dword [esi + 4] ; read in the 5th and 6th bytes
or ecx, eax ; merge in all first 4 bytes
mov eax, edx ; copy bytes 5-6 for validity check
and eax, dword 0x0000C0C0 ; keep highest 2 bits of bytes 5-6
xor edx, eax ; keep lowest 6bits of 5th byte
cmp eax, dword 0x00008080 ; make sure they are 10
mov al, dh ; move 6th byte into EAX(7:0)
jnz short .case_invalid_relay3_2;
and edx, byte 0x3F ; keep lowest 6bits of 6th byte
shl ecx, byte 12 ; shift byte 1-4 into final position
shl edx, byte 6 ; shift 5th byte into final position
and eax, byte 0x3F ; make sure only the 6th byte is present in EBX
or ecx, edx ; merge 5th byte with bytes 1-4
add esi, byte 6 ; move string pointer foward 6 bytes
or eax, ecx ; merge in bytes 1-5 with 6th byte
pop edx ; restore EDX
pop ecx ; restore ECX
pop ebx ; restore EBX
retn ; return 4000000-7FFFFFFF range UCS-4
;-----------------------------------------------------------------------------
globalfunc utf8.encode_ucs4.to_utf8
;utf8.encode_ucs4.to_utf8:
;-----------------------------------------------------------------------------
; Encodes a UCS-4 character into a valid UTF-8 string. Since an encoded
; UCS-4 can take from 1 to 6 bytes, it is required to at least have 6 bytes
; free in the destination string buffer.
;
; UCS-4 with bit 31 set will be flagged as invalid, causing the routine to
; return with the Carry Flag set. When completed successfully, this routine
; return with the Carry Flag cleared.
;
; parameters:
;------------
; EAX = UCS-4
; EDI = pointer to UTF-8 buffer (must have at least 6 bytes free)
;
; returns:
;---------
; CF = 0, encoded properly
; EAX = destroyed
; CF = 1, invalid UCS-4 (bit 31 is not 0)
; EAX = unmodified
;
; Determine The Encoding Length
;---------------------------------------------
cmp eax, byte 0x7F ; range 00-7F ?
jbe .case_1byte ; if so, use 1 byte
push ebx ; backup original EBX
cmp eax, dword 0x000007FF ; range 80-7FF ?
mov ebx, eax ; load EBX with UCS-4 to encode
jbe .case_2bytes ; if within range, use 2 bytes
push ecx ; backup original ECX
cmp eax, dword 0x0000FFFF ; range 800-FFFF ?
mov ecx, eax ; load ECX with UCS-4 to encode
jbe .case_3bytes ; if within range, use 3 bytes
push edx ; backup original EDX
cmp eax, dword 0x001FFFFF ; range 10000-1FFFFF ?
mov edx, eax ; load EDX with UCS-4 to encode
jbe .case_4bytes ; if within range, use 4 bytes
cmp eax, dword 0x03FFFFFF ; range 200000-3FFFFFF ?
jbe near .case_5bytes ; if so, use 5 bytes
cmp eax, dword 0x7FFFFFFF ; range 4000000-7FFFFFFF ?
jbe near .case_6bytes ; if so, use 6 bytes
;
; bit 31 is set, unable to encode in UTF-8
pop edx ; restore original EDX
pop ecx ; restore original ECX
pop ebx ; restore original EBX
;
.invalid: ;
stc ; set the Carry Flag
retn ; return to the caller
;
.case_1byte: ; Encoded In 1 Byte
;---------------------------------------------
mov [edi], byte al ; store the value
clc ; clear the carry flag
inc edi ; move the string pointer foward (1 byte)
retn ; return range 00 - 7F
;
.case_2bytes: ; Encoded In 2 Bytes
;---------------------------------------------
shl ebx, 8 ; Byte2: Move UCS-4(5:0) into EBX(13:8)
shr eax, 6 ; Byte1: Move UCS-4(10:6) into EAX(4:0)
and ebx, dword 0x00003F00 ; Byte2: mask all bits except UCS-4(5:0)
and eax, byte 0x1F ; Byte1: mask all bits except UCS-4(10:6)
lea ebx, [eax + ebx + 0x000080C0]; merge bytes 1 and 2, set encoding bits
mov [edi], ebx ; store the encoded bytes
add edi, byte 2 ; move string pointer forward 2 bytes, clear CF
pop ebx ; restore original EBX
retn ; return range C2 80 - CF BF
;
.case_3bytes: ; Encoded In 3 Bytes
;---------------------------------------------
shr eax, 12 ; Byte1: Move UCS-4(15:12) into EAX(3:0)
shl ebx, 2 ; Byte2: Move UCS-4(11:6) into EBX(13:8)
shl ecx, 16 ; Byte3: Move UCS-4(5:0) into ECX(21:16)
and eax, byte 0x0F ; Byte1: mask all bits except UCS-4(15:12)
and ebx, dword 0x00003F00 ; Byte2: mask all bits except UCS-4(11:6)
and ecx, dword 0x003F0000 ; Byte3: mask all bits except UCS-4(5:0)
lea eax, [eax + ebx + 0x008080E0]; merge bytes 1-2, set the encoding bits
or eax, ecx ; merge byte 3 with bytes 1-2
mov [edi], eax ; store the encoded bytes
add edi, byte 3 ; move string pointer foward 3 bytes, clear CF
pop ecx ; restore original ECX
pop ebx ; restore original EBX
retn ; return range E0 A0 80 - EF BF BF
;
.case_4bytes: ; Encoded In 4 Bytes
;---------------------------------------------
shr eax, 18 ; Byte1: Move UCS-4(20:18) into EAX(2:0)
shr ebx, 4 ; Byte2: Move UCS-4(17:12) into EBX(13:8)
shl ecx, 10 ; Byte3: Move UCS-4(11:6) into ECX(21:16)
shl edx, 24 ; Byte4: Move UCS-4(5:0) into EDX(29:24)
and eax, byte 0x07 ; Byte1: mask all bits except UCS-4(20:18)
and edx, dword 0x3F000000 ; byte4: mask all bits except UCS-4(5:0)
and ecx, dword 0x003F0000 ; Byte3: mask all bits except UCS-4(11:6)
lea eax, [edx + eax + 0x808080F0]; merge bytes 1 and 4, set encoding bits
and ebx, dword 0x00003F00 ; Byte2: mask all bits except UCS-4(17:12)
or eax, ecx ; merge byte 3 with 1 and 4
pop edx ; restore original EDX
or eax, ebx ; merge in byte 2 in final encoding
pop ecx ; restore original ECX
mov [edi], dword eax ; store the encoded bytes
pop ebx ; restore original EBX
add edi, byte 4 ; move string pointer forward, clear CF
retn ; return range F0 90 80 80 - F7 BF BF BF
;
.case_5bytes: ; Encoded In 5 Bytes
;---------------------------------------------
push eax ; backup UCS-4(5:0)
shr eax, 24 ; Byte1: Move UCS-4(25:24) into EAX(1:0)
shr ebx, 10 ; Byte2: Move UCS-4(23:18) into EBX(13:8)
shl ecx, 4 ; Byte3: Move UCS-4(17:12) into ECX(21:16)
shl edx, 18 ; Byte4: Move UCS-4(11:6) into EDX(29:24)
and eax, byte 0x03 ; Byte1: mask all bits except UCS-4(25:24)
and ebx, dword 0x00003F00 ; Byte2: mask all bits except UCS-4(23:18)
and ecx, dword 0x003F0000 ; Byte3: mask all bits except UCS-4(17:12)
lea eax, [eax + ebx + 0x808080F8]; merge bytes 1-2, set encoding bits
and edx, dword 0x3F000000 ; Byte4: mask all bits except UCS-4(11:6)
or ecx, eax ; merge byte 1-2 with byte 3
pop eax ; restore UCS-4(5:0) bits
or ecx, edx ; merge byte 4 with bytes 1-3
mov [edi], ecx ; store encoded bytes 1-4
and eax, byte 0x3F ; Byte5: mask all bits except UCS-4(5:0)
or al, byte 0x80 ; set encoding bits
mov [edi+4], byte al ; store encoded byte 5
pop edx ; restore original EDX
pop ecx ; restore original ECX
add edi, byte 5 ; move string pointer forward, clear CF
pop ebx ; restore original EBX
retn ; return range F8 88 80 80 80 - FB BF BF BF BF
;
.case_6bytes: ; Encoded In 6 Bytes
;---------------------------------------------
push eax ; backup UCS-4(11:0)
shr eax, 30 ; Byte1: Move UCS-4(30:30) into EAX(0:0)
shr ebx, 16 ; Byte2: Move UCS-4(29:24) into EBX(13:8)
shr ecx, 2 ; Byte3: Move UCS-4(23:18) into ECX(21:16)
shl edx, 12 ; Byte4: Move UCS-4(17:12) into EDX(29:24)
and eax, byte 0x01 ; Byte1: mask all bits except UCS-4(30:30)
and ebx, dword 0x00003F00 ; Byte2: mask all bits except UCS-4(29:24)
and ecx, dword 0x003F0000 ; Byte3: mask all bits except UCS-4(23:18)
lea eax, [eax + ebx + 0x808080FC]; merge bytes 1 and 2, set encoding bits
and edx, dword 0x3F000000 ; Byte4: mask all bits except UCS-4(17:12)
or ecx, eax ; merge byte 1-2 with byte 3
pop eax ; restore UCS-4(11:0)
or ecx, edx ; merge byte 4 with bytes 1-3
mov ebx, eax ; copy UCS-4(11:0)
mov [edi], ecx ; store encoded bytes 1-4
shr ebx, byte 6 ; Byte5: Move UCS-4(11:6) into EBX(5:0)
pop edx ; restore original EDX
and ebx, byte 0x3F ; Byte5: mask all bits except UCS-4(5:0)
and eax, byte 0x3F ; Byte6: mask all bits except UCS
or bl, byte 0x80 ; Byte5: set encoding bits
or al, byte 0x80 ; Byte6: set encoding bits
mov [edi+4], byte bl ; store encoded byte 5
mov [edi+5], byte al ; store encoded byte 6
pop ecx ; restore original ECX
add edi, byte 6 ; move string pointer forward, clear CF
pop ebx ; restore original EBX
retn ; return range FC84808080-FDBFBFBFBFBF
;-----------------------------------------------------------------------------
globalfunc utf8.match_to_utf8_pattern
;utf8.match_to_utf8_pattern:
;-----------------------------------------------------------------------------
; Compare if a given string matches the given pattern. The pattern may contain
; the following wildcards:
; * match any number of chars
; ? match any single character
;
; This routine is dependant on utf8.decode_ucs4.from_utf8
;
; parameters:
;------------
; EDI = pointer to UTF-8 string to match
; EDX = pointer to UTF-8 pattern
;
; returns:
;---------
; ECX = 0, pattern matched
; ECX = 1, pattern not matched / invalid UTF-8 string/pattern
;
;-----------------------------------------------------------------------------
xor ecx, ecx ; set return code to failed by default
pushad ; backup all regs
mov ebp, esp ; mark entry TOS
;
.matching: ; check for wildcard '*'
mov esi, edx ;-----------------------
call utf8.decode_ucs4.from_utf8 ; get a single UCS-4 character
jc short .fail ; in case of an invalid UTF-8 pattern
cmp eax, byte '*' ; check if UCS-4 == '*'
mov ebx, eax ; move UCS-4 from pattern into EBX
jnz short .single_comp ; if not '*', match a single UCS-4
;
; catch multiple successive '*'
.catch_wc: ;------------------------------
call utf8.decode_ucs4.from_utf8 ; retrieve another UCS-4
jc short .fail ; in case of an invalid UTF-8 pattern
cmp eax, byte '*' ; check if UCS-4 == '*'
jz short .catch_wc ; yes, save new pattern ptr
mov edx, esi ; save pattern pointer
;
; check if pattern end with '*'
;------------------------------
test eax, eax ; UCS-4 == 0 ?
mov esi, edi ; load UTF-8 string pointer in ESI
jz short .success ; yip, we got a match
;
; find first matching char after '*'
;-----------------------------------
mov ebx, eax ; move UCS-4 from pattern into EBX
.match_wc_all: ;
call utf8.decode_ucs4.from_utf8 ; get a UCS-4 from UTF-8 string
jc short .fail ; check for invalid UTF-8 string
test eax, eax ; end of string to match? (UCS-4==0)
jz short .fail ; if so we fail
;
cmp ebx, byte '?' ; check for '?' right after '*'
jz short .wc_all_matched ; if so, match without checking
cmp ebx, eax ; UCS-4 of pattern == UCS-4 of string?
jnz .match_wc_all ; if not, continue searching
;
.wc_all_matched: ;
mov edi, esi ; save UTF-8 string pointer
push esi ; register UTF-8 string ptr of last '*'
push edx ; register UTF-8 pattern ptr
push ebx ; register pattern UCS-4
jmp short .matching ; continue matching
;
; Single UCS-4 to UCS-4 match
.single_comp: ;----------------------------
mov edx, esi ; save pattern pointer
mov esi, edi ; load UTF-8 string pointer
call utf8.decode_ucs4.from_utf8 ; get UCS-4 of string to match
jc short .fail ; in case of an invalid UTF-8 string
mov edi, esi ; save string pointer
;
test eax, eax ; string UCS-4 == 0 ?
jz short .test_end_of_pattern ; if so, check if pattern is also ended
;
cmp ebx, byte '?' ; pattern is wildcard '?' ?
jz short .matching ; if so, automatically match
cmp ebx, eax ; make sure pattern UCS-4 match
jz short .matching ; if so, continue checking
;
; Wildcard Fallback
;------------------
cmp ebp, esp ; any '*' wildcard registered on stack?
jz short .fail ; if not, match failed
;
; get back to previous '*' found
pop ebx ; restore pattern UCS-4
pop edx ; restore UTF-8 pattern pointer
pop esi ; restore UTF-8 string pointer
jmp short .match_wc_all ; continue wildcard match
;
; Test End Of Pattern
.test_end_of_pattern: ;--------------------
test ebx, ebx ; is pattern UCS-4 == 0 ?
jnz short .fail ; if not, fail
;
; Success, make ECX = 1
.success: ;----------------------
inc byte [ebp + 24] ; increment ECX on stack
;
; Failure or Success: common ending
.fail: ;----------------------------------
mov esp, ebp ; restore original stack pointer
popad ; restore all registers
retn ; return result in ECX
;-----------------------------------------------------------------------------
| 37.582003 | 102 | 0.612574 |
32d854ea7b70f45e0d75a4a5b3857cb8a7877034 | 514 | asm | Assembly | libsrc/gfx/wide/w_xordrawb.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 38 | 2021-06-18T12:56:15.000Z | 2022-03-12T20:38:40.000Z | libsrc/gfx/wide/w_xordrawb.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 2 | 2021-06-20T16:28:12.000Z | 2021-11-17T21:33:56.000Z | libsrc/gfx/wide/w_xordrawb.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 6 | 2021-06-18T18:18:36.000Z | 2021-12-22T08:01:32.000Z | ;
; XorDrawbox
;
; Generic high resolution version
;
;
; $Id: w_xordrawb.asm $
;
IF !__CPU_INTEL__
SECTION code_graphics
PUBLIC xordrawb
PUBLIC _xordrawb
EXTERN xordrawb_callee
EXTERN ASMDISP_XORDRAWB_CALLEE
.xordrawb
._xordrawb
pop af
pop de
pop hl
exx ; w_plotpixel and swapgfxbk must not use the alternate registers, no problem with w_line_r
pop de
pop hl
push hl
push de
exx
push hl
push de
push af ; ret addr
jp xordrawb_callee + ASMDISP_XORDRAWB_CALLEE
ENDIF
| 12.536585 | 98 | 0.723735 |
e48151e4d371ce7c67a46b6854f215f6a5fa5f55 | 2,145 | asm | Assembly | src/shaders/h264/mc/loadRef_Y_16x9.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | src/shaders/h264/mc/loadRef_Y_16x9.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | src/shaders/h264/mc/loadRef_Y_16x9.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | /*
* Load reference 16x9 area for luma 4x4 MC
* Copyright © <2010>, Intel Corporation.
*
* This program is licensed under the terms and conditions of the
* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
* http://www.opensource.org/licenses/eclipse-1.0.php.
*
*/
// Kernel name: LoadRef_Y_16x9.asm
//
// Load reference 16x9 area for luma 4x4 MC
//#if !defined(__LOADREF_Y_16x9__) // Make sure this is only included once
//#define __LOADREF_Y_16x9__
#if 1
// Compute integer and fractional components of MV
and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w //{NoDDClr}
asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w //{NoDDChk}
// Check whether MVY is integer
or.z.f0.1 (8) null:w gMVY_FRAC<0;1,0>:w 0:w
// Set message descriptor
(f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(2):ud
(-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(5):ud
// Compute top-left corner position to be loaded
// TODO: sel
(-f0.1) add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d //{NoDDClr}
(-f0.1) mov (1) gMSGSRC.2:ud 0x00080008:ud //{NoDDChk}
(f0.1) add (1) gMSGSRC.0<1>:d gMVX_INT<0;1,0>:w -0x02:d //{NoDDClr}
(f0.1) mov (1) gMSGSRC.1<1>:d gMVY_INT<0;1,0>:w //{NoDDChk,NoDDClr}
(f0.1) mov (1) gMSGSRC.2:ud 0x00030008:ud //{NoDDChk}
// Read 16x9 pixels
send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
#else
// Compute integer and fractional components of MV
and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w {NoDDClr} //
asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w {NoDDChk} //
// Set message descriptor
add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(5):ud
// Compute top-left corner position to be loaded
add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d {NoDDClr} //
mov (1) gMSGSRC.2:ud 0x00080008:ud {NoDDChk} //
// Read 16x9 pixels
send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
#endif
//#endif // !defined(__LOADREF_Y_16x9__)
| 34.596774 | 81 | 0.60373 |
7d9edb7b6abc2d6779dd553126cd964e65f8f2ca | 289 | asm | Assembly | libsrc/_DEVELOPMENT/z80/z80/asm_z80_push_registers_8080.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/z80/z80/asm_z80_push_registers_8080.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/z80/z80/asm_z80_push_registers_8080.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2019-12-03T23:57:48.000Z | 2019-12-03T23:57:48.000Z |
SECTION code_clib
SECTION code_z80
PUBLIC asm_z80_push_registers_8080
asm_z80_push_registers_8080:
; push the main registers onto the stack
; must be called
; exit : hl = return address
;
; uses : hl
ex (sp),hl
push af
push bc
push de
jp (hl)
| 13.136364 | 43 | 0.650519 |
370a875f382789e37165e5802823beb9a47cf7a6 | 9,960 | asm | Assembly | scripts/CinnabarGym.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | scripts/CinnabarGym.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | scripts/CinnabarGym.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | CinnabarGym_Script:
call CinnabarGymSetMapAndTiles
call EnableAutoTextBoxDrawing
ld hl, CinnabarGym_ScriptPointers
ld a, [wCinnabarGymCurScript]
jp CallFunctionInTable
CinnabarGymSetMapAndTiles:
ld hl, wCurrentMapScriptFlags
bit 6, [hl]
res 6, [hl]
push hl
call nz, .LoadNames
pop hl
bit 5, [hl]
res 5, [hl]
call nz, UpdateCinnabarGymGateTileBlocks
ResetEvent EVENT_2A7
ret
.LoadNames:
ld hl, .CityName
ld de, .LeaderName
jp LoadGymLeaderAndCityName
.CityName:
db "CINNABAR ISLAND@"
.LeaderName:
db "BLAINE@"
CinnabarGymResetScripts:
xor a
ld [wJoyIgnore], a
ld [wCinnabarGymCurScript], a
ld [wCurMapScript], a
ld [wOpponentAfterWrongAnswer], a
ret
CinnabarGymSetTrainerHeader:
ldh a, [hSpriteIndexOrTextID]
ld [wTrainerHeaderFlagBit], a
ret
CinnabarGym_ScriptPointers:
dw CinnabarGymScript0
dw CinnabarGymScript1
dw CinnabarGymScript2
dw CinnabarGymBlainePostBattle
CinnabarGymScript0:
ld a, [wOpponentAfterWrongAnswer]
and a
ret z
ldh [hSpriteIndex], a
cp $4
jr nz, .asm_757c3
ld a, PLAYER_DIR_DOWN
ld [wPlayerMovingDirection], a
ld de, MovementNpcToLeftAndUp
jr .MoveSprite
.asm_757c3
ld de, MovementNpcToLeft
ld a, PLAYER_DIR_RIGHT
ld [wPlayerMovingDirection], a
.MoveSprite
call MoveSprite
ld a, $1
ld [wCinnabarGymCurScript], a
ld [wCurMapScript], a
ret
MovementNpcToLeftAndUp:
db NPC_MOVEMENT_LEFT
db NPC_MOVEMENT_UP
db -1 ; end
MovementNpcToLeft:
db NPC_MOVEMENT_LEFT
db -1 ; end
CinnabarGymScript1:
ld a, [wd730]
bit 0, a
ret nz
xor a
ld [wJoyIgnore], a
ld a, [wOpponentAfterWrongAnswer]
ld [wTrainerHeaderFlagBit], a
ldh [hSpriteIndexOrTextID], a
jp DisplayTextID
CinnabarGymFlagAction:
predef_jump FlagActionPredef
CinnabarGymScript2:
ld a, [wIsInBattle]
cp $ff
jp z, CinnabarGymResetScripts
ld a, [wTrainerHeaderFlagBit]
ldh [hGymGateIndex], a
AdjustEventBit EVENT_BEAT_CINNABAR_GYM_TRAINER_0, 2
ld c, a
ld b, FLAG_TEST
EventFlagAddress hl, EVENT_BEAT_CINNABAR_GYM_TRAINER_0
call CinnabarGymFlagAction
ld a, c
and a
jr nz, .asm_7581b
call WaitForSoundToFinish
ld a, SFX_GO_INSIDE
call PlaySound
call WaitForSoundToFinish
.asm_7581b
ld a, [wTrainerHeaderFlagBit]
ldh [hGymGateIndex], a
AdjustEventBit EVENT_BEAT_CINNABAR_GYM_TRAINER_0, 2
ld c, a
ld b, FLAG_SET
EventFlagAddress hl, EVENT_BEAT_CINNABAR_GYM_TRAINER_0
call CinnabarGymFlagAction
ld a, [wTrainerHeaderFlagBit]
sub $2
AdjustEventBit EVENT_CINNABAR_GYM_GATE0_UNLOCKED, 0
ld c, a
ld b, FLAG_SET
EventFlagAddress hl, EVENT_CINNABAR_GYM_GATE0_UNLOCKED
call CinnabarGymFlagAction
call UpdateCinnabarGymGateTileBlocks
xor a
ld [wJoyIgnore], a
ld [wOpponentAfterWrongAnswer], a
ld a, $0
ld [wCinnabarGymCurScript], a
ld [wCurMapScript], a
ret
CinnabarGymBlainePostBattle:
ld a, [wIsInBattle]
cp $ff
jp z, CinnabarGymResetScripts
ld a, $f0
ld [wJoyIgnore], a
; fallthrough
CinnabarGymReceiveTM38:
ld a, $a
ldh [hSpriteIndexOrTextID], a
call DisplayTextID
SetEvent EVENT_BEAT_BLAINE
lb bc, TM_FIRE_BLAST, 1
call GiveItem
jr nc, .BagFull
ld a, $b
ldh [hSpriteIndexOrTextID], a
call DisplayTextID
SetEvent EVENT_GOT_TM38
jr .gymVictory
.BagFull
ld a, $c
ldh [hSpriteIndexOrTextID], a
call DisplayTextID
.gymVictory
ld hl, wObtainedBadges
set BIT_VOLCANOBADGE, [hl]
ld hl, wBeatGymFlags
set BIT_VOLCANOBADGE, [hl]
; deactivate gym trainers
SetEventRange EVENT_BEAT_CINNABAR_GYM_TRAINER_0, EVENT_BEAT_CINNABAR_GYM_TRAINER_6
ld hl, wCurrentMapScriptFlags
set 5, [hl]
jp CinnabarGymResetScripts
CinnabarGym_TextPointers:
dw BlaineText
dw CinnabarGymTrainerText1
dw CinnabarGymTrainerText2
dw CinnabarGymTrainerText3
dw CinnabarGymTrainerText4
dw CinnabarGymTrainerText5
dw CinnabarGymTrainerText6
dw CinnabarGymTrainerText7
dw CinnabarGymGuideText
dw BlaineVolcanoBadgeInfoText
dw ReceivedTM38Text
dw TM38NoRoomText
CinnabarGymScript_758b7:
ldh a, [hSpriteIndexOrTextID]
ld [wSpriteIndex], a
call EngageMapTrainer
call InitBattleEnemyParameters
ld hl, wd72d
set 6, [hl]
set 7, [hl]
ld a, [wSpriteIndex]
cp $1
jr z, .asm_758d4
ld a, $2
jr .asm_758d6
.asm_758d4
ld a, $3
.asm_758d6
ld [wCinnabarGymCurScript], a
ld [wCurMapScript], a
jp TextScriptEnd
BlaineText:
text_asm
CheckEvent EVENT_BEAT_BLAINE
jr z, .beforeBeat
CheckEventReuseA EVENT_GOT_TM38
jr nz, .afterBeat
call z, CinnabarGymReceiveTM38
call DisableWaitingAfterTextDisplay
jp TextScriptEnd
.afterBeat
ld hl, BlainePostBattleAdviceText
call PrintText
jp TextScriptEnd
.beforeBeat
ld hl, BlainePreBattleText
call PrintText
ld hl, ReceivedVolcanoBadgeText
ld de, ReceivedVolcanoBadgeText
call SaveEndBattleTextPointers
ld a, $7
ld [wGymLeaderNo], a
jp CinnabarGymScript_758b7
BlainePreBattleText:
text_far _BlainePreBattleText
text_end
ReceivedVolcanoBadgeText:
text_far _ReceivedVolcanoBadgeText
sound_get_key_item ; actually plays the second channel of SFX_BALL_POOF due to the wrong music bank being loaded
text_waitbutton
text_end
BlainePostBattleAdviceText:
text_far _BlainePostBattleAdviceText
text_end
BlaineVolcanoBadgeInfoText:
text_far _BlaineVolcanoBadgeInfoText
text_end
ReceivedTM38Text:
text_far _ReceivedTM38Text
sound_get_item_1
text_far _TM38ExplanationText
text_end
TM38NoRoomText:
text_far _TM38NoRoomText
text_end
CinnabarGymTrainerText1:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_0
jr nz, .asm_46bb4
ld hl, CinnabarGymBattleText2
call PrintText
ld hl, CinnabarGymEndBattleText2
ld de, CinnabarGymEndBattleText2
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.asm_46bb4
ld hl, CinnabarGymAfterBattleText2
call PrintText
jp TextScriptEnd
CinnabarGymBattleText2:
text_far _CinnabarGymBattleText2
text_end
CinnabarGymEndBattleText2:
text_far _CinnabarGymEndBattleText2
text_end
CinnabarGymAfterBattleText2:
text_far _CinnabarGymAfterBattleText2
text_end
CinnabarGymTrainerText2:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_1
jr nz, .asm_4b406
ld hl, CinnabarGymBattleText1
call PrintText
ld hl, CinnabarGymEndBattleText1
ld de, CinnabarGymEndBattleText1
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.asm_4b406
ld hl, CinnabarGymAfterBattleText1
call PrintText
jp TextScriptEnd
CinnabarGymBattleText1:
text_far _CinnabarGymBattleText1
text_end
CinnabarGymEndBattleText1:
text_far _CinnabarGymEndBattleText1
text_end
CinnabarGymAfterBattleText1:
text_far _CinnabarGymAfterBattleText1
text_end
CinnabarGymTrainerText3:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_2
jr nz, .afterBeat
ld hl, CinnabarGymBattleText3
call PrintText
ld hl, CinnabarGymEndBattleText3
ld de, CinnabarGymEndBattleText3
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.afterBeat
ld hl, CinnabarGymAfterBattleText3
call PrintText
jp TextScriptEnd
CinnabarGymBattleText3:
text_far _CinnabarGymBattleText3
text_end
CinnabarGymEndBattleText3:
text_far _CinnabarGymEndBattleText3
text_end
CinnabarGymAfterBattleText3:
text_far _CinnabarGymAfterBattleText3
text_end
CinnabarGymTrainerText4:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_3
jr nz, .afterBeat
ld hl, CinnabarGymBattleText4
call PrintText
ld hl, CinnabarGymEndBattleText4
ld de, CinnabarGymEndBattleText4
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.afterBeat
ld hl, CinnabarGymAfterBattleText4
call PrintText
jp TextScriptEnd
CinnabarGymBattleText4:
text_far _CinnabarGymBattleText4
text_end
CinnabarGymEndBattleText4:
text_far _CinnabarGymEndBattleText4
text_end
CinnabarGymAfterBattleText4:
text_far _CinnabarGymAfterBattleText4
text_end
CinnabarGymTrainerText5:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_4
jr nz, .afterBeat
ld hl, CinnabarGymBattleText5
call PrintText
ld hl, CinnabarGymEndBattleText5
ld de, CinnabarGymEndBattleText5
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.afterBeat
ld hl, CinnabarGymAfterBattleText5
call PrintText
jp TextScriptEnd
CinnabarGymBattleText5:
text_far _CinnabarGymBattleText5
text_end
CinnabarGymEndBattleText5:
text_far _CinnabarGymEndBattleText5
text_end
CinnabarGymAfterBattleText5:
text_far _CinnabarGymAfterBattleText5
text_end
CinnabarGymTrainerText6:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_5
jr nz, .afterBeat
ld hl, CinnabarGymBattleText6
call PrintText
ld hl, CinnabarGymEndBattleText6
ld de, CinnabarGymEndBattleText6
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.afterBeat
ld hl, CinnabarGymAfterBattleText6
call PrintText
jp TextScriptEnd
CinnabarGymBattleText6:
text_far _CinnabarGymBattleText6
text_end
CinnabarGymEndBattleText6:
text_far _CinnabarGymEndBattleText6
text_end
CinnabarGymAfterBattleText6:
text_far _CinnabarGymAfterBattleText6
text_end
CinnabarGymTrainerText7:
text_asm
call CinnabarGymSetTrainerHeader
CheckEvent EVENT_BEAT_CINNABAR_GYM_TRAINER_6
jr nz, .afterBeat
ld hl, CinnabarGymBattleText7
call PrintText
ld hl, CinnabarGymEndBattleText7
ld de, CinnabarGymEndBattleText7
call SaveEndBattleTextPointers
jp CinnabarGymScript_758b7
.afterBeat
ld hl, CinnabarGymAfterBattleText7
call PrintText
jp TextScriptEnd
CinnabarGymBattleText7:
text_far _CinnabarGymBattleText7
text_end
CinnabarGymEndBattleText7:
text_far _CinnabarGymEndBattleText7
text_end
CinnabarGymAfterBattleText7:
text_far _CinnabarGymAfterBattleText7
text_end
CinnabarGymGuideText:
text_asm
CheckEvent EVENT_BEAT_BLAINE
jr nz, .afterBeat
ld hl, CinnabarGymGuidePreBattleText
jr .done
.afterBeat
ld hl, CinnabarGymGuidePostBattleText
.done
call PrintText
jp TextScriptEnd
CinnabarGymGuidePreBattleText:
text_far _CinnabarGymGuidePreBattleText
text_end
CinnabarGymGuidePostBattleText:
text_far _CinnabarGymGuidePostBattleText
text_end
| 20.92437 | 113 | 0.835341 |
62ae43ead050fec0b873bcad71684a3abd83d6e8 | 243 | asm | Assembly | programs/oeis/261/A261882.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/261/A261882.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/261/A261882.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A261882: Decimal expansion of 32/27.
; 1,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5,1,8,5
mov $2,$0
cmp $2,0
add $0,$2
mul $0,20
div $0,3
sub $0,5
mod $0,10
| 22.090909 | 135 | 0.547325 |
7aab8dc8764a1e3c77285948d5c2b7fee731253e | 236 | asm | Assembly | programs/oeis/129/A129979.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/129/A129979.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/129/A129979.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A129979: Left border of triangle A131088.
; 1,3,3,2,3,1,3,2,2,1
seq $0,8683 ; Möbius (or Moebius) function mu(n). mu(1) = 1; mu(n) = (-1)^k if n is the product of k different primes; otherwise mu(n) = 0.
mov $1,2
sub $1,$0
mov $0,$1
| 29.5 | 139 | 0.627119 |
3f578df1e34489d17d24eb3efe5afbac0c5de250 | 800 | asm | Assembly | oeis/116/A116526.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/116/A116526.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/116/A116526.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A116526: a(0)=1, a(1)=1, a(n) = 9*a(n/2) for even n >= 2, and a(n) = 8*a((n-1)/2) + a((n+1)/2) for odd n >= 3.
; 0,1,9,17,81,89,153,217,729,737,801,865,1377,1441,1953,2465,6561,6569,6633,6697,7209,7273,7785,8297,12393,12457,12969,13481,17577,18089,22185,26281,59049,59057,59121,59185,59697,59761,60273,60785,64881,64945,65457,65969,70065,70577,74673,78769,111537,111601,112113,112625,116721,117233,121329,125425,158193,158705,162801,166897,199665,203761,236529,269297,531441,531449,531513,531577,532089,532153,532665,533177,537273,537337,537849,538361,542457,542969,547065,551161,583929,583993,584505,585017
mov $2,$0
mov $5,$0
lpb $2
mov $0,$5
sub $2,1
sub $0,$2
sub $0,1
mul $0,2
mov $3,$0
lpb $0
div $3,2
sub $0,$3
mov $4,8
lpe
pow $4,$0
add $1,$4
lpe
mov $0,$1
| 36.363636 | 496 | 0.68125 |
290f979d5f8a4b7bc377fb5c7528ead1f1b5e7bf | 503 | asm | Assembly | oeis/065/A065339.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/065/A065339.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/065/A065339.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A065339: Number of primes congruent to 3 modulo 4 dividing n (with multiplicity).
; Submitted by Jon Maiga
; 0,0,1,0,0,1,1,0,2,0,1,1,0,1,1,0,0,2,1,0,2,1,1,1,0,0,3,1,0,1,1,0,2,0,1,2,0,1,1,0,0,2,1,1,2,1,1,1,2,0,1,0,0,3,1,1,2,0,1,1,0,1,3,0,0,2,1,0,2,1,1,2,0,0,1,1,2,1,1,0,4,0,1,2,0,1,1,1,0,2,1,1,2,1,1,1,0,2,3,0
add $0,1
lpb $0
mov $2,3
mov $3,$0
lpb $3
mov $4,$0
mod $4,$2
add $2,4
cmp $4,0
cmp $4,0
sub $3,$4
lpe
lpb $0
dif $0,$2
add $1,1
lpe
lpe
mov $0,$1
| 21.869565 | 201 | 0.526839 |
b06737c6c1a43771ef781b34f93f86234a342bbf | 27,888 | asm | Assembly | engine/events/overworld.asm | pokeachromicdevs/pokeoctober | db74bb68bbfceac07eec6d64674bc24fd4c0b67f | [
"blessing"
] | 1 | 2021-07-05T23:48:37.000Z | 2021-07-05T23:48:37.000Z | engine/events/overworld.asm | pokeachromicdevs/pokeoctober | db74bb68bbfceac07eec6d64674bc24fd4c0b67f | [
"blessing"
] | 1 | 2020-12-16T01:11:20.000Z | 2020-12-16T22:53:56.000Z | engine/events/overworld.asm | pokeachromicdevs/pokeoctober | db74bb68bbfceac07eec6d64674bc24fd4c0b67f | [
"blessing"
] | 1 | 2021-07-05T23:33:22.000Z | 2021-07-05T23:33:22.000Z | FieldMoveJumptableReset:
xor a
ld hl, wBuffer1
ld bc, 7
call ByteFill
ret
FieldMoveJumptable:
ld a, [wBuffer1]
rst JumpTable
ld [wBuffer1], a
bit 7, a
jr nz, .okay
and a
ret
.okay
and $7f
scf
ret
GetPartyNick:
; write wCurPartyMon nickname to wStringBuffer1-3
ld hl, wPartyMonNicknames
ld a, BOXMON
ld [wMonType], a
ld a, [wCurPartyMon]
call GetNick
call CopyName1
; copy text from wStringBuffer2 to wStringBuffer3
ld de, wStringBuffer2
ld hl, wStringBuffer3
call CopyName2
ret
CheckEngineFlag:
; Check engine flag de
; Return carry if flag is not set
ld b, CHECK_FLAG
farcall EngineFlagAction
ld a, c
and a
jr nz, .isset
scf
ret
.isset
xor a
ret
CheckBadge:
; Check engine flag a (ENGINE_ZEPHYRBADGE thru ENGINE_EARTHBADGE)
; Display "Badge required" text and return carry if the badge is not owned
call CheckEngineFlag
ret nc
ld hl, .BadgeRequiredText
call MenuTextboxBackup ; push text to queue
scf
ret
.BadgeRequiredText:
; Sorry! A new BADGE
; is required.
text_far _BadgeRequiredText
text_end
CheckPartyMoveIndex:
; Check if a monster in your party has move hl.
call GetMoveIDFromIndex
ld d, a
CheckPartyMove:
; Check if a monster in your party has move d.
ld e, 0
xor a
ld [wCurPartyMon], a
.loop
ld c, e
ld b, 0
ld hl, wPartySpecies
add hl, bc
ld a, [hl]
and a
jr z, .no
cp -1
jr z, .no
cp EGG
jr z, .next
ld bc, PARTYMON_STRUCT_LENGTH
ld hl, wPartyMon1Moves
ld a, e
call AddNTimes
ld b, NUM_MOVES
.check
ld a, [hli]
cp d
jr z, .yes
dec b
jr nz, .check
.next
inc e
jr .loop
.yes
ld a, e
ld [wCurPartyMon], a ; which mon has the move
xor a
ret
.no
scf
ret
FieldMoveFailed:
ld hl, .CantUseHere
call MenuTextboxBackup
ret
.CantUseHere:
; Can't use that here.
text_far UnknownText_0x1c05c8
text_end
UprootFunction:
call FieldMoveJumptableReset
.loop
ld hl, .Jumptable
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
.Jumptable:
dw .CheckAble
dw .DoUproot
dw .FailCut
.CheckAble:
ld de, ENGINE_ZEPHYRBADGE
call CheckBadge
jr c, .nozephyrbadge
call CheckMapForSomethingToUproot
jr c, .nothingtouproot
ld a, $1
ret
.nozephyrbadge
ld a, $80
ret
.nothingtouproot
ld a, $2
ret
.DoUproot:
ld hl, Script_CutFromMenu
call QueueScript
ld a, $81
ret
.FailCut:
ld hl, Text_NothingToUproot
call MenuTextboxBackup
ld a, $80
ret
Text_UsedUproot:
; used UPROOT!
text_far UnknownText_0x1c05dd
text_end
Text_NothingToUproot:
; There's nothing to UPROOT here.
text_far UnknownText_0x1c05ec
text_end
CheckMapForSomethingToUproot:
; Does the collision data of the facing tile permit cutting?
call GetFacingTileCoord
ld c, a
push de
farcall CheckCutCollision
pop de
jr nc, .fail
; Get the location of the current block in wOverworldMapBlocks.
call GetBlockLocation
ld c, [hl]
; See if that block contains something that can be cut.
push hl
ld hl, CutTreeBlockPointers
call CheckOverworldTileArrays
pop hl
jr nc, .fail
; Back up the wOverworldMapBlocks address to wBuffer3
ld a, l
ld [wBuffer3], a
ld a, h
ld [wBuffer4], a
; Back up the replacement tile to wBuffer5
ld a, b
ld [wBuffer5], a
; Back up the animation index to wBuffer6
ld a, c
ld [wBuffer6], a
xor a
ret
.fail
scf
ret
Script_CutFromMenu:
reloadmappart
special UpdateTimePals
Script_Uproot:
callasm GetPartyNick
writetext Text_UsedUproot
reloadmappart
callasm CutDownTreeOrGrass
closetext
end
CutDownTreeOrGrass:
ld hl, wBuffer3 ; OverworldMapTile
ld a, [hli]
ld h, [hl]
ld l, a
ld a, [wBuffer5] ; ReplacementTile
ld [hl], a
xor a
ldh [hBGMapMode], a
call OverworldTextModeSwitch
call UpdateSprites
call DelayFrame
ld a, [wBuffer6] ; Animation type
ld e, a
farcall OWCutAnimation
call BufferScreen
call GetMovementPermissions
call UpdateSprites
call DelayFrame
call LoadStandardFont
ret
CheckOverworldTileArrays:
; Input: c contains the tile you're facing
; Output: Replacement tile in b and effect on wild encounters in c, plus carry set.
; Carry is not set if the facing tile cannot be replaced, or if the tileset
; does not contain a tile you can replace.
; Dictionary lookup for pointer to tile replacement table
push bc
ld a, [wMapTileset]
ld de, 3
call IsInArray
pop bc
jr nc, .nope
; Load the pointer
inc hl
ld a, [hli]
ld h, [hl]
ld l, a
; Look up the tile you're facing
ld de, 3
ld a, c
call IsInArray
jr nc, .nope
; Load the replacement to b
inc hl
ld b, [hl]
; Load the animation type parameter to c
inc hl
ld c, [hl]
scf
ret
.nope
xor a
ret
INCLUDE "data/events/field_move_blocks.asm"
OWFlash:
call .CheckUseFlash
and $7f
ld [wFieldMoveSucceeded], a
ret
.CheckUseFlash:
; Flash
ld de, ENGINE_ZEPHYRBADGE
farcall CheckBadge
jr c, .nozephyrbadge
push hl
farcall SpecialAerodactylChamber
pop hl
jr c, .useflash
ld a, [wTimeOfDayPalset]
cp %11111111 ; 3, 3, 3, 3
jr nz, .notadarkcave
.useflash
call UseFlash
ld a, $81
ret
.notadarkcave
call FieldMoveFailed
ld a, $80
ret
.nozephyrbadge
ld a, $80
ret
UseFlash:
ld hl, Script_UseFlash
jp QueueScript
Script_UseFlash:
reloadmappart
special UpdateTimePals
writetext UnknownText_0xc8f3
callasm BlindingFlash
closetext
end
UnknownText_0xc8f3:
text_far UnknownText_0x1c0609
text_asm
call WaitSFX
ld de, SFX_FLASH
call PlaySFX
call WaitSFX
ld hl, .BlankText
ret
.BlankText:
text_end
SurfFunction:
call FieldMoveJumptableReset
.loop
ld hl, .Jumptable
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
.Jumptable:
dw .TrySurf
dw .DoSurf
dw .FailSurf
dw .AlreadySurfing
.TrySurf:
ld de, ENGINE_FOGBADGE
call CheckBadge
jr c, .asm_c956
ld hl, wBikeFlags
bit BIKEFLAGS_ALWAYS_ON_BIKE_F, [hl]
jr nz, .cannotsurf
ld a, [wPlayerState]
cp PLAYER_SURF
jr z, .alreadyfail
cp PLAYER_SURF_PIKA
jr z, .alreadyfail
call GetFacingTileCoord
call GetTileCollision
cp WATERTILE
jr nz, .cannotsurf
call CheckDirection
jr c, .cannotsurf
farcall CheckFacingObject
jr c, .cannotsurf
ld a, $1
ret
.asm_c956
ld a, $80
ret
.alreadyfail
ld a, $3
ret
.cannotsurf
ld a, $2
ret
.DoSurf:
call GetSurfType
ld [wBuffer2], a
call GetPartyNick
ld hl, SurfFromMenuScript
call QueueScript
ld a, $81
ret
.FailSurf:
ld hl, CantSurfText
call MenuTextboxBackup
ld a, $80
ret
.AlreadySurfing:
ld hl, AlreadySurfingText
call MenuTextboxBackup
ld a, $80
ret
SurfFromMenuScript:
special UpdateTimePals
UsedSurfScript:
writetext UsedSurfText ; "used SURF!"
waitbutton
closetext
callasm .empty_fn ; empty function
readmem wBuffer2
writevar VAR_MOVEMENT
special ReplaceKrisSprite
special PlayMapMusic
; step into the water (slow_step DIR, step_end)
special SurfStartStep
applymovement PLAYER, wMovementBuffer
end
.empty_fn
farcall StubbedTrainerRankings_Surf
ret
UsedSurfText:
text_far _UsedSurfText
text_end
CantSurfText:
text_far _CantSurfText
text_end
AlreadySurfingText:
text_far _AlreadySurfingText
text_end
GetSurfType:
; Surfing on Pikachu uses an alternate sprite.
; This is done by using a separate movement type.
ld a, [wCurPartyMon]
ld e, a
ld d, 0
ld hl, PIKACHU
call GetPokemonIDFromIndex
ld hl, wPartySpecies
add hl, de
cp [hl]
ld a, PLAYER_SURF_PIKA
ret z
ld a, PLAYER_SURF
ret
CheckDirection:
; Return carry if a tile permission prevents you
; from moving in the direction you're facing.
; Get player direction
ld a, [wPlayerDirection]
and %00001100 ; bits 2 and 3 contain direction
rrca
rrca
ld e, a
ld d, 0
ld hl, .Directions
add hl, de
; Can you walk in this direction?
ld a, [wTilePermissions]
and [hl]
jr nz, .quit
xor a
ret
.quit
scf
ret
.Directions:
db FACE_DOWN
db FACE_UP
db FACE_LEFT
db FACE_RIGHT
TrySurfOW::
; Checking a tile in the overworld.
; Return carry if fail is allowed.
; Don't ask to surf if already fail.
ld a, [wPlayerState]
cp PLAYER_SURF_PIKA
jr z, .quit
cp PLAYER_SURF
jr z, .quit
; Must be facing water.
ld a, [wFacingTileID]
call GetTileCollision
cp WATERTILE
jr nz, .quit
; Check tile permissions.
call CheckDirection
jr c, .quit
ld de, ENGINE_FOGBADGE
call CheckEngineFlag
jr c, .quit
ld hl, SURF
call CheckPartyMoveIndex
jr c, .quit
ld hl, wBikeFlags
bit BIKEFLAGS_ALWAYS_ON_BIKE_F, [hl]
jr nz, .quit
call GetSurfType
ld [wBuffer2], a
call GetPartyNick
ld a, BANK(AskSurfScript)
ld hl, AskSurfScript
call CallScript
scf
ret
.quit
xor a
ret
AskSurfScript:
opentext
writetext AskSurfText
yesorno
iftrue UsedSurfScript
closetext
end
AskSurfText:
; The water is calm. Want to SURF?
text_far _AskSurfText
text_end
FlyFunction:
call FieldMoveJumptableReset
.loop
ld hl, .Jumptable
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
.Jumptable:
dw .TryFly
dw .DoFly
dw .FailFly
.TryFly:
; Fly
ld de, ENGINE_STORMBADGE
call CheckBadge
jr c, .nostormbadge
call GetMapEnvironment
call CheckOutdoorMap
jr z, .outdoors
jr .indoors
.outdoors
xor a
ldh [hMapAnims], a
call LoadStandardMenuHeader
call ClearSprites
farcall _FlyMap
ld a, e
cp -1
jr z, .illegal
cp NUM_SPAWNS
jr nc, .illegal
ld [wDefaultSpawnpoint], a
call CloseWindow
ld a, $1
ret
.nostormbadge
ld a, $82
ret
.indoors
ld a, $2
ret
.illegal
call CloseWindow
call WaitBGMap
ld a, $80
ret
.DoFly:
ld hl, .FlyScript
call QueueScript
ld a, $81
ret
.FailFly:
call FieldMoveFailed
ld a, $82
ret
.FlyScript:
reloadmappart
callasm HideSprites
special UpdateTimePals
callasm FlyFromAnim
farscall Script_AbortBugContest
special WarpToSpawnPoint
callasm DelayLoadingNewSprites
loadvar VAR_MOVEMENT, PLAYER_NORMAL
newloadmap MAPSETUP_FLY
callasm FlyToAnim
special WaitSFX
callasm .ReturnFromFly
end
.ReturnFromFly:
farcall Function561d
call DelayFrame
call ReplaceKrisSprite
farcall LoadOverworldFont
ret
WaterfallFunction:
call .TryWaterfall
and $7f
ld [wFieldMoveSucceeded], a
ret
.TryWaterfall:
; Waterfall
ld de, ENGINE_RISINGBADGE
farcall CheckBadge
ld a, $80
ret c
call CheckMapCanWaterfall
jr c, .failed
ld hl, Script_WaterfallFromMenu
call QueueScript
ld a, $81
ret
.failed
call FieldMoveFailed
ld a, $80
ret
CheckMapCanWaterfall:
ld a, [wPlayerDirection]
and $c
cp FACE_UP
jr nz, .failed
ld a, [wTileUp]
call CheckWaterfallTile
jr nz, .failed
xor a
ret
.failed
scf
ret
Script_WaterfallFromMenu:
reloadmappart
special UpdateTimePals
Script_UsedWaterfall:
callasm GetPartyNick
writetext .Text_UsedWaterfall
waitbutton
closetext
playsound SFX_BUBBLEBEAM
.loop
applymovement PLAYER, .WaterfallStep
callasm .CheckContinueWaterfall
iffalse .loop
end
.CheckContinueWaterfall:
xor a
ld [wScriptVar], a
ld a, [wPlayerStandingTile]
call CheckWaterfallTile
ret z
farcall StubbedTrainerRankings_Waterfall
ld a, $1
ld [wScriptVar], a
ret
.WaterfallStep:
slow_step DOWN
step UP
turn_waterfall UP
step_end
.Text_UsedWaterfall:
; used WATERFALL!
text_far UnknownText_0x1c068e
text_end
TryWaterfallOW::
ld hl, WATERFALL
call CheckPartyMoveIndex
jr c, .failed
ld de, ENGINE_RISINGBADGE
call CheckEngineFlag
jr c, .failed
call CheckMapCanWaterfall
jr c, .failed
ld a, BANK(Script_AskWaterfall)
ld hl, Script_AskWaterfall
call CallScript
scf
ret
.failed
ld a, BANK(Script_CantDoWaterfall)
ld hl, Script_CantDoWaterfall
call CallScript
scf
ret
Script_CantDoWaterfall:
jumptext .Text_CantDoWaterfall
.Text_CantDoWaterfall:
; Wow, it's a huge waterfall.
text_far UnknownText_0x1c06a3
text_end
Script_AskWaterfall:
opentext
writetext .AskUseWaterfall
yesorno
iftrue Script_UsedWaterfall
closetext
end
.AskUseWaterfall:
; Do you want to use WATERFALL?
text_far UnknownText_0x1c06bf
text_end
EscapeRopeFunction:
call FieldMoveJumptableReset
ld a, $1
jr dig_incave
DigFunction:
call FieldMoveJumptableReset
ld a, $2
dig_incave:
ld [wBuffer2], a
.loop
ld hl, .DigTable
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
.DigTable:
dw .CheckCanDig
dw .DoDig
dw .FailDig
.CheckCanDig:
call GetMapEnvironment
cp CAVE
jr z, .incave
cp DUNGEON
jr z, .incave
.fail
ld a, $2
ret
.incave
ld hl, wDigWarpNumber
ld a, [hli]
and a
jr z, .fail
ld a, [hli]
and a
jr z, .fail
ld a, [hl]
and a
jr z, .fail
ld a, $1
ret
.DoDig:
ld hl, wDigWarpNumber
ld de, wNextWarp
ld bc, 3
call CopyBytes
call GetPartyNick
ld a, [wBuffer2]
cp $2
jr nz, .escaperope
ld hl, .UsedDigScript
call QueueScript
ld a, $81
ret
.escaperope
farcall SpecialKabutoChamber
ld hl, .UsedEscapeRopeScript
call QueueScript
ld a, $81
ret
.FailDig:
ld a, [wBuffer2]
cp $2
jr nz, .failescaperope
ld hl, .Text_CantUseHere
call MenuTextbox
call WaitPressAorB_BlinkCursor
call CloseWindow
.failescaperope
ld a, $80
ret
.Text_UsedDig:
; used DIG!
text_far UnknownText_0x1c06de
text_end
.Text_UsedEscapeRope:
; used an ESCAPE ROPE.
text_far UnknownText_0x1c06ed
text_end
.Text_CantUseHere:
; Can't use that here.
text_far UnknownText_0x1c0705
text_end
.UsedEscapeRopeScript:
reloadmappart
special UpdateTimePals
writetext .Text_UsedEscapeRope
sjump .UsedDigOrEscapeRopeScript
.UsedDigScript:
reloadmappart
special UpdateTimePals
writetext .Text_UsedDig
.UsedDigOrEscapeRopeScript:
waitbutton
closetext
playsound SFX_WARP_TO
applymovement PLAYER, .DigOut
farscall Script_AbortBugContest
special WarpToSpawnPoint
loadvar VAR_MOVEMENT, PLAYER_NORMAL
newloadmap MAPSETUP_DOOR
playsound SFX_WARP_FROM
applymovement PLAYER, .DigReturn
end
.DigOut:
step_dig 32
hide_object
step_end
.DigReturn:
show_object
return_dig 32
step_end
TeleportFunction:
call FieldMoveJumptableReset
.loop
ld hl, .Jumptable
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
.Jumptable:
dw .TryTeleport
dw .DoTeleport
dw .FailTeleport
.TryTeleport:
call GetMapEnvironment
call CheckOutdoorMap
jr z, .CheckIfSpawnPoint
jr .nope
.CheckIfSpawnPoint:
ld a, [wLastSpawnMapGroup]
ld d, a
ld a, [wLastSpawnMapNumber]
ld e, a
farcall IsSpawnPoint
jr nc, .nope
ld a, c
ld [wDefaultSpawnpoint], a
ld a, $1
ret
.nope
ld a, $2
ret
.DoTeleport:
call GetPartyNick
ld hl, .TeleportScript
call QueueScript
ld a, $81
ret
.FailTeleport:
ld hl, .Text_CantUseHere
call MenuTextboxBackup
ld a, $80
ret
.Text_ReturnToLastMonCenter:
; Return to the last #MON CENTER.
text_far UnknownText_0x1c071a
text_end
.Text_CantUseHere:
; Can't use that here.
text_far UnknownText_0x1c073b
text_end
.TeleportScript:
reloadmappart
special UpdateTimePals
writetext .Text_ReturnToLastMonCenter
pause 60
reloadmappart
closetext
playsound SFX_WARP_TO
applymovement PLAYER, .TeleportFrom
farscall Script_AbortBugContest
special WarpToSpawnPoint
loadvar VAR_MOVEMENT, PLAYER_NORMAL
newloadmap MAPSETUP_TELEPORT
playsound SFX_WARP_FROM
applymovement PLAYER, .TeleportTo
end
.TeleportFrom:
teleport_from
step_end
.TeleportTo:
teleport_to
step_end
StrengthFunction:
call .TryStrength
and $7f
ld [wFieldMoveSucceeded], a
ret
.TryStrength:
; Strength
ld de, ENGINE_PLAINBADGE
call CheckBadge
jr c, .Failed
jr .UseStrength
.Unreferenced_AlreadyUsing:
ld hl, .JumpText
call MenuTextboxBackup
ld a, $80
ret
.JumpText:
text_far UnknownText_0x1c0751
text_end
.Failed:
ld a, $80
ret
.UseStrength:
ld hl, Script_StrengthFromMenu
call QueueScript
ld a, $81
ret
SetStrengthFlag:
ld hl, wBikeFlags
set BIKEFLAGS_STRENGTH_ACTIVE_F, [hl]
ld a, [wCurPartyMon]
ld e, a
ld d, 0
ld hl, wPartySpecies
add hl, de
ld a, [hl]
ld [wBuffer6], a
call GetPartyNick
ret
Script_StrengthFromMenu:
reloadmappart
special UpdateTimePals
Script_UsedStrength:
callasm SetStrengthFlag
writetext .UsedStrength
readmem wBuffer6
cry 0
pause 3
writetext .StrengthAllowedItToMoveBoulders
closetext
end
.UsedStrength:
text_far UnknownText_0x1c0774
text_end
.StrengthAllowedItToMoveBoulders:
text_far UnknownText_0x1c0788
text_end
AskStrengthScript:
callasm TryStrengthOW
iffalse .AskStrength
ifequal $1, .DontMeetRequirements
sjump .AlreadyUsedStrength
.DontMeetRequirements:
jumptext UnknownText_0xcd73
.AlreadyUsedStrength:
jumptext UnknownText_0xcd6e
.AskStrength:
opentext
writetext UnknownText_0xcd69
yesorno
iftrue Script_UsedStrength
closetext
end
UnknownText_0xcd69:
; A #MON may be able to move this. Want to use STRENGTH?
text_far UnknownText_0x1c07a0
text_end
UnknownText_0xcd6e:
; Boulders may now be moved!
text_far UnknownText_0x1c07d8
text_end
UnknownText_0xcd73:
; A #MON may be able to move this.
text_far UnknownText_0x1c07f4
text_end
TryStrengthOW:
ld hl, STRENGTH
call CheckPartyMoveIndex
jr c, .nope
ld de, ENGINE_PLAINBADGE
call CheckEngineFlag
jr c, .nope
ld hl, wBikeFlags
bit BIKEFLAGS_STRENGTH_ACTIVE_F, [hl]
jr z, .already_using
ld a, 2
jr .done
.nope
ld a, 1
jr .done
.already_using
xor a
jr .done
.done
ld [wScriptVar], a
ret
WhirlpoolFunction:
call FieldMoveJumptableReset
.loop
ld hl, Jumptable_cdae
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
Jumptable_cdae:
dw .TryWhirlpool
dw .DoWhirlpool
dw .FailWhirlpool
.TryWhirlpool:
ld de, ENGINE_GLACIERBADGE
call CheckBadge
jr c, .noglacierbadge
call TryWhirlpoolMenu
jr c, .failed
ld a, $1
ret
.failed
ld a, $2
ret
.noglacierbadge
ld a, $80
ret
.DoWhirlpool:
ld hl, Script_WhirlpoolFromMenu
call QueueScript
ld a, $81
ret
.FailWhirlpool:
call FieldMoveFailed
ld a, $80
ret
Text_UsedWhirlpool:
; used WHIRLPOOL!
text_far UnknownText_0x1c0816
text_end
TryWhirlpoolMenu:
call GetFacingTileCoord
ld c, a
push de
call CheckWhirlpoolTile
pop de
jr c, .failed
call GetBlockLocation
ld c, [hl]
push hl
ld hl, WhirlpoolBlockPointers
call CheckOverworldTileArrays
pop hl
jr nc, .failed
ld a, l
ld [wBuffer3], a
ld a, h
ld [wBuffer4], a
ld a, b
ld [wBuffer5], a
ld a, c
ld [wBuffer6], a
xor a
ret
.failed
scf
ret
Script_WhirlpoolFromMenu:
reloadmappart
special UpdateTimePals
Script_UsedWhirlpool:
callasm GetPartyNick
writetext Text_UsedWhirlpool
reloadmappart
callasm DisappearWhirlpool
closetext
end
DisappearWhirlpool:
ld hl, wBuffer3
ld a, [hli]
ld h, [hl]
ld l, a
ld a, [wBuffer5]
ld [hl], a
xor a
ldh [hBGMapMode], a
call OverworldTextModeSwitch
ld a, [wBuffer6]
ld e, a
farcall PlayWhirlpoolSound
call BufferScreen
call GetMovementPermissions
ret
TryWhirlpoolOW::
ld hl, WHIRLPOOL
call CheckPartyMoveIndex
jr c, .failed
ld de, ENGINE_GLACIERBADGE
call CheckEngineFlag
jr c, .failed
call TryWhirlpoolMenu
jr c, .failed
ld a, BANK(Script_AskWhirlpoolOW)
ld hl, Script_AskWhirlpoolOW
call CallScript
scf
ret
.failed
ld a, BANK(Script_MightyWhirlpool)
ld hl, Script_MightyWhirlpool
call CallScript
scf
ret
Script_MightyWhirlpool:
jumptext .MightyWhirlpoolText
.MightyWhirlpoolText:
text_far UnknownText_0x1c082b
text_end
Script_AskWhirlpoolOW:
opentext
writetext UnknownText_0xce78
yesorno
iftrue Script_UsedWhirlpool
closetext
end
UnknownText_0xce78:
text_far UnknownText_0x1c0864
text_end
HeadbuttFunction:
call TryHeadbuttFromMenu
and $7f
ld [wFieldMoveSucceeded], a
ret
TryHeadbuttFromMenu:
call GetFacingTileCoord
call CheckHeadbuttTreeTile
jr nz, .no_tree
ld hl, HeadbuttFromMenuScript
call QueueScript
ld a, $81
ret
.no_tree
call FieldMoveFailed
ld a, $80
ret
UnknownText_0xce9d:
; did a HEADBUTT!
text_far UnknownText_0x1c0897
text_end
UnknownText_0xcea2:
; Nope. Nothing…
text_far UnknownText_0x1c08ac
text_end
HeadbuttFromMenuScript:
reloadmappart
special UpdateTimePals
HeadbuttScript:
callasm GetPartyNick
writetext UnknownText_0xce9d
reloadmappart
callasm ShakeHeadbuttTree
callasm TreeMonEncounter
iffalse .no_battle
closetext
randomwildmon
startbattle
reloadmapafterbattle
end
.no_battle
writetext UnknownText_0xcea2
waitbutton
closetext
end
TryHeadbuttOW::
ld hl, HEADBUTT
call CheckPartyMoveIndex
jr c, .no
ld a, BANK(AskHeadbuttScript)
ld hl, AskHeadbuttScript
call CallScript
scf
ret
.no
xor a
ret
AskHeadbuttScript:
opentext
writetext UnknownText_0xcee6
yesorno
iftrue HeadbuttScript
closetext
end
UnknownText_0xcee6:
; A #MON could be in this tree. Want to HEADBUTT it?
text_far UnknownText_0x1c08bc
text_end
RockSmashFunction:
call TryRockSmashFromMenu
and $7f
ld [wFieldMoveSucceeded], a
ret
TryRockSmashFromMenu:
call GetFacingObject
jr c, .no_rock
ld a, d
cp $18
jr nz, .no_rock
ld hl, RockSmashFromMenuScript
call QueueScript
ld a, $81
ret
.no_rock
call FieldMoveFailed
ld a, $80
ret
GetFacingObject:
farcall CheckFacingObject
jr nc, .fail
ldh a, [hObjectStructIndexBuffer]
call GetObjectStruct
ld hl, OBJECT_MAP_OBJECT_INDEX
add hl, bc
ld a, [hl]
ldh [hLastTalked], a
call GetMapObject
ld hl, MAPOBJECT_MOVEMENT
add hl, bc
ld a, [hl]
ld d, a
and a
ret
.fail
scf
ret
RockSmashFromMenuScript:
reloadmappart
special UpdateTimePals
RockSmashScript:
callasm GetPartyNick
writetext UnknownText_0xcf58
closetext
special WaitSFX
playsound SFX_STRENGTH
earthquake 84
applymovementlasttalked MovementData_0xcf55
disappear -2
callasm RockMonEncounter
readmem wTempWildMonSpecies
iffalse .done
randomwildmon
startbattle
reloadmapafterbattle
.done
end
MovementData_0xcf55:
rock_smash 10
step_end
UnknownText_0xcf58:
text_far UnknownText_0x1c08f0
text_end
AskRockSmashScript:
callasm HasRockSmash
ifequal 1, .no
opentext
writetext UnknownText_0xcf77
yesorno
iftrue RockSmashScript
closetext
end
.no
jumptext UnknownText_0xcf72
UnknownText_0xcf72:
; Maybe a #MON can break this.
text_far UnknownText_0x1c0906
text_end
UnknownText_0xcf77:
; This rock looks breakable. Want to use ROCK SMASH?
text_far UnknownText_0x1c0924
text_end
HasRockSmash:
ld hl, ROCK_SMASH
call CheckPartyMoveIndex
jr nc, .yes
.no
ld a, 1
jr .done
.yes
xor a
jr .done
.done
ld [wScriptVar], a
ret
FishFunction:
ld a, e
push af
call FieldMoveJumptableReset
pop af
ld [wBuffer2], a
.loop
ld hl, .FishTable
call FieldMoveJumptable
jr nc, .loop
and $7f
ld [wFieldMoveSucceeded], a
ret
.FishTable:
dw .TryFish
dw .FishNoBite
dw .FishGotSomething
dw .FailFish
dw .FishNoFish
.TryFish:
ld a, [wPlayerState]
cp PLAYER_SURF
jr z, .fail
cp PLAYER_SURF_PIKA
jr z, .fail
call GetFacingTileCoord
call GetTileCollision
cp WATERTILE
jr z, .facingwater
.fail
ld a, $3
ret
.facingwater
call GetFishingGroup
and a
jr nz, .goodtofish
ld a, $4
ret
.goodtofish
ld d, a
ld a, [wBuffer2]
ld e, a
farcall Fish
ld a, d
and a
jr z, .nonibble
ld [wTempWildMonSpecies], a
ld a, e
ld [wCurPartyLevel], a
ld a, BATTLETYPE_FISH
ld [wBattleType], a
ld a, $2
ret
.nonibble
ld a, $1
ret
.FailFish:
ld a, $80
ret
.FishGotSomething:
ld a, $1
ld [wBuffer6], a
ld hl, Script_GotABite
call QueueScript
ld a, $81
ret
.FishNoBite:
ld a, $2
ld [wBuffer6], a
ld hl, Script_NotEvenANibble
call QueueScript
ld a, $81
ret
.FishNoFish:
ld a, $0
ld [wBuffer6], a
ld hl, Script_NotEvenANibble2
call QueueScript
ld a, $81
ret
Script_NotEvenANibble:
scall Script_FishCastRod
writetext UnknownText_0xd0a9
sjump Script_NotEvenANibble_FallThrough
Script_NotEvenANibble2:
scall Script_FishCastRod
writetext UnknownText_0xd0a9
Script_NotEvenANibble_FallThrough:
loademote EMOTE_SHADOW
callasm PutTheRodAway
closetext
end
Script_GotABite:
scall Script_FishCastRod
callasm Fishing_CheckFacingUp
iffalse .NotFacingUp
applymovement PLAYER, .Movement_FacingUp
sjump .FightTheHookedPokemon
.NotFacingUp:
applymovement PLAYER, .Movement_NotFacingUp
.FightTheHookedPokemon:
pause 40
applymovement PLAYER, .Movement_RestoreRod
writetext UnknownText_0xd0a4
callasm PutTheRodAway
closetext
randomwildmon
startbattle
reloadmapafterbattle
end
.Movement_NotFacingUp:
fish_got_bite
fish_got_bite
fish_got_bite
fish_got_bite
show_emote
step_end
.Movement_FacingUp:
fish_got_bite
fish_got_bite
fish_got_bite
fish_got_bite
step_sleep 1
show_emote
step_end
.Movement_RestoreRod:
hide_emote
fish_cast_rod
step_end
Fishing_CheckFacingUp:
ld a, [wPlayerDirection]
and $c
cp OW_UP
ld a, $1
jr z, .up
xor a
.up
ld [wScriptVar], a
ret
Script_FishCastRod:
reloadmappart
loadmem hBGMapMode, $0
special UpdateTimePals
loademote EMOTE_ROD
callasm LoadFishingGFX
loademote EMOTE_SHOCK
applymovement PLAYER, MovementData_0xd093
pause 40
end
MovementData_0xd093:
fish_cast_rod
step_end
PutTheRodAway:
xor a
ldh [hBGMapMode], a
ld a, $1
ld [wPlayerAction], a
call UpdateSprites
call ReplaceKrisSprite
ret
UnknownText_0xd0a4:
; Oh! A bite!
text_far UnknownText_0x1c0958
text_end
UnknownText_0xd0a9:
; Not even a nibble!
text_far UnknownText_0x1c0965
text_end
UnknownText_0xd0ae: ; unused
; Looks like there's nothing here.
text_far UnknownText_0x1c0979
text_end
BikeFunction:
call .TryBike
and $7f
ld [wFieldMoveSucceeded], a
ret
.TryBike:
call .CheckEnvironment
jr c, .CannotUseBike
ld a, [wPlayerState]
cp PLAYER_NORMAL
jr z, .GetOnBike
cp PLAYER_BIKE
jr z, .GetOffBike
jr .CannotUseBike
.GetOnBike:
ld hl, Script_GetOnBike
ld de, Script_GetOnBike_Register
call .CheckIfRegistered
call QueueScript
xor a
ld [wMusicFade], a
ld de, MUSIC_NONE
call PlayMusic
call DelayFrame
call MaxVolume
ld de, MUSIC_BICYCLE
ld a, e
ld [wMapMusic], a
call PlayMusic
ld a, $1
ret
.GetOffBike:
ld hl, wBikeFlags
bit BIKEFLAGS_ALWAYS_ON_BIKE_F, [hl]
jr nz, .CantGetOffBike
ld hl, Script_GetOffBike
ld de, Script_GetOffBike_Register
call .CheckIfRegistered
ld a, BANK(Script_GetOffBike)
jr .done
.CantGetOffBike:
ld hl, Script_CantGetOffBike
jr .done
.CannotUseBike:
ld a, $0
ret
.done
call QueueScript
ld a, $1
ret
.CheckIfRegistered:
ld a, [wUsingItemWithSelect]
and a
ret z
ld h, d
ld l, e
ret
.CheckEnvironment:
call GetMapEnvironment
call CheckOutdoorMap
jr z, .ok
cp CAVE
jr z, .ok
cp GATE
jr z, .ok
jr .nope
.ok
call GetPlayerStandingTile
and WALLTILE | WATERTILE ; can't use our bike in a wall or on water
jr nz, .nope
xor a
ret
.nope
scf
ret
Script_GetOnBike:
reloadmappart
special UpdateTimePals
loadvar VAR_MOVEMENT, PLAYER_BIKE
writetext GotOnTheBikeText
waitbutton
closetext
special ReplaceKrisSprite
end
Script_GetOnBike_Register:
loadvar VAR_MOVEMENT, PLAYER_BIKE
closetext
special ReplaceKrisSprite
end
; unused
nop
ret
Script_GetOffBike:
reloadmappart
special UpdateTimePals
loadvar VAR_MOVEMENT, PLAYER_NORMAL
writetext GotOffTheBikeText
waitbutton
FinishGettingOffBike:
closetext
special ReplaceKrisSprite
special PlayMapMusic
end
Script_GetOffBike_Register:
loadvar VAR_MOVEMENT, PLAYER_NORMAL
sjump FinishGettingOffBike
Script_CantGetOffBike:
writetext .CantGetOffBikeText
waitbutton
closetext
end
.CantGetOffBikeText:
; You can't get off here!
text_far UnknownText_0x1c099a
text_end
GotOnTheBikeText:
; got on the @ .
text_far UnknownText_0x1c09b2
text_end
GotOffTheBikeText:
; got off the @ .
text_far UnknownText_0x1c09c7
text_end
TryCutOW::
ld hl, UPROOT
call CheckPartyMoveIndex
jr c, .cant_cut
ld de, ENGINE_HIVEBADGE
call CheckEngineFlag
jr c, .cant_cut
ld a, BANK(AskCutScript)
ld hl, AskCutScript
call CallScript
scf
ret
.cant_cut
ld a, BANK(CantCutScript)
ld hl, CantCutScript
call CallScript
scf
ret
AskCutScript:
opentext
writetext UnknownText_0xd1c8
yesorno
iffalse .script_d1b8
callasm .CheckMap
iftrue Script_Uproot
.script_d1b8
closetext
end
.CheckMap:
xor a
ld [wScriptVar], a
call CheckMapForSomethingToUproot
ret c
ld a, TRUE
ld [wScriptVar], a
ret
UnknownText_0xd1c8:
text_far UnknownText_0x1c09dd
text_end
CantCutScript:
jumptext UnknownText_0xd1d0
UnknownText_0xd1d0:
text_far UnknownText_0x1c0a05
text_end
| 15.066451 | 84 | 0.767104 |
36c50b9e2ee7c92b95dc64c3ceb6ea1dffced64d | 3,668 | asm | Assembly | stc15w408as_25mhz.asm | gmcgarry/vga | 8119adb43ebb2a8969ec13507d26b0a199696360 | [
"MIT"
] | null | null | null | stc15w408as_25mhz.asm | gmcgarry/vga | 8119adb43ebb2a8969ec13507d26b0a199696360 | [
"MIT"
] | null | null | null | stc15w408as_25mhz.asm | gmcgarry/vga | 8119adb43ebb2a8969ec13507d26b0a199696360 | [
"MIT"
] | null | null | null | ; STC15W408AS @ 25.175MHz, Tcycle = 40ns
; 640x480 (clock 25.175MHz)
; pixel is ~40ns
; SETB: 3 Tcycles = 2 pixel clocks
; CLR: 3 Tcycles
; SJMP: 3 Tcycles
; LCALL: 4 Tcycles
; RET: 4 Tcyccles
; NOP: 1 Tcycles
; DJNZ: 5 Tcycles (direct)
; H: scanline 31.777us (31.468kHz)
; H: data 25.42us
; H: back porch 1.906us
; H: pulse 3.813us
; H: front porch 0.635us
; V: frame 16.68ms (60Hz) [525 lines]
; V: data 15.253ms [480 lines]
; V: front porch 0.35ms [11 lines]
; V: pulse 0.063ms [2 lines]
; V: back porch 0.985ms [31 lines]
; Line:
; total: 800 Tcycles
; data: 640 Tcycles
; fp: 16 Tcycles
; pulse: 96 Tcycles
; bp: 48 Tcycles
P1M0 EQU 0x92
P1M1 EQU 0x91
LEDPIN EQU P1.0
BUTTON EQU P3.2
HSYNC EQU P1.1
VSYNC EQU P1.2
RGB EQU P1.3
TopCount EQU 0x20
BotCount EQU 0x21
LCount0 EQU 0x22
.org 0x0000
SJMP main
main:
MOV SP,#3Fh
MOV P1M0,#0xff ; push-pull
MOV P1M1,#0x00
SETB VSYNC ; 0-2
NOP ; 3
LoopV: ; 0-4 in loop
; ------------------------------------------------------------
; 640 - 4 Tcycles = 8 + 4*157
CLR VSYNC ; (3) 0-2
CLR RGB ; (3) 3-5
MOV R0,#157 ; (2) 6-7
DJNZ R0,$ ; (4)
LCALL FrontPorch ; (16)
LCALL HSync ; (96)
LCALL BackPorch ; (39)
NOP ; (1) ; to make 9 cycles
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
CPL LEDPIN ; (3)
; ------------------------------------------------------------
; ------------------------------------------------------------
; 640 Tcycles = 8 + 4*155 + 12
CLR VSYNC ; (3) 0-2
NOP
NOP
NOP
MOV R0,#155 ; (2) 6-7
DJNZ R0,$ ; (4)
NOP
NOP
NOP
MOV TopCount,#246 ; (3)
MOV BotCount,#247 ; (3)
MOV LCount0,#5 ; (3)
LCALL FrontPorch ; (16)
LCALL HSync ; (96)
LCALL BackPorch ; (39)
NOP ; (1) ; to make 9 cycles
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
SETB VSYNC ; (3)
; ------------------------------------------------------------
BlankLoopTop: ; now, the blank area at the top (209 lines)
; ------------------------------------------------------------
; 640 Tcycles = 8 + 4*158
CLR RGB ; (3) 0-2
NOP
NOP
NOP
MOV R0,#158 ; (2)
DJNZ R0,$ ; (4)
LCALL FrontPorch ; (16)
LCALL HSync ; (96)
LCALL BackPorch ; (39)
NOP ; to make 9 cycles
NOP
NOP
NOP
DJNZ TopCount,BlankLoopTop ; (5)
; ------------------------------------------------------------
.include "text_25mhz.inc" ; 6x5 (30 lines)
BlankLoopBot: ; now, the blank area at the bottom (209 lines)
; ------------------------------------------------------------
; 640 Tcycles = 8 + 4*158
CLR RGB ; (3)
NOP
NOP
NOP
MOV R0,#158 ; (2)
DJNZ R0,$ ; (4)
LCALL FrontPorch ; (16)
LCALL HSync ; (96)
LCALL BackPorch ; (39)
NOP ; to make 9 cycles
NOP
NOP
NOP
DJNZ BotCount,BlankLoopBot ; (5)
LJMP LoopV ; (4) - compensated at top of loop
; ------------------------------------------------------------
; XXXGJM: fp & bp are tweaked for specific display
; 16 Tcycles
FrontPorch: ; (4)
NOP ; (1)
CLR RGB ; (3)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
RET ; (4)
; 39 Tcycles = 4 + 2 + 4*7 + 1 + 4
BackPorch: ; (4)
MOV R0,#4 ; (2)
DJNZ R0,$ ; (4)
NOP ; (1)
NOP ; (1)
RET ; (4)
; 36 cycles
BackPorch72: ; (4)
MOV R0,#3 ; (2)
DJNZ R0,$ ; (4)
NOP ; (1)
NOP ; (1)
NOP ; (1)
NOP ; (1)
RET ; (4)
; 96 Tcycles = 7 + 2 + 20*4 + 7
HSync: ; (4)
CLR HSYNC ; (3)
MOV R0,#20 ; (2)
DJNZ R0,$ ; (4)
SETB HSYNC ; (3)
RET ; (4)
.end
| 17.466667 | 63 | 0.467557 |
72c6e08cb1bf70ee915fa253c3915f7cf46a0cfc | 147 | asm | Assembly | other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/日本_Ver3/asm/bged_dt0.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/日本_Ver3/asm/bged_dt0.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/日本_Ver3/asm/bged_dt0.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | Name: bged_dt0.asm
Type: file
Size: 174050
Last-Modified: '2016-05-13T04:36:32Z'
SHA-1: 6A6156C3E2B4DE6882B90BEB98501DF04CDC1764
Description: null
| 21 | 47 | 0.816327 |
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