data_type large_stringclasses 3
values | source large_stringclasses 29
values | code large_stringlengths 98 49.4M | filepath large_stringlengths 5 161 ⌀ | message large_stringclasses 234
values | commit large_stringclasses 234
values | subject large_stringclasses 418
values | critique large_stringlengths 101 1.26M ⌀ | metadata dict |
|---|---|---|---|---|---|---|---|---|
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2006-2008, Michael Ellerman, IBM Corporation.
*/
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/kmemleak.h>
#include <linux/bitmap.h>
#include <linux/memblock.h>
#include <linux/of.h>
#include <asm/msi_bitmap.h>
#include <asm/setup.h>
int ms... | arch/powerpc/sysdev/msi_bitmap.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Instantiate mmio-mapped RTC chips based on device tree information
*
* Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_d... | arch/powerpc/sysdev/of_rtc.c | null | null | null | null | null |
source | linux | /*
* Setup code for PC-style Real-Time Clock.
*
* Author: Wade Farnsworth <wfarnsworth@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* or implied.
*/
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mc146... | arch/powerpc/sysdev/rtc_cmos_setup.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* tsi108/109 device setup code
*
* Maintained by Roy Zang < tie-fei.zang@freescale.com >
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/major.h>
#include <linux/delay.h>
#include <linux/irq.h>
#... | arch/powerpc/sysdev/tsi108_dev.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Common routines for Tundra Semiconductor TSI108 host bridge.
*
* 2004-2005 (c) Tundra Semiconductor Corp.
* Author: Alex Bounine (alexandreb@tundra.com)
* Author: Roy Zang (tie-fei.zang@freescale.com)
* Add pci interrupt router host
*/
#include <linux/kernel... | arch/powerpc/sysdev/tsi108_pci.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* A udbg backend which logs messages and reads input from in memory
* buffers.
*
* The console output can be read from memcons_output which is a
* circular buffer whose next write position is stored in memcons.output_pos.
*
* Input may be passed by writing into the... | arch/powerpc/sysdev/udbg_memcons.c | null | null | null | null | null |
source | linux | /*
* Interrupt handling for GE FPGA based PIC
*
* Author: Martyn Welch <martyn.welch@ge.com>
*
* 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
*
* kind, whether express or implied.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/i... | arch/powerpc/sysdev/ge/ge_pic.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __GEF_PIC_H__
#define __GEF_PIC_H__
unsigned int gef_pic_get_irq(void);
void gef_pic_init(struct device_node *);
#endif /* __GEF_PIC_H__ */ | arch/powerpc/sysdev/ge/ge_pic.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2011 IBM Corporation.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/cpu.h>
#include <linux/of.h>
#include <asm/smp.h>
#include <a... | arch/powerpc/sysdev/xics/icp-hv.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2011 IBM Corporation.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/cpu.h>
#include <linux/of.h>
#include... | arch/powerpc/sysdev/xics/icp-native.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2016 IBM Corporation.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/cpu.h>
#include <linux/of.h>
#include <asm/smp.h>
#include <a... | arch/powerpc/sysdev/xics/icp-opal.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* ICS backend for OPAL managed interrupts.
*
* Copyright 2011 IBM Corp.
*/
//#define DEBUG
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/cpu.h>
#i... | arch/powerpc/sysdev/xics/ics-native.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* ICS backend for OPAL managed interrupts.
*
* Copyright 2011 IBM Corp.
*/
#undef DEBUG
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/cpu.h>
#incl... | arch/powerpc/sysdev/xics/ics-opal.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/cpu.h>
#include <linux/of.h>
#include <linux/spinlock.h>
#include <linux/msi.h>
#include <asm/smp.h>
#include <asm/ma... | arch/powerpc/sysdev/xics/ics-rtas.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2011 IBM Corporation.
*/
#include <linux/types.h>
#include <linux/threads.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/debugfs.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/seq_file... | arch/powerpc/sysdev/xics/xics-common.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2016,2017 IBM Corporation.
*/
#define pr_fmt(fmt) "xive: " fmt
#include <linux/types.h>
#include <linux/threads.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/debugfs.h>
#include <linux/smp.h>
#include <lin... | arch/powerpc/sysdev/xive/common.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2016,2017 IBM Corporation.
*/
#define pr_fmt(fmt) "xive: " fmt
#include <linux/types.h>
#include <linux/irq.h>
#include <linux/debugfs.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/seq_file.h>
#include <linux/init.h>
#include <linu... | arch/powerpc/sysdev/xive/native.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2016,2017 IBM Corporation.
*/
#define pr_fmt(fmt) "xive: " fmt
#include <linux/types.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_... | arch/powerpc/sysdev/xive/spapr.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2016,2017 IBM Corporation.
*/
#ifndef __XIVE_INTERNAL_H
#define __XIVE_INTERNAL_H
/*
* A "disabled" interrupt should never fire, to catch problems
* we set its logical number to this
*/
#define XIVE_BAD_IRQ 0x7fffffff
#define XIVE_MAX_IRQ (XIVE_BAD_... | arch/powerpc/sysdev/xive/xive-internal.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/* ANSI and traditional C compatibility macros
Copyright 1991, 1992 Free Software Foundation, Inc.
This file is part of the GNU C Library.
*/
/* ANSI and traditional C compatibility macros
ANSI C is assumed if __STDC__ is #defined.
Macro ANSI C definition... | arch/powerpc/xmon/ansidecl.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _POWERPC_XMON_DIS_ASM_H
#define _POWERPC_XMON_DIS_ASM_H
/*
* Copyright (C) 2006 Michael Ellerman, IBM Corporation.
*/
extern void print_address (unsigned long memaddr);
#ifdef CONFIG_XMON_DISASSEMBLY
extern int print_insn_powerpc(unsigned long insn, unsigned l... | arch/powerpc/xmon/dis-asm.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 1996-2005 Paul Mackerras.
*/
#include <linux/string.h>
#include <asm/udbg.h>
#include <asm/time.h>
#include "nonstdio.h"
static bool paginating, paginate_skipping;
static unsigned long paginate_lpp; /* Lines Per Page */
static unsigned long paginate_pos... | arch/powerpc/xmon/nonstdio.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#define EOF (-1)
extern void xmon_set_pagination_lpp(unsigned long lpp);
extern void xmon_start_pagination(void);
extern void xmon_end_pagination(void);
extern int xmon_putchar(int c);
extern void xmon_puts(const char *);
extern char *xmon_gets(char *, int);
extern __printf(1, 2)... | arch/powerpc/xmon/nonstdio.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/* ppc-dis.c -- Disassemble PowerPC instructions
Copyright (C) 1994-2016 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
This file is part of GDB, GAS, and the GNU binutils.
*/
#include <asm/cputable.h>
#include <asm/cpu_has_feature.h>
#i... | arch/powerpc/xmon/ppc-dis.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/* ppc-opc.c -- PowerPC opcode list
Copyright (C) 1994-2016 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
This file is part of GDB, GAS, and the GNU binutils.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/bug... | arch/powerpc/xmon/ppc-opc.c | null | null | null | null | null |
source | linux | /* ppc.h -- Header file for PowerPC opcode table
Copyright (C) 1994-2016 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
This file is part of GDB, GAS, and the GNU binutils.
GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms ... | arch/powerpc/xmon/ppc.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#include <asm/ppc_asm.h>
#include <asm/asm-compat.h>
/* unsigned long xmon_mfspr(sprn, default_value) */
_GLOBAL(xmon_mfspr)
LOAD_REG_ADDR(r5, .Lmfspr_table)
b xmon_mxspr
/* void xmon_mtspr(sprn, new_value) */
_GLOBAL(xmon_mtspr)
LOAD_REG_ADDR(r5, .Lmtspr_table)
b xmon_mxspr... | arch/powerpc/xmon/spr_access.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Routines providing a simple monitor for use on the PowerMac.
*
* Copyright (C) 1996-2005 Paul Mackerras.
* Copyright (C) 2001 PPC64 Team, IBM Corp
* Copyrignt (C) 2006 Michael Ellerman, IBM Corp
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linu... | arch/powerpc/xmon/xmon.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#include <asm/ppc_asm.h>
#include <asm/asm-compat.h>
#include <asm/asm-offsets.h>
#include "xmon_bpts.h"
/* Prefixed instructions can not cross 64 byte boundaries */
.align 6
.global bpt_table
bpt_table:
.space NBPTS * BPT_SIZE | arch/powerpc/xmon/xmon_bpts.S | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef XMON_BPTS_H
#define XMON_BPTS_H
#define NBPTS 256
#ifndef __ASSEMBLER__
#include <asm/inst.h>
#define BPT_SIZE (sizeof(ppc_inst_t) * 2)
#define BPT_WORDS (BPT_SIZE / sizeof(ppc_inst_t))
extern unsigned int bpt_table[NBPTS * BPT_WORDS];
#endif /* __ASSEMBLER__ */
#endif ... | arch/powerpc/xmon/xmon_bpts.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
.align 4
.section .payload, "ax", %progbits
.globl _start
_start:
.incbin "arch/riscv/boot/Image" | arch/riscv/boot/loader.S | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#include <asm/page.h>
#include <asm/pgtable.h>
OUTPUT_ARCH(riscv)
ENTRY(_start)
SECTIONS
{
. = KERNEL_LINK_ADDR;
.payload : {
*(.payload)
. = ALIGN(8);
}
} | arch/riscv/boot/loader.lds.S | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Copyright (C) 2025 Inochi Amaoto <inochiama@outlook.com>
*/
#ifndef _SOPHGO_CV18XX_RESET
#define _SOPHGO_CV18XX_RESET
#define RST_DDR 2
#define RST_H264C 3
#define RST_JPEG 4
#define RST_H265C 5
#define RST_VIPSYS 6
#define RST_TDMA 7
#define RST_TPU... | arch/riscv/boot/dts/sophgo/cv18xx-reset.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
/*
* Copyright (C) 2025 Inochi Amaoto <inochiama@gmail.com>
*/
#ifndef _SG2044_RESET_H
#define _SG2044_RESET_H
#define RST_AP_SYS 0
#define RST_AP_SYS_CORE0 1
#define RST_AP_SYS_CORE1 2
#define RST_AP_SYS_CORE2 3
#define RST_AP_SYS_CORE3 4
#define RS... | arch/riscv/boot/dts/sophgo/sg2044-reset.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 OR MIT */
/*
* Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
* Copyright (C) 2022 StarFive Technology Co., Ltd.
*/
#ifndef __JH7110_PINFUNC_H__
#define __JH7110_PINFUNC_H__
/*
* mux bits:
* | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 |
* | din | dout... | arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/aes-macros.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* AES modes using the RISC-V vector crypto extensions
*
* Copyright (C) 2023 VRULL GmbH
* Author: Heiko Stuebner <heiko.stuebner@vrull.eu>
*
* Copyright (C) 2023 SiFive, Inc.
* Author: Jerry Shih <jerry.shih@sifive.com>
*
* Copyright 2024 Google LLC
*/
#include <as... | arch/riscv/crypto/aes-riscv64-glue.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/aes-riscv64-zvkned-zvbb-zvkg.S | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/aes-riscv64-zvkned-zvkb.S | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/aes-riscv64-zvkned.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* GHASH using the RISC-V vector crypto extensions
*
* Copyright (C) 2023 VRULL GmbH
* Author: Heiko Stuebner <heiko.stuebner@vrull.eu>
*
* Copyright (C) 2023 SiFive, Inc.
* Author: Jerry Shih <jerry.shih@sifive.com>
*/
#include <asm/simd.h>
#include <asm/vector.h>
#i... | arch/riscv/crypto/ghash-riscv64-glue.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/ghash-riscv64-zvkg.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* SM3 using the RISC-V vector crypto extensions
*
* Copyright (C) 2023 VRULL GmbH
* Author: Heiko Stuebner <heiko.stuebner@vrull.eu>
*
* Copyright (C) 2023 SiFive, Inc.
* Author: Jerry Shih <jerry.shih@sifive.com>
*/
#include <asm/simd.h>
#include <asm/vector.h>
... | arch/riscv/crypto/sm3-riscv64-glue.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* SM4 using the RISC-V vector crypto extensions
*
* Copyright (C) 2023 VRULL GmbH
* Author: Heiko Stuebner <heiko.stuebner@vrull.eu>
*
* Copyright (C) 2023 SiFive, Inc.
* Author: Jerry Shih <jerry.shih@sifive.com>
*/
#include <asm/simd.h>
#include <asm/vector.h>
#inc... | arch/riscv/crypto/sm4-riscv64-glue.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
//
// This file is dual-licensed, meaning that you can use it under your
// choice of either of the following two licenses:
//
// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under the Apache License 2.0 (the "License"). You ca... | arch/riscv/crypto/sm4-riscv64-zvksed-zvkb.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Erratas to be applied for Andes CPU cores
*
* Copyright (C) 2023 Renesas Electronics Corporation.
*
* Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
*/
#include <linux/memory.h>
#include <linux/module.h>
#include <asm/alternative.h>
#include <asm/c... | arch/riscv/errata/andes/errata.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2025 MIPS.
*/
#include <linux/memory.h>
#include <linux/module.h>
#include <asm/text-patching.h>
#include <asm/alternative.h>
#include <asm/errata_list.h>
#include <asm/vendorid_list.h>
#include <asm/vendor_extensions.h>
#include <asm/vendor_extensions/mips... | arch/riscv/errata/mips/errata.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2021 Sifive.
*/
#include <linux/kernel.h>
#include <linux/memory.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/bug.h>
#include <asm/text-patching.h>
#include <asm/alternative.h>
#include <asm/vendorid_list.h>
#include <asm/errata_li... | arch/riscv/errata/sifive/errata.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2021 SiFive
*/
#include <linux/linkage.h>
#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/alternative.h>
.macro ADD_SIGN_EXT pt_reg badaddr tmp_reg
REG_L \badaddr, PT_BADADDR(\pt_reg)
li \tmp_reg,1
slli \tmp_reg,\tmp_reg,0x26
and \tm... | arch/riscv/errata/sifive/errata_cip_453.S | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2021 Heiko Stuebner <heiko@sntech.de>
*/
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/memory.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/uaccess.h>
#include <asm/alternative.h>
#include <asm/bugs.h>
#include <a... | arch/riscv/errata/thead/errata.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* RISC-V specific ACPICA environments and implementation
*/
#ifndef _ASM_ACENV_H
#define _ASM_ACENV_H
/* This header is required unconditionally by the ACPI core */
#endif /* _ASM_ACENV_H */ | arch/riscv/include/asm/acenv.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2013-2014, Linaro Ltd.
* Author: Al Stone <al.stone@linaro.org>
* Author: Graeme Gregory <graeme.gregory@linaro.org>
* Author: Hanjun Guo <hanjun.guo@linaro.org>
*
* Copyright (C) 2021-2023, Ventana Micro Systems Inc.
* Author: Sunil V L <sunilvl@v... | arch/riscv/include/asm/acpi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ALTERNATIVE_MACROS_H
#define __ASM_ALTERNATIVE_MACROS_H
#ifdef CONFIG_RISCV_ALTERNATIVE
#ifdef __ASSEMBLER__
.macro ALT_ENTRY oldptr newptr vendor_id patch_id new_len
.4byte \oldptr - .
.4byte \newptr - .
.2byte \vendor_id
.2byte \new_len
.4byte \patch_id
.en... | arch/riscv/include/asm/alternative-macros.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2021 Sifive.
*/
#ifndef __ASM_ALTERNATIVE_H
#define __ASM_ALTERNATIVE_H
#include <asm/alternative-macros.h>
#ifndef __ASSEMBLER__
#ifdef CONFIG_RISCV_ALTERNATIVE
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <lin... | arch/riscv/include/asm/alternative.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Based on arch/x86/include/asm/arch_hweight.h
*/
#ifndef _ASM_RISCV_HWEIGHT_H
#define _ASM_RISCV_HWEIGHT_H
#include <asm/alternative-macros.h>
#include <asm/hwcap.h>
#if (BITS_PER_LONG == 64)
#define CPOPW "cpopw "
#elif (BITS_PER_LONG == 32)
#define CPOPW "cpop "
#else
#... | arch/riscv/include/asm/arch_hweight.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Kernel interface for the RISCV arch_random_* functions
*
* Copyright (c) 2023 Rivos Inc.
*
*/
#ifndef ASM_RISCV_ARCHRANDOM_H
#define ASM_RISCV_ARCHRANDOM_H
#include <asm/csr.h>
#include <asm/processor.h>
#define SEED_RETRY_LOOPS 100
static inline bool __must_check cs... | arch/riscv/include/asm/archrandom.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_ASM_EXTABLE_H
#define __ASM_ASM_EXTABLE_H
#define EX_TYPE_NONE 0
#define EX_TYPE_FIXUP 1
#define EX_TYPE_BPF 2
#define EX_TYPE_UACCESS_ERR_ZERO 3
#define EX_TYPE_LOAD_UNALIGNED_ZEROPAD 4
#ifdef CONFIG_MMU
#ifdef __ASSEMBLER__
#define __ASM_EXTABLE_RAW(... | arch/riscv/include/asm/asm-extable.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_PROTOTYPES_H
#define _ASM_RISCV_PROTOTYPES_H
#include <linux/ftrace.h>
#include <asm-generic/asm-prototypes.h>
long long __lshrti3(long long a, int b);
long long __ashrti3(long long a, int b);
long long __ashlti3(long long a, int b);
#ifdef CONFIG_RISCV_ISA_V... | arch/riscv/include/asm/asm-prototypes.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
*/
#ifndef _ASM_RISCV_ASM_H
#define _ASM_RISCV_ASM_H
#ifdef __ASSEMBLER__
#define __ASM_STR(x) x
#else
#define __ASM_STR(x) #x
#endif
#ifdef CONFIG_AS_HAS_INSN
#define ASM_INSN_I(__x) ".insn " __x
#else
#def... | arch/riscv/include/asm/asm.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2023 StarFive Technology Co., Ltd.
*
* Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>
*/
#ifndef __ASSEMBLER__
#error "Only include this from assembly code"
#endif
#ifndef __ASM_ASSEMBLER_H
#define __ASM_ASSEMBLER_H
#include <asm/asm.h>
#include... | arch/riscv/include/asm/assembler.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Copyright (C) 2012 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_ATOMIC_H
#define _ASM_RISCV_ATOMIC_H
#ifdef CONFIG_GENERIC_ATOMIC64
# include <asm-generic/atomi... | arch/riscv/include/asm/atomic.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Based on arch/arm/include/asm/barrier.h
*
* Copyright (C) 2012 ARM Ltd.
* Copyright (C) 2013 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_BARRIER_H
#define _ASM_RISCV_BARRIER_H
#ifndef __ASSEMBLER__
#include <asm/cmpxc... | arch/riscv/include/asm/barrier.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_BITOPS_H
#define _ASM_RISCV_BITOPS_H
#ifndef _LINUX_BITOPS_H
#error "Only <linux/bitops.h> can be included directly"
#endif /* _LINUX_BITOPS_H */
#include <linux/compiler.h>
#include <a... | arch/riscv/include/asm/bitops.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_BUG_H
#define _ASM_RISCV_BUG_H
#include <linux/compiler.h>
#include <linux/const.h>
#include <linux/types.h>
#include <asm/asm.h>
#define __INSN_LENGTH_MASK _UL(0x3)
#define __INSN_LE... | arch/riscv/include/asm/bug.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Interface for managing mitigations for riscv vulnerabilities.
*
* Copyright (C) 2024 Rivos Inc.
*/
#ifndef __ASM_BUGS_H
#define __ASM_BUGS_H
/* Watch out, ordering is important here. */
enum mitigation_state {
UNAFFECTED,
MITIGATED,
VULNERABLE,
};
void ghostwri... | arch/riscv/include/asm/bugs.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2017 Chen Liqin <liqin.chen@sunplusct.com>
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_CACHE_H
#define _ASM_RISCV_CACHE_H
#define L1_CACHE_SHIFT 6
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#ifdef CONFIG_RIS... | arch/riscv/include/asm/cache.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
*/
#ifndef _ASM_RISCV_CACHEFLUSH_H
#define _ASM_RISCV_CACHEFLUSH_H
#include <linux/mm.h>
static inline void local_flush_icache_all(void)
{
asm volatile ("fence.i" ::: "memory");
}
static inline void local_... | arch/riscv/include/asm/cacheflush.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2020 SiFive
*/
#ifndef _ASM_RISCV_CACHEINFO_H
#define _ASM_RISCV_CACHEINFO_H
#include <linux/cacheinfo.h>
struct riscv_cacheinfo_ops {
const struct attribute_group * (*get_priv_group)(struct cacheinfo
*this_leaf);
};
void riscv_set_cacheinfo_ops(st... | arch/riscv/include/asm/cacheinfo.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_CFI_H
#define _ASM_RISCV_CFI_H
/*
* Clang Control Flow Integrity (CFI) support.
*
* Copyright (C) 2023 Google LLC
*/
#include <linux/bug.h>
struct pt_regs;
#ifdef CONFIG_CFI
enum bug_trap_type handle_cfi_failure(struct pt_regs *regs);
#define __bpfcall
#e... | arch/riscv/include/asm/cfi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Checksum routines
*
* Copyright (C) 2023 Rivos Inc.
*/
#ifndef __ASM_RISCV_CHECKSUM_H
#define __ASM_RISCV_CHECKSUM_H
#include <linux/in6.h>
#include <linux/uaccess.h>
#define ip_fast_csum ip_fast_csum
extern unsigned int do_csum(const unsigned char *buff, int len);
#de... | arch/riscv/include/asm/checksum.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2020 Google, Inc
*/
#ifndef _ASM_RISCV_CLINT_H
#define _ASM_RISCV_CLINT_H
#include <linux/types.h>
#include <asm/mmio.h>
#ifdef CONFIG_RISCV_M_MODE
/*
* This lives in the CLINT driver, but is accessed directly by timex.h to avoid
* any overhead when ... | arch/riscv/include/asm/clint.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2014 Regents of the University of California
*/
#ifndef _ASM_RISCV_CMPXCHG_H
#define _ASM_RISCV_CMPXCHG_H
#include <linux/bug.h>
#include <asm/alternative-macros.h>
#include <asm/fence.h>
#include <asm/hwcap.h>
#include <asm/insn-def.h>
#include <asm/c... | arch/riscv/include/asm/cmpxchg.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_COMPAT_H
#define __ASM_COMPAT_H
#define COMPAT_UTS_MACHINE "riscv32\0\0"
/*
* Architecture specific compatibility types
*/
#include <linux/types.h>
#include <linux/sched.h>
#include <asm-generic/compat.h>
static inline int is_compat_task(void)
{
if (!IS_EN... | arch/riscv/include/asm/compat.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_CPU_H
#define _ASM_CPU_H
/* This header is required unconditionally by the ACPI core */
#endif /* _ASM_CPU_H */ | arch/riscv/include/asm/cpu.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020 Western Digital Corporation or its affiliates.
* Based on arch/arm64/include/asm/cpu_ops.h
*/
#ifndef __ASM_CPU_OPS_H
#define __ASM_CPU_OPS_H
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/threads.h>
/**
* struct cpu_operations ... | arch/riscv/include/asm/cpu_ops.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2021 by Rivos Inc.
*/
#ifndef __ASM_CPU_OPS_SBI_H
#define __ASM_CPU_OPS_SBI_H
#ifndef __ASSEMBLER__
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/threads.h>
extern const struct cpu_operations cpu_ops_sbi;
/**
* struct sbi_hart_boot_... | arch/riscv/include/asm/cpu_ops_sbi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2022-2024 Rivos, Inc
*/
#ifndef _ASM_CPUFEATURE_MACROS_H
#define _ASM_CPUFEATURE_MACROS_H
#include <asm/hwcap.h>
#include <asm/alternative-macros.h>
#define STANDARD_EXT 0
bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int... | arch/riscv/include/asm/cpufeature-macros.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2022-2024 Rivos, Inc
*/
#ifndef _ASM_CPUFEATURE_H
#define _ASM_CPUFEATURE_H
#include <linux/bitmap.h>
#include <linux/jump_label.h>
#include <linux/workqueue.h>
#include <linux/kconfig.h>
#include <linux/percpu-defs.h>
#include <linux/threads.h>
#include <a... | arch/riscv/include/asm/cpufeature.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Allwinner Ltd
* Copyright (C) 2021 Western Digital Corporation or its affiliates.
*/
#ifndef _ASM_RISCV_CPUIDLE_H
#define _ASM_RISCV_CPUIDLE_H
#include <asm/barrier.h>
#include <asm/processor.h>
static inline void cpu_do_idle(void)
{
/*
* Add mb() ... | arch/riscv/include/asm/cpuidle.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _RISCV_CRASH_RESERVE_H
#define _RISCV_CRASH_RESERVE_H
#define CRASH_ALIGN PMD_SIZE
#define CRASH_ADDR_LOW_MAX dma32_phys_limit
#define CRASH_ADDR_HIGH_MAX memblock_end_of_DRAM()
extern phys_addr_t memblock_end_of_DRAM(void);
#endif | arch/riscv/include/asm/crash_reserve.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
*/
#ifndef _ASM_RISCV_CSR_H
#define _ASM_RISCV_CSR_H
#include <asm/asm.h>
#include <linux/bits.h>
/* Status register flags */
#define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
#define SR_... | arch/riscv/include/asm/csr.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Based on arm/arm64/include/asm/current.h
*
* Copyright (C) 2016 ARM
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_CURRENT_H
#define _ASM_RISCV_CURRENT_H
#include <linux/bug.h>
#include <linux/compiler.h>
#ifndef __ASSEMBLER__
struct task_struct;
register s... | arch/riscv/include/asm/current.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
* Copyright (C) 2016 Regents of the University of California
*/
#ifndef _ASM_RISCV_DELAY_H
#define _ASM_RISCV_DELAY_H
extern unsigned long riscv_timebase;
#define udelay udelay
extern void udelay(unsigned lon... | arch/riscv/include/asm/delay.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2023 Renesas Electronics Corp.
*/
#ifndef __ASM_DMA_NONCOHERENT_H
#define __ASM_DMA_NONCOHERENT_H
#include <linux/dma-direct.h>
/*
* struct riscv_nonstd_cache_ops - Structure for non-standard CMO function pointers
*
* @wback: Function pointer for ca... | arch/riscv/include/asm/dma-noncoherent.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2024 Intel Corporation
*
* based on arch/arm64/include/asm/dmi.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef __ASM... | arch/riscv/include/asm/dmi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2020 Western Digital Corporation or its affiliates.
*/
#ifndef _ASM_EFI_H
#define _ASM_EFI_H
#include <asm/csr.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/ptrace.h>
#include <asm/tlbflush.h>
#include <asm/pgalloc.h>
#ifdef CONFIG_EFI
ex... | arch/riscv/include/asm/efi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_ELF_H
#define _ASM_RISCV_ELF_H
#include <uapi/linux/elf.h>
#inclu... | arch/riscv/include/asm/elf.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_ENTRY_COMMON_H
#define _ASM_RISCV_ENTRY_COMMON_H
#include <asm/stacktrace.h>
#include <asm/thread_info.h>
#include <asm/vector.h>
static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
unsigned long ti_work)
{
if (ti_work & _TIF_RISC... | arch/riscv/include/asm/entry-common.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2021 Sifive.
*/
#ifndef ASM_ERRATA_LIST_H
#define ASM_ERRATA_LIST_H
#include <asm/csr.h>
#include <asm/insn-def.h>
#include <asm/hwcap.h>
#include <asm/vendorid_list.h>
#include <asm/errata_list_vendors.h>
#include <asm/vendor_extensions/mips.h>
#ifdef ... | arch/riscv/include/asm/errata_list.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef ASM_ERRATA_LIST_VENDORS_H
#define ASM_ERRATA_LIST_VENDORS_H
#ifdef CONFIG_ERRATA_ANDES
#define ERRATA_ANDES_NO_IOCP 0
#define ERRATA_ANDES_NUMBER 1
#endif
#ifdef CONFIG_ERRATA_SIFIVE
#define ERRATA_SIFIVE_CIP_453 0
#define ERRATA_SIFIVE_CIP_1200 1
#define ERRATA_SI... | arch/riscv/include/asm/errata_list_vendors.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_EXEC_H
#define __ASM_EXEC_H
extern unsigned long arch_align_stack(unsigned long sp);
#endif /* __ASM_EXEC_H */ | arch/riscv/include/asm/exec.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_EXTABLE_H
#define _ASM_RISCV_EXTABLE_H
/*
* The exception table consists of pairs of relative offsets: the first
* is the relative offset to an instruction that is allowed to fault,
* and the second is the relative offset at which the program should
* conti... | arch/riscv/include/asm/extable.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_RISCV_FENCE_H
#define _ASM_RISCV_FENCE_H
#define RISCV_FENCE_ASM(p, s) "\tfence " #p "," #s "\n"
#define RISCV_FENCE(p, s) \
({ __asm__ __volatile__ (RISCV_FENCE_ASM(p, s) : : : "memory"); })
#ifdef CONFIG_SMP
#define RISCV_ACQUIRE_BARRIER RISCV_FENCE_ASM(r,... | arch/riscv/include/asm/fence.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 Western Digital Corporation or its affiliates.
*/
#ifndef _ASM_RISCV_FIXMAP_H
#define _ASM_RISCV_FIXMAP_H
#include <linux/kernel.h>
#include <linux/sizes.h>
#include <linux/pgtable.h>
#include <asm/page.h>
#ifdef CONFIG_MMU
/*
* Here we define all the... | arch/riscv/include/asm/fixmap.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2023 SiFive
*/
#ifndef _ASM_RISCV_FPU_H
#define _ASM_RISCV_FPU_H
#include <asm/switch_to.h>
#define kernel_fpu_available() has_fpu()
void kernel_fpu_begin(void);
void kernel_fpu_end(void);
#endif /* ! _ASM_RISCV_FPU_H */ | arch/riscv/include/asm/fpu.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2017 Andes Technology Corporation */
#ifndef _ASM_RISCV_FTRACE_H
#define _ASM_RISCV_FTRACE_H
/*
* The graph frame test is not possible if CONFIG_FRAME_POINTER is not enabled.
* Check arch/riscv/kernel/mcount.S for detail.
*/
#if defined(CONFIG_FUNCTION_GRAPH_... | arch/riscv/include/asm/ftrace.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org)
* Copyright (c) 2018 Jim Wilson (jimw@sifive.com)
*/
#ifndef _ASM_RISCV_FUTEX_H
#define _ASM_RISCV_FUTEX_H
#include <linux/futex.h>
#include <linux/uaccess.h>
#include <linux/errno.h>
#include <asm/asm.h>
#include <... | arch/riscv/include/asm/futex.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_GDB_XML_H_
#define __ASM_GDB_XML_H_
const char riscv_gdb_stub_feature[64] =
"PacketSize=800;qXfer:features:read+;";
static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:";
#ifdef CONFIG_64BIT
static const char gdb_xfer_read_cpuxml[... | arch/riscv/include/asm/gdb_xml.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_GPR_NUM_H
#define __ASM_GPR_NUM_H
#ifdef __ASSEMBLER__
.irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
.equ .L__gpr_num_x\num, \num
.endr
.equ .L__gpr_num_zero, 0
.equ .L__gpr_num_ra, 1
.equ .L__gpr_num_sp... | arch/riscv/include/asm/gpr-num.h | null | null | null | null | null |
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