data_type large_stringclasses 3
values | source large_stringclasses 29
values | code large_stringlengths 98 49.4M | filepath large_stringlengths 5 161 ⌀ | message large_stringclasses 234
values | commit large_stringclasses 234
values | subject large_stringclasses 418
values | critique large_stringlengths 101 1.26M ⌀ | metadata dict |
|---|---|---|---|---|---|---|---|---|
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_HUGETLB_H
#define _ASM_RISCV_HUGETLB_H
#include <asm/cacheflush.h>
#include <asm/page.h>
static inline void arch_clear_hugetlb_flags(struct folio *folio)
{
clear_bit(PG_dcache_clean, &folio->flags.f);
}
#define arch_clear_hugetlb_flags arch_clear_hugetlb_flag... | arch/riscv/include/asm/hugetlb.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copied from arch/arm64/include/asm/hwcap.h
*
* Copyright (C) 2012 ARM Ltd.
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_HWCAP_H
#define _ASM_RISCV_HWCAP_H
#include <uapi/asm/hwcap.h>
#define RISCV_ISA_EXT_a ('a' - 'a')
#define RISCV_ISA_EXT_c ('c' - 'a')
#d... | arch/riscv/include/asm/hwcap.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright 2023-2024 Rivos, Inc
*/
#ifndef _ASM_HWPROBE_H
#define _ASM_HWPROBE_H
#include <uapi/asm/hwprobe.h>
#define RISCV_HWPROBE_MAX_KEY 16
static inline bool riscv_hwprobe_key_is_valid(__s64 key)
{
return key >= 0 && key <= RISCV_HWPROBE_MA... | arch/riscv/include/asm/hwprobe.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_IMAGE_H
#define _ASM_RISCV_IMAGE_H
#define RISCV_IMAGE_MAGIC "RISCV\0\0\0"
#define RISCV_IMAGE_MAGIC2 "RSC\x05"
#define RISCV_IMAGE_FLAG_BE_SHIFT 0
#define RISCV_IMAGE_FLAG_BE_MASK 0x1
#define RISCV_IMAGE_FLAG_LE 0
#define RISCV_IMAGE_FLAG_BE 1
#ifdef CON... | arch/riscv/include/asm/image.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_INSN_DEF_H
#define __ASM_INSN_DEF_H
#include <asm/asm.h>
#define INSN_R_FUNC7_SHIFT 25
#define INSN_R_RS2_SHIFT 20
#define INSN_R_RS1_SHIFT 15
#define INSN_R_FUNC3_SHIFT 12
#define INSN_R_RD_SHIFT 7
#define INSN_R_OPCODE_SHIFT 0
#define INSN_I_SIMM1... | arch/riscv/include/asm/insn-def.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2020 SiFive
*/
#ifndef _ASM_RISCV_INSN_H
#define _ASM_RISCV_INSN_H
#include <linux/bits.h>
#define RV_INSN_FUNCT3_MASK GENMASK(14, 12)
#define RV_INSN_FUNCT3_OPOFF 12
#define RV_INSN_OPCODE_MASK GENMASK(6, 0)
#define RV_INSN_OPCODE_OPOFF 0
#define RV_I... | arch/riscv/include/asm/insn.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* {read,write}{b,w,l,q} based on arch/arm64/include/asm/io.h
* which was based on arch/arm/include/io.h
*
* Copyright (C) 1996-2000 Russell King
* Copyright (C) 2012 ARM Ltd.
* Copyright (C) 2014 Regents of the University of California
*/
#ifndef _ASM_RISCV_IO_H
... | arch/riscv/include/asm/io.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_IRQ_H
#define _ASM_RISCV_IRQ_H
#include <linux/interrupt.h>
#include <linux/linkage.h>
#include <asm-generic/irq.h>
#define INVALID_CONTEXT UINT_MAX
#ifde... | arch/riscv/include/asm/irq.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_IRQ_STACK_H
#define _ASM_RISCV_IRQ_STACK_H
#include <linux/bug.h>
#include <linux/gfp.h>
#include <linux/kconfig.h>
#include <linux/vmalloc.h>
#include <linux/pgtable.h>
#include <asm/thread_info.h>
DECLARE_PER_CPU(ulong *, irq_stack_ptr);
asmlinkage void ca... | arch/riscv/include/asm/irq_stack.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_IRQ_WORK_H
#define _ASM_RISCV_IRQ_WORK_H
static inline bool arch_irq_work_has_interrupt(void)
{
return IS_ENABLED(CONFIG_SMP);
}
#endif /* _ASM_RISCV_IRQ_WORK_H */ | arch/riscv/include/asm/irq_work.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_IRQFLAGS_H
#define _ASM_RISCV_IRQFLAGS_H
#include <asm/csr.h>
/* read interrupt enabled status */
static inline unsigned long arch_local_save_flags(void)
{
return csr_read(CSR_STATUS)... | arch/riscv/include/asm/irqflags.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2020 Emil Renner Berthing
*
* Based on arch/arm64/include/asm/jump_label.h
*/
#ifndef __ASM_JUMP_LABEL_H
#define __ASM_JUMP_LABEL_H
#ifndef __ASSEMBLER__
#include <linux/types.h>
#include <asm/asm.h>
#define HAVE_JUMP_LABEL_BATCH
#define JUMP_LABEL_... | arch/riscv/include/asm/jump_label.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2019 Andes Technology Corporation */
#ifndef __ASM_KASAN_H
#define __ASM_KASAN_H
#ifndef __ASSEMBLER__
/*
* The following comment was copied from arm64:
* KASAN_SHADOW_START: beginning of the kernel virtual addresses.
* KASAN_SHADOW_END: KASAN_SHADOW_START +... | arch/riscv/include/asm/kasan.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_ARC_KDEBUG_H
#define _ASM_ARC_KDEBUG_H
enum die_val {
DIE_UNUSED,
DIE_TRAP,
DIE_OOPS
};
#endif | arch/riscv/include/asm/kdebug.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 FORTH-ICS/CARV
* Nick Kossifidis <mick@ics.forth.gr>
*/
#ifndef _RISCV_KEXEC_H
#define _RISCV_KEXEC_H
#include <asm/page.h> /* For PAGE_SIZE */
/* Maximum physical address we can use pages from */
#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
/* Maxim... | arch/riscv/include/asm/kexec.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_KFENCE_H
#define _ASM_RISCV_KFENCE_H
#include <linux/kfence.h>
#include <linux/pfn.h>
#include <asm-generic/pgalloc.h>
#include <asm/pgtable.h>
static inline bool arch_kfence_init_pool(void)
{
return true;
}
static inline bool kfence_protect_page(unsigned l... | arch/riscv/include/asm/kfence.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_KGDB_H_
#define __ASM_KGDB_H_
#include <linux/build_bug.h>
#ifdef __KERNEL__
#define GDB_SIZEOF_REG sizeof(unsigned long)
#define DBG_MAX_REG_NUM 36
#define NUMREGBYTES (DBG_MAX_REG_NUM * GDB_SIZEOF_REG)
#define CACHE_FLUSH_IS_SAFE 1
#define BUFMAX ... | arch/riscv/include/asm/kgdb.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copied from arch/arm64/include/asm/kprobes.h
*
* Copyright (C) 2013 Linaro Limited
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_KPROBES_H
#define _ASM_RISCV_KPROBES_H
#include <asm-generic/kprobes.h>
#ifdef CONFIG_KPROBES
#include <linux/types.h>
#include <l... | arch/riscv/include/asm/kprobes.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2021 Western Digital Corporation or its affiliates.
* Copyright (C) 2022 Ventana Micro Systems Inc.
*
* Authors:
* Anup Patel <apatel@ventanamicro.com>
*/
#ifndef __KVM_RISCV_AIA_H
#define __KVM_RISCV_AIA_H
#include <linux/jump_label.h>
#include <li... | arch/riscv/include/asm/kvm_aia.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2019 Western Digital Corporation or its affiliates.
* Copyright (c) 2025 Ventana Micro Systems Inc.
*/
#ifndef __RISCV_KVM_GSTAGE_H_
#define __RISCV_KVM_GSTAGE_H_
#include <linux/kvm_types.h>
struct kvm_gstage {
struct kvm *kvm;
unsigned long flags;... | arch/riscv/include/asm/kvm_gstage.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2019 Western Digital Corporation or its affiliates.
*
* Authors:
* Anup Patel <anup.patel@wdc.com>
*/
#ifndef __RISCV_KVM_HOST_H__
#define __RISCV_KVM_HOST_H__
#include <linux/types.h>
#include <linux/kvm.h>
#include <linux/kvm_types.h>
#include ... | arch/riscv/include/asm/kvm_host.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2025 Ventana Micro Systems Inc.
*/
#ifndef __RISCV_KVM_MMU_H_
#define __RISCV_KVM_MMU_H_
#include <asm/kvm_gstage.h>
int kvm_riscv_mmu_ioremap(struct kvm *kvm, gpa_t gpa, phys_addr_t hpa,
unsigned long size, bool writable, bool in_atomic);
void kv... | arch/riscv/include/asm/kvm_mmu.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2024 Ventana Micro Systems Inc.
*/
#ifndef __KVM_NACL_H
#define __KVM_NACL_H
#include <linux/jump_label.h>
#include <linux/percpu.h>
#include <asm/byteorder.h>
#include <asm/csr.h>
#include <asm/sbi.h>
struct kvm_vcpu_arch;
DECLARE_STATIC_KEY_FALSE(kv... | arch/riscv/include/asm/kvm_nacl.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2025 Ventana Micro Systems Inc.
*/
#ifndef __RISCV_KVM_TLB_H_
#define __RISCV_KVM_TLB_H_
#include <linux/kvm_types.h>
enum kvm_riscv_hfence_type {
KVM_RISCV_HFENCE_UNKNOWN = 0,
KVM_RISCV_HFENCE_GVMA_VMID_GPA,
KVM_RISCV_HFENCE_GVMA_VMID_ALL,
KVM_RIS... | arch/riscv/include/asm/kvm_tlb.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_KVM_TYPES_H
#define _ASM_RISCV_KVM_TYPES_H
#define KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE 32
#endif /* _ASM_RISCV_KVM_TYPES_H */ | arch/riscv/include/asm/kvm_types.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2021 Western Digital Corporation or its affiliates.
*
* Authors:
* Atish Patra <atish.patra@wdc.com>
* Anup Patel <anup.patel@wdc.com>
*/
#ifndef __KVM_VCPU_RISCV_FP_H
#define __KVM_VCPU_RISCV_FP_H
#include <linux/types.h>
struct kvm_cpu_co... | arch/riscv/include/asm/kvm_vcpu_fp.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 Ventana Micro Systems Inc.
*/
#ifndef __KVM_VCPU_RISCV_INSN_H
#define __KVM_VCPU_RISCV_INSN_H
struct kvm_vcpu;
struct kvm_run;
struct kvm_cpu_trap;
struct kvm_mmio_decode {
unsigned long insn;
int insn_len;
int len;
int shift;
int return_hand... | arch/riscv/include/asm/kvm_vcpu_insn.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2023 Rivos Inc
*
* Authors:
* Atish Patra <atishp@rivosinc.com>
*/
#ifndef __KVM_VCPU_RISCV_PMU_H
#define __KVM_VCPU_RISCV_PMU_H
#include <linux/perf/riscv_pmu.h>
#include <asm/kvm_vcpu_insn.h>
#include <asm/sbi.h>
#ifdef CONFIG_RISCV_PMU_SBI
#d... | arch/riscv/include/asm/kvm_vcpu_pmu.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/**
* Copyright (c) 2021 Western Digital Corporation or its affiliates.
*
* Authors:
* Atish Patra <atish.patra@wdc.com>
*/
#ifndef __RISCV_KVM_VCPU_SBI_H__
#define __RISCV_KVM_VCPU_SBI_H__
#define KVM_SBI_IMPID 3
#define KVM_SBI_VERSION_MAJOR 3
#define KVM_SBI_VE... | arch/riscv/include/asm/kvm_vcpu_sbi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2025 Rivos Inc.
*
* Authors:
* Clément Léger <cleger@rivosinc.com>
*/
#ifndef __KVM_VCPU_RISCV_FWFT_H
#define __KVM_VCPU_RISCV_FWFT_H
#include <asm/sbi.h>
struct kvm_sbi_fwft_feature;
struct kvm_sbi_fwft_config {
const struct kvm_sbi_fwft_feat... | arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2019 Western Digital Corporation or its affiliates.
*
* Authors:
* Atish Patra <atish.patra@wdc.com>
*/
#ifndef __KVM_VCPU_RISCV_TIMER_H
#define __KVM_VCPU_RISCV_TIMER_H
#include <linux/hrtimer.h>
struct kvm_guest_timer {
/* Mult & Shift values to ... | arch/riscv/include/asm/kvm_vcpu_timer.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2022 SiFive
*
* Authors:
* Vincent Chen <vincent.chen@sifive.com>
* Greentime Hu <greentime.hu@sifive.com>
*/
#ifndef __KVM_VCPU_RISCV_VECTOR_H
#define __KVM_VCPU_RISCV_VECTOR_H
#include <linux/types.h>
#ifdef CONFIG_RISCV_ISA_V
#include <a... | arch/riscv/include/asm/kvm_vcpu_vector.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2025 Ventana Micro Systems Inc.
*/
#ifndef __RISCV_KVM_VMID_H_
#define __RISCV_KVM_VMID_H_
#include <linux/kvm_types.h>
struct kvm_vmid {
/*
* Writes to vmid_version and vmid happen with vmid_lock held
* whereas reads happen without any lock held.... | arch/riscv/include/asm/kvm_vmid.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
*/
#ifndef _ASM_RISCV_LINKAGE_H
#define _ASM_RISCV_LINKAGE_H
#define __ALIGN .balign 4
#define __ALIGN_STR ".balign 4"
#endif /* _ASM_RISCV_LINKAGE_H */ | arch/riscv/include/asm/linkage.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_RISCV_MEMBARRIER_H
#define _ASM_RISCV_MEMBARRIER_H
static inline void membarrier_arch_switch_mm(struct mm_struct *prev,
struct mm_struct *next,
struct task_struct *tsk)
{
/*
* Only need the full barrier when switching between processes.
... | arch/riscv/include/asm/membarrier.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_MMAN_H__
#define __ASM_MMAN_H__
#include <linux/compiler.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <uapi/asm/mman.h>
static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,
unsigned long pkey __always_unused)
{
unsigned lon... | arch/riscv/include/asm/mman.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* {read,write}{b,w,l,q} based on arch/arm64/include/asm/io.h
* which was based on arch/arm/include/io.h
*
* Copyright (C) 1996-2000 Russell King
* Copyright (C) 2012 ARM Ltd.
* Copyright (C) 2014 Regents of the University of California
*/
#ifndef _ASM_RISCV_MMIO_... | arch/riscv/include/asm/mmio.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_MMIOWB_H
#define _ASM_RISCV_MMIOWB_H
/*
* "o,w" is sufficient to ensure that all writes to the device have completed
* before the write to the spinlock is allowed to commit.
*/
#define mmiowb() RISCV_FENCE(o, w)
#include <linux/smp.h>
#include <asm-generic... | arch/riscv/include/asm/mmiowb.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_MMU_H
#define _ASM_RISCV_MMU_H
#ifndef __ASSEMBLER__
typedef struct {
#ifndef CONFIG_MMU
unsigned long end_brk;
#else
atomic_long_t id;
#endif
void *vdso;
#ifdef CONFIG_SMP
/* A lo... | arch/riscv/include/asm/mmu.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_MMU_CONTEXT_H
#define _ASM_RISCV_MMU_CONTEXT_H
#include <linux/mm_types.h>
#include <asm-generic/mm_hooks.h>
#include <linux/mm.h>
#include <linux/sched.h>
... | arch/riscv/include/asm/mmu_context.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2017 Andes Technology Corporation */
#ifndef _ASM_RISCV_MODULE_H
#define _ASM_RISCV_MODULE_H
#include <asm-generic/module.h>
#include <linux/elf.h>
struct module;
unsigned long module_emit_got_entry(struct module *mod, unsigned long val);
unsigned long module_e... | arch/riscv/include/asm/module.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2017 Andes Technology Corporation */
#ifdef CONFIG_MODULE_SECTIONS
SECTIONS {
.plt : { BYTE(0) }
.got : { BYTE(0) }
.got.plt : { BYTE(0) }
}
#endif | arch/riscv/include/asm/module.lds.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
* Copyright (C) 2012 Regents of the University of California
* Copyright (C) 2017 SiFive
* Copyright (C) 2017 XiaojingZhu <zhuxiaoj@ict.ac.cn>
*/
#ifndef _ASM_RISCV_PAGE_H
#define _ASM_RISCV_PAGE_H
#include ... | arch/riscv/include/asm/page.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_PARAVIRT_H
#define _ASM_RISCV_PARAVIRT_H
#ifdef CONFIG_PARAVIRT
int __init pv_time_init(void);
#else
#define pv_time_init() do {} while (0)
#endif /* CONFIG_PARAVIRT */
#endif /* _ASM_RISCV_PARAVIRT_H */ | arch/riscv/include/asm/paravirt.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2016 SiFive
*/
#ifndef _ASM_RISCV_PCI_H
#define _ASM_RISCV_PCI_H
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/dma-mapping.h>
#include <asm/io.h>
#define PCIBIOS_MIN_IO 4
#define PCIBIOS_MIN_MEM 16
#if defined(CONFIG_PCI) && defi... | arch/riscv/include/asm/pci.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2018 SiFive
* Copyright (C) 2018 Andes Technology Corporation
*
*/
#ifndef _ASM_RISCV_PERF_EVENT_H
#define _ASM_RISCV_PERF_EVENT_H
#ifdef CONFIG_PERF_EVENTS
#include <linux/perf_event.h>
#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)r... | arch/riscv/include/asm/perf_event.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PGALLOC_H
#define _ASM_RISCV_PGALLOC_H
#include <linux/mm.h>
#include <asm/sbi.h>
#include <asm/tlb.h>
#ifdef CONFIG_MMU
#def... | arch/riscv/include/asm/pgalloc.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PGTABLE_32_H
#define _ASM_RISCV_PGTABLE_32_H
#include <asm-generic/pgtable-nopmd.h>
#include <linux/bits.h>
#include <linux/const.h>
/* Size of region mapped by a page global directory ... | arch/riscv/include/asm/pgtable-32.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PGTABLE_64_H
#define _ASM_RISCV_PGTABLE_64_H
#include <linux/bits.h>
#include <linux/const.h>
#include <asm/errata_list.h>
extern bool pgtable_l4_enabled;
extern bool pgtable_l5_enabled... | arch/riscv/include/asm/pgtable-64.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PGTABLE_BITS_H
#define _ASM_RISCV_PGTABLE_BITS_H
#define _PAGE_ACCESSED_OFFSET 6
#define _PAGE_PRESENT (1 << 0)
#define _PAGE_READ (1 << 1) /* Readable */
#define _PAGE_WRITE ... | arch/riscv/include/asm/pgtable-bits.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PGTABLE_H
#define _ASM_RISCV_PGTABLE_H
#include <linux/mmzone.h>
#include <linux/sizes.h>
#include <asm/pgtable-bits.h>
#ifndef CONFIG_MMU
#ifdef CONFIG_RELOCATABLE
#define KERNEL_LINK... | arch/riscv/include/asm/pgtable.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_PROBES_H
#define _ASM_RISCV_PROBES_H
typedef u32 probe_opcode_t;
typedef bool (probes_handler_t) (u32 opcode, unsigned long addr, struct pt_regs *);
/* architecture specific copy of original instruction */
struct arch_probe_insn {
probe_opcode_t *insn;
prob... | arch/riscv/include/asm/probes.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PROCESSOR_H
#define _ASM_RISCV_PROCESSOR_H
#include <linux/const.h>
#include <linux/cache.h>
#include <linux/prctl.h>
#include <vdso/processor.h>
#include <asm/ptrace.h>
#include <asm/... | arch/riscv/include/asm/processor.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_PTRACE_H
#define _ASM_RISCV_PTRACE_H
#include <uapi/asm/ptrace.h>
#include <asm/csr.h>
#include <linux/compiler.h>
#ifndef __ASSEMBLER__
struct pt_regs {
unsigned long epc;
unsigned ... | arch/riscv/include/asm/ptrace.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_RUNTIME_CONST_H
#define _ASM_RISCV_RUNTIME_CONST_H
#include <asm/asm.h>
#include <asm/alternative.h>
#include <asm/cacheflush.h>
#include <asm/insn-def.h>
#include <linux/memory.h>
#include <asm/text-patching.h>
#include <linux/uaccess.h>
#ifdef CONFIG_32BIT
... | arch/riscv/include/asm/runtime-const.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
* Copyright (c) 2020 Western Digital Corporation or its affiliates.
*/
#ifndef _ASM_RISCV_SBI_H
#define _ASM_RISCV_SBI_H
#include <linux/types.h>
#include <linux/cpumask.h>
#include <linux/jump_label.h>
#if... | arch/riscv/include/asm/sbi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_SCS_H
#define _ASM_SCS_H
#ifdef __ASSEMBLER__
#include <asm/asm-offsets.h>
#ifdef CONFIG_SHADOW_CALL_STACK
/* Load init_shadow_call_stack to gp. */
.macro scs_load_init_stack
la gp, init_shadow_call_stack
XIP_FIXUP_OFFSET gp
.endm
/* Load the per-CPU IRQ shadow ... | arch/riscv/include/asm/scs.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_SECCOMP_H
#define _ASM_SECCOMP_H
#include <asm/unistd.h>
#include <asm-generic/seccomp.h>
#ifdef CONFIG_64BIT
# define SECCOMP_ARCH_NATIVE AUDIT_ARCH_RISCV64
# define SECCOMP_ARCH_NATIVE_NR NR_syscalls
# define SECCOMP_ARCH_NATIVE_NAME "riscv64"
#else /* !CONFIG... | arch/riscv/include/asm/seccomp.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2020 Western Digital Corporation or its affiliates.
*/
#ifndef __ASM_SECTIONS_H
#define __ASM_SECTIONS_H
#include <asm-generic/sections.h>
#include <linux/mm.h>
extern char _start[];
extern char _start_kernel[];
extern char __init_data_begin[], __init_d... | arch/riscv/include/asm/sections.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2022 tinylab.org
* Author: Bin Meng <bmeng@tinylab.org>
*/
#ifndef _RISCV_SEMIHOST_H_
#define _RISCV_SEMIHOST_H_
struct uart_port;
static inline void smh_putc(struct uart_port *port, unsigned char c)
{
asm volatile("addi a1, %0, 0\n"
"addi a0... | arch/riscv/include/asm/semihost.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2019 SiFive
*/
#ifndef _ASM_RISCV_SET_MEMORY_H
#define _ASM_RISCV_SET_MEMORY_H
#ifndef __ASSEMBLER__
/*
* Functions to change memory attributes.
*/
#ifdef CONFIG_MMU
int set_memory_ro(unsigned long addr, int numpages);
int set_memory_rw(unsigned long ... | arch/riscv/include/asm/set_memory.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_SIGNAL32_H
#define __ASM_SIGNAL32_H
#if IS_ENABLED(CONFIG_COMPAT)
int compat_setup_rt_frame(struct ksignal *ksig, sigset_t *set,
struct pt_regs *regs);
#else
static inline
int compat_setup_rt_frame(struct ksignal *ksig, sigset_t *set,
struct pt_regs ... | arch/riscv/include/asm/signal32.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
* Copyright (C) 2023 SiFive
*/
#ifndef __ASM_SIMD_H
#define __ASM_SIMD_H
#include <linux/compiler.h>
#include <linux/irqflags.h>
#include <linux/percpu.h>
#include <linux/preempt.h>
#include <linux/types.h>
... | arch/riscv/include/asm/simd.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_SMP_H
#define _ASM_RISCV_SMP_H
#include <linux/cpumask.h>
#include <linux/irqreturn.h>
#include <linux/thread_info.h>
#define INVALID_HARTID ULONG_MAX
struct seq_file;
extern unsigned ... | arch/riscv/include/asm/smp.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2020 Western Digital Corporation or its affiliates.
* Copyright (C) 2020 Google, Inc
*/
#ifndef _ASM_RISCV_SOC_H
#define _ASM_RISCV_SOC_H
#include <linux/of.h>
#include <linux/linkage.h>
#include <linux/types.h>
#define SOC_EARLY_INIT_DECLARE(name... | arch/riscv/include/asm/soc.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_SPARSEMEM_H
#define _ASM_RISCV_SPARSEMEM_H
#ifdef CONFIG_SPARSEMEM
#ifdef CONFIG_64BIT
#define MAX_PHYSMEM_BITS 56
#else
#define MAX_PHYSMEM_BITS 32
#endif /* CONFIG_64BIT */
#define SECTION_SIZE_BITS 27
#endif /* CONFIG_SPARSEMEM */
#endif /* _ASM_RISCV_SPAR... | arch/riscv/include/asm/sparsemem.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_RISCV_SPINLOCK_H
#define __ASM_RISCV_SPINLOCK_H
#ifdef CONFIG_QUEUED_SPINLOCKS
#define _Q_PENDING_LOOPS (1 << 9)
#endif
#ifdef CONFIG_RISCV_COMBO_SPINLOCKS
#define __no_arch_spinlock_redefine
#include <asm/ticket_spinlock.h>
#include <asm/qspinlock.h>
#include <a... | arch/riscv/include/asm/spinlock.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_STACKPROTECTOR_H
#define _ASM_RISCV_STACKPROTECTOR_H
extern unsigned long __stack_chk_guard;
/*
* Initialize the stackprotector canary value.
*
* NOTE: this must only be called from functions that never return,
* and it must always be inlined.
*/
static ... | arch/riscv/include/asm/stackprotector.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_STACKTRACE_H
#define _ASM_RISCV_STACKTRACE_H
#include <linux/sched.h>
#include <asm/ptrace.h>
struct stackframe {
unsigned long fp;
unsigned long ra;
};
extern void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
bool (*fn)(... | arch/riscv/include/asm/stacktrace.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2013 Regents of the University of California
*/
#ifndef _ASM_RISCV_STRING_H
#define _ASM_RISCV_STRING_H
#include <linux/types.h>
#include <linux/linkage.h>
#define __HAVE_ARCH_MEMSET
extern asmlinkage void *memset(void *, int, size_t);
extern asmlinkag... | arch/riscv/include/asm/string.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2021 Western Digital Corporation or its affiliates.
* Copyright (c) 2022 Ventana Micro Systems Inc.
*/
#ifndef _ASM_RISCV_SUSPEND_H
#define _ASM_RISCV_SUSPEND_H
#include <asm/ptrace.h>
struct suspend_context {
/* Saved and restored by low-level funct... | arch/riscv/include/asm/suspend.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_RISCV_SWAB_H
#define _ASM_RISCV_SWAB_H
#include <linux/types.h>
#include <linux/compiler.h>
#include <asm/cpufeature-macros.h>
#include <asm/hwcap.h>
#include <asm-generic/swab.h>
#if defined(CONFIG_TOOLCHAIN_HAS_ZBB) && defined(CONFIG_RISCV_ISA_ZBB) && !define... | arch/riscv/include/asm/swab.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_SWITCH_TO_H
#define _ASM_RISCV_SWITCH_TO_H
#include <linux/jump_label.h>
#include <linux/sched/task_stack.h>
#include <linux/mm_types.h>
#include <asm/vector.h>
#include <asm/cpufeature.... | arch/riscv/include/asm/switch_to.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_SYNC_CORE_H
#define _ASM_RISCV_SYNC_CORE_H
/*
* RISC-V implements return to user-space through an xRET instruction,
* which is not core serializing.
*/
static inline void sync_core_before_usermode(void)
{
asm volatile ("fence.i" ::: "memory");
}
#ifdef CON... | arch/riscv/include/asm/sync_core.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2008-2009 Red Hat, Inc. All rights reserved.
* Copyright 2010 Tilera Corporation. All Rights Reserved.
* Copyright 2015 Regents of the University of California, Berkeley
*
* See asm-generic/syscall.h for descriptions of what we must do here.
*/
#ifn... | arch/riscv/include/asm/syscall.h | null | null | null | null | null |
source | linux | #include <asm/bitsperlong.h>
#if __BITS_PER_LONG == 64
#include <asm/syscall_table_64.h>
#else
#include <asm/syscall_table_32.h>
#endif | arch/riscv/include/asm/syscall_table.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* syscall_wrapper.h - riscv specific wrappers to syscall definitions
*
* Based on arch/arm64/include/syscall_wrapper.h
*/
#ifndef __ASM_SYSCALL_WRAPPER_H
#define __ASM_SYSCALL_WRAPPER_H
#include <asm/ptrace.h>
asmlinkage long __riscv_sys_ni_syscall(const struct pt_regs *... | arch/riscv/include/asm/syscall_wrapper.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2020 SiFive
*/
#ifndef _ASM_RISCV_PATCH_H
#define _ASM_RISCV_PATCH_H
int patch_insn_write(void *addr, const void *insn, size_t len);
int patch_text_nosync(void *addr, const void *insns, size_t len);
int patch_text_set_nosync(void *addr, u8 c, size_t len... | arch/riscv/include/asm/text-patching.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
* Copyright (C) 2012 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_THREAD_INFO_H
#define _ASM_RISCV_THREAD_INFO_H
#include <asm/page.h>
#include <linux/const.h>
#in... | arch/riscv/include/asm/thread_info.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_TIMEX_H
#define _ASM_RISCV_TIMEX_H
#include <asm/csr.h>
typedef unsigned long cycles_t;
#ifdef CONFIG_RISCV_M_MODE
#include <asm/clint.h>
#ifdef CONFIG_64BIT
static inline cycles_t g... | arch/riscv/include/asm/timex.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_TLB_H
#define _ASM_RISCV_TLB_H
struct mmu_gather;
static void tlb_flush(struct mmu_gather *tlb);
#define tlb_flush tlb_flush
#include <asm-generic/tlb.h>
static inline void tlb_flush(... | arch/riscv/include/asm/tlb.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2023 Rivos Inc.
*/
#ifndef _ASM_RISCV_TLBBATCH_H
#define _ASM_RISCV_TLBBATCH_H
#include <linux/cpumask.h>
struct arch_tlbflush_unmap_batch {
struct cpumask cpumask;
};
#endif /* _ASM_RISCV_TLBBATCH_H */ | arch/riscv/include/asm/tlbbatch.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
* Copyright (C) 2012 Regents of the University of California
*/
#ifndef _ASM_RISCV_TLBFLUSH_H
#define _ASM_RISCV_TLBFLUSH_H
#include <linux/mm_types.h>
#include <asm/smp.h>
#include <asm/errata_list.h>
#defin... | arch/riscv/include/asm/tlbflush.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_TOPOLOGY_H
#define _ASM_RISCV_TOPOLOGY_H
#include <linux/arch_topology.h>
#ifdef CONFIG_NUMA
#include <asm/numa.h>
#endif
/* Replace task scheduler's default frequency-invariant accounting */
#define arch_scale_freq_tick topology_scale_freq_tick
#define arch... | arch/riscv/include/asm/topology.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#undef TRACE_SYSTEM
#define TRACE_SYSTEM riscv
#if !defined(_TRACE_RISCV_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_RISCV_H
#include <linux/tracepoint.h>
TRACE_EVENT_CONDITION(sbi_call,
TP_PROTO(int ext, int fid),
TP_ARGS(ext, fid),
TP_CONDITION(ext != SBI_EXT_HSM... | arch/riscv/include/asm/trace.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*
* This file was copied from include/asm-generic/uaccess.h
*/
#ifndef _ASM_RISCV_UACCESS_H
#define _ASM_RISCV_UACCESS_H
#include <asm/asm-extable.h>
#include <asm/cpufeature.h>
#include <asm/pgtable.h> /*... | arch/riscv/include/asm/uaccess.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*/
#define __ARCH_WANT_SYS_CLONE
#ifdef CONFIG_COMPAT
#define __ARCH_WANT_COMPAT_TRUNCATE64
#define __ARCH_WANT_COMPAT_FTRUNCATE64
#define __ARCH_WANT_COMPAT_FALLOCATE
#define __ARCH_WANT_COMPAT_PREAD64
#defi... | arch/riscv/include/asm/unistd.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_RISCV_UPROBES_H
#define _ASM_RISCV_UPROBES_H
#include <asm/probes.h>
#include <asm/text-patching.h>
#include <asm/bug.h>
#define MAX_UINSN_BYTES 8
#ifdef CONFIG_RISCV_ISA_C
#define UPROBE_SWBP_INSN __BUG_INSN_16
#define UPROBE_SWBP_INSN_SIZE 2
#else
#define ... | arch/riscv/include/asm/uprobes.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0
* Copyright (C) 2024 Rivos, Inc.
* Deepak Gupta <debug@rivosinc.com>
*/
#ifndef _ASM_RISCV_USERCFI_H
#define _ASM_RISCV_USERCFI_H
#define CMDLINE_DISABLE_RISCV_USERCFI_FCFI 1
#define CMDLINE_DISABLE_RISCV_USERCFI_BCFI 2
#define CMDLINE_DISABLE_RISCV_USERCFI 3
#ifndef __ASSEMBLE... | arch/riscv/include/asm/usercfi.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 ARM Limited
* Copyright (C) 2014 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_VDSO_H
#define _ASM_RISCV_VDSO_H
/*
* All systems with an MMU have a VDSO, but systems without an MMU don't
* support sha... | arch/riscv/include/asm/vdso.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2020 SiFive
*/
#ifndef __ASM_RISCV_VECTOR_H
#define __ASM_RISCV_VECTOR_H
#include <linux/types.h>
#include <uapi/asm-generic/errno.h>
#ifdef CONFIG_RISCV_ISA_V
#include <linux/stringify.h>
#include <linux/sched.h>
#include <linux/sched/task_stack.... | arch/riscv/include/asm/vector.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2024 Rivos, Inc
*/
#ifndef _ASM_VENDOR_EXTENSIONS_H
#define _ASM_VENDOR_EXTENSIONS_H
#include <asm/cpufeature.h>
#include <linux/array_size.h>
#include <linux/types.h>
/*
* The extension keys of each vendor must be strictly less than this value.
*/
#def... | arch/riscv/include/asm/vendor_extensions.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2021 SiFive
*/
#ifndef ASM_VENDOR_LIST_H
#define ASM_VENDOR_LIST_H
#define ANDES_VENDOR_ID 0x31e
#define MICROCHIP_VENDOR_ID 0x029
#define MIPS_VENDOR_ID 0x127
#define SIFIVE_VENDOR_ID 0x489
#define THEAD_VENDOR_ID 0x5b7
#endif | arch/riscv/include/asm/vendorid_list.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2017 Andes Technology Corporation */
#ifndef _ASM_VERMAGIC_H
#define _ASM_VERMAGIC_H
#define MODULE_ARCH_VERMAGIC "riscv"
#endif /* _ASM_VERMAGIC_H */ | arch/riscv/include/asm/vermagic.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _ASM_RISCV_VMALLOC_H
#define _ASM_RISCV_VMALLOC_H
#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
extern bool pgtable_l4_enabled, pgtable_l5_enabled;
#define IOREMAP_MAX_ORDER (PUD_SHIFT)
#define arch_vmap_pud_supported arch_vmap_pud_supported
static inline bool arch_vmap_pud_s... | arch/riscv/include/asm/vmalloc.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2012 Regents of the University of California
*
* Derived from arch/x86/include/asm/word-at-a-time.h
*/
#ifndef _ASM_RISCV_WORD_AT_A_TIME_H
#define _ASM_RISCV_WORD_AT_A_TIME_H
#include <asm/asm-extable.h>
#include <linux/bitops.h>
#include <linux/word... | arch/riscv/include/asm/word-at-a-time.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* XIP fixup macros, only useful in assembly.
*/
#ifndef _ASM_RISCV_XIP_FIXUP_H
#define _ASM_RISCV_XIP_FIXUP_H
#include <linux/pgtable.h>
#ifdef CONFIG_XIP_KERNEL
.macro XIP_FIXUP_OFFSET reg
/* Fix-up address in Flash into address in RAM early during boot before
* MM... | arch/riscv/include/asm/xip_fixup.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2021 SiFive
*/
#include <linux/hardirq.h>
#include <asm-generic/xor.h>
#ifdef CONFIG_RISCV_ISA_V
#include <asm/vector.h>
#include <asm/switch_to.h>
#include <asm/asm-prototypes.h>
static void xor_vector_2(unsigned long bytes, unsigned long *__restri... | arch/riscv/include/asm/xor.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __RISCV_ASM_VDSO_ARCH_DATA_H
#define __RISCV_ASM_VDSO_ARCH_DATA_H
#include <linux/types.h>
#include <vdso/datapage.h>
#include <asm/hwprobe.h>
struct vdso_arch_data {
/* Stash static answers to the hwprobe queries when all CPUs are selected. */
__u64 all_cpu_hwprobe_va... | arch/riscv/include/asm/vdso/arch_data.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_VDSOCLOCKSOURCE_H
#define __ASM_VDSOCLOCKSOURCE_H
#define VDSO_ARCH_CLOCKMODES \
VDSO_CLOCKMODE_ARCHTIMER
#endif | arch/riscv/include/asm/vdso/clocksource.h | null | null | null | null | null |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.