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source | linux | * Microsemi MIPS CPUs
Boards with a SoC of the Microsemi MIPS family shall have the following
properties:
Required properties:
- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
* Other peripherals:
o CPU chip regs:
The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
func... | Documentation/devicetree/bindings/mips/mscc.txt | null | null | null | null | null |
source | linux | National Instruments MIPS platforms
required root node properties:
- compatible: must be "ni,169445"
CPU Nodes
- compatible: must be "mti,mips14KEc" | Documentation/devicetree/bindings/mips/ni.txt | null | null | null | null | null |
source | linux | * Broadcom cable/DSL/settop platforms
Required properties:
- compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843"
"brcm,bcm3384-viper", "brcm,bcm33843-viper"
"brcm,bcm6328", "brcm,bcm6358", "brcm,bcm6362", "brcm,bcm6368",
"brcm,bcm63168", "brcm,bcm63268",
... | Documentation/devicetree/bindings/mips/brcm/soc.txt | null | null | null | null | null |
source | linux | * Boot Bus
The Octeon Boot Bus is a configurable parallel bus with 8 chip
selects. Each chip select is independently configurable.
Properties:
- compatible: "cavium,octeon-3860-bootbus"
Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
- reg: The base address of the Boot Bus' register bank.
- #address-cell... | Documentation/devicetree/bindings/mips/cavium/bootbus.txt | null | null | null | null | null |
source | linux | * Cavium Interrupt Bus widget
Properties:
- compatible: "cavium,octeon-7130-cib"
Compatibility with cn70XX SoCs.
- interrupt-controller: This is an interrupt controller.
- reg: Two elements consisting of the addresses of the RAW and EN
registers of the CIB block
- cavium,max-bits: The index (zero based) of th... | Documentation/devicetree/bindings/mips/cavium/cib.txt | null | null | null | null | null |
source | linux | * Central Interrupt Unit
Properties:
- compatible: "cavium,octeon-3860-ciu"
Compatibility with all cn3XXX, cn5XXX and cn63XX SOCs.
- interrupt-controller: This is an interrupt controller.
- reg: The base address of the CIU's register bank.
- #interrupt-cells: Must be <2>. The first cell is the bank within
t... | Documentation/devicetree/bindings/mips/cavium/ciu.txt | null | null | null | null | null |
source | linux | * Central Interrupt Unit
Properties:
- compatible: "cavium,octeon-6880-ciu2"
Compatibility with 68XX SOCs.
- interrupt-controller: This is an interrupt controller.
- reg: The base address of the CIU's register bank.
- #interrupt-cells: Must be <2>. The first cell is the bank within
the CIU and may have a val... | Documentation/devicetree/bindings/mips/cavium/ciu2.txt | null | null | null | null | null |
source | linux | * Central Interrupt Unit v3
Properties:
- compatible: "cavium,octeon-7890-ciu3"
Compatibility with 78XX and 73XX SOCs.
- interrupt-controller: This is an interrupt controller.
- reg: The base address of the CIU's register bank.
- #interrupt-cells: Must be <2>. The first cell is source number.
The second cell... | Documentation/devicetree/bindings/mips/cavium/ciu3.txt | null | null | null | null | null |
source | linux | * DMA Engine.
The Octeon DMA Engine transfers between the Boot Bus and main memory.
The DMA Engine will be referred to by phandle by any device that is
connected to it.
Properties:
- compatible: "cavium,octeon-5750-bootbus-dma"
Compatibility with all cn52XX, cn56XX and cn6XXX SOCs.
- reg: The base address of the ... | Documentation/devicetree/bindings/mips/cavium/dma-engine.txt | null | null | null | null | null |
source | linux | * UCTL SATA controller glue
UCTL is the bridge unit between the I/O interconnect (an internal bus)
and the SATA AHCI host controller (UAHC). It performs the following functions:
- provides interfaces for the applications to access the UAHC AHCI
registers on the CN71XX I/O space.
- provides a bridge for UAHC to fe... | Documentation/devicetree/bindings/mips/cavium/sata-uctl.txt | null | null | null | null | null |
source | linux | * UCTL USB controller glue
Properties:
- compatible: "cavium,octeon-6335-uctl"
Compatibility with all cn6XXX SOCs.
- reg: The base address of the UCTL register bank.
- #address-cells: Must be <2>.
- #size-cells: Must be <2>.
- ranges: Empty to signify direct mapping of the children.
- refclk-frequency: A singl... | Documentation/devicetree/bindings/mips/cavium/uctl.txt | null | null | null | null | null |
source | linux | Imagination Technologies' Pistachio SoC based Marduk Board
==========================================================
Compatible string must be "img,pistachio-marduk", "img,pistachio"
Hardware and other related documentation is available at
https://docs.creatordev.io/ci40/
It is also known as Creator Ci40. Marduk is... | Documentation/devicetree/bindings/mips/img/pistachio-marduk.txt | null | null | null | null | null |
source | linux | Imagination Pistachio SoC
=========================
Required properties:
--------------------
- compatible: Must include "img,pistachio".
CPU nodes:
----------
A "cpus" node is required. Required properties:
- #address-cells: Must be 1.
- #size-cells: Must be 0.
A CPU sub-node is also required for at least CPU 0.... | Documentation/devicetree/bindings/mips/img/pistachio.txt | null | null | null | null | null |
source | linux | Imagination University Program MIPSfpga
=======================================
Under the Imagination University Program, a microAptiv UP core has been
released for academic usage.
As we are dealing with a MIPS core instantiated on an FPGA, specifications
are fluid and can be varied in RTL.
This binding document is ... | Documentation/devicetree/bindings/mips/img/xilfpga.txt | null | null | null | null | null |
source | linux | Lantiq XWAY SoC FPI BUS binding
============================
-------------------------------------------------------------------------------
Required properties:
- compatible : Should be one of
"lantiq,xrx200-fpi"
- reg : The address and length of the XBAR
configuration register.
Address and len... | Documentation/devicetree/bindings/mips/lantiq/fpi-bus.txt | null | null | null | null | null |
source | linux | Lantiq XWAY SoC RCU binding
===========================
This binding describes the RCU (reset controller unit) multifunction device,
where each sub-device has its own set of registers.
The RCU register range is used for multiple purposes. Mostly one device
uses one or multiple register exclusively, but for some regis... | Documentation/devicetree/bindings/mips/lantiq/rcu.txt | null | null | null | null | null |
source | linux | * Microchip PIC32MZDA Platforms
PIC32MZDA Starter Kit
Required root node properties:
- compatible = "microchip,pic32mzda-sk", "microchip,pic32mzda"
CPU nodes:
----------
A "cpus" node is required. Required properties:
- #address-cells: Must be 1.
- #size-cells: Must be 0.
A CPU sub-node is also required. Requ... | Documentation/devicetree/bindings/mips/pic32/microchip,pic32mzda.txt | null | null | null | null | null |
source | linux | IFM camera sensor interface on mpc5200 LocalPlus bus
Required properties:
- compatible: "ifm,o2d-csi"
- reg: specifies sensor chip select number and associated address range
- interrupts: external interrupt line number and interrupt sense mode
of the interrupt line signaling frame valid events
- gpios: three gpio-sp... | Documentation/devicetree/bindings/misc/ifm-csi.txt | null | null | null | null | null |
source | linux | * QEMU PVPANIC MMIO Configuration bindings
QEMU's emulation / virtualization targets provide the following PVPANIC
MMIO Configuration interface on the "virt" machine.
type:
- a read-write, 16-bit wide data register.
QEMU exposes the data register to guests as memory mapped registers.
Required properties:
- compati... | Documentation/devicetree/bindings/misc/pvpanic-mmio.txt | null | null | null | null | null |
source | linux | * Mellanox Bluefield SoC specific extensions to the Synopsys Designware
Mobile Storage Host Controller
Read synopsys-dw-mshc.txt for more details
The Synopsys designware mobile storage host controller is used to interface
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
differences betwee... | Documentation/devicetree/bindings/mmc/bluefield-dw-mshc.txt | null | null | null | null | null |
source | linux | * Cavium Octeon & ThunderX MMC controller
The highspeed MMC host controller on Caviums SoCs provides an interface
for MMC and SD types of memory cards.
Supported maximum speeds are the ones of the eMMC standard 4.41 as well
as the speed of SD standard 4.0. Only 3.3 Volt is supported.
Required properties:
- compatib... | Documentation/devicetree/bindings/mmc/cavium-mmc.txt | null | null | null | null | null |
source | linux | * Hisilicon specific extensions to the Synopsys Designware Mobile
Storage Host Controller
Read synopsys-dw-mshc.txt for more details
The Synopsys designware mobile storage host controller is used to interface
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
differences between the core Sy... | Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt | null | null | null | null | null |
source | linux | MOXA ART MMC Host Controller Interface
Inherits from mmc binding[1].
[1] Documentation/devicetree/bindings/mmc/mmc.txt
Required properties:
- compatible : Must be "moxa,moxart-mmc" or "faraday,ftsdc010"
- reg : Should contain registers location and length
- interrupts : Should contain the interrupt number
- cl... | Documentation/devicetree/bindings/mmc/moxa,moxart-mmc.txt | null | null | null | null | null |
source | linux | * PXA MMC drivers
Driver bindings for the PXA MCI (MMC/SDIO) interfaces
Required properties:
- compatible: Should be "marvell,pxa-mmc".
- vmmc-supply: A regulator for VMMC
Optional properties:
- marvell,detect-delay-ms: sets the detection delay timeout in ms.
In addition to the properties described in this document... | Documentation/devicetree/bindings/mmc/pxa-mmc.txt | null | null | null | null | null |
source | linux | * SPEAr SDHCI Controller
This file documents differences between the core properties in mmc.txt
and the properties used by the sdhci-spear driver.
Required properties:
- compatible: "st,spear300-sdhci"
Optional properties:
- cd-gpios: card detect gpio, with zero flags.
Example:
sdhci@fc000000 {
compatible = "st... | Documentation/devicetree/bindings/mmc/sdhci-spear.txt | null | null | null | null | null |
source | linux | * STMicroelectronics sdhci-st MMC/SD controller
This file documents the differences between the core properties in
Documentation/devicetree/bindings/mmc/mmc.txt and the properties
used by the sdhci-st driver.
Required properties:
- compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
to s... | Documentation/devicetree/bindings/mmc/sdhci-st.txt | null | null | null | null | null |
source | linux | * TI Highspeed MMC host controller for OMAP and 66AK2G family.
The Highspeed MMC Host Controller on TI OMAP and 66AK2G family
provides an interface for MMC, SD, and SDIO types of memory cards.
This file documents differences between the core properties described
by mmc.txt and the properties used by the omap_hsmmc dr... | Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt | null | null | null | null | null |
source | linux | * TI MMC host controller for OMAP1 and 2420
The MMC Host Controller on TI OMAP1 and 2420 family provides
an interface for MMC, SD, and SDIO types of memory cards.
This file documents differences between the core properties described
by mmc.txt and the properties used by the omap mmc driver.
Note that this driver wil... | Documentation/devicetree/bindings/mmc/ti-omap.txt | null | null | null | null | null |
source | linux | * Renesas usdhi6rol0 SD/SDIO host controller
Required properties:
- compatible: must be
"renesas,usdhi6rol0"
- interrupts: 3 interrupts, named "card detect", "data" and "SDIO" must be
specified
- clocks: a clock binding for the IMCLK input
Optional properties:
- vmmc-supply: a phandle of a regulator, supplying ... | Documentation/devicetree/bindings/mmc/usdhi6rol0.txt | null | null | null | null | null |
source | linux | Atmel NAND flash controller bindings
The NAND flash controller node should be defined under the EBI bus (see
Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
One or several NAND devices can be defined under this NAND controller.
The NAND controller might be connected to an ECC engine.
* NAND contr... | Documentation/devicetree/bindings/mtd/atmel-nand.txt | null | null | null | null | null |
source | linux | M-Systems and Sandisk DiskOnChip devices
M-System DiskOnChip G3
======================
The Sandisk (formerly M-Systems) docg3 is a nand device of 64M to 256MB.
Required properties:
- compatible: should be "m-systems,diskonchip-g3"
- reg: register base and size
Example:
docg3: flash@0 {
compatible = "m-systems,d... | Documentation/devicetree/bindings/mtd/diskonchip.txt | null | null | null | null | null |
source | linux | FLCTL NAND controller
Required properties:
- compatible : "renesas,shmobile-flctl-sh7372"
- reg : Address range of the FLCTL
- interrupts : flste IRQ number
- nand-bus-width : bus width to NAND chip
Optional properties:
- dmas: DMA specifier(s)
- dma-names: name for each DMA specifier. Valid names are
"data_tx"... | Documentation/devicetree/bindings/mtd/flctl-nand.txt | null | null | null | null | null |
source | linux | Freescale Localbus UPM programmed to work with NAND flash
Required properties:
- compatible : "fsl,upm-nand".
- reg : should specify localbus chip select and size used for the chip.
- fsl,upm-addr-offset : UPM pattern offset for the address latch.
- fsl,upm-cmd-offset : UPM pattern offset for the command latch.
Optio... | Documentation/devicetree/bindings/mtd/fsl-upm-nand.txt | null | null | null | null | null |
source | linux | ST Microelectronics Flexible Static Memory Controller (FSMC)
NAND Interface
Required properties:
- compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
- reg : Address range of the mtd chip
- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
Optional properties:
- ba... | Documentation/devicetree/bindings/mtd/fsmc-nand.txt | null | null | null | null | null |
source | linux | GPIO assisted NAND flash
The GPIO assisted NAND flash uses a memory mapped interface to
read/write the NAND commands and data and GPIO pins for the control
signals.
Required properties:
- compatible : "gpio-control-nand"
- reg : should specify localbus chip select and size used for the chip. The
resource describes... | Documentation/devicetree/bindings/mtd/gpio-control-nand.txt | null | null | null | null | null |
source | linux | Hisilicon Hip04 Soc NAND controller DT binding
Required properties:
- compatible: Should be "hisilicon,504-nfc".
- reg: The first contains base physical address and size of
NAND controller's registers. The second contains base
physical address and... | Documentation/devicetree/bindings/mtd/hisi504-nand.txt | null | null | null | null | null |
source | linux | HiSilicon SPI-NOR Flash Controller
Required properties:
- compatible : Should be "hisilicon,fmc-spi-nor" and one of the following strings:
"hisilicon,hi3519-spi-nor"
- address-cells : Should be 1.
- size-cells : Should be 0.
- reg : Offset and length of the register set for the controller device.
- reg-names : Must ... | Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt | null | null | null | null | null |
source | linux | AMCC NDFC (NanD Flash Controller)
Required properties:
- compatible : "ibm,ndfc".
- reg : should specify chip select and size used for the chip (0x2000).
Optional properties:
- ccr : NDFC config and control register value (default 0).
- bank-settings : NDFC bank configuration register value (default 0).
Notes:
- par... | Documentation/devicetree/bindings/mtd/ibm,ndfc.txt | null | null | null | null | null |
source | linux | NXP LPC32xx SoC NAND MLC controller
Required properties:
- compatible: "nxp,lpc3220-mlc"
- reg: Address and size of the controller
- interrupts: The NAND interrupt specification
- gpios: GPIO specification for NAND write protect
The following required properties are very controller specific. See the LPC32xx
User Manu... | Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt | null | null | null | null | null |
source | linux | NXP LPC32xx SoC NAND SLC controller
Required properties:
- compatible: "nxp,lpc3220-slc"
- reg: Address and size of the controller
- nand-on-flash-bbt: Use bad block table on flash
- gpios: GPIO specification for NAND write protect
The following required properties are very controller specific. See the LPC32xx
User M... | Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt | null | null | null | null | null |
source | linux | Macronix NANDs Device Tree Bindings
-----------------------------------
Macronix NANDs support randomizer operation for scrambling user data,
which can be enabled with a SET_FEATURE. The penalty when using the
randomizer are subpage accesses prohibited and more time period needed
for program operation, i.e., tPROG 300... | Documentation/devicetree/bindings/mtd/nand-macronix.txt | null | null | null | null | null |
source | linux | NAND support for Marvell Orion SoC platforms
Required properties:
- compatible : "marvell,orion-nand".
- reg : Base physical address of the NAND and length of memory mapped
region
Optional properties:
- cle : Address line number connected to CLE. Default is 0
- ale : Address line number connected to ALE. Default is ... | Documentation/devicetree/bindings/mtd/orion-nand.txt | null | null | null | null | null |
source | linux | Broadcom BCM963XX CFE Loader NOR Flash Partitions
=================================================
Most Broadcom BCM63XX SoC based devices follow the Broadcom reference layout for
NOR. The first erase block used for the CFE bootloader, the last for an
NVRAM partition, and the remainder in-between for one to two firmw... | Documentation/devicetree/bindings/mtd/partitions/brcm,bcm963xx-cfe-nor-partitions.txt | null | null | null | null | null |
source | linux | Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
Required properties:
- compatible : "adi,adg792a" or "adi,adg792g"
- #mux-control-cells : <0> if parallel (the three muxes are bound together
with a single mux controller controlling all three muxes), or <1> if
not (one mux controller for each mux).
* S... | Documentation/devicetree/bindings/mux/adi,adg792a.txt | null | null | null | null | null |
source | linux | Bindings for Analog Devices ADGS1408/1409 8:1/Dual 4:1 Mux
Required properties:
- compatible : Should be one of
* "adi,adgs1408"
* "adi,adgs1409"
* Standard mux-controller bindings as described in mux-controller.yaml
Optional properties for ADGS1408/1409:
- gpio-controller : if present, #gpio-cells is required.
- #... | Documentation/devicetree/bindings/mux/adi,adgs1408.txt | null | null | null | null | null |
source | linux | * Adaptrum Anarion ethernet controller
This device is a platform glue layer for stmmac.
Please see stmmac.txt for the other unchanged properties.
Required properties:
- compatible: Should be "adaptrum,anarion-gmac", "snps,dwmac"
- phy-mode: Should be "rgmii". Other modes are not currently supported.
Examples... | Documentation/devicetree/bindings/net/anarion-gmac.txt | null | null | null | null | null |
source | linux | The Broadcom BCM87XX devices are a family of 10G Ethernet PHYs. They
have these bindings in addition to the standard PHY bindings.
Compatible: Should contain "broadcom,bcm8706" or "broadcom,bcm8727" and
"ethernet-phy-ieee802.3-c45"
Optional Properties:
- broadcom,c45-reg-init : one of more sets of 4 cel... | Documentation/devicetree/bindings/net/broadcom-bcm87xx.txt | null | null | null | null | null |
source | linux | Generic Bluetooth controller over USB (btusb driver)
---------------------------------------------------
Required properties:
- compatible : should comply with the format "usbVID,PID" specified in
Documentation/devicetree/bindings/usb/usb-device.yaml
At the time of writing, the only OF supported devices
(m... | Documentation/devicetree/bindings/net/btusb.txt | null | null | null | null | null |
source | linux | * System Management Interface (SMI) / MDIO
Properties:
- compatible: One of:
"cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
and cn6XXX SOCs.
"cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
- reg: The base address of the MDIO bus controller register bank... | Documentation/devicetree/bindings/net/cavium-mdio.txt | null | null | null | null | null |
source | linux | * MIX Ethernet controller.
Properties:
- compatible: "cavium,octeon-5750-mix"
Compatibility with all cn5XXX and cn6XXX SOCs populated with MIX
devices.
- reg: The base addresses of four separate register banks. The first
bank contains the MIX registers. The second bank the corresponding
AGL registers. The... | Documentation/devicetree/bindings/net/cavium-mix.txt | null | null | null | null | null |
source | linux | * PIP Ethernet nexus.
The PIP Ethernet nexus can control several data packet input/output
devices. The devices have a two level grouping scheme. There may be
several interfaces, and each interface may have several ports. These
ports might be an individual Ethernet PHY.
Properties for the PIP nexus:
- compatible: ... | Documentation/devicetree/bindings/net/cavium-pip.txt | null | null | null | null | null |
source | linux | * Cirrus Logic CS8900/CS8920 Network Controller
Required properties:
- compatible : Should be "cirrus,cs8900" or "cirrus,cs8920".
- reg : Address and length of the IO space.
- interrupts : Should contain the controller interrupt line.
Examples:
eth0: eth@10000000 {
compatible = "cirrus,cs8900";
reg = <0x1000000... | Documentation/devicetree/bindings/net/cirrus,cs89x0.txt | null | null | null | null | null |
source | linux | Cortina Phy Driver Device Tree Bindings
---------------------------------------
CORTINA is a registered trademark of Cortina Systems, Inc.
The driver supports the Cortina Electronic Dispersion Compensation (EDC)
devices, equipped with clock and data recovery (CDR) circuits. These
devices make use of registers that ar... | Documentation/devicetree/bindings/net/cortina.txt | null | null | null | null | null |
source | linux | TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
-----------------------------------------------
Required properties:
- compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and
"ti,dra7xx-cpsw-phy-sel" for dra7xx platform
"ti,am43xx-cpsw-phy-sel" for am43xx platform
- reg : phys... | Documentation/devicetree/bindings/net/cpsw-phy-sel.txt | null | null | null | null | null |
source | linux | TI SoC Ethernet Switch Controller Device Tree Bindings
------------------------------------------------------
Required properties:
- compatible : Should be one of the below:-
"ti,cpsw" for backward compatible
"ti,am335x-cpsw" for AM335x controllers
"ti,am4372-cpsw" for AM437x controllers
"ti,dra7-... | Documentation/devicetree/bindings/net/cpsw.txt | null | null | null | null | null |
source | linux | * Texas Instruments Davinci EMAC
This file provides information, what the device node
for the davinci_emac interface contains.
Required properties:
- compatible: "ti,davinci-dm6467-emac", "ti,am3517-emac" or
"ti,dm816-emac"
- reg: Offset and length of the register set for the device
- ti,davinci-ctrl-reg-offset: of... | Documentation/devicetree/bindings/net/davinci_emac.txt | null | null | null | null | null |
source | linux | * EZchip NPS Management Ethernet port driver
Required properties:
- compatible: Should be "ezchip,nps-mgt-enet"
- reg: Address and length of the register set for the device
- interrupts: Should contain the ENET interrupt
Examples:
ethernet@f0003000 {
compatible = "ezchip,nps-mgt-enet";
reg = <0xf0003000 0x44>;
... | Documentation/devicetree/bindings/net/ezchip_enet.txt | null | null | null | null | null |
source | linux | Faraday Ethernet Controller
Required properties:
- compatible : Must contain "faraday,ftmac", as well as one of
the SoC specific identifiers:
"andestech,atmac100"
"moxa,moxart-mac"
- reg : Should contain register location and length
- interrupts : Should contain the mac interrupt number
Example:
mac0: mac@90... | Documentation/devicetree/bindings/net/faraday,ftmac.txt | null | null | null | null | null |
source | linux | * MDIO IO device
Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
* TBI Internal MDIO bus
Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
* Gianfar-compatible ethernet nodes
Refer to Documentation/devicetree/bindings/net/fsl,gianfar.yaml
* Gianfar PTP clock nodes
Refer to... | Documentation/devicetree/bindings/net/fsl-tsec-phy.txt | null | null | null | null | null |
source | linux | Hisilicon Fast Ethernet MDIO Controller interface
Required properties:
- compatible: should be "hisilicon,hisi-femac-mdio".
- reg: address and length of the register set for the device.
- clocks: A phandle to the reference clock for this device.
- PHY subnode: inherits from phy binding [1]
[1] Documentation/devicetre... | Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt | null | null | null | null | null |
source | linux | Hisilicon Fast Ethernet MAC controller
Required properties:
- compatible: should contain one of the following version strings:
* "hisilicon,hisi-femac-v1"
* "hisilicon,hisi-femac-v2"
and the soc string "hisilicon,hi3516cv300-femac".
- reg: specifies base physical address(s) and size of the device registers.
The f... | Documentation/devicetree/bindings/net/hisilicon-femac.txt | null | null | null | null | null |
source | linux | Hisilicon hip04 Ethernet Controller
* Ethernet controller node
Required properties:
- compatible: should be "hisilicon,hip04-mac".
- reg: address and length of the register set for the device.
- interrupts: interrupt for the device.
- port-handle: <phandle port channel>
phandle, specifies a reference to the syscon p... | Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt | null | null | null | null | null |
source | linux | Hisilicon hix5hd2 gmac controller
Required properties:
- compatible: should contain one of the following SoC strings:
* "hisilicon,hix5hd2-gmac"
* "hisilicon,hi3798cv200-gmac"
* "hisilicon,hi3516a-gmac"
and one of the following version string:
* "hisilicon,hisi-gmac-v1"
* "hisilicon,hisi-gmac-v2"
The version v... | Documentation/devicetree/bindings/net/hisilicon-hix5hd2-gmac.txt | null | null | null | null | null |
source | linux | Hisilicon DSA Fabric device controller
Required properties:
- compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2".
"hisilicon,hns-dsaf-v1" is for hip05.
"hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612.
- mode: dsa fabric mode string. only support one of dsaf modes like these:
"2port-64vf",
... | Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt | null | null | null | null | null |
source | linux | Hisilicon MDIO bus controller
Properties:
- compatible: can be one of:
"hisilicon,hns-mdio"
"hisilicon,mdio"
"hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
while "hisilicon,mdio" is optional for backwards compatibility only on
hip04 Soc.
- reg: The base address of the MDIO bus control... | Documentation/devicetree/bindings/net/hisilicon-hns-mdio.txt | null | null | null | null | null |
source | linux | Hisilicon Network Subsystem NIC controller
Required properties:
- compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
"hisilicon,hns-nic-v1" is for hip05.
"hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
- ae-handle: accelerator engine handle for hns,
specifies a reference to the associating hardware d... | Documentation/devicetree/bindings/net/hisilicon-hns-nic.txt | null | null | null | null | null |
source | linux | 4xx/Axon EMAC ethernet nodes
The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
the Axon bridge. To operate this needs to interact with a this
special McMAL DMA controller, and sometimes an RGMII or ZMII
interface. In addition to the nodes and properties described
below, the node fo... | Documentation/devicetree/bindings/net/ibm,emac.txt | null | null | null | null | null |
source | linux | IC Plus Corp. IP101A / IP101G Ethernet PHYs
There are different models of the IP101G Ethernet PHY:
- IP101GR (32-pin QFN package)
- IP101G (die only, no package)
- IP101GA (48-pin LQFP package)
There are different models of the IP101A Ethernet PHY (which is the
predecessor of the IP101G):
- IP101A (48-pin LQFP packag... | Documentation/devicetree/bindings/net/icplus-ip101ag.txt | null | null | null | null | null |
source | linux | * IPQ806x DWMAC Ethernet controller
The device inherits all the properties of the dwmac/stmmac devices
described in the file net/stmmac.txt with the following changes.
Required properties:
- compatible: should be "qcom,ipq806x-gmac" along with "snps,dwmac"
and any applicable more detailed version number
... | Documentation/devicetree/bindings/net/ipq806x-dwmac.txt | null | null | null | null | null |
source | linux | This document describes the device tree bindings associated with the
keystone network coprocessor(NetCP) driver support.
The network coprocessor (NetCP) is a hardware accelerator that processes
Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
switch sub-module to send and receive packets.... | Documentation/devicetree/bindings/net/keystone-netcp.txt | null | null | null | null | null |
source | linux | Marvell Orion/Discovery ethernet controller
=============================================
The Marvell Discovery ethernet controller can be found on Marvell Orion SoCs
(Kirkwood, Dove, Orion5x, and Discovery Innovation) and as part of Marvell
Discovery system controller chips (mv64[345]60).
The Discovery ethernet cont... | Documentation/devicetree/bindings/net/marvell-orion-net.txt | null | null | null | null | null |
source | linux | * Marvell PXA168 Ethernet Controller
Required properties:
- compatible: should be "marvell,pxa168-eth".
- reg: address and length of the register set for the device.
- interrupts: interrupt for the device.
- clocks: pointer to the clock for the device.
Optional properties:
- port-id: Ethernet port number. Should be '... | Documentation/devicetree/bindings/net/marvell-pxa168.txt | null | null | null | null | null |
source | linux | * Microchip ENC28J60
This is a standalone 10 MBit ethernet controller with SPI interface.
For each device connected to a SPI bus, define a child node within
the SPI master node.
Required properties:
- compatible: Should be "microchip,enc28j60"
- reg: Specify the SPI chip select the ENC28J60 is wired to
- interrupts:... | Documentation/devicetree/bindings/net/microchip,enc28j60.txt | null | null | null | null | null |
source | linux | Microchip LAN78xx Gigabit Ethernet controller
The LAN78XX devices are usually configured by programming their OTP or with
an external EEPROM, but some platforms (e.g. Raspberry Pi 3 B+) have neither.
The Device Tree properties, if present, override the OTP and EEPROM.
Required properties:
- compatible: Should be one ... | Documentation/devicetree/bindings/net/microchip,lan78xx.txt | null | null | null | null | null |
source | linux | * NI XGE Ethernet controller
Required properties:
- compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
older device trees with DMA engines co-located in the address map,
with the one reg entry to describe the whole device.
- reg: Address and length of the register s... | Documentation/devicetree/bindings/net/nixge.txt | null | null | null | null | null |
source | linux | * OpenCores MAC 10/100 Mbps
Required properties:
- compatible: Should be "opencores,ethoc".
- reg: two memory regions (address and length),
first region is for the device registers and descriptor rings,
second is for the device packet memory.
- interrupts: interrupt for the device.
Optional properties:
- clocks: ... | Documentation/devicetree/bindings/net/opencores-ethoc.txt | null | null | null | null | null |
source | linux | Qualcomm Technologies EMAC Gigabit Ethernet Controller
This network controller consists of two devices: a MAC and an SGMII
internal PHY. Each device is represented by a device tree node. A phandle
connects the MAC node to its corresponding internal phy node. Another
phandle points to the external PHY node.
Require... | Documentation/devicetree/bindings/net/qcom-emac.txt | null | null | null | null | null |
source | linux | * Samsung 10G Ethernet driver (SXGBE)
Required properties:
- compatible: Should be "samsung,sxgbe-v2.0a"
- reg: Address and length of the register set for the device
- interrupts: Should contain the SXGBE interrupts
These interrupts are ordered by fixed and follows variable
transmit DMA interrupts, receive DMA int... | Documentation/devicetree/bindings/net/samsung-sxgbe.txt | null | null | null | null | null |
source | linux | SMSC LAN87xx Ethernet PHY
Some boards require special tuning values. Configure them
through an Ethernet OF device node.
Optional properties:
- clocks:
The clock used as phy reference clock and is connected to phy
pin XTAL1/CLKIN.
- smsc,disable-energy-detect:
If set, do not enable energy detect mode for the S... | Documentation/devicetree/bindings/net/smsc-lan87xx.txt | null | null | null | null | null |
source | linux | * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
This binding is deprecated, but it continues to be supported, but new
features should be preferably added to the stmmac binding document.
This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
IP block. The IP supports multiple options... | Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt | null | null | null | null | null |
source | linux | STMicroelectronics SoC DWMAC glue layer controller
This file documents differences between the core properties in
Documentation/devicetree/bindings/net/stmmac.txt
and what is needed on STi platforms to program the stmmac glue logic.
The device node has following properties.
Required properties:
- compatible : "st,s... | Documentation/devicetree/bindings/net/sti-dwmac.txt | null | null | null | null | null |
source | linux | * VIA Velocity 10/100/1000 Network Controller
Required properties:
- compatible : Should be "via,velocity-vt6110"
- reg : Address and length of the io space
- interrupts : Should contain the controller interrupt line
Optional properties:
- no-eeprom : PCI network cards use an external EEPROM to store data. Embedded
... | Documentation/devicetree/bindings/net/via-velocity.txt | null | null | null | null | null |
source | linux | * Wiznet w5x00
This is a standalone 10/100 MBit Ethernet controller with SPI interface.
For each device connected to a SPI bus, define a child node within
the SPI master node.
Required properties:
- compatible: Should be one of the following strings:
"wiznet,w5100"
"wiznet,w5200"
"wiznet,w5500"
... | Documentation/devicetree/bindings/net/wiznet,w5x00.txt | null | null | null | null | null |
source | linux | MediaTek UART based Bluetooth Devices
==================================
This device is a serial attached device to UART device and thus it must be a
child node of the serial node with UART.
Please refer to the following documents for generic properties:
Documentation/devicetree/bindings/serial/serial.yaml
Require... | Documentation/devicetree/bindings/net/bluetooth/mediatek,bluetooth.txt | null | null | null | null | null |
source | linux | Nokia Bluetooth Chips
---------------------
Nokia phones often come with UART connected bluetooth chips from different
vendors and modified device API. Those devices speak a protocol named H4+
(also known as h4p) by Nokia, which is similar to the H4 protocol from the
Bluetooth standard. In addition to the H4 protocol ... | Documentation/devicetree/bindings/net/bluetooth/nokia,h4p-bluetooth.txt | null | null | null | null | null |
source | linux | Memory mapped Bosch CC770 and Intel AN82527 CAN controller
Note: The CC770 is a CAN controller from Bosch, which is 100%
compatible with the old AN82527 from Intel, but with "bugs" being fixed.
Required properties:
- compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
for the AN82527.
- reg : shoul... | Documentation/devicetree/bindings/net/can/cc770.txt | null | null | null | null | null |
source | linux | Aeroflex Gaisler GRCAN and GRHCAN CAN controllers.
The GRCAN and CRHCAN CAN controllers are available in the GRLIB VHDL IP core
library.
Note: These properties are built from the AMBA plug&play in a Leon SPARC system
(the ordinary environment for GRCAN and GRHCAN). There are no dts files for
sparc.
Required properti... | Documentation/devicetree/bindings/net/can/grcan.txt | null | null | null | null | null |
source | linux | * Holt HI-311X stand-alone CAN controller device tree bindings
Required properties:
- compatible: Should be one of the following:
- "holt,hi3110" for HI-3110
- reg: SPI chip select.
- clocks: The clock feeding the CAN controller.
- interrupts: Should contain IRQ line for the CAN controller.
Optional properties... | Documentation/devicetree/bindings/net/can/holt_hi311x.txt | null | null | null | null | null |
source | linux | IFI CANFD controller
--------------------
Required properties:
- compatible: Should be "ifi,canfd-1.0"
- reg: Should contain CAN controller registers location and length
- interrupts: Should contain IRQ line for the CAN controller
Example:
canfd0: canfd@ff220000 {
compatible = "ifi,canfd-1.0";
reg = <0xff... | Documentation/devicetree/bindings/net/can/ifi_canfd.txt | null | null | null | null | null |
source | linux | CAN Device Tree Bindings
------------------------
(c) 2006-2009 Secret Lab Technologies Ltd
Grant Likely <grant.likely@secretlab.ca>
fsl,mpc5200-mscan nodes
-----------------------
In addition to the required compatible-, reg- and interrupt-properties, you can
also specify which clock source shall be used for the con... | Documentation/devicetree/bindings/net/can/mpc5xxx-mscan.txt | null | null | null | null | null |
source | linux | Texas Instruments High End CAN Controller (HECC)
================================================
This file provides information, what the device node
for the hecc interface contains.
Required properties:
- compatible: "ti,am3517-hecc"
- reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram'
... | Documentation/devicetree/bindings/net/can/ti_hecc.txt | null | null | null | null | null |
source | linux | Distributed Switch Architecture Device Tree Bindings
----------------------------------------------------
See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation. | Documentation/devicetree/bindings/net/dsa/dsa.txt | null | null | null | null | null |
source | linux | SMSC/MicroChip LAN9303 three port ethernet switch
-------------------------------------------------
Required properties:
- compatible: should be
- "smsc,lan9303-i2c" for I2C managed mode
or
- "smsc,lan9303-mdio" for mdio managed mode
Optional properties:
- reset-gpios: GPIO to be used to reset the whole dev... | Documentation/devicetree/bindings/net/dsa/lan9303.txt | null | null | null | null | null |
source | linux | * ADF7242 IEEE 802.15.4 *
Required properties:
- compatible: should be "adi,adf7242", "adi,adf7241"
- spi-max-frequency: maximal bus speed (12.5 MHz)
- reg: the chipselect index
- interrupts: the interrupt generated by the device via pin IRQ1.
IRQ_TYPE_LEVEL_HIGH (4) or IRQ_TYPE_EDGE_FALLING (1)
Example... | Documentation/devicetree/bindings/net/ieee802154/adf7242.txt | null | null | null | null | null |
source | linux | * CA8210 IEEE 802.15.4 *
Required properties:
- compatible: Should be "cascoda,ca8210"
- reg: Controlling chip select
- spi-max-frequency: Maximum clock speed, should be *less than*
4000000
- spi-cpol: Requires inverted clock polarity
- reset-gpio... | Documentation/devicetree/bindings/net/ieee802154/ca8210.txt | null | null | null | null | null |
source | linux | *CC2520 IEEE 802.15.4 Compatible Radio*
Required properties:
- compatible: should be "ti,cc2520"
- spi-max-frequency: maximal bus speed (8000000), should be set to 4000000 depends
sync or async operation mode
- reg: the chipselect index
- pinctrl-0: pin control group to be used for this controller.
- pi... | Documentation/devicetree/bindings/net/ieee802154/cc2520.txt | null | null | null | null | null |
source | linux | * MCR20A IEEE 802.15.4 *
Required properties:
- compatible: should be "nxp,mcr20a"
- spi-max-frequency: maximal bus speed, should be set to a frequency
lower than 9000000 depends sync or async operation mode
- reg: the chipselect index
- interrupts: the interrupt generated by the device. Non high-level
... | Documentation/devicetree/bindings/net/ieee802154/mcr20a.txt | null | null | null | null | null |
source | linux | * MRF24J40 IEEE 802.15.4 *
Required properties:
- compatible: should be "microchip,mrf24j40", "microchip,mrf24j40ma",
or "microchip,mrf24j40mc" depends on your transceiver
board
- spi-max-frequency: maximal bus speed, should be set something under or equal
10000000
- reg: the chipselect index
- inte... | Documentation/devicetree/bindings/net/ieee802154/mrf24j40.txt | null | null | null | null | null |
source | linux | * Texas Instruments wl1251 wireless lan controller
The wl1251 chip can be connected via SPI or via SDIO. This
document describes the binding for the SPI connected chip.
Required properties:
- compatible : Should be "ti,wl1251"
- reg : Chip select address of device
- spi-max-frequency : Maximum SP... | Documentation/devicetree/bindings/net/wireless/ti,wl1251.txt | null | null | null | null | null |
source | linux | * Nios II Processor Binding
This binding specifies what properties available in the device tree
representation of a Nios II Processor Core.
Users can use sopc2dts tool for generating device tree sources (dts) from a
Qsys system. See more detail in: http://www.alterawiki.com/wiki/Sopc2dts
Required properties:
- comp... | Documentation/devicetree/bindings/nios2/nios2.txt | null | null | null | null | null |
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