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stringlengths
1
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int64
0
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/* */ #pragma once #include #include "soc/soc_caps.h" #include "soc/assist_debug_reg.h" #include "soc/interrupt_reg.h" #include "esp_attr.h" #include "riscv/csr.h" #include "riscv/interrupt.h" #ifdef __cplusplus extern "C" { #endif /*performance counter*/ #define CSR_PCER_MACHINE 0x7e0 #define CSR_PCMR_MACHIN...
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When CLIC is supported, all interrupt priority levels less than or equal to the threshold level are masked. */ #define RVHAL_INTR_ENABLE_THRESH 0 #else #define RVHAL_INTR_ENABLE_THRESH 1 #endif /* SOC_INT_CLIC_SUPPORTED */ /* On CLIC, the interrupt threshold is stored in the upper (NLBITS) of the mintthresh reg...
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unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE); esprv_int_disable(intr_mask); RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE); } #if SOC_INT_CLIC_SUPPORTED FORCE_INLINE_ATTR void __attribute__((always_inline)) rv_utils_restore_intlevel(uint32_t restoreval) { REG_SET_FIELD(CLIC_INT_THRESH_R...
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2, atomic instructions */ __asm__ __volatile__( "cas: lr.w %0, 0(%2) \n" // load 4 bytes from addr (%2) into old_value (%0) " bne %0, %3, fail \n" // fail if old_value if not equal to compare_value (%3) " sc.w %1, %4, 0(%2) \n" ...
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/* */ #pragma once #ifdef __cplusplus extern "C" { #endif enum intr_type { INTR_TYPE_LEVEL = 0, INTR_TYPE_EDGE }; #include #include "soc/soc_caps.h" #if SOC_INT_CLIC_SUPPORTED #include "esp_private/interrupt_clic.h" #elif SOC_INT_PLIC_SUPPORTED #include "esp_private/interrupt_plic.h" #else #include "esp...
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h" #ifdef __cplusplus } #endif
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/* */ #pragma once #include #ifdef __cplusplus extern "C" { #endif /** */ int riscv_decode_offset_from_jal_instruction(const intptr_t inst_addr); #ifdef __cplusplus } #endif
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/* */ #pragma once #ifdef __cplusplus extern "C" { #endif /* ESP custom semihosting calls numbers */ /** */ #define ESP_SEMIHOSTING_SYS_APPTRACE_INIT 0x101 /** */ #define ESP_SEMIHOSTING_SYS_DBG_STUBS_INIT 0x102 /** */ #define ESP_SEMIHOSTING_SYS_BREAKPOINT_SET 0x103 /** */ #define ESP_SEMIHOSTING_SYS_...
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1) #define SPI_FLASH_VENDOR_GD_SUPPORTED (1) #define SPI_FLASH_VENDOR_ISSI_SUPPORTED (1) #define SPI_FLASH_VENDOR_MXIC_SUPPORTED (1) #define SPI_FLASH_VENDOR_WINBOND_SUPPORTED (1) #define SPI_FLASH_VENDOR_BOYA_SUPPORTED (1) #defi...
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1) #define SPI_FLASH_VENDOR_GD_SUPPORTED (1) #define SPI_FLASH_VENDOR_ISSI_SUPPORTED (1) #define SPI_FLASH_VENDOR_MXIC_SUPPORTED (1) #define SPI_FLASH_VENDOR_WINBOND_SUPPORTED (1) #define SPI_FLASH_VENDOR_BOYA_SUPPORTED (1) #defi...
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/* */ #pragma once #include "hal/spi_types.h" #include "esp_flash.h" #ifdef __cplusplus extern "C" { #endif /// Configurations for the SPI Flash to init typedef struct { spi_host_device_t host_id; ///< Bus to use int cs_io_num; ///< GPIO pin to output the CS signal esp_flash_io_mo...
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// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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/* */ #warning esp_spi_flash.h is deprecated, please use spi_flash_mmap.h instead #include "spi_flash_mmap.h"
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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/* */ #pragma once #include "esp_err.h" #include #include #include "esp_private/spi_share_hw_ctrl.h" #include "sdkconfig.h" #include "esp_flash.h" /** Internal API, don't use in the applications */ #ifdef __cplusplus extern "C" { #endif /** @brief Initialise the default SPI flash chip */ esp_err_t esp_flash_i...
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/* */ #pragma once #include #include #include "esp_err.h" #include "sdkconfig.h" #if CONFIG_SPI_FLASH_ENABLE_COUNTERS || defined __DOXYGEN__ #ifdef __cplusplus extern "C" { #endif /** */ typedef struct { uint32_t count; /*!< number of times operation was executed */ uint32_t time; /*!< total t...
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// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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/* */ #include #include "sdkconfig.h" #include "esp_err.h" #pragma once #ifdef __cplusplus extern "C" { #endif /** */ typedef struct { uint8_t dio_dummy; uint8_t dout_dummy; uint8_t qio_dummy; uint8_t qout_dummy; uint8_t fastrd_dummy; } spi_flash_hpm_dummy_conf_t; typedef enum { SPI_FLAS...
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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/* */ #pragma once #include "hal/spi_flash_hal.h" /** Default configuration for the memspi (high speed version) */ #define ESP_FLASH_DEFAULT_HOST_DRIVER() (spi_flash_host_driver_t) { \ .dev_config = spi_flash_hal_device_config, \ .common_command = spi_flash_hal_common_command, \ .read_id = m...
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configure_host_io_mode = spi_flash_hal_configure_host_io_mode, \ .poll_cmd_done = spi_flash_hal_poll_cmd_done, \ .flush_cache = memspi_host_flush_cache, \ .check_suspend = NULL, \ .resume = spi_flash_hal_resume, \ .suspend = spi_flash_hal_suspend,\ .sus_setup = spi_flash_...
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/* */ #pragma once #include "esp_flash.h" #include "esp_attr.h" struct esp_flash_t; typedef struct esp_flash_t esp_flash_t; typedef struct spi_flash_chip_t spi_flash_chip_t; /** Timeout configurations for flash operations, all in us */ typedef struct { uint32_t idle_timeout; ///drv->set_read_mode(chip...
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) This function is both called from the higher-level API functions, and from other functions in this structure. timeout_ms should be a timeout (in milliseconds) before the function returns ESP_ERR_TIMEOUT. This is useful to avoid hanging if the chip is otherwise unresponsive (ie returns all 0xFF or simil...
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*/ esp_err_t (*sus_setup)(esp_flash_t *chip); /** */ esp_err_t (*read_unique_id)(esp_flash_t *chip, uint64_t* flash_unique_id); /** */ spi_flash_caps_t (*get_chip_caps)(esp_flash_t *chip); /** */ esp_err_t (*config_host_io_mode)(esp_flash_t *chip, uint32_t flags); }; /* P...
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/* */ #pragma once #include #include "esp_flash.h" #include "spi_flash_chip_driver.h" extern const spi_flash_chip_t esp_flash_chip_th;
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/* */ /** **/ #pragma once #include #include #include #include "esp_err.h" #include "sdkconfig.h" #include "esp_spi_flash_counters.h" #ifdef __cplusplus extern "C" { #endif #define ESP_ERR_FLASH_OP_FAIL (ESP_ERR_FLASH_BASE + 1) #define ESP_ERR_FLASH_OP_TIMEOUT (ESP_ERR_FLASH_BASE + 2) #define SPI_FLASH_SE...
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Result from spi_flash_cache2phys() if flash cache address is invalid */ /** */ size_t spi_flash_cache2phys(const void *cached); /** @brief Given a physical offset in flash, return the address where it is mapped in the memory space. */ const void *spi_flash_phys2cache(size_t phys_offs, spi_flash_mmap_memory_t memor...
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/* */ #pragma once #include "esp_err.h" #include #include #include "hal/spi_flash_types.h" #ifdef __cplusplus extern "C" { #endif struct spi_flash_chip_t; typedef struct spi_flash_chip_t spi_flash_chip_t; /** @cond */ typedef struct esp_flash_t esp_flash_t; /** @endcond */ /** @brief Structure for describing a...
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*/ esp_err_t esp_flash_read_unique_chip_id(esp_flash_t *chip, uint64_t *out_id); /** @brief Erase flash chip contents */ esp_err_t esp_flash_erase_chip(esp_flash_t *chip); /** @brief Erase a region of the flash chip */ esp_err_t esp_flash_erase_region(esp_flash_t *chip, uint32_t start, uint32_t len); /** @brief ...
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This chip is used if the 'chip' argument pass to esp_flash_xxx API functions is ever NULL. */ extern esp_flash_t *esp_flash_default_chip; / / /** */ static inline bool esp_flash_is_quad_mode(const esp_flash_t *chip) { return (chip->read_mode == SPI_FLASH_QIO) || (chip->read_mode == SPI_FLASH_QOUT); } #if...
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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typedef esp_err_t (*esp_flash_rdsr_func_t)(esp_flash_t* chip, uint32_t* out_sr); /** */ esp_err_t spi_flash_common_read_status_16b_rdsr_rdsr2(esp_flash_t* chip, uint32_t* out_sr); /** */ esp_err_t spi_flash_common_read_status_8b_rdsr2(esp_flash_t* chip, uint32_t* out_sr); /** */ esp_err_t spi_flash_common_read_s...
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/* */ /** */ #pragma once #include #include #include "sdkconfig.h" #include "esp_rom_spiflash.h" #include "esp_err.h" #include "esp_flash.h" #include "hal/spi_flash_hal.h" #include "spi_flash_override.h" #include "soc/soc_caps.h" #include "soc/clk_tree_defs.h" #ifdef __cplusplus extern "C" { #endif // Type of M...
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*/ spi_flash_guard_end_func_t end; /**< critical section end function. */ } spi_flash_guard_funcs_t; /** */ void spi_flash_guard_set(const spi_flash_guard_funcs_t* funcs); /** */ const spi_flash_guard_funcs_t *spi_flash_guard_get(void); /** */ extern const spi_flash_guard_funcs_t g_flash_gua...
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/* */ #pragma once #include "sdkconfig.h" #include #include #include #include "esp_err.h" #ifdef __cplusplus extern "C" { #endif /** */ // Init mutex protecting access to spi_flash_* APIs void spi_flash_init_lock(void); // Take mutex protecting access to spi_flash_* APIs void spi_flash_op_lock(void); // Rel...
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// This function is implied to be called when other CPU is not running or running code from IRAM. void spi_flash_enable_interrupts_caches_no_os(void); // Mark the pages containing a flash region as having been // erased or written to. This means the flash cache needs // to be evicted before these pages can be flash_m...
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/* */ #pragma once /* SPI commands (actual on-wire commands not SPI controller bitmasks) Suitable for use with spi_flash_hal_common_command static function. */ #define CMD_RDID 0x9F #define CMD_RDUID 0x4B /* Read the flash unique ID*/ #define CMD_WRSR 0x01 #define SR_WIP (1<<0) /* Stat...
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But commands and formats is different */ #define CMD_RST_EN 0x66 #define CMD_RST_DEV 0x99 #define SPI_FLASH_DIO_ADDR_BITLEN 24 #define SPI_FLASH_DIO_DUMMY_BITLEN 4 #define SPI_FLASH_QIO_ADDR_BITLEN 24 #define SPI_FLASH_QIO_DUMMY_BITLEN 6 #define SPI_FLASH_QOUT_ADDR_BITLEN 24 #defi...
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/* */ #include "sdkconfig.h" #define MAX_ADDR_24BIT 0x1000000 #define TEST_SPI_SPEED 10 #define TEST_SPI_READ_MODE SPI_FLASH_FASTRD // #define FORCE_GPIO_MATRIX #if CONFIG_IDF_TARGET_ESP32 #define EXTRA_SPI1_CLK_IO 17 //the pin which is usually used by the PSRAM clk #define SPI1_CS_IO 16 //th...
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*/ #define IDF_LOG_PERFORMANCE(item, value_fmt, value, ...) \ printf("[Performance][%s]: " value_fmt "\n", item, value, ##__VA_ARGS__) #define LOG_DATA(bus, suffix, chip) IDF_LOG_PERFORMANCE("FLASH_SPEED_BYTE_PER_SEC_"#bus#suffix, "%ld, flash_chip: %s", speed_##suffix, chip) #define LOG_ERASE(bus, var, chip) IDF...
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host_id = -1, \ } \ , \ { \ .io_mode = TEST_SPI_READ_MODE,\ .freq_mhz = TEST_SPI_SPEED, \ .host_id = SPI1_HOST, \ .cs_id = 1, \ /* the pin which is usually used by the PSRAM */ \ .cs_io_num = SPI1_CS_IO, \ .input_delay_ns = 0, \ } #if CONFIG_IDF_T...
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io_mode = TEST_SPI_READ_MODE, .freq_mhz = TEST_SPI_SPEED, .host_id = FSPI_HOST, .cs_id = 0, .cs_io_num = FSPI_PIN_NUM_CS, .input_delay_ns = 0, }, { .io_mode = TEST_SPI_READ_MODE, .freq_mhz = TEST_SPI_SPEED, .host_id = HSPI_HOST, .cs_id = 0,...
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io_mode = TEST_SPI_READ_MODE, .freq_mhz = TEST_SPI_SPEED, .host_id = SPI2_HOST, .cs_id = 0, .cs_io_num = FSPI_PIN_NUM_CS, .input_delay_ns = 0, }, }; #endif
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/* */ #pragma once #include #include "esp_partition.h" #ifdef __cplusplus extern "C" { #endif /** */ const esp_partition_t *get_test_flash_partition(void); #ifdef __cplusplus } #endif
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/* */ /** #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1) #define SPI_FLASH_VENDOR_GD_SUPPORTED (1) #define SPI_FLASH_VENDOR_ISSI_SUPPORTED (1) #define SPI_FLASH_VENDOR_MXIC_SUPPORTED (1) #define SPI_FLASH_VENDOR_WINBOND_SUPPORTED (1)
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1)
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1)
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/* */ #pragma once #ifdef __cplusplus extern "C" { #endif /** Definition of a common transaction. Also holds the return value. */ typedef struct { uint8_t command; ///< Command to send, always 8bits uint8_t mosi_len; ///< Output data length, in bytes uint8_t miso_len; ///< ...
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} esp_flash_io_mode_t; /** */ typedef struct spi_flash_sus_cmd_conf_dummy spi_flash_sus_cmd_conf; struct spi_flash_host_driver_s; typedef struct spi_flash_host_driver_s spi_flash_host_driver_t; /** SPI Flash Host driver instance */ typedef struct { const struct spi_flash_host_driver_s* driver; ///< Pointer to...
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/* */ /** */ #pragma once #include #include #include "sdkconfig.h" #include "esp_err.h" #ifdef __cplusplus extern "C" { #endif /** */ esp_err_t esp_opiflash_init(uint32_t chip_id); /** */ void esp_opiflash_set_required_regs(void); #ifdef __cplusplus } #endif
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1) #define SPI_FLASH_VENDOR_GD_SUPPORTED (1) #define SPI_FLASH_VENDOR_ISSI_SUPPORTED (1) #define SPI_FLASH_VENDOR_MXIC_SUPPORTED (1) #define SPI_FLASH_VENDOR_WINBOND_SUPPORTED (1) #define SPI_FLASH_VENDOR_BOYA_SUPPORTED (1) #def...
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/* */ #include #include "spi_flash_defs.h" //MXIC OPI mode needs two bytes of command - 2nd byte is the inversion of the command (1st) byte. S3 HW send LSB first #define MXIC_CMD16(cmd8) ( (uint8_t)(cmd8) | ((uint8_t)(~(cmd8)) << 8) ) #define OPI_CMD_FORMAT_MXIC_STR() { \ .rdid = { \ ...
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cmd = MXIC_CMD16(CMD_WREN), \ .addr = 0, \ .addr_bit_len = 0, \ .dummy_bit_len = 0, \ .data_bit_len = 0, \ .cs_sel = 0x1, \ .is_pe = 0, \ }, \ .se = { \ .mode = ESP_ROM_SPIFLASH_OPI_STR_MODE, \ .cmd_bit_len = 16, \ .cmd = MXIC_CMD16(CMD_SEC...
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dummy_bit_len = 20, \ .data_bit_len = 0, \ .cs_sel = 0x1, \ .is_pe = 0, \ }, \ .pp = { \ .mode = ESP_ROM_SPIFLASH_OPI_STR_MODE, \ .cmd_bit_len = 16, \ .cmd = MXIC_CMD16(CMD_PROGRAM_PAGE_4B), \ .addr = 0, \ .addr_bit_len = 32, \ .dummy_bit_l...
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cmd_bit_len = 16, \ .cmd = MXIC_CMD16(CMD_RDSR), \ .addr = 0, \ .addr_bit_len = 4*8, \ .dummy_bit_len = 4*2, \ .data_bit_len = 2 * 8, \ .cs_sel = 0x1, \ .is_pe = 0, \ }, \ .wren = { \ .mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE, \ .cmd_bit_len = ...
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addr_bit_len = 32, \ .dummy_bit_len = 0, \ .data_bit_len = 0, \ .cs_sel = 0x1, \ .is_pe = 1, \ }, \ .read = { \ .mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE, \ .cmd_bit_len = 16, \ .cmd = MXIC_CMD16(CMD_8DTRD), \ .addr = 0, \ .addr_bit_len = 32, \...
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1) #define SPI_FLASH_VENDOR_GD_SUPPORTED (1) #define SPI_FLASH_VENDOR_ISSI_SUPPORTED (1) #define SPI_FLASH_VENDOR_MXIC_SUPPORTED (1) #define SPI_FLASH_VENDOR_WINBOND_SUPPORTED (1) #define SPI_FLASH_VENDOR_BOYA_SUPPORTED (1) #defi...
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/* */ #pragma once #define SPI_FLASH_VENDOR_XMC_SUPPORTED (1)
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/* */ #ifndef _ESP_HTTPS_SERVER_H_ #define _ESP_HTTPS_SERVER_H_ #include #include "esp_err.h" #include "esp_http_server.h" #include "esp_tls.h" #include "esp_event.h" #ifdef __cplusplus extern "C" { #endif ESP_EVENT_DECLARE_BASE(ESP_HTTPS_SERVER_EVENT); typedef enum { HTTPS_SERVER_EVENT_ERROR = 0, /*!...
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< State of user callback */ esp_tls_t *tls; /*!< ESP-TLS connection handle */ } esp_https_server_user_cb_arg_t; typedef esp_tls_last_error_t esp_https_server_last_error_t; /** */ typedef void esp_https_server_user_cb(esp_https_server_user_cb_arg_t *user_cb); /** */ struct httpd_ssl_config { ...
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esp_tls_handshake_callback cert_select_cb; /** Application protocols the server supports in order of prefernece. const char** alpn_protos; }; typedef struct httpd_ssl_config httpd_ssl_config_t; /** */ #define HTTPD_SSL_CONFIG_DEFAULT() { \ .httpd = { ...
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global_user_ctx = NULL, \ .global_user_ctx_free_fn = NULL, \ .global_transport_ctx = NULL, \ .global_transport_ctx_free_fn = NULL, \ .enable_so_linger = false, \ .linger_timeout = 0, \ .keep_ali...
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use_ecdsa_peripheral = false, \ .ecdsa_key_efuse_blk = 0, \ .transport_mode = HTTPD_SSL_TRANSPORT_SECURE, \ .port_secure = 443, \ .port_insecure = 80, \ .session_tickets = false, \ .use_secu...
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/* */ #pragma once #include "esp_err.h" #include "esp_vfs.h" #include "esp_vfs_common.h" #ifdef __cplusplus extern "C" { #endif /** */ esp_err_t usb_serial_jtag_vfs_register(void); /** */ void usb_serial_jtag_vfs_set_rx_line_endings(esp_line_endings_t mode); /** */ void usb_serial_jtag_vfs_set_tx_line_endings...
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/* */ #pragma once #include "esp_err.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" #ifdef __cplusplus extern "C" { #endif /** */ typedef struct { uint32_t tx_buffer_size; /* Size of the buffer (in bytes) for the TX direction */ uint32_t rx_buffer_size; ...
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/* */ #pragma once #define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian #define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian #define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM #define ESP_ROM_HAS_RETAR...
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#define ESP_ROM_USB_SERIAL_DEVICE_NUM (-1) // No USB_SERIAL_JTAG in the ROM, set -1 for Kconfig usage.
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/* */ #pragma once #include "sdkconfig.h" // TODO: IDF-9197 This file is created to glob the version specific soc_caps correctly #if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION #include "beta3/esp32c5/esp_rom_caps.h" // recursive, condition: IDF_TARGET_ESP32C5_BETA3_VERSION #elif CONFIG_IDF_TARGET_ESP32C5_MP_VERSION...
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/* */ #pragma once
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/* */ #pragma once #define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian #define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian #define ESP_ROM_HAS_JPEG_DECODE (1) // ROM has JPEG decode library #define ESP_ROM_UART_CLK_IS_XTAL ...
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/* */ #pragma once #define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian #define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian #define ESP_ROM_HAS_MZ_CRC32 (1) // ROM has mz_crc32 function #define ESP_ROM_HAS_JPEG_DECODE ...
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A workaround is required to prevent printf functions from crashing #define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table #define ESP_ROM_HAS_SPI_FLASH (1) // ROM has the implementation of SPI Flash driver #define ESP_ROM_HAS_ETS_PRINTF_BUG (1) // ROM has ets_printf bug when...
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/* */ #pragma once #ifdef __cplusplus extern "C" { #endif #include #include "hal/uart_ll.h" #define ESP_ROM_CDC_ACM_WORK_BUF_MIN 128 typedef enum { ESP_ROM_UART_0, ESP_ROM_UART_1, ESP_ROM_UART_USB } esp_rom_uart_num_t; /** */ void esp_rom_output_tx_wait_idle(uint8_t serial_num); void esp_rom_uart_...
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/* */ #pragma once / / #ifdef __cplusplus extern "C" { #endif #define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0 #define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1 #define ESP_ROM_SPIFLASH_BP0 BIT2 #define ESP_ROM_SPIFLASH_BP1 BIT3 #define ESP_ROM_SPIFLASH_BP2 B...
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/* */ /** */ #include #ifdef __cplusplus extern "C" { #endif /** */ uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add); /** */ uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); /** */ void esp_rom_regi2c_write(uint8_t block...
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/* */ #pragma once #include "sdkconfig.h" #include #include #include "esp_rom_spiflash_defs.h" #ifdef __cplusplus extern "C" { #endif typedef enum { ESP_ROM_SPIFLASH_QIO_MODE = 0, ESP_ROM_SPIFLASH_QOUT_MODE, ESP_ROM_SPIFLASH_DIO_MODE, ESP_ROM_SPIFLASH_DOUT_MODE, ESP_ROM_SPIFLASH_FASTRD_MODE,...
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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by a...
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/* */ #pragma once #ifdef __cplusplus extern "C" { #endif #include #include "sdkconfig.h" /** */ #define ESP_ROM_MD5_DIGEST_LEN 16 #if CONFIG_IDF_TARGET_ESP32C2 /** typedef struct mbedtls_md5_context { uint32_t total[2]; /*!< number of bytes processed */ uint32_t state[4]; /*!< interm...
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CONFIG_IDF_TARGET_ESP32C2 /** typedef struct MD5Context { uint32_t buf[4]; uint32_t bits[2]; uint8_t in[64]; } md5_context_t; /** */ void esp_rom_md5_init(md5_context_t *context); /** */ void esp_rom_md5_update(md5_context_t *context, const void *buf, uint32_t len); /** */ void esp_rom_md5_final(uint8...
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/* */ #ifndef MINIZ_HEADER_INCLUDED #define MINIZ_HEADER_INCLUDED #include #include "esp_rom_caps.h" // Defines to completely disable specific portions of miniz.c: // If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl. // Define MINIZ_NO_STDIO to disable all ...
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#define MINIZ_NO_ZLIB_APIS // Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib. #define MINIZ_NO_ZLIB_COMPATIBLE_NAMES // Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc. // Note if MINIZ_NO_MALLOC is defined then the user must always provid...
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#define MINIZ_X86_OR_X64_CPU 1 #endif #if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU // Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian. #define MINIZ_LITTLE_ENDIAN 1 #endif #if MINIZ_X86_OR_X64_CPU // Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient ...
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void mz_free(void *p); #define MZ_ADLER32_INIT (1) // mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL. mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len); #define MZ_CRC32_INIT (0) #if ESP_ROM_HAS_MZ_CRC32 // mz_crc32() returns the initial CRC-32 value to...
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1.15" #define MZ_VERNUM 0x91F0 #define MZ_VER_MAJOR 9 #define MZ_VER_MINOR 1 #define MZ_VER_REVISION 15 #define MZ_VER_SUBREVISION 0 // Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs). enum { MZ_NO_FLUS...
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typedef struct mz_stream_s { const unsigned char *next_in; // pointer to next byte to read unsigned int avail_in; // number of bytes available at next_in mz_ulong total_in; // total number of bytes consumed so far unsigned char *next_out; // pointer to next byte ...
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c. const char *mz_version(void); // mz_deflateInit() initializes a compressor with default options: // Parameters: // pStream must point to an initialized mz_stream struct. // level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION]. // level 1 enables a specially optimized compression function that's been op...
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c) int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy); // Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2(). int mz_deflateReset(mz_streamp pStream); // mz_deflate(...
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// MZ_PARAM_ERROR if one of the parameters is invalid. // MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.) int mz_deflate(mz_streamp pStream, int flush); // mz_deflateEnd() deinitializes a comp...
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mz_ulong mz_compressBound(mz_ulong source_len); // Initializes a decompressor. int mz_inflateInit(mz_streamp pStream); // mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer: // window_bits must be...
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// MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data. // Return values: // MZ_OK on success. Either more input is needed but not available, and/or there's more output to be ...
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int mz_inflate(mz_streamp pStream, int flush); // Deinitializes a decompressor. int mz_inflateEnd(mz_streamp pStream); // Single-call decompression. // Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure. int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *p...
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#ifdef _MSC_VER #define MZ_MACRO_END while (0, 0) #else #define MZ_MACRO_END while (0) #endif // ZIP archive reading/writing #ifndef MINIZ_NO_ARCHIVE_APIS enum { MZ_ZIP_MAX_IO_BUF_SIZE = 64 * 1024, MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260, MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256 }; typedef struct { ...
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// These functions read and validate the archive's central directory. mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags); mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags); #ifndef MINIZ_NO_STDIO mz_bool mz_zip_reader_init_file(mz_zip_a...
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mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size); // Attempts to locates a file in the archive's central directory. // Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH // Returns -1 if the file cannot be found. int mz_zip_reader_l...
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void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags); void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags); // Extracts a archive file using a callback function to output the file's data. mz_bool mz_z...
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mz_bool mz_zip_reader_end(mz_zip_archive *pZip); // ZIP archive writing #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS // Inits a ZIP archive writer. mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size); mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t in...
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// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before // the archive is finalized the file's central directory will be hosed. mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename); // Adds th...
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This function also records the disk file's modified time into the archive. // level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION. mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *p...
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