text stringlengths 1 9.98k | __index_level_0__ int64 0 4.17k |
|---|---|
CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
lock->owner = SPINLOCK_FREE;
lock->count = 0;
#endif
}
/**
*/
static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *lock, int32_t timeout)
{
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE && !BOOTLOADER_BUILD
uint32_t irq_status;
uint32_t core_owner... | 183 |
Simply increment the nesting count
if (lock->owner == core_owner_id) {
assert(lock->count > 0 && lock->count count++;
#if __XTENSA__
XTOS_RESTORE_INTLEVEL(irq_status);
#else
rv_utils_restore_intlevel_regval(irq_status);
#endif
return true;
}
/* First attempt to take the loc... | 183 |
lock->count) { // If this is the last recursive release of the lock, mark the lock as free
lock->owner = SPINLOCK_FREE;
} else {
assert(lock->count < 0x100); // Indicates memory corruption
}
#if __XTENSA__
XTOS_RESTORE_INTLEVEL(irq_status);
#else
rv_utils_restore_intlevel_regval(irq_sta... | 183 |
/*
*/
#pragma once
#include "sdkconfig.h"
#include
#include
#include
#include "soc/soc_caps.h"
#ifdef __XTENSA__
#include "xtensa_api.h"
#include "xt_utils.h"
#elif __riscv
#include "riscv/rv_utils.h"
#endif
#include "esp_intr_alloc.h"
#include "esp_err.h"
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#e... | 184 |
/*
*/
#include "sdkconfig.h"
#include "esp_rom_sys.h"
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
#define ESP_FAULT_ASSERT(CONDITION) do { \
asm volatile ("" ::: "memory"); \
if(!(CONDITION)) _ESP_FAULT_RESET(); \
asm volatile ("" ::: "me... | 185 |
Illegal instruction opcodes are there as a fallback to crash the CPU in case it doesn't
reset as expected.
*/
#ifndef ESP_FAULT_ASSERT_DEBUG
#define _ESP_FAULT_RESET() do { \
esp_rom_software_reset_system(); \
_ESP_FAULT_ILLEGAL_INSTRUCTION; \
} while(0)
#else // ESP_FAULT_AS... | 185 |
/*
*/
#pragma once
#warning "This header is deprecated. Please use esp_intr_types.h instead"
#include "esp_intr_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/// @brief legacy type compatibility
typedef esp_intr_cpu_affinity_t intr_cpu_id_t;
#define INTR_CPU_CONVERT_ID ESP_INTR_CPU_AFFINITY_TO_CORE_ID
#define IN... | 186 |
/*
*/
/* Recommendation of using API RTC_WDT.
1) Setting and enabling rtc_wdt:
@code
rtc_wdt_protect_off();
rtc_wdt_disable();
rtc_wdt_set_length_of_reset_signal(RTC_WDT_SYS_RESET_SIG, RTC_WDT_LENGTH_3_2us);
rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_RESET_SYSTEM); //RTC_WDT_STAGE_ACTION_R... | 187 |
h"
#include "esp_err.h"
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
#ifdef __cplusplus
extern "C"
{
#endif
/// List of stage of rtc watchdog. WDT has 4 stage.
typedef enum {
RTC_WDT_STAGE0 = 0, /*!< Stage 0 */
RTC_WDT_STAGE1 = 1, /*!< Stage 1 */
RTC_WDT_STAGE2 = 2, /*!< Stage 2 *... | 187 |
The RTC is an exception to this, and it will not be reset. */
RTC_WDT_STAGE_ACTION_RESET_RTC = RTC_WDT_STG_SEL_RESET_RTC /*!< Reset the main system and the RTC. */
} rtc_wdt_stage_action_t;
/// Type of reset signal
typedef enum {
RTC_WDT_SYS_RESET_SIG = 0, /*!< System reset signal length selectio... | 187 |
/*
*/
#pragma once
#include
#include "esp_err.h"
#include "hal/touch_sensor_types.h"
#include "hal/gpio_types.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
Definitions for the deepsleep prepare callbacks
*/
typedef void (*esp_deep_sleep_cb_t)(void);
/**
*/
#if SOC_PM_SUPPORT_EXT1_WAK... | 188 |
< RTC IO, sensors and ULP co-processor
#endif
#if SOC_PM_SUPPORT_RTC_SLOW_MEM_PD
ESP_PD_DOMAIN_RTC_SLOW_MEM, //!< RTC slow memory
#endif
#if SOC_PM_SUPPORT_RTC_FAST_MEM_PD
ESP_PD_DOMAIN_RTC_FAST_MEM, //!< RTC fast memory
#endif
ESP_PD_DOMAIN_XTAL, //!< XTAL oscillator
#if SOC_PM_SUPPORT_XTA... | 188 |
< Number of domains
} esp_sleep_pd_domain_t;
#define ESP_PD_DOMAIN_RTC8M _Pragma("GCC warning \"'ESP_PD_DOMAIN_RTC8M' enum is deprecated\"") ESP_PD_DOMAIN_RC_FAST
/**
*/
typedef enum {
ESP_PD_OPTION_OFF, //!< Power down the power domain in sleep mode
ESP_PD_OPTION_ON, //!< Keep power domain enable... | 188 |
< Wakeup caused by touchpad
ESP_SLEEP_WAKEUP_ULP, //!< Wakeup caused by ULP program
ESP_SLEEP_WAKEUP_GPIO, //!< Wakeup caused by GPIO (light sleep only on ESP32, S2 and S3)
ESP_SLEEP_WAKEUP_UART, //!< Wakeup caused by UART (light sleep only)
ESP_SLEEP_WAKEUP_WIFI, /... | 188 |
/*
*/
#pragma once
#include
#include "esp_err.h"
#include "soc/soc_caps.h"
#if !SOC_HMAC_SUPPORTED && !CI_HEADER_CHECK
#error "HMAC peripheral is not supported for the selected target"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
HMAC_KEY0 = 0,
HMAC_KEY1,
HMAC_KEY2,
HMAC_K... | 189 |
/*
*/
#pragma once
#include "esp_err.h"
#include "soc/soc_caps.h"
#if SOC_KEY_MANAGER_SUPPORTED
#ifdef __cplusplus
extern "C" {
#endif
#include "hal/key_mgr_types.h"
#include "hal/huk_types.h"
#include "esp_attr.h"
#define KEY_MGR_SW_INIT_KEY_SIZE 32
#define KEY_MGR_ASSIST_INFO_SIZE 64
#define KEY... | 190 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ESP_CRYPTO_DPA_SEC_LEVEL_OFF = 0, /*!< DPA protection disabled */
ESP_CRYPTO_DPA_SEC_LEVEL_LOW, /*!< DPA protection level low */
ESP_CRYPTO_DPA_SEC_LEVEL_MIDDLE, /*!< DPA protection level medium */
ESP_CRYPT... | 191 |
/*
*/
#pragma once
#include "esp_err.h"
#include "sdkconfig.h"
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ESP_MAC_WIFI_STA, /**< MAC for WiFi Station (6 bytes... | 192 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/** Function prototype for interrupt handler function */
typedef void (*intr_handler_t)(void *arg);
/** Handle to an interrupt handler */
typedef struct intr_handle_data_t *intr_handle_t;
/**
*/
typedef enum {
ESP_INTR_CPU_AFFINITY_AUTO, ///< Install t... | 193 |
/*
*/
#pragma once
#include
#include
#include "soc/soc_caps.h"
#include "esp_err.h"
#include "esp_etm.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef struct async_memcpy_context_t *async_memcpy_handle_t;
/** @cond */
/// @brief legacy driver handle type
typedef async_memcpy_handle_t async_memcpy_t;
/*... | 194 |
backlog = 8, \
.sram_trans_align = 0, \
.psram_trans_align = 0, \
.flags = 0, \
}
#if SOC_AHB_GDMA_SUPPORTED
/**
*/
esp_err_t esp_async_memcpy_install_gdma_ahb(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
#endif // SOC_AHB... | 194 |
< memory copy finished */
} async_memcpy_etm_event_t;
/**
*/
esp_err_t esp_async_memcpy_new_etm_event(async_memcpy_handle_t mcp, async_memcpy_etm_event_t event_type, esp_etm_event_handle_t *out_event);
#endif // SOC_ETM_SUPPORTED
#ifdef __cplusplus
}
#endif
| 194 |
/*
*/
/////////////////////////////////////////////////////////////////////////////////////////
// ESP Memory Protection API (PMS)
// - allows configuration and violation-interrupt handling of the PMS module operations
// - not intended for public use.
#pragma once
#include "sdkconfig.h"
#if CONFIG_ESP_SYSTEM_MEMPR... | 195 |
/*
*/
#ifndef __ESP_RANDOM_H__
#define __ESP_RANDOM_H__
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
uint32_t esp_random(void);
/**
*/
void esp_fill_random(void *buf, size_t len);
#ifdef __cplusplus
}
#endif
#endif /* __ESP_RANDOM_H__ */
| 196 |
/*
*/
#pragma once
#include
#include "soc/dport_access.h"
#ifdef __cplusplus
extern "C" {
#endif
#if defined(BOOTLOADER_BUILD) || defined(CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE) || !SOC_DPORT_WORKAROUND
#define DPORT_STALL_OTHER_CPU_START()
#define DPORT_STALL_OTHER_CPU_END()
#else
#include "esp_ipc_isr.h"
#define DP... | 197 |
/*
*/
#include
#include "soc/soc_caps.h"
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
bool periph_rtc_dig_clk8m_enable(void);
/**
*/
void periph_rtc_dig_clk8m_disable(void);
/**
*/
uint32_t periph_rtc_dig_clk8m_get_freq(void);
#if SOC_CLK_APLL_SUPPORTED
/**
*/
void periph_rtc_apll_acqu... | 198 |
/*
*/
#pragma once
#include
#include
#include
#include "esp_err.h"
#include "esp_intr_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup Intr_Alloc
*/
/** @brief Interrupt allocation flags
//Keep the LEVELx values as they are here; they match up with (13
*/
esp_err_t esp_intr_alloc(int sourc... | 199 |
(1 << level) & ESP_INTR_FLAG_LEVELMASK : 0;
}
/**
*/
esp_err_t esp_intr_dump(FILE *stream);
/**@}*/
#ifdef __cplusplus
}
#endif
| 199 |
/*
*/
#pragma once
#include
#include
#include
#include "soc/soc.h"
#include "soc/soc_caps.h"
#include "sdkconfig.h"
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#endif
/** Common functions, to be kept in sync with bootloader_memory_utils.h **/
/**
*/
__attribute__((always_inline))
inline static bool ... | 200 |
= 0));
}
#if CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
/**
*/
bool esp_stack_ptr_in_extram(uint32_t sp);
#endif
/**
*/
__attribute__((always_inline))
inline static bool esp_stack_ptr_is_sane(uint32_t sp)
{
return esp_stack_ptr_in_dram(sp)
#if CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
|| esp_stack_ptr_in... | 200 |
/*
*/
#pragma once
#include
#include "esp_hmac.h"
#include "esp_err.h"
#include "esp_ds_err.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ESP_DS_IV_BIT_LEN 128
#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
#define ESP_DS_SIGNATURE_MAX_BIT_LEN SOC_RSA_MAX_BIT_LEN
#define ESP_DS_SIGNAT... | 201 |
rsa_length + 1)*4 bytes, and those
bytes must be in little endian format. It is your responsibility to apply your hash function
and padding before calling this function, if required. (e.g. message = padding(hash(inputMsg)))
*/
esp_err_t esp_ds_sign(const void *message,
const esp_ds_data_t *... | 201 |
/*
*/
#pragma once
#include
#include
#include "sdkconfig.h"
#include "esp_bit_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
CHIP_ESP32 = 1, //!< ESP32
CHIP_ESP32S2 = 2, //!< ESP32-S2
CHIP_ESP32S3 = 9, //!< ESP32-S3
CHIP_ESP32C3 = 5, //!< ESP32-C3
CHIP_ESP32C2 = 12, /... | 202 |
< Chip has Bluetooth LE
#define CHIP_FEATURE_BT BIT(5) //!< Chip has Bluetooth Classic
#define CHIP_FEATURE_IEEE802154 BIT(6) //!< Chip has IEEE 802.15.4
#define CHIP_FEATURE_EMB_PSRAM BIT(7) //!< Chip has embedded psram
/**
*/
typedef struct {
esp_chip_model_t model; //!< chi... | 202 |
/*
*/
#pragma once
#include
#include "esp_err.h"
#include "soc/soc_caps.h"
#include "soc/clk_tree_defs.h"
#include "driver/gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX || SOC_GPIO_CLOCKOUT_BY_IO_MUX
typedef struct esp_clock_output_mapping *esp_clock_output_mapping_handle_t;
... | 203 |
/*
*/
#ifndef __ESP_INTERFACE_H__
#define __ESP_INTERFACE_H__
#include
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ESP_IF_WIFI_STA = 0, /**< Station interface */
ESP_IF_WIFI_AP, /**< Soft-AP interface */
ESP_IF_WIFI_NAN, /**< NAN interface */
ESP_IF_ETH, ... | 204 |
/*
*/
#pragma once
#include
#include "esp_log.h"
#include "esp_sleep.h"
#ifdef __cplusplus
extern "C" {
#endif
#define RTC_STR(str) (__extension__({static const RTC_RODATA_ATTR char _fmt[] = (str); (const char *)&_fmt;}))
#define RTC_LOG_FORMAT(letter, format) LOG_COLOR_ ## letter format LOG_RESET_COLOR "\n"
#d... | 205 |
.. ) ESP_RTC_LOG(ESP_LOG_VERBOSE, RTC_LOG_FORMAT(V, format), ##__VA_ARGS__)
/**
*/
void esp_wake_stub_sleep(esp_deep_sleep_wake_stub_fn_t new_stub);
/**
*/
void esp_wake_stub_uart_tx_wait_idle(uint8_t uart_no);
/**
*/
void esp_wake_stub_set_wakeup_time(uint64_t time_in_us);
/**
*/
uint32_t esp_wake_stub_get_wa... | 205 |
/*
*/
#pragma once
#include "esp_err.h"
#include "soc/clk_tree_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, /*< Get value from the data cached by the driver; If the data is 0, then a calibration will be performed */
ESP_CLK_TREE_SRC_FREQ_PR... | 206 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
MEMPROT_PMS_WORLD_NONE = 0x00000000,
MEMPROT_PMS_WORLD_0 = 0x00000001,
MEMPROT_PMS_WORLD_1 = 0x00000002,
MEMPROT_PMS_WORLD_2 =... | 207 |
/*
*/
#pragma once
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
#define ESP_ERR_MEMPROT_MEMORY_TYPE_INVALID (ESP_ERR_MEMPROT_BASE + 1) /**< Memory type invalid in given context */
#define ESP_ERR_MEMPROT_SPLIT_ADDR_INVALID (ESP_ERR_MEMPROT_BASE + 2) /**< Splitting address invalid ... | 208 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include
// This header is only a wrapper on ROM CRC API
#include "esp_rom_crc.h"
/**
*/
static inline uint32_t esp_crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len)
{
return esp_rom_crc32_le(crc, buf, len);
}
/**
*/
static inline uint32_t esp_... | 209 |
/*
*/
#pragma once
/*
Note: This is a compatibility header. Call the interfaces in esp_cpu.h instead
*/
#include "esp_attr.h"
#include "esp_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
FORCE_INLINE_ATTR __attribute__((deprecated)) void soc_ll_stall_core(int core)
{
esp_cpu_stall(core);
}
FORCE_INLINE_ATTR _... | 210 |
/*
*/
#pragma once
/*
Note: This is a compatibility header. Call the interfaces in esp_cpu.h instead
*/
#include
#include
#include "soc/soc_caps.h"
#include "esp_attr.h"
#include "esp_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
INTDESC_NORMAL = 0,
INTDESC_RESVD,
INTDESC_SPECIAL,
} i... | 211 |
priority;
}
/**
*/
FORCE_INLINE_ATTR __attribute__((deprecated))
int_desc_flag_t interrupt_controller_hal_desc_flags(int interrupt_number, int cpu_number)
{
esp_cpu_intr_desc_t intr_desc;
esp_cpu_intr_get_desc(cpu_number, interrupt_number, &intr_desc);
int_desc_flag_t ret;
if (intr_desc.flags & ESP_CP... | 211 |
/*
*/
#pragma once
/*
Note: This is a compatibility header. Call the interfaces in esp_cpu.h instead
*/
#include "soc/soc_caps.h"
#include "hal/soc_ll.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_CPU_CORES_NUM > 1 // We only allow stalling/unstalling of other cores
/**
*/
#define soc_hal_stall_core(core) ... | 212 |
/*
*/
#pragma once
/*
Note: This is a compatibility header. Call the interfaces in esp_cpu.h instead
*/
#include
#include
#include "soc/soc_caps.h"
#include "esp_attr.h"
#include "esp_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
FORCE_INLINE_ATTR __attribute__((deprecated)) __attribute__((pure)) uint32_t cpu_l... | 213 |
/*
*/
#pragma once
/*
Note: This is a compatibility header. Call the interfaces in esp_cpu.h instead
*/
#include
#include
#include "soc/soc_caps.h"
#include "hal/cpu_ll.h"
#include "esp_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
WATCHPOINT_TRIGGER_ON_RO = ESP_CPU_WATCHPOINT_LOAD, // on... | 214 |
/*
*/
#pragma once
#include "esp_memory_utils.h"
#warning "soc_memory_types.h is deprecated, please migrate to esp_memory_utils.h"
| 215 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 216 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
void esp_crypto_ecc_lock_acquire(void);
/**
void esp_crypto_ecc_lock_release(void);
#ifdef __cplusplus
}
#endif
| 217 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 218 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void esp_crypto_hmac_lock_acquire(void);
/**
*/
void esp_crypto_hmac_lock_release(void);
/**
*/
void esp_crypto_ds_lock_acquire(void);
/**
*/
void esp_crypto_ds_lock_release(void);
/**
void esp_crypto_sha_aes_lock_acquire(void);
/**
void esp_... | 219 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 220 |
/*
*/
//////////////////////////////////////////////////////////
// ESP32-C3 PMS memory protection types
//
#pragma once
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
MEMPROT_TYPE_NONE = 0x00000000,
MEMPROT_TYPE_IRAM0_SRAM =... | 221 |
< Register PMS violation interrupt for panic-handling */
bool lock_feature; /*!< Lock all PMS settings */
void *split_addr; /*!< Main I/D splitting address */
uint32_t mem_type_mask; /*!< Memory types required to protect. See esp_mprot_mem_t enum */
} esp_memp_config_t;
#define ESP_M... | 221 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void esp_crypto_hmac_lock_acquire(void);
/**
*/
void esp_crypto_hmac_lock_release(void);
/**
*/
void esp_crypto_ds_lock_acquire(void);
/**
*/
void esp_crypto_ds_lock_release(void);
/**
void esp_crypto_sha_aes_lock_acquire(void);
/**
void esp_... | 222 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 223 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
void esp_crypto_mpi_lock_acquire(void);
/**
void esp_crypto_mpi_lock_release(void);
#ifdef __cplusplus
}
#endif
| 224 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 225 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void esp_crypto_hmac_lock_acquire(void);
/**
*/
void esp_crypto_hmac_lock_release(void);
/**
*/
void esp_crypto_ds_lock_acquire(void);
/**
*/
void esp_crypto_ds_lock_release(void);
/**
void esp_crypto_sha_aes_lock_acquire(void);
/**
void esp_... | 226 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 227 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void esp_crypto_hmac_lock_acquire(void);
/**
*/
void esp_crypto_hmac_lock_release(void);
/**
*/
void esp_crypto_ds_lock_acquire(void);
/**
*/
void esp_crypto_ds_lock_release(void);
/**
void esp_crypto_sha_aes_lock_acquire(void);
/**
void esp_... | 228 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 229 |
/*
*/
//////////////////////////////////////////////////////////
// ESP32-S3 PMS memory protection types
//
#pragma once
#include "sdkconfig.h"
#include
#include
#include "soc/soc.h"
#include "freertos/FreeRTOSConfig.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
MEMPROT_TYPE_NONE ... | 230 |
1
//default IDF configuration (basic memory regions, split line detection, locked, panic mode on)
#define ESP_MEMPROT_DEFAULT_CONFIG() { \
.invoke_panic_handler = true, \
.lock_feature = true, \
.split_addr = NULL, \
.mem_type_mask = MEMPROT_TYPE_ALL, \
.target_cpu_count = 2, \
.target_cpu = {... | 230 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
void esp_crypto_ds_lock_acquire(void);
/**
*/
void esp_crypto_ds_lock_release(void);
/**
*/
void esp_crypto_hmac_lock_acquire(void);
/**
*/
void esp_crypto_hmac_lock_release(void);
/**
void esp_crypto_sha_aes_lock_acquire(void);
/**
... | 231 |
/*
*/
/* INTERNAL API
*/
#pragma once
#include
#include
#include "esp_attr.h"
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
//convenient constants for better code readabilty
#define RD_ENA true
#define RD_DIS false
#define WR_ENA true
#define WR_D... | 232 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 233 |
/*
*/
//////////////////////////////////////////////////////////
// ESP32-S2 PMS memory protection types
//
#pragma once
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
MEMPROT_TYPE_NONE = 0x00000000,
MEMPROT_TYPE_ALL =... | 234 |
< Lock all PMS settings */
void *split_addr; /*!< Main I/D splitting address */
uint32_t mem_type_mask; /*!< Memory types required to protect. See esp_mprot_mem_t enum */
} esp_memp_config_t;
#define ESP_MEMPROT_DEFAULT_CONFIG() { \
.invoke_panic_handler = true, \
.lock_feature = true, \
... | 234 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
void esp_crypto_dma_lock_acquire(void);
/**
*/
void esp_crypto_dma_lock_release(void);
/**
*/
void esp_crypto_mpi_lock_acquire(void);
/**
*/
void esp_crypto_mpi_lock_release(void);
#ifdef __cplusplus
}
#endif
| 235 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
uint64_t esp_rtc_get_time_us(void);
#ifdef __cplusplus
}
#endif
| 236 |
/*
*/
//////////////////////////////////////////////////////////
// ESP32-P4 PMS memory protection types
//
#pragma once
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
MEMPROT_TYPE_NONE = 0x00000000,
MEMPROT_TYPE_IRAM0_SRAM =... | 237 |
< Register PMS violation interrupt for panic-handling */
bool lock_feature; /*!< Lock all PMS settings */
void *split_addr; /*!< Main I/D splitting address */
uint32_t mem_type_mask; /*!< Memory types required to protect. See esp_mprot_mem_t enum */
} esp_memp_config_t;
#define ESP_M... | 237 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void esp_crypto_hmac_lock_acquire(void);
/**
*/
void esp_crypto_hmac_lock_release(void);
/**
*/
void esp_crypto_ds_lock_acquire(void);
/**
*/
void esp_crypto_ds_lock_release(void);
/**
void esp_crypto_sha_aes_lock_acquire(void);
/**
void esp_... | 238 |
/*
*/
#pragma once
#include
#include
#include
#include
#include "soc/soc_caps.h"
#if SOC_PMU_SUPPORTED
#include "hal/pmu_hal.h"
#include "pmu_param.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
PMU_HP_ICG_MODEM_CODE_SLEEP = 0,
PMU_HP_ICG_MODEM_CODE_MODEM = 1,
PMU_HP_ICG_... | 239 |
< Power down DIG peripherals
#define RTC_SLEEP_PD_INT_8M PMU_SLEEP_PD_RC_FAST //!< Power down Internal 20M oscillator
#define RTC_SLEEP_PD_XTAL PMU_SLEEP_PD_XTAL //!< Power down main XTAL
#define RTC_SLEEP_PD_MODEM PMU_SLEEP_PD_MODEM //!< Power down modem(include wif... | 239 |
< GPIO wakeup
#if SOC_LP_TIMER_SUPPORTED
#define RTC_TIMER_TRIG_EN PMU_LP_TIMER_WAKEUP_EN //!< Timer wakeup
#else
#define RTC_TIMER_TRIG_EN 0
#endif
#if SOC_WIFI_SUPPORTED
#define RTC_WIFI_TRIG_EN PMU_WIFI_SOC_WAKEUP_EN //!< WIFI wakeup (light sleep only)
#else
#define RTC_WIFI_TRIG_E... | 239 |
/*
*/
#pragma once
#include
#include
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_sleep.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
#if CONFIG_MAC_BB_PD
/**
*/
void mac_bb_power_down_cb_execute(void);
/**
*/
void mac_bb_power_up_cb_execute(void);
#endif // CONFIG_MAC_BB_PD
#if SOC_PM_RET... | 240 |
/*
*/
#pragma once
#include
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
/**
*/
void gpio_sleep_mode_config_apply(void);
/**
*/
void gpio_sleep_mode_config_unapply(void);
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
/**
*/
void e... | 241 |
/*
*/
#pragma once
#include
#include
#include "esp_private/mspi_timing_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
**/
/**
*/
void mspi_timing_config_set_flash_clock(uint32_t flash_freq_mhz, mspi_timing_speed_mode_t speed_mode, bool control_both_mspi);
/**
*/
void mspi_timing_config_set_psram_clock(ui... | 242 |
/*
*/
#pragma once
#include
#include
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct esp_etm_event_t esp_etm_event_t;
typedef struct esp_etm_task_t esp_etm_task_t;
/**
*/
typedef enum {
ETM_TRIG_PERIPH_GPIO, /*!< ETM trigger source: GPIO */
ETM_TRIG_PERIPH_GDMA, /*!< E... | 243 |
/*
*/
#pragma once
#include
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_PAU_SUPPORTED
#include "esp_regdma.h"
#include "soc/retention_periph_defs.h"
/**
*/
typedef periph_retention_module_bitmap_t sleep_retention_module_bitmap_t;
typedef regdma_entry_buf_t ... | 244 |
/*
*/
/**
*/
#pragma once
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void sar_periph_ctrl_init(void);
/*
**/
/**
*/
void sar_periph_ctrl_adc_oneshot_power_acquire(void);
/**
*/
void sar_periph_ctrl_adc_oneshot_power_release(void);
/**
*/
void sar_periph_ctrl_adc_continuous_power_ac... | 245 |
/*
*/
#pragma once
#include
#include
#include "esp_assert.h"
#include "esp_macros.h"
#include "esp_err.h"
#include "esp_bit_defs.h"
#include "soc/soc_caps.h"
#include "soc/regdma.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_PAU_SUPPORTED
#include "hal/pau_types.h"
#define REGDMA_LINK_DBG 0 /* Enable ... | 246 |
..);
/**
*/
void *regdma_link_recursive(void *link, int entry, void (*hook)(void *, int, int));
/**
*/
void *regdma_find_link_by_pos(void *link, int entry, int pos);
/**
*/
void *regdma_find_link_by_id(void *link, int entry, int id);
/**
*/
void regdma_link_destroy(void *link, int entry);
/**
*/
void regdma_l... | 246 |
..) regdma_link_init((pcfg), (branch), (module), __VA_NARG__(__VA_ARGS__), ##__VA_ARGS__)
#define regdma_link_update_next_safe(link, ...) regdma_link_update_next((link), __VA_NARG__(__VA_ARGS__), ##__VA_ARGS__)
#endif // SOC_PAU_SUPPORTED
#ifdef __cplusplus
}
#endif
| 246 |
/*
*/
#pragma once
#include
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
#if SOC_PM_SUPPORT_CPU_PD
/**
*/
bool cpu_domain_pd_allowed(void);
/**
*/
esp_err_t sleep_cpu_configure(bool light_sleep_enable);
#endif
#if SOC_PM_SUPPORT_CPU_PD && SOC_PM_CPU_RETENTION_BY_RTCCNTL
/**
*/
voi... | 247 |
/*
*/
#pragma once
#include
#include "sdkconfig.h"
#include "esp_rom_regi2c.h"
#include "soc/regi2c_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
#define regi2c_read_reg_raw esp_rom_regi2c_read
#define regi2c_read_reg_mask_raw esp_rom_regi2c_read_mask
#define regi2c_write_reg_raw esp_rom_regi2c_w... | 248 |
Don't use it in SDK. Use the functions above. */
void regi2c_enter_critical(void);
void regi2c_exit_critical(void);
#endif // BOOTLOADER_BUILD
/* Convenience macros for the above functions, these use register definitions
*/
#define REGI2C_WRITE_MASK(block, reg_add, indata) \
regi2c_ctrl_write_reg_mask(block, ... | 248 |
Internal use only.
*/
void regi2c_saradc_enable(void);
void regi2c_saradc_disable(void);
#ifdef __cplusplus
}
#endif
| 248 |
/*
*/
#pragma once
#include
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_USB_SERIAL_JTAG_SUPPORTED
typedef struct {
bool usj_clock_enabled;
bool usj_pad_enabled;
} sleep_console_usj_enable_state_t;
/**
*/
void sleep_console_usj_pad_backup_and_disable(void);
/**
*/
void sleep_co... | 249 |
/*
*/
#pragma once
#include
#include
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
/**
*/
SLEEP_EVENT_HW_EXIT_SLEEP, // CPU wake up and start to work
SLEEP_EVENT_SW_CLK_READY, // CPU frequency restore
SLEEP_EVENT_SW_EXIT_SLEEP, /... | 250 |
/*
*/
// DO NOT USE THESE APIS IN ANY APPLICATIONS
// GDMA driver is not public for end users, but for ESP-IDF developers.
#pragma once
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
esp_err_t gdma_sleep_retention_init(int group_id, int pair_id);
/**
*/
esp_err_t gdma_sleep_retention_deinit... | 251 |
/*
*/
#pragma once
#include
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
MIPI_CSI_BRG_USER_CSI, ///< Used by CSI Host
MIPI_CSI_BRG_USER_ISP_DVP, ///< Used by ISP DVP
MIPI_CSI_BRG_USER_SHARE, ///< Don't care user, share the usage with other users
} mipi_csi_brg_use... | 252 |
/*
*/
#pragma once
#include
#include
#include
#include "esp_err.h"
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "hal/modem_clock_types.h"
#include "esp_private/esp_pmu.h"
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
#include "hal/modem_clock_hal.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
*... | 253 |
/*
*/
#pragma once
#include
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
#if CONFIG_ESP_SLEEP_DEBUG
typedef struct {
uint32_t lightsleep_cnt;
uint64_t sleep_in_rtc_time_stamp;
uint64_t sleep_out_rtc_time_stamp;
uint32_t wakeup_triggers;
uint32_t sleep_flags;
esp_err_t slee... | 254 |
/*
*/
#pragma once
#include
#include
#include "sdkconfig.h"
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
bool clock_domain_pd_allowed(void);
/**
*/
esp_err_t sleep_clock_system_retention_init(void);
/**
*/
void sleep_clock_system_retention_deinit(void);
/**
*/
esp_err_t sleep... | 255 |
/*
*/
#include "sdkconfig.h"
#include
#if CONFIG_IDF_TARGET_ARCH_RISCV
#include "esp_cpu.h"
#include "riscv/instruction_decode.h"
/**
*/
static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask)
{
if (rsvd_mask & BIT(intr_num)) {
return ESP_CPU_INTR_DESC_FLAG_RESVD;
}
... | 256 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.