repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
tactcomplabs/xbgas-binutils-gdb | 1,036 | sim/testsuite/bfin/m16.s | // Test various moves to single register half
# mach: bfin
.include "testutils.inc"
start
// load r0=0x7fffffff
// load r1=0x00ffffff
// load r2=0xf0000000
// load r3=0x0000007f
// load r4=0x00000080
loadsym P0, data0;
R0 = [ P0 ++ ];
R1 = [ P0 ++ ];
R2 = [ P0 ++ ];
R3 = [ P0 ++ ];
R4 = [ P0 ++ ];
// extract... |
tactcomplabs/xbgas-binutils-gdb | 10,050 | sim/testsuite/bfin/c_dsp32shift_ahalf_lp.s | //Original:/testcases/core/c_dsp32shift_ahalf_lp/c_dsp32shift_ahalf_lp.dsp
// Spec Reference: dsp32shift ashift half reg left positive
# mach: bfin
.include "testutils.inc"
start
// Ashift : positive data, count (+)=left (half reg)
// d_lo = ashft (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x00000000;
imm32 r1, 0x0000... |
tactcomplabs/xbgas-binutils-gdb | 2,862 | sim/testsuite/bfin/byteop1p.s | # Blackfin testcase for BYTEOP1P
# mach: bfin
.include "testutils.inc"
start
.macro check_it res:req
imm32 R7, \res
CC = R6 == R7;
IF !CC JUMP 1f;
.endm
.macro test_byteop1p i0:req, i1:req, res:req, resT:req, resR:req, resTR:req
dmm32 I0, \i0
dmm32 I1, \i1
R6 = BYTEOP1P (R1:0, R3:2);
check_it \res
R6 =... |
tactcomplabs/xbgas-binutils-gdb | 6,642 | sim/testsuite/bfin/c_mmr_loop_user_except.S | //Original:/proj/frio/dv/testcases/core/c_mmr_loop_user_except/c_mmr_loop_user_except.dsp
// Spec Reference: c_mmr_loop_user_except
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(gen_int.inc)
include(selfcheck.inc)
include(std.inc)
include(mmrs.inc)
#ifndef STACK... |
tactcomplabs/xbgas-binutils-gdb | 1,233 | sim/testsuite/bfin/c_dsp32shiftim_lhh.s | //Original:/testcases/core/c_dsp32shiftim_lhh/c_dsp32shiftim_lhh.dsp
# mach: bfin
.include "testutils.inc"
start
// Spec Reference: dsp32shiftimm lshift: lshift / lshift
imm32 r0, 0x01230abc;
imm32 r1, 0x12345678;
imm32 r2, 0x23456789;
imm32 r3, 0x3456789a;
imm32 r4, 0x456789ab;
imm32 r5, 0x56789abc;
imm32 r6, 0... |
tactcomplabs/xbgas-binutils-gdb | 10,963 | sim/testsuite/bfin/se_loop_ppm_1.S | //Original:/proj/frio/dv/testcases/seq/se_loop_ppm_1/se_loop_ppm_1.dsp
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
/////////////////////////////////////////////////////////////////////////////
///////////////////////// Include Files ////////////////////////////... |
tactcomplabs/xbgas-binutils-gdb | 1,409 | sim/testsuite/bfin/a22.s | // Test ALU NEG accumulators
# mach: bfin
.include "testutils.inc"
start
R0 = 0xffffffff;
A0.w = R0;
R0 = 0x7f (X);
A0.x = R0;
A0 = - A0;
_DBG A0;
R4 = A0.w;
R5 = A0.x;
DBGA ( R4.H , 0x0000 ); DBGA ( R4.L , 0x0001 );
DBGA ( R5.H , 0xffff ); DBGA ( R5.L , 0xff80 );
R0 = 0x1;
A0.w = R0;
R0 = 0x0;
A0.... |
tactcomplabs/xbgas-binutils-gdb | 6,516 | sim/testsuite/bfin/c_seq_ac_raise_mv.S | //Original:/proj/frio/dv/testcases/core/c_seq_ac_raise_mv/c_seq_ac_raise_mv.dsp
// Spec Reference: sequencer stage AC (raise + regmv)
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(std.inc)
include(selfcheck.inc)
include(gen_int.inc)
INIT_R_REGS(0);
INIT_P_REGS(0... |
tactcomplabs/xbgas-binutils-gdb | 5,429 | sim/testsuite/bfin/c_dsp32alu_rmp.s | //Original:/testcases/core/c_dsp32alu_rmp/c_dsp32alu_rmp.dsp
// Spec Reference: dsp32alu dreg = -/+ ( dreg, dreg)
# mach: bfin
.include "testutils.inc"
start
// ALU operations include parallel addition, subtraction
// and 32-bit data. If an operation use a single ALU only, it uses ALU0.
imm32 r0, 0x15678911;
imm... |
tactcomplabs/xbgas-binutils-gdb | 1,671 | sim/testsuite/bfin/c_dsp32alu_r_negneg.s | //Original:/testcases/core/c_dsp32alu_r_negneg/c_dsp32alu_r_negneg.dsp
// Spec Reference: dsp32alu dregs = neg / neg dregs
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0xa5678911;
imm32 r1, 0x2789ab1d;
imm32 r2, 0x3b44b515;
imm32 r3, 0x46667717;
imm32 r4, 0x5567891b;
imm32 r5, 0x6789ab1d;
imm32 r6, 0x744... |
tactcomplabs/xbgas-binutils-gdb | 1,071 | sim/testsuite/bfin/c_logi2op_log_l_shft_astat.S | # Test ASTAT bits with logical left shift (<<=)
# mach: bfin
.include "testutils.inc"
#include "test.h"
start
.macro __do val:req, shift:req, exp:req
# First test when ASTAT starts with all bits cleared
imm32 R2, \val;
ASTAT = R0;
R2 <<= \shift;
R3 = ASTAT;
CHECKREG R2, (\val << \shift);
CHECKREG R3, \exp;
#... |
tactcomplabs/xbgas-binutils-gdb | 1,831 | sim/testsuite/bfin/c_except_illopcode.S | //Original:/proj/frio/dv/testcases/core/c_except_illopcode/c_except_illopcode.dsp
// Spec Reference: c_exception illegal opcode
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(std.inc)
include(selfcheck.inc)
INIT_R_REGS(0);
INIT_P_REGS(0);
//CHECK_INIT(p5, 0xe00000... |
tactcomplabs/xbgas-binutils-gdb | 1,803 | sim/testsuite/bfin/c_cc_regmvlogi_mvbrsft.s | //Original:/testcases/core/c_cc_regmvlogi_mvbrsft/c_cc_regmvlogi_mvbrsft.dsp
// Spec Reference: cc: set (regmv & logi2op) used (ccmv & brcc & dsp32sft)
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000020; // cc=1
imm32 r1, 0x00000000; // cc=0
imm32 r2, 0x62b61557;
imm32 r3, 0x07300007;
imm32 r4, 0x00... |
tactcomplabs/xbgas-binutils-gdb | 6,161 | sim/testsuite/bfin/c_dsp32mult_dr_tu.s | //Original:/testcases/core/c_dsp32mult_dr_tu/c_dsp32mult_dr_tu.dsp
// Spec Reference: dsp32mult single dr tu
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x8b235625;
imm32 r1, 0x98ba5127;
imm32 r2, 0xa3846725;
imm32 r3, 0x00080027;
imm32 r4, 0xb0ab8d29;
imm32 r5, 0x10ace82b;
imm32 r6, 0xc00c008d;
imm32 r7, ... |
tactcomplabs/xbgas-binutils-gdb | 12,557 | sim/testsuite/bfin/se_illegalcombination.S | //Original:/proj/frio/dv/testcases/seq/se_illegalcombination/se_illegalcombination.dsp
// Description: Multi-issue Illegal Combinations
# mach: bfin
# sim: --environment operating
# xfail: "missing a few checks; hardware doesnt seem to match PRM?" *-*
#include "test.h"
.include "testutils.inc"
start
//
// Constants a... |
tactcomplabs/xbgas-binutils-gdb | 3,836 | sim/testsuite/bfin/c_ccflag_dr_imm3_uu.s | //Original:/proj/frio/dv/testcases/core/c_ccflag_dr_imm3_uu/c_ccflag_dr_imm3_uu.dsp
// Spec Reference: ccflag dr-imm3 (uu)
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000001;
imm32 r1, 0x00000002;
imm32 r2, 0x00000003;
imm32 r3, 0x00000004;
imm32 r4, 0x00770088;
imm32 r5, 0x009900aa;
imm32 r6, 0x00bb... |
tactcomplabs/xbgas-binutils-gdb | 1,999 | sim/testsuite/bfin/c_regmv_dag_lz_dep.s | //Original:/testcases/core/c_regmv_dag_lz_dep/c_regmv_dag_lz_dep.dsp
// Spec Reference: regmv dag lz dep forward
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS 0;
imm32 r0, 0x11111111;
imm32 r1, 0x22223331;
imm32 r2, 0x44445551;
imm32 r3, 0x66667771;
imm32 r4, 0x88889991;
imm32 r5, 0xaaaabbb1;
imm32 r6, 0... |
tactcomplabs/xbgas-binutils-gdb | 4,305 | sim/testsuite/bfin/c_cc2stat_cc_ac.S | //Original:/testcases/core/c_cc2stat_cc_ac/c_cc2stat_cc_ac.dsp
// Spec Reference: cc2stat cc ac
# mach: bfin
#include "test.h"
.include "testutils.inc"
start
imm32 r0, _UNSET;
imm32 r1, _UNSET;
imm32 r2, _UNSET;
imm32 r3, _UNSET;
imm32 r4, _UNSET;
imm32 r5, _UNSET;
imm32 r6, _UNSET;
imm32 r7, _UNSET;
// tes... |
tactcomplabs/xbgas-binutils-gdb | 4,017 | sim/testsuite/bfin/c_cc2stat_cc_az.s | //Original:/testcases/core/c_cc2stat_cc_az/c_cc2stat_cc_az.dsp
// Spec Reference: cc2stat cc az
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000000;
imm32 r1, 0x00000000;
imm32 r2, 0x00000000;
imm32 r3, 0x00000000;
imm32 r4, 0x00000000;
imm32 r5, 0x00000000;
imm32 r6, 0x00000000;
imm32 r7, 0x00000000;... |
tactcomplabs/xbgas-binutils-gdb | 1,064 | sim/testsuite/bfin/c_brcc_bp3.s | //Original:/testcases/core/c_brcc_bp3/c_brcc_bp3.dsp
// Spec Reference: brcc bp
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000000;
imm32 r1, 0x00000000;
imm32 r2, 0x00000000;
imm32 r3, 0x00000000;
imm32 r4, 0x00000000;
imm32 r5, 0x00000000;
imm32 r6, 0x00000000;
imm32 r7, 0x00000000;
begin:
ASTAT... |
tactcomplabs/xbgas-binutils-gdb | 1,135 | sim/testsuite/bfin/c_dsp32alu_abs.s | //Original:/testcases/core/c_dsp32alu_abs/c_dsp32alu_abs.dsp
// Spec Reference: dsp32alu dregs = abs ( dregs, dregs)
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x15678911;
imm32 r1, 0x2789ab1d;
imm32 r2, 0x34445515;
imm32 r3, 0x46667717;
imm32 r4, 0x5567891b;
imm32 r5, 0x6789ab1d;
imm32 r6, 0x74445515;... |
tactcomplabs/xbgas-binutils-gdb | 1,096 | sim/testsuite/bfin/c_brcc_brf_brt_bp.s | //Original:/testcases/core/c_brcc_brf_brt_bp/c_brcc_brf_brt_bp.dsp
// Spec Reference: brcc brfbrt
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000000;
imm32 r1, 0x00000000;
imm32 r2, 0x00000000;
imm32 r3, 0x00000000;
imm32 r4, 0x00000444;
imm32 r5, 0x00000555;
imm32 r6, 0x00000000;
imm32 r7, 0x000000... |
tactcomplabs/xbgas-binutils-gdb | 2,983 | sim/testsuite/bfin/a6.s | // ALU test program.
// Test instructions
// r7 = +/+ (r0,r1);
// r7 = +/+ (r0,r1) s;
// r7 = +/+ (r0,r1) sx;
# mach: bfin
.include "testutils.inc"
start
// one result overflows positive
R0.L = 0x0001;
R0.H = 0x0010;
R1.L = 0x7fff;
R1.H = 0x0010;
R7 = 0;
ASTAT = R7;
R7 = R0 +|+ R1;
DBGA ( R7.L , 0x8000... |
tactcomplabs/xbgas-binutils-gdb | 3,583 | sim/testsuite/bfin/a0shift.S | # mach: bfin
#include "test.h"
.include "testutils.inc"
start
// 0xfffffe371c
r0 = 0;
r1 = 0;
r2 = 0;
r3 = 0;
r4 = 0;
r5 = 0;
r6 = 0;
r7 = 0;
a1 = a0 =0;
astat = R0;
R6.L = 0x8000;
R5.H = 0x8000;
// load acc with values;
R0.L = 0xc062;
R0.H = 0xffee;
A0.w = R0;
R0.L = 0xc52c;
A0.x = R0;
R0.L = 0x... |
tactcomplabs/xbgas-binutils-gdb | 1,476 | sim/testsuite/bfin/hwloop-bits.S | # Blackfin testcase for HW Loops and user->super transitions
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
.macro check_hwloop_regs lc:req, lt:req, lb:req
R0 = LC0;
CC = R0 == \lc;
IF !CC JUMP fail;
R0 = LT0;
CC = R0 == \lt;
IF !CC JUMP fail;
R0 = LB0;
CC = R0 == \... |
tactcomplabs/xbgas-binutils-gdb | 6,286 | sim/testsuite/bfin/c_dsp32mult_dr_s.s | //Original:/testcases/core/c_dsp32mult_dr_s/c_dsp32mult_dr_s.dsp
// Spec Reference: dsp32mult single dr s
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x8b235625;
imm32 r1, 0x98ba5127;
imm32 r2, 0xa3846725;
imm32 r3, 0x00080027;
imm32 r4, 0xb0ab8d29;
imm32 r5, 0x10ace82b;
imm32 r6, 0xc00c008d;
imm32 r7, 0xd... |
tactcomplabs/xbgas-binutils-gdb | 2,562 | sim/testsuite/bfin/c_brcc_kills_dmiss.s | //Original:/testcases/core/c_brcc_kills_dmiss/c_brcc_kills_dmiss.dsp
// Spec Reference: brcc kills data cache miss
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000000;
imm32 r1, 0x00000001;
imm32 r2, 0x00000002;
imm32 r3, 0x00000003;
imm32 r4, 0x00000004;
imm32 r5, 0x00000005;
imm32 r6, 0x000000... |
tactcomplabs/xbgas-binutils-gdb | 7,130 | sim/testsuite/bfin/c_ldstpmod_st_dr_lo.s | //Original:testcases/core/c_ldstpmod_st_dr_lo/c_ldstpmod_st_dr_lo.dsp
// Spec Reference: c_ldstpmod store dreg lo
# mach: bfin
.include "testutils.inc"
start
// set all regs
init_i_regs 0;
init_b_regs 0;
init_l_regs 0;
init_m_regs 0;
I0 = P3;
I2 = SP;
// initial values
imm32 r0, 0x600f5000;
imm32 r1, 0x700e6001;
... |
tactcomplabs/xbgas-binutils-gdb | 14,881 | sim/testsuite/bfin/c_logi2op_nbittst.s | //Original:/testcases/core/c_logi2op_nbittst/c_logi2op_nbittst.dsp
// Spec Reference: Logi2op !bittst
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000000;
imm32 r1, 0x00000000;
imm32 r2, 0x00000000;
imm32 r3, 0x00000000;
imm32 r4, 0x00000000;
imm32 r5, 0x00000000;
imm32 r6, 0x00000000;
imm32 r7, 0x00... |
tactcomplabs/xbgas-binutils-gdb | 4,478 | sim/testsuite/bfin/c_dsp32shift_signbits_r.s | //Original:/testcases/core/c_dsp32shift_signbits_r/c_dsp32shift_signbits_r.dsp
// Spec Reference: dsp32shift signbits dregs
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x88880000;
imm32 r1, 0x34560001;
imm32 r2, 0x08000002;
imm32 r3, 0x08000003;
imm32 r4, 0x08000004;
imm32 r5, 0x08000005;
imm32 r6, 0x0... |
tactcomplabs/xbgas-binutils-gdb | 4,130 | sim/testsuite/bfin/c_alu2op_conv_h.s | //Original:/testcases/core/c_alu2op_conv_h/c_alu2op_conv_h.dsp
// Spec Reference: alu2op convert h
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00789abc;
imm32 r1, 0x12345678;
imm32 r2, 0x23456789;
imm32 r3, 0x3456789a;
imm32 r4, 0x856789ab;
imm32 r5, 0x96789abc;
imm32 r6, 0xa789abcd;
imm32 r7, 0xb89abc... |
tactcomplabs/xbgas-binutils-gdb | 5,914 | sim/testsuite/bfin/c_dsp32alu_rh_p.s | //Original:/testcases/core/c_dsp32alu_rh_p/c_dsp32alu_rh_p.dsp
// Spec Reference: dsp32alu dreg (half)
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x34678911;
imm32 r1, 0x2789ab1d;
imm32 r2, 0x34645515;
imm32 r3, 0x46667717;
imm32 r4, 0xd678891b;
imm32 r5, 0x6e89ab1d;
imm32 r6, 0x74b45515;
imm32 r7, 0x8... |
tactcomplabs/xbgas-binutils-gdb | 1,203 | sim/testsuite/bfin/byteunpack.s | # Blackfin testcase for playing with BYTEUNPACK
# mach: bfin
.include "testutils.inc"
start
.macro _bu_pre_test i0:req, src0:req, src1:req
dmm32 I0, \i0
imm32 R0, \src0
imm32 R1, \src1
.endm
.macro _bu_chk_test dst0:req, dst1:req
imm32 R2, \dst0
imm32 R3, \dst1
CC = R5 == R2;
IF !CC jump 1f;
CC = R6 == ... |
tactcomplabs/xbgas-binutils-gdb | 6,093 | sim/testsuite/bfin/c_dsp32mac_pair_a1_u.s | //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1_u/c_dsp32mac_pair_a1_u.dsp
// Spec Reference: dsp32mac pair a1 U
# mach: bfin
.include "testutils.inc"
start
A1 = A0 = 0;
// The result accumulated in A1 , and stored to a reg half
imm32 r0, 0x93545abd;
imm32 r1, 0x89bcfec7;
imm32 r2, 0xa8945679;
... |
tactcomplabs/xbgas-binutils-gdb | 3,821 | sim/testsuite/bfin/c_dsp32mac_pair_a1a0.s | //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1a0/c_dsp32mac_pair_a1a0.dsp
// Spec Reference: dsp32mac pair a1a0
# mach: bfin
.include "testutils.inc"
start
A1 = A0 = 0;
// The result accumulated in A , and stored to a reg half
imm32 r0, 0x63545abd;
imm32 r1, 0x86bcfec7;
imm32 r2, 0xa8645679;
... |
tactcomplabs/xbgas-binutils-gdb | 3,831 | sim/testsuite/bfin/c_ptr2op_pr_shadd_1_2.s | //Original:/proj/frio/dv/testcases/core/c_ptr2op_pr_shadd_1_2/c_ptr2op_pr_shadd_1_2.dsp
// Spec Reference: ptr2op shadd preg, pregs, 1 (2)
# mach: bfin
.include "testutils.inc"
start
R0 = 0;
ASTAT = R0;
// check p-reg to p-reg move
imm32 p1, 0xf0921203;
imm32 p2, 0xbe041305;
imm32 p3, 0xd0d61407;
imm32 p4,... |
tactcomplabs/xbgas-binutils-gdb | 9,385 | sim/testsuite/bfin/se_cof.S | //Original:/proj/frio/dv/testcases/seq/se_cof/se_cof.dsp
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
/////////////////////////////////////////////////////////////////////////////
///////////////////////// Include Files /////////////////////////////
////////////... |
tactcomplabs/xbgas-binutils-gdb | 7,545 | sim/testsuite/bfin/c_ldst_st_p_d_pp_b.s | //Original:/testcases/core/c_ldst_st_p_d_pp_b/c_ldst_st_p_d_pp_b.dsp
// Spec Reference: c_ldst st_p++ b byte
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x0a231507;
imm32 r1, 0x1b342618;
imm32 r2, 0x2c453729;
imm32 r3, 0x3d56483a;
imm32 r4, 0x4e67594b;
imm32 r5, 0x5f786a5c;
imm32 r6, 0x60897b6d;
im... |
tactcomplabs/xbgas-binutils-gdb | 6,135 | sim/testsuite/bfin/c_dsp32alu_rl_rnd12_m.s | //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rl_rnd12_m/c_dsp32alu_rl_rnd12_m.dsp
// Spec Reference: dsp32alu dreg (half)
# mach: bfin
.include "testutils.inc"
start
R0 = 0;
ASTAT = R0;
imm32 r0, 0x85678911;
imm32 r1, 0x9189ab1d;
imm32 r2, 0xa4245515;
imm32 r3, 0xb6637717;
imm32 r4, 0xc678491b;
imm32... |
tactcomplabs/xbgas-binutils-gdb | 8,465 | sim/testsuite/bfin/c_mmr_loop.S | //Original:/proj/frio/dv/testcases/core/c_mmr_loop/c_mmr_loop.dsp
// Spec Reference: mmr loop (interr control) no exception
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(gen_int.inc)
include(selfcheck.inc)
include(std.inc)
include(mmrs.inc)
#ifndef STACKSIZE
#... |
tactcomplabs/xbgas-binutils-gdb | 1,523 | sim/testsuite/bfin/s6.s | // Test r4 = VMAX/VMAX (r5,r1) A0<<2;
# mach: bfin
.include "testutils.inc"
start
// Both max values are in high half, hence both bits
// into A0 are 1
A0 = 0;
R1.L = 0x2; // max in r1 is 3
R1.H = 0x3;
R0.L = 0x6; // max in r0 is 7
R0.H = 0x7;
R6 = VIT_MAX( R1 , R0 ) (ASL);
DBGA ( R6.L , 0x0007 );
DBG... |
tactcomplabs/xbgas-binutils-gdb | 4,120 | sim/testsuite/bfin/load.s | # Blackfin testcase for register load instructions
# mach: bfin
.include "testutils.inc"
start
.macro load32 num:req, reg0:req, reg1:req
imm32 \reg0 \num
imm32 \reg1 \num
CC = \reg0 == \reg1
if CC jump 2f;
fail
2:
.endm
.macro load32p num:req preg:req
imm32 r0 \num
imm32 \preg \num
r1 = \preg
cc = r0... |
tactcomplabs/xbgas-binutils-gdb | 11,838 | sim/testsuite/bfin/c_ldstpmod_st_lohi.s | //Original:testcases/core/c_ldstpmod_st_lohi/c_ldstpmod_st_lohi.dsp
// Spec Reference: c_ldstpmod store dreg lo & hi
# mach: bfin
.include "testutils.inc"
start
// set all regs
init_i_regs 0;
init_b_regs 0;
init_l_regs 0;
init_m_regs 0;
I0 = P3;
I2 = SP;
// initial values
imm32 r0, 0x600f5000;
imm32 r1, 0x700e600... |
tactcomplabs/xbgas-binutils-gdb | 3,767 | sim/testsuite/bfin/c_dsp32mult_pair_m.s | //Original:/testcases/core/c_dsp32mult_pair_m/c_dsp32mult_pair_m.dsp
// Spec Reference: dsp32mult pair MUNOP
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x34235625;
imm32 r1, 0x9f7a5127;
imm32 r2, 0xa3286725;
imm32 r3, 0x00069027;
imm32 r4, 0xb0abc029;
imm32 r5, 0x10acef2b;
imm32 r6, 0xc00c00de;
imm32 r7, ... |
tactcomplabs/xbgas-binutils-gdb | 10,027 | sim/testsuite/bfin/c_dsp32shift_lhalf_lp.s | //Original:/testcases/core/c_dsp32shift_lhalf_lp/c_dsp32shift_lhalf_lp.dsp
// Spec Reference: dsp32shift lshift
# mach: bfin
.include "testutils.inc"
start
// lshift : positive data, count (+)=left (half reg)
// d_lo = lshift (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x00000000;
imm32 r1, 0x00000001;
imm32 r2, 0x0000... |
tactcomplabs/xbgas-binutils-gdb | 14,115 | sim/testsuite/bfin/random_0020.S | # mach: bfin
#include "test.h"
.include "testutils.inc"
start
dmm32 ASTAT, (0x0cb08810 | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
dmm32 A1.w, 0xfcdbede4;
dmm32 A1.x, 0xffffffff;
imm32 R5, 0x14c5c1c7;
imm32 R7, 0x006a5040;
R5 = (A1 += R7.L * R7.H) (M, IU);
checkreg R5, 0xfcfd2864;
checkreg A1.w, 0xfcfd2864;... |
tactcomplabs/xbgas-binutils-gdb | 6,097 | sim/testsuite/bfin/c_dsp32mult_dr_ih.s | //Original:/testcases/core/c_dsp32mult_dr_ih/c_dsp32mult_dr_ih.dsp
// Spec Reference: dsp32mult single dr ih
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x8b235625;
imm32 r1, 0x98ba5127;
imm32 r2, 0xa3846725;
imm32 r3, 0x00080027;
imm32 r4, 0xb0ab8d29;
imm32 r5, 0x10ace82b;
imm32 r6, 0xc00c008d;
imm32 r7, ... |
tactcomplabs/xbgas-binutils-gdb | 1,441 | sim/testsuite/bfin/c_ldimmhalf_h_pr.s | //Original:/proj/frio/dv/testcases/core/c_ldimmhalf_h_pr/c_ldimmhalf_h_pr.dsp
// Spec Reference: ldimmhalf h preg
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS -1;
INIT_P_REGS -1;
imm32 sp, 0xffffffff;
imm32 fp, 0xffffffff;
// test Preg
P1.H = 0x0002;
P2.H = 0x0004;
P3.H = 0x0006;
P4.H = 0x0008;
... |
tactcomplabs/xbgas-binutils-gdb | 2,735 | sim/testsuite/bfin/c_compi2opp_pr_add_i7_n.s | //Original:/proj/frio/dv/testcases/core/c_compi2opp_pr_add_i7_n/c_compi2opp_pr_add_i7_n.dsp
// Spec Reference: compi2opp pregs += imm7 negative
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS 0;
INIT_P_REGS 0;
imm32 sp, 0x00000000;
imm32 fp, 0x00000000;
P1 += -1;
P2 += -2;
P3 += -3;
P4 += -4;
P5 +... |
tactcomplabs/xbgas-binutils-gdb | 2,256 | sim/testsuite/bfin/c_ccmv_cc_dr_dr.s | //Original:/testcases/core/c_ccmv_cc_dr_dr/c_ccmv_cc_dr_dr.dsp
// Spec Reference: ccmv cc dreg = dreg
# mach: bfin
.include "testutils.inc"
start
R0 = 0;
ASTAT = R0;
imm32 r0, 0xa08d2301;
imm32 r1, 0xd0021053;
imm32 r2, 0x2f041405;
imm32 r3, 0x60b61507;
imm32 r4, 0x50487609;
imm32 r5, 0x3005900b;
imm32 r6, 0x2a0c6... |
tactcomplabs/xbgas-binutils-gdb | 6,719 | sim/testsuite/bfin/c_dsp32mac_dr_a1_i.s | //Original:/testcases/core/c_dsp32mac_dr_a1_i/c_dsp32mac_dr_a1_i.dsp
// Spec Reference: dsp32mac dr a1 i (signed int)
# mach: bfin
.include "testutils.inc"
start
A1 = A0 = 0;
// The result accumulated in A , and stored to a reg half
imm32 r0, 0xa3545abd;
imm32 r1, 0xbdbcfec7;
imm32 r2, 0xc1248679;
imm32 r3, 0xd00... |
tactcomplabs/xbgas-binutils-gdb | 9,741 | sim/testsuite/bfin/se_event_quad.S | //Original:/proj/frio/dv/testcases/seq/se_event_quad/se_event_quad.dsp
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
/////////////////////////////////////////////////////////////////////////////
///////////////////////// Include Files ////////////////////////////... |
tactcomplabs/xbgas-binutils-gdb | 6,169 | sim/testsuite/bfin/c_ldst_ld_d_p_pp_xb.s | //Original:testcases/core/c_ldst_ld_d_p_pp_xb/c_ldst_ld_d_p_pp_xb.dsp
// Spec Reference: c_ldst ld d [p++] xb
# mach: bfin
.include "testutils.inc"
start
// set all regs
INIT_I_REGS -1;
INIT_R_REGS 0;
init_b_regs 0;
init_l_regs 0;
init_m_regs -1;
I0 = P3;
I2 = SP;
// initial values
I1 = P3; P3 = I0; I3 = SP; SP = ... |
tactcomplabs/xbgas-binutils-gdb | 5,236 | sim/testsuite/bfin/c_regmv_imlb_pr.s | //Original:/proj/frio/dv/testcases/core/c_regmv_imlb_pr/c_regmv_imlb_pr.dsp
// Spec Reference: regmv imlb to dr
# mach: bfin
.include "testutils.inc"
start
// initialize source regs
imm32 i0, 0x11111111;
imm32 i1, 0x22222222;
imm32 i2, 0x33333333;
imm32 i3, 0x44444444;
// i to preg
R0 = I0;
P1 = I0;
P2 = I0;... |
tactcomplabs/xbgas-binutils-gdb | 7,095 | sim/testsuite/bfin/c_dsp32shift_lhh.s | //Original:/testcases/core/c_dsp32shift_lhh/c_dsp32shift_lhh.dsp
// Spec Reference: dsp32shift lshift/lshift
# mach: bfin
.include "testutils.inc"
start
// lshift/lshift : = (half reg)
// d_reg = lshift/lshift (d BY d_lo)
// Rx by RLx
imm32 r0, 0x01230000;
imm32 r1, 0x12345678;
imm32 r2, 0x23456789;
imm32 r3, 0x34... |
tactcomplabs/xbgas-binutils-gdb | 5,036 | sim/testsuite/bfin/c_dsp32mult_dr_m_s.s | //Original:/testcases/core/c_dsp32mult_dr_m_s/c_dsp32mult_dr_m_s.dsp
// Spec Reference: dsp32mult single dr munop s
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0xfb235625;
imm32 r1, 0x9fba5127;
imm32 r2, 0xa3ff6725;
imm32 r3, 0x0006f027;
imm32 r4, 0xb0abcd29;
imm32 r5, 0x1facef2b;
imm32 r6, 0xc0fc002d;
imm... |
tactcomplabs/xbgas-binutils-gdb | 6,542 | sim/testsuite/bfin/c_except_user_mode.S | //Original:/proj/frio/dv/testcases/core/c_except_user_mode/c_except_user_mode.dsp
// Spec Reference: except_mode_user
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(std.inc)
include(selfcheck.inc)
include(gen_int.inc)
INIT_R_REGS(0);
INIT_P_REGS(0);
INIT_I_REGS(0)... |
tactcomplabs/xbgas-binutils-gdb | 8,629 | sim/testsuite/bfin/c_dsp32shiftim_lhalf_rp.s | //Original:/testcases/core/c_dsp32shiftim_lhalf_rp/c_dsp32shiftim_lhalf_rp.dsp
// Spec Reference: dspshiftimm dreg_lo(hi) = lshift (dreg_lo(hi) by imm5)
# mach: bfin
.include "testutils.inc"
start
// lshift : positive data, count (+)=left (half reg)
// d_lo = lshift (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x0000000... |
tactcomplabs/xbgas-binutils-gdb | 8,604 | sim/testsuite/bfin/random_0027.S | # mach: bfin
#include "test.h"
.include "testutils.inc"
start
dmm32 ASTAT, (0x2850c890 | _VS | _AV1S | _AV0S | _AQ | _CC | _AC0_COPY);
dmm32 A1.w, 0xa605868e;
dmm32 A1.x, 0x00000000;
imm32 R1, 0x56dd0982;
imm32 R4, 0x50e37862;
imm32 R5, 0x597fc81a;
R4.H = (A1 -= R5.L * R1.L) (M, IS);
checkreg R4, 0x7fff7862;... |
tactcomplabs/xbgas-binutils-gdb | 1,820 | sim/testsuite/bfin/cec-raise-reti.S | # Blackfin testcase for having RETI set correctly
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
# This test keeps P5 as the base of the EVT table
.macro set_evt lvl:req, sym:req
loadsym R1, \sym;
[P5 + 4 * \lvl\()] = R1;
.endm
start
# First mark all EVTs as fails (t... |
tactcomplabs/xbgas-binutils-gdb | 1,456 | sim/testsuite/bfin/a23.s | // Test ALU ABS accumulators
# mach: bfin
.include "testutils.inc"
start
R0 = 0x00000000;
A0.w = R0;
R0 = 0x80 (X);
A0.x = R0;
A0 = ABS A0;
R4 = A0.w;
R5 = A0.x;
DBGA ( R4.H , 0xffff ); DBGA ( R4.L , 0xffff );
DBGA ( R5.H , 0x0000 ); DBGA ( R5.L , 0x007f );
R0 = 0x00000001;
A0.w = R0;
R0 = 0x80 (X);... |
tactcomplabs/xbgas-binutils-gdb | 6,136 | sim/testsuite/bfin/c_dsp32alu_rh_rnd12_p.s | //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rh_rnd12_p/c_dsp32alu_rh_rnd12_p.dsp
// Spec Reference: dsp32alu dreg (half)
# mach: bfin
.include "testutils.inc"
start
R0 = 0;
ASTAT = R0;
imm32 r0, 0x45678911;
imm32 r1, 0x2789ab1d;
imm32 r2, 0xf4445515;
imm32 r3, 0x46667717;
imm32 r4, 0xe678891b;
imm3... |
tactcomplabs/xbgas-binutils-gdb | 7,277 | sim/testsuite/bfin/c_ldst_ld_d_p_mm.s | //Original:testcases/core/c_ldst_ld_d_p_mm/c_ldst_ld_d_p_mm.dsp
// Spec Reference: c_ldst ld d [p--]
# mach: bfin
.include "testutils.inc"
start
// set all regs
INIT_I_REGS -1;
INIT_R_REGS 0;
init_b_regs 0;
init_l_regs 0;
init_m_regs -1;
I0 = P3;
I2 = SP;
// initial values
I1 = P3; P3 = I0; I3 = SP; SP = I2;
loa... |
tactcomplabs/xbgas-binutils-gdb | 2,839 | sim/testsuite/bfin/c_dsp32mac_dr_a0_i.s | //Original:/testcases/core/c_dsp32mac_dr_a0_i/c_dsp32mac_dr_a0_i.dsp
// Spec Reference: dsp32mac dr a0 i (signed int)
# mach: bfin
.include "testutils.inc"
start
A1 = A0 = 0;
// The result accumulated in A , and stored to a reg half
imm32 r0, 0xa3545abd;
imm32 r1, 0x9dbcfec7;
imm32 r2, 0xc9248679;
imm32 r3, 0xd0... |
tactcomplabs/xbgas-binutils-gdb | 2,744 | sim/testsuite/bfin/c_ldimmhalf_h_ibml.s | //Original:/proj/frio/dv/testcases/core/c_ldimmhalf_h_ibml/c_ldimmhalf_h_ibml.dsp
// Spec Reference: ldimmhalf h ibml
# mach: bfin
.include "testutils.inc"
start
INIT_I_REGS -1;
INIT_L_REGS -1;
INIT_B_REGS -1;
INIT_M_REGS -1;
I0.H = 0x2000;
I1.H = 0x2002;
I2.H = 0x2004;
I3.H = 0x2006;
L0.H = 0x2008;
L1.H ... |
tactcomplabs/xbgas-binutils-gdb | 3,574 | sim/testsuite/bfin/s16.s | // reg-based SHIFT test program.
# mach: bfin
.include "testutils.inc"
start
// Test FDEP with no sign extension
R0.L = 0xdead;
R0.H = 0x1234;
R1.L = 0x0c08; // pos=12 len=8
R1.H = 0x00ff;
R7 = DEPOSIT( R0, R1 );
DBGA ( R7.L , 0xfead );
DBGA ( R7.H , 0x123f );
R0.L = 0xdead;
R0.H = 0x1234;
R1.L = 0x0c... |
tactcomplabs/xbgas-binutils-gdb | 7,692 | sim/testsuite/bfin/c_dsp32alu_rrppmm_sft_x.s | //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rrppmm_sft_x/c_dsp32alu_rrppmm_sft_x.dsp
// Spec Reference: dsp32alu (dreg, dreg) = +/+, -/- (dreg, dreg) >>, << X
# mach: bfin
.include "testutils.inc"
start
R0 = 0;
ASTAT = R0;
imm32 r0, 0x95679911;
imm32 r1, 0x2789ab1d;
imm32 r2, 0x34945515;
imm32 r3, 0x46... |
tactcomplabs/xbgas-binutils-gdb | 10,098 | sim/testsuite/bfin/c_dsp32shift_ahh.s | //Original:/testcases/core/c_dsp32shift_ahh/c_dsp32shift_ahh.dsp
// Spec Reference: dsp32shift ashift/ashift
# mach: bfin
.include "testutils.inc"
start
// ashift/ashift : positive data, count (+)=left (half reg)
// d_reg = ashift/ashift (d BY d_lo)
// Rx by RLx
imm32 r0, 0x01230000;
imm32 r1, 0x12345678;
imm32 r2... |
tactcomplabs/xbgas-binutils-gdb | 10,386 | sim/testsuite/bfin/c_dsp32shift_ahalf_rn_s.s | //Original:/testcases/core/c_dsp32shift_ahalf_rn_s/c_dsp32shift_ahalf_rn_s.dsp
// Spec Reference: dsp32shift ashift s
# mach: bfin
.include "testutils.inc"
start
// Ashift : positive data, count (+)=left (half reg)
// d_lo = ashft (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x00000000;
R0.L = -1;
imm32 r1, 0x00008001;
... |
tactcomplabs/xbgas-binutils-gdb | 3,350 | sim/testsuite/bfin/c_ldimmhalf_lzhi_ibml.s | //Original:/testcases/core/c_ldimmhalf_lzhi_ibml/c_ldimmhalf_lzhi_ibml.dsp
# mach: bfin
.include "testutils.inc"
start
// Spec Reference: ldimmhalf lzhi ibml
I0 = 0x2001 (Z);
I0.H = 0x2000;
I1 = 0x2003 (Z);
I1.H = 0x2002;
I2 = 0x2005 (Z);
I2.H = 0x2004;
I3 = 0x2007 (Z);
I3.H = 0x2006;
L0 = 0x2009 (Z);
L0.H = 0x... |
tactcomplabs/xbgas-binutils-gdb | 2,175 | sim/testsuite/bfin/c_ccmv_cc_pr_pr.s | //Original:/proj/frio/dv/testcases/core/c_ccmv_cc_pr_pr/c_ccmv_cc_pr_pr.dsp
// Spec Reference: ccmv cc preg = preg
# mach: bfin
.include "testutils.inc"
start
R0 = 0;
ASTAT = R0;
imm32 p1, 0xd0021053;
imm32 p2, 0x2f041405;
imm32 p3, 0x60b61507;
imm32 p4, 0x50487609;
imm32 p5, 0x3005900b;
imm32 sp, 0x2a0c660... |
tactcomplabs/xbgas-binutils-gdb | 13,726 | sim/testsuite/bfin/se_loop_mv2lc.S | //Original:/proj/frio/dv/testcases/seq/se_loop_mv2lc/se_loop_mv2lc.dsp
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
/////////////////////////////////////////////////////////////////////////////
///////////////////////// Include Files ////////////////////////////... |
tactcomplabs/xbgas-binutils-gdb | 6,225 | sim/testsuite/bfin/c_dsp32mult_dr_is.s | //Original:/testcases/core/c_dsp32mult_dr_is/c_dsp32mult_dr_is.dsp
// Spec Reference: dsp32mult single dr is
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x8b235625;
imm32 r1, 0x98ba5127;
imm32 r2, 0xa3846725;
imm32 r3, 0x00080027;
imm32 r4, 0xb0ab8d29;
imm32 r5, 0x10ace82b;
imm32 r6, 0xc00c008d;
imm32 r7, ... |
tactcomplabs/xbgas-binutils-gdb | 3,363 | sim/testsuite/bfin/c_dsp32shift_lmix.s | //Original:/testcases/core/c_dsp32shift_lmix/c_dsp32shift_lmix.dsp
// Spec Reference: dsp32shift lshift: mix
# mach: bfin
.include "testutils.inc"
start
imm32 r4, 0x00000000;
imm32 r5, 0x00000000;
imm32 r6, 0x00000000;
imm32 r7, 0x00000000;
// lshift : positive data, count (+)=left (half reg)
imm32 r0, 0x00010001... |
tactcomplabs/xbgas-binutils-gdb | 3,683 | sim/testsuite/bfin/max_min_flags.s | // Check Flag Settings for MAX/MIN
# mach: bfin
.include "testutils.inc"
start
init_r_regs 0;
ASTAT = R0;
r0=1;
r1= -1;
r2=min(r1,r0);
_DBG ASTAT;
//r3=ASTAT;
//dbga (r3.l, 0x2);
//dbga (r3.h, 0x0);
cc = az;
r7 = cc;
dbga( r7.l, 0);
cc = an;
r7 = cc;
dbga( r7.l, 1);
cc = av0;
r7 = cc;
dbga( r7.l, 0);... |
tactcomplabs/xbgas-binutils-gdb | 2,624 | sim/testsuite/bfin/c_ldimmhalf_lz_ibml.s | //Original:/testcases/core/c_ldimmhalf_lz_ibml/c_ldimmhalf_lz_ibml.dsp
# mach: bfin
.include "testutils.inc"
start
// Spec Reference: ldimmhalf lz ibml
I0 = 0x2001 (Z);
I1 = 0x2003 (Z);
I2 = 0x2005 (Z);
I3 = 0x2007 (Z);
L0 = 0x2009 (Z);
L1 = 0x200b (Z);
L2 = 0x200d (Z);
L3 = 0x200f (Z);
R0 = I0;
R1 = I1;
R2 =... |
tactcomplabs/xbgas-binutils-gdb | 1,114 | sim/testsuite/bfin/cec-system-call.S | # Blackfin testcase for returning to the right place while bouncing between
# multiple CEC levels (like in a Linux system call)
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
# This test keeps P5 as the base of the EVT table
.macro set_evt lvl:req, sym:req
loadsym R1, \sym... |
tactcomplabs/xbgas-binutils-gdb | 3,583 | sim/testsuite/bfin/c_alu2op_conv_mix.s | //Original:/testcases/core/c_alu2op_conv_mix/c_alu2op_conv_mix.dsp
// Spec Reference: alu2op convert mix
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00789abc;
imm32 r1, 0x12345678;
imm32 r2, 0x23456789;
imm32 r3, 0x3456789a;
imm32 r4, 0x856789ab;
imm32 r5, 0x96789abc;
imm32 r6, 0xa789abcd;
imm32 r7, 0x... |
tactcomplabs/xbgas-binutils-gdb | 9,932 | sim/testsuite/bfin/c_dsp32shift_ahalf_rn.s | //Original:/testcases/core/c_dsp32shift_ahalf_rn/c_dsp32shift_ahalf_rn.dsp
// Spec Reference: dsp32shift ashift
# mach: bfin
.include "testutils.inc"
start
// Ashift : positive data, count (+)=right (half reg)
// d_lo = ashft (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x00000000;
R0.L = -1;
imm32 r1, 0x00008001;
imm32... |
tactcomplabs/xbgas-binutils-gdb | 7,579 | sim/testsuite/bfin/c_ldst_st_p_d_pp_h.s | //Original:/testcases/core/c_ldst_st_p_d_pp_h/c_ldst_st_p_d_pp_h.dsp
// Spec Reference: c_ldst st_p++/p-- h half
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS 0;
imm32 r0, 0x0a231507;
imm32 r1, 0x1b342618;
imm32 r2, 0x2c453729;
imm32 r3, 0x3d56483a;
imm32 r4, 0x4e67594b;
imm32 r5, 0x5f786a5c;
imm3... |
tactcomplabs/xbgas-binutils-gdb | 5,188 | sim/testsuite/bfin/c_dsp32mac_a1a0.s | //Original:/testcases/core/c_dsp32mac_a1a0/c_dsp32mac_a1a0.dsp
// Spec Reference: dsp32mac a1 a0
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS 0;
imm32 r0, 0x00000000;
A0 = 0;
A1 = 0;
ASTAT = r0;
// test the default (signed fraction : left )
imm32 r0, 0x12345678;
imm32 r1, 0x33456789;
imm32 r2, 0x55567... |
tactcomplabs/xbgas-binutils-gdb | 5,417 | sim/testsuite/bfin/c_dsp32alu_rm.s | //Original:/testcases/core/c_dsp32alu_rm/c_dsp32alu_rm.dsp
// Spec Reference: dsp32alu
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x35678911;
imm32 r1, 0x2389ab1d;
imm32 r2, 0x34345515;
imm32 r3, 0x46637717;
imm32 r4, 0x5567391b;
imm32 r5, 0x6789a31d;
imm32 r6, 0x744455a5;
imm32 r7, 0x866677a7;
R0 = R0... |
tactcomplabs/xbgas-binutils-gdb | 7,791 | sim/testsuite/bfin/c_mmr_interr_ctl.s | # Blackfin testcase for the CEC
# mach: bfin
# sim: --environment operating
.include "testutils.inc"
start
INIT_R_REGS 0;
INIT_P_REGS 0;
INIT_I_REGS 0;
INIT_M_REGS 0;
INIT_L_REGS 0;
INIT_B_REGS 0;
CLI R1; // inhibit events during MMR writes
loadsym sp, USTACK; // setup the user stack poin... |
tactcomplabs/xbgas-binutils-gdb | 2,682 | sim/testsuite/bfin/c_dsp32shift_vmaxvmax.s | //Original:/testcases/core/c_dsp32shift_vmaxvmax/c_dsp32shift_vmaxvmax.dsp
// Spec Reference: dsp32shift vmax / vmax
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x11002001;
imm32 r1, 0x12001001;
imm32 r2, 0x11301302;
imm32 r3, 0x43001003;
imm32 r4, 0x11601604;
imm32 r5, 0x71001705;
imm32 r6, 0x81008006;
... |
tactcomplabs/xbgas-binutils-gdb | 6,086 | sim/testsuite/bfin/c_mmr_ppop_illegal_adr.S | //Original:/proj/frio/dv/testcases/core/c_mmr_ppop_illegal_adr/c_mmr_ppop_illegal_adr.dsp
// Spec Reference: mmr ppop illegal address
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(gen_int.inc)
include(selfcheck.inc)
include(std.inc)
include(mmrs.inc)
#ifndef STA... |
tactcomplabs/xbgas-binutils-gdb | 8,772 | sim/testsuite/bfin/c_dsp32shiftim_ahalf_lp.s | //Original:/testcases/core/c_dsp32shiftim_ahalf_lp/c_dsp32shiftim_ahalf_lp.dsp
// Spec Reference: dspshiftimm dreg_lo(hi) = ashift (dreg_lo(hi) by imm5)
# mach: bfin
.include "testutils.inc"
start
// Ashift : positive data, count (+)=left (half reg)
// d_lo = ashift (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x01010100;... |
tactcomplabs/xbgas-binutils-gdb | 5,912 | sim/testsuite/bfin/c_ldst_ld_d_p_pp_h.s | //Original:/testcases/core/c_ldst_ld_d_p_pp_h/c_ldst_ld_d_p_pp_h.dsp
// Spec Reference: c_ldst ld d [p++] h
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS 0;
loadsym p5, DATA_ADDR_1;
loadsym p1, DATA_ADDR_2;
loadsym p2, DATA_ADDR_3;
.ifndef BFIN_HOST
loadsym p3, DATA_ADDR_4;
.endif
loadsym p4, DATA_A... |
tactcomplabs/xbgas-binutils-gdb | 7,126 | sim/testsuite/bfin/c_seq_ex1_j_mv_pop.S | //Original:/proj/frio/dv/testcases/core/c_seq_ex1_j_mv_pop/c_seq_ex1_j_mv_pop.dsp
// Spec Reference: sequencer stage ex1 (jump + regmv + pushpopmultiple)
# mach: bfin
# sim: --environment operating
#include "test.h"
.include "testutils.inc"
start
include(std.inc)
include(selfcheck.inc)
include(gen_int.inc)
INIT_R_RE... |
tactcomplabs/xbgas-binutils-gdb | 10,550 | sim/testsuite/bfin/c_ldst_st_p_d_mm.s | //Original:testcases/core/c_ldst_st_p_d_mm/c_ldst_st_p_d_mm.dsp
// Spec Reference: c_ldst st_p++/p--
# mach: bfin
.include "testutils.inc"
start
// set all regs
INIT_I_REGS -1;
init_b_regs 0;
init_l_regs 0;
init_m_regs -1;
I0 = P3;
I2 = SP;
imm32 r0, 0x0a231507;
imm32 r1, 0x1b342618;
imm32 r2, 0x2c453729;
imm32... |
tactcomplabs/xbgas-binutils-gdb | 8,575 | sim/testsuite/bfin/c_dsp32shiftim_ahalf_ln.s | //Original:/testcases/core/c_dsp32shiftim_ahalf_ln/c_dsp32shiftim_ahalf_ln.dsp
// Spec Reference: dspshiftimm dreg_lo(hi) = ashift (dreg_lo(hi) by imm5)
# mach: bfin
.include "testutils.inc"
start
// Ashift : neg data, count (+)=left (half reg)
// d_lo = ashft (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x1000c000;
imm32... |
tactcomplabs/xbgas-binutils-gdb | 5,922 | sim/testsuite/bfin/c_ldst_ld_d_p_b.s | //Original:/testcases/core/c_ldst_ld_d_p_b/c_ldst_ld_d_p_b.dsp
// Spec Reference: c_ldst ld d [p] b
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS 0;
loadsym p1, DATA_ADDR_1;
loadsym p2, DATA_ADDR_2;
.ifndef BFIN_HOST
loadsym p3, DATA_ADDR_3;
.endif
loadsym p4, DATA_ADDR_4;
loadsym p5, DATA_ADDR_5;
... |
tactcomplabs/xbgas-binutils-gdb | 1,952 | sim/testsuite/bfin/c_ldimmhalf_lzhi_pr.s | //Original:/proj/frio/dv/testcases/core/c_ldimmhalf_lzhi_pr/c_ldimmhalf_lzhi_pr.dsp
// Spec Reference: ldimmhalf lzhi preg
# mach: bfin
.include "testutils.inc"
start
INIT_R_REGS -1;
// test Preg
//lz(p0)=0x0001;
//h(p0) =0x0000;
P1 = 0x0003 (Z);
P1.H = 0x0002;
P2 = 0x0005 (Z);
P2.H = 0x0004;
P3 = 0x0007 (Z);... |
tactcomplabs/xbgas-binutils-gdb | 2,822 | sim/testsuite/bfin/c_dsp32mac_dr_a0_t.s | //Original:/testcases/core/c_dsp32mac_dr_a0_t/c_dsp32mac_dr_a0_t.dsp
// Spec Reference: dsp32mac dr a0 t (truncation)
# mach: bfin
.include "testutils.inc"
start
A1 = A0 = 0;
// The result accumulated in A , and stored to a reg half
imm32 r0, 0xa3545abd;
imm32 r1, 0xbdbcfec7;
imm32 r2, 0xc1248679;
imm32 r3, 0xd0... |
tactcomplabs/xbgas-binutils-gdb | 14,760 | sim/testsuite/bfin/c_logi2op_bittst.s | //Original:/testcases/core/c_logi2op_bittst/c_logi2op_bittst.dsp
// Spec Reference: Logi2op functions: bittst
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x00000000;
imm32 r1, 0x00000000;
imm32 r2, 0x00000000;
imm32 r3, 0x00000000;
imm32 r4, 0x00000000;
imm32 r5, 0x00000000;
imm32 r6, 0x00000000;
imm32 r... |
tactcomplabs/xbgas-binutils-gdb | 10,070 | sim/testsuite/bfin/c_dsp32shift_ahalf_ln.s | //Original:/testcases/core/c_dsp32shift_ahalf_ln/c_dsp32shift_ahalf_ln.dsp
// Spec Reference: dsp32shift ashift
# mach: bfin
.include "testutils.inc"
start
// Ashift : neg data, count (+)=left (half reg)
// d_lo = ashft (d_lo BY d_lo)
// RLx by RLx
imm32 r0, 0x00000000;
imm32 r1, 0x0000c001;
imm32 r2, 0x0000c002;... |
tactcomplabs/xbgas-binutils-gdb | 10,521 | sim/testsuite/bfin/c_ldstii_st_dr_h.s | //Original:/testcases/core/c_ldstii_st_dr_h/c_ldstii_st_dr_h.dsp
// Spec Reference: c_ldstii store dreg
# mach: bfin
.include "testutils.inc"
start
imm32 r0, 0x105f50a0;
imm32 r1, 0x204e60a1;
imm32 r2, 0x300370a2;
imm32 r3, 0x402c80a3;
imm32 r4, 0x501b90a4;
imm32 r5, 0x600aa0a5;
imm32 r6, 0x7019b0a6;
imm32 r... |
tactcomplabs/xbgas-binutils-gdb | 1,204 | sim/testsuite/bfin/issue205.s | # mach: bfin
.include "testutils.inc"
start
R0 = 0; R1 = 0; R2 = 0; R3 = 0; R4 = 0; R5 = 0; R6 = 0; R7 = 0;
P0 = 0; P1 = 0; P2 = 0; P4 = 0; P5 = 0;
I0 = 0 (X); I1 = 0 (X); I2 = 0 (X); I3 = 0 (X);
M0 = 0 (X); M1 = 0 (X); M2 = 0 (X); M3 = 0 (X);
L0 = 0 (X); L1 = 0 (X); L2 = 0 (X); L3 = 0 (X);
B0 = 0 (X); B1 = 0... |
tactcomplabs/xbgas-binutils-gdb | 2,796 | sim/testsuite/bfin/push-pop-multiple.s | # Blackfin testcase for push/pop multiples instructions
# mach: bfin
.include "testutils.inc"
# Tests follow the pattern:
# - do the push multiple
# - write a garbage value to all registers pushed
# - do the pop multiple
# - check all registers popped against known values
start
# Repeat the same operati... |
tactcomplabs/xbgas-binutils-gdb | 2,085 | sim/testsuite/bfin/s5.s | // Test r4 = ROT (r2 by r3);
# mach: bfin
.include "testutils.inc"
start
R0.L = 0x0001;
R0.H = 0x8000;
// rot
// left by 1
// 8000 0001 -> 0000 0002 cc=1
R7 = 0;
CC = R7;
R1 = 1;
R6 = ROT R0 BY R1.L;
DBGA ( R6.L , 0x0002 );
DBGA ( R6.H , 0x0000 );
R7 = CC;
DBGA ( R7.L , 0x0001 );
// rot
// right... |
tactcomplabs/xbgas-binutils-gdb | 1,355 | sim/testsuite/bfin/random_0021.S | # mach: bfin
#include "test.h"
.include "testutils.inc"
start
dmm32 ASTAT, (0x5c604280 | _VS | _AV1S | _AV0S);
imm32 R3, 0xfe0103fe;
imm32 R5, 0x1e53cdd8;
R3.H = R5.L * R3.H (M, IU);
checkreg R3, 0x800003fe;
checkreg ASTAT, (0x5c604280 | _VS | _V | _AV1S | _AV0S | _V_COPY);
dmm32 ASTAT, (0x74a04c00 | _VS | _... |
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