repo_id
stringlengths
5
115
size
int64
590
5.01M
file_path
stringlengths
4
212
content
stringlengths
590
5.01M
iLx11/hd-project-template
9,140
KEIL/F103VET6/Libraries/CMSIS/startup/TrueSTUDIO/startup_stm32f10x_ld.s
/** ****************************************************************************** * @file startup_stm32f10x_ld.s * @author MCD Application Team * @version V3.5.1 * @date 08-September-2021 * @brief STM32F10x Low Density Devices vector table for Atollic toolchain. * This modul...
iLx11/hd-project-template
11,792
KEIL/F103VET6/Libraries/CMSIS/startup/TrueSTUDIO/startup_stm32f10x_cl.s
/** ****************************************************************************** * @file startup_stm32f10x_cl.s * @author MCD Application Team * @version V3.5.1 * @date 08-September-2021 * @brief STM32F10x Connectivity line Devices vector table for Atollic * toolchain. * ...
iLx11/hd-project-template
9,624
KEIL/F103VET6/Libraries/CMSIS/startup/TrueSTUDIO/startup_stm32f10x_ld_vl.s
/** ****************************************************************************** * @file startup_stm32f10x_ld_vl.s * @author MCD Application Team * @version V3.5.1 * @date 08-September-2021 * @brief STM32F10x Low Density Value Line Devices vector table for Atollic toolchain. * ...
imsakg/spark-os
1,754
src/_arch/aarch64/cpu/boot.s
//-------------------------------------------------------------------------------------------------- // Definitions //-------------------------------------------------------------------------------------------------- // Load the address of a symbol into a register, PC-relative. // // The symbol must lie within +/- 4 G...
InsideEmpire/DigitClassifier-RISC-V
4,670
src/write_matrix.s
.globl write_matrix .text # ============================================================================== # FUNCTION: Writes a matrix of integers into a binary file # FILE FORMAT: # The first 8 bytes of the file will be two 4 byte ints representing the # numbers of rows and columns respectively. Every 4 bytes the...
InsideEmpire/DigitClassifier-RISC-V
10,441
src/utils.s
############################################################## # Do not modify! (But feel free to use the functions provided) ############################################################## #define c_print_int 1 #define c_print_str 4 #define c_atoi 5 #define c_sbrk 9 #define c_exit 10 #define c_print_char 11 #define c_...
InsideEmpire/DigitClassifier-RISC-V
1,884
src/dot.s
.globl dot .text # ======================================================= # FUNCTION: Dot product of 2 int vectors # Arguments: # a0 (int*) is the pointer to the start of v0 # a1 (int*) is the pointer to the start of v1 # a2 (int) is the length of the vectors # a3 (int) is the stride of v0 # a4 (int) is ...
InsideEmpire/DigitClassifier-RISC-V
1,185
src/argmax.s
.globl argmax .text # ================================================================= # FUNCTION: Given a int vector, return the index of the largest # element. If there are multiple, return the one # with the smallest index. # Arguments: # a0 (int*) is the pointer to the start of the vector # a1 (int) is the # of...
InsideEmpire/DigitClassifier-RISC-V
2,994
src/matmul.s
.globl matmul .text matmul: addi sp, sp, -36 sw s0, 0(sp) sw s1, 4(sp) sw s2, 8(sp) sw s3, 12(sp) sw s4, 16(sp) sw s5, 20(sp) sw s6, 24(sp) sw s7, 28(sp) sw ra, 32(sp) # Prologue # ====================================== # Check dimensions # =====================...
InsideEmpire/DigitClassifier-RISC-V
4,005
src/read_matrix.s
.globl read_matrix .text # ============================================================================== # FUNCTION: Allocates memory and reads in a binary file as a matrix of integers # # FILE FORMAT: # The first 8 bytes are two 4 byte ints representing the # of rows and columns # in the matrix. Every 4 bytes af...
InsideEmpire/DigitClassifier-RISC-V
4,184
src/classify.s
.globl classify .text classify: # ===================================== # COMMAND LINE ARGUMENTS # ===================================== # Args: # a0 (int) argc # a1 (char**) argv # a2 (int) print_classification, if this is zero, # you should print the classif...
intermod-pro/rpu-qafm
7,106
zup-rt/asm.s
.section .start, "ax" .type start, %function .global start start: /* initialize registers */ mov r0,#0 mov r1,#0 mov r2,#0 mov r3,#0 mov r4,#0 mov r5,#0 mov r6,#0 mov r7,#0 mov r8,#0 mov r9,#0 mov r10,#0 mov r11,#0 mov r12,#0 ldr sp,=__stack_top__ /* initialize the stack point...
interval-arithmetic-ise/rust
11,809
library/std/src/sys/pal/sgx/abi/entry.S
/* This symbol is used at runtime to figure out the virtual address that the */ /* enclave is loaded at. */ .section absolute .global IMAGE_BASE IMAGE_BASE: .section ".note.x86_64-fortanix-unknown-sgx", "", @note .align 4 .long 1f - 0f /* name length (not including padding) */ .long 3f - 2f ...
iSwapna/rust-mimalloc
11,809
library/std/src/sys/pal/sgx/abi/entry.S
/* This symbol is used at runtime to figure out the virtual address that the */ /* enclave is loaded at. */ .section absolute .global IMAGE_BASE IMAGE_BASE: .section ".note.x86_64-fortanix-unknown-sgx", "", @note .align 4 .long 1f - 0f /* name length (not including padding) */ .long 3f - 2f ...
ivismma/BCC-Numeros-Inteiros-Criptografia
2,179
tail call optimization/assembly com otimização.s
.file "teste.c" .text .section .rdata,"dr" LC0: .ascii "%llu \0" .text .p2align 4,,15 .globl _contar .def _contar; .scl 2; .type 32; .endef _contar: LFB13: .cfi_startproc pushl %ebp .cfi_def_cfa_offset 8 .cfi_offset 5, -8 pushl %edi .cfi_def_cfa_offset 12 .cfi_offset 7, -12 pushl %esi .cfi_def_cfa_offs...
ivismma/BCC-Numeros-Inteiros-Criptografia
1,809
tail call optimization/assembly sem otimização.s
.file "teste.c" .text .section .rdata,"dr" LC0: .ascii "%llu \0" .text .globl _contar .def _contar; .scl 2; .type 32; .endef _contar: LFB13: .cfi_startproc pushl %ebp .cfi_def_cfa_offset 8 .cfi_offset 5, -8 movl %esp, %ebp .cfi_def_cfa_register 5 subl $40, %esp movl 8(%ebp), %eax movl %eax, -16(%ebp) m...
iyotee/Orion
12,099
kernel/arch/riscv64/syscall_entry.S
/* * ORION OS - RISC-V 64-bit System Call Entry Points * * Assembly system call entry points and context switching for RISC-V 64-bit * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ .section .text .global riscv64_...
iyotee/Orion
8,256
kernel/arch/riscv64/boot.S
/* * ORION OS - RISC-V 64-bit Boot Sequence * * Assembly boot code for RISC-V 64-bit architecture * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ .section .text.boot .global _start .type _start, @function _start...
iyotee/Orion
11,579
kernel/arch/powerpc/entry_asm.S
/* * ORION OS - POWER Architecture Assembly Entry Point * * Assembly bootstrap and interrupt handlers for POWER architecture * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ #include "config.h" .section .text.boo...
iyotee/Orion
15,310
kernel/arch/armv7l/arch_asm.S
/* * ORION OS - ARMv7l Assembly Functions * * This file implements assembly-level architecture-specific functions * for ARMv7l, including CPU control, memory management, and performance. */ #include "arch.h" // ============================================================================ // CPU CONTROL FUNCTIONS...
iyotee/Orion
12,818
kernel/arch/armv7l/syscall_entry.S
/* * ORION OS - ARMv7l System Call Entry * * This file implements the system call entry point and context switching * for ARMv7l architecture. */ #include "arch.h" // ============================================================================ // EXTERNAL SYMBOLS // =============================================...
iyotee/Orion
11,530
kernel/arch/armv7l/boot.S
/* * ORION OS - ARMv7l Boot Sequence * * This file implements the early boot sequence for ARMv7l architecture, * including hardware initialization and bootstrap code. */ #include "arch.h" // ============================================================================ // EXTERNAL SYMBOLS // =====================...
iyotee/Orion
14,281
kernel/arch/armv7l/entry_asm.S
/* * ORION OS - ARMv7l Architecture Assembly Entry * * Assembly-level bootstrap code, interrupt vectors, and exception handling * Supports all Raspberry Pi models: Pi 1, Pi 2, Pi Zero, Pi Zero W * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion ...
iyotee/Orion
13,414
kernel/arch/mips/arch_asm.S
/* * ORION OS - MIPS Architecture Assembly * * Assembly file for MIPS architecture (MIPS32, MIPS64) * Implements low-level CPU control and hardware access * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ #include...
iyotee/Orion
7,184
kernel/arch/mips/syscall_entry.S
/* * ORION OS - MIPS Architecture System Call Entry * * Assembly file for MIPS architecture (MIPS32, MIPS64) * Implements system call entry points and context switching * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT...
iyotee/Orion
6,524
kernel/arch/mips/boot.S
/* * ORION OS - MIPS Architecture Boot * * Assembly file for MIPS architecture (MIPS32, MIPS64) * Implements early boot sequence and exception vectors * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ #include "co...
iyotee/Orion
3,876
kernel/arch/x86_64/arch_asm.S
/* * Orion Operating System - x86_64 Architecture Assembly Functions * * Assembly implementations for low-level architecture operations * that cannot be done in C. * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ ...
iyotee/Orion
2,328
kernel/arch/x86_64/syscall_entry.S
/* * Orion Operating System - x86_64 System Call Entry Point * * Fast system call entry using SYSCALL/SYSRET instructions. * Implements the x86_64 System V ABI calling convention. * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * L...
iyotee/Orion
4,008
kernel/arch/x86_64/boot.S
# Orion OS x86_64 UEFI Boot Entry Point # Professional implementation for academic environments .code64 .section .boot, "ax" # Orion Boot Protocol Header .align 8 orion_boot_header: .long 0x0410494F # Orion Boot Protocol magic ("ORIO") .long 0x00010000 # Protocol version 1.0.0 .long orion_bo...
iyotee/Orion
16,918
kernel/arch/loongarch/arch_asm.S
/* * ORION OS - LoongArch Assembly Functions * * This file contains critical LoongArch assembly functions for the ORION kernel. */ #include "arch.h" .section .text .align 4 /* ============================================================================ * Context Switching Functions * =========================...
iyotee/Orion
8,832
kernel/arch/loongarch/syscall_entry.S
/* * ORION OS - LoongArch System Call Entry Point * * This file provides the low-level entry point and dispatcher for system calls * on LoongArch architecture. */ #include "arch.h" /* ============================================================================ * System Call Numbers * ==========================...
iyotee/Orion
13,132
kernel/arch/loongarch/boot.S
/* * ORION OS - LoongArch Boot Assembly * * This file handles the early boot process for LoongArch systems. */ #include "arch.h" .section .text.boot .align 4 .global _start .type _start, @function _start: /* Disable interrupts and exceptions */ csrwr $zero, 0x6 /* ECFG - disable all interrupts */ ...
iyotee/Orion
24,627
kernel/arch/aarch64/arch_asm.S
/* * Orion Operating System - aarch64 Assembly Implementation * * Critical assembly functions for aarch64 architecture including: * - Context switching and thread management * - Interrupt and exception handling * - Cache and TLB management * - Memory barriers and atomic operations * - Boot and early initializat...
iyotee/Orion
23,667
kernel/arch/aarch64/syscall_entry.S
/* * Orion Operating System - aarch64 System Call Entry * * System call entry point and dispatcher for aarch64 architecture * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ #include "config.h" // ================...
iyotee/Orion
1,406
kernel/arch/aarch64/boot.S
/* * Orion Operating System - aarch64 Boot Code * * Early boot process for aarch64 architecture * * Developed by Jeremy Noverraz (1988-2025) * August 2025, Lausanne, Switzerland * * Copyright (c) 2024-2025 Orion OS Project * License: MIT */ #include "config.h" .section .text.boot, "ax" .global _start _star...
jalal-ux/Test
1,569
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/riscv64.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li x10, STACK_DIRECTION_DESCENDING jr x1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction_...
jalal-ux/Test
1,571
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/riscv.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li x10, STACK_DIRECTION_DESCENDING jr x1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction_...
jalal-ux/Test
2,137
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/aarch_aapcs64.s
#include "psm.h" .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define SIZE(fnname,endlabel) #elif CFG_TARGET_OS_windows #define GLOBL(fnname) .globl fnname #define TYPE(fnname) #define FUNCT...
jalal-ux/Test
2,299
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/arm_aapcs.s
#include "psm.h" .text .syntax unified #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define THUMBTYPE(fnname) .thumb_func _##fnname #define FUNCTION(fnname) _##fnname #define THUMBFN .code 16 #define SIZE(fnname,endlabel) #define FNSTART #define CANTUNWI...
jalal-ux/Test
2,557
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/x86.s
#include "psm.h" /* NOTE: fastcall calling convention used on all x86 targets */ .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define SIZE(fnname,endlabel) #else #define GLOBL(fnname) .globl...
jalal-ux/Test
3,609
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/powerpc64_aix.s
.csect .text[PR],2 .file "powerpc64_aix.s" .globl rust_psm_stack_direction[DS] .globl .rust_psm_stack_direction .align 4 .csect rust_psm_stack_direction[DS],3 .vbyte 8, .rust_psm_stack_direction .vbyte 8, TOC[TC0] .vbyte 8, 0 .csect .text[PR],2 .rust_psm_stack_direction: # extern "C" fn() -> u8 li 3, 2 blr L..r...
jalal-ux/Test
2,045
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/powerpc64_openpower.s
/* Implementation of stack swtiching routines for OpenPOWER 64-bit ELF ABI The specification can be found at http://openpowerfoundation.org/wp-content/uploads/resources/leabi/content/ch_preface.html This ABI is usually used by the ppc64le targets. */ #include "psm.h" .text .abiversion 2 .globl rust_psm_st...
jalal-ux/Test
2,218
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/x86_64_windows_gnu.s
.text .def rust_psm_stack_direction .scl 2 .type 32 .endef .globl rust_psm_stack_direction .p2align 4 rust_psm_stack_direction: /* extern "sysv64" fn() -> u8 (%al) */ .cfi_startproc movb $2, %al # always descending on x86_64 retq .cfi_endproc .def rust_psm_stack_pointer .scl 2 .type 32 .endef .globl rust_psm_...
jalal-ux/Test
2,541
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/powerpc64.s
/* Implementation of the AIX-like PowerPC ABI. Seems to be used by the big-endian PowerPC targets. The following references were used during the implementation of this code: https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/com.ibm.aix.alangref/idalangref_rntime_stack.htm https://www.ibm.com/support/k...
jalal-ux/Test
2,264
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/x86_windows_gnu.s
/* FIXME: this works locally but not on appveyor??!? */ /* NOTE: fastcall calling convention used on all x86 targets */ .text .def @rust_psm_stack_direction@0 .scl 2 .type 32 .endef .globl @rust_psm_stack_direction@0 .p2align 4 @rust_psm_stack_direction@0: /* extern "fastcall" fn() -> u8 (%al) */ .cfi_startproc mo...
jalal-ux/Test
1,938
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/sparc64.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc jmpl %o7 + 8, %g0 mov STACK_DIRECTION_DESCENDING, %o0 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_sta...
jalal-ux/Test
2,144
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/mips64_eabi.s
/* Not only MIPS has 20 different ABIs... nobody tells anybody what specific variant of which ABI is used where. This is an "EABI" implementation based on the following page: http://www.cygwin.com/ml/binutils/2003-06/msg00436.html */ #include "psm.h" .set noreorder /* we’ll manage the delay slots on our own, thanks...
jalal-ux/Test
2,235
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/x86_64.s
#include "psm.h" /* NOTE: sysv64 calling convention is used on all x86_64 targets, including Windows! */ .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define SIZE(fnname,endlabel) #else #def...
jalal-ux/Test
2,149
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/mips_eabi.s
/* Not only MIPS has 20 different ABIs... nobody tells anybody what specific variant of which ABI is used where. This is an "EABI" implementation based on the following page: http://www.cygwin.com/ml/binutils/2003-06/msg00436.html */ #include "psm.h" .set noreorder /* we’ll manage the delay slots on our own, thanks...
jalal-ux/Test
1,568
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/loongarch64.s
#include "psm.h" .text .globl rust_psm_stack_direction .align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li.w $r4, STACK_DIRECTION_DESCENDING jr $r1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction...
jalal-ux/Test
1,722
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/sparc_sysv.s
#include "psm.h" /* FIXME: this ABI has definitely not been verified at all */ .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc jmpl %o7 + 8, %g0 mov STACK_DIRECTION_DESCENDING, %o0 .rust_psm_stack_di...
jalal-ux/Test
1,694
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/wasm32.s
#include "psm.h" # Note that this function is not compiled when this package is uploaded to # crates.io, this source is only here as a reference for how the corresponding # wasm32.o was generated. This file can be compiled with: # # cpp psm/src/arch/wasm32.s | llvm-mc -o psm/src/arch/wasm32.o --arch=wasm32 -filetyp...
jalal-ux/Test
2,080
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/zseries_linux.s
/* Implementation of stack swtiching routines for zSeries LINUX ABI. This ABI is used by the s390x-unknown-linux-gnu target. Documents used: * LINUX for zSeries: ELF Application Binary Interface Supplement (1st ed., 2001) (LNUX-1107-01) * z/Architecture: Principles of Operation (4th ed., 2004) (SA22-7832...
jalal-ux/Test
1,963
.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.21/src/arch/powerpc32.s
#include "psm.h" /* FIXME: this probably does not cover all ABIs? Tested with sysv only, possibly works for AIX as well? */ .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li 3, STACK_DIRECTION_DESCEND...
jalal-ux/Test
40,185
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-armv8-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .section __TEXT,__const .align 5 Lsigma: .quad 0x3320646e61707865,0x6b20657479622d32 // en...
jalal-ux/Test
18,316
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-gcm-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .p2align 5 _aesni_ctr32_ghash_6x: vmovdqu 32(%r11),%xmm2 subq $6,%rdx vpxor %xmm...
jalal-ux/Test
10,863
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghash-neon-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .text .globl gcm_init_neon .def gcm_init_neon .type 32 .endef .align 4 gcm_init_neon: AAR...
jalal-ux/Test
190,544
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha20_poly1305_x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .section __DATA,__const .p2align 6 chacha20_poly1305_constants: L$chacha20_consts: .byte 'e',...
jalal-ux/Test
10,875
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghash-neon-armv8-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .text .globl _gcm_init_neon .private_extern _gcm_init_neon .align 4 _gcm_init_neon: AARCH...
jalal-ux/Test
17,785
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/bsaes-armv7-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved. @ @ Licensed under the Apa...
jalal-ux/Test
70,675
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha256-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .globl sha256_block_data_order_nohw .hidden sha256_block_data_order_nohw .type sha256_b...
jalal-ux/Test
4,266
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghashv8-armx-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) #if __ARM_MAX_ARCH__>=7 .text .arch armv8-a+crypto .globl gcm_init_clmul .hidden gcm_init_clmu...
jalal-ux/Test
4,229
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86-mont-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__ELF__) .text .globl bn_mul_mont .hidden bn_mul_mont .type bn_mul_mont,@function .align 16 bn_mul_mont: .L...
jalal-ux/Test
42,856
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha512-armv4-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved. @ @ Licensed under the Apa...
jalal-ux/Test
24,306
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aes-gcm-avx2-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .section __DATA,__const .p2align 4 L$bswap_mask: .quad 0x08090a0b0c0d0e0f, 0x00010203040506...
jalal-ux/Test
20,965
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .type _aesni_encrypt2,@function .align 16 _aesni_encrypt2: .cfi_startproc movups (%rcx...
jalal-ux/Test
11,047
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/vpaes-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .p2align 4 _vpaes_encrypt_core: movq %rdx,%r9 movq $16,%r11 movl ...
jalal-ux/Test
78,605
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/p256-x86_64-asm-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .section .rodata .align 64 .Lpoly: .quad 0xffffffffffffffff, 0x00000000ffffffff, 0x000...
jalal-ux/Test
30,650
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/armv8-mont-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .text .globl bn_mul_mont_nohw .def bn_mul_mont_nohw .type 32 .endef .align 5 bn_mul_mont_n...
jalal-ux/Test
73,987
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha20_poly1305_armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .section .rodata .align 7 Lchacha20_consts: .byte 'e','x','p','a','n','d',' ','3','2','-','b',...
jalal-ux/Test
82,176
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesv8-gcm-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) #if __ARM_MAX_ARCH__ >= 8 .arch armv8-a+crypto .text .globl aes_gcm_enc_kernel .def aes_gcm_e...
jalal-ux/Test
60,192
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha256-armv4-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved. @ @ Licensed under the Apa...
jalal-ux/Test
5,546
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghash-x86-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__ELF__) .text .globl gcm_init_clmul .hidden gcm_init_clmul .type gcm_init_clmul,@function .align 16 gcm_in...
jalal-ux/Test
4,159
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghashv8-armx-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) #if __ARM_MAX_ARCH__>=7 .text .arch armv8-a+crypto .globl gcm_init_clmul .def gcm_init_clmul ...
jalal-ux/Test
30,876
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/armv8-mont-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .text .globl bn_mul_mont_nohw .hidden bn_mul_mont_nohw .type bn_mul_mont_nohw,%function .alig...
jalal-ux/Test
74,317
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha20_poly1305_armv8-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .section .rodata .align 7 .Lchacha20_consts: .byte 'e','x','p','a','n','d',' ','3','2','-','b...
jalal-ux/Test
15,121
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-x86-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__ELF__) .text #ifdef BORINGSSL_DISPATCH_TEST #endif .hidden _aesni_encrypt2 .type _aesni_encrypt2,@functio...
jalal-ux/Test
47,706
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha512-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .globl _sha512_block_data_order_nohw .private_extern _sha512_block_data_order_nohw ....
jalal-ux/Test
20,463
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86_64-mont-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .globl bn_mul_mont_nohw .hidden bn_mul_mont_nohw .type bn_mul_mont_nohw,@function .alig...
jalal-ux/Test
21,811
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/armv4-mont-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Silence ARMv8 deprecated IT instruction warnings. This file is used by both @ ARMv7 and ARMv8 pr...
jalal-ux/Test
19,873
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .p2align 4 _aesni_encrypt2: movups (%rcx),%xmm0 shll $4,%eax movups 16(%rcx),%xmm...
jalal-ux/Test
51,084
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86_64-mont5-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .globl bn_mul4x_mont_gather5 .hidden bn_mul4x_mont_gather5 .type bn_mul4x_mont_gather5,...
jalal-ux/Test
21,653
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghash-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .globl _gcm_init_clmul .private_extern _gcm_init_clmul .p2align 4 _gcm_init_clmul: ...
jalal-ux/Test
6,269
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghash-armv4-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Silence ARMv8 deprecated IT instruction warnings. This file is used by both @ ARMv7 and ARMv8 pr...
jalal-ux/Test
35,401
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/p256-armv8-asm-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .section __TEXT,__const .align 5 Lpoly: .quad 0xffffffffffffffff,0x00000000ffffffff,0x000000...
jalal-ux/Test
73,972
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha20_poly1305_armv8-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .section __TEXT,__const .align 7 Lchacha20_consts: .byte 'e','x','p','a','n','d',' ','3','2...
jalal-ux/Test
40,202
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .section .rodata .align 5 Lsigma: .quad 0x3320646e61707865,0x6b20657479622d32 // endian-neutr...
jalal-ux/Test
31,065
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .section .rodata .align 64 .Lzero: .long 0,0,0,0 .Lone: .long 1,0,0,0 .Linc: .long 0,1,...
jalal-ux/Test
19,660
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-gcm-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .type _aesni_ctr32_ghash_6x,@function .align 32 _aesni_ctr32_ghash_6x: .cfi_startproc ...
jalal-ux/Test
82,352
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesv8-gcm-armv8-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) #if __ARM_MAX_ARCH__ >= 8 .arch armv8-a+crypto .text .globl aes_gcm_enc_kernel .hidden aes_gc...
jalal-ux/Test
30,641
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/armv8-mont-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .text .globl _bn_mul_mont_nohw .private_extern _bn_mul_mont_nohw .align 5 _bn_mul_mont_noh...
jalal-ux/Test
30,277
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .section __DATA,__const .p2align 6 L$zero: .long 0,0,0,0 L$one: .long 1,0,0,0 L$inc: ...
jalal-ux/Test
25,498
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/vpaes-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .section .rodata .align 7 // totally strategic alignment _vpaes_consts: Lk_mc_forward: // mc_...
jalal-ux/Test
69,148
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha256-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .globl _sha256_block_data_order_nohw .private_extern _sha256_block_data_order_nohw ....
jalal-ux/Test
48,645
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha512-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .globl sha512_block_data_order_nohw .hidden sha512_block_data_order_nohw .type sha512_b...
jalal-ux/Test
48,620
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86_64-mont5-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .globl _bn_mul4x_mont_gather5 .private_extern _bn_mul4x_mont_gather5 .p2align 5 _bn_...
jalal-ux/Test
25,166
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/vpaes-armv8-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .section __TEXT,__const .align 7 // totally strategic alignment _vpaes_consts: Lk_mc_forwa...
jalal-ux/Test
40,421
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-armv8-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .section .rodata .align 5 .Lsigma: .quad 0x3320646e61707865,0x6b20657479622d32 // endian-neu...
jalal-ux/Test
18,647
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86_64-mont-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .globl _bn_mul_mont_nohw .private_extern _bn_mul_mont_nohw .p2align 4 _bn_mul_mont_n...
jalal-ux/Test
34,005
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha256-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) // Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved. // // Licensed under t...