repo_id
stringlengths 5
115
| size
int64 590
5.01M
| file_path
stringlengths 4
212
| content
stringlengths 590
5.01M
|
|---|---|---|---|
stsp/libi86
| 1,833
|
host-gcc/dos/dos-gettime.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_gettime.S.LIBI86)
.global _dos_gettime
_dos_gettime:
ENTER_BX_ (2)
MOV_ARG0W_BX_ (%bx)
movb $0x2c, %ah
int $0x21
xchgb %cl, %ch
movw %cx, (%bx)
xchgb %dl, %dh
movw %dx, 2(%bx)
RET_ (2)
|
stsp/libi86
| 2,270
|
host-gcc/dos/intdos.S
|
/*
* Copyright (c) 2018--2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
#include "libi86/internal/arch.h"
#include "libi86/internal/struc.h"
.code16
.att_syntax prefix
TEXT_ (intdos.S.LIBI86)
#ifndef _BORLANDC_SOURCE
.global intdos
intdos:
#else
.global __libi86_bc_intdos
__libi86_bc_intdos:
#endif
ENTER_BX_(4)
pushw %bp
pushw %si
pushw %di
pushw %es
movw %ds, %si /* good idea to set %es = %ds here */
movw %si, %es
pushw ARG2W_BX_ /* out_regs */
MOV_ARG0W_BX_(%bx) /* in_regs */
LOAD_UNION_REGS_BX_
int $0x21
pushw %bx
movw %ss, %bx /* restore %ds */
movw %bx, %ds
movw %sp, %bx
movw 2(%bx), %bx /* out_regs */
STORE_UNION_REGS_BX_POP_CLOBBER_
popw %cx
cld
popw %es
popw %di
popw %si
popw %bp
RET_(4)
|
stsp/libi86
| 1,815
|
host-gcc/dos/dos-commit.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_commit.S.LIBI86)
.global _dos_commit
_dos_commit:
ENTER_BX_ (2)
MOV_ARG0W_BX_CLOBBER_ (%bx)
movb $0x68, %ah
clc /* (?) per Open Watcom */
int $0x21
RET_SET_ERRNO_ (2)
|
stsp/libi86
| 1,912
|
host-gcc/dos/dos-settime.S
|
/*
* Copyright (c) 2022 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_settime.S.LIBI86)
.global _dos_settime
_dos_settime:
ENTER_BX_ (2)
MOV_ARG0W_BX_ (%bx)
movb $0x2d, %ah
movw (%bx), %cx
xchgb %cl, %ch
movw 2(%bx), %dx
xchgb %dl, %dh
int $0x21
testb %al, %al
jnz .error
cbtw
RET_ (2)
.error:
TAIL_CALL_ (__libi86_ret_einval, 2)
|
stsp/libi86
| 1,817
|
host-gcc/dos/dos-wait.S
|
/*
* Copyright (c) 2022 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (dos_wait.S.LIBI86)
.global _dos_wait
_dos_wait:
ENTER_BX_ (2)
MOV_ARG0W_BX_CLOBBER_ (%bx)
movb $0x4d, %ah
int $0x21
movw %ax, (%bx)
xorw %ax, %ax
RET_ (2)
|
stsp/libi86
| 2,037
|
host-gcc/dos/libi86-call5-tiny.S
|
/*
* Copyright (c) 2022 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (libi86_call5_tiny.S.LIBI86)
#ifdef __MSDOS__
.global __libi86_call5_tiny
__libi86_call5_tiny:
ENTER_BX_(6)
pushw %si
pushw %di
pushw %es
pushw %bp
# ifdef __IA16_CALLCVT_REGPARMCALL
xchgw %ax, %cx
# else
MOV_ARG0B_BX_(%cl)
MOV_ARG2W_BX_(%dx)
MOV_ARG4B_BX_(%al)
# endif
call 0x0005
popw %bp
popw %es
popw %di
popw %si
pushw %ss
popw %ds
RET_(6)
#else
# error
#endif
|
stsp/libi86
| 1,778
|
host-gcc/dos/dos-close.S
|
/*
* Copyright (c) 2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_close.S.LIBI86)
.global _dos_close
_dos_close:
ENTER_BX_ (2)
MOV_ARG0W_BX_CLOBBER_ (%bx)
movb $0x3e, %ah
int $0x21
RET_SET_ERRNO_ (2)
|
stsp/libi86
| 2,090
|
host-gcc/dos/dos-setdrive.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_setdrive.S.LIBI86)
.global _dos_setdrive
_dos_setdrive:
ENTER_BX_ (4)
#ifndef __IA16_CALLCVT_REGPARMCALL
MOV_ARG0W_BX_ (%dx)
MOV_ARG2W_BX_ (%bx)
#else
movw %dx, %bx
xchgw %ax, %dx
#endif
decw %dx
testb %dh, %dh /* if drive number > 0x100, then */
jz 0f /* map it to something bogus; but */
movb $0xff, %dl /* we still need to return the */
0: /* drive count... */
movb $0x0e, %ah
int $0x21
xorb %ah, %ah
movw %ax, (%bx)
RET_ (4)
|
stsp/libi86
| 1,831
|
host-gcc/dos/dos-setftime.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_setftime.S.LIBI86)
.global _dos_setftime
_dos_setftime:
ENTER_BX_ (6)
MOV_ARG2W_BX_ (%dx)
MOV_ARG4W_BX_ (%cx)
MOV_ARG0W_BX_CLOBBER_ (%bx)
movw $0x5701, %ax
int $0x21
RET_SET_ERRNO_ (6)
|
stsp/libi86
| 1,819
|
host-gcc/dos/dos-setfileattr.S
|
/*
* Copyright (c) 2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_setfileattr.S.LIBI86)
.global _dos_setfileattr
_dos_setfileattr:
ENTER_BX_ (4)
MOV_ARG2W_BX_ (%cx)
MOV_ARG0W_BX_CLOBBER_ (%dx)
movw $0x4301, %ax
int $0x21
RET_SET_ERRNO_ (4)
|
stsp/libi86
| 1,855
|
host-gcc/dos/peekb.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (peek.S.LIBI86)
.global __libi86_peekb
.weak peekb
__libi86_peekb:
peekb:
ENTER_BX_ (4)
movw %es, %cx
MOV_ARG0W_BX_ (%es)
MOV_ARG2W_BX_CLOBBER_ (%bx)
movb %es:(%bx), %al
movw %cx, %es
RET_ (4)
|
stsp/libi86
| 1,820
|
host-gcc/dos/libi86-ret-set-errno.S
|
/*
* Copyright (c) 2018--2020 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (libi86_ret_set_errno.S.LIBI86)
.global __libi86_ret_set_errno
__libi86_ret_set_errno:
jc 0f
xorw %ax, %ax
RET_ (0)
0:
JMP_ (__libi86_ret_really_set_errno)
|
stsp/libi86
| 2,068
|
host-gcc/dos/bdos.S
|
/*
* Copyright (c) 2018--2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (bdos.S.LIBI86)
#ifdef __MSDOS__
.global bdos
.global __libi86_bdosptr
.weak bdosptr
bdos:
__libi86_bdosptr:
bdosptr:
ENTER_BX_(6)
pushw %si
pushw %di
pushw %es
pushw %bp
MOV_ARG0B_BX_(%ah)
MOV_ARG2W_BX_(%dx)
MOV_ARG4B_BX_(%al)
int $0x21
popw %bp
popw %es
popw %di
popw %si
pushw %ss
popw %ds
RET_(6)
#else
# warning "unknown target OS; bdos (...) and bdosptr (...) not implemented"
#endif
|
stsp/libi86
| 1,868
|
host-gcc/dos/pokeb.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (pokeb.S.LIBI86)
.global __libi86_pokeb
.weak pokeb
__libi86_pokeb:
pokeb:
ENTER_BX_ (6)
pushw %es
MOV_ARG0W_BX_ (%es)
MOV_ARG4B_BX_ (%al)
MOV_ARG2W_BX_CLOBBER_ (%bx)
movb %al, %es:(%bx)
popw %es
RET_ (6)
|
stsp/libi86
| 1,918
|
host-gcc/dos/dos-getfileattr.S
|
/*
* Copyright (c) 2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_getfileattr.S.LIBI86)
.global _dos_getfileattr
_dos_getfileattr:
ENTER_BX_ (4)
#ifndef __IA16_CALLCVT_REGPARMCALL
MOV_ARG0W_BX_ (%dx)
MOV_ARG2W_BX_ (%bx)
#else
xchgw %ax, %dx
xchgw %ax, %bx
#endif
movw $0x4300, %ax
int $0x21
jc 0f
movw %cx, (%bx)
0:
RET_SET_ERRNO_ (4)
|
stsp/libi86
| 2,487
|
host-gcc/dos/intdosx.S
|
/*
* Copyright (c) 2018--2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
#include "libi86/internal/arch.h"
#include "libi86/internal/struc.h"
.code16
.att_syntax prefix
TEXT_ (intdosx.S.LIBI86)
#ifndef _BORLANDC_SOURCE
.global intdosx
intdosx:
#else
.global __libi86_bc_intdosx
__libi86_bc_intdosx:
#endif
ENTER_BX_(6)
pushw %bp
pushw %si
pushw %di
pushw %es
MOV_ARG4W_BX_(%si) /* seg_regs */
pushw %si
movw (%si), %es
pushw ARG2W_BX_ /* out_regs */
pushw 6(%si)
MOV_ARG0W_BX_(%bx) /* in_regs */
LOAD_UNION_REGS_BX_
popw %ds
int $0x21
pushw %bx
movw %sp, %bx
movw %ss:4(%bx), %bx /* seg_regs */
movw %ds, %ss:6(%bx) /* store %ds from interrupt call */
pushw %ss /* restore %ds */
popw %ds
movw %es, (%bx) /* store %es, %cs, %ss */
movw %cs, 2(%bx)
movw %ss, 4(%bx)
movw %sp, %bx
movw 2(%bx), %bx /* out_regs */
STORE_UNION_REGS_BX_POP_CLOBBER_
popw %cx
popw %cx
cld
popw %es
popw %di
popw %si
popw %bp
RET_(6)
|
stsp/libi86
| 1,884
|
host-gcc/dos/setswitchar.S
|
/*
* Copyright (c) 2022 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (setswitchar.S.LIBI86)
.global _setswitchar
.weak setswitchar
_setswitchar:
setswitchar:
#ifndef __IA16_CALLCVT_REGPARMCALL
ENTER_BX_ (2)
MOV_ARG0B_BX_ (%dl)
#else
xchgw %ax, %dx
#endif
movw $0x3701, %ax
int $0x21
RET_ (2)
|
stsp/libi86
| 1,851
|
host-gcc/dos/peek.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (peek.S.LIBI86)
.global __libi86_peek
.weak peek
__libi86_peek:
peek:
ENTER_BX_ (4)
movw %es, %cx
MOV_ARG0W_BX_ (%es)
MOV_ARG2W_BX_CLOBBER_ (%bx)
movw %es:(%bx), %ax
movw %cx, %es
RET_ (4)
|
stsp/libi86
| 2,162
|
host-gcc/dos/dosexterr.S
|
/*
* Copyright (c) 2022 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dosexterr.S.LIBI86)
.global dosexterr
dosexterr:
pushw %bp
#ifdef __IA16_CALLCVT_REGPARMCALL
pushw %ax
#endif
pushw %si
pushw %di
pushw %ds
pushw %es
movb $0x59, %ah
xorw %bx, %bx
int $0x21
popw %es
popw %ds
popw %di
popw %si
#ifdef __IA16_CALLCVT_REGPARMCALL
popw %bp
#else
movw %sp, %bp
# ifdef __MEDIUM__
movw 6(%bp), %bp
# else
movw 4(%bp), %bp
# endif
#endif
movw %ax, (%bp) /* .exterror */
xchgb %bl, %bh
movw %bx, 2(%bp) /* .errclass, .action */
movb %ch, 4(%bp) /* .locus */
popw %bp
RET_ (2)
|
stsp/libi86
| 1,811
|
host-gcc/dos/dos-getdrive.S
|
/*
* Copyright (c) 2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (dos_getdrive.S.LIBI86)
.global _dos_getdrive
_dos_getdrive:
ENTER_BX_ (2)
MOV_ARG0W_BX_ (%bx)
movb $0x19, %ah
int $0x21
incw %ax
xorb %ah, %ah
movw %ax, (%bx)
RET_ (2)
|
stsp/libi86
| 2,135
|
host-gcc/bios/bios-joystick.S
|
/*
* Copyright (c) 2020 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (bios_joystick.S.LIBI86)
.global _bios_joystick
_bios_joystick:
pushw %di
#ifndef __IA16_CALLCVT_REGPARMCALL
movw %sp, %di
# ifdef __IA16_CMODEL_IS_FAR_TEXT
movw 6(%di), %dx
movw 8(%di), %di
# else
movw 4(%di), %dx
movw 6(%di), %di
# endif
movb $0x84, %ah
int $0x15
jc .error
#else
movw %dx, %di
xchgw %ax, %dx
movb $0x84, %ah
int $0x15
jc .error
#endif
movw %ax, (%di)
movw %bx, 2(%di)
movw %cx, 4(%di)
movw %dx, 6(%di)
xorw %ax, %ax
.error:
pop %di
RET_ (4)
|
stsp/libi86
| 1,775
|
host-gcc/bios/bios-equiplist.S
|
/*
* Copyright (c) 2018--2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (bios_equiplist.S.LIBI86)
.global _bios_equiplist
.weak biosequip
_bios_equiplist:
biosequip:
int $0x11
RET_(0)
|
stsp/libi86
| 1,922
|
host-gcc/bios/bios-printer.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (bios_printer.S.LIBI86)
.global _bios_printer
_bios_printer:
ENTER_BX_ (6)
#ifndef __IA16_CALLCVT_REGPARMCALL
MOV_ARG0B_BX_ (%ah)
MOV_ARG2W_BX_ (%dx)
MOV_ARG4B_BX_ (%al)
#else
movb %al, %ch
xchgw %ax, %cx
#endif
int $0x17
movb %ah, %al
movb $0, %ah
RET_ (6)
|
stsp/libi86
| 1,771
|
host-gcc/bios/bios-memsize.S
|
/*
* Copyright (c) 2018--2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (bios_memsize.S.LIBI86)
.global _bios_memsize
.weak biosmemory
_bios_memsize:
biosmemory:
int $0x12
RET_(0)
|
stsp/libi86
| 1,899
|
host-gcc/bios/bios-serialcom.S
|
/*
* Copyright (c) 2021 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (bios_serialcom.S.LIBI86)
.global _bios_serialcom
_bios_serialcom:
ENTER_BX_ (6)
#ifndef __IA16_CALLCVT_REGPARMCALL
MOV_ARG0B_BX_ (%ah)
MOV_ARG2W_BX_ (%dx)
MOV_ARG4B_BX_ (%al)
#else
movb %al, %ch
xchgw %ax, %cx
#endif
int $0x14
RET_ (6)
|
stsp/libi86
| 1,762
|
host-gcc/direct/getdrive.S
|
/*
* Copyright (c) 2019 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.code16
.att_syntax prefix
TEXT_ (_getdrive.S.LIBI86)
.global _getdrive
_getdrive:
ENTER_BX_ (0)
movb $0x19, %ah
int $0x21
incw %ax
xorb %ah, %ah
RET_ (0)
|
stsp/libi86
| 2,534
|
host-gcc/kompress/lz4len.S
|
/*
* Copyright (c) 2023 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (lz4cpy_lz4len.S.LIBI86)
.global _lz4len
.weak lz4len
_lz4len:
lz4len:
ENTER_BX_ (6)
pushw %si
pushw %di
LDS_ARG0W_BX_ (%si) /* %ds:%si := BLK_SRC */
MOV_ARG4W_SSBX_ (%bx) /* %bx := BLK_SZ */
addw %si, %bx /* %bx := FP_OFF (BLK_SRC + BLK_SZ) */
xorw %di, %di /* %di := UNPACKLEN */
jmp .chk
.loopy:
lodsb
xchgw %ax, %dx
mov %dl, %ch
mov $12, %cl
shrw %cl, %cx
call .full_len_ckd
jc .ouch
addw %cx, %si
addw %cx, %di
jc .ouch
cmpw %bx, %si
jnb .done
lodsw
movb %dl, %cl
andw $0x0f, %cx
call .full_len_ckd
jc .ouch
addw $4, %cx
jc .ouch
addw %cx, %di
jc .ouch
.chk:
cmpw %bx, %si
jb .loopy
.done:
xchgw %ax, %di
.byte 0x3d /* cmpw ..., %ax */
.ouch:
xorw %ax, %ax
pushw %ss
popw %ds
popw %di
popw %si
RET_ (6)
.full_len_ckd:
cmpb $0x0f, %cl
jnz 8f
movb $0, %ah
1:
lodsb
addw %ax, %cx
jc 9f
cmp $0xff, %al
jz 1b
8:
clc
9:
ret
|
stsp/libi86
| 2,528
|
host-gcc/kompress/lz4cpy.S
|
/*
* Copyright (c) 2023 TK Chia
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the developer(s) nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "libi86/internal/call-cvt.h"
.arch i8086, jumps
.code16
.att_syntax prefix
TEXT_ (lz4cpy_lz4len.S.LIBI86)
.global _lz4cpy
.weak lz4cpy
_lz4cpy:
lz4cpy:
ENTER2_BX_ (10)
pushw %si
pushw %di
pushw %es
LES_ARG0W_BX_ (%di) /* %es:%di := DEST */
LDS_ARG4W2_BX_ (%si) /* %ds:%si := BLK_SRC */
MOV_ARG8W2_SSBX_ (%bx) /* %bx := BLK_SZ */
addw %si, %bx /* %bx := FP_OFF (BLK_SRC + BLK_SZ) */
jmp .chk
.loopy:
lodsb
xchgw %ax, %dx
mov %dl, %ch
mov $12, %cl
shrw %cl, %cx
call .full_len
rep movsb
cmpw %bx, %si
jnb .done
lodsw
movb %dl, %cl
movw %di, %dx
subw %ax, %dx
andw $0x0f, %cx
call .full_len
addw $4, %cx
pushw %ds
pushw %es
popw %ds
xchgw %dx, %si
rep movsb
movw %dx, %si
popw %ds
.chk:
cmpw %bx, %si
jb .loopy
.done:
xchgw %ax, %di
movw %es, %dx
pushw %ss
popw %ds
popw %es
popw %di
popw %si
RET2_ (10)
.full_len:
cmpb $0x0f, %cl
jnz 9f
movb $0, %ah
1:
lodsb
addw %ax, %cx
cmp $0xff, %al
jz 1b
9:
ret
|
stsp/newlib-ia16
| 1,594
|
libgloss/bfin/crt0.S
|
/*
* crt0.S for the Blackfin processor
*
* Copyright (C) 2006 Analog Devices, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
.text
.align 2
.global __start
__start:
/* Start by setting up a stack */
link 0xc;
/* Zero the memory in the .bss section. */
p0.l = __edata;
p0.h = __edata;
p1.l = __end;
p1.h = __end;
p1 -= p0;
r0 = 0;
lsetup (L$L$clear_bss, L$L$clear_bss) lc0 = p1;
L$L$clear_bss:
B [p0++] = r0;
#ifdef __BFIN_FDPIC__
/* Set up GOT pointer. */
P0.L = __ROFIXUP_END__;
P0.H = __ROFIXUP_END__;
P4 = [P0 - 4];
#endif
/* Need to set up standard file handles */
/* Parse string at r1 */
p0.l = __init;
p0.h = __init;
P3 = P4;
call (p0)
p0.l = _atexit;
p0.h = _atexit;
#ifdef __BFIN_FDPIC__
r0 = [P4 + __fini@FUNCDESC_GOT17M4];
P3 = P4;
#else
r0.l = __fini;
r0.h = __fini;
#endif
call (p0)
p0.l = ___setup_argv_and_call_main;
p0.h = ___setup_argv_and_call_main;
P3 = P4;
call (p0)
p0.l = _exit;
p0.h = _exit;
P3 = P4;
jump (p0) /* Should not return. */
nop;
|
stsp/newlib-ia16
| 15,538
|
libgloss/bfin/basiccrt.S
|
/*
* Basic startup code for Blackfin processor
*
* Copyright (C) 2008 Analog Devices, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
// basic startup code which
// - turns the cycle counter on
// - loads up FP & SP (both supervisor and user)
// - initialises the device drivers (FIOCRT)
// - calls monstartup to set up the profiling routines (PROFCRT)
// - calls the C++ startup (CPLUSCRT)
// - initialises argc/argv (FIOCRT/normal)
// - calls _main
// - calls _exit (which calls monexit to dump accumulated prof data (PROFCRT))
// - defines dummy IO routines (!FIOCRT)
#include <sys/platform.h>
#include <cplb.h>
#include <sys/anomaly_macros_rtl.h>
#define IVBh (EVT0 >> 16)
#define IVBl (EVT0 & 0xFFFF)
#define UNASSIGNED_VAL 0
#define UNASSIGNED_FILL 0
// just IVG15
#define INTERRUPT_BITS 0x400
#if defined(_ADI_THREADS) || \
!defined(__ADSPLPBLACKFIN__) || defined(__ADSPBF561__) || defined(__ADSPBF566__)
#define SET_CLOCK_SPEED 0
#else
#define SET_CLOCK_SPEED 1
#endif
#if SET_CLOCK_SPEED == 1
#include <sys/pll.h>
#define SET_CLK_MSEL 0x16
#define SET_CLK_DF 0
#define SET_CLK_LOCK_COUNT 0x300
#define SET_CLK_CSEL 0
#define SET_CLK_SSEL 5
/*
** CLKIN == 27MHz on the EZ-Kits.
** D==0 means CLKIN is passed to PLL without dividing.
** MSEL==0x16 means VCO==27*0x16 == 594MHz
** CSEL==0 means CCLK==VCO == 594MHz
** SSEL==5 means SCLK==VCO/5 == 118MHz
*/
#endif
#ifdef __ADSPBF561_COREB__
.section .b.text,"ax",@progbits
.align 2;
.global __coreb_start;
.type __coreb_start, STT_FUNC;
__coreb_start:
#elif defined(__ADSPBF60x_CORE1__)
.section .1.text,"ax",@progbits
.align 2;
.global __core1_start;
.type __core1_start, STT_FUNC;
__core1_start:
#else
.text;
.align 2;
.global __start;
.type __start, STT_FUNC;
__start:
#endif
#if WA_05000109
// Avoid Anomaly ID 05000109.
# define SYSCFG_VALUE 0x30
R1 = SYSCFG_VALUE;
SYSCFG = R1;
#endif
#if WA_05000229
// Avoid Anomaly 05-00-0229: DMA5_CONFIG and SPI_CTL not cleared on reset.
R1 = 0x400;
#if defined(__ADSPBF538__) || defined(__ADSPBF539__)
P0.L = SPI0_CTL & 0xFFFF;
P0.H = SPI0_CTL >> 16;
W[P0] = R1.L;
#else
P0.L = SPI_CTL & 0xFFFF;
P0.H = SPI_CTL >> 16;
W[P0] = R1.L;
#endif
P0.L = DMA5_CONFIG & 0xFFFF;
P0.H = DMA5_CONFIG >> 16;
R1 = 0;
W[P0] = R1.L;
#endif
// Zap loop counters to zero, to make sure that
// hw loops are disabled - it could be really baffling
// if the counters and bottom regs are set, and we happen
// to run into them.
R7 = 0;
LC0 = R7;
LC1 = R7;
// Clear the DAG Length regs too, so that it's safe to
// use I-regs without them wrapping around.
L0 = R7;
L1 = R7;
L2 = R7;
L3 = R7;
// Zero ITEST_COMMAND and DTEST_COMMAND
// (in case they have crud in them and
// does a write somewhere when we enable cache)
I0.L = (ITEST_COMMAND & 0xFFFF);
I0.H = (ITEST_COMMAND >> 16);
I1.L = (DTEST_COMMAND & 0xFFFF);
I1.H = (DTEST_COMMAND >> 16);
R7 = 0;
[I0] = R7;
[I1] = R7;
// It seems writing ITEST_COMMAND from SDRAM with icache enabled
// needs SSYNC.
#ifdef __BFIN_SDRAM
SSYNC;
#else
CSYNC;
#endif
// Initialise the Event Vector table.
P0.H = IVBh;
P0.L = IVBl;
// Install __unknown_exception_occurred in EVT so that
// there is defined behaviour.
P0 += 2*4; // Skip Emulation and Reset
P1 = 13;
R1.L = __unknown_exception_occurred;
R1.H = __unknown_exception_occurred;
LSETUP (L$ivt,L$ivt) LC0 = P1;
L$ivt: [P0++] = R1;
// Set IVG15's handler to be the start of the mode-change
// code. Then, before we return from the Reset back to user
// mode, we'll raise IVG15. This will mean we stay in supervisor
// mode, and continue from the mode-change point., but at a
// much lower priority.
P1.H = L$supervisor_mode;
P1.L = L$supervisor_mode;
[P0] = P1;
// Initialise the stack.
// Note: this points just past the end of the section.
// First write should be with [--SP].
#ifdef __BFIN_SDRAM
SP.L = __end + 0x400000 - 12;
SP.H = __end + 0x400000 - 12;
#else
#ifdef __ADSPBF561_COREB__
SP.L=__coreb_stack_end - 12;
SP.H=__coreb_stack_end - 12;
#elif defined(__ADSPBF60x_CORE1__)
SP.L=__core1_stack_end - 12;
SP.H=__core1_stack_end - 12;
#else
SP.L=__stack_end - 12;
SP.H=__stack_end - 12;
#endif
#endif
usp = sp;
// We're still in supervisor mode at the moment, so the FP
// needs to point to the supervisor stack.
FP = SP;
// And make space for incoming "parameters" for functions
// we call from here:
SP += -12;
// Zero out bss section
#ifdef __BFIN_SDRAM
R0.L = ___bss_start;
R0.H = ___bss_start;
R1.L = __end;
R1.H = __end;
#else
#ifdef __ADSPBF561_COREB__
R0.L = __coreb_bss_start;
R0.H = __coreb_bss_start;
R1.L = __coreb_bss_end;
R1.H = __coreb_bss_end;
#elif defined(__ADSPBF60x_CORE1__)
R0.L = __core1_bss_start;
R0.H = __core1_bss_start;
R1.L = __core1_bss_end;
R1.H = __core1_bss_end;
#else
R0.L = __bss_start;
R0.H = __bss_start;
R1.L = __bss_end;
R1.H = __bss_end;
#endif
#endif
R2 = R1 - R0;
R1 = 0;
#ifdef __ADSPBF561_COREB__
CALL.X __coreb_memset;
#elif defined(__ADSPBF60x_CORE1__)
CALL.X __core1_memset;
#else
CALL.X _memset;
#endif
R0 = INTERRUPT_BITS;
R0 <<= 5; // Bits 0-4 not settable.
// CALL.X __install_default_handlers;
R4 = R0; // Save modified list
R0 = SYSCFG; // Enable the Cycle counter
BITSET(R0,1);
SYSCFG = R0;
#if WA_05000137
// Avoid anomaly #05000137
// Set the port preferences of DAG0 and DAG1 to be
// different; this gives better performance when
// performing dual-dag operations on SDRAM.
P0.L = DMEM_CONTROL & 0xFFFF;
P0.H = DMEM_CONTROL >> 16;
R0 = [P0];
BITSET(R0, 12);
BITCLR(R0, 13);
[P0] = R0;
CSYNC;
#endif
// Reinitialise data areas in RAM from ROM, if MemInit's
// been used.
// CALL.X _mi_initialize;
#if defined(__ADSPLPBLACKFIN__)
#if SET_CLOCK_SPEED == 1
#if 0
// Check if this feature is enabled, i.e. ___clk_ctrl is defined to non-zero
P0.L = ___clk_ctrl;
P0.H = ___clk_ctrl;
R0 = MAX_IN_STARTUP;
R1 = [P0];
R0 = R0 - R1;
CC = R0;
IF CC JUMP L$clock_is_set;
#endif
// Investigate whether we are a suitable revision
// for boosting the system clocks.
// speed.
P0.L = DSPID & 0xFFFF;
P0.H = DSPID >> 16;
R0 = [P0];
R0 = R0.L (Z);
CC = R0 < 2;
IF CC JUMP L$clock_is_set;
// Set the internal Voltage-Controlled Oscillator (VCO)
R0 = SET_CLK_MSEL (Z);
R1 = SET_CLK_DF (Z);
R2 = SET_CLK_LOCK_COUNT (Z);
CALL.X __pll_set_system_vco;
// Set the Core and System clocks
R0 = SET_CLK_CSEL (Z);
R1 = SET_CLK_SSEL (Z);
CALL.X __pll_set_system_clocks;
L$clock_is_set:
#endif
#endif /* ADSPLPBLACKFIN */
#if defined(__ADSPBF561__) || defined(__ADSPBF566__) || defined(__ADSPBF606__) || defined(__ADSPBF607__) || defined(__ADSPBF608__) || defined(__ADSPBF609__)
// Initialise the multi-core data tables.
// A dummy function will be called if we are not linking with
// -multicore
// CALL.X __mc_data_initialise;
#endif
#if 0
// Write the cplb exception handler to the EVT if approprate and
// initialise the CPLBs if they're needed. couldn't do
// this before we set up the stacks.
P2.H = ___cplb_ctrl;
P2.L = ___cplb_ctrl;
R0 = CPLB_ENABLE_ANY_CPLBS;
R6 = [P2];
R0 = R0 & R6;
CC = R0;
IF !CC JUMP L$no_cplbs;
#if !defined(_ADI_THREADS)
P1.H = __cplb_hdr;
P1.L = __cplb_hdr;
P0.H = IVBh;
P0.L = IVBl;
[P0+12] = P1; // write exception handler
#endif /* _ADI_THREADS */
R0 = R6;
CALL.X __cplb_init;
#endif
L$no_cplbs:
// Enable interrupts
STI R4; // Using the mask from default handlers
RAISE 15;
// Move the processor into user mode.
P0.L=L$still_interrupt_in_ipend;
P0.H=L$still_interrupt_in_ipend;
RETI=P0;
L$still_interrupt_in_ipend:
rti; // keep doing 'rti' until we've 'finished' servicing all
// interrupts of priority higher than IVG15. Normally one
// would expect to only have the reset interrupt in IPEND
// being serviced, but occasionally when debugging this may
// not be the case - if restart is hit when servicing an
// interrupt.
//
// When we clear all bits from IPEND, we'll enter user mode,
// then we'll automatically jump to supervisor_mode to start
// servicing IVG15 (which we will 'service' for the whole
// program, so that the program is in supervisor mode.
//
// Need to do this to 'finish' servicing the reset interupt.
L$supervisor_mode:
[--SP] = RETI; // re-enables the interrupt system
R0.L = UNASSIGNED_VAL;
R0.H = UNASSIGNED_VAL;
#if UNASSIGNED_FILL
R2=R0;
R3=R0;
R4=R0;
R5=R0;
R6=R0;
R7=R0;
P0=R0;
P1=R0;
P2=R0;
P3=R0;
P4=R0;
P5=R0;
#endif
// Push a RETS and Old FP onto the stack, for sanity.
[--SP]=R0;
[--SP]=R0;
// Make sure the FP is sensible.
FP = SP;
// And leave space for incoming "parameters"
SP += -12;
#ifdef PROFCRT
CALL.X monstartup; // initialise profiling routines
#endif /* PROFCRT */
#if !defined(__ADSPBF561_COREB__) && !defined(__ADSPBF60x_CORE1__)
CALL.X __init;
R0.L = __fini;
R0.H = __fini;
CALL.X _atexit;
#endif
#if !defined(_ADI_THREADS)
#ifdef FIOCRT
// FILE IO provides access to real command-line arguments.
CALL.X __getargv;
r1.l=__Argv;
r1.h=__Argv;
#else
// Default to having no arguments and a null list.
R0=0;
#ifdef __ADSPBF561_COREB__
R1.L=L$argv_coreb;
R1.H=L$argv_coreb;
#elif defined(__ADSPBF60x_CORE1__)
R1.L=L$argv_core1;
R1.H=L$argv_core1;
#else
R1.L=L$argv;
R1.H=L$argv;
#endif
#endif /* FIOCRT */
#endif /* _ADI_THREADS */
// At long last, call the application program.
#ifdef __ADSPBF561_COREB__
CALL.X _coreb_main;
#elif defined(__ADSPBF60x_CORE1__)
CALL.X _core1_main;
#else
CALL.X _main;
#endif
#if !defined(_ADI_THREADS)
#if !defined(__ADSPBF561_COREB__) && !defined(__ADSPBF60x_CORE1__)
CALL.X _exit; // passing in main's return value
#endif
#endif
#ifdef __ADSPBF561_COREB__
.size __coreb_start, .-__coreb_start
#elif defined(__ADSPBF60x_CORE1__)
.size __core1_start, .-__core1_start
#else
.size __start, .-__start
#endif
.align 2
.type __unknown_exception_occurred, STT_FUNC;
__unknown_exception_occurred:
// This function is invoked by the default exception
// handler, if it does not recognise the kind of
// exception that has occurred. In other words, the
// default handler only handles some of the system's
// exception types, and it does not expect any others
// to occur. If your application is going to be using
// other kinds of exceptions, you must replace the
// default handler with your own, that handles all the
// exceptions you will use.
//
// Since there's nothing we can do, we just loop here
// at what we hope is a suitably informative label.
IDLE;
CSYNC;
JUMP __unknown_exception_occurred;
RTS;
.size __unknown_exception_occurred, .-__unknown_exception_occurred
#if defined(__ADSPLPBLACKFIN__)
#if SET_CLOCK_SPEED == 1
/*
** CLKIN == 27MHz on the EZ-Kits.
** D==0 means CLKIN is passed to PLL without dividing.
** MSEL==0x16 means VCO==27*0x16 == 594MHz
** CSEL==0 means CCLK==VCO == 594MHz
** SSEL==5 means SCLK==VCO/5 == 118MHz
*/
// int pll_set_system_clocks(int csel, int ssel)
// returns 0 for success, -1 for error.
.align 2
.type __pll_set_system_clocks, STT_FUNC;
__pll_set_system_clocks:
P0.H = PLL_DIV >> 16;
P0.L = PLL_DIV & 0xFFFF;
R2 = W[P0] (Z);
// Plant CSEL and SSEL
R0 <<= 16;
R0.L = (4 << 8) | 2; // 2 bits, at posn 4
R1 <<= 16;
R1.L = 4; // 4 bits, at posn 0
R2 = DEPOSIT(R2, R0);
#if defined(__WORKAROUND_DREG_COMP_LATENCY)
// Work around anomaly 05-00-0209 which affects the DEPOSIT
// instruction (and the EXTRACT, SIGNBITS, and EXPADJ instructions)
// if the previous instruction created any of its operands
NOP;
#endif
R2 = DEPOSIT(R2, R1);
W[P0] = R2;
SSYNC;
RTS;
.size __pll_set_system_clocks, .-__pll_set_system_clocks
// int pll_set_system_vco(int msel, int df, lockcnt)
.align 2
.type __pll_set_system_vco, STT_FUNC;
__pll_set_system_vco:
P0.H = PLL_CTL >> 16;
P0.L = PLL_CTL & 0xFFFF;
R3 = W[P0] (Z);
P2 = R3; // Save copy
R3 >>= 1; // Drop old DF
R1 = ROT R1 BY -1; // Move DF into CC
R3 = ROT R3 BY 1; // and into ctl space.
R0 <<= 16; // Set up pattern reg
R0.L = (9<<8) | 6; // (6 bits at posn 9)
R1 = P2; // Get the old version
R3 = DEPOSIT(R3, R0);
CC = R1 == R3; // and if we haven't changed
IF CC JUMP L$done; // Anything, return
CC = R2 == 0; // Use default lockcount if
IF CC JUMP L$wakeup; // user one is zero.
P2.H = PLL_LOCKCNT >> 16;
P2.L = PLL_LOCKCNT & 0xFFFF;
W[P2] = R2; // Set the lock counter
L$wakeup:
P2.H = SIC_IWR >> 16;
P2.L = SIC_IWR & 0xFFFF;
R2 = [P2];
BITSET(R2, 0); // enable PLL Wakeup
[P2] = R2;
W[P0] = R3; // Update PLL_CTL
SSYNC;
CLI R2; // Avoid unnecessary interrupts
IDLE; // Wait until PLL has locked
STI R2; // Restore interrupts.
L$done:
RTS;
.size __pll_set_system_vco, .-__pll_set_system_vco
#endif
#endif /* ADSPLPBLACKFIN */
#if defined(__ADSPBF561_COREB__) || defined(__ADSPBF60x_CORE1__)
#ifdef __ADSPBF561_COREB__
.section .b.text,"ax",@progbits
.type __coreb_memset, STT_FUNC
__coreb_memset:
#else
.section .1.text,"ax",@progbits
.type __core1_memset, STT_FUNC
__core1_memset:
#endif
P0 = R0 ; /* P0 = address */
P2 = R2 ; /* P2 = count */
R3 = R0 + R2; /* end */
CC = R2 <= 7(IU);
IF CC JUMP .Ltoo_small;
R1 = R1.B (Z); /* R1 = fill char */
R2 = 3;
R2 = R0 & R2; /* addr bottom two bits */
CC = R2 == 0; /* AZ set if zero. */
IF !CC JUMP .Lforce_align ; /* Jump if addr not aligned. */
.Laligned:
P1 = P2 >> 2; /* count = n/4 */
R2 = R1 << 8; /* create quad filler */
R2.L = R2.L + R1.L(NS);
R2.H = R2.L + R1.H(NS);
P2 = R3;
LSETUP (.Lquad_loop , .Lquad_loop) LC0=P1;
.Lquad_loop:
[P0++] = R2;
CC = P0 == P2;
IF !CC JUMP .Lbytes_left;
RTS;
.Lbytes_left:
R2 = R3; /* end point */
R3 = P0; /* current position */
R2 = R2 - R3; /* bytes left */
P2 = R2;
.Ltoo_small:
CC = P2 == 0; /* Check zero count */
IF CC JUMP .Lfinished; /* Unusual */
.Lbytes:
LSETUP (.Lbyte_loop , .Lbyte_loop) LC0=P2;
.Lbyte_loop:
B[P0++] = R1;
.Lfinished:
RTS;
.Lforce_align:
CC = BITTST (R0, 0); /* odd byte */
R0 = 4;
R0 = R0 - R2;
P1 = R0;
R0 = P0; /* Recover return address */
IF !CC JUMP .Lskip1;
B[P0++] = R1;
.Lskip1:
CC = R2 <= 2; /* 2 bytes */
P2 -= P1; /* reduce count */
IF !CC JUMP .Laligned;
B[P0++] = R1;
B[P0++] = R1;
JUMP .Laligned;
#ifdef __ADSPBF561_COREB__
.size __coreb_memset,.-__coreb_memset
#else
.size __core1_memset,.-__core1_memset
#endif
#endif
#ifdef __ADSPBF561_COREB__
.section .b.bss,"aw",@progbits
.align 4
.type L$argv_coreb, @object
.size L$argv_coreb, 4
L$argv_coreb:
.zero 4
#elif defined(__ADSPBF60x_CORE1__)
.section .1.bss,"aw",@progbits
.align 4
.type L$argv_core1, @object
.size L$argv_core1, 4
L$argv_core1:
.zero 4
#else
.local L$argv
.comm L$argv,4,4
#endif
|
stsp/newlib-ia16
| 7,161
|
libgloss/mips/crt0_cfe.S
|
/*
* crt0_cfe.S -- Runtime startup for MIPS targets running CFE.
*
* Copyright 2003
* Broadcom Corporation. All rights reserved.
*
* This software is furnished under license and may be used and copied only
* in accordance with the following terms and conditions. Subject to these
* conditions, you may download, copy, install, use, modify and distribute
* modified or unmodified copies of this software in source and/or binary
* form. No title or ownership is transferred hereby.
*
* 1) Any source code used, modified or distributed must reproduce and
* retain this copyright notice and list of conditions as they appear in
* the source file.
*
* 2) No right is granted to use any trade name, trademark, or logo of
* Broadcom Corporation. The "Broadcom Corporation" name may not be
* used to endorse or promote products derived from this software
* without the prior written permission of Broadcom Corporation.
*
* 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
* FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
* LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Derived from crt0_cygmon.S:
*
* Copyright (c) 1995, 1996, 1997, 2000 Red Hat, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
/*
* This file does minimal runtime startup for code running under
* CFE firmware.
*
* It does minimal hardware initialization. In particular
* it sets Status:FR to match the requested floating point
* mode.
*
* It is meant to be linked with the other files provided by libcfe.a,
* and calls routines in those files.
*/
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#ifdef __mips_embedded_pic
# error -membedded-pic is not supported.
#endif
#include "regs.S"
/*
* Set up some room for a stack. We just grab a chunk of memory.
*/
#define STARTUP_STACK_SIZE (1 * 1024)
.comm _lstack, STARTUP_STACK_SIZE
.text
.align 4
/*
* Without the following nop, GDB thinks _start is a data variable.
* This is probably a bug in GDB in handling a symbol that is at the
* start of the .text section.
*/
nop
/*
* On entry, the following values have been passed in registers
* by the firmware:
*
* a0: firmware handle
* a1: zero (unused)
* a2: firmware callback entrypoint
* a3: CFE entrypoint seal (unused)
*
* They must be preserved until the CFE entrypoint and handle
* are passed to __libcfe_init().
*/
.globl _start
.ent _start
_start:
.set noreorder
/* Set the global data pointer, defined in the linker script. */
la gp, _gp
#ifndef __mips_soft_float
/* If compiled for hard float, set the FPU mode based on the
compilation flags. Note that this assumes that enough code
will run after the mtc0 to clear any hazards. */
mfc0 t0, C0_SR
or t0, t0, (SR_CU1 | SR_FR)
#if (__mips_fpr == 32)
xor t0, t0, SR_FR /* If 32-bit FP mode, clear FR. */
#endif
mtc0 t0, C0_SR
#endif
.end _start
/*
* zero out the bss section.
*/
.globl _zerobss
.ent _zerobss
_zerobss:
/* These variables are defined in the linker script. */
la v0, _fbss
la v1, _end
3:
sw zero, 0(v0)
bltu v0, v1, 3b
addiu v0, v0, 4 /* Delay slot. */
.end _zerobss
/*
* Setup a small stack so we can run some C code, and do
* the library initialization. (32 bytes are saved for
* the argument registers' stack slots.)
*/
.globl _stackinit
.ent _stackinit
_stackinit:
la t0, _lstack
addiu sp, t0, (STARTUP_STACK_SIZE - 32)
jal __libcfe_init
nop
/*
* Setup the stack pointer --
* __libcfe_init() returns the value to be used as the top of
* the program's stack.
*
* We subtract 32 bytes for the 4 argument registers, in case
* main() wants to write them back to the stack. The caller
* allocates stack space for parameters in the old MIPS ABIs.
* We must do this even though we aren't passing arguments,
* because main might be declared to have them.)
*
* We subtract 32 more bytes for the argv/envp setup for the
* call to main().
*/
subu v0, v0, 64
move sp, v0
.end _stackinit
/*
* initialize target specific stuff. Only execute these
* functions it they exist.
*/
.globl hardware_init_hook .text
.globl software_init_hook .text
.type _fini,@function
.type _init,@function
.globl atexit .text
.globl exit .text
.globl _crt0init
.ent _crt0init
_crt0init:
la t9, hardware_init_hook # init the hardware if needed
beq t9, zero, 6f
nop
jal t9
nop
6:
la t9, software_init_hook # init the software if needed
beq t9, zero, 7f
nop
jal t9
nop
7:
la a0, _fini
jal atexit
nop
#ifdef GCRT0
.globl _ftext
.globl _extext
la a0, _ftext
la a1, _etext
jal monstartup
nop
#endif
jal _init # run global constructors
nop
addiu a1,sp,32 # argv = sp + 32
addiu a2,sp,40 # envp = sp + 40
#if __mips64
sd zero,(a1) # argv[argc] = 0
sd zero,(a2) # envp[0] = 0
#else
sw zero,(a1)
sw zero,(a2)
#endif
jal main # call the program start function
move a0,zero # set argc to 0; delay slot.
# fall through to the "exit" routine
jal exit # call libc exit to run the G++
# destructors
move a0, v0 # pass through the exit code
.end _crt0init
/*
* _exit -- Exit from the application. This is provided in this file because
* program exit should shut down profiling (if GCRT0 is defined),
* and only this file is compiled with GCRT0 defined.
*/
.globl _exit
.ent _exit
_exit:
7:
move s0, a0 /* Save in case we loop. */
#ifdef GCRT0
jal _mcleanup
nop
#endif
la t0, hardware_exit_hook
beq t0,zero,1f
nop
jal t0
nop
1:
/* Call into the library to do the heavy lifting. */
jal __libcfe_exit
move a0, s0 /* Delay slot. */
b 7b /* Loop back just in case. */
nop
.end _exit
/* EOF crt0_cfe.S */
|
stsp/newlib-ia16
| 8,225
|
libgloss/mips/vr4300.S
|
/*
* vr4300.S -- CPU specific support routines
*
* Copyright (c) 1995,1996 Cygnus Support
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifndef __mips64
.set mips3
#endif
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
.text
.align 2
# Taken from "R4300 Preliminary RISC Processor Specification
# Revision 2.0 January 1995" page 39: "The Count
# register... increments at a constant rate... at one-half the
# PClock speed."
# We can use this fact to provide small polled delays.
.globl __cpu_timer_poll
.ent __cpu_timer_poll
__cpu_timer_poll:
.set noreorder
# in: a0 = (unsigned int) number of PClock ticks to wait for
# out: void
# The Vr4300 counter updates at half PClock, so divide by 2 to
# get counter delta:
bnezl a0, 1f # continue if delta non-zero
srl a0, a0, 1 # divide ticks by 2 {DELAY SLOT}
# perform a quick return to the caller:
j ra
nop # {DELAY SLOT}
1:
mfc0 v0, C0_COUNT # get current counter value
nop
nop
# We cannot just do the simple test, of adding our delta onto
# the current value (ignoring overflow) and then checking for
# equality. The counter is incrementing every two PClocks,
# which means the counter value can change between
# instructions, making it hard to sample at the exact value
# desired.
# However, we do know that our entry delta value is less than
# half the number space (since we divide by 2 on entry). This
# means we can use a difference in signs to indicate timer
# overflow.
addu a0, v0, a0 # unsigned add (ignore overflow)
# We know have our end value (which will have been
# sign-extended to fill the 64bit register value).
2:
# get current counter value:
mfc0 v0, C0_COUNT
nop
nop
# This is an unsigned 32bit subtraction:
subu v0, a0, v0 # delta = (end - now) {DELAY SLOT}
bgtzl v0, 2b # looping back is most likely
nop
# We have now been delayed (in the foreground) for AT LEAST
# the required number of counter ticks.
j ra # return to caller
nop # {DELAY SLOT}
.set reorder
.end __cpu_timer_poll
# Flush the processor caches to memory:
.globl __cpu_flush
.ent __cpu_flush
__cpu_flush:
.set noreorder
# NOTE: The Vr4300 *CANNOT* have any secondary cache (bit 17
# of the CONFIG registered is hard-wired to 1). We just
# provide code to flush the Data and Instruction caches.
# Even though the Vr4300 has hard-wired cache and cache line
# sizes, we still interpret the relevant Config register
# bits. This allows this code to be used for other conforming
# MIPS architectures if desired.
# Get the config register
mfc0 a0, C0_CONFIG
nop
nop
li a1, 1 # a useful constant
#
srl a2, a0, 9 # bits 11..9 for instruction cache size
andi a2, a2, 0x7 # 3bits of information
add a2, a2, 12 # get full power-of-2 value
sllv a2, a1, a2 # instruction cache size
#
srl a3, a0, 6 # bits 8..6 for data cache size
andi a3, a3, 0x7 # 3bits of information
add a3, a3, 12 # get full power-of-2 value
sllv a3, a1, a3 # data cache size
#
li a1, (1 << 5) # check IB (instruction cache line size)
and a1, a0, a1 # mask against the CONFIG register value
beqz a1, 1f # branch on result of delay slot operation
nop
li a1, 32 # non-zero, then 32bytes
j 2f # continue
nop
1:
li a1, 16 # 16bytes
2:
#
li t0, (1 << 4) # check DB (data cache line size)
and a0, a0, t0 # mask against the CONFIG register value
beqz a0, 3f # branch on result of delay slot operation
nop
li a0, 32 # non-zero, then 32bytes
j 4f # continue
nop
3:
li a0, 16 # 16bytes
4:
#
# a0 = data cache line size
# a1 = instruction cache line size
# a2 = instruction cache size
# a3 = data cache size
#
lui t0, ((K0BASE >> 16) & 0xFFFF)
ori t0, t0, (K0BASE & 0xFFFF)
addu t1, t0, a2 # end cache address
subu t2, a1, 1 # line size mask
not t2 # invert the mask
and t3, t0, t2 # get start address
addu t1, -1
and t1, t2 # get end address
5:
cache INDEX_INVALIDATE_I,0(t3)
bne t3, t1, 5b
addu t3, a1
#
addu t1, t0, a3 # end cache address
subu t2, a0, 1 # line size mask
not t2 # invert the mask
and t3, t0, t2 # get start address
addu t1, -1
and t1, t2 # get end address
6:
cache INDEX_WRITEBACK_INVALIDATE_D,0(t3)
bne t3, t1, 6b
addu t3, a0
#
j ra # return to the caller
nop
.set reorder
.end __cpu_flush
# NOTE: This variable should *NOT* be addressed relative to
# the $gp register since this code is executed before $gp is
# initialised... hence we leave it in the text area. This will
# cause problems if this routine is ever ROMmed:
.globl __buserr_cnt
__buserr_cnt:
.word 0
.align 3
__k1_save:
.word 0
.word 0
.align 2
.ent __buserr
.globl __buserr
__buserr:
.set noat
.set noreorder
# k0 and k1 available for use:
mfc0 k0,C0_CAUSE
nop
nop
andi k0,k0,0x7c
sub k0,k0,7 << 2
beq k0,$0,__buserr_do
nop
# call the previous handler
la k0,__previous
jr k0
nop
#
__buserr_do:
# TODO: check that the cause is indeed a bus error
# - if not then just jump to the previous handler
la k0,__k1_save
sd k1,0(k0)
#
la k1,__buserr_cnt
lw k0,0(k1) # increment counter
addu k0,1
sw k0,0(k1)
#
la k0,__k1_save
ld k1,0(k0)
#
mfc0 k0,C0_EPC
nop
nop
addu k0,k0,4 # skip offending instruction
mtc0 k0,C0_EPC # update EPC
nop
nop
eret
# j k0
# rfe
.set reorder
.set at
.end __buserr
__exception_code:
.set noreorder
lui k0,%hi(__buserr)
daddiu k0,k0,%lo(__buserr)
jr k0
nop
.set reorder
__exception_code_end:
.data
__previous:
.space (__exception_code_end - __exception_code)
# This subtracting two addresses is working
# but is not garenteed to continue working.
# The assemble reserves the right to put these
# two labels into different frags, and then
# cant take their difference.
.text
.ent __default_buserr_handler
.globl __default_buserr_handler
__default_buserr_handler:
.set noreorder
# attach our simple bus error handler:
# in: void
# out: void
mfc0 a0,C0_SR
nop
li a1,SR_BEV
and a1,a1,a0
beq a1,$0,baseaddr
lui a0,0x8000 # delay slot
lui a0,0xbfc0
daddiu a0,a0,0x0200
baseaddr:
daddiu a0,a0,0x0180
# a0 = base vector table address
la a1,__exception_code_end
la a2,__exception_code
subu a1,a1,a2
la a3,__previous
# there must be a better way of doing this????
copyloop:
lw v0,0(a0)
sw v0,0(a3)
lw v0,0(a2)
sw v0,0(a0)
daddiu a0,a0,4
daddiu a2,a2,4
daddiu a3,a3,4
subu a1,a1,4
bne a1,$0,copyloop
nop
la a0,__buserr_cnt
sw $0,0(a0)
j ra
nop
.set reorder
.end __default_buserr_handler
.ent __restore_buserr_handler
.globl __restore_buserr_handler
__restore_buserr_handler:
.set noreorder
# restore original (monitor) bus error handler
# in: void
# out: void
mfc0 a0,C0_SR
nop
li a1,SR_BEV
and a1,a1,a0
beq a1,$0,res_baseaddr
lui a0,0x8000 # delay slot
lui a0,0xbfc0
daddiu a0,a0,0x0200
res_baseaddr:
daddiu a0,a0,0x0180
# a0 = base vector table address
la a1,__exception_code_end
la a3,__exception_code
subu a1,a1,a3
la a3,__previous
# there must be a better way of doing this????
res_copyloop:
lw v0,0(a3)
sw v0,0(a0)
daddiu a0,a0,4
daddiu a3,a3,4
subu a1,a1,4
bne a1,$0,res_copyloop
nop
j ra
nop
.set reorder
.end __restore_buserr_handler
.ent __buserr_count
.globl __buserr_count
__buserr_count:
.set noreorder
# restore original (monitor) bus error handler
# in: void
# out: unsigned int __buserr_cnt
la v0,__buserr_cnt
lw v0,0(v0)
j ra
nop
.set reorder
.end __buserr_count
/* EOF vr4300.S */
|
stsp/newlib-ia16
| 12,695
|
libgloss/mips/vr5xxx.S
|
/*
* vr5xxx.S -- CPU specific support routines
*
* Copyright (c) 1999 Cygnus Solutions
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
/* This file cloned from vr4300.S by dlindsay@cygnus.com
* and recoded to suit Vr5432 and Vr5000.
* Should be no worse for Vr43{00,05,10}.
* Specifically, __cpu_flush() has been changed (a) to allow for the hardware
* difference (in set associativity) between the Vr5432 and Vr5000,
* and (b) to flush the optional secondary cache of the Vr5000.
*/
/* Processor Revision Identifier (PRID) Register: Implementation Numbers */
#define IMPL_VR5432 0x54
/* Cache Constants not determinable dynamically */
#define VR5000_2NDLINE 32 /* secondary cache line size */
#define VR5432_LINE 32 /* I,Dcache line sizes */
#define VR5432_SIZE (16*1024) /* I,Dcache half-size */
#ifndef __mips64
.set mips3
#endif
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
.text
.align 2
# Taken from "R4300 Preliminary RISC Processor Specification
# Revision 2.0 January 1995" page 39: "The Count
# register... increments at a constant rate... at one-half the
# PClock speed."
# We can use this fact to provide small polled delays.
.globl __cpu_timer_poll
.ent __cpu_timer_poll
__cpu_timer_poll:
.set noreorder
# in: a0 = (unsigned int) number of PClock ticks to wait for
# out: void
# The Vr4300 counter updates at half PClock, so divide by 2 to
# get counter delta:
bnezl a0, 1f # continue if delta non-zero
srl a0, a0, 1 # divide ticks by 2 {DELAY SLOT}
# perform a quick return to the caller:
j ra
nop # {DELAY SLOT}
1:
mfc0 v0, C0_COUNT # get current counter value
nop
nop
# We cannot just do the simple test, of adding our delta onto
# the current value (ignoring overflow) and then checking for
# equality. The counter is incrementing every two PClocks,
# which means the counter value can change between
# instructions, making it hard to sample at the exact value
# desired.
# However, we do know that our entry delta value is less than
# half the number space (since we divide by 2 on entry). This
# means we can use a difference in signs to indicate timer
# overflow.
addu a0, v0, a0 # unsigned add (ignore overflow)
# We know have our end value (which will have been
# sign-extended to fill the 64bit register value).
2:
# get current counter value:
mfc0 v0, C0_COUNT
nop
nop
# This is an unsigned 32bit subtraction:
subu v0, a0, v0 # delta = (end - now) {DELAY SLOT}
bgtzl v0, 2b # looping back is most likely
nop
# We have now been delayed (in the foreground) for AT LEAST
# the required number of counter ticks.
j ra # return to caller
nop # {DELAY SLOT}
.set reorder
.end __cpu_timer_poll
# Flush the processor caches to memory:
.globl __cpu_flush
.ent __cpu_flush
__cpu_flush:
.set noreorder
# NOTE: The Vr4300 and Vr5432 *CANNOT* have any secondary cache.
# On those, SC (bit 17 of CONFIG register) is hard-wired to 1,
# except that email from Dennis_Han@el.nec.com says that old
# versions of the Vr5432 incorrectly hard-wired this bit to 0.
# The Vr5000 has an optional direct-mapped secondary cache,
# and the SC bit correctly indicates this.
# So, for the 4300 and 5432 we want to just
# flush the primary Data and Instruction caches.
# For the 5000 it is desired to flush the secondary cache too.
# There is an operation difference worth noting.
# The 4300 and 5000 primary caches use VA bit 14 to choose cache set,
# whereas 5432 primary caches use VA bit 0.
# This code interprets the relevant Config register bits as
# much as possible, except for the 5432.
# The code therefore has some portability.
# However, the associativity issues mean you should not just assume
# that this code works anywhere. Also, the secondary cache set
# size is hardwired, since the 5000 series does not define codes
# for variant sizes.
# Note: this version of the code flushes D$ before I$.
# It is difficult to construct a case where that matters,
# but it cant hurt.
mfc0 a0, C0_PRID # a0 = Processor Revision register
nop # dlindsay: unclear why the nops, but
nop # vr4300.S had such so I do too.
srl a2, a0, PR_IMP # want bits 8..15
andi a2, a2, 0x255 # mask: now a2 = Implementation # field
li a1, IMPL_VR5432
beq a1, a2, 8f # use Vr5432-specific flush algorithm
nop
# Non-Vr5432 version of the code.
# (The distinctions being: CONFIG is truthful about secondary cache,
# and we act as if the primary Icache and Dcache are direct mapped.)
mfc0 t0, C0_CONFIG # t0 = CONFIG register
nop
nop
li a1, 1 # a1=1, a useful constant
srl a2, t0, CR_IC # want IC field of CONFIG
andi a2, a2, 0x7 # mask: now a2= code for Icache size
add a2, a2, 12 # +12
sllv a2, a1, a2 # a2=primary instruction cache size in bytes
srl a3, t0, CR_DC # DC field of CONFIG
andi a3, a3, 0x7 # mask: now a3= code for Dcache size
add a3, a3, 12 # +12
sllv a3, a1, a3 # a3=primary data cache size in bytes
li t2, (1 << CR_IB) # t2=mask over IB boolean
and t2, t2, t0 # test IB field of CONFIG register value
beqz t2, 1f #
li a1, 16 # 16 bytes (branch shadow: always loaded.)
li a1, 32 # non-zero, then 32bytes
1:
li t2, (1 << CR_DB) # t2=mask over DB boolean
and t2, t2, t0 # test BD field of CONFIG register value
beqz t2, 2f #
li a0, 16 # 16bytes (branch shadow: always loaded.)
li a0, 32 # non-zero, then 32bytes
2:
lui t1, ((K0BASE >> 16) & 0xFFFF)
ori t1, t1, (K0BASE & 0xFFFF)
# At this point,
# a0 = primary Dcache line size in bytes
# a1 = primary Icache line size in bytes
# a2 = primary Icache size in bytes
# a3 = primary Dcache size in bytes
# t0 = CONFIG value
# t1 = a round unmapped cached base address (we are in kernel mode)
# t2,t3 scratch
addi t3, t1, 0 # t3=t1=start address for any cache
add t2, t3, a3 # t2=end adress+1 of Dcache
sub t2, t2, a0 # t2=address of last line in Dcache
3:
cache INDEX_WRITEBACK_INVALIDATE_D,0(t3)
bne t3, t2, 3b #
addu t3, a0 # (delay slot) increment by Dcache line size
# Now check CONFIG to see if there is a secondary cache
lui t2, (1 << (CR_SC-16)) # t2=mask over SC boolean
and t2, t2, t0 # test SC in CONFIG
bnez t2, 6f
# There is a secondary cache. Find out its sizes.
srl t3, t0, CR_SS # want SS field of CONFIG
andi t3, t3, 0x3 # mask: now t3= code for cache size.
beqz t3, 4f
lui a3, ((512*1024)>>16) # a3= 512K, code was 0
addu t3, -1 # decrement code
beqz t3, 4f
lui a3, ((1024*1024)>>16) # a3= 1 M, code 1
addu t3, -1 # decrement code
beqz t3, 4f
lui a3, ((2*1024*1024)>>16) # a3= 2 M, code 2
j 6f # no secondary cache, code 3
4: # a3 = secondary cache size in bytes
li a0, VR5000_2NDLINE # no codes assigned for other than 32
# At this point,
# a0 = secondary cache line size in bytes
# a1 = primary Icache line size in bytes
# a2 = primary Icache size in bytes
# a3 = secondary cache size in bytes
# t1 = a round unmapped cached base address (we are in kernel mode)
# t2,t3 scratch
addi t3, t1, 0 # t3=t1=start address for any cache
add t2, t3, a3 # t2=end address+1 of secondary cache
sub t2, t2, a0 # t2=address of last line in secondary cache
5:
cache INDEX_WRITEBACK_INVALIDATE_SD,0(t3)
bne t3, t2, 5b
addu t3, a0 # (delay slot) increment by line size
6: # Any optional secondary cache done. Now do I-cache and return.
# At this point,
# a1 = primary Icache line size in bytes
# a2 = primary Icache size in bytes
# t1 = a round unmapped cached base address (we are in kernel mode)
# t2,t3 scratch
add t2, t1, a2 # t2=end adress+1 of Icache
sub t2, t2, a1 # t2=address of last line in Icache
7:
cache INDEX_INVALIDATE_I,0(t1)
bne t1, t2, 7b
addu t1, a1 # (delay slot) increment by Icache line size
j ra # return to the caller
nop
8:
# Vr5432 version of the cpu_flush code.
# (The distinctions being: CONFIG can not be trusted about secondary
# cache (which does not exist). The primary caches use Virtual Address Bit 0
# to control set selection.
# Code does not consult CONFIG about cache sizes: knows the hardwired sizes.
# Since both I and D have the same size and line size, uses a merged loop.
li a0, VR5432_LINE
li a1, VR5432_SIZE
lui t1, ((K0BASE >> 16) & 0xFFFF)
ori t1, t1, (K0BASE & 0xFFFF)
# a0 = cache line size in bytes
# a1 = 1/2 cache size in bytes
# t1 = a round unmapped cached base address (we are in kernel mode)
add t2, t1, a1 # t2=end address+1
sub t2, t2, a0 # t2=address of last line in Icache
9:
cache INDEX_WRITEBACK_INVALIDATE_D,0(t1) # set 0
cache INDEX_WRITEBACK_INVALIDATE_D,1(t1) # set 1
cache INDEX_INVALIDATE_I,0(t1) # set 0
cache INDEX_INVALIDATE_I,1(t1) # set 1
bne t1, t2, 9b
addu t1, a0
j ra # return to the caller
nop
.set reorder
.end __cpu_flush
# NOTE: This variable should *NOT* be addressed relative to
# the $gp register since this code is executed before $gp is
# initialised... hence we leave it in the text area. This will
# cause problems if this routine is ever ROMmed:
.globl __buserr_cnt
__buserr_cnt:
.word 0
.align 3
__k1_save:
.word 0
.word 0
.align 2
.ent __buserr
.globl __buserr
__buserr:
.set noat
.set noreorder
# k0 and k1 available for use:
mfc0 k0,C0_CAUSE
nop
nop
andi k0,k0,0x7c
sub k0,k0,7 << 2
beq k0,$0,__buserr_do
nop
# call the previous handler
la k0,__previous
jr k0
nop
#
__buserr_do:
# TODO: check that the cause is indeed a bus error
# - if not then just jump to the previous handler
la k0,__k1_save
sd k1,0(k0)
#
la k1,__buserr_cnt
lw k0,0(k1) # increment counter
addu k0,1
sw k0,0(k1)
#
la k0,__k1_save
ld k1,0(k0)
#
mfc0 k0,C0_EPC
nop
nop
addu k0,k0,4 # skip offending instruction
mtc0 k0,C0_EPC # update EPC
nop
nop
eret
# j k0
# rfe
.set reorder
.set at
.end __buserr
__exception_code:
.set noreorder
lui k0,%hi(__buserr)
daddiu k0,k0,%lo(__buserr)
jr k0
nop
.set reorder
__exception_code_end:
.data
__previous:
.space (__exception_code_end - __exception_code)
# This subtracting two addresses is working
# but is not garenteed to continue working.
# The assemble reserves the right to put these
# two labels into different frags, and then
# cant take their difference.
.text
.ent __default_buserr_handler
.globl __default_buserr_handler
__default_buserr_handler:
.set noreorder
# attach our simple bus error handler:
# in: void
# out: void
mfc0 a0,C0_SR
nop
li a1,SR_BEV
and a1,a1,a0
beq a1,$0,baseaddr
lui a0,0x8000 # delay slot
lui a0,0xbfc0
daddiu a0,a0,0x0200
baseaddr:
daddiu a0,a0,0x0180
# a0 = base vector table address
la a1,__exception_code_end
la a2,__exception_code
subu a1,a1,a2
la a3,__previous
# there must be a better way of doing this????
copyloop:
lw v0,0(a0)
sw v0,0(a3)
lw v0,0(a2)
sw v0,0(a0)
daddiu a0,a0,4
daddiu a2,a2,4
daddiu a3,a3,4
subu a1,a1,4
bne a1,$0,copyloop
nop
la a0,__buserr_cnt
sw $0,0(a0)
j ra
nop
.set reorder
.end __default_buserr_handler
.ent __restore_buserr_handler
.globl __restore_buserr_handler
__restore_buserr_handler:
.set noreorder
# restore original (monitor) bus error handler
# in: void
# out: void
mfc0 a0,C0_SR
nop
li a1,SR_BEV
and a1,a1,a0
beq a1,$0,res_baseaddr
lui a0,0x8000 # delay slot
lui a0,0xbfc0
daddiu a0,a0,0x0200
res_baseaddr:
daddiu a0,a0,0x0180
# a0 = base vector table address
la a1,__exception_code_end
la a3,__exception_code
subu a1,a1,a3
la a3,__previous
# there must be a better way of doing this????
res_copyloop:
lw v0,0(a3)
sw v0,0(a0)
daddiu a0,a0,4
daddiu a3,a3,4
subu a1,a1,4
bne a1,$0,res_copyloop
nop
j ra
nop
.set reorder
.end __restore_buserr_handler
.ent __buserr_count
.globl __buserr_count
__buserr_count:
.set noreorder
# restore original (monitor) bus error handler
# in: void
# out: unsigned int __buserr_cnt
la v0,__buserr_cnt
lw v0,0(v0)
j ra
nop
.set reorder
.end __buserr_count
/* EOF vr5xxx.S */
|
stsp/newlib-ia16
| 7,118
|
libgloss/mips/entry.S
|
/* entry.S - exception handler for emulating MIPS16 'entry' and 'exit'
pseudo-instructions. These instructions are generated by the compiler
when the -mentry switch is used. The instructions are not implemented
in the MIPS16 CPU; hence the exception handler that emulates them.
This module contains the following public functions:
* void __install_entry_handler(void);
This function installs the entry/exit exception handler. It should
be called before executing any MIPS16 functions that were compiled with
-mentry, typically before main() is called.
* void __remove_entry_handler(void);
This function removes the entry/exit exception handler. It should
be called when the program is exiting, or when it is known that no
more MIPS16 functions compiled with -mentry will be called.
*/
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
#define CAUSE_EXCMASK 0x3c /* mask for ExcCode in Cause Register */
#define EXC_RI 0x28 /* 101000 == 10 << 2 */
/* Set DEBUG to 1 to enable recording of the last 16 interrupt causes. */
#define DEBUG 0
#if DEBUG
.sdata
int_count:
.space 4 /* interrupt count modulo 16 */
int_cause:
.space 4*16 /* last 16 interrupt causes */
#endif
.text
.set noreorder /* Do NOT reorder instructions */
/* __entry_exit_handler - the reserved instruction exception handler
that emulates the entry and exit instruction. */
__entry_exit_handler:
.set noat /* Do NOT use at register */
#if DEBUG
/* Must avoid using 'la' pseudo-op because it uses gp register, which
may not have a good value in an exception handler. */
# la k0, int_count /* intcount = (intcount + 1) & 0xf */
lui k0 ,%hi(int_count)
addiu k0, k0 ,%lo(int_count)
lw k1, (k0)
addiu k1, k1, 1
andi k1, k1, 0x0f
sw k1, (k0)
# la k0, int_cause /* k1 = &int_cause[intcount] */
lui k0, %hi(int_cause)
addiu k0, k0, %lo(int_cause)
sll k1, k1, 2
add k1, k1, k0
#endif
mfc0 k0, C0_CAUSE /* Fetch cause */
#if DEBUG
sw k0, -4(k1) /* Save exception cause in buffer */
#endif
mfc0 k1, C0_EPC /* Check for Reserved Inst. without */
and k0, CAUSE_EXCMASK /* destroying any register */
subu k0, EXC_RI
bne k0, zero, check_others /* Sorry, go do something else */
and k0, k1, 1 /* Check for TR mode (pc.0 = 1) */
beq k0, zero, ri_in_32 /* Sorry, RI in 32-bit mode */
xor k1, 1
/* Since we now are going to emulate or die, we can use all the T-registers */
/* that MIPS16 does not use (at, t0-t8), and we don't have to save them. */
.set at /* Now it's ok to use at again */
#if 0
j leave
rfe
#endif
lhu t0, 0(k1) /* Fetch the offending instruction */
xor t8, k1, 1 /* Prepare t8 for exit */
and t1, t0, 0xf81f /* Check for entry/exit opcode */
bne t1, 0xe809, other_ri
deareg: and t1, t0, 0x0700 /* Isolate the three a-bits */
srl t1, 6 /* Adjust them so x4 is applied */
slt t2, t1, 17 /* See if this is the exit instruction */
beqz t2, doexit
la t2, savea
subu t2, t1
jr t2 /* Jump into the instruction table */
rfe /* We run the rest in user-mode */
/* This is the entry instruction! */
sw a3, 12(sp) /* 4: a0-a3 saved */
sw a2, 8(sp) /* 3: a0-a2 saved */
sw a1, 4(sp) /* 2: a0-a1 saved */
sw a0, 0(sp) /* 1: a0 saved */
savea: /* 0: No arg regs saved */
dera: and t1, t0, 0x0020 /* Isolate the save-ra bit */
move t7, sp /* Temporary SP */
beq t1, zero, desreg
subu sp, 32 /* Default SP adjustment */
sw ra, -4(t7)
subu t7, 4
desreg: and t1, t0, 0x00c0 /* Isolate the two s-bits */
beq t1, zero, leave
subu t1, 0x0040
beq t1, zero, leave /* Only one to save... */
sw s0, -4(t7) /* Do the first one */
sw s1, -8(t7) /* Do the last one */
leave: jr t8 /* Exit to unmodified EPC */
nop /* Urgh - the only nop!! */
doexf0: mtc1 v0,$f0 /* Copy float value */
b doex2
doexf1: mtc1 v1,$f0 /* Copy double value */
mtc1 v0,$f1
b doex2
doexit: slt t2, t1, 21
beq t2, zero, doexf0
slt t2, t1, 25
beq t2, zero, doexf1
doex2: and t1, t0, 0x0020 /* Isolate ra bit */
beq t1, zero, dxsreg /* t1 holds ra-bit */
addu t7, sp, 32 /* Temporary SP */
lw ra, -4(t7)
subu t7, 4
dxsreg: and t1, t0, 0x00c0 /* Isolate the two s-bits */
beq t1, zero, leavex
subu t1, 0x0040
beq t1, zero, leavex /* Only one to save... */
lw s0, -4(t7) /* Do the first one */
lw s1, -8(t7) /* Do the last one */
leavex: jr ra /* Exit to ra */
addu sp, 32 /* Clean up stack pointer */
/* Come here for exceptions we can't handle. */
ri_in_32:
other_ri:
check_others: /* call the previous handler */
la k0,__previous
jr k0
nop
__exception_code:
.set noreorder
la k0, __entry_exit_handler
# lui k0, %hi(exception)
# addiu k0, k0, %lo(exception)
jr k0
nop
.set reorder
__exception_code_end:
.data
__previous:
.space (__exception_code_end - __exception_code)
.text
/* void __install_entry_handler(void)
Install our entry/exit reserved instruction exception handler.
*/
.ent __install_entry_handler
.globl __install_entry_handler
__install_entry_handler:
.set noreorder
mfc0 a0,C0_SR
nop
li a1,SR_BEV
and a1,a1,a0
beq a1,$0,baseaddr
lui a0,0x8000 /* delay slot */
lui a0,0xbfc0
addiu a0,a0,0x0100
baseaddr:
addiu a0,a0,0x080 /* a0 = base vector table address */
li a1,(__exception_code_end - __exception_code)
la a2,__exception_code
la a3,__previous
/* there must be a better way of doing this???? */
copyloop:
lw v0,0(a0)
sw v0,0(a3)
lw v0,0(a2)
sw v0,0(a0)
addiu a0,a0,4
addiu a2,a2,4
addiu a3,a3,4
subu a1,a1,4
bne a1,$0,copyloop
nop
j ra
nop
.set reorder
.end __install_entry_handler
/* void __remove_entry_handler(void);
Remove our entry/exit reserved instruction exception handler.
*/
.ent __remove_entry_handler
.globl __remove_entry_handler
__remove_entry_handler:
.set noreorder
mfc0 a0,C0_SR
nop
li a1,SR_BEV
and a1,a1,a0
beq a1,$0,res_baseaddr
lui a0,0x8000 /* delay slot */
lui a0,0xbfc0
addiu a0,a0,0x0200
res_baseaddr:
addiu a0,a0,0x0180 /* a0 = base vector table address */
li a1,(__exception_code_end - __exception_code)
la a3,__previous
/* there must be a better way of doing this???? */
res_copyloop:
lw v0,0(a3)
sw v0,0(a0)
addiu a0,a0,4
addiu a3,a3,4
subu a1,a1,4
bne a1,$0,res_copyloop
nop
j ra
nop
.set reorder
.end __remove_entry_handler
/* software_init_hook - install entry/exit handler and arrange to have it
removed at exit. This function is called by crt0.S. */
.text
.globl software_init_hook
.ent software_init_hook
software_init_hook:
.set noreorder
subu sp, sp, 8 /* allocate stack space */
sw ra, 4(sp) /* save return address */
jal __install_entry_handler /* install entry/exit handler */
nop
lui a0, %hi(__remove_entry_handler) /* arrange for exit to */
jal atexit /* de-install handler */
addiu a0, a0, %lo(__remove_entry_handler) /* delay slot */
lw ra, 4(sp) /* get return address */
j ra /* return */
addu sp, sp, 8 /* deallocate stack */
.set reorder
.end software_init_hook
|
stsp/newlib-ia16
| 3,794
|
libgloss/mips/abiflags.S
|
/*
* abiflags.S - MIPS ABI flags.
*/
/* Values for the xxx_size bytes of an ABI flags structure. */
#define AFL_REG_NONE 0x00 /* No registers. */
#define AFL_REG_32 0x01 /* 32-bit registers. */
#define AFL_REG_64 0x02 /* 64-bit registers. */
#define AFL_REG_128 0x03 /* 128-bit registers. */
/* Masks for the ases word of an ABI flags structure. */
#define AFL_ASE_DSP 0x00000001 /* DSP ASE. */
#define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */
#define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */
#define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */
#define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */
#define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
#define AFL_ASE_MT 0x00000040 /* MT ASE. */
#define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */
#define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */
#define AFL_ASE_MSA 0x00000200 /* MSA ASE. */
#define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
#define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
#define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
/* Values for the isa_ext word of an ABI flags structure. */
#define AFL_EXT_XLR 1 /* RMI Xlr instruction. */
#define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */
#define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */
#define AFL_EXT_LOONGSON_3A 4 /* Loongson 3A. */
#define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */
#define AFL_EXT_5900 6 /* MIPS R5900 instruction. */
#define AFL_EXT_4650 7 /* MIPS R4650 instruction. */
#define AFL_EXT_4010 8 /* LSI R4010 instruction. */
#define AFL_EXT_4100 9 /* NEC VR4100 instruction. */
#define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */
#define AFL_EXT_10000 11 /* MIPS R10000 instruction. */
#define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
#define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */
#define AFL_EXT_4120 14 /* NEC VR4120 instruction. */
#define AFL_EXT_5400 15 /* NEC VR5400 instruction. */
#define AFL_EXT_5500 16 /* NEC VR5500 instruction. */
#define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */
#define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */
/* Values defined for Tag_GNU_MIPS_ABI_FP. */
#define Val_GNU_MIPS_ABI_FP_ANY 0 /* Not tagged or not using any ABIs affected by the differences. */
#define Val_GNU_MIPS_ABI_FP_DOUBLE 1 /* Using hard-float -mdouble-float. */
#define Val_GNU_MIPS_ABI_FP_SINGLE 2 /* Using hard-float -msingle-float. */
#define Val_GNU_MIPS_ABI_FP_SOFT 3 /* Using soft-float. */
#define Val_GNU_MIPS_ABI_FP_OLD_64 4 /* Using -mips32r2 -mfp64. */
#define Val_GNU_MIPS_ABI_FP_XX 5 /* Using -mfpxx */
#define Val_GNU_MIPS_ABI_FP_64 6 /* Using -mips32r2 -mfp64. */
#define Val_GNU_MIPS_ABI_MSA_ANY 0 /* Not tagged or not using any ABIs affected by the differences. */
#define Val_GNU_MIPS_ABI_MSA_128 1 /* Using 128-bit MSA. */
/* MIPS ABI flags structure */
.struct 0
ABIFlags_version:
.struct ABIFlags_version + 2
ABIFlags_isa_level:
.struct ABIFlags_isa_level + 1
ABIFlags_isa_rev:
.struct ABIFlags_isa_rev + 1
ABIFlags_gpr_size:
.struct ABIFlags_gpr_size + 1
ABIFlags_cpr1_size:
.struct ABIFlags_cpr1_size + 1
ABIFlags_cpr2_size:
.struct ABIFlags_cpr2_size + 1
ABIFlags_fp_abi:
.struct ABIFlags_fp_abi + 1
ABIFlags_isa_ext:
.struct ABIFlags_isa_ext + 4
ABIFlags_ases:
.struct ABIFlags_ases + 4
ABIFlags_flags1:
.struct ABIFlags_flags1 + 4
ABIFlags_flags2:
.struct ABIFlags_flags2 + 4
/*> EOF abiflags.S <*/
|
stsp/newlib-ia16
| 1,414
|
libgloss/mips/idtmon.S
|
/*
* idtmon.S -- lo-level entry points into IDT monitor.
*
* Copyright (c) 1996 Cygnus Support
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
.text
.align 2
/* Provide named functions for entry into the IDT monitor: */
#define INDIRECT(name,index) \
.globl name; \
.ent name; \
name: la $2,+(0xbfc00000+((index)*8)); \
j $2; \
.end name
/* The following magic numbers are for the slots into the IDT monitor: */
INDIRECT(open,6)
INDIRECT(read,7)
INDIRECT(write,8)
INDIRECT(close,10)
INDIRECT(inbyte,11)
INDIRECT(outbyte,12)
INDIRECT(unlink,13)
INDIRECT(lseek,14)
INDIRECT(stat,15)
INDIRECT(mon_printf,16)
INDIRECT(_flush_cache,28)
INDIRECT(get_mem_info,55) /* expects pointer to three word vector */
/* EOF idtmon.S */
|
stsp/newlib-ia16
| 7,480
|
libgloss/mips/crt0.S
|
/*
* crt0.S -- startup file for MIPS.
*
* Copyright (c) 1995, 1996, 1997, 2001 Cygnus Support
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
/* This file does not use any floating-point ABI. */
.gnu_attribute 4,0
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
#include "abiflags.S"
/*
* Set up some room for a stack. We just grab a chunk of memory.
*/
#define STACK_SIZE 0x4000
#define GLOBAL_SIZE 0x2000
#define STARTUP_STACK_SIZE 0x0100
/* This is for referencing addresses that are not in the .sdata or
.sbss section under embedded-pic, or before we've set up gp. */
#ifdef __mips_embedded_pic
# ifdef __mips64
# define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
# else
# define LA(t,x) la t,x-PICBASE ; addu t,s0,t
# endif
#else /* __mips_embedded_pic */
# define LA(t,x) la t,x
#endif /* __mips_embedded_pic */
.comm __memsize, 12
.comm __lstack, STARTUP_STACK_SIZE
.text
.align 2
/* Without the following nop, GDB thinks _start is a data variable.
* This is probably a bug in GDB in handling a symbol that is at the
* start of the .text section.
*/
nop
.globl hardware_hazard_hook .text
.globl _start
.ent _start
_start:
#ifdef __mips_embedded_pic
#define PICBASE start_PICBASE
.set noreorder
PICBASE = .+8
bal PICBASE
nop
move s0,$31
.set reorder
#endif
#if __mips<3
# define STATUS_MASK (SR_CU1|SR_PE)
#else
/* Post-mips2 has no SR_PE bit. */
# ifdef __mips64
/* Turn on 64-bit addressing and additional float regs. */
# define STATUS_MASK (SR_CU1|SR_FR|SR_KX|SR_SX|SR_UX)
# else
# if __mips_fpr==32
# define STATUS_MASK (SR_CU1)
# else
/* Turn on additional float regs. */
# define STATUS_MASK (SR_CU1|SR_FR)
# endif
# endif
#endif
/* Clear Cause register. */
mtc0 zero,C0_CAUSE
nop
/* Read MIPS_abiflags structure and set status/config registers
accordingly. */
.weak __MIPS_abiflags_start
.weak __MIPS_abiflags_end
LA (t0,__MIPS_abiflags_start)
LA (t1,__MIPS_abiflags_end)
addiu t1,t1,-24
move v0,zero /* Mask for C0_SR. */
/* Branch to 1f is the .MIPS.abiflags section is not 24 bytes. This
indicates it is either missing or corrupt. */
bne t0,t1,1f
/* Check isa_level. */
lbu t1,ABIFlags_isa_level(t0)
sltu v1,t1,3 /* Is MIPS < 3? */
xori t1,t1,64 /* Is MIPS64? */
beq v1,zero,4f
li v1,SR_PE
or v0,v0,v1 /* Enable soft reset. */
4:
li v1,(SR_KX|SR_SX|SR_UX)
bne t1,zero,5f
or v0,v0,v1 /* Enable extended addressing. */
5:
/* Check fp_abi. */
lbu t1,ABIFlags_fp_abi(t0)
xori t1,t1,Val_GNU_MIPS_ABI_FP_SOFT
li v1,SR_CU1
beq t1,zero,2f /* Skip MSA and cpr1_size checks. */
or v0,v0,v1 /* Enable co-processor 1. */
/* Check cpr1_size. */
lbu t1,ABIFlags_cpr1_size(t0)
xori t1,t1,AFL_REG_64
li v1,SR_FR
bne t1,zero,3f
or v0,v0,v1 /* Enable 64-bit FPU registers. */
3:
/* Check ases. */
lw t1,ABIFlags_ases(t0)
andi t1,t1,AFL_ASE_MSA
li v1,SR_FR
beq t1,zero,2f
or v0,v0,v1 /* Enable 64-bit FPU registers. */
li v1,SR_MSA
.set push
.set mips32
mtc0 v1,C0_CONFIG,5 /* Enable MSA. */
.set pop
b 2f
1:
/* MIPS_abiflags structure is not available. Set status/config
registers based on flags defined by compiler. */
#ifdef __mips_soft_float
li v0,(STATUS_MASK-(STATUS_MASK & SR_CU1))
#else
li v0,STATUS_MASK
#endif
2:
/* Set C0_SR, */
mtc0 v0,C0_SR
nop
/* Avoid hazard from C0_SR changes. */
LA (t0, hardware_hazard_hook)
beq t0,zero,2f
jalr t0
2:
/* Fix high bits, if any, of the PC so that exception handling doesn't get
confused. */
LA (v0, 3f)
jr v0
3:
LA (gp, _gp) # set the global data pointer
.end _start
/*
* zero out the bss section.
*/
.globl __memsize
.globl get_mem_info .text
.globl __stack
.globl __global
.ent zerobss
zerobss:
LA (v0, _fbss)
LA (v1, _end)
beq v0,v1,2f
1:
addiu v0,v0,4
sw zero,-4(v0)
bne v0,v1,1b
2:
la t0, __lstack # make a small stack so we
addiu sp, t0, STARTUP_STACK_SIZE # can run some C code
la a0, __memsize # get the usable memory size
jal get_mem_info
/* setup the stack pointer */
LA (t0, __stack) # is __stack set ?
bne t0,zero,4f
/* NOTE: a0[0] contains the amount of memory available, and
not the last memory address. */
la a0, __memsize
lw t0,0(a0) # last address of memory available
la t1,K0BASE # cached kernel memory
addu t0,t0,t1 # get the end of memory address
/* Allocate 32 bytes for the register parameters. Allocate 16
bytes for a null argv and envp. Round the result up to 64
bytes to preserve alignment. */
subu t0,t0,64
4:
move sp,t0 # set stack pointer
.end zerobss
/*
* initialize target specific stuff. Only execute these
* functions it they exist.
*/
.globl hardware_init_hook .text
.globl software_init_hook .text
.type _fini,@function
.type _init,@function
.globl atexit .text
.globl exit .text
.ent init
init:
LA (t9, hardware_init_hook) # init the hardware if needed
beq t9,zero,6f
jalr t9
6:
LA (t9, software_init_hook) # init the hardware if needed
beq t9,zero,7f
jalr t9
7:
LA (a0, _fini)
jal atexit
#ifdef GCRT0
.globl _ftext
.globl _extext
LA (a0, _ftext)
LA (a1, _etext)
jal monstartup
#endif
jal _init # run global constructors
addiu a1,sp,32 # argv = sp + 32
addiu a2,sp,40 # envp = sp + 40
#if __mips64
sd zero,(a1) # argv[argc] = 0
sd zero,(a2) # envp[0] = 0
#else
sw zero,(a1)
sw zero,(a2)
#endif
move a0,zero # set argc to 0
jal main # call the program start function
# fall through to the "exit" routine
move a0,v0 # pass through the exit code
jal exit # call libc exit to run the G++
# destructors
.end init
/* Assume the PICBASE set up above is no longer valid below here. */
#ifdef __mips_embedded_pic
#undef PICBASE
#endif
/*
* _exit -- Exit from the application. Normally we cause a user trap
* to return to the ROM monitor for another run. NOTE: This is
* the only other routine we provide in the crt0.o object, since
* it may be tied to the "_start" routine. It also allows
* executables that contain a complete world to be linked with
* just the crt0.o object.
*/
.globl hardware_exit_hook .text
.globl _exit
.ent _exit
_exit:
7:
#ifdef __mips_embedded_pic
/* Need to reinit PICBASE, since we might be called via exit()
rather than via a return path which would restore old s0. */
#define PICBASE exit_PICBASE
.set noreorder
PICBASE = .+8
bal PICBASE
nop
move s0,$31
.set reorder
#endif
#ifdef GCRT0
LA (t0, _mcleanup)
jalr t0
#endif
LA (t0, hardware_exit_hook)
beq t0,zero,1f
jalr t0
1:
# break instruction can cope with 0xfffff, but GAS limits the range:
break 1023
b 7b # but loop back just in-case
.end _exit
/* Assume the PICBASE set up above is no longer valid below here. */
#ifdef __mips_embedded_pic
#undef PICBASE
#endif
/* EOF crt0.S */
|
stsp/newlib-ia16
| 4,707
|
libgloss/mips/pmon.S
|
/*
* pmon.S -- low-level entry points into PMON monitor.
*
* Copyright (c) 1996, 1997, 2002 Cygnus Support
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#if !defined(__mips64)
/* This machine does not support 64-bit operations. */
#define ADDU addu
#define SUBU subu
#else
/* This machine supports 64-bit operations. */
#define ADDU daddu
#define SUBU dsubu
#endif
#include "regs.S"
.text
.align 2
#ifdef LSI
#define PMON_VECTOR 0xffffffffbfc00200
#else
#define PMON_VECTOR 0xffffffffbfc00500
#endif
#ifndef __mips_eabi
/* Provide named functions for entry into the monitor: */
#define INDIRECT(name,index) \
.globl name; \
.ent name; \
.set noreorder; \
name: la $2,+(PMON_VECTOR+((index)*4)); \
lw $2,0($2); \
j $2; \
nop; \
.set reorder; \
.end name
#else
#define INDIRECT(name,index) \
.globl name; \
.ent name; \
.set noreorder; \
name: la $2,+(PMON_VECTOR+((index)*4)); \
lw $2,0($2); \
SUBU sp,sp,0x40; \
sd ra,0x38(sp); \
sd fp,0x30(sp); \
jal $2; \
move fp,sp; \
ld ra,0x38(sp); \
ld fp,0x30(sp); \
j ra; \
ADDU sp,sp,0x40; \
.set reorder; \
.end name
#endif
/* The following magic numbers are for the slots into the PMON monitor */
/* The first are used as the lo-level library run-time: */
INDIRECT(read,0)
INDIRECT(write,1)
INDIRECT(open,2)
INDIRECT(close,3)
/* The following are useful monitor routines: */
INDIRECT(mon_ioctl,4)
INDIRECT(mon_printf,5)
INDIRECT(mon_vsprintf,6)
INDIRECT(mon_ttctl,7)
INDIRECT(mon_cliexit,8)
INDIRECT(mon_getenv,9)
INDIRECT(mon_onintr,10)
INDIRECT(mon_flush_cache,11)
INDIRECT(_flush_cache,11)
INDIRECT(mon_exception,12)
/* The following routine is required by the "print()" function: */
.globl outbyte
.ent outbyte
.set noreorder
outbyte:
subu sp,sp,0x20 /* allocate stack space for string */
sd ra,0x18(sp) /* stack return address */
sd fp,0x10(sp) /* stack frame-pointer */
move fp,sp /* take a copy of the stack pointer */
/* We leave so much space on the stack for the string (16
characters), since the call to mon_printf seems to corrupt
the 8bytes at offset 8 into the string/stack. */
sb a0,0x00(sp) /* character to print */
sb z0,0x01(sp) /* NUL terminator */
jal mon_printf /* and output the string */
move a0,sp /* take a copy of the string pointer {DELAY SLOT} */
move sp,fp /* recover stack pointer */
ld ra,0x18(sp) /* recover return address */
ld fp,0x10(sp) /* recover frame-pointer */
j ra /* return to the caller */
addu sp,sp,0x20 /* dump the stack space {DELAY SLOT} */
.set reorder
.end outbyte
/* The following routine is required by the "sbrk()" function: */
.globl get_mem_info
.ent get_mem_info
.set noreorder
get_mem_info:
# in: a0 = pointer to 3 word structure
# out: void
subu sp,sp,0x18 /* create some stack space */
sd ra,0x00(sp) /* stack return address */
sd fp,0x08(sp) /* stack frame-pointer */
sd a0,0x10(sp) /* stack structure pointer */
move fp,sp /* take a copy of the stack pointer */
# The monitor has already sized memory, but unfortunately we
# do not have access to the data location containing the
# memory size.
jal __sizemem
nop
ld a0,0x10(sp) # recover structure pointer
sw v0,0(a0) # amount of memory available
# Deal with getting the cache size information:
mfc0 a1, C0_CONFIG
nop
nop
andi a2,a1,0x7 << 9 # bits 11..9 for instruction cache size
sll a2,a2,12 - 8
sw a2,4(a0)
andi a2,a1,0x7 << 6 # bits 8..6 for data cache size
sll a2,a2,12 - 5
sw a2,8(a0) # data cache size
#
move sp,fp /* recover stack pointer */
ld ra,0x00(sp) /* recover return address */
ld fp,0x08(sp) /* recover frame-pointer */
j ra /* return to the caller */
addu sp,sp,0x18 /* restore stack pointer {DELAY SLOT} */
.set reorder
.end get_mem_info
#ifdef LSI
# For the LSI MiniRISC board, we can safely assume that we have
# at least one megabyte of RAM.
.globl __sizemem
.ent __sizemem
__sizemem:
li v0,0x100000
j ra
.end __sizemem
#else
#endif
/* EOF pmon.S */
|
stsp/newlib-ia16
| 6,051
|
libgloss/mips/regs.S
|
/*
* regs.S -- standard MIPS register names.
*
* Copyright (c) 1995 Cygnus Support
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
/* Standard MIPS register names: */
#define zero $0
#define z0 $0
#define v0 $2
#define v1 $3
#define a0 $4
#define a1 $5
#define a2 $6
#define a3 $7
#define t0 $8
#define t1 $9
#define t2 $10
#define t3 $11
#define t4 $12
#define t5 $13
#define t6 $14
#define t7 $15
#define s0 $16
#define s1 $17
#define s2 $18
#define s3 $19
#define s4 $20
#define s5 $21
#define s6 $22
#define s7 $23
#define t8 $24
#define t9 $25
#define k0 $26 /* kernel private register 0 */
#define k1 $27 /* kernel private register 1 */
#define gp $28 /* global data pointer */
#define sp $29 /* stack-pointer */
#define fp $30 /* frame-pointer */
#define ra $31 /* return address */
#define pc $pc /* pc, used on mips16 */
#define fp0 $f0
#define fp1 $f1
/* Useful memory constants: */
#ifndef __mips64
#define K0BASE 0x80000000
#define K1BASE 0xA0000000
#define K0BASE_ADDR ((char *)K0BASE)
#define K1BASE_ADDR ((char *)K1BASE)
#else
#define K0BASE 0xFFFFFFFF80000000
#define K1BASE 0xFFFFFFFFA0000000
#define K0BASE_ADDR ((char *)0xFFFFFFFF80000000LL)
#define K1BASE_ADDR ((char *)0xFFFFFFFFA0000000LL)
#endif
#define PHYS_TO_K1(a) ((unsigned)(a) | K1BASE)
/* Standard Co-Processor 0 registers */
#define C0_COUNT $9 /* Count Register */
#define C0_SR $12 /* Status Register */
#define C0_CAUSE $13 /* last exception description */
#define C0_EPC $14 /* Exception error address */
#define C0_PRID $15 /* Processor Revision ID */
#define C0_CONFIG $16 /* CPU configuration */
/* Standard Processor Revision ID Register field offsets */
#define PR_IMP 8
/* Standard Config Register field offsets */
#define CR_DB 4
#define CR_IB 5
#define CR_DC 6 /* NOTE v4121 semantics != 43,5xxx semantics */
#define CR_IC 9 /* NOTE v4121 semantics != 43,5xxx semantics */
#define CR_SC 17
#define CR_SS 20
#define CR_SB 22
/* Standard Status Register bitmasks: */
#define SR_CU1 0x20000000 /* Mark CP1 as usable */
#define SR_FR 0x04000000 /* Enable MIPS III FP registers */
#define SR_BEV 0x00400000 /* Controls location of exception vectors */
#define SR_PE 0x00100000 /* Mark soft reset (clear parity error) */
#define SR_KX 0x00000080 /* Kernel extended addressing enabled */
#define SR_SX 0x00000040 /* Supervisor extended addressing enabled */
#define SR_UX 0x00000020 /* User extended addressing enabled */
#define SR_MSA 0x08000000 /* MSA ASE */
/* Standard (R4000) cache operations. Taken from "MIPS R4000
Microprocessor User's Manual" 2nd edition: */
#define CACHE_I (0) /* primary instruction */
#define CACHE_D (1) /* primary data */
#define CACHE_SI (2) /* secondary instruction */
#define CACHE_SD (3) /* secondary data (or combined instruction/data) */
#define INDEX_INVALIDATE (0) /* also encodes WRITEBACK if CACHE_D or CACHE_SD */
#define INDEX_LOAD_TAG (1)
#define INDEX_STORE_TAG (2)
#define CREATE_DIRTY_EXCLUSIVE (3) /* CACHE_D and CACHE_SD only */
#define HIT_INVALIDATE (4)
#define CACHE_FILL (5) /* CACHE_I only */
#define HIT_WRITEBACK_INVALIDATE (5) /* CACHE_D and CACHE_SD only */
#define HIT_WRITEBACK (6) /* CACHE_I, CACHE_D and CACHE_SD only */
#define HIT_SET_VIRTUAL (7) /* CACHE_SI and CACHE_SD only */
#define BUILD_CACHE_OP(o,c) (((o) << 2) | (c))
/* Individual cache operations: */
#define INDEX_INVALIDATE_I BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_I)
#define INDEX_WRITEBACK_INVALIDATE_D BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_D)
#define INDEX_INVALIDATE_SI BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_SI)
#define INDEX_WRITEBACK_INVALIDATE_SD BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_SD)
#define INDEX_LOAD_TAG_I BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_I)
#define INDEX_LOAD_TAG_D BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_D)
#define INDEX_LOAD_TAG_SI BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_SI)
#define INDEX_LOAD_TAG_SD BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_SD)
#define INDEX_STORE_TAG_I BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_I)
#define INDEX_STORE_TAG_D BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_D)
#define INDEX_STORE_TAG_SI BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_SI)
#define INDEX_STORE_TAG_SD BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_SD)
#define CREATE_DIRTY_EXCLUSIVE_D BUILD_CACHE_OP(CREATE_DIRTY_EXCLUSIVE,CACHE_D)
#define CREATE_DIRTY_EXCLUSIVE_SD BUILD_CACHE_OP(CREATE_DIRTY_EXCLUSIVE,CACHE_SD)
#define HIT_INVALIDATE_I BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_I)
#define HIT_INVALIDATE_D BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_D)
#define HIT_INVALIDATE_SI BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_SI)
#define HIT_INVALIDATE_SD BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_SD)
#define CACHE_FILL_I BUILD_CACHE_OP(CACHE_FILL,CACHE_I)
#define HIT_WRITEBACK_INVALIDATE_D BUILD_CACHE_OP(HIT_WRITEBACK_INVALIDATE,CACHE_D)
#define HIT_WRITEBACK_INVALIDATE_SD BUILD_CACHE_OP(HIT_WRITEBACK_INVALIDATE,CACHE_SD)
#define HIT_WRITEBACK_I BUILD_CACHE_OP(HIT_WRITEBACK,CACHE_I)
#define HIT_WRITEBACK_D BUILD_CACHE_OP(HIT_WRITEBACK,CACHE_D)
#define HIT_WRITEBACK_SD BUILD_CACHE_OP(HIT_WRITEBACK,CACHE_SD)
#define HIT_SET_VIRTUAL_SI BUILD_CACHE_OP(HIT_SET_VIRTUAL,CACHE_SI)
#define HIT_SET_VIRTUAL_SD BUILD_CACHE_OP(HIT_SET_VIRTUAL,CACHE_SD)
/*> EOF regs.S <*/
|
stsp/newlib-ia16
| 4,426
|
libgloss/mips/crt0_cygmon.S
|
/*
* crt0_cygmon.S -- Minimal startup file for MIPS targets running Cygmon.
*
* Copyright (c) 1995, 1996, 1997, 2000 Red Hat, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
/*
* This file contains the minimal startup code necessary.
* This will not do any hardware initialization. It is assumed that we are talking to Cygmon
* and therefore the hardware will be initialized properly.
*/
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
/*
* Set up some room for a stack. We just grab a chunk of memory.
*/
#define STACK_SIZE 0x4000
#define GLOBAL_SIZE 0x2000
#define STARTUP_STACK_SIZE 0x0100
.comm __memsize, 12
.comm __lstack, STARTUP_STACK_SIZE
.comm __stackbase,4
.text
.align 4
/*
* Without the following nop, GDB thinks _start is a data variable.
* This is probably a bug in GDB in handling a symbol that is at the
* start of the .text section.
*/
nop
.globl _start
.ent _start
_start:
.set noreorder
la gp, _gp # set the global data pointer, defined in the linker script
.end _start
/*
* zero out the bss section.
*/
.globl __memsize
.globl get_mem_info .text
.globl zerobss
.ent zerobss
zerobss:
la v0, _fbss # These variables are defined in the linker script
la v1, _end
3:
sw zero, 0(v0)
bltu v0, v1, 3b
addiu v0, v0, 4 # executed in delay slot
/*
* Setup a small stack so we can run some C code,
* and get the usable memory size.
*/
la t0, __lstack
addiu sp, t0, STARTUP_STACK_SIZE
la a0, __memsize
jal get_mem_info
nop
/*
* Setup the stack pointer --
* get_mem_info returns the top of memory, so just use that In
* addition, we must subtract 24 bytes for the 3 8 byte
* arguments to main, in case main wants to write them back to
* the stack. The caller is supposed to allocate stack space
* for parameters in registers in the old MIPS ABIs. We must
* do this even though we aren't passing arguments, because
* main might be declared to have them.
* Some ports need a larger alignment for the stack, so we
* subtract 32, which satisifes the stack for the arguments and
* keeps the stack pointer better aligned.
*/
subu v0, v0, 32
move sp, v0
sw sp, __stackbase # keep this for future ref
.end zerobss
/*
* initialize target specific stuff. Only execute these
* functions it they exist.
*/
.globl hardware_init_hook .text
.globl software_init_hook .text
.globl __do_global_dtors .text
.globl atexit .text
.globl exit .text
.globl init
.ent init
init:
la t9, hardware_init_hook # init the hardware if needed
beq t9, zero, 6f
nop
jal t9
nop
6:
la t9, software_init_hook # init the software if needed
beq t9, zero, 7f
nop
jal t9
nop
7:
la a0, __do_global_dtors
jal atexit
nop
#ifdef GCRT0
.globl _ftext
.globl _extext
la a0, _ftext
la a1, _etext
jal monstartup
nop
#endif
move a0,zero # set argc to 0
jal main # call the program start function
nop
# fall through to the "exit" routine
jal exit # call libc exit to run the G++
# destructors
move a0, v0 # pass through the exit code
.end init
/*
* _exit -- Exit from the application. Normally we cause a user trap
* to return to the ROM monitor for another run. NOTE: This is
* the only other routine we provide in the crt0.o object, since
* it may be tied to the "_start" routine. It also allows
* executables that contain a complete world to be linked with
* just the crt0.o object.
*/
.globl _exit
.ent _exit
_exit:
7:
#ifdef GCRT0
jal _mcleanup
nop
#endif
# Cygmon expects a break 5
break 5
nop
b 7b # loop back just in-case
nop
.end _exit
/* EOF crt0.S */
|
stsp/newlib-ia16
| 2,323
|
libgloss/m68hc11/sci-inout.S
|
/* M68HC11/M68HC12 serial line operations
* Copyright (C) 1999, 2001, 2003, 2004 Stephane Carrez (stcarrez@nerim.fr)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifdef __HAVE_SHORT_INT__
.mode mshort
#else
.mode mlong
#endif
#if defined(__USE_RTC__)
.macro ret
#if defined(mc68hc12)
rtc
#else
jmp __return_32
#endif
.endm
#else
.macro ret
rts
.endm
#endif
#ifdef mc68hc12
SC0CR1 = 0xC2
SC0CR2 = 0xC3
SC0SR1 = 0xC4
SC0DRL = 0xC7
SC0BD = 0xC0
.sect .data
.globl _m68hc12_ports
_m68hc12_ports: .word 0
.sect .text
.globl outbyte
;;;
;;; int outbyte(char c);
;;;
;;; B : Character to send
;;;
outbyte:
bsr _sci_init
L1:
ldaa SC0SR1,x
bge L1
stab SC0DRL,x
ldab SC0CR2,x
orab #0x8
stab SC0CR2,x
ret
.sect .text
.globl inbyte
;;;
;;; char inbyte(void);
;;;
inbyte:
bsr _sci_init
ldaa SC0SR1,x
bita #0x20
beq inbyte
ldab SC0CR2,x
ret
.globl _sci_init
.sect .text
_sci_init:
ldx _m68hc12_ports
beq do_init
dex
rts
do_init:
ldx #0x1
stx _m68hc12_ports
dex
ldd #26
std SC0BD,x
ldaa #0
staa SC0CR1,x
ldaa #0xC
staa SC0CR2,x
rts
#else
BAUD = 0x2b
SCCR1= 0x2c
SCCR2= 0x2d
SCSR = 0x2e
SCDR = 0x2f
.sect .data
.globl _m68hc11_ports
_m68hc11_ports: .word 0
.sect .text
.globl outbyte
;;;
;;; int outbyte(char c);
;;;
;;; B : Character to send
;;;
outbyte:
bsr _sci_init
L1:
ldaa SCSR,x
bge L1
stab SCDR,x
ldab SCCR2,x
orab #0x8
stab SCCR2,x
ret
.sect .text
.globl inbyte
;;;
;;; char inbyte(void);
;;;
inbyte:
bsr _sci_init
ldaa SCSR,x
bita #0x20
beq inbyte
ldab SCDR,x
ret
.globl _sci_init
.sect .text
_sci_init:
ldx _m68hc11_ports
beq do_init
rts
do_init:
ldx #0x1000
stx _m68hc11_ports
ldaa #0x30
staa BAUD,x
clra
staa SCCR1,x
ldaa #0xC
staa SCCR2,x
rts
#endif
|
stsp/newlib-ia16
| 2,090
|
libgloss/m68hc11/crt0.S
|
/* Startup code for M68HC11/M68HC12.
* Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
;-----------------------------------------
; startup code
;-----------------------------------------
.file "crt0.s"
;;
;;
;; The linker concatenate the .install* sections in the following order:
;;
;; .install0 Setup the stack pointer
;; .install1 Place holder for applications
;; .install2 Optional installation of data section in memory
;; .install3 Place holder for applications
;; .install4 Invokes the main
;;
.sect .install0,"ax",@progbits
.globl _start
_start:
;;
;; At this step, the stack is not initialized and interrupts are masked.
;; Applications only have 64 cycles to initialize some registers.
;;
;; To have a generic/configurable startup, initialize the stack to
;; the end of some memory region. The _stack symbol is defined by
;; the linker.
;;
lds #_stack
.sect .install2,"ax",@progbits
;;
;; Call a specific initialization operation. The default is empty.
;; It can be overriden by applications. It is intended to initialize
;; the 68hc11 registers. Function prototype is:
;;
;; int __premain(void);
;;
jsr __premain
;;
;;
;;
.sect .install4,"ax",@progbits
jsr main
fatal:
jsr exit
bra fatal
;-----------------------------------------
; end startup code
;-----------------------------------------
;; Force loading of data section mapping and bss clear
.globl __map_data_section
.globl __init_bss_section
|
stsp/newlib-ia16
| 3,896
|
libgloss/arm/linux-syscalls0.S
|
/** Linux system call interface for the ARM processor.
* Written by Shaun Jackman <sjackman@gmail.com>.
* Copyright 2006 Pathway Connectivity
*
* Permission to use, copy, modify, and distribute this software
* is freely granted, provided that this notice is preserved.
*/
#include "linux-syscall.h"
#if __thumb__
# define FUNC(name) .type name, %function; .thumb_func; name:
# define SET .thumb_set
#else
# define FUNC(name) .type name, %function; name:
# define SET .set
#endif
#define GLOBAL(name) .global name; FUNC(name)
#define SIZE(name) .size name, .-name
# define SYSCALL4(name) \
GLOBAL(_ ## name); \
swi #SYS_ ## name; \
b _set_errno; \
SIZE(_ ## name)
# define SYSCALL6(name) \
GLOBAL(_ ## name); \
push { r4 - r5 }; \
ldr r4, [sp, #8]; \
ldr r5, [sp, #12]; \
swi #SYS_ ## name; \
pop { r4 - r5 }; \
b _set_errno; \
SIZE(_ ## name)
#define SYSCALL0(name) SYSCALL3(name)
#define SYSCALL3(name) SYSCALL4(name)
#define SYSCALL1(name) SYSCALL3(name)
#define SYSCALL2(name) SYSCALL3(name)
#define SYSCALL5(name) SYSCALL6(name)
SYSCALL1(alarm)
SYSCALL1(brk)
SYSCALL1(chdir)
SYSCALL2(chmod)
SYSCALL3(chown)
SYSCALL1(close)
SYSCALL1(dup)
SYSCALL2(dup2)
SYSCALL3(execve)
SYSCALL1(exit)
SYSCALL3(fcntl)
SYSCALL2(fstat)
SYSCALL2(ftruncate)
SYSCALL3(getdents)
SYSCALL0(getegid)
SYSCALL0(geteuid)
SYSCALL0(getgid)
SYSCALL2(getgroups)
SYSCALL1(getpgid)
SYSCALL0(getpgrp)
SYSCALL0(getpid)
SYSCALL0(getuid)
SYSCALL2(gettimeofday)
SYSCALL3(ioctl)
SYSCALL2(kill)
SYSCALL3(lchown)
SYSCALL2(link)
SYSCALL3(lseek)
SYSCALL2(lstat)
SYSCALL2(mkdir)
SYSCALL3(mknod)
SYSCALL2(nanosleep)
SYSCALL3(open)
SYSCALL0(pause)
SYSCALL1(pipe)
SYSCALL3(read)
SYSCALL3(readlink)
SYSCALL4(reboot)
SYSCALL1(rmdir)
SYSCALL5(select)
SYSCALL2(setpgid)
SYSCALL1(setgid)
SYSCALL0(setsid)
SYSCALL1(setuid)
SYSCALL3(sigprocmask)
SYSCALL2(socketcall)
SYSCALL2(stat)
SYSCALL1(stime)
SYSCALL2(symlink)
SYSCALL1(sync)
SYSCALL1(sysinfo)
SYSCALL1(times)
SYSCALL2(truncate)
SYSCALL1(umask)
SYSCALL1(uname)
SYSCALL1(unlink)
SYSCALL2(utime)
SYSCALL0(vfork)
SYSCALL4(wait4)
SYSCALL3(write)
#define ALIAS(name) .GLOBAL name; SET name, _ ## name
ALIAS(alarm)
ALIAS(chdir)
ALIAS(chmod)
ALIAS(chown)
ALIAS(dup)
ALIAS(dup2)
ALIAS(ftruncate)
ALIAS(getdents)
ALIAS(getegid)
ALIAS(geteuid)
ALIAS(getgid)
ALIAS(getgroups)
ALIAS(getpgid)
ALIAS(getpgrp)
ALIAS(getuid)
ALIAS(ioctl)
ALIAS(lchown)
ALIAS(lstat)
ALIAS(mkdir)
ALIAS(mknod)
ALIAS(nanosleep)
ALIAS(pause)
ALIAS(pipe)
ALIAS(readlink)
ALIAS(rmdir)
ALIAS(select)
ALIAS(setgid)
ALIAS(setpgid)
ALIAS(setsid)
ALIAS(setuid)
ALIAS(sigprocmask)
ALIAS(stime)
ALIAS(symlink)
ALIAS(sync)
ALIAS(sysinfo)
ALIAS(truncate)
ALIAS(umask)
ALIAS(uname)
ALIAS(utime)
ALIAS(vfork)
ALIAS(wait4)
# define SOCKETCALL(name, NAME) \
GLOBAL(name); \
push { r0 - r3 }; \
mov r0, #SYS_ ## NAME; \
b _socketcall_tail; \
SIZE(name)
FUNC(_socketcall_tail)
mov r1, sp
push { lr }
bl _socketcall
pop { r3 }
add sp, #16
#if defined(__ARM_ARCH_2__) || defined(__ARM_ARCH_3__) \
|| defined(__ARM_ARCH_3M__) || defined(__ARM_ARCH_4__)
mov pc, r3
#else
bx r3
#endif
SIZE(_socketcall_tail)
#define SOCKETCALL2(name, NAME) SOCKETCALL(name, NAME)
#define SOCKETCALL3(name, NAME) SOCKETCALL(name, NAME)
#define SOCKETCALL4(name, NAME) SOCKETCALL(name, NAME)
#define SOCKETCALL5(name, NAME) SOCKETCALL(name, NAME)
#define SOCKETCALL6(name, NAME) SOCKETCALL(name, NAME)
SOCKETCALL3(accept, ACCEPT)
SOCKETCALL3(bind, BIND)
SOCKETCALL3(connect, CONNECT)
SOCKETCALL3(getpeername, GETPEERNAME)
SOCKETCALL3(getsockname, GETSOCKNAME)
SOCKETCALL5(getsockopt, GETSOCKOPT)
SOCKETCALL2(listen, LISTEN)
SOCKETCALL4(recv, RECV)
SOCKETCALL6(recvfrom, RECVFROM)
SOCKETCALL3(recvmsg, RECVMSG)
SOCKETCALL4(send, SEND)
SOCKETCALL3(sendmsg, SENDMSG)
SOCKETCALL6(sendto, SENDTO)
SOCKETCALL5(setsockopt, SETSOCKOPT)
SOCKETCALL2(shutdown, SHUTDOWN)
SOCKETCALL3(socket, SOCKET)
SOCKETCALL4(socketpair, SOCKETPAIR)
|
stsp/newlib-ia16
| 13,399
|
libgloss/arm/crt0.S
|
#include "newlib.h"
#include "arm.h"
#include "swi.h"
/* ANSI concatenation macros. */
#define CONCAT(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
#ifdef __USER_LABEL_PREFIX__
#define FUNCTION( name ) CONCAT (__USER_LABEL_PREFIX__, name)
#else
#error __USER_LABEL_PREFIX is not defined
#endif
#ifdef HAVE_INITFINI_ARRAY
#define _init __libc_init_array
#define _fini __libc_fini_array
#endif
#if defined(__ARM_EABI__) && defined(__thumb__) && !defined(__thumb2__)
/* For Thumb1 we need to force the architecture to be sure that we get the
correct attributes on the object file; otherwise the assembler will get
confused and mark the object as being v6T2. */
#if defined(__ARM_ARCH_4T__)
.arch armv4t
#elif defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
/* Nothing in this object requires higher than v5. */
.arch armv5t
#elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
|| defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
|| defined(__ARM_ARCH_6ZK__)
/* Nothing in this object requires higher than v6. */
.arch armv6
#elif defined(__ARM_ARCH_6M__)
#ifdef ARM_RDP_MONITOR
/* Object file uses SVC, so mark as v6s-m. */
.arch armv6s-m
#else
.arch armv6-m
#endif
#endif
#endif
/* .text is used instead of .section .text so it works with arm-aout too. */
.text
.syntax unified
#ifdef PREFER_THUMB
.thumb
.macro FUNC_START name
.global \name
.thumb_func
\name:
.endm
#else
.code 32
.macro FUNC_START name
.global \name
\name:
.endm
#endif
.macro indirect_call reg
#ifdef HAVE_CALL_INDIRECT
blx \reg
#else
mov lr, pc
mov pc, \reg
#endif
.endm
.align 0
FUNC_START _mainCRTStartup
FUNC_START _start
#if defined(__ELF__) && !defined(__USING_SJLJ_EXCEPTIONS__)
/* Annotation for EABI unwinding tables. */
.fnstart
#endif
/* __ARM_ARCH_PROFILE is defined from GCC 4.8 onwards, however __ARM_ARCH_7A
has been defined since 4.2 onwards, which is when v7-a support was added
and hence 'A' profile support was added in the compiler. Allow for this
file to be built with older compilers. We only call this for A profile
cores. */
#if defined (__ARM_ARCH_7A__) || (__ARM_ARCH_PROFILE == 'A')
/* The init hook does not use the stack and is called before the stack has been set up. */
#ifdef ARM_RDI_MONITOR
bl _rdimon_hw_init_hook
.weak FUNCTION (_rdimon_hw_init_hook)
#endif
#endif
/* Start by setting up a stack */
#ifdef ARM_RDP_MONITOR
/* Issue Demon SWI to read stack info */
swi SWI_GetEnv /* Returns command line in r0 */
mov sp,r1 /* and the highest memory address in r1 */
/* stack limit is at end of data */
/* allow slop for stack overflow handling and small frames */
#ifdef THUMB1_ONLY
ldr r0, .LC2
adds r0, #128
adds r0, #128
mov sl, r0
#else
ldr sl, .LC2
add sl, sl, #256
#endif
#else
#ifdef ARM_RDI_MONITOR
/* Issue Angel SWI to read stack info */
movs r0, #AngelSWI_Reason_HeapInfo
adr r1, .LC0 /* point at ptr to 4 words to receive data */
#ifdef THUMB_VXM
bkpt AngelSWI
#elif defined(__thumb2__)
/* We are in thumb mode for startup on armv7 architectures. */
AngelSWIAsm AngelSWI
#else
/* We are always in ARM mode for startup on pre armv7 archs. */
AngelSWIAsm AngelSWI_ARM
#endif
ldr r0, .LC0 /* point at values read */
/* Set __heap_limit. */
ldr r1, [r0, #4]
ldr r2, =__heap_limit
str r1, [r2]
ldr r1, [r0, #0]
cmp r1, #0
bne .LC32
/* If the heap base value [r0, #0] is 0 then the heap base is actually
at the end of program data (i.e. __end__). See:
http://infocenter.arm.com/help/topic/com.arm.doc.dui0471-/Bacbefaa.html
for more information. */
ldr r1, .LC31
str r1, [r0, #0]
.LC32:
ldr r1, [r0, #8]
ldr r2, [r0, #12]
/* We skip setting sp/sl if 0 returned from semihosting.
- According to semihosting docs, if 0 returned from semihosting,
the system was unable to calculate the real value, so it's ok
to skip setting sp/sl to 0 here.
- Considering M-profile processors, We might want to initialize
sp by the first entry of vector table and return 0 to SYS_HEAPINFO
semihosting call, which will be skipped here. */
cmp r1, #0
beq .LC26
mov sp, r1
.LC26:
cmp r2, #0
beq .LC27
/* allow slop for stack overflow handling and small frames */
#ifdef THUMB1_ONLY
adds r2, #128
adds r2, #128
mov sl, r2
#else
add sl, r2, #256
#endif
.LC27:
#else
/* Set up the stack pointer to a fixed value */
/* Changes by toralf:
- Allow linker script to provide stack via __stack symbol - see
defintion of .Lstack
- Provide "hooks" that may be used by the application to add
custom init code - see .Lhwinit and .Lswinit
- Go through all execution modes and set up stack for each of them.
Loosely based on init.s from ARM/Motorola example code.
Note: Mode switch via CPSR is not allowed once in non-privileged
mode, so we take care not to enter "User" to set up its sp,
and also skip most operations if already in that mode. */
ldr r3, .Lstack
cmp r3, #0
#ifdef __thumb2__
it eq
#endif
#ifdef THUMB1_ONLY
bne .LC28
ldr r3, .LC0
.LC28:
#else
ldreq r3, .LC0
#endif
/* Note: This 'mov' is essential when starting in User, and ensures we
always get *some* sp value for the initial mode, even if we
have somehow missed it below (in which case it gets the same
value as FIQ - not ideal, but better than nothing.) */
mov sp, r3
#ifdef PREFER_THUMB
/* XXX Fill in stack assignments for interrupt modes. */
#else
mrs r2, CPSR
tst r2, #0x0F /* Test mode bits - in User of all are 0 */
beq .LC23 /* "eq" means r2 AND #0x0F is 0 */
msr CPSR_c, #0xD1 /* FIRQ mode, interrupts disabled */
mov sp, r3
sub sl, sp, #0x1000 /* This mode also has its own sl (see below) */
mov r3, sl
msr CPSR_c, #0xD7 /* Abort mode, interrupts disabled */
mov sp, r3
sub r3, r3, #0x1000
msr CPSR_c, #0xDB /* Undefined mode, interrupts disabled */
mov sp, r3
sub r3, r3, #0x1000
msr CPSR_c, #0xD2 /* IRQ mode, interrupts disabled */
mov sp, r3
sub r3, r3, #0x2000
msr CPSR_c, #0xD3 /* Supervisory mode, interrupts disabled */
mov sp, r3
sub r3, r3, #0x8000 /* Min size 32k */
bic r3, r3, #0x00FF /* Align with current 64k block */
bic r3, r3, #0xFF00
str r3, [r3, #-4] /* Move value into user mode sp without */
ldmdb r3, {sp}^ /* changing modes, via '^' form of ldm */
orr r2, r2, #0xC0 /* Back to original mode, presumably SVC, */
msr CPSR_c, r2 /* with FIQ/IRQ disable bits forced to 1 */
#endif
.LC23:
/* Setup a default stack-limit in-case the code has been
compiled with "-mapcs-stack-check". Hard-wiring this value
is not ideal, since there is currently no support for
checking that the heap and stack have not collided, or that
this default 64k is enough for the program being executed.
However, it ensures that this simple crt0 world will not
immediately cause an overflow event: */
#ifdef THUMB1_ONLY
movs r2, #64
lsls r2, r2, #10
subs r2, r3, r2
mov sl, r2
#else
sub sl, r3, #64 << 10 /* Still assumes 256bytes below sl */
#endif
#endif
#endif
/* Zero the memory in the .bss section. */
movs a2, #0 /* Second arg: fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr a1, .LC1 /* First arg: start of memory block */
ldr a3, .LC2
subs a3, a3, a1 /* Third arg: length of block */
#if __thumb__ && !defined(PREFER_THUMB)
/* Enter Thumb mode.... */
add a4, pc, #1 /* Get the address of the Thumb block */
bx a4 /* Go there and start Thumb decoding */
.code 16
.global __change_mode
.thumb_func
__change_mode:
#endif
bl FUNCTION (memset)
#if !defined (ARM_RDP_MONITOR) && !defined (ARM_RDI_MONITOR)
/* Changes by toralf: Taken from libgloss/m68k/crt0.S
* initialize target specific stuff. Only execute these
* functions it they exist.
*/
ldr r3, .Lhwinit
cmp r3, #0
beq .LC24
indirect_call r3
.LC24:
ldr r3, .Lswinit
cmp r3, #0
beq .LC25
indirect_call r3
.LC25:
movs r0, #0 /* no arguments */
movs r1, #0 /* no argv either */
#else
/* Need to set up standard file handles */
bl FUNCTION (initialise_monitor_handles)
#ifdef ARM_RDP_MONITOR
swi SWI_GetEnv /* sets r0 to point to the command line */
movs r1, r0
#else
movs r0, #AngelSWI_Reason_GetCmdLine
adr r1, .LC30 /* Space for command line */
AngelSWIAsm AngelSWI
ldr r1, .LC30
#endif
/* Parse string at r1 */
movs r0, #0 /* count of arguments so far */
/* Push a NULL argument onto the end of the list. */
#ifdef __thumb__
push {r0}
#else
stmfd sp!, {r0}
#endif
.LC10:
/* Skip leading blanks */
#ifdef __thumb__
ldrb r3, [r1]
adds r1, #1
#else
ldrb r3, [r1], #1
#endif
cmp r3, #0
beq .LC12
cmp r3, #' '
beq .LC10
/* See whether we are scanning a string */
cmp r3, #'"'
#ifdef __thumb__
beq .LC20
cmp r3, #'\''
bne .LC21
.LC20:
movs r2, r3
b .LC22
.LC21:
movs r2, #' ' /* terminator type */
subs r1, r1, #1 /* adjust back to point at start char */
.LC22:
#else
cmpne r3, #'\''
moveq r2, r3
movne r2, #' ' /* terminator type */
subne r1, r1, #1 /* adjust back to point at start char */
#endif
/* Stack a pointer to the current argument */
#ifdef __thumb__
push {r1}
#else
stmfd sp!, {r1}
#endif
adds r0, r0, #1
.LC11:
#ifdef __thumb__
ldrb r3, [r1]
adds r1, #1
#else
ldrb r3, [r1], #1
#endif
cmp r3, #0
beq .LC12
cmp r2, r3 /* reached terminator? */
bne .LC11
movs r2, #0
subs r3, r1, #1
strb r2, [r3] /* terminate the arg string */
b .LC10
.LC12:
mov r1, sp /* point at stacked arg pointers */
/* We've now got the stacked args in order reverse the */
#ifdef __thumb__
movs r2, r0
lsls r2, #2
add r2, sp
mov r3, sp
.LC15: cmp r2, r3
bls .LC14
subs r2, #4
ldr r4, [r2]
ldr r5, [r3]
str r5, [r2]
str r4, [r3]
adds r3, #4
b .LC15
.LC14:
/* Ensure doubleword stack alignment. */
mov r4, sp
movs r5, #7
bics r4, r5
mov sp, r4
#else
add r2, sp, r0, LSL #2 /* End of args */
mov r3, sp /* Start of args */
.LC13: cmp r2, r3
ldrhi r4,[r2, #-4] /* Reverse ends of list */
ldrhi r5, [r3]
strhi r5, [r2, #-4]!
strhi r4, [r3], #4
bhi .LC13
/* Ensure doubleword stack alignment. */
bic sp, sp, #7
#endif
#endif
#ifdef __USES_INITFINI__
/* Some arm/elf targets use the .init and .fini sections
to create constructors and destructors, and for these
targets we need to call the _init function and arrange
for _fini to be called at program exit. */
movs r4, r0
movs r5, r1
#ifdef _LITE_EXIT
/* Make reference to atexit weak to avoid unconditionally pulling in
support code. Refer to comments in __atexit.c for more details. */
.weak FUNCTION(atexit)
ldr r0, .Latexit
cmp r0, #0
beq .Lweak_atexit
#endif
ldr r0, .Lfini
bl FUNCTION (atexit)
.Lweak_atexit:
bl FUNCTION (_init)
movs r0, r4
movs r1, r5
#endif
bl FUNCTION (main)
bl FUNCTION (exit) /* Should not return. */
#if __thumb__ && !defined(PREFER_THUMB)
/* Come out of Thumb mode. This code should be redundant. */
mov a4, pc
bx a4
.code 32
.global change_back
change_back:
/* Halt the execution. This code should never be executed. */
/* With no debug monitor, this probably aborts (eventually).
With a Demon debug monitor, this halts cleanly.
With an Angel debug monitor, this will report 'Unknown SWI'. */
swi SWI_Exit
#endif
/* For Thumb, constants must be after the code since only
positive offsets are supported for PC relative addresses. */
.align 0
.LC0:
#ifdef ARM_RDI_MONITOR
.word HeapBase
#else
#ifndef ARM_RDP_MONITOR
/* Changes by toralf: Provide alternative "stack" variable whose value
may be defined externally; .Lstack will be used instead of .LC0 if
it points to a non-0 value. Also set up references to "hooks" that
may be used by the application to provide additional init code. */
#ifdef __pe__
.word 0x800000
#else
.word 0x80000 /* Top of RAM on the PIE board. */
#endif
.Lstack:
.word __stack
.Lhwinit:
.word FUNCTION (hardware_init_hook)
.Lswinit:
.word FUNCTION (software_init_hook)
/* Set up defaults for the above variables in the form of weak symbols
- so that application will link correctly, and get value 0 in
runtime (meaning "ignore setting") for the variables, when the user
does not provide the symbols. (The linker uses a weak symbol if,
and only if, a normal version of the same symbol isn't provided
e.g. by a linker script or another object file.) */
.weak __stack
.weak FUNCTION (hardware_init_hook)
.weak FUNCTION (software_init_hook)
#endif
#endif
#if defined(__ELF__) && !defined(__USING_SJLJ_EXCEPTIONS__)
/* Protect against unhandled exceptions. */
.cantunwind
.fnend
#endif
.LC1:
.word __bss_start__
.LC2:
.word __bss_end__
#ifdef __USES_INITFINI__
#ifdef _LITE_EXIT
.Latexit:
.word FUNCTION(atexit)
/* Weak reference _fini in case of lite exit. */
.weak FUNCTION(_fini)
#endif
.Lfini:
.word FUNCTION(_fini)
#endif
#ifdef ARM_RDI_MONITOR
.LC30:
.word CommandLine
.word 255
.LC31:
.word __end__
/* Workspace for Angel calls. */
.data
/* Data returned by monitor SWI. */
.global __stack_base__
HeapBase: .word 0
HeapLimit: .word 0
__stack_base__: .word 0
StackLimit: .word 0
CommandLine: .space 256,0 /* Maximum length of 255 chars handled. */
#endif
#ifdef __pe__
.section .idata$3
.long 0,0,0,0,0,0,0,0
#endif
|
stsp/newlib-ia16
| 2,555
|
libgloss/arm/redboot-crt0.S
|
#include "arm.h"
.file "crt0.S"
#define XGLUE(a,b) a##b
#define GLUE(a,b) XGLUE(a,b)
#ifdef __USER_LABEL_PREFIX__
#define SYM_NAME( name ) GLUE (__USER_LABEL_PREFIX__, name)
#else
#error __USER_LABEL_PREFIX is not defined
#endif
.text
.syntax unified
/* Setup the assembly entry point. */
#ifdef PREFER_THUMB
.macro FUNC_START name
.global \name
.thumb_func
\name:
.endm
.thumb
#else
.macro FUNC_START name
.global \name
\name:
.endm
.code 32
#endif
FUNC_START SYM_NAME(_start)
/* Unnecessary to set fp for v6-m/v7-m, which don't support
ARM state. */
#if __ARM_ARCH_ISA_ARM
mov fp, #0 /* Null frame pointer. */
#endif
movs r7, #0 /* Null frame pointer for Thumb. */
/* Enable interrupts for gdb debugging. */
#ifdef PREFER_THUMB
cpsie if
#else
mrs r0, cpsr
bic r0, r0, #0xC0
msr cpsr, r0
#endif
movs a2, #0 /* Second arg: fill value. */
ldr a1, .LC1 /* First arg: start of memory block. */
ldr a3, .LC2
subs a3, a3, a1 /* Third arg: length of block. */
#ifdef GCRT0
/* Zero out the bss without using memset.
Using memset is bad because it may be instrumented for
profiling, but at this point, the profiling data structures
have not been set up.
FIXME: This loop could be a lot more efficient. */
subs a3, a3, #0
beq 2f
1: strb a2, [a1]
subs a3, a3, #1
add a1, a1, #1
bne 1b
2:
/* Nothing to left to clear. */
#endif
#if __thumb__ && !defined(PREFER_THUMB)
/* Enter Thumb mode. */
add a4, pc, #1 /* Get the address of the Thumb block. */
bx a4 /* Go there and start Thumb decoding. */
.code 16
.global __change_mode
.thumb_func
__change_mode:
#endif
#ifndef GCRT0
bl SYM_NAME(memset)
#endif
bl SYM_NAME(__get_memtop)
subs r0, r0, #32
mov sp, r0
#ifdef __USES_INITFINI__
/* Some arm/elf targets use the .init and .fini sections
to create constructors and destructors, and for these
targets we need to call the _init function and arrange
for _fini to be called at program exit. */
ldr r0, .Lfini
bl SYM_NAME (atexit)
bl SYM_NAME (_init)
#endif
movs a1, #0
ldr a2, .LC3
movs a3, a2
bl SYM_NAME(main)
1: bl SYM_NAME(exit)
b 1b
.align 2
.LC1:
.word __bss_start__
.LC2:
.word __bss_end__
.LC3:
.word 0
#ifdef __USES_INITFINI__
.Lfini:
.word SYM_NAME(_fini)
#endif
#if 0
#ifdef __thumb__
.code 16
#endif
.global SYM_NAME(__syscall)
#ifdef __thumb__
.thumb_func
#else
.align 4
#endif
SYM_NAME(__syscall):
mov r12, lr
#ifdef __thumb__
swi 0x18
#else
swi 0x180001
#endif
mov pc, r12
#endif
|
stsp/newlib-ia16
| 5,028
|
libgloss/arm/trap.S
|
#include "arm.h"
/* Run-time exception support */
#ifndef PREFER_THUMB
#include "swi.h"
/* .text is used instead of .section .text so it works with arm-aout too. */
.text
.align 0
.global __rt_stkovf_split_big
.global __rt_stkovf_split_small
/* The following functions are provided for software stack checking.
If hardware stack-checking is being used then the code can be
compiled without the PCS entry checks, and simply rely on VM
management to extend the stack for a thread.
The stack extension event occurs when the PCS function entry code
would result in a stack-pointer beneath the stack-limit register
value. The system relies on the following map:
+-----------------------------------+ <-- end of stack block
| ... |
| ... |
| active stack |
| ... | <-- sp (stack-pointer) somewhere in here
| ... |
+-----------------------------------+ <-- sl (stack-limit)
| stack-extension handler workspace |
+-----------------------------------+ <-- base of stack block
The "stack-extension handler workspace" is an amount of memory in
which the stack overflow support code must execute. It must be
large enough to deal with the worst case path through the extension
code. At the moment the compiler expects this to be AT LEAST
256bytes. It uses this fact to code functions with small local
data usage within the overflow space.
In a true target environment We may need to increase the space
between sl and the true limit to allow for the stack extension
code, SWI handlers and for undefined instruction handlers of the
target environment. */
__rt_stkovf_split_small:
mov ip,sp @ Ensure we can calculate the stack required
@ and fall through to...
__rt_stkovf_split_big:
@ in: sp = current stack-pointer (beneath stack-limit)
@ sl = current stack-limit
@ ip = low stack point we require for the current function
@ lr = return address into the current function
@ fp = frame-pointer
@ original sp --> +----------------------------------+
@ | pc (12 ahead of PCS entry store) |
@ current fp ---> +----------------------------------+
@ | lr (on entry) pc (on exit) |
@ +----------------------------------+
@ | sp ("original sp" on entry) |
@ +----------------------------------+
@ | fp (on entry to function) |
@ +----------------------------------+
@ | |
@ | ..argument and work registers.. |
@ | |
@ current sp ---> +----------------------------------+
@
@ The "current sl" is somewhere between "original sp" and "current sp"
@ but above "true sl". The "current sl" should be at least 256bytes
@ above the "true sl". The 256byte stack guard should be large enough
@ to deal with the worst case function entry stacking (160bytes) plus
@ the stack overflow handler stacking requirements, plus the stack
@ required for the memory allocation routines.
@
@ Normal PCS entry (before stack overflow check) can stack 16
@ standard registers (64bytes) and 8 floating point registers
@ (96bytes). This gives a minimum stack guard of 160bytes (excluding
@ the stack required for the code). (Actually only a maximum of
@ 14standard registers are ever stacked on entry to a function).
@
@ NOTE: Structure returns are performed by the caller allocating a
@ dummy space on the stack and passing in a "phantom" arg1 into
@ the function. This means that we do not need to worry about
@ preserving the stack under "sp" even on function return.
@
@ Code should never poke values beneath sp. The sp register
@ should always be "dropped" first to cover the data. This
@ protects the data against any events that may try and use
@ the stack.
SUB ip, sp, ip @ extra stack required for function
@ Add stack extension code here. If desired a new stack chunk
@ can be allocated, and the register state updated suitably.
@ We now know how much extra stack the function requires.
@ Terminate the program for the moment:
swi SWI_Exit
#endif
|
stsp/newlib-ia16
| 3,872
|
libgloss/xstormy16/crt0_stub.s
|
# XSTORMY16 startup code for GDB stub.
# CPU Data for Sanyo EVA debugger at 0x7F00
.section .cpudata,"ax"
.byte 0x00,0x02,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x44,0x35,0x39,0x52,0x30,0x30,0x30,0x30,0x2E,0x4F,0x50,0x54,0x00,0x00,0x00,0x00
.byte 0x4c,0x43,0x35,0x39,0x52,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x80,0x00,0x20,0x48,0x00,0x00,0x00
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x20,0x01,0x12,0x31,0x23,0x59
# Interrupt vectors at 0x8000.
.section .int_vec,"ax"
.global _start
.align 1
_start:
;; Reset, watchdog timer interrupt
jmpf _int_reset
;; base timer interrupt
jmpf _int_basetimer
;; timer 0
jmpf _int_timer0
;; timer 1
jmpf _int_timer1
;; SIO0 interrupt
jmpf _int_sio0
;; SIO1 interrupt
jmpf _int_sio1
;; port0 interrupt
jmpf _int_port0
;; port1 interrupt
jmpf _int_port1
.org 0x80
;; sys interrupt (0x8080)
jmpf _int_sys
;; Application void write(char *buf, int nbytes)
;; This jmps to a stub function to packetize the buf for GDB
jmpf gdb_write
;; Application int read(char *buf, int nbytes)
jmpf gdb_read
.text
# Reset code, set up memory and call main.
_int_reset:
;; Set up the application stack pointer.
mov sp,#0x002
;; Zero the data space
mov r0,#_edata
mov r1,#_end
mov r2,#0
0: mov.w (r0++),r2
blt r0,r1,0b
;; Init the UART
callf uart_init
;; Turn on illegal insn trap
mov r0,r14
set1 r0,#11
mov r14,r0
mov.b 0x7f08,#0x11
mov.b 0x7f09,#0x10
;; "breakpoint" sends us into stub.
0:
.hword 0x0006
br 0b
_int_sys:
push r13
mov r13,#registers
mov.w (r13++),r0
mov.w (r13++),r1
mov.w (r13++),r2
mov.w (r13++),r3
mov.w (r13++),r4
mov.w (r13++),r5
mov.w (r13++),r6
mov.w (r13++),r7
mov r0,r8
mov.w (r13++),r0
mov r0,r9
mov.w (r13++),r0
mov r0,r10
mov.w (r13++),r0
mov r0,r11
mov.w (r13++),r0
mov r0,r12
mov.w (r13++),r0
pop r0
mov.w (r13++),r0 ; R13
pop r0
mov.w (r13++),r0 ; PSW
mov r0,r15
sub r0,#4
mov.w (r13++),r0 ; SP
pop r0
pop r1
mov.w (r13++),r1 ; PCL
mov.w (r13++),r0 ; PCH
;; switch to stub stack and invoke stub
mov sp,#0x700
callf handle_exception
mov r0,#registers+34
mov.w r1,(r0) ; PCH
mov.w r2,(--r0) ; PCL
mov.w r3,(--r0) ; SP
mov r15,r3
push r2
push r1
mov.w r1,(--r0) ; PSW
push r1
mov.w r1,(--r0)
mov r13,r1
mov.w r1,(--r0)
mov r12,r1
mov.w r1,(--r0)
mov r11,r1
mov.w r1,(--r0)
mov r10,r1
mov.w r1,(--r0)
mov r9,r1
mov.w r1,(--r0)
mov r8,r1
mov.w r7,(--r0)
mov.w r6,(--r0)
mov.w r5,(--r0)
mov.w r4,(--r0)
mov.w r3,(--r0)
mov.w r2,(--r0)
mov.w r1,(--r0)
mov.w r0,(--r0)
iret
1: .size _int_sys,1b-_int_sys
|
stsp/newlib-ia16
| 2,388
|
libgloss/xstormy16/syscalls.S
|
# xstormy16 system calls for the simulator
#include <syscall.h>
.text
.globl _exit
_exit:
mov r1,#SYS_exit
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size exit,0b-_exit
.globl _open
_open:
mov r1,#SYS_open
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size open,0b-_open
.globl _close
_close:
mov r1,#SYS_close
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size close,0b-_close
.globl _read
_read:
mov r1,#SYS_read
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size read,0b-_read
.globl _write
_write:
mov r1,#SYS_write
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size write,0b-_write
.globl _lseek
_lseek:
mov r1,#SYS_lseek
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size lseek,0b-_lseek
.globl _unlink
_unlink:
mov r1,#SYS_unlink
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size unlink,0b-_unlink
.globl _getpid
_getpid:
mov r1,#SYS_getpid
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size getpid,0b-_getpid
.globl _kill
_kill:
mov r1,#SYS_kill
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size kill,0b-_kill
.globl _fstat
_fstat:
mov r1,#SYS_fstat
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size fstat,0b-_fstat
.globl _chdir
_chdir:
mov r1,#SYS_chdir
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size chdir,0b-_chdir
.globl _stat
_stat:
mov r1,#SYS_stat
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size stat,0b-_stat
.globl _chmod
_chmod:
mov r1,#SYS_chmod
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size chmod,0b-_chmod
.globl _utime
_utime:
mov r1,#SYS_utime
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size utime,0b-_utime
.globl _time
_time:
mov r1,#SYS_time
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size time,0b-_time
.globl _gettimeofday
_gettimeofday:
mov r1,#SYS_gettimeofday
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size gettimeofday,0b-_gettimeofday
.globl _times
_times:
mov r1,#SYS_times
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size times,0b-_times
.globl _link
_link:
mov r1,#SYS_link
.hword 0x0001
bnz r1,#0,syscall_error
ret
0: .size link,0b-_link
syscall_error:
# Return value for the syscall is in r2. Save it here, as
# _errno will overwrite it with the address of the errno
# variable. r0 is the errno.
push r2
push r0
callf __errno
pop r0
mov.w (r2),r0
pop r2
ret
0: .size syscall_error,0b-syscall_error
|
stsp/newlib-ia16
| 2,133
|
libgloss/xstormy16/crt0.s
|
# XSTORMY16 startup code
# Interrupt vectors at 0x8000.
.section .int_vec,"ax"
.global _start
.align 1
_start:
;; Reset, watchdog timer interrupt
jmpf _int_reset
;; base timer interrupt
jmpf _int_basetimer
;; timer 0
jmpf _int_timer0
;; timer 1
jmpf _int_timer1
;; SIO0 interrupt
jmpf _int_sio0
;; SIO1 interrupt
jmpf _int_sio1
;; port0 interrupt
jmpf _int_port0
;; port1 interrupt
jmpf _int_port1
# Reset code, set up memory and call main.
.section .rodata
2: .word __rdata
.text
_int_reset:
;; Set up the stack pointer.
mov r0,#__stack
bz r0,#0,0f
mov sp,r0
0:
;; Zero the data space
mov r0,#_edata
mov r1,#_end
mov r2,#0
0: mov.w (r0++),r2
blt r0,r1,0b
;; Copy data from ROM into RAM. ROM area may be above 64k,
;; but RAM may not.
mov r1,#__data
mov r3,#_edata
mov r4,#2b
mov.w r0,(r4++)
mov.w r2,(r4)
mov r8,r2
;; If _data == _rdata there's no need to copy anything.
bnz r0,r1,0f
bz r2,#0,1f
0: movf.w r2,(r0++)
bnz r0,#0,2f
add r8,#1
2: mov.w (r1++),r2
blt r1,r3,0b
1:
;; Call hardware init routine
callf _hwinit
;; Call initialization routines
callf _init
;; Set up fini routines to be called from exit
mov r2,#@fptr(_fini)
callf atexit
;; Call main() with empty argc/argv/envp
mov r2,#0
mov r3,#0
mov r4,#0
callf main
;; Exit.
callf exit
;; Should never reach this code.
halt
1: .size _int_reset,1b-_int_reset
# Stub interrupt routines.
.globl _int_timer0
.weak _int_timer0
.globl _int_timer1
.weak _int_timer1
.globl _int_sio0
.weak _int_sio0
.globl _int_sio1
.weak _int_sio1
.globl _int_port0
.weak _int_port0
.globl _int_port1
.weak _int_port1
.globl _int_basetimer
.weak _int_basetimer
_int_timer0:
_int_timer1:
_int_sio0:
_int_sio1:
_int_port0:
_int_port1:
_int_basetimer:
iret
1: .size _int_timer0,1b-_int_timer0
# Stub hardware init
.globl _hwinit
.weak _hwinit
_hwinit:
ret
1: .size _hwinit,1b-_hwinit
# The first word in .data has address 0, so it's not a good
# idea to use it as its address conflicts with NULL.
# Place a HALT instruction there to try to catch NULL pointer
# dereferences.
.data
halt
|
stsp/newlib-ia16
| 1,610
|
libgloss/mn10200/crt0.S
|
##==============================================================================
##
## crt0.S
##
## MN10200 startup code
##
##==============================================================================
##
## Copyright (c) 1995, 1996, 1997, 1998 Cygnus Solutions
##
## The authors hereby grant permission to use, copy, modify, distribute,
## and license this software and its documentation for any purpose, provided
## that existing copyright notices are retained in all copies and that this
## notice is included verbatim in any distributions. No written agreement,
## license, or royalty fee is required for any of the authorized uses.
## Modifications to this software may be copyrighted by their authors
## and need not follow the licensing terms described here, provided that
## the new terms are clearly indicated on the first page of each file where
## they apply.
##
##------------------------------------------------------------------------------
.file "crt0.S"
##------------------------------------------------------------------------------
## Startup code
.section .text
.global _start
_start:
mov _stack,a3 # Load up the stack pointer and allocate
# our current frame.
mov _edata,a0 # Get the start/end of bss
mov _end,a1
cmp a0,a1 # If no bss, then do nothing
beqx .L0
sub d0,d0 # clear d0
.L1:
movb d0,(a0) # Clear a byte and bump pointer
add 1,a0
cmp a0,a1
bnex .L1
.L0:
jsr ___main
sub d0,d0
mov d0,d1
mov d0,(a3)
jsr _main # Call main program
jmp _exit # All done, no need to return or
# deallocate our stack.
.section .stack
_stack: .long 1
|
stsp/newlib-ia16
| 10,578
|
libgloss/mep/sim-crt0.S
|
# Copyright (c) 2003 Red Hat, Inc. All rights reserved.
#
# This copyrighted material is made available to anyone wishing to use, modify,
# copy, or redistribute it subject to the terms and conditions of the BSD
# License. This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY expressed or implied, including the implied
# warranties of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. A copy of
# this license is available at http://www.opensource.org/licenses. Any Red Hat
# trademarks that are incorporated in the source code or documentation are not
# subject to the BSD License and may only be used or replicated with the express
# permission of Red Hat, Inc.
#
# Toshiba Media Processor startup file (crt0.S)
#
# Designed for user programs running in the 0-2Mb startup section.
# Designed for the simulator by default.
#
# Exception/Interrupt Handler Locations
# CFG.EVM CFG.EVA CFG.IVA Exception INTn
## 0 - - 0x0000_0000 0x0000_0030 rom
## 1 0 0 0x0020_0000 0x0020_0030 local RAM / local RAM
## 1 1 0 0x0080_0000 0x0020_0000 ext RAM / local RAM
## 1 0 1 0x0020_0000 0x0080_0000 local RAM / ext RAM
## 1 1 1 0x0080_0000 0x0080_0030 ext RAM / ext RAM
#
# Exceptions
# Reset 0x0000_0000
# NMI 0x0000_0000+4
# RI (Base Address) +0x08
# ZDIV (Base Address) +0x0C
# BRK (Base Address) +0x10
# SWI (Base Address) +0x14
# DSP (Base Address) +0x1C
# COP (Base Address) +0x20
.set _local_ram_base, 0x00200000
.set _ext_ram_base, 0x00800000
.set _int_base_offset, 0x30
#include "syscall.h"
.macro if_bitfield_zero reg, start, length, label
ldc $0, \reg
srl $0, \start
and3 $0, $0, (1 << \length) - 1
beqz $0,\label
.endm
.macro if_bitfield_notN reg, start, length, N, label
ldc $0, \reg
srl $0, \start
and3 $0, $0, (1 << \length) - 1
bnei $0,\N, \label
.endm
.macro if_bitfield_eqN reg, start, length, N, label
ldc $0, \reg
srl $0, \start
and3 $0, $0, (1 << \length) - 1
beqi $0,\N, \label
.endm
.macro if_bitfield_ltN reg, start, length, N, label
ldc $0, \reg
srl $0, \start
and3 $0, $0, (1 << \length) - 1
blti $0,\N, \label
.endm
.section .hwinit, "ax"
# CCFG.ICSZ
if_bitfield_zero reg=$ccfg, start=16, length=7, label=.Lend_enable_icache
__enable_icache:
# set ICE(cfg[1])
ldc $1,$cfg
or3 $1,$1,2
stc $1,$cfg
nop
nop
nop
nop
nop
.Lend_enable_icache:
ret
__enable_dcache:
# CCFG.DCSZ
if_bitfield_zero reg=$ccfg, start=0, length=7, label=.Lend_enable_dcache
# set DCE(cfg[0])
ldc $1,$cfg
or3 $1,$1,1
stc $1,$cfg
nop
nop
nop
nop
nop
ret
.Lend_enable_dcache:
.text
#ifdef NOVEC
.global _reset
_reset:
#endif
.global _start
_start:
mov $fp, 0 # for unwinding
# $sp set
movh $sp, %uhi(__stack_table)
or3 $sp, $sp, %lo(__stack_table)
# initialize sp, gp, tp
# get CPU ID
ldc $0, $id
srl $0, 16
# load ID-specific stack pointer
sl2ad3 $0, $0, $sp # $0 = ($0 << 2) + $sp
lw $sp,($0) # $sp = *($0)
mov $0,0xfffffff8
and $sp, $0
#ifndef NOVEC
# copy exception vector table
# RCFG.IRSZ
if_bitfield_zero reg=$rcfg, start=16, length=7, label=.Lend_ev_imem
# handle imem
movh $11,%uhi(_local_ram_base)
or3 $11,$11,%lo(_local_ram_base)
# clear CFG.EVA ([23])
ldc $0,$cfg
movh $1, %uhi(0xff7fffff)
or3 $1, $1, %lo(0xff7fffff)
and $0,$1
stc $0,$cfg
bra .Ldo_repeat_ev
.Lend_ev_imem:
#ifdef UseSDRAM
movh $11,%uhi(_ext_ram_base)
or3 $11,$11,%lo(_ext_ram_base)
# set CFG.EVA ([23])
ldc $0,$cfg
movh $1,%uhi(1<<23)
or3 $1,$1,%lo(1<<23)
or $0,$1
stc $0,$cfg
#else
# handle ROM
bra .Lend_ev
#endif
.Ldo_repeat_ev:
# set CFG.EVM ([4])
ldc $0,$cfg
or3 $0,$0,(1<<4)
stc $0,$cfg
# copy _exception_table to $11
movh $12,%uhi(_exception_table)
or3 $12,$12,%lo(_exception_table)
mov $13,8
repeat $13,.Lrepeat_ev
lw $1,0($12)
add $12,4
.Lrepeat_ev:
sw $1,0($11)
add $11,4
.Lend_ev:
# copy interrupt vector table
# RCFG.IRSZ
if_bitfield_zero reg=$rcfg, start=16, length=7, label=.Lend_iv_imem
# handle imem
movh $11,%uhi(_local_ram_base)
or3 $11,$11,%lo(_int_base_offset)
# clear CFG.IVA ([22])
ldc $0,$cfg
movh $1,%uhi(0xffbfffff) # ~(1<<22)
or3 $1,$1,%lo(0xffbfffff)
and $0,$1
stc $0,$cfg
bra .Ldo_repeat_iv
.Lend_iv_imem:
#ifdef UseSDRAM
movh $11,%uhi(_ext_ram_base)
or3 $11,$11,%lo(_int_base_offset)
# set CFG. IVA ([22])
ldc $0,$cfg
movh $1,%uhi(1<<22)
or3 $1,$1,%lo(1<<22)
or $0,$1
stc $0,$cfg
#else
# handle ROM
bra .Lend_iv
#endif
.Ldo_repeat_iv:
# set CFG.IVM ([3])
ldc $0,$cfg
or3 $0,$0,(1<<3)
stc $0,$cfg
# copy _interrupt_table to $11
movh $12,%uhi(_interrupt_table)
or3 $12,$12,%lo(_interrupt_table)
mov $13,32
add $13,-1
and3 $13,$13,127
repeat $13,.Lrepeat_iv
lw $1,0($12)
add $12,4
.Lrepeat_iv:
sw $1,0($11)
add $11,4
.Lend_iv:
# initialize instruction cache
# Icache Size CCFG.ICSZ ([22..16]) KByte
if_bitfield_zero reg=$ccfg, start=16, length=7, label=.Lend_ic
mov $3,$0 # cache size in KB
# ID.ID
if_bitfield_ltN reg=$ID, start=8, length=8, N=3, label=.Lend_mepc3_ic
# Line Size CCFG.ICSZ ([26..24]) Byte
if_bitfield_ltN reg=$ccfg, start=24, length=3, N=2, label=.Lend_ic
bgei $0,5,.Lend_ic
add3 $1,$0,3 # bit width of line size
mov $0,$3
# clear tag
mov $2,10
sub $2,$1
sll $0,$2 # *KByte/(line size)
add $0,-1
mov $2,1
sll $2,$1 # line size
bra .Ldo_repeat_icache
.Lend_mepc3_ic:
# ICache: $0 KByte
mov $0,$3
# clear tag
sll $0,(10-5) # *KByte/(32byte=linesize)
add $0,-1
mov $2,32
.Ldo_repeat_icache:
mov $1,0
bra 0f
# Align this code on an 8 byte boundary in order to keep the repeat
# loop entirely within the instruction fetch buffer.
.p2align 3
0:
movh $3,%hi(0x00310000) # for tag
repeat $0,.Lrepeat_icache
add $0,-1
.Lrepeat_icache:
sw $1,0($3)
add3 $3,$3,$2
.Lenable_icache:
movh $1,%hi(__enable_icache)
add3 $1,$1,%lo(__enable_icache)
jsr $1
.Lend_ic:
# initialize data cache
# Dcache Size CCFG.DCSZ ([6..0]) KByte
if_bitfield_zero reg=$ccfg, start=0, length=7, label=.Lend_dc
mov $3,$0 # cache size in KB
# ID.ID
if_bitfield_ltN reg=$ID, start=8, length=8, N=3, label=.Lend_mepc3_dc
# Line Size CCFG.DCSZ ([10..8]) Byte
if_bitfield_ltN reg=$ccfg, start=8, length=3, N=2, label=.Lend_dc
bgei $0,5,.Lend_dc
add3 $1,$0,3 # bit width of line size
mov $0,$3
# clear tag
mov $2,10
sub $2,$1
sll $0,$2 # *KByte/(line size)
add $0,-1
mov $2,1
sll $2,$1 # line size
bra .Ldo_repeat_dcache
.Lend_mepc3_dc:
# DCache: $0 KByte
mov $0,$3
# clear tag
sll $0,(10-5) # *KByte/(32byte=linesize)
add $0,-1
mov $2,32
.Ldo_repeat_dcache:
mov $1,0
movh $3,%hi(0x00330000) # for tag
repeat $0,.Lrepeat_dcache
add $0,-1
.Lrepeat_dcache:
sw $1,0($3)
add3 $3,$3,$2
.Lenable_dcache:
movh $1,%hi(__enable_dcache)
add3 $1,$1,%lo(__enable_dcache)
jsr $1
.Lend_dc:
# NOVEC
#endif
mov $0, 0
movh $gp, %uhi(__sdabase)
or3 $gp, $gp, %lo(__sdabase)
movh $tp, %uhi(__tpbase)
or3 $tp, $tp, %lo(__tpbase)
# zero out BSS
movh $1, %uhi(__bss_start)
or3 $1, $1, %lo(__bss_start)
mov $2, 0
movh $3, %uhi(_end)
or3 $3, $3, %lo(_end)
sub $3, $1
bsr memset
movh $1, %uhi(__sbss_start)
or3 $1, $1, %lo(__sbss_start)
mov $2, 0
movh $3, %uhi(__sbss_end)
or3 $3, $3, %lo(__sbss_end)
sub $3, $1
bsr memset
movh $1, %uhi(__farbss_start)
or3 $1, $1, %lo(__farbss_start)
mov $2, 0
movh $3, %uhi(__farbss_end)
or3 $3, $3, %lo(__farbss_end)
sub $3, $1
bsr memset
# enable interrupts
ei
# construct global class variables
bsr __invoke_init_section
# invoke main
mov $1, 0 # argc, argv, envp
mov $2, 0
mov $3, 0
bsr main
mov $1, $0
bsr exit
.global _exit
_exit:
# Prevent _exit recursion
movh $3, %uhi(_exit_in_progress)
or3 $3, $3, %lo(_exit_in_progress)
lw $5, ($3)
bnez $5, _skip_fini
mov $5, 1
sw $5, ($3)
# We don't need to preserve $5 because we're going to exit anyway.
mov $5,$1
# destruct global class variables
bsr __invoke_fini_section
mov $1,$5
_skip_fini:
#ifdef NOSIM
_exit_loop:
bra _exit_loop
#else
.2byte 0x7800 | ((SYS_exit & 0xe) << 7) | ((SYS_exit & 1) << 4)
ret
#endif
.data
_exit_in_progress: .word 0
# For these two, the epilogue is in crtn.S
.section .init
__invoke_init_section:
add $sp, -8
ldc $0, $lp
sw $0, ($sp)
.section .fini
__invoke_fini_section:
add $sp, -8
ldc $0, $lp
sw $0, ($sp)
#ifndef NOVEC
.section .vec, "ax"
.core
.org 0x0, 0
.global _exception_table
.type _exception_table,@function
_exception_table:
.p2align 2
.org 0x0000, 0
.global _reset
_reset:
jmp _handler_RESET
.org 0x0004, 0
jmp _handler_NMI
.org 0x0008, 0
jmp _handler_RI
.org 0x000c, 0
jmp _handler_ZDIV
.org 0x0010, 0
jmp _handler_BRK
.org 0x0014, 0
jmp _handler_SWI
.org 0x0018, 0
jmp _handler_DEBUG
.org 0x001c, 0
jmp _handler_DSP
.org 0x0020, 0
jmp _handler_COP
.org 0x30, 0
.global _interrupt_table
.type _interrupt_table,@function
_interrupt_table:
.org 0x0030
jmp _handler_INT0
.org 0x0034
jmp _handler_INT1
.org 0x0038
jmp _handler_INT2
.org 0x003c
jmp _handler_INT3
.org 0x0040
jmp _handler_INT4
.org 0x0044
jmp _handler_INT5
.org 0x0048
jmp _handler_INT6
.org 0x004c
jmp _handler_INT7
.org 0x0050
jmp _handler_INT8
.org 0x0054
jmp _handler_INT9
.org 0x0058
jmp _handler_INT10
.org 0x005c
jmp _handler_INT11
.org 0x0060
jmp _handler_INT12
.org 0x0064
jmp _handler_INT13
.org 0x0068
jmp _handler_INT14
.org 0x006c
jmp _handler_INT15
.org 0x0070
jmp _handler_INT16
.org 0x0074
jmp _handler_INT17
.org 0x0078
jmp _handler_INT18
.org 0x007c
jmp _handler_INT19
.org 0x0080
jmp _handler_INT20
.org 0x0084
jmp _handler_INT21
.org 0x0088
jmp _handler_INT22
.org 0x008c
jmp _handler_INT23
.org 0x0090
jmp _handler_INT24
.org 0x0094
jmp _handler_INT25
.org 0x0098
jmp _handler_INT26
.org 0x009c
jmp _handler_INT27
.org 0x00a0
jmp _handler_INT28
.org 0x00a4
jmp _handler_INT29
.org 0x00a8
jmp _handler_INT30
.org 0x00ac
jmp _handler_INT31
# NOVEC
#endif
|
stsp/newlib-ia16
| 1,518
|
libgloss/mep/syscalls.S
|
/*
* Copyright (c) 2003 Red Hat, Inc. All rights reserved.
*
* This copyrighted material is made available to anyone wishing to use, modify,
* copy, or redistribute it subject to the terms and conditions of the BSD
* License. This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY expressed or implied, including the implied
* warranties of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. A copy
* of this license is available at http://www.opensource.org/licenses. Any
* Red Hat trademarks that are incorporated in the source code or documentation
* are not subject to the BSD License and may only be used or replicated with
* the express permission of Red Hat, Inc.
*/
#include "syscall.h"
/* Return ABI: $1 is errno, $0 is return value. */
#define S(n) \
.global n ; .weak n ; n: ; \
.2byte 0x7800 | ((SYS_##n & 0xe) << 7) | ((SYS_##n & 1) << 4) ; bra sysret
.text
#define SYS___mep_write SYS_write
#define SYS___mep_read SYS_read
#define SYS__Sid_config SYS_reconfig
S(open)
S(close)
S(__mep_read)
S(__mep_write)
S(lseek)
S(unlink)
S(getpid)
S(kill)
S(fstat)
/* ARGV support. */
S(argvlen)
S(argv)
/* These are extras added for one reason or another. */
S(chdir)
S(stat)
S(chmod)
S(utime)
S(time)
S(gettimeofday)
S(times)
S(link)
S(_Sid_config)
sysret:
add3 $sp, $sp, -16
sw $0, 0($sp)
sw $1, 4($sp)
ldc $2, $lp
sw $2, 8($sp)
bsr __errno
lw $1, 4($sp)
sw $1, ($0)
lw $0, 0($sp)
lw $2, 8($sp)
stc $2, $lp
add3 $sp, $sp, 16
ret
|
stsp/newlib-ia16
| 7,990
|
libgloss/arc/crt0.S
|
/*
Copyright (c) 2015, Synopsys, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1) Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2) Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3) Neither the name of the Synopsys, Inc., nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*/
/*
The startup code for the ARC family of processors does the following before
transferring control to user defined main label:
1. Set sp to __stack_top (link time variable)
2. Set fp to zero
3. Zero out the bss section (for uninitialized globals)
After returning from main, the processor is halted and the pipeline is
flushed out.
We expect argc in r0 and argv in r1. These are saved in r13 / r14 during
the initialization code.
*/
.file "crt0.S"
.extern main
#if defined (__EM__) || defined (__HS__)
.section .ivt, "a", @progbits
; handler's name, type, number,name, offset in IVT (hex/dec)
.word __start ; exception 0 program entry point 0x0 0
.word memory_error ; exception 1 memory_error 0x4 4
.word instruction_error ; exception 2 instruction_error 0x8 8
.word EV_MachineCheck ; exception 3 EV_MachineCheck 0xC 12
.word EV_TLBMissI ; exception 4 EV_TLBMissI 0x10 16
.word EV_TLBMissD ; exception 5 EV_TLBMissD 0x14 20
.word EV_ProtV ; exception 6 EV_ProtV 0x18 24
.word EV_PrivilegeV ; exception 7 EV_PrivilegeV 0x1C 28
.word EV_SWI ; exception 8 EV_SWI 0x20 32
.word EV_Trap ; exception 9 EV_Trap 0x24 36
.word EV_Extension ; exception 10 EV_Extension 0x28 40
.word EV_DivZero ; exception 11 EV_DivZero 0x2C 44
.word EV_DCError ; exception 12 EV_DCError 0x30 48
.word EV_Malignedr ; exception 13 EV_Maligned 0x34 52
.word _exit_halt ; exception 14 unused 0x38 56
.word _exit_halt ; exception 15 unused 0x3C 60
.word IRQ_Timer0 ; IRQ 16 Timer 0 0x40 64
.word IRQ_Timer1 ; IRQ 17 Timer 1 0x44 68
.word IRQ_18 ; IRQ 18 0x48 72
.word IRQ_19 ; IRQ 19 0x4C 76
.word IRQ_20 ; IRQ 20 0x50 80
.section .text.__startup, "ax", @progbits
#else
.text
#endif
.global __start
.type __start, @function
#ifdef __ARC601__
; Startup code for the ARC601 processor
__start:
mov gp, @__SDATA_BEGIN__
mov sp, @__stack_top ; Point to top of stack
mov r5, 0 ; Zero value
mov_s r2, @__sbss_start ; r2 = start of the bss section
sub r3, @_end, r2 ; r3 = size of the bss section in bytes
asr_s r3, r3
asr_s r3, r3 ; r3 = size of bss in words
.Lbss_loop:
cmp r3, 0xff ; Check for max lp_count
mov.le lp_count, r3
mov.gt lp_count, 0xff
lpnz 2f ; Loop to zero bss
st.ab r5,[r2, 4] ; Write word of zeros
nop
2:
sub.f r3, r3, 0xff ; Decrement word count
jp .Lbss_loop
#else /* __ARC601__ */
; Startup code for the ARC600, ARC700 and ARCv2 processors
; NOTE: The following restrictions apply on zero overhead loops (other
; restrictions are not pertinent to this code)
; - loop end should be 4 instruction words away from the lp_count setting
; instruction
; - loop body should have at least two instruction words
__start:
#if defined (__HS__)
; Allow unaligned accesses.
lr r2, [0xA]
bset r2, r2, 19
flag r2
#endif
mov gp, @__SDATA_BEGIN__
mov_s r2, @__sbss_start ; r2 = start of the bss section
sub r3, @_end, r2 ; r3 = size of the bss section in bytes
; set up the loop counter register to the size (in words) of the bss section
asr.f lp_count, r3, 2
#if defined (__ARC600__)
; loop to zero out the bss. Enter loop only if lp_count != 0
lpnz @.Lend_zbss
add r3, pcl, 20
sr r3, [2] ; LP_END
; initialize stack pointer, and this instruction has 2 words
mov sp, @__stack_top
mov_s r3, 0
st.ab r3, [r2, 4] ; zero out the word
.Lend_zbss:
#else
mov sp, @__stack_top ; initialize stack pointer
mov_s r3,0
; loop to zero out the bss. Enter loop only if lp_count != 0
lpnz @.Lend_zbss
st.ab r3,[r2, 4] ; zero out the word
nop
.Lend_zbss:
#endif
#endif /* !__ARC601__ */
; Some targets use the .init and .fini sections to create constructors and
; destructors, and for these targets we need to call the _init function and
; arrange for _fini to be called at program exit.
mov_s r13, r0
mov_s r14, r1
; calling atexit drags in malloc, so instead poke the function
; address directly into the reent structure
ld r1, [gp, @_impure_ptr@sda]
mov_s r0, @_fini
add r1, r1, 0x14c ; &_GLOBAL_REENT->atexit0
st r1, [r1, -4] ; _GLOBAL_REENT->atexit
st_s r0, [r1, 8] ; _GLOBAL_REENT->atexit0._fns[0]
mov_s r0, 1
st_s r0, [r1, 4] ; _GLOBAL_REENT->atexit0._ind
; branch to _init
#if defined (__EM__) || defined (__HS__)
jl @_init
#else
bl @_init
#endif
mov_s r0, r13
mov_s r1, r14
; branch to main
#if defined (__EM__) || defined (__HS__)
mov fp,0 ; initialize frame pointer
jl @main
#else
bl.d @main
mov fp, 0 ; initialize frame pointer
#endif
; r0 contains exit code
j @exit
#if defined (__EM__) || defined (__HS__)
; ARCv2 default interrupt routines, defined as weak symbols.
; Default implementation halts the core. To conserve code size those symbols
; share a single implementation, however as a downside debugger and
; disassembler will not be able to distinguish one from another.
.weak memory_error
.weak instruction_error
.weak EV_MachineCheck
.weak EV_TLBMissI
.weak EV_TLBMissD
.weak EV_ProtV
.weak EV_PrivilegeV
.weak EV_SWI
.weak EV_Trap
.weak EV_Extension
.weak EV_DivZero
.weak EV_DCError
.weak EV_Malignedr
.weak IRQ_Timer0
.weak IRQ_Timer1
.weak IRQ_18
.weak IRQ_19
.weak IRQ_20
.balign 4
memory_error :
instruction_error :
EV_MachineCheck :
EV_TLBMissI :
EV_TLBMissD :
EV_ProtV :
EV_PrivilegeV :
EV_SWI :
EV_Trap :
EV_Extension :
EV_DivZero :
EV_DCError :
EV_Malignedr :
IRQ_Timer0 :
IRQ_Timer1 :
IRQ_18 :
IRQ_19 :
IRQ_20 :
.Lloop_halt:
flag 0x01
nop
b .Lloop_halt
nop
#endif
.section .text._exit_halt,"ax",@progbits
.global _exit_halt
.type _exit_halt, @function
_exit_halt:
; r0 contains exit code
flag 0x01
nop
nop ; ARCompact requires 3 nops after flag 1
nop
b @_exit_halt
nop
|
stsp/newlib-ia16
| 1,055
|
libgloss/moxie/sim-read.S
|
/*
* sim-read.S -- read interface for moxie simulator
*
* Copyright (c) 2008 Anthony Green
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File descriptor.
* $r1 -- Buffer to be read into.
* -0x12($fp) -- Length of the buffer.
*
* Output:
* $r0 -- Length read or -1.
* errno -- Set if an error
*/
.globl _read
.type _read,@function
.weak read
.text
_read:
read:
swi SYS_read
ret
.Lend:
.size _read,.Lend-_read
|
stsp/newlib-ia16
| 1,320
|
libgloss/moxie/crt0.S
|
/* crt0.S -- startup file for moxie
*
* Copyright (c) 2008, 2009, 2014 Anthony Green
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
.globl __start
.weak _start
.text
.type __start,@function
__start:
_start:
ldi.l $sp, _stack /* set the top of stack */
xor $fp, $fp /* zero fp to allow unwinders to stop */
/* zero the bss area */
ldi.l $r0, __bss_start__
xor $r1, $r1
ldi.l $r2, __bss_end__
sub $r2, $r0
jsra memset
/* Call _init to invoke static constructors, etc. */
jsra _init
/* Call _fini at exit time for static destructors. */
ldi.l $r0, _fini
jsra atexit
/* Set argc and argv. These are populated by the simulator. */
lda.l $r0, 0x4
ldi.l $r1, 0x8
jsra main
jsra exit
.Lend:
.size __start,(.Lend-__start)
|
stsp/newlib-ia16
| 1,075
|
libgloss/moxie/sim-open.S
|
/*
* sim-open.S -- open interface for moxie simulator
*
* Copyright (c) 2008 Anthony Green
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File name to open.
* $r1 -- open mode.
* -0x12($fp) -- optionally, the permission bits to set the file to.
*
* Output:
* $r0 -- file descriptor or -1.
* errno -- Set if an error
*/
.globl _open
.type _open,@function
.weak open
.text
_open:
open:
swi SYS_open
ret
.Lend:
.size _open,.Lend-_open
|
stsp/newlib-ia16
| 1,062
|
libgloss/moxie/sim-write.S
|
/*
* sim-write.S -- write interface for moxie simulator
*
* Copyright (c) 2008 Anthony Green
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File descriptor.
* $r1 -- String to be printed.
* -0x12($fp) -- Length of the string.
*
* Output:
* $r0 -- Length written or -1.
* errno -- Set if an error
*/
.globl _write
.type _write,@function
.weak write
.text
_write:
write:
swi SYS_write
ret
.Lend:
.size _write,.Lend-_write
|
stsp/newlib-ia16
| 2,084
|
libgloss/tic6x/crt0.S
|
/* crt0.S for the TI C6X series of processors
Copyright (c) 2010 CodeSourcery, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of CodeSourcery nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY CODESOURCERY, INC. ``AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL CODESOURCERY BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
DAMAGE. */
.text
.align 2
.global _start
_start:
/* Start by setting up a stack */
mvkl .s2 _STACK_START - 4, B15
mvkh .s2 _STACK_START - 4, B15
and .s2 -8, B15, B15
mvkl .s2 __c6xabi_DSBT_BASE, B14
mvkh .s2 __c6xabi_DSBT_BASE, B14
#ifdef __DSBT__
stw .d2t2 B14, *B14
#endif
/* Zero the memory in the .bss section. */
/* Set up GOT pointer. */
mvkl .s2 1f, B3
mvkh .s2 1f, B3
call .s2 _init
nop 5
1:
mvkl .s2 1f, B3
mvkh .s2 1f, B3
call .s2 main
nop 5
1:
b .s2 exit
nop 5
|
stsp/newlib-ia16
| 7,597
|
libgloss/aarch64/crt0.S
|
/* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The name of the company may not be used to endorse or promote
products derived from this software without specific prior written
permission.
THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
#include "newlib.h"
#include "svc.h"
/* ANSI concatenation macros. */
#define CONCAT(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
#ifdef __USER_LABEL_PREFIX__
#define FUNCTION( name ) CONCAT (__USER_LABEL_PREFIX__, name)
#else
#error __USER_LABEL_PREFIX is not defined
#endif
#ifdef HAVE_INITFINI_ARRAY
#define _init __libc_init_array
#define _fini __libc_fini_array
#endif
/* In ELF64, the large addressing model is used and R_AARCH64_ABS64
reloc is generated to relocate a 64-bit address. Since 64-bit
relocation is not available in ELF32, in order to have
a single code path for both ELF64 and ELF32 classes, we synthesize
a 64-bit relocation by using R_AARCH64_P32_ABS32 on one of the two
.word directives, depending on the endianness. */
.macro GEN_DWORD name
#if defined(__ILP32__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
.word \name
.word 0
#elif defined(__ILP32__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
.word 0
.word \name
#else
.dword \name
#endif
.endm
/* Help tackle the pointer size difference between ELF64 and ELF32. */
#ifdef __ILP32__
#define PTR_REG(n) w##n
#define PTR_SIZE 4
#define PTR_LOG_SIZE 2
#else
#define PTR_REG(n) x##n
#define PTR_SIZE 8
#define PTR_LOG_SIZE 3
#endif
.text
.macro FUNC_START name
.global \name
\name:
.endm
.align 2
FUNC_START _mainCRTStartup
FUNC_START _start
/* Start by setting up a stack */
/* Issue Angel SVC to read memory info.
ptr to ptr to 4 words to receive data. */
adr x1, .LC0
mov w0, #AngelSVC_Reason_HeapInfo
AngelSVCAsm AngelSVC
/* Initialise the stack pointer */
/* We currently choose to use the heap_limit field rather than
stack_base because the AEM validation model
returns sane values in the heap fields, but 0 in the stack
fields. Note on the VE AEM model it is necessary to pass
command line options to the AEM in order to define the values
exposed here in the HeapInfo Angel call. */
ldr x0, .LC0 /* point at returned values */
ldr x1, [x0, #8] /* get heap_limit */
#ifdef __ILP32__
/* Sanity check on the heap base. */
ldr x0, [x0] /* get heap_base */
tst x0, #0xffffffff00000000
beq 1f
/* Exit with 1 if the heap base is not within the 32-bit address
space. */
mov x0, ADP_Stopped_ApplicationExit & 0xff
movk x0, ADP_Stopped_ApplicationExit >> 16, lsl #16
adrp x1, HeapBase /* Reuse to construct the parameter block. */
add x1, x1, #:lo12:HeapBase
str x0, [x1]
mov x0, 1
str x0, [x1, #8]
mov w0, #AngelSVC_Reason_ReportException
AngelSVCAsm AngelSVC
1:
/* For the sake of safety, set the stack base to the top end of
the 32-bit address space if the returned value from the
Angel API call is larger than or equal to 4 GiB. */
tst x1, #0xffffffff00000000
csinv w1, w1, wzr, eq
#endif
/* Ensure quad-word stack alignment. */
and x0, x1, #~15
mov sp, x0
/* Setup an initial dummy frame with saved fp=0 and saved lr=0 */
mov x29, 0
stp x29, x29, [sp, #-16]!
mov x29, sp
/* Initialize exception vector table, flatmap, etc. */
bl FUNCTION (_cpu_init_hook)
/* Zero the memory in the .bss section. */
ldr x0, .LC1 /* First arg: start of memory block */
mov w1, #0 /* Second arg: fill value */
ldr x2, .LC2
sub x2, x2, x0 /* Third arg: length of block */
bl FUNCTION (memset)
/* Need to set up standard file handles */
bl FUNCTION (initialise_monitor_handles)
/* .init and .fini sections are used to create constructors
and destructors. Here we call the _init function and arrange
for _fini to be called at program exit. */
ldr x0, .Lfini
bl FUNCTION (atexit)
bl FUNCTION (_init)
/* Fetch and parse the command line. */
adr x1, .Lcmdline /* Command line descriptor. */
mov w0, #AngelSVC_Reason_GetCmdLine
AngelSVCAsm AngelSVC
ldr x8, .Lcmdline
mov x0, #0 /* argc */
mov x1, sp /* argv */
ldr x2, .Lenvp /* envp */
/* Put NULL at end of argv array. */
str PTR_REG (0), [x1, #-PTR_SIZE]!
/* Skip leading blanks. */
.Lnext: ldrb w3, [x8], #1
cbz w3, .Lendstr
cmp w3, #' '
b.eq .Lnext
mov w4, #' ' /* Terminator is space. */
/* See whether we are scanning a quoted string by checking for
opening quote (" or '). */
subs w9, w3, #'\"'
sub x8, x8, #1 /* Backup if no match. */
ccmp w9, #('\'' - '\"'), 0x4 /* FLG_Z */, ne
csel w4, w3, w4, eq /* Terminator = quote if match. */
cinc x8, x8, eq
/* Push arg pointer to argv, and bump argc. */
str PTR_REG (8), [x1, #-PTR_SIZE]!
add x0, x0, #1
/* Find end of arg string. */
1: ldrb w3, [x8], #1
cbz w3, .Lendstr
cmp w4, w3 /* Reached terminator? */
b.ne 1b
/* Terminate the arg string with NUL char. */
mov w4, #0
strb w4, [x8, #-1]
b .Lnext
/* Reverse argv array. */
.Lendstr:
add x3, x1, #0 /* sp = &argv[0] */
add x4, x1, w0, uxtw #PTR_LOG_SIZE /* ep = &argv[argc] */
cmp x4, x3
b.lo 2f
1: ldr PTR_REG (5), [x4, #-PTR_SIZE] /* PTR_REG (5) = ep[-1] */
ldr PTR_REG (6), [x3] /* PTR_REG (6) = *sp */
str PTR_REG (6), [x4, #-PTR_SIZE]! /* *--ep = PTR_REG (6) */
str PTR_REG (5), [x3], #PTR_SIZE /* *sp++ = PTR_REG (5) */
cmp x4, x3
b.hi 1b
2:
/* Move sp to the 16B boundary below argv. */
and x4, x1, ~15
mov sp, x4
bl FUNCTION (main)
b FUNCTION (exit) /* Cannot return. */
/* Function initializing exception vector table, flatmap, etc.
Declared as weak symbol so that user can override this definition
by linking in their own version of the function. */
.weak FUNCTION (_cpu_init_hook)
FUNCTION (_cpu_init_hook):
ret
.align 3
.LC0:
GEN_DWORD HeapBase
.LC1:
GEN_DWORD __bss_start__
.LC2:
GEN_DWORD __bss_end__
.Lfini:
GEN_DWORD FUNCTION(_fini)
.Lenvp:
GEN_DWORD env
.Lcmdline:
GEN_DWORD CommandLine
.dword 255
/* Workspace for Angel calls. */
.data
.align 3
/* Data returned by monitor SVC. */
#if defined(__ILP32__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
.set __stack_base__, StackBase + 4
#else
.set __stack_base__, StackBase
#endif
.global __stack_base__
HeapBase: .dword 0
HeapLimit: .dword 0
StackBase: .dword 0
StackLimit: .dword 0
env: .dword 0 /* Dummy environment array */
CommandLine: .space 256,0 /* Maximum length of 255 chars handled. */
|
stsp/newlib-ia16
| 1,177
|
libgloss/ft32/sim-read.S
|
/*
* sim-read.S -- read interface for FT32 simulator
*
* Copyright (C) 2015 FTDI (support@ftdichip.com)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File descriptor.
* $r1 -- Buffer to be read into.
* -0x12($fp) -- Length of the buffer.
*
* Output:
* $r0 -- Length read or -1.
* errno -- Set if an error
*/
.globl _read
.type _read,@function
.weak read
.text
_read:
read:
# swi SYS_read
return
.Lend:
.size _read,.Lend-_read
|
stsp/newlib-ia16
| 1,096
|
libgloss/ft32/sim-close.S
|
/*
* sim-close.S -- close interface for FT32 simulator
*
* Copyright (C) 2015 FTDI (support@ftdichip.com)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File descriptor to close.
*
* Output:
* $r0 -- 0 or -1.
* errno -- Set if an error
*/
.globl _close
.type _close,@function
.weak close
.text
_close:
close:
# swi SYS_close
return
.Lend:
.size _close,.Lend-_close
|
stsp/newlib-ia16
| 1,121
|
libgloss/ft32/sim-unlink.S
|
/*
* sim-unlink.S -- write interface for FT32 simulator
*
* Copyright (C) 2015 FTDI (support@ftdichip.com)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
.globl _unlink
.type _unlink,@function
.weak unlink
.text
_unlink:
unlink:
return
.Lend:
.size _unlink,.Lend-_unlink
.globl _link
.type _link,@function
.weak link
.text
_link:
link:
return
.Lend1:
.size _link,.Lend1-_link
|
stsp/newlib-ia16
| 1,545
|
libgloss/ft32/crt0.S
|
/* crt0.S -- startup file for FT32
*
* Copyright (c) 2015 FTDI
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
.globl __start
.weak _start
.text
.type __start,@function
__start:
_start:
jmp truestart
jmp truestart
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
reti
truestart:
ldk.l $sp, 0xfffc /* set the top of stack */
ldk.l $fp,0 /* zero fp to allow unwinders to stop */
/* Set argc and argv to zero */
ldk.l $r0, 0
ldk.l $r1, 0
sub.l $sp,$sp,24 # room for the args to main
call main
call exit
.Lend:
.size __start,(.Lend-__start)
|
stsp/newlib-ia16
| 1,190
|
libgloss/ft32/sim-open.S
|
/*
* sim-open.S -- open interface for FT32 simulator
*
* Copyright (C) 2015 FTDI (support@ftdichip.com)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File name to open.
* $r1 -- open mode.
* -0x12($fp) -- optionally, the permission bits to set the file to.
*
* Output:
* $r0 -- file descriptor or -1.
* errno -- Set if an error
*/
.globl _open
.type _open,@function
.weak open
.text
_open:
open:
# swi SYS_open
return
.Lend:
.size _open,.Lend-_open
|
stsp/newlib-ia16
| 1,470
|
libgloss/ft32/sim-write.S
|
/*
* sim-write.S -- write interface for FT32 simulator
*
* Copyright (C) 2015 FTDI (support@ftdichip.com)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#include "syscall.h"
/*
* Input:
* $r0 -- File descriptor.
* $r1 -- String to be printed.
* $r2 -- Length of the string.
*
* Output:
* $r0 -- Length written or -1.
* errno -- Set if an error
*/
.globl _write
.type _write,@function
.weak write
.text
_write:
write:
# LDI.l $r1,$r0,0
# STA.l MAGIC,$r1
# jmp .f
#
# .loop:
# sta.l 0x10000,$r2
# add.l $r0,$r0,1
# .f:
# ldi.b $r2,$r0,0
# cmp.b $r2,0
# jmpc nz,.loop
ldk.l $r3,0x10000
streamout.b $r3,$r1,$r2
move.l $r0,$r2
return
.Lend:
.size _write,.Lend-_write
|
stsp/newlib-ia16
| 1,211
|
libgloss/sparc_leon/stop.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
.seg "text"
.global _leonbase_Stop
_leonbase_Stop:
ta 0
nop
|
stsp/newlib-ia16
| 3,763
|
libgloss/sparc_leon/etrap.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leonstack.h>
#include <asm-leon/winmacros.h>
/* Registers to not touch at all. */
#define t_psr l0 /* Set by caller */
#define t_pc l1 /* Set by caller */
#define t_npc l2 /* Set by caller */
#define t_wim l3 /* Set by caller */
#define t_twinmask l4 /* Set at beginning of this entry routine. */
#define t_kstack l5 /* Set right before pt_regs frame is built */
#define t_retpc l6 /* If you change this, change winmacro.h header file */
#define t_systable l7 /* Never touch this, could be the syscall table ptr. */
#define curptr g6 /* Set after pt_regs frame is built */
/* Number of register windows */
.global _nwindows_min1, _nwindows
.text
.align 4
.globl leonbare_trapsetup
leonbare_trapsetup:
#ifdef _FLAT
restore
RW_STORE(sp)
save
#endif
#ifndef _SOFT_FLOAT
/* build a pt_regs trap frame. */
sub %fp, (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ), %t_kstack
PT_STORE_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
/* build a fp_regs trap frame. */
sethi %hi(fpustate_current), %g2
ld [%g2+%lo(fpustate_current)], %g3
st %g3,[%t_kstack + (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ - 4)]
add %t_kstack,SF_REGS_SZ + PT_REGS_SZ,%g3
st %g3, [%g2+%lo(fpustate_current)]
#else
/* build a pt_regs trap frame.
*/
sub %fp, (SF_REGS_SZ + PT_REGS_SZ), %t_kstack
PT_STORE_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
#endif
#ifndef _FLAT
/* See if we are in the trap window. */
mov 1, %t_twinmask
sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
andcc %t_twinmask, %t_wim, %g0
beq 1f ! in trap window, clean up
nop
/*-------------------------------------------------*/
/* Spill , adjust %wim and go. */
srl %t_wim, 0x1, %g2 ! begin computation of new %wim
sethi %hi(_nwindows_min1), %g3
ld [%g3+%lo(_nwindows_min1)], %g3
sll %t_wim, %g3, %t_wim ! NWINDOWS-1
or %t_wim, %g2, %g2
and %g2, 0xff, %g2
save %g0, %g0, %g0 ! get in window to be saved
/* Set new %wim value */
wr %g2, 0x0, %wim
/* Save the kernel window onto the corresponding stack. */
RW_STORE(sp)
restore %g0, %g0, %g0
/*-------------------------------------------------*/
1:
#endif
/* Trap from kernel with a window available.
* Just do it...
*/
jmpl %t_retpc + 0x8, %g0 ! return to caller
mov %t_kstack, %sp ! jump onto new stack
|
stsp/newlib-ia16
| 3,271
|
libgloss/sparc_leon/kernel_context.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/elfmacro.h>
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/contextswitch.h>
#include <asm-leon/winmacros.h>
#include <asm-leon/leonbare_kernel.h>
FUNC_EXPORT(_leonbare_kernel_switchto)
FUNC_EXPORT(_leonbare_Stop)
FUNC_IMPORT(leonbare_disable_traps)
.text
/* unsigned int _leonbare_kernel_switchto(struct leonbare_thread_ctx *thread,struct leonbare_thread_ctx *thread) */
FUNC_BEGIN(_leonbare_kernel_switchto)
/* =================================*/
/* save context */
/* =================================*/
mov %o0, %g1
mov %o1, %g2
mov %o7, %g3
rd %psr, %g4 /* psr.cwp should stay same because irq path rely on it. */
call leonbare_disable_traps /* psr in %o0, modify %o0, %o1, %o7 */
nop
set TACODE_IRQCALL_FLUSH,%o1
ta TACODE_IRQCALL
st %g4, [%g1 + LEONBARE_THREAD_CTX_STACK_PSR] /* psr */
set LEONBARE_THREAD_CTX_MAGIC,%g4
st %g4, [%g1 + LEONBARE_THREAD_CTX_STACK_MAGIC]
mov %g3, %o7 ! restore %o7
LEONBARE_THREAD_CTX_STORE_INS(g1)
LEONBARE_THREAD_CTX_STORE_LOCALS(g1)
LEONBARE_THREAD_CTX_STORE_OUTS(g1)
/* =================================*/
/* restore context */
/* =================================*/
/* check valid context stack area */
ld [%g2 + LEONBARE_THREAD_CTX_STACK_MAGIC], %o1
set LEONBARE_THREAD_CTX_MAGIC,%o2
cmp %o1, %o2
beq 1f
nop
/* stop all */
ta 0x0
1:
/* get psr */
ld [%g2 + LEONBARE_THREAD_CTX_STACK_PSR],%g1 /* psr.cwp should stay same because irq path rely on it. */
set SPARC_PSR_EF_MASK,%g3 ! clear ef bit
andn %g1, %g3, %g1
wr %g0,%wim
nop; nop; nop;
andn %g1, SPARC_PSR_ET_MASK, %g3 ! disable traps, up to PSR_EF imm andn ok
wr %g3, %psr
nop; nop; nop;
LEONBARE_THREAD_CTX_LOAD_INS(g2)
LEONBARE_THREAD_CTX_LOAD_LOCALS(g2)
LEONBARE_THREAD_CTX_LOAD_OUTS(g2)
SET_WIM_CWPMIN1(g1,o1,o2,o3,o4) ! calc wim from psr_cwp so that next restore traps
wr %g1,%psr
nop; nop; nop;
retl
nop
FUNC_END(_leonbare_kernel_switchto)
FUNC_BEGIN(_leonbare_Stop)
ta 0x0
FUNC_END(_leonbare_Stop)
|
stsp/newlib-ia16
| 1,640
|
libgloss/sparc_leon/locore_mvt_reset.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/head.h>
.section .text
/* ------- */
.weak _hardreset_mvt
.set _hardreset_mvt,_hardreset_mvt_ram
/* ------- */
.global _hardreset
_hardreset_mvt_ram:
mov %psr, %g1
srl %g1, 24, %g1
and %g1, 3, %g1
subcc %g1, 3, %g0 ! leon2: 0 or 2, leon3: 3
bne .L2
nop
mov %asr17, %g1 ! set svt
set 1<<13,%g2
andn %g1,%g2,%g1
mov %g1, %asr17
.L2: mov %g0, %g4
sethi %hi(_hardreset), %g4
jmp %g4+%lo(_hardreset);
nop
|
stsp/newlib-ia16
| 4,155
|
libgloss/sparc_leon/etrap_fast.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leonstack.h>
#include <asm-leon/winmacros.h>
/* Registers to not touch at all. */
#define t_psr l0 /* Set by caller */
#define t_pc l1 /* Set by caller */
#define t_npc l2 /* Set by caller */
#define t_wim l3 /* Set by caller */
#define t_twinmask l4 /* Set at beginning of this entry routine. */
#define t_kstack l5 /* Set right before pt_regs frame is built */
#define t_retpc l6 /* If you change this, change winmacro.h header file */
#define t_systable l7 /* Never touch this, could be the syscall table ptr. */
#define curptr g6 /* Set after pt_regs frame is built */
/* Number of register windows */
.global _nwindows_min1, _nwindows
.text
.align 4
.globl leonbare_trapsetup_fast
/* etap entry special for irqtrap.S */
leonbare_trapsetup_fast:
#ifdef _FLAT
restore
RW_STORE(sp)
save
#endif
#ifndef _SOFT_FLOAT
/* build a pt_regs trap frame. */
sub %fp, (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ), %t_kstack
st %t_psr, [%t_kstack + (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ - 8)] /* sparc_fpuwindow_regs.irqpsr */
set SPARC_PSR_EF_MASK, %t_twinmask
andn %t_psr, %t_twinmask, %t_psr ! fpu off
PT_STORE_ALL_FAST(t_kstack, t_psr, t_pc, t_npc, g2)
/*PT_STORE_GLOBALS(t_kstack)*/
/* build a fp_regs trap frame. */
sethi %hi(fpustate_current), %g2
ld [%g2+%lo(fpustate_current)], %g3
st %g3,[%t_kstack + (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ - 4)] /* sparc_fpuwindow_regs.lastctx */
add %t_kstack,SF_REGS_SZ + PT_REGS_SZ,%g3
st %g3, [%g2+%lo(fpustate_current)]
st %g0, [%g3 + FW_FSR]
#else
/* build a pt_regs trap frame.
*/
sub %fp, (SF_REGS_SZ + PT_REGS_SZ), %t_kstack
PT_STORE_ALL_FAST(t_kstack, t_psr, t_pc, t_npc, g2)
/*PT_STORE_GLOBALS(t_kstack)*/
#endif
#ifndef _FLAT
/* See if we are in the trap window . */
mov 1, %t_twinmask
sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
andcc %t_twinmask, %t_wim, %g0
beq 1f ! in trap window, clean up
nop
/*-------------------------------------------------*/
/* Spill , adjust %wim and go. */
srl %t_wim, 0x1, %g2 ! begin computation of new %wim
sethi %hi(_nwindows_min1), %g3
ld [%g3+%lo(_nwindows_min1)], %g3
sll %t_wim, %g3, %t_wim ! NWINDOWS-1
or %t_wim, %g2, %g2
and %g2, 0xff, %g2
save %g0, %g0, %g0 ! get in window to be saved
/* Set new %wim value */
wr %g2, 0x0, %wim
/* Save the kernel window onto the corresponding stack. */
RW_STORE(sp)
restore %g0, %g0, %g0
/*-------------------------------------------------*/
1:
#endif
/* Trap from kernel with a window available.
* Just do it...
*/
jmpl %t_retpc + 0x8, %g0 ! return to caller
mov %t_kstack, %sp ! jump onto new stack
|
stsp/newlib-ia16
| 3,326
|
libgloss/sparc_leon/rtrap.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leonstack.h>
#include <asm-leon/winmacros.h>
/* Registers to not touch at all. */
#define t_psr l0
#define t_pc l1
#define t_npc l2
#define t_wim l3
#define twin_tmp1 l4
#define glob_tmp g4
#define curptr g6
/* Number of register windows */
.global _nwindows_min1, _nwindows
.text
.align 4
.globl leonbare_trapreturn, schedule_callback
leonbare_trapreturn:
/* a optional scheduler can be called here */
set schedule_callback, %g2
ld [%g2], %g2
cmp %g2,%g0
beq 3f
nop
jmpl %g2,%o7
#ifndef _SOFT_FLOAT
add %sp, FW_REGS_SZ + 8 + SF_REGS_SZ , %o1 ! pt_regs ptr
#else
add %sp, SF_REGS_SZ , %o1 ! pt_regs ptr
#endif
3:
#ifndef _SOFT_FLOAT
ld [%sp + (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ - 4)],%g2
sethi %hi(fpustate_current), %g3
st %g2, [%g3+%lo(fpustate_current)]
#endif
wr %t_psr, 0x0, %psr ! enable nesting again, clear ET
#ifndef _FLAT
/* Will the rett land us in the invalid window? */
mov 2, %g1
sll %g1, %t_psr, %g1
sethi %hi(_nwindows), %g2 !NWINDOWS
ld [%g2+%lo(_nwindows)], %g2
srl %g1, %g2, %g2
or %g1, %g2, %g1
rd %wim, %g2
andcc %g2, %g1, %g0
be 1f ! Nope, just return from the trap
sll %g2, 0x1, %g1
/* We have to grab a window before returning. */
sethi %hi(_nwindows_min1), %g3 !NWINDOWS-1
ld [%g3+%lo(_nwindows_min1)], %g3
srl %g2, %g3, %g2
or %g1, %g2, %g1
and %g1, 0xff, %g1
wr %g1, 0x0, %wim
/* Grrr, make sure we load from the right %sp... */
PT_LOAD_ALL(sp, t_psr, t_pc, t_npc, g1)
restore %g0, %g0, %g0
RW_LOAD(sp)
b 2f
save %g0, %g0, %g0
/* Reload the entire frame in case this is from a
* kernel system call or whatever...
*/
1:
#endif
PT_LOAD_ALL(sp, t_psr, t_pc, t_npc, g1)
2:
#ifdef _FLAT
restore
RW_LOAD(sp)
save
#endif
wr %t_psr, 0x0, %psr
nop; nop; nop
jmp %t_pc
rett %t_npc
#ifdef _FLAT
#warning _FLAT not implemented
#endif
|
stsp/newlib-ia16
| 3,851
|
libgloss/sparc_leon/rtrap_fast.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leonstack.h>
#include <asm-leon/winmacros.h>
/* Registers to not touch at all. */
#define t_psr l0
#define t_pc l1
#define t_npc l2
#define t_wim l3
#define twin_tmp1 l4
#define glob_tmp g4
#define curptr g6
/* Number of register windows */
.global _nwindows_min1, _nwindows
.text
.align 4
.globl leonbare_trapreturn_fast, schedule_callback
/* rtap return special for irqtrap.S */
leonbare_trapreturn_fast:
/* a optional scheduler can be called here */
set schedule_callback, %g2
ld [%g2], %g2
cmp %g2,%g0
beq 3f
nop
jmpl %g2,%o7
#ifndef _SOFT_FLOAT
add %sp, FW_REGS_SZ + 8 + SF_REGS_SZ , %o1 ! pt_regs ptr
#else
add %sp, SF_REGS_SZ , %o1 ! pt_regs ptr
#endif
3:
#ifndef _SOFT_FLOAT
ld [%sp + (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ - 4)],%g2
sethi %hi(fpustate_current), %g3
st %g2, [%g3+%lo(fpustate_current)]
sethi %hi(fpustate_owner), %g3
ld [%g3+%lo(fpustate_owner)], %g3
cmp %g2, %g3
bne didusefpu
nop
/* avoid fpu exception */
ld [%sp + (SF_REGS_SZ + PT_REGS_SZ + FW_REGS_SZ - 8)], %g2
set SPARC_PSR_EF_MASK, %g3
and %g2, %g3, %g2
andn %t_psr, %g3, %t_psr
or %t_psr, %g2, %t_psr
ba,a 1f
didusefpu:
add %sp,SF_REGS_SZ + PT_REGS_SZ,%g2
cmp %g2, %g3
bne 1f
sethi %hi(fpustate_owner), %g3
st %g0, [%g3+%lo(fpustate_owner)]
1:
#endif
wr %t_psr, 0x0, %psr ! enable nesting again, clear ET
#ifndef _FLAT
/* Will the rett land us in the invalid window? */
mov 2, %g1
sll %g1, %t_psr, %g1
sethi %hi(_nwindows), %g2 !NWINDOWS
ld [%g2+%lo(_nwindows)], %g2
srl %g1, %g2, %g2
or %g1, %g2, %g1
rd %wim, %g2
andcc %g2, %g1, %g0
be 1f ! Nope, just return from the trap
sll %g2, 0x1, %g1
/* We have to grab a window before returning. */
sethi %hi(_nwindows_min1), %g3 !NWINDOWS-1
ld [%g3+%lo(_nwindows_min1)], %g3
srl %g2, %g3, %g2
or %g1, %g2, %g1
and %g1, 0xff, %g1
wr %g1, 0x0, %wim
/* Grrr, make sure we load from the right %sp... */
PT_LOAD_ALL_FAST(sp, t_psr, t_pc, t_npc, g1)
restore %g0, %g0, %g0
RW_LOAD(sp)
b 2f
save %g0, %g0, %g0
/* Reload the entire frame in case this is from a
* kernel system call or whatever...
*/
1:
#endif
PT_LOAD_ALL_FAST(sp, t_psr, t_pc, t_npc, g1)
2: /*PT_LOAD_GLOBALS(sp)*/
#ifdef _FLAT
restore
RW_LOAD(sp)
save
#endif
wr %t_psr, 0x0, %psr
nop; nop; nop
jmp %t_pc
rett %t_npc
#ifdef _FLAT
#warning _FLAT not implemented
#endif
|
stsp/newlib-ia16
| 1,683
|
libgloss/sparc_leon/cacheA.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
.seg "data"
.global sparc_leon23_cache_flush, sparc_leon23_icache_flush, sparc_leon23_dcache_flush
.global _leon_version
.seg "text"
/* =============================================== */
/* use only %o7 */
sparc_leon23_icache_flush:
sparc_leon3_icache_flush:
retl
sparc_leon23_cache_flush:
sparc_leon3_cache_flush:
sta %g0, [%g0] ASI_LEON3_IFLUSH
sparc_leon23_dcache_flush:
sparc_leon3_dcache_flush:
retl
sta %g0, [%g0] ASI_LEON3_DFLUSH
|
stsp/newlib-ia16
| 1,860
|
libgloss/sparc_leon/locore_svt_reset.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/head.h>
.section .text
/* ------- */
.weak _hardreset_svt
.set _hardreset_svt, __hardreset_svt
/* ------- */
.global _hardreset, _hardreset_svt_real
! reset entry point for single vector trapping. Try enable svt
_hardreset_svt_real:
nop
__hardreset_svt:
mov %psr, %l3
srl %l3, 24, %g5
and %g5, 3, %g5
subcc %g5, 3, %g0 ! leon2: 0 or 2, leon3: 3
bne .L2
nop
mov %asr17, %g5 ! set svt
set 1<<13,%g1
or %g5,%g1,%g5
mov %g5, %asr17
nop; nop; nop
mov %asr17,%g5 ! check svt
andcc %g5, %g1, %g0
beq .L2
nop
set _hardreset,%l3
jmp %l3
nop
.L2: ta 0x0 ! no svt implemented (ether leon2 or svt != 1)
nop
|
stsp/newlib-ia16
| 2,748
|
libgloss/sparc_leon/locore_clean.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/head.h>
.section .text
/* ------- */
.weak _cleanregs_custom_weak
.set _cleanregs_custom_weak,_cleanregs_donothing
/* ------- */
.global _cleanregs_libgloss
_cleanregs_donothing:
_cleanregs_libgloss:
retl
nop
#define NUMREGWINDOWS 8
//_cleanregs_libgloss:
!''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
! initialize regs with values
//#define REGINIT
#ifdef REGINIT
mov %psr, %g3
mov %wim, %g4
mov %sp, %g5
mov %fp, %g6
mov %o7, %g7
mov %g0, %wim
set 0, %g1
andn %g3,0x1f,%l0
mov %l0,%psr
nop; nop; nop
3: set 0x0001,%i0
set 0x0101,%i1
set 0x0201,%i2
set 0x0301,%i3
set 0x0401,%i4
set 0x0501,%i5
set 0x0601,%i6
set 0x0701,%i7
set 0x0801,%l0
set 0x0901,%l1
set 0x1001,%l2
set 0x1101,%l3
set 0x1201,%l4
set 0x1301,%l5
set 0x1401,%l6
set 0x1501,%l7
or %g1,%i0,%i0
or %g1,%i1,%i1
or %g1,%i2,%i2
or %g1,%i3,%i3
or %g1,%i4,%i4
or %g1,%i5,%i5
or %g1,%i6,%i6
or %g1,%i7,%i7
or %g1,%l0,%l0
or %g1,%l1,%l1
or %g1,%l2,%l2
or %g1,%l3,%l3
or %g1,%l4,%l4
or %g1,%l5,%l5
or %g1,%l6,%l6
or %g1,%l7,%l7
restore
set 0x10000,%g2
add %g1,%g2,%g1
set NUMREGWINDOWS*0x10000,%g2
cmp %g1,%g2
bne 3b
nop
mov %g4,%wim
nop; nop; nop;
mov %g3,%psr
nop; nop; nop;
mov %g5, %sp
mov %g6, %fp
#endif
!''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
jmpl %g7+8,%g0
nop
|
stsp/newlib-ia16
| 3,821
|
libgloss/sparc_leon/regwin.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/asmmacro.h>
.seg "text"
/* Number of register windows */
.global _nwindows_min1, _nwindows
! Window overflow trap handler on save.
! Touches %g1
/* ------- */
.weak _window_overflow
.set _window_overflow,__window_overflow
.weak _window_overflow_svt
.set _window_overflow_svt,__window_overflow_svt
/* ------- */
!.global _window_overflow,_window_overflow_svt
.global __window_overflow_rettseq,__window_overflow_rettseq_ret,__window_overflow_slow1
__window_overflow_svt:
__window_overflow:
#ifndef _FLAT
__window_overflow_rettseq:
mov %wim, %l3 ! Calculate next WIM
mov %g1, %l7
srl %l3, 1, %g1
__window_overflow_rettseq_ret:
sethi %hi(_nwindows_min1), %l4 ! NWINDOWS-1
ld [%l4+%lo(_nwindows_min1)], %l4
sll %l3, %l4 , %l4
or %l4, %g1, %g1
save ! Get into window to be saved.
mov %g1, %wim
nop; nop; nop
std %l0, [%sp + 0];
std %l2, [%sp + 8];
std %l4, [%sp + 16];
std %l6, [%sp + 24];
std %i0, [%sp + 32];
std %i2, [%sp + 40];
std %i4, [%sp + 48];
std %i6, [%sp + 56];
restore ! Go back to trap window.
mov %l7, %g1
jmp %l1 ! Re-execute save.
rett %l2
nop
__window_overflow_slow1: ! space for possible stackcheck patch
nop
nop
#else
ta 0 ! halt
__window_overflow_rettseq:
__window_overflow_rettseq_ret:
__window_overflow_slow1:
nop
nop
nop
#endif
/* Window underflow trap handler on restore. */
! Touches %g1
/* ------- */
.weak _window_underflow
.set _window_underflow,__window_underflow
.weak _window_underflow_svt
.set _window_underflow_svt,__window_underflow_svt
/* ------- */
!.global _window_underflow,_window_underflow_svt
__window_underflow_svt:
__window_underflow:
#ifndef _FLAT
mov %wim, %l3 ! Calculate next WIM
sll %l3, 1, %l4
sethi %hi(_nwindows_min1), %l5 ! NWINDOWS-1
ld [%l5+%lo(_nwindows_min1)], %l5
srl %l3, %l5, %l5
or %l5, %l4, %l5
mov %l5, %wim
nop; nop; nop
restore ! Two restores to get into the
restore ! window to restore
ldd [%sp + 0], %l0; ! Restore window from the stack
ldd [%sp + 8], %l2;
ldd [%sp + 16], %l4;
ldd [%sp + 24], %l6;
ldd [%sp + 32], %i0;
ldd [%sp + 40], %i2;
ldd [%sp + 48], %i4;
ldd [%sp + 56], %i6;
save ! Get back to the trap window.
save
jmp %l1 ! Re-execute restore.
rett %l2
#else
ta 0 ! halt
#endif
|
stsp/newlib-ia16
| 2,952
|
libgloss/sparc_leon/fpu.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/asmmacro.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/winmacros.h>
#include <asm-leon/leon.h>
#ifndef _SOFT_FLOAT
.seg "text"
/* ------- */
.weak _fpdis_enable_svt
.set _fpdis_enable_svt,__fpdis_enable_svt
.weak _fpdis_enable
.set _fpdis_enable,__fpdis_enable
/* ------- */
!.global _fpdis_enable,_fpdis_enable_svt
__fpdis_enable_svt:
__fpdis_enable:
set SPARC_PSR_EF_MASK,%l3
or %l0,%l3,%l0
or %l0,0xf00, %l3 ! PIL up to 15, enable fpu
wr %l3,0, %psr ! restore the condition flags, enable fpu
nop
nop
nop
mov %psr, %l3 ! check if fpu is present
set SPARC_PSR_EF_MASK,%l4
andcc %l3, %l4, %l3
bne 4f
nop
ta 0 ! no fpu present, halt
4:
set fpustate_current,%l4
ld [%l4],%l4
set fpustate_owner,%l5
ld [%l5],%l5
cmp %l4,%l5
beq mpfnostore
nop
cmp %g0,%l5
beq mpfstore
nop
FW_STORE(%l5)
mpfstore:
set fpustate_owner,%l6
st %l4,[%l6]
cmp %g0,%l4
beq mpfnostore
nop
FW_LOAD(%l4)
mpfnostore:
wr %l0,0, %psr ! restore the condition flags, enable fpu
nop
nop
nop
jmpl %l1, %g0
rett %l2
.seg "data"
.global fpustate_default
.align 8
fpustate_default:
.long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0;
.long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0;
.long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0;
.long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0;
.long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0; .long 0;
.global fpustate_owner
fpustate_owner:
.word fpustate_default ! pointer to FPU owning context
.global fpustate_current
fpustate_current:
.word fpustate_default ! pointer to current threads FPU context
#endif
|
stsp/newlib-ia16
| 4,243
|
libgloss/sparc_leon/locore.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* The traptable has to be the first code in a boot PROM. */
#include <asm-leon/head.h>
#define TRAP(H) mov %psr, %l0; sethi %hi(H), %l4; jmp %l4+%lo(H); nop;
#define TRAPL(H) nop; sethi %hi(H), %g1; jmp %g1+%lo(H); nop;
#define TRAP_ENTRY(H) rd %psr, %l0; b H; rd %wim, %l3; nop;
#define WIM_INIT 2
#ifdef _SOFT_FLOAT
#define PSR_INIT 0x0e0
#else
#define PSR_INIT 0x10e0
#endif
#define NUMREGWINDOWS 8
/* Unexcpected trap will halt the processor by forcing it to error state */
#define BAD_TRAP ta 0; nop; nop; nop;
/* Software trap. Treat as BAD_TRAP */
#define SOFT_TRAP BAD_TRAP
.seg "text"
.global _trap_table, start, _start, cpuinit, leonbare_irq_entry, _hardreset
.global _window_overflow, _window_underflow, _flush_windows, _fpdis_enable
/*.global _nwindows, _leon_version, _nwindows_min1*/
!
! Startup code for standalone system. Wash IU and FPU (if present) registers.
! The registers have to be written to initiate the parity bits.
!
.section .text
/* ------- */
.weak _hardreset
.set _hardreset,_hardreset_libgloss
/* ------- */
.global _hardreset_custom_weak, _hardreset_real, _cleanregs_custom_weak, _hardreset_custom_svt_weak
_hardreset_real:
nop
_hardreset_libgloss:
set _hardreset_custom_weak, %g1 ! possible mkprom init code here, default links to dummy _hardreset_custom_dummy
call %g1
nop
set _trap_table, %g1 ! Initialize TBR
mov %g1, %tbr
set _hardreset_custom_svt_weak, %g1 ! give mkprom svt chance to reset tbr
call %g1
nop
set _cleanregs_custom_weak, %g1
call %g1
nop
#ifdef _FLAT
mov %g0, %wim
#else
/* ! assume that %sp is correct use cwp of psr to set the next window as invalid
mov %psr, %g2 ! extract cwp
and 0x1f, %g2,%g2
set 0x1, %g3
sll %g3,%g2,%g3 ! the bit mask for cwp
sll %g3, 1, %g4 ! rotate one to left
sethi %hi(_nwindows_min1), %g5 ! NWINDOWS-1
ld [%g5+%lo(_nwindows_min1)], %g5
srl %g3, %g5, %g5
or %g5, %g4, %g5
mov %g5, %wim
nop; nop; nop */
#endif
/*
mov %psr, %g2
set 0x202, %g3
sll %g3, %g2, %g2
mov %g2, %wim
nop; nop; nop
1:
*/
! -------------------------------
! only cpu 0 initializes
/* mov %psr, %g5
srl %g5, 24, %g5
and %g5, 3, %g5
subcc %g5, 3, %g0 ! leon2: 0 or 2, leon3: 3
bne callcpuinit
nop
*/
rd %asr17,%g5
srl %g5,28,%g5
cmp %g5,%g0
bne slavego
nop
callcpuinit:
call cpuinit
nop
call pnpinit
nop
slavego:
! -------------------------------
sub %sp, 0x40, %sp ! room for main to save args
call _start
nop
mov 1, %g1
ta 0 ! Halt if _main would return ...
nop
.global _fpdis,_fpdis_svt
_fpdis_svt:
_fpdis:
set 0x1000, %l4
andcc %l0, %l4, %l3
bne,a 4f
andn %l0, %l4, %l0
ta 0
4:
mov %l0, %psr ! restore %psr
nop; nop; nop
jmp %l2 ! Jump to nPC
rett %l2 + 4
/*
!''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
.section .bss
.global _nwindows, _leon_version, _nwindows_min1
_nwindows:
.word 8
_nwindows_min1:
.word 7
_leon_version:
.word 3
*/
|
stsp/newlib-ia16
| 2,100
|
libgloss/sparc_leon/crtn.S
|
! Copyright (C) 1992 Free Software Foundation, Inc.
! Written By David Vinayak Henkel-Wallace, June 1992
!
! This file is free software; you can redistribute it and/or modify it
! under the terms of the GNU General Public License as published by the
! Free Software Foundation; either version 2, or (at your option) any
! later version.
!
! In addition to the permissions in the GNU General Public License, the
! Free Software Foundation gives you unlimited permission to link the
! compiled version of this file with other programs, and to distribute
! those programs without any restriction coming from the use of this
! file. (The General Public License restrictions do apply in other
! respects; for example, they cover modification of the file, and
! distribution when not linked into another program.)
!
! This file is distributed in the hope that it will be useful, but
! WITHOUT ANY WARRANTY; without even the implied warranty of
! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
! General Public License for more details.
!
! You should have received a copy of the GNU General Public License
! along with this program; see the file COPYING. If not, write to
! the Free Software Foundation, 59 Temple Place - Suite 330,
! Boston, MA 02111-1307, USA.
!
! As a special exception, if you link this library with files
! compiled with GCC to produce an executable, this does not cause
! the resulting executable to be covered by the GNU General Public License.
! This exception does not however invalidate any other reasons why
! the executable file might be covered by the GNU General Public License.
!
! This file just makes sure that the .fini and .init sections do in
! fact return. Users may put any desired instructions in those sections.
! This file is the last thing linked into any executable.
.file "crtn.s"
.section ".init"
.align 4
#ifndef _FLAT
ret
restore
#else
ld [%sp+64], %o7
retl
add %sp, 96, %sp
#endif
.section ".fini"
.align 4
#ifndef _FLAT
ret
restore
#else
ld [%sp+64], %o7
retl
add %sp, 96, %sp
#endif
|
stsp/newlib-ia16
| 1,334
|
libgloss/sparc_leon/irqinstall.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
/* l0: psr
l1: pc
l2: npc
l3: wim
l7: irqnr */
.seg "text"
.global locore_readtbr
locore_readtbr:
retl
rd %tbr,%o0
|
stsp/newlib-ia16
| 2,111
|
libgloss/sparc_leon/crt0.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
.text
.global _start, main, _end
_start:
#ifndef _FLAT
save %sp, -64, %sp
#else
add %sp, -72, %sp
st %o7, [%sp+64]
#endif
/* clear the bss */
sethi %hi(__bss_start),%g2
or %g2,%lo(__bss_start),%g2 ! g2 = start of bss
sethi %hi(_end),%g3
or %g3,%lo(_end),%g3 ! g3 = end of bss
mov %g0,%g1 ! so std has two zeros
sub %g3, %g2, %g3
zerobss:
subcc %g3, 8, %g3
bge,a zerobss
std %g0,[%g2+%g3]
set _end, %o0
st %g0,[%o0]
call bdinit2
nop
call prelibchook
nop
call _call_initcalls /* atexit uses __atexit lock */
nop
set _fini, %o0
call atexit, 1
nop
call _init
nop
call main
nop
call _exit
nop
#ifndef _FLAT
ret
restore
#else
ld [%sp+64], %o7
retl
add %sp, 72, %sp
#endif
.seg "data"
.global .bdata
.bdata:
.align 8
.global _environ
_environ:
.word 1
|
stsp/newlib-ia16
| 4,425
|
libgloss/sparc_leon/contextswitch_asm.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/contextswitch.h>
#include <asm-leon/winmacros.h>
/* This asm code relies on the following offsets (setjmp.h):
#define THREAD_JB_SP 0
#define THREAD_JB_PC 1
#define THREAD_JB_PSR 8
#define THREAD_JB_WIM 9 */
/* Number of register windows */
.global _nwindows_min1, _nwindows
.text
.global _switch_to
_switch_to:
#ifndef _FLAT
!mov %o0,%i0 /* propagate env on restore */
!mov %o1,%i1 /* propagate val on restore */
!restore
mov %o0,%g7
mov %o1,%g3 /* former %%i1 (val) */
sethi %hi(_nwindows_min1), %g4 /* flush registers */
ld [%g4+%lo(_nwindows_min1)], %g4
1: save %sp, -SF_REGS_SZ, %sp !NWINDOWS-1 times
sub %g4,1,%g4
cmp %g0,%g4
bne 1b
nop
#else
mov %o0,%g7
mov %o1,%g3 /* former %%i1 (val) */
RW_STORE(sp)
#endif
ldd [%g7+THREAD_JB_PSR*4], %g4 /* load psr,wim */
wr %g4, 0x20, %psr
nop
nop
nop
ldd [%g7 +THREAD_JB_SP*4], %sp /* load sp, pc to jump to */
wr %g5, 0x0, %wim
RW_LOAD(sp) /* restore window */
wr %g4, 0x00, %psr
nop
nop
nop
jmp %o7 + 8 /* success */
mov %g3, %o0 /* return %%g3 */
.text
.global thread_setjmp, _do_thread_setjmp
thread_setjmp:
#ifdef _FLAT
RW_STORE(sp) /* store window */
#endif
! RW_STORE(sp) /* store window for _FLAT and normal, SWITCH_TO_STACK in pthread need this*/
mov %psr,%o2
#ifndef _SOFT_FLOAT
set 0x1000,%o3
andn %o2,%o3,%o2 !disable fpu
#endif
std %sp,[%o0] !THREAD_JB_SP
st %o2,[%o0+(8*4)] !THREAD_JB_PSR
ba _do_thread_setjmp
nop
|
stsp/newlib-ia16
| 7,213
|
libgloss/sparc_leon/locore_mvt.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* The traptable has to be the first code in a boot PROM. */
#include <asm-leon/head.h>
#define TRAP(H) mov %psr, %l0; sethi %hi(H), %l4; jmp %l4+%lo(H); nop;
#define TRAPL(H) mov %g0, %g4; sethi %hi(H), %g4; jmp %g4+%lo(H); nop;
#define TRAP_ENTRY(H) rd %psr, %l0; b H; rd %wim, %l3; nop;
/* srmmu trap */
#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b _srmmu_fault; mov 1, %l6;
#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b _srmmu_fault; mov 9, %l6;
#define WIM_INIT 2
#ifdef _SOFT_FLOAT
#define PSR_INIT 0x0e0
#else
#define PSR_INIT 0x10e0
#endif
#define NUMREGWINDOWS 8
/* Unexcpected trap will halt the processor by forcing it to error state */
#define BAD_TRAP ta 0; nop; nop; nop;
/* Software trap. Treat as BAD_TRAP */
#define SOFT_TRAP BAD_TRAP
.seg "text"
.global _trap_table, cpuinit, leonbare_irq_entry, _hardreset, _hardreset_mvt
.global _window_overflow, _window_underflow, _flush_windows, _fpdis_enable
.global start
start:
_trap_table:
TRAPL(_hardreset_mvt); ! 00 reset trap
SRMMU_TFAULT ! 01 instruction_access_exception (in mmu_asm.S)
BAD_TRAP; ! 02 illegal_instruction
BAD_TRAP; ! 03 priveleged_instruction
#ifndef _SOFT_FLOAT
TRAP(_fpdis_enable); ! 04 fp_disabled
#else
TRAP(_fpdis); ! 04 fp_disabled
#endif
#ifndef _FLAT
TRAP(_window_overflow); ! 05 window_overflow
TRAP(_window_underflow); ! 06 window_underflow
#else
BAD_TRAP; BAD_TRAP;
#endif
BAD_TRAP; ! 07 memory_address_not_aligned
BAD_TRAP; ! 08 fp_exception
SRMMU_DFAULT ! 09 data_access_exception (in mmu_asm.S)
BAD_TRAP; ! 0A tag_overflow
BAD_TRAP; ! 0B undefined
BAD_TRAP; ! 0C undefined
BAD_TRAP; ! 0D undefined
BAD_TRAP; ! 0E undefined
BAD_TRAP; ! 0F undefined
BAD_TRAP; ! 10 undefined
/* Interrupt entries */
TRAP_ENTRY_INTERRUPT(1); ! 11 interrupt level 1
TRAP_ENTRY_INTERRUPT(2); ! 12 interrupt level 2
TRAP_ENTRY_INTERRUPT(3); ! 13 interrupt level 3
TRAP_ENTRY_INTERRUPT(4); ! 14 interrupt level 4
TRAP_ENTRY_INTERRUPT(5); ! 15 interrupt level 5
TRAP_ENTRY_INTERRUPT(6); ! 16 interrupt level 6
TRAP_ENTRY_INTERRUPT(7); ! 17 interrupt level 7
TRAP_ENTRY_INTERRUPT(8); ! 18 interrupt level 8
TRAP_ENTRY_INTERRUPT(9); ! 19 interrupt level 9
TRAP_ENTRY_INTERRUPT(10); ! 1A interrupt level 1
TRAP_ENTRY_INTERRUPT(11); ! 1B interrupt level 11
TRAP_ENTRY_INTERRUPT(12); ! 1C interrupt level 12
TRAP_ENTRY_INTERRUPT(13); ! 1D interrupt level 13
TRAP_ENTRY_INTERRUPT(14); ! 1E interrupt level 14
TRAP_ENTRY_INTERRUPT(15); ! 1F interrupt level 15
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 20 - 23 undefined
BAD_TRAP; ! 24 cp_disabled
BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 25 - 27 undefined
BAD_TRAP; ! 28 cp_exception
BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 29 - 2B undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 2C - 2F undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 30 - 33 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 34 - 37 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 38 - 3B undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 3C - 3F undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 40 - 43 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 44 - 47 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 48 - 4B undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 4C - 4F undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 50 - 53 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 54 - 57 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 58 - 5B undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 5C - 5F undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 60 - 63 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 64 - 67 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 68 - 6B undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 6C - 6F undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 70 - 73 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74 - 77 undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78 - 7B undefined
BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 7C - 7F undefined
/* Software traps */
SOFT_TRAP; SOFT_TRAP; TRAP(_irqcall); ! 80 - 82
#ifndef _FLAT
TRAP_ENTRY(_flush_windows) ! 83
#else
SOFT_TRAP
#endif
SOFT_TRAP; ! 84
TRAP(_irqcall_disableirq); ! 85
SOFT_TRAP; SOFT_TRAP; ! 86 - 87
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 88 - 8B
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8C - 8F
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90 - 93
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94 - 97
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 98 - 9B
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 9C - 9F
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A0 - A3
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A4 - A7
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A8 - AB
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! AC - AF
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B0 - B3
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B4 - B7
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B8 - BB
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! BC - BF
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C0 - C3
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C4 - C7
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C8 - CB
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! CC - CF
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D0 - D3
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D4 - D7
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D8 - DB
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! DC - DF
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E0 - E3
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E4 - E7
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E8 - EB
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! EC - EF
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F0 - F3
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F4 - F7
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F8 - FB
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! FC - FF
|
stsp/newlib-ia16
| 3,412
|
libgloss/sparc_leon/nocache.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/elfmacro.h>
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/contextswitch.h>
#include <asm-leon/winmacros.h>
#include <asm-leon/leonbare_kernel.h>
FUNC_EXPORT(leonbare_leon23_loadnocache)
FUNC_EXPORT(leonbare_leon23_loadnocache16)
FUNC_EXPORT(leonbare_leon23_loadnocache8)
FUNC_EXPORT(leonbare_leon3_loadnocache)
FUNC_EXPORT(leonbare_leon3_loadnocache16)
FUNC_EXPORT(leonbare_leon3_loadnocache8)
FUNC_EXPORT(leonbare_leon23_storenocache)
FUNC_EXPORT(leonbare_leon23_storenocache16)
FUNC_EXPORT(leonbare_leon23_storenocache8)
FUNC_IMPORT(_leon_version)
.text
/* =================================== */
/* LEON2 / 3 */
/* load with forceing cache miss */
FUNC_BEGIN(leonbare_leon23_loadnocache) /* use only %o0,%o1,%o7 */
lda [%o0] ASI_LEON3_CACHEMISS, %o0
retl
nop
FUNC_END(leonbare_leon23_loadnocache)
/* load with forceing cache miss */
FUNC_BEGIN(leonbare_leon23_loadnocache16)
lduha [%o0] ASI_LEON3_CACHEMISS, %o0
retl
nop
FUNC_END(leonbare_leon23_loadnocache16)
/* load with forceing cache miss */
FUNC_BEGIN(leonbare_leon23_loadnocache8)
lduba [%o0] ASI_LEON3_CACHEMISS, %o0
retl
nop
FUNC_END(leonbare_leon23_loadnocache8)
/* write through cache */
FUNC_BEGIN(leonbare_leon23_storenocache) /* use only %o0,%o1,%o7 */
st %o1, [%o0]
retl
mov %o1,%o0
FUNC_END(leonbare_leon23_storenocache)
/* write through cache */
FUNC_BEGIN(leonbare_leon23_storenocache16)
sth %o1, [%o0]
retl
mov %o1,%o0
FUNC_END(leonbare_leon23_storenocache16)
/* write through cache */
FUNC_BEGIN(leonbare_leon23_storenocache8)
stb %o1, [%o0]
retl
mov %o1,%o0
FUNC_END(leonbare_leon23_storenocache8)
/* =================================== */
/* LEON3 only */
/* load with forceing cache miss */
FUNC_BEGIN(leonbare_leon3_loadnocache) /* use only %o0,%o1,%o7 */
retl
lda [%o0] ASI_LEON3_CACHEMISS, %o0
FUNC_END(leonbare_leon3_loadnocache)
/* load with forceing cache miss */
FUNC_BEGIN(leonbare_leon3_loadnocache16)
retl
lduha [%o0] ASI_LEON3_CACHEMISS, %o0
FUNC_END(leonbare_leon3_loadnocache16)
/* load with forceing cache miss */
FUNC_BEGIN(leonbare_leon3_loadnocache8)
retl
lduba [%o0] ASI_LEON3_CACHEMISS, %o0
FUNC_END(leonbare_leon3_loadnocache8)
|
stsp/newlib-ia16
| 5,024
|
libgloss/sparc_leon/locore_svtdisp.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* The traptable has to be the first code in a boot PROM. */
#include <asm-leon/head.h>
#define TRAP(H) mov %psr, %l0; sethi %hi(H), %l4; jmp %l4+%lo(H); nop;
#define TRAPL(H) mov %g0, %l0; sethi %hi(H), %l4; jmp %l4+%lo(H); nop;
#define TRAP_ENTRY(H) rd %psr, %l0; b H; rd %wim, %l3; nop;
#define WIM_INIT 2
#ifdef _SOFT_FLOAT
#define PSR_INIT 0x0e0
#else
#define PSR_INIT 0x10e0
#endif
#define NUMREGWINDOWS 8
/* Unexcpected trap will halt the processor by forcing it to error state */
#define BAD_TRAP ta 0; nop; nop; nop;
/* Software trap. Treat as BAD_TRAP */
#define SOFT_TRAP BAD_TRAP
#define TT_MASK 0xff0 // trap type mask from tbr
#define TT_SHL 4 // shift to get a tbr value
.seg "text"
/* ------- */
.weak _start_svt_weak
.set _start_svt_weak,_start_svt_disp
/* ------- */
.global _trap_table, cpuinit, _hardreset, _hardreset_svt
.global _fpdis_enable_svt,_fpdis_svt,_window_overflow_svt,_window_underflow_svt
.global _leonbare_irq_entry_svt,_irqcall_svt,_flush_windows_svt,_srmmu_fault_svt,_irqcall_disableirq_svt
.global start, _start_svt_real
_start_svt_real:
nop
_start_svt_disp:
rd %tbr, %l3
rd %psr, %l0
! here,locals have been set up as follows:
! %l0 = psr
! %l1 = pc
! %l2 = npc
! %l3 = tbr
and %l3,TT_MASK,%l3
srl %l3,TT_SHL,%l3
/*
struct get {
int start,end,func;
};
struct get table[3] = {
{0,1,..},
{0,0,0},
};
int gettrap(int nr){
struct get *p = table;
while((p->start) || (p->end) || (p->func)) {
if (p->start <= nr && p->end >= nr) {
return p->func;
}
p++;
}
return 0;
}
$sparc-elf-gcc -S gettrap.c -o test.S -O2
*/
#define loc_o0 l3
#define loc_o1 l4
#define loc_o2 l5
#define loc_o3 l6
sethi %hi(trap_table), %loc_o2
or %loc_o2, %lo(trap_table), %loc_o2
mov %loc_o0, %loc_o3
ld [%loc_o2], %loc_o1
.LL13:
cmp %loc_o1, %loc_o3
.LL12:
bg,a .LL11
add %loc_o2, 12, %loc_o2
ld [%loc_o2+4], %loc_o0
cmp %loc_o0, %loc_o3
bge,a .LL1
ld [%loc_o2+8], %loc_o0
add %loc_o2, 12, %loc_o2
.LL11:
ld [%loc_o2], %loc_o0
orcc %loc_o0, 0, %loc_o1
bne .LL12
cmp %loc_o1, %loc_o3
ld [%loc_o2+4], %loc_o0
cmp %loc_o0, 0
bne .LL12
cmp %loc_o1, %loc_o3
ld [%loc_o2+8], %loc_o0
cmp %loc_o0, 0
bne .LL12
cmp %loc_o1, %loc_o3
!not in table
BAD_TRAP
.LL1:
jmp %loc_o0
nop
.global trap_table,svt_trap_table_ext,svt_trap_table_ext_end
.section ".rodata"
.align 4
trap_table:
.long 0,0, _hardreset_svt
.long 1,1, _srmmu_fault_svt ! 01 instruction_access_exception (in mmu_asm.S)
.long 4,4
#ifndef _SOFT_FLOAT
.long _fpdis_enable_svt ! 04 fp_disabled
#else
.long _fpdis_svt ! 04 fp_disabled
#endif
#ifndef _FLAT
.long 5, 5, _window_overflow_svt ! 05 window_overflow
.long 6, 6, _window_underflow_svt ! 06 window_underflow
#endif
.long 9,9, _srmmu_fault_svt ! 09 data_access_exception (in mmu_asm.S)
.long 0x11,0x1f, _leonbare_irq_entry_svt ! 11-1f interrupt level
.long 0x82,0x82, _irqcall_svt ! 82
#ifndef _FLAT
.long 0x83,0x83, _flush_windows_svt ! 83
#endif
.long 0x85,0x85, _irqcall_disableirq_svt ! 85
svt_trap_table_ext:
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
.long 0,0,0
svt_trap_table_ext_end:
.long 0,0,0
|
stsp/newlib-ia16
| 1,343
|
libgloss/sparc_leon/locore_var_svt.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
.section .text
/* ------- */
.weak _hardreset_custom_svt_weak
.set _hardreset_custom_svt_weak,_hardreset_custom_svt_weak_dummy
/* ------- */
_hardreset_custom_svt_weak_dummy:
retl
nop
|
stsp/newlib-ia16
| 1,486
|
libgloss/sparc_leon/bdinit.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
.section .text
/* ------- */
.weak bdinit1
.set bdinit1,__bdinit1
/* ------- */
__bdinit1:
retl
nop
.section .text
/* ------- */
.weak bdinit2
.set bdinit2,__bdinit2
/* ------- */
__bdinit2:
retl
nop
.section .text
/* ------- */
.weak prelibchook
.set prelibchook,__prelibchook
/* ------- */
__prelibchook:
retl
nop
|
stsp/newlib-ia16
| 1,586
|
libgloss/sparc_leon/mmu_asm.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/asmmacro.h>
.seg "text"
! srmmu trap or data access trap
/* ------- */
.weak _srmmu_fault_svt
.set _srmmu_fault_svt,__srmmu_fault_svt
.weak _srmmu_fault
.set _srmmu_fault,__srmmu_fault
/* ------- */
/* 1 (inst) or 9 (data) in %l6 */
__srmmu_fault_svt:
__srmmu_fault:
ta 0; nop; nop; nop;
jmp %l1 ! Re-execute save.
rett %l2
|
stsp/newlib-ia16
| 3,128
|
libgloss/sparc_leon/irqtrap.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leonstack.h>
#include <asm-leon/asmmacro.h>
#include <asm-leon/winmacros.h>
#include <asm-leon/leon.h>
/* l0: psr
l1: pc
l2: npc
l3: wim
l7: irqnr */
.seg "text"
/* ------- */
.weak _leonbare_irq_entry_svt
.set _leonbare_irq_entry_svt,__leonbare_irq_entry_svt
.weak leonbare_irq_entry
.set leonbare_irq_entry,_leonbare_irq_entry
/* ------- */
!.global leonbare_irq_entry,_leonbare_irq_entry_svt
.global _irqtbl, _irqtrap, handler_irq, fpustate_current
__leonbare_irq_entry_svt: /* irq from svt trap dispatcher */
sub %l6,0x10, %l7
rd %wim, %l3
_leonbare_irq_entry:
set SPARC_PSR_EF_MASK,%l6
andn %l0, %l6, %l0 ! fpu off
SAVE_ALL
set nestcount,%o0
ld [%o0],%o1
add %o1,1,%o1
st %o1,[%o0]
#ifdef CONFIG_LEONBARE_NONESTEDIRQ
or %l0, SPARC_PSR_PIL_MASK, %o0 ! no nested irqs
wr %o0, SPARC_PSR_ET_MASK, %psr
WRITE_PAUSE
#else
sll %l7,SPARC_PSR_PIL_SHIFT,%o1
andn %l0,SPARC_PSR_PIL_MASK,%o0
or %l0, %o1, %o1
set nestedirq,%o0
ld [%o0],%o0
cmp %g0,%o0 ! no nested irqs?
beq,a .L1
or %o1, SPARC_PSR_PIL_MASK, %o1
.L1:
wr %o1, SPARC_PSR_ET_MASK, %psr
WRITE_PAUSE
#endif
mov %l7, %o0 ! irq level
call handler_irq ! void handler_irq (int irq, struct leonbare_pt_regs *pt_regs)
#ifndef _SOFT_FLOAT
add %sp, FW_REGS_SZ + 8 + SF_REGS_SZ , %o1 ! pt_regs ptr
#else
add %sp, SF_REGS_SZ , %o1 ! pt_regs ptr
#endif
or %l0, SPARC_PSR_PIL_MASK, %o1
wr %o1, SPARC_PSR_ET_MASK, %psr ! enable nesting again, keep ET up
WRITE_PAUSE
set nestcount,%o0
ld [%o0],%o1
sub %o1,1,%o1
st %o1,[%o0]
RESTORE_ALL
.seg "data"
.global nestedirq
.align 4
nestedirq:
.long 0
.global nestcount
.align 4
nestcount:
.long 0
|
stsp/newlib-ia16
| 1,499
|
libgloss/sparc_leon/locore_svt.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* The traptable has to be the first code in a boot PROM. */
#include <asm-leon/head.h>
.seg "text"
.global _trap_table, _start_svt_weak
.global start
/* Hardware traps */
/* svt code asumes that %g6 is never used in the code */
start:
_trap_table:
sethi %hi(_start_svt_weak), %g6
jmp %g6+%lo(_start_svt_weak)
nop
|
stsp/newlib-ia16
| 6,613
|
libgloss/sparc_leon/regwinflush.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/asmmacro.h>
.seg "data"
.global _lb_spillglobals, _lb_issideflush
.align 4
_lb_spillglobals:
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
_lb_issideflush:
.word 0 /* off: 28 */
.seg "text"
/* =============================================== */
#define _SV save %sp, -SF_REGS_SZ, %sp
#define _RS restore
/* ------- */
.weak _flush_windows
.set _flush_windows,__flush_windows
.weak _flush_windows_svt
.set _flush_windows_svt,__flush_windows_svt
/* ------- */
!.global _flush_windows,_flush_windows_svt
__flush_windows_svt:
rd %wim, %l3
__flush_windows:
SAVE_ALL
#ifndef _FLAT
set _lb_issideflush, %l3
st %l0, [%l3] /* mark as inside flush */
wr %l0, SPARC_PSR_ET_MASK, %psr
nop; nop; nop
_SV; _SV; _SV; _SV; _SV; _SV; _SV;
_RS; _RS; _RS; _RS; _RS; _RS; _RS;
set _lb_issideflush, %l3
st %g0, [%l3] /* mark as outside flush */
/* Advance over the trap instruction. */
ld [%sp + SF_REGS_SZ + PT_NPC], %l1
add %l1, 0x4, %l2
st %l1, [%sp + SF_REGS_SZ + PT_PC]
st %l2, [%sp + SF_REGS_SZ + PT_NPC]
#endif
RESTORE_ALL
/* =============================================== */
_irqcall_flush_windows:
#ifndef _FLAT
set _lb_spillglobals,%l4
st %g1,[%l4+0]
st %g4,[%l4+4]
st %l0,[%l4+16]
st %l1,[%l4+20]
st %l2,[%l4+24]
st %l4,[%l4+28] /* mark as inside flush */
restore
mov %psr, %g1
or %g1, SPARC_PSR_PIL_MASK, %g1
wr %g1, SPARC_PSR_ET_MASK, %psr /* disable irq, enable traps */
nop
nop
nop
sethi %hi(_nwindows_min1), %g4 /* flush registers */
ld [%g4+%lo(_nwindows_min1)], %g4
1: save /* NWINDOWS-1 times */
sub %g4,1,%g4
/*****************/
andncc %g4,0xff,%g0
be .lab1
nop
nop
.lab1: /*****************/
cmp %g4,%g0
bne 1b
nop
sethi %hi(_nwindows_min1), %g4
ld [%g4+%lo(_nwindows_min1)], %g4
2: restore /* NWINDOWS-1 times */
/*****************/
andncc %g4,0xff,%g0
be .lab2
nop
nop
.lab2: /*****************/
sub %g4,1,%g4
cmp %g4,%g0
bne 2b
nop
save
set _lb_spillglobals,%l4
ld [%l4+4], %g4
ld [%l4+0], %g1
ld [%l4+16],%l0
ld [%l4+20],%l1
ld [%l4+24],%l2
st %g0,[%l4+28] /* clean inside flush mark */
#endif
wr %l0, 0, %psr /* restore psr */
nop
nop
nop
jmpl %l2, %g0
rett %l2 + 4
/* =============================================== */
/* ------- */
.weak _irqcall_disableirq
.set _irqcall_disableirq,__irqcall_disableirq
.weak _irqcall_disableirq_svt
.set _irqcall_disableirq_svt,__irqcall_disableirq_svt
/* ------- */
__irqcall_disableirq:
__irqcall_disableirq_svt:
or %l0, SPARC_PSR_PIL_MASK, %l0
mov %l0, %psr
nop; nop; nop
jmpl %l2, %g0
rett %l2 + 4
/* =============================================== */
/*
* system call (ta 0x2):
* 2: irq_disable:
* o1 = 2
* 3: irq_enable:
* o0 = old_flags
* o1 = 3
* 4: enter supervisor mode (from user mode):
* o1 = 4
* 5: enter user mode:
* o1 = 5
* 6: flush windows
*
* On entry:
*
* l0 = psr (from trap table)
* l1 = pc
* l2 = npc
* i0 = system call id
*/
/* ------- */
.weak _irqcall
.set _irqcall,__irqcall
.weak _irqcall_svt
.set _irqcall_svt,__irqcall_svt
/* ------- */
!.global _irqcall,_irqcall_svt
__irqcall_svt:
__irqcall:
subcc %i1, 2, %g0 ! syscall 2, disable interrupts
bne 3f
or %l0, 0x0f00, %l4 ! set PIL=15
mov %l4, %psr
or %l0, SPARC_PSR_ET_MASK, %i0 ! return old psr with ET=1
ba,a 9f
3:
subcc %i1, 3, %g0 ! syscall 3, enable interrupts
bne 4f
and %i0, SPARC_PSR_PIL_MASK, %l4
andn %l0, SPARC_PSR_PIL_MASK, %l5
or %l5, %l4, %l4
mov %l4, %psr
ba,a 9f
4:
subcc %i1, 4, %g0 ! syscall 4, enter supervisor
bne 5f
mov %psr, %l4
or %l4,SPARC_PSR_PS_MASK,%l4
mov %l4, %psr ! set previous supervisor %psr
nop; nop; nop
ba,a 9f
5:
subcc %i1, 5, %g0 ! syscall 5, enter user
bne 6f
mov %psr, %l4
andn %l4,SPARC_PSR_PS_MASK,%l4
mov %l4, %psr ! clear previous supervisor %psr, return to user mode
nop; nop; nop
ba,a 9f
6:
subcc %i1, 6, %g0 ! syscall 6, flush windows
bne 1f
nop
ba,a _irqcall_flush_windows
1:
ta 0 ! halt
9: ! leave
jmpl %l2, %g0
rett %l2 + 4
/* =============================================== */
/* call _irqcall through trap */
.global leonbare_enable_traps !void leonbare_enable_traps(unsigned long old_flags);
leonbare_enable_traps:
set 3,%o1
retl
ta 0x2
/* =============================================== */
/* call _irqcall through trap */
.global leonbare_disable_traps !unsigned long leonbare_disable_traps();
leonbare_disable_traps:
set 2,%o1
retl
ta 0x2
/* =============================================== */
/* flush all windows */
.global leonbare_flush_windows !void leonbare_flush_windows();
leonbare_flush_windows:
set 6,%o1
retl
ta 0x2
|
stsp/newlib-ia16
| 3,673
|
libgloss/sparc_leon/busscan.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
!unsigned int ahbslv_scan(register unsigned int vendor,register unsigned int driver) {
! register unsigned int conf, mbar,i, *confp;
! register unsigned int cfg_area = (unsigned int ) (LEON3_IO_AREA | LEON3_CONF_AREA | LEON3_AHB_SLAVE_CONF_AREA);
! for (i = 0; i < LEON3_AHB_SLAVES; i++)
! {
! confp = (unsigned int*)(cfg_area + (i * LEON3_AHB_CONF_WORDS * 4));
! conf = *confp;
! //mbar = *(unsigned int*)(i * LEON3_AHB_CONF_WORDS+ (4 * 4));
! if ((amba_vendor(conf) == vendor) && (amba_device(conf) == driver)) {
! return (unsigned int)confp;
! }
! }
! return 0;
!}
.section ".text"
.global ahbslv_scan
.align 4
ahbslv_scan:
mov %o0, %g1
mov -2048, %o5
mov 0, %o3
sll %o3, 5, %o0
.LL11:
add %o5, %o0, %o4
ld [%o5+%o0], %o2
srl %o2, 24, %o0
cmp %o0, %g1
bne,a .LL10
add %o3, 1, %o3
srl %o2, 12, %o0
and %o0, 4095, %o0
cmp %o0, %o1
be .LL1
mov %o4, %o2
add %o3, 1, %o3
.LL10:
cmp %o3, 7
bleu,a .LL11
sll %o3, 5, %o0
mov 0, %o2
.LL1:
retl
mov %o2, %o0
!unsigned int apbslv_scan(register unsigned int base,register unsigned int vendor, register unsigned int driver) {
! register unsigned int conf, mbar,i, *confp;
! for (i = 0; i < LEON3_APB_SLAVES; i++)
! {
! confp = (unsigned int*)(base + (i * LEON3_APB_CONF_WORDS * 4));
! conf = *confp;
! //mbar = *(unsigned int*)(i * LEON3_AHB_CONF_WORDS+ (4 * 4));
! if ((amba_vendor(conf) == vendor) && (amba_device(conf) == driver)) {
! return (unsigned int)confp;
! }
! }
! return 0;
!}
.section ".text"
.align 4
.global apbslv_scan
apbslv_scan:
mov %o0, %g1
mov 0, %o4
sll %o4, 3, %o0
.LL22:
add %g1, %o0, %o5
ld [%g1+%o0], %o3
srl %o3, 24, %o0
cmp %o0, %o1
bne,a .LL21
add %o4, 1, %o4
srl %o3, 12, %o0
and %o0, 4095, %o0
cmp %o0, %o2
be .LL12
mov %o5, %o3
add %o4, 1, %o4
.LL21:
cmp %o4, 15
bleu,a .LL22
sll %o4, 3, %o0
mov 0, %o3
.LL12:
retl
mov %o3, %o0
!unsigned int getbase(register unsigned int *mbar,register unsigned int iobase) {
! register unsigned int conf = mbar[1];
! return ((iobase & 0xfff00000) |
! ((conf & 0xfff00000)>> 12)) & (((conf & 0x0000fff0) <<4) | 0xfff00000);
!
!}
.section ".text"
.align 4
.global iobar_getbase
iobar_getbase:
ld [%o0+4], %o2
sethi %hi(-1048576), %o3
and %o1, %o3, %o1
and %o2, %o3, %o0
srl %o0, 12, %o0
or %o1, %o0, %o1
sethi %hi(64512), %o0
or %o0, 1008, %o0
and %o2, %o0, %o2
sll %o2, 4, %o2
or %o2, %o3, %o2
and %o1, %o2, %o1
retl
mov %o1, %o0
|
stsp/newlib-ia16
| 3,503
|
libgloss/sparc_leon/irqtrap_fast.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leonstack.h>
#include <asm-leon/asmmacro.h>
#include <asm-leon/winmacros.h>
#include <asm-leon/leon.h>
/* l0: psr
l1: pc
l2: npc
l3: wim
l7: irqnr */
.seg "text"
/* ------- */
.weak _leonbare_irq_entry_svt
.set _leonbare_irq_entry_svt,__leonbare_irq_entry_svt
.weak leonbare_irq_entry
.set leonbare_irq_entry,_leonbare_irq_entry
/* ------- */
!.global leonbare_irq_entry,_leonbare_irq_entry_svt
.global _irqtbl, _irqtrap, handler_irq, fpustate_current
#define FASTIRQ_ENABLE
/*#define FASTIRQ_DYNAMIC*/ /* depend on FASTIRQ_ENABLE */
__leonbare_irq_entry_svt: /* irq from svt trap dispatcher */
sub %l6,0x10, %l7
rd %wim, %l3
_leonbare_irq_entry:
SAVE_ALL_FAST(.L3) ! fast irq processing, volatile %g6, use frame
.L3:
#ifdef __threadx__
set _tx_thread_system_state, %o0
ld [%o0],%o1
add %o1,1,%o1
st %o1,[%o0]
#endif
set nestcount,%o0
ld [%o0],%o1
add %o1,1,%o1
st %o1,[%o0]
#ifdef CONFIG_LEONBARE_NONESTEDIRQ
or %l0, SPARC_PSR_PIL_MASK, %o0 ! no nested irqs
wr %o0, SPARC_PSR_ET_MASK, %psr
WRITE_PAUSE
#else
sll %l7,SPARC_PSR_PIL_SHIFT,%o1
andn %l0,SPARC_PSR_PIL_MASK,%o0
or %o0, %o1, %o1
set nestedirq,%o0
ld [%o0],%o0
cmp %g0,%o0 ! no nested irqs?
beq,a .L1
or %o1, SPARC_PSR_PIL_MASK, %o1
.L1:
wr %o1, SPARC_PSR_ET_MASK, %psr
WRITE_PAUSE
#endif
mov %l7, %o0 ! irq level
call handler_irq ! void handler_irq (int irq, struct leonbare_pt_regs *pt_regs)
#ifndef _SOFT_FLOAT
add %sp, FW_REGS_SZ + 8 + SF_REGS_SZ , %o1 ! pt_regs ptr
#else
add %sp, SF_REGS_SZ , %o1 ! pt_regs ptr
#endif
or %l0, SPARC_PSR_PIL_MASK, %o1
wr %o1, SPARC_PSR_ET_MASK, %psr ! enable nesting again, keep ET up
WRITE_PAUSE
set nestcount,%o0
ld [%o0],%o1
sub %o1,1,%o1
st %o1,[%o0]
#ifdef __threadx__
set _tx_thread_system_state, %o0
ld [%o0],%o1
sub %o1,1,%o1
st %o1,[%o0]
#endif
RESTORE_ALL_FAST
.seg "data"
.global nestedirq
.align 4
nestedirq:
.long 0
.global fastirq
.align 4
fastirq:
.long 0
.global nestcount
.align 4
nestcount:
.long 0
|
stsp/newlib-ia16
| 2,255
|
libgloss/sparc_leon/crti.S
|
! Copyright (C) 1992 Free Software Foundation, Inc.
! Written By David Vinayak Henkel-Wallace, June 1992
!
! This file is free software; you can redistribute it and/or modify it
! under the terms of the GNU General Public License as published by the
! Free Software Foundation; either version 2, or (at your option) any
! later version.
!
! In addition to the permissions in the GNU General Public License, the
! Free Software Foundation gives you unlimited permission to link the
! compiled version of this file with other programs, and to distribute
! those programs without any restriction coming from the use of this
! file. (The General Public License restrictions do apply in other
! respects; for example, they cover modification of the file, and
! distribution when not linked into another program.)
!
! This file is distributed in the hope that it will be useful, but
! WITHOUT ANY WARRANTY; without even the implied warranty of
! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
! General Public License for more details.
!
! You should have received a copy of the GNU General Public License
! along with this program; see the file COPYING. If not, write to
! the Free Software Foundation, 59 Temple Place - Suite 330,
! Boston, MA 02111-1307, USA.
!
! As a special exception, if you link this library with files
! compiled with GCC to produce an executable, this does not cause
! the resulting executable to be covered by the GNU General Public License.
! This exception does not however invalidate any other reasons why
! the executable file might be covered by the GNU General Public License.
!
! This file just make a stack frame for the contents of the .fini and
! .init sections. Users may put any desired instructions in those
! sections.
! This file is linked in before the Values-Xx.o files and also before
! crtbegin, with which perhaps it should be merged.
.section ".init"
.global _init
.type _init,#function
.align 4
_init:
#ifndef _FLAT
save %sp, -96, %sp
#else
add %sp, -96, %sp
st %o7, [%sp + 64]
#endif
.section ".fini"
.global _fini
.type _fini,#function
.align 4
_fini:
#ifndef _FLAT
save %sp, -96, %sp
#else
add %sp, -96, %sp
st %o7, [%sp + 64]
#endif
|
stsp/newlib-ia16
| 3,480
|
libgloss/sparc_leon/lcpuinit.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define LEON3_IO_AREA 0xfff00000
#define LEON3_CONF_AREA 0xff000
#define VENDOR_GAISLER 0x01
#define GAISLER_APBMST 0x006
#define GAISLER_APBUART 0x00C
#define GAISLER_GPTIMER 0x011
.text
/* ------- */
.weak cpuinit
.set cpuinit,_cpuinit
/* ------- */
!.global cpuinit
_cpuinit:
mov %o7,%g6
mov %psr, %l3
srl %l3, 24, %g5
and %g5, 0xf, %g5
subcc %g5, 3, %0
be 1f
/* other versions */
ba 2f
! ####### leon3 #########
1: set 0x01, %o0 !VENDOR_GAISLER
set 0x006, %o1 !GAISLER_APBMST
call ahbslv_scan
nop
cmp %g0,%o0
be 2f
nop
ld [%o0+16],%g1
set 0xfff00000,%o0 !LEON3_IO_AREA
and %g1,%o0,%g1 !g1: apb base
set 0xff000,%o0 !LEON3_CONF_AREA
or %g1,%o0,%g2 !g2: apb conf base
! ####### uart #########
mov %g2,%o0
set 0x01 , %o1 ! VENDOR_GAISLER
set 0x00C,%o2 ! GAISLER_APBUART
call apbslv_scan
nop
cmp %g0,%o0
be 2f
nop
call iobar_getbase
mov %g1,%o1
set console, %g5
st %o1,[%g5] !uart base address
! ####### timer #########
mov %g2,%o0
set 0x01 , %o1 !VENDOR_GAISLER
set 0x011,%o2 !GAISLER_GPTIMER
call apbslv_scan
nop
cmp %g0,%o0
be 2f
nop
call iobar_getbase
mov %g1,%o1
add %o1,0x10,%o1
set rtc, %g5
st %o1,[%g5]
! ################
mov %g2,%o0
set 0x01 , %o1 !VENDOR_GAISLER
set 0x00D,%o2 !GAISLER_IRQMP
call apbslv_scan
nop
cmp %g0,%o0
be 2f
nop
call iobar_getbase
mov %g1,%o1
set irqmp, %g5
st %o1,[%g5]
ld [%o1+0x10], %o2
srl %o2, 16, %o2
and %o2, 15, %o2
st %o2,[%g5+4]
! ################
2: mov %g6,%o7
retl
nop
! force link of jiffies_64
.global jiffies_64
3: set jiffies_64,%g1
.data
.global irqmp
irqmp: .word 0 ! IRQMP base address
.word 0 ! extended irq number
.text
|
stsp/newlib-ia16
| 3,823
|
libgloss/sparc_leon/regwin_slow.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <asm-leon/leon.h>
#include <asm-leon/leonstack.h>
#include <asm-leon/asmmacro.h>
.seg "text"
/* Number of register windows */
.global _nwindows_min1, _nwindows
! Window overflow trap handler on save.
! Touches %g1
/* ------- */
.weak _window_overflow
.set _window_overflow,__window_overflow
.weak _window_overflow_svt
.set _window_overflow_svt,__window_overflow_svt
/* ------- */
!.global _window_overflow,_window_overflow_svt
.global __window_overflow_rettseq,__window_overflow_rettseq_ret,__window_overflow_slow1
__window_overflow_svt:
__window_overflow:
#ifndef _FLAT
__window_overflow_rettseq:
mov %wim, %l3 ! Calculate next WIM
mov %g1, %l7
srl %l3, 1, %g1
__window_overflow_rettseq_ret:
sethi %hi(_nwindows_min1), %l4 ! NWINDOWS-1
ld [%l4+%lo(_nwindows_min1)], %l4
sll %l3, %l4 , %l4
or %l4, %g1, %g1
save ! Get into window to be saved.
mov %g1, %wim
nop; nop; nop
std %l0, [%sp + 0];
std %l2, [%sp + 8];
std %l4, [%sp + 16];
std %l6, [%sp + 24];
std %i0, [%sp + 32];
std %i2, [%sp + 40];
std %i4, [%sp + 48];
std %i6, [%sp + 56];
restore ! Go back to trap window.
mov %l7, %g1
jmp %l1 ! Re-execute save.
rett %l2
nop
__window_overflow_slow1: ! space for possible stackcheck patch
nop
nop
#else
ta 0 ! halt
__window_overflow_rettseq:
__window_overflow_rettseq_ret:
__window_overflow_slow1:
nop
nop
nop
#endif
/* Window underflow trap handler on restore. */
! Touches %g1
/* ------- */
.weak _window_underflow
.set _window_underflow,__window_underflow
.weak _window_underflow_svt
.set _window_underflow_svt,__window_underflow_svt
/* ------- */
!.global _window_underflow,_window_underflow_svt
__window_underflow_svt:
__window_underflow:
#ifndef _FLAT
mov %wim, %l3 ! Calculate next WIM
sll %l3, 1, %l4
sethi %hi(_nwindows_min1), %l5 ! NWINDOWS-1
ld [%l5+%lo(_nwindows_min1)], %l5
srl %l3, %l5, %l5
or %l5, %l4, %l5
mov %l5, %wim
nop; nop; nop
restore ! Two restores to get into the
restore ! window to restore
ldd [%sp + 0], %l0; ! Restore window from the stack
ldd [%sp + 8], %l2;
ldd [%sp + 16], %l4;
ldd [%sp + 24], %l6;
ldd [%sp + 32], %i0;
ldd [%sp + 40], %i2;
ldd [%sp + 48], %i4;
ldd [%sp + 56], %i6;
save ! Get back to the trap window.
save
jmp %l1 ! Re-execute restore.
rett %l2
#else
ta 0 ! halt
#endif
|
stsp/newlib-ia16
| 2,200
|
libgloss/sparc_leon/locore_var.S
|
/*
* Copyright (c) 2011 Aeroflex Gaisler
*
* BSD license:
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
.section .text
/* ------- */
.weak _hardreset_custom_weak
.set _hardreset_custom_weak,_hardreset_custom_weak_dummy
/* ------- */
.global _nwindows, _leon_version, _nwindows_min1
_hardreset_custom_weak_dummy:
!''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
! get nwindows and leon version
mov %psr, %l3
srl %l3, 24, %g5
and %g5, 3, %g5
subcc %g5, 3, %g0 ! leon3: 3
bne 1f
nop
set _leon_version,%l0
set 3,%l1
st %l1,[%l0]
mov %asr17, %g5 ! leon3 has nwindows in %asr17
ba 2f
1:
/* other version */
2:
and %g5, 0x1f, %g5
set _nwindows_min1, %l3
st %g5, [%l3]
add %g5,1,%g5
set _nwindows, %l3
st %g5, [%l3]
set _nwindows_min2, %l3
sub %g5,2,%g5
st %g5, [%l3]
!''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
retl
nop
!''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
.section .data
.global _nwindows, _leon_version, _nwindows_min1, _nwindows_min2
_nwindows:
.word 8
_nwindows_min1:
.word 7
_nwindows_min2:
.word 6
_leon_version:
.word 3
|
stsp/newlib-ia16
| 2,064
|
libgloss/msp430/syscalls.S
|
/* Copyright (c) 2012, 2013 Red Hat, Inc. All rights reserved.
This copyrighted material is made available to anyone wishing to use, modify,
copy, or redistribute it subject to the terms and conditions of the BSD
License. This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY expressed or implied, including the implied warranties
of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. A copy of this license
is available at http://www.opensource.org/licenses. Any Red Hat trademarks that
are incorporated in the source code or documentation are not subject to the BSD
License and may only be used or replicated with the express permission of
Red Hat, Inc.
*/
/* Be wary: the lower N bits of the *address* of the function
determines the syscall used by the simulator. Thus, the addresses
listed here depend on the syscall numbers in ../syscalls.h. */
/* As per the MSP430x200 Family Users Guide, section 1.5, "An
instruction fetch from the address range 0x0000 - 0x01FF will reset
the device." We take advantage of that to do syscalls in the
simulator, by trying to execute specific addresses in that range
and letting the simulator catch them while simulating the CALL
instruction. In theory, this is an operation that the physical
hardware will never attempt to do, so it won't interfere with the
simulation's accuracy (i.e. we aren't abusing holes in the opcode
map, for example). */
#include "../syscall.h"
#include "memmodel.h"
.macro sc,a
sc2 \a,\a
.endm
.macro sc2,name,num
.weak \name
.global \name
\name = 0x180 + \num
.endm
#define SC(n) sc2 n,SYS_##n
sc2 _exit,SYS_exit
SC (exit)
SC (open)
SC (close)
SC (read)
/* SC (write)*/
SC (fstat)
SC (lseek)
SC (kill)
.weak isatty
.global isatty
isatty:
.weak _isatty
.global _isatty
_isatty:
MOV #1,R12
ret_
.weak getpid
.global getpid
getpid:
MOV #42,R12
ret_
.weak gettimeofday
.global gettimeofday
gettimeofday:
MOV #0,R12
ret_
.size gettimeofday , . - gettimeofday
|
stsp/newlib-ia16
| 1,796
|
libgloss/msp430/crt_bss.S
|
/* Copyright (c) 2012-2013 Red Hat Incorporated.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
The name of Red Hat Incorporated may not be used to endorse
or promote products derived from this software without specific
prior written permission.
This software is provided by the copyright holders and contributors
"AS IS" and any express or implied warranties, including, but not
limited to, the implied warranties of merchantability and fitness for
a particular purpose are disclaimed. In no event shall Red Hat
incorporated be liable for any direct, indirect, incidental, special,
exemplary, or consequential damages (including, but not limited to,
procurement of substitute goods or services; loss of use, data, or
profits; or business interruption) however caused and on any theory of
liability, whether in contract, strict liability, or tort (including
negligence or otherwise) arising in any way out of the use of this
software, even if advised of the possibility of such damage. */
#include "memmodel.h"
.section ".crt_bss", "ax", @progbits
.global __crt0_init_bss
__crt0_init_bss:
mov_ #__bssstart, R12
clr.w R13
mov.w #__bsssize, R14
#ifdef __MSP430X_LARGE__
clr.w R15 ; We assume that __bsssize is never > 64M
#endif
call_ #memset
|
stsp/newlib-ia16
| 7,668
|
libgloss/msp430/crt0.S
|
/* Copyright (c) 2012-2015 Red Hat, Inc. All rights reserved.
This copyrighted material is made available to anyone wishing to use, modify,
copy, or redistribute it subject to the terms and conditions of the BSD
License. This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY expressed or implied, including the implied warranties
of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. A copy of this license
is available at http://www.opensource.org/licenses. Any Red Hat trademarks that
are incorporated in the source code or documentation are not subject to the BSD
License and may only be used or replicated with the express permission of
Red Hat, Inc.
*/
#include "memmodel.h"
;; The linker links all .crt_* sections in asciibetical order at the
;; same place. So, the four digits in .crt_NNNN_xxx name created by
;; the START_CRT_FUNC macro determine the link order, so, keep them
;; in sequential order here. The first two digits are set here, the
;; second two allow users to insert code between code fragments here.
#if L0
.section ".resetvec", "a"
__msp430_resetvec_hook:
.word __crt0_start
;; Here we provide weak definitions of the symbols used in the
;; init_highbss and move_highdata blocks, in case they are not
;; provided by the linker script. They are defined here because
;; this block is always included in every executable, and because
;; if there were defined in the blocks that need them their values
;; would be used without giving the linker script a chance to
;; override them.
;;
;; The weak definitions are needed if the user targets an MCU
;; without high memory - and hence uses a linker script without
;; a definition of the .upper.bss or .upper.data sections - and
;; they have compiled their code with the -mdata-region=either
;; command line option. That option causes the assembler to
;; define the __crt0_move_highdata and/or crt0_init_highbss
;; symbols, which in turn forces the inclusion of the
;; move_highdata and/or init_highbss blocks in the startup code,
;; regardless of the fact that the sections are not present in
;; the linker script.
WEAK_DEF __upper_data_init
WEAK_DEF __rom_highdatacopysize
WEAK_DEF __high_datastart
WEAK_DEF __rom_highdatastart
WEAK_DEF __high_bssstart
WEAK_DEF __high_bsssize
START_CRT_FUNC 0000 start
.refsym __msp430_resetvec_hook
#ifdef MINRT
.refsym __crt0_call_just_main
#else
.refsym __crt0_call_init_then_main
#endif
mov_ #__stack, R1
END_CRT_FUNC start
#endif
#if Lbss
;; Note - this section is only included in the startup code of the
;; application if it is needed. It is responsible for initializing
;; the contents of the .bss section.
START_CRT_FUNC 0100 init_bss
mov_ #__bssstart, R12
clr.w R13
mov.w #__bsssize, R14
#ifdef __MSP430X_LARGE__
clr.w R15 ; We assume that __bsssize is never > 64M
#endif
call_ #memset
END_CRT_FUNC init_bss
#endif /* Lbss */
#ifdef __MSP430X_LARGE__
#if Lhigh_bss
;; Note - this section is only included in the startup code of the
;; application if it is needed. It is responsible for initializing
;; the contents of the .upper.bss section.
START_CRT_FUNC 0200 init_highbss
mov_ #__high_bssstart, R12
mov.w #0, R13
mov_ #__high_bsssize, R14
;; If __high_bsssize is zero then skip the call to memset.
;; This can happen if all of the bss data was placed into .either.bss.
cmp.w #0, R14
jeq 1f
call_ #memset
1:
END_CRT_FUNC init_highbss
#endif /* Lhigh_bss */
#endif /* __MSP430X_LARGE__ */
#if Lmovedata
;; Note - this section is only included in the startup code of the
;; application if it is needed. It is responsible for copying the
;; contents of the .data section from its load address (in ROM) to
;; its run-time address (in RAM).
START_CRT_FUNC 0300 movedata
mov_ #__datastart, R12
mov_ #__romdatastart, R13
;; memmove and memcpy do not currently work when src == dst
cmp_ R12, R13
jeq 1f
mov_ #__romdatacopysize, R14
call_ #memmove
1:
END_CRT_FUNC movedata
#endif /* Lmovedata */
#ifdef __MSP430X_LARGE__
#if Lmove_highdata
;; Note - this section is only included in the startup code of the application
;; if it is needed. It is responsible either for making sure that the
;; contents of the .upper.data section have their correct startup values.
;; If a copy of the .upper.data section is stored in ROM then this means
;; copying the contents into HIFRAM. If a copy of .upper.data is stored in a
;; shadow section in HIFRAM then this means copying from the shadow section
;; into the real section.
START_CRT_FUNC 0400 move_highdata
;; __rom_highdatacopysize may be zero. Test this first because
;; its value may come from the weak definitions above and we do
;; not want to access the memory at address 0 pointed to by the
;; weak definition of __upper_data_init.
mov.w #__rom_highdatacopysize, R14
cmp.w #0, R14
jeq 3f
/* Test our status word. */
cmpx.w #0, &__upper_data_init
jeq 1f
/* Status word is non-zero - copy from shadow into upper. */
mov_ #__high_datastart, R12
mov_ #__rom_highdatastart, R13
jmp 2f
1: /* Status word is zero. Copy from upper to shadow and change status word. */
movx.w #1, &__upper_data_init
mov_ #__rom_highdatastart, R12
mov_ #__high_datastart, R13
2: ;; __rom_highdatacopysize may be zero. memmove should cope.
mov.w #__rom_highdatacopysize, R14
call_ #memmove
3:
END_CRT_FUNC move_highdata
#endif /* Lmove_highdata */
#endif /* __MSP430X_LARGE__ */
#if Lmain_minrt
;; Note - this section is only included in the startup code of the
;; application if it is needed. It is responsible for just calling
;; main. No initialization code is called first, and main is not
;; expected to return.
START_CRT_FUNC 0600 call_just_main
clr.w R12 ; Set argc == 0
call_ #main
END_CRT_FUNC call_just_main
#endif /* Lmain_minrt */
#if Lmain
;; Note - this section is only included in the startup code of the
;; application if it is needed. It is responsible for calling the
;; initialization code - constructors, etc - and then main. If main
;; returns then the following section should be present to catch it.
START_CRT_FUNC 0700 call_init_then_main
call_ #__msp430_init
clr.w R12 ; Set argc == 0
call_ #main
END_CRT_FUNC call_init_then_main
#endif /* Lmain */
#if Lcallexit
;; Note - this section is only included in the startup code of the
;; application if it is needed. It is responsible for calling exit
;; once main has finished.
START_CRT_FUNC 0800 call_exit
call_ #_exit
END_CRT_FUNC call_exit
#endif /* Lcallexit */
;----------------------------------------
#ifndef MINRT
#if L0
.section ".crt_0900main_init", "ax", @progbits
.global _msp430_run_init_array
.type _msp430_run_init_array,@function
_msp430_run_init_array:
mov_ #__init_array_start, R4
mov_ #__init_array_end, R5
mov_ #PTRsz, R6
br_ #_msp430_run_array
.global _msp430_run_preinit_array
.type _msp430_run_preinit_array,@function
_msp430_run_preinit_array:
mov_ #__preinit_array_start, R4
mov_ #__preinit_array_end, R5
mov_ #PTRsz, R6
br_ #_msp430_run_array
.global _msp430_run_fini_array
.type _msp430_run_fini_array,@function
_msp430_run_fini_array:
mov_ #__fini_array_start, R4
mov_ #__fini_array_end, R5
mov_ #-PTRsz, R6
br_ #_msp430_run_array
_msp430_run_array:
cmp_ R4, R5
jeq _msp430_run_done
mov_ @R4, R7
add_ R6, R4
call_ @R7
br_ _msp430_run_array
_msp430_run_done:
ret_
;----------------------------------------
.section .init,"ax"
.global __msp430_init
__msp430_init:
.section .fini,"ax"
.global __msp430_fini
__msp430_fini:
call_ #_msp430_run_fini_array
#endif
#endif /* not MINRT */
|
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