IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/vmxnet3/extr_vmxnet3_drv.c_vmxnet3_xmit_frame.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/vmxnet3/extr_vmxnet3_drv.c_vmxnet3_xmit_frame.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vmxnet3_adapter = type { i64, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @vmxnet3_xmit_frame], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vmxnet3_xmit_frame(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %1) #2
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = load i64, ptr %3, align 8, !tbaa !10
%6 = icmp ugt i64 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @BUG_ON(i32 noundef %7) #2
%9 = getelementptr inbounds %struct.vmxnet3_adapter, ptr %3, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = load i64, ptr %0, align 8, !tbaa !5
%12 = getelementptr inbounds i32, ptr %10, i64 %11
%13 = tail call i32 @vmxnet3_tq_xmit(ptr noundef nonnull %0, ptr noundef %12, ptr noundef nonnull %3, ptr noundef %1) #2
ret i32 %13
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @vmxnet3_tq_xmit(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sk_buff", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"vmxnet3_adapter", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/vmxnet3/extr_vmxnet3_drv.c_vmxnet3_xmit_frame.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/vmxnet3/extr_vmxnet3_drv.c_vmxnet3_xmit_frame.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vmxnet3_xmit_frame], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @vmxnet3_xmit_frame(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %1) #2
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = load i64, ptr %3, align 8, !tbaa !11
%6 = icmp ugt i64 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @BUG_ON(i32 noundef %7) #2
%9 = getelementptr inbounds i8, ptr %3, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !14
%11 = load i64, ptr %0, align 8, !tbaa !6
%12 = getelementptr inbounds i32, ptr %10, i64 %11
%13 = tail call i32 @vmxnet3_tq_xmit(ptr noundef nonnull %0, ptr noundef %12, ptr noundef nonnull %3, ptr noundef %1) #2
ret i32 %13
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @vmxnet3_tq_xmit(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sk_buff", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"vmxnet3_adapter", !8, i64 0, !13, i64 8}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!12, !13, i64 8}
| fastsocket_kernel_drivers_net_vmxnet3_extr_vmxnet3_drv.c_vmxnet3_xmit_frame |
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_iter.c_zfs_snapshot_compare.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_iter.c_zfs_snapshot_compare.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ZFS_PROP_CREATETXG = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @zfs_snapshot_compare], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @zfs_snapshot_compare(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %1, align 8, !tbaa !5
%5 = load i32, ptr @ZFS_PROP_CREATETXG, align 4, !tbaa !10
%6 = tail call i32 @zfs_prop_get_int(ptr noundef %3, i32 noundef %5) #2
%7 = load i32, ptr @ZFS_PROP_CREATETXG, align 4, !tbaa !10
%8 = tail call i32 @zfs_prop_get_int(ptr noundef %4, i32 noundef %7) #2
%9 = tail call i32 @AVL_CMP(i32 noundef %6, i32 noundef %8) #2
ret i32 %9
}
declare i32 @zfs_prop_get_int(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @AVL_CMP(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_iter.c_zfs_snapshot_compare.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libzfs/common/extr_libzfs_iter.c_zfs_snapshot_compare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ZFS_PROP_CREATETXG = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @zfs_snapshot_compare], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @zfs_snapshot_compare(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %1, align 8, !tbaa !6
%5 = load i32, ptr @ZFS_PROP_CREATETXG, align 4, !tbaa !11
%6 = tail call i32 @zfs_prop_get_int(ptr noundef %3, i32 noundef %5) #2
%7 = load i32, ptr @ZFS_PROP_CREATETXG, align 4, !tbaa !11
%8 = tail call i32 @zfs_prop_get_int(ptr noundef %4, i32 noundef %7) #2
%9 = tail call i32 @AVL_CMP(i32 noundef %6, i32 noundef %8) #2
ret i32 %9
}
declare i32 @zfs_prop_get_int(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @AVL_CMP(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| freebsd_cddl_contrib_opensolaris_lib_libzfs_common_extr_libzfs_iter.c_zfs_snapshot_compare |
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_bsf.c_av_bsf_list_free.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_bsf.c_av_bsf_list_free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @av_bsf_list_free(ptr noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %25, label %4
4: ; preds = %1
%5 = load i32, ptr %2, align 8, !tbaa !9
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %4, %7
%8 = phi i64 [ %14, %7 ], [ 0, %4 ]
%9 = phi ptr [ %15, %7 ], [ %2, %4 ]
%10 = getelementptr inbounds %struct.TYPE_4__, ptr %9, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = getelementptr inbounds i32, ptr %11, i64 %8
%13 = tail call i32 @av_bsf_free(ptr noundef %12) #2
%14 = add nuw nsw i64 %8, 1
%15 = load ptr, ptr %0, align 8, !tbaa !5
%16 = load i32, ptr %15, align 8, !tbaa !9
%17 = sext i32 %16 to i64
%18 = icmp slt i64 %14, %17
br i1 %18, label %7, label %19, !llvm.loop !13
19: ; preds = %7, %4
%20 = phi ptr [ %2, %4 ], [ %15, %7 ]
%21 = getelementptr inbounds %struct.TYPE_4__, ptr %20, i64 0, i32 1
%22 = load ptr, ptr %21, align 8, !tbaa !12
%23 = tail call i32 @av_free(ptr noundef %22) #2
%24 = tail call i32 @av_freep(ptr noundef nonnull %0) #2
br label %25
25: ; preds = %1, %19
ret void
}
declare i32 @av_bsf_free(ptr noundef) local_unnamed_addr #1
declare i32 @av_free(ptr noundef) local_unnamed_addr #1
declare i32 @av_freep(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_4__", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_bsf.c_av_bsf_list_free.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_bsf.c_av_bsf_list_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @av_bsf_list_free(ptr noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %25, label %4
4: ; preds = %1
%5 = load i32, ptr %2, align 8, !tbaa !10
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %19
7: ; preds = %4, %7
%8 = phi i64 [ %14, %7 ], [ 0, %4 ]
%9 = phi ptr [ %15, %7 ], [ %2, %4 ]
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = getelementptr inbounds i32, ptr %11, i64 %8
%13 = tail call i32 @av_bsf_free(ptr noundef %12) #2
%14 = add nuw nsw i64 %8, 1
%15 = load ptr, ptr %0, align 8, !tbaa !6
%16 = load i32, ptr %15, align 8, !tbaa !10
%17 = sext i32 %16 to i64
%18 = icmp slt i64 %14, %17
br i1 %18, label %7, label %19, !llvm.loop !14
19: ; preds = %7, %4
%20 = phi ptr [ %2, %4 ], [ %15, %7 ]
%21 = getelementptr inbounds i8, ptr %20, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !13
%23 = tail call i32 @av_free(ptr noundef %22) #2
%24 = tail call i32 @av_freep(ptr noundef nonnull %0) #2
br label %25
25: ; preds = %1, %19
ret void
}
declare i32 @av_bsf_free(ptr noundef) local_unnamed_addr #1
declare i32 @av_free(ptr noundef) local_unnamed_addr #1
declare i32 @av_freep(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| FFmpeg_libavcodec_extr_bsf.c_av_bsf_list_free |
; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libfat/extr_cache.c__FAT_cache_destructor.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libfat/extr_cache.c__FAT_cache_destructor.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, ptr, ptr }
; Function Attrs: nounwind uwtable
define dso_local void @_FAT_cache_destructor(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @_FAT_cache_flush(ptr noundef %0) #2
%3 = load i32, ptr %0, align 8, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %13, %7 ]
%9 = load ptr, ptr %6, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_5__, ptr %9, i64 %8, i32 2
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = tail call i32 @_FAT_mem_free(ptr noundef %11) #2
%13 = add nuw nsw i64 %8, 1
%14 = load i32, ptr %0, align 8, !tbaa !5
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %13, %15
br i1 %16, label %7, label %17, !llvm.loop !13
17: ; preds = %7, %1
%18 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !11
%20 = tail call i32 @_FAT_mem_free(ptr noundef %19) #2
%21 = tail call i32 @_FAT_mem_free(ptr noundef nonnull %0) #2
ret void
}
declare i32 @_FAT_cache_flush(ptr noundef) local_unnamed_addr #1
declare i32 @_FAT_mem_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !10, i64 16}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libfat/extr_cache.c__FAT_cache_destructor.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libfat/extr_cache.c__FAT_cache_destructor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, ptr, ptr }
; Function Attrs: nounwind ssp uwtable(sync)
define void @_FAT_cache_destructor(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @_FAT_cache_flush(ptr noundef %0) #2
%3 = load i32, ptr %0, align 8, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %13, %7 ]
%9 = load ptr, ptr %6, align 8, !tbaa !12
%10 = getelementptr inbounds %struct.TYPE_5__, ptr %9, i64 %8, i32 2
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = tail call i32 @_FAT_mem_free(ptr noundef %11) #2
%13 = add nuw nsw i64 %8, 1
%14 = load i32, ptr %0, align 8, !tbaa !6
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %13, %15
br i1 %16, label %7, label %17, !llvm.loop !14
17: ; preds = %7, %1
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !12
%20 = tail call i32 @_FAT_mem_free(ptr noundef %19) #2
%21 = tail call i32 @_FAT_mem_free(ptr noundef nonnull %0) #2
ret void
}
declare i32 @_FAT_cache_flush(ptr noundef) local_unnamed_addr #1
declare i32 @_FAT_mem_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !11, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| RetroArch_wii_libogc_libfat_extr_cache.c__FAT_cache_destructor |
; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_mt9m032.c_mt9m032_enum_frame_size.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_mt9m032.c_mt9m032_enum_frame_size.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.v4l2_subdev_frame_size_enum = type { i64, i64, ptr, ptr, ptr, ptr }
@MEDIA_BUS_FMT_Y8_1X8 = dso_local local_unnamed_addr global i64 0, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@MT9M032_COLUMN_SIZE_DEF = dso_local local_unnamed_addr global ptr null, align 8
@MT9M032_ROW_SIZE_DEF = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @mt9m032_enum_frame_size], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i32 @mt9m032_enum_frame_size(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr nocapture noundef %2) #0 {
%4 = load i64, ptr %2, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = getelementptr inbounds %struct.v4l2_subdev_frame_size_enum, ptr %2, i64 0, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !11
%9 = load i64, ptr @MEDIA_BUS_FMT_Y8_1X8, align 8, !tbaa !12
%10 = icmp eq i64 %8, %9
br i1 %10, label %14, label %11
11: ; preds = %6, %3
%12 = load i32, ptr @EINVAL, align 4, !tbaa !13
%13 = sub nsw i32 0, %12
br label %21
14: ; preds = %6
%15 = load ptr, ptr @MT9M032_COLUMN_SIZE_DEF, align 8, !tbaa !15
%16 = getelementptr inbounds %struct.v4l2_subdev_frame_size_enum, ptr %2, i64 0, i32 5
store ptr %15, ptr %16, align 8, !tbaa !16
%17 = getelementptr inbounds %struct.v4l2_subdev_frame_size_enum, ptr %2, i64 0, i32 4
store ptr %15, ptr %17, align 8, !tbaa !17
%18 = load ptr, ptr @MT9M032_ROW_SIZE_DEF, align 8, !tbaa !15
%19 = getelementptr inbounds %struct.v4l2_subdev_frame_size_enum, ptr %2, i64 0, i32 3
store ptr %18, ptr %19, align 8, !tbaa !18
%20 = getelementptr inbounds %struct.v4l2_subdev_frame_size_enum, ptr %2, i64 0, i32 2
store ptr %18, ptr %20, align 8, !tbaa !19
br label %21
21: ; preds = %14, %11
%22 = phi i32 [ %13, %11 ], [ 0, %14 ]
ret i32 %22
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"v4l2_subdev_frame_size_enum", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!10, !10, i64 0}
!16 = !{!6, !10, i64 40}
!17 = !{!6, !10, i64 32}
!18 = !{!6, !10, i64 24}
!19 = !{!6, !10, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_mt9m032.c_mt9m032_enum_frame_size.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_mt9m032.c_mt9m032_enum_frame_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MEDIA_BUS_FMT_Y8_1X8 = common local_unnamed_addr global i64 0, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@MT9M032_COLUMN_SIZE_DEF = common local_unnamed_addr global ptr null, align 8
@MT9M032_ROW_SIZE_DEF = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @mt9m032_enum_frame_size], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @mt9m032_enum_frame_size(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr nocapture noundef %2) #0 {
%4 = load i64, ptr %2, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = getelementptr inbounds i8, ptr %2, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = load i64, ptr @MEDIA_BUS_FMT_Y8_1X8, align 8, !tbaa !13
%10 = icmp eq i64 %8, %9
br i1 %10, label %14, label %11
11: ; preds = %6, %3
%12 = load i32, ptr @EINVAL, align 4, !tbaa !14
%13 = sub nsw i32 0, %12
br label %21
14: ; preds = %6
%15 = load ptr, ptr @MT9M032_COLUMN_SIZE_DEF, align 8, !tbaa !16
%16 = getelementptr inbounds i8, ptr %2, i64 40
store ptr %15, ptr %16, align 8, !tbaa !17
%17 = getelementptr inbounds i8, ptr %2, i64 32
store ptr %15, ptr %17, align 8, !tbaa !18
%18 = load ptr, ptr @MT9M032_ROW_SIZE_DEF, align 8, !tbaa !16
%19 = getelementptr inbounds i8, ptr %2, i64 24
store ptr %18, ptr %19, align 8, !tbaa !19
%20 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %18, ptr %20, align 8, !tbaa !20
br label %21
21: ; preds = %14, %11
%22 = phi i32 [ %13, %11 ], [ 0, %14 ]
ret i32 %22
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"v4l2_subdev_frame_size_enum", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!7, !11, i64 40}
!18 = !{!7, !11, i64 32}
!19 = !{!7, !11, i64 24}
!20 = !{!7, !11, i64 16}
| linux_drivers_media_i2c_extr_mt9m032.c_mt9m032_enum_frame_size |
; ModuleID = 'AnghaBench/linux/drivers/net/ieee802154/extr_ca8210.c_ca8210_set_channel.c'
source_filename = "AnghaBench/linux/drivers/net/ieee802154/extr_ca8210.c_ca8210_set_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PHY_CURRENT_CHANNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [53 x i8] c"error setting channel, MLME-SET.confirm status = %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ca8210_set_channel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ca8210_set_channel(ptr nocapture noundef readonly %0, i64 %1, i64 noundef %2) #0 {
%4 = alloca i64, align 8
store i64 %2, ptr %4, align 8, !tbaa !5
%5 = load ptr, ptr %0, align 8, !tbaa !9
%6 = load i32, ptr @PHY_CURRENT_CHANNEL, align 4, !tbaa !12
%7 = load ptr, ptr %5, align 8, !tbaa !14
%8 = call i64 @mlme_set_request_sync(i32 noundef %6, i32 noundef 0, i32 noundef 1, ptr noundef nonnull %4, ptr noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load ptr, ptr %5, align 8, !tbaa !14
%12 = call i32 @dev_err(ptr noundef %11, ptr noundef nonnull @.str, i64 noundef %8) #2
br label %13
13: ; preds = %10, %3
%14 = call i32 @link_to_linux_err(i64 noundef %8) #2
ret i32 %14
}
declare i64 @mlme_set_request_sync(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @link_to_linux_err(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ieee802154_hw", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"ca8210_priv", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ieee802154/extr_ca8210.c_ca8210_set_channel.c'
source_filename = "AnghaBench/linux/drivers/net/ieee802154/extr_ca8210.c_ca8210_set_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PHY_CURRENT_CHANNEL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [53 x i8] c"error setting channel, MLME-SET.confirm status = %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ca8210_set_channel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ca8210_set_channel(ptr nocapture noundef readonly %0, i64 %1, i64 noundef %2) #0 {
%4 = alloca i64, align 8
store i64 %2, ptr %4, align 8, !tbaa !6
%5 = load ptr, ptr %0, align 8, !tbaa !10
%6 = load i32, ptr @PHY_CURRENT_CHANNEL, align 4, !tbaa !13
%7 = load ptr, ptr %5, align 8, !tbaa !15
%8 = call i64 @mlme_set_request_sync(i32 noundef %6, i32 noundef 0, i32 noundef 1, ptr noundef nonnull %4, ptr noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load ptr, ptr %5, align 8, !tbaa !15
%12 = call i32 @dev_err(ptr noundef %11, ptr noundef nonnull @.str, i64 noundef %8) #2
br label %13
13: ; preds = %10, %3
%14 = call i32 @link_to_linux_err(i64 noundef %8) #2
ret i32 %14
}
declare i64 @mlme_set_request_sync(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @link_to_linux_err(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ieee802154_hw", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"ca8210_priv", !12, i64 0}
| linux_drivers_net_ieee802154_extr_ca8210.c_ca8210_set_channel |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/sun4i/extr_sun8i_vi_scaler.c_sun8i_vi_scaler_set_coeff.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/sun4i/extr_sun8i_vi_scaler.c_sun8i_vi_scaler_set_coeff.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_format_info = type { i32, i32 }
@lan3coefftab32_left = dso_local local_unnamed_addr global ptr null, align 8
@lan3coefftab32_right = dso_local local_unnamed_addr global ptr null, align 8
@lan2coefftab32 = dso_local local_unnamed_addr global ptr null, align 8
@bicubic8coefftab32_left = dso_local local_unnamed_addr global ptr null, align 8
@bicubic8coefftab32_right = dso_local local_unnamed_addr global ptr null, align 8
@bicubic4coefftab32 = dso_local local_unnamed_addr global ptr null, align 8
@SUN8I_VI_SCALER_COEFF_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sun8i_vi_scaler_set_coeff], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sun8i_vi_scaler_set_coeff(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 %3, ptr nocapture noundef readonly %4) #0 {
%6 = load i32, ptr %4, align 4, !tbaa !5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = getelementptr inbounds %struct.drm_format_info, ptr %4, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = icmp eq i32 %10, 1
br i1 %11, label %13, label %12
12: ; preds = %8, %5
br label %13
13: ; preds = %8, %12
%14 = phi ptr [ @bicubic8coefftab32_left, %12 ], [ @lan3coefftab32_left, %8 ]
%15 = phi ptr [ @bicubic8coefftab32_right, %12 ], [ @lan3coefftab32_right, %8 ]
%16 = phi ptr [ @bicubic4coefftab32, %12 ], [ @lan2coefftab32, %8 ]
%17 = load ptr, ptr %16, align 8, !tbaa !11
%18 = load ptr, ptr %15, align 8, !tbaa !11
%19 = load ptr, ptr %14, align 8, !tbaa !11
%20 = tail call i32 @sun8i_vi_scaler_coef_index(i32 noundef %2) #2
%21 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !13
%22 = icmp sgt i32 %21, 0
br i1 %22, label %23, label %52
23: ; preds = %13
%24 = mul nsw i32 %21, %20
%25 = sext i32 %24 to i64
br label %26
26: ; preds = %23, %26
%27 = phi i64 [ 0, %23 ], [ %48, %26 ]
%28 = trunc i64 %27 to i32
%29 = tail call i32 @SUN8I_SCALER_VSU_YHCOEFF0(i32 noundef %1, i32 noundef %28) #2
%30 = load ptr, ptr @lan3coefftab32_left, align 8, !tbaa !11
%31 = add nsw i64 %27, %25
%32 = getelementptr inbounds i32, ptr %30, i64 %31
%33 = load i32, ptr %32, align 4, !tbaa !13
%34 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %29, i32 noundef %33) #2
%35 = tail call i32 @SUN8I_SCALER_VSU_YHCOEFF1(i32 noundef %1, i32 noundef %28) #2
%36 = load ptr, ptr @lan3coefftab32_right, align 8, !tbaa !11
%37 = getelementptr inbounds i32, ptr %36, i64 %31
%38 = load i32, ptr %37, align 4, !tbaa !13
%39 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %35, i32 noundef %38) #2
%40 = tail call i32 @SUN8I_SCALER_VSU_CHCOEFF0(i32 noundef %1, i32 noundef %28) #2
%41 = getelementptr inbounds i32, ptr %19, i64 %31
%42 = load i32, ptr %41, align 4, !tbaa !13
%43 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %40, i32 noundef %42) #2
%44 = tail call i32 @SUN8I_SCALER_VSU_CHCOEFF1(i32 noundef %1, i32 noundef %28) #2
%45 = getelementptr inbounds i32, ptr %18, i64 %31
%46 = load i32, ptr %45, align 4, !tbaa !13
%47 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %44, i32 noundef %46) #2
%48 = add nuw nsw i64 %27, 1
%49 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !13
%50 = sext i32 %49 to i64
%51 = icmp slt i64 %48, %50
br i1 %51, label %26, label %52, !llvm.loop !14
52: ; preds = %26, %13
%53 = tail call i32 @sun8i_vi_scaler_coef_index(i32 noundef %2) #2
%54 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !13
%55 = icmp sgt i32 %54, 0
br i1 %55, label %56, label %76
56: ; preds = %52
%57 = mul nsw i32 %54, %53
%58 = sext i32 %57 to i64
br label %59
59: ; preds = %56, %59
%60 = phi i64 [ 0, %56 ], [ %72, %59 ]
%61 = trunc i64 %60 to i32
%62 = tail call i32 @SUN8I_SCALER_VSU_YVCOEFF(i32 noundef %1, i32 noundef %61) #2
%63 = load ptr, ptr @lan2coefftab32, align 8, !tbaa !11
%64 = add nsw i64 %60, %58
%65 = getelementptr inbounds i32, ptr %63, i64 %64
%66 = load i32, ptr %65, align 4, !tbaa !13
%67 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %62, i32 noundef %66) #2
%68 = tail call i32 @SUN8I_SCALER_VSU_CVCOEFF(i32 noundef %1, i32 noundef %61) #2
%69 = getelementptr inbounds i32, ptr %17, i64 %64
%70 = load i32, ptr %69, align 4, !tbaa !13
%71 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %68, i32 noundef %70) #2
%72 = add nuw nsw i64 %60, 1
%73 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !13
%74 = sext i32 %73 to i64
%75 = icmp slt i64 %72, %74
br i1 %75, label %59, label %76, !llvm.loop !16
76: ; preds = %59, %52
ret void
}
declare i32 @sun8i_vi_scaler_coef_index(i32 noundef) local_unnamed_addr #1
declare i32 @regmap_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_YHCOEFF0(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_YHCOEFF1(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_CHCOEFF0(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_CHCOEFF1(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_YVCOEFF(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_CVCOEFF(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"drm_format_info", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/sun4i/extr_sun8i_vi_scaler.c_sun8i_vi_scaler_set_coeff.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/sun4i/extr_sun8i_vi_scaler.c_sun8i_vi_scaler_set_coeff.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@lan3coefftab32_left = common local_unnamed_addr global ptr null, align 8
@lan3coefftab32_right = common local_unnamed_addr global ptr null, align 8
@lan2coefftab32 = common local_unnamed_addr global ptr null, align 8
@bicubic8coefftab32_left = common local_unnamed_addr global ptr null, align 8
@bicubic8coefftab32_right = common local_unnamed_addr global ptr null, align 8
@bicubic4coefftab32 = common local_unnamed_addr global ptr null, align 8
@SUN8I_VI_SCALER_COEFF_COUNT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sun8i_vi_scaler_set_coeff], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sun8i_vi_scaler_set_coeff(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 %3, ptr nocapture noundef readonly %4) #0 {
%6 = load i32, ptr %4, align 4, !tbaa !6
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = getelementptr inbounds i8, ptr %4, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !11
%11 = icmp eq i32 %10, 1
br i1 %11, label %13, label %12
12: ; preds = %8, %5
br label %13
13: ; preds = %8, %12
%14 = phi ptr [ @bicubic8coefftab32_left, %12 ], [ @lan3coefftab32_left, %8 ]
%15 = phi ptr [ @bicubic8coefftab32_right, %12 ], [ @lan3coefftab32_right, %8 ]
%16 = phi ptr [ @bicubic4coefftab32, %12 ], [ @lan2coefftab32, %8 ]
%17 = load ptr, ptr %16, align 8, !tbaa !12
%18 = load ptr, ptr %15, align 8, !tbaa !12
%19 = load ptr, ptr %14, align 8, !tbaa !12
%20 = tail call i32 @sun8i_vi_scaler_coef_index(i32 noundef %2) #2
%21 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !14
%22 = icmp sgt i32 %21, 0
br i1 %22, label %23, label %52
23: ; preds = %13
%24 = mul nsw i32 %21, %20
%25 = sext i32 %24 to i64
br label %26
26: ; preds = %23, %26
%27 = phi i64 [ 0, %23 ], [ %48, %26 ]
%28 = trunc nuw nsw i64 %27 to i32
%29 = tail call i32 @SUN8I_SCALER_VSU_YHCOEFF0(i32 noundef %1, i32 noundef %28) #2
%30 = load ptr, ptr @lan3coefftab32_left, align 8, !tbaa !12
%31 = add nsw i64 %27, %25
%32 = getelementptr inbounds i32, ptr %30, i64 %31
%33 = load i32, ptr %32, align 4, !tbaa !14
%34 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %29, i32 noundef %33) #2
%35 = tail call i32 @SUN8I_SCALER_VSU_YHCOEFF1(i32 noundef %1, i32 noundef %28) #2
%36 = load ptr, ptr @lan3coefftab32_right, align 8, !tbaa !12
%37 = getelementptr inbounds i32, ptr %36, i64 %31
%38 = load i32, ptr %37, align 4, !tbaa !14
%39 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %35, i32 noundef %38) #2
%40 = tail call i32 @SUN8I_SCALER_VSU_CHCOEFF0(i32 noundef %1, i32 noundef %28) #2
%41 = getelementptr inbounds i32, ptr %19, i64 %31
%42 = load i32, ptr %41, align 4, !tbaa !14
%43 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %40, i32 noundef %42) #2
%44 = tail call i32 @SUN8I_SCALER_VSU_CHCOEFF1(i32 noundef %1, i32 noundef %28) #2
%45 = getelementptr inbounds i32, ptr %18, i64 %31
%46 = load i32, ptr %45, align 4, !tbaa !14
%47 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %44, i32 noundef %46) #2
%48 = add nuw nsw i64 %27, 1
%49 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !14
%50 = sext i32 %49 to i64
%51 = icmp slt i64 %48, %50
br i1 %51, label %26, label %52, !llvm.loop !15
52: ; preds = %26, %13
%53 = tail call i32 @sun8i_vi_scaler_coef_index(i32 noundef %2) #2
%54 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !14
%55 = icmp sgt i32 %54, 0
br i1 %55, label %56, label %76
56: ; preds = %52
%57 = mul nsw i32 %54, %53
%58 = sext i32 %57 to i64
br label %59
59: ; preds = %56, %59
%60 = phi i64 [ 0, %56 ], [ %72, %59 ]
%61 = trunc nuw nsw i64 %60 to i32
%62 = tail call i32 @SUN8I_SCALER_VSU_YVCOEFF(i32 noundef %1, i32 noundef %61) #2
%63 = load ptr, ptr @lan2coefftab32, align 8, !tbaa !12
%64 = add nsw i64 %60, %58
%65 = getelementptr inbounds i32, ptr %63, i64 %64
%66 = load i32, ptr %65, align 4, !tbaa !14
%67 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %62, i32 noundef %66) #2
%68 = tail call i32 @SUN8I_SCALER_VSU_CVCOEFF(i32 noundef %1, i32 noundef %61) #2
%69 = getelementptr inbounds i32, ptr %17, i64 %64
%70 = load i32, ptr %69, align 4, !tbaa !14
%71 = tail call i32 @regmap_write(ptr noundef %0, i32 noundef %68, i32 noundef %70) #2
%72 = add nuw nsw i64 %60, 1
%73 = load i32, ptr @SUN8I_VI_SCALER_COEFF_COUNT, align 4, !tbaa !14
%74 = sext i32 %73 to i64
%75 = icmp slt i64 %72, %74
br i1 %75, label %59, label %76, !llvm.loop !17
76: ; preds = %59, %52
ret void
}
declare i32 @sun8i_vi_scaler_coef_index(i32 noundef) local_unnamed_addr #1
declare i32 @regmap_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_YHCOEFF0(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_YHCOEFF1(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_CHCOEFF0(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_CHCOEFF1(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_YVCOEFF(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SUN8I_SCALER_VSU_CVCOEFF(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"drm_format_info", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!8, !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
| linux_drivers_gpu_drm_sun4i_extr_sun8i_vi_scaler.c_sun8i_vi_scaler_set_coeff |
; ModuleID = 'AnghaBench/linux/drivers/scsi/cxgbi/cxgb4i/extr_cxgb4i.c_cxgb4i_process_ddpvld.c'
source_filename = "AnghaBench/linux/drivers/scsi/cxgbi/cxgb4i/extr_cxgb4i.c_cxgb4i_process_ddpvld.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CPL_RX_DDP_STATUS_HCRC_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [51 x i8] c"csk 0x%p, lhdr 0x%p, status 0x%x, hcrc bad 0x%lx.\0A\00", align 1
@SKCBF_RX_HCRC_ERR = dso_local local_unnamed_addr global i32 0, align 4
@CPL_RX_DDP_STATUS_DCRC_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [51 x i8] c"csk 0x%p, lhdr 0x%p, status 0x%x, dcrc bad 0x%lx.\0A\00", align 1
@SKCBF_RX_DCRC_ERR = dso_local local_unnamed_addr global i32 0, align 4
@CPL_RX_DDP_STATUS_PAD_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@CXGBI_DBG_PDU_RX = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [44 x i8] c"csk 0x%p, lhdr 0x%p, status 0x%x, pad bad.\0A\00", align 1
@SKCBF_RX_PAD_ERR = dso_local local_unnamed_addr global i32 0, align 4
@CPL_RX_DDP_STATUS_DDP_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@SKCBF_RX_DATA = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [41 x i8] c"csk 0x%p, lhdr 0x%p, 0x%x, data ddp'ed.\0A\00", align 1
@SKCBF_RX_DATA_DDPD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cxgb4i_process_ddpvld], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cxgb4i_process_ddpvld(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @CPL_RX_DDP_STATUS_HCRC_SHIFT, align 4, !tbaa !5
%5 = shl nuw i32 1, %4
%6 = and i32 %5, %2
%7 = icmp eq i32 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %3
%9 = tail call i32 @cxgbi_skcb_flags(ptr noundef %1) #2
%10 = tail call i32 @pr_info(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %9) #2
%11 = load i32, ptr @SKCBF_RX_HCRC_ERR, align 4, !tbaa !5
%12 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %11) #2
br label %13
13: ; preds = %8, %3
%14 = load i32, ptr @CPL_RX_DDP_STATUS_DCRC_SHIFT, align 4, !tbaa !5
%15 = shl nuw i32 1, %14
%16 = and i32 %15, %2
%17 = icmp eq i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %13
%19 = tail call i32 @cxgbi_skcb_flags(ptr noundef %1) #2
%20 = tail call i32 @pr_info(ptr noundef nonnull @.str.1, ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %19) #2
%21 = load i32, ptr @SKCBF_RX_DCRC_ERR, align 4, !tbaa !5
%22 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %21) #2
br label %23
23: ; preds = %18, %13
%24 = load i32, ptr @CPL_RX_DDP_STATUS_PAD_SHIFT, align 4, !tbaa !5
%25 = shl nuw i32 1, %24
%26 = and i32 %25, %2
%27 = icmp eq i32 %26, 0
br i1 %27, label %34, label %28
28: ; preds = %23
%29 = load i32, ptr @CXGBI_DBG_PDU_RX, align 4, !tbaa !5
%30 = shl nuw i32 1, %29
%31 = tail call i32 @log_debug(i32 noundef %30, ptr noundef nonnull @.str.2, ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%32 = load i32, ptr @SKCBF_RX_PAD_ERR, align 4, !tbaa !5
%33 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %32) #2
br label %34
34: ; preds = %28, %23
%35 = load i32, ptr @CPL_RX_DDP_STATUS_DDP_SHIFT, align 4, !tbaa !5
%36 = shl nuw i32 1, %35
%37 = and i32 %36, %2
%38 = icmp eq i32 %37, 0
br i1 %38, label %49, label %39
39: ; preds = %34
%40 = load i32, ptr @SKCBF_RX_DATA, align 4, !tbaa !5
%41 = tail call i32 @cxgbi_skcb_test_flag(ptr noundef %1, i32 noundef %40) #2
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %49
43: ; preds = %39
%44 = load i32, ptr @CXGBI_DBG_PDU_RX, align 4, !tbaa !5
%45 = shl nuw i32 1, %44
%46 = tail call i32 @log_debug(i32 noundef %45, ptr noundef nonnull @.str.3, ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%47 = load i32, ptr @SKCBF_RX_DATA_DDPD, align 4, !tbaa !5
%48 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %47) #2
br label %49
49: ; preds = %43, %39, %34
ret void
}
declare i32 @pr_info(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cxgbi_skcb_flags(ptr noundef) local_unnamed_addr #1
declare i32 @cxgbi_skcb_set_flag(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @log_debug(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cxgbi_skcb_test_flag(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/cxgbi/cxgb4i/extr_cxgb4i.c_cxgb4i_process_ddpvld.c'
source_filename = "AnghaBench/linux/drivers/scsi/cxgbi/cxgb4i/extr_cxgb4i.c_cxgb4i_process_ddpvld.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CPL_RX_DDP_STATUS_HCRC_SHIFT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [51 x i8] c"csk 0x%p, lhdr 0x%p, status 0x%x, hcrc bad 0x%lx.\0A\00", align 1
@SKCBF_RX_HCRC_ERR = common local_unnamed_addr global i32 0, align 4
@CPL_RX_DDP_STATUS_DCRC_SHIFT = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [51 x i8] c"csk 0x%p, lhdr 0x%p, status 0x%x, dcrc bad 0x%lx.\0A\00", align 1
@SKCBF_RX_DCRC_ERR = common local_unnamed_addr global i32 0, align 4
@CPL_RX_DDP_STATUS_PAD_SHIFT = common local_unnamed_addr global i32 0, align 4
@CXGBI_DBG_PDU_RX = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [44 x i8] c"csk 0x%p, lhdr 0x%p, status 0x%x, pad bad.\0A\00", align 1
@SKCBF_RX_PAD_ERR = common local_unnamed_addr global i32 0, align 4
@CPL_RX_DDP_STATUS_DDP_SHIFT = common local_unnamed_addr global i32 0, align 4
@SKCBF_RX_DATA = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [41 x i8] c"csk 0x%p, lhdr 0x%p, 0x%x, data ddp'ed.\0A\00", align 1
@SKCBF_RX_DATA_DDPD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cxgb4i_process_ddpvld], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cxgb4i_process_ddpvld(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @CPL_RX_DDP_STATUS_HCRC_SHIFT, align 4, !tbaa !6
%5 = shl nuw i32 1, %4
%6 = and i32 %5, %2
%7 = icmp eq i32 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %3
%9 = tail call i32 @cxgbi_skcb_flags(ptr noundef %1) #2
%10 = tail call i32 @pr_info(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %9) #2
%11 = load i32, ptr @SKCBF_RX_HCRC_ERR, align 4, !tbaa !6
%12 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %11) #2
br label %13
13: ; preds = %8, %3
%14 = load i32, ptr @CPL_RX_DDP_STATUS_DCRC_SHIFT, align 4, !tbaa !6
%15 = shl nuw i32 1, %14
%16 = and i32 %15, %2
%17 = icmp eq i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %13
%19 = tail call i32 @cxgbi_skcb_flags(ptr noundef %1) #2
%20 = tail call i32 @pr_info(ptr noundef nonnull @.str.1, ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %19) #2
%21 = load i32, ptr @SKCBF_RX_DCRC_ERR, align 4, !tbaa !6
%22 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %21) #2
br label %23
23: ; preds = %18, %13
%24 = load i32, ptr @CPL_RX_DDP_STATUS_PAD_SHIFT, align 4, !tbaa !6
%25 = shl nuw i32 1, %24
%26 = and i32 %25, %2
%27 = icmp eq i32 %26, 0
br i1 %27, label %34, label %28
28: ; preds = %23
%29 = load i32, ptr @CXGBI_DBG_PDU_RX, align 4, !tbaa !6
%30 = shl nuw i32 1, %29
%31 = tail call i32 @log_debug(i32 noundef %30, ptr noundef nonnull @.str.2, ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%32 = load i32, ptr @SKCBF_RX_PAD_ERR, align 4, !tbaa !6
%33 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %32) #2
br label %34
34: ; preds = %28, %23
%35 = load i32, ptr @CPL_RX_DDP_STATUS_DDP_SHIFT, align 4, !tbaa !6
%36 = shl nuw i32 1, %35
%37 = and i32 %36, %2
%38 = icmp eq i32 %37, 0
br i1 %38, label %49, label %39
39: ; preds = %34
%40 = load i32, ptr @SKCBF_RX_DATA, align 4, !tbaa !6
%41 = tail call i32 @cxgbi_skcb_test_flag(ptr noundef %1, i32 noundef %40) #2
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %49
43: ; preds = %39
%44 = load i32, ptr @CXGBI_DBG_PDU_RX, align 4, !tbaa !6
%45 = shl nuw i32 1, %44
%46 = tail call i32 @log_debug(i32 noundef %45, ptr noundef nonnull @.str.3, ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%47 = load i32, ptr @SKCBF_RX_DATA_DDPD, align 4, !tbaa !6
%48 = tail call i32 @cxgbi_skcb_set_flag(ptr noundef %1, i32 noundef %47) #2
br label %49
49: ; preds = %43, %39, %34
ret void
}
declare i32 @pr_info(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cxgbi_skcb_flags(ptr noundef) local_unnamed_addr #1
declare i32 @cxgbi_skcb_set_flag(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @log_debug(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cxgbi_skcb_test_flag(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_scsi_cxgbi_cxgb4i_extr_cxgb4i.c_cxgb4i_process_ddpvld |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/savage/extr_savage_state.c_savage_dispatch_state.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/savage/extr_savage_state.c_savage_dispatch_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, i64 }
%struct.TYPE_9__ = type { i32, i32 }
@DMA_LOCALS = dso_local local_unnamed_addr global i32 0, align 4
@SAVAGE_SCSTART_S3D = dso_local local_unnamed_addr global i32 0, align 4
@SAVAGE_SCEND_S3D = dso_local local_unnamed_addr global i32 0, align 4
@SAVAGE_DRAWCTRL0_S4 = dso_local local_unnamed_addr global i32 0, align 4
@SAVAGE_DRAWCTRL1_S4 = dso_local local_unnamed_addr global i32 0, align 4
@BCI_CMD_WAIT = dso_local local_unnamed_addr global i32 0, align 4
@BCI_CMD_WAIT_3D = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @savage_dispatch_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @savage_dispatch_state(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = load i32, ptr %1, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = icmp eq i32 %4, 0
br i1 %7, label %117, label %8
8: ; preds = %3
%9 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = tail call i64 @S3_SAVAGE3D_SERIES(i32 noundef %10) #3
%12 = icmp eq i64 %11, 0
br i1 %12, label %40, label %13
13: ; preds = %8
%14 = tail call i32 @savage_verify_state_s3d(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %4, ptr noundef %2) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %117
16: ; preds = %13
%17 = load i32, ptr @SAVAGE_SCSTART_S3D, align 4, !tbaa !15
%18 = icmp ult i32 %6, %17
br i1 %18, label %19, label %30
19: ; preds = %16
%20 = add i32 %6, %4
%21 = load i32, ptr @SAVAGE_SCEND_S3D, align 4, !tbaa !15
%22 = add nsw i32 %21, 1
%23 = icmp ugt i32 %20, %22
%24 = xor i32 %21, -1
%25 = add i32 %20, %24
%26 = select i1 %23, i32 %25, i32 0
%27 = icmp ugt i32 %20, %17
%28 = sub i32 %17, %6
%29 = select i1 %27, i32 %28, i32 %4
br label %67
30: ; preds = %16
%31 = load i32, ptr @SAVAGE_SCEND_S3D, align 4, !tbaa !15
%32 = icmp ugt i32 %6, %31
br i1 %32, label %67, label %33
33: ; preds = %30
%34 = add i32 %6, %4
%35 = add nsw i32 %31, 1
%36 = icmp ugt i32 %34, %35
br i1 %36, label %37, label %117
37: ; preds = %33
%38 = xor i32 %31, -1
%39 = add i32 %34, %38
br label %67
40: ; preds = %8
%41 = tail call i32 @savage_verify_state_s4(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %4, ptr noundef %2) #3
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %117
43: ; preds = %40
%44 = load i32, ptr @SAVAGE_DRAWCTRL0_S4, align 4, !tbaa !15
%45 = icmp ult i32 %6, %44
br i1 %45, label %46, label %57
46: ; preds = %43
%47 = add i32 %6, %4
%48 = load i32, ptr @SAVAGE_DRAWCTRL1_S4, align 4, !tbaa !15
%49 = add nsw i32 %48, 1
%50 = icmp ugt i32 %47, %49
%51 = xor i32 %48, -1
%52 = add i32 %47, %51
%53 = select i1 %50, i32 %52, i32 0
%54 = icmp ugt i32 %47, %44
%55 = sub i32 %44, %6
%56 = select i1 %54, i32 %55, i32 %4
br label %67
57: ; preds = %43
%58 = load i32, ptr @SAVAGE_DRAWCTRL1_S4, align 4, !tbaa !15
%59 = icmp ugt i32 %6, %58
br i1 %59, label %67, label %60
60: ; preds = %57
%61 = add i32 %6, %4
%62 = add nsw i32 %58, 1
%63 = icmp ugt i32 %61, %62
br i1 %63, label %64, label %117
64: ; preds = %60
%65 = xor i32 %58, -1
%66 = add i32 %61, %65
br label %67
67: ; preds = %46, %19, %64, %57, %37, %30
%68 = phi i32 [ %39, %37 ], [ %4, %30 ], [ %66, %64 ], [ %4, %57 ], [ %29, %19 ], [ %56, %46 ]
%69 = phi i32 [ %35, %37 ], [ %6, %30 ], [ %62, %64 ], [ %6, %57 ], [ %6, %19 ], [ %6, %46 ]
%70 = phi i32 [ 0, %37 ], [ 0, %30 ], [ 0, %64 ], [ 0, %57 ], [ %26, %19 ], [ %53, %46 ]
%71 = add i32 %68, 254
%72 = udiv i32 %71, 255
%73 = add i32 %72, %68
%74 = add i32 %73, %70
%75 = add i32 %70, 254
%76 = udiv i32 %75, 255
%77 = add i32 %74, %76
%78 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%79 = load i64, ptr %78, align 8, !tbaa !16
%80 = icmp eq i64 %79, 0
br i1 %80, label %88, label %81
81: ; preds = %67
%82 = add i32 %77, 1
%83 = tail call i32 @BEGIN_DMA(i32 noundef %82) #3
%84 = load i32, ptr @BCI_CMD_WAIT, align 4, !tbaa !15
%85 = load i32, ptr @BCI_CMD_WAIT_3D, align 4, !tbaa !15
%86 = or i32 %85, %84
%87 = tail call i32 @DMA_WRITE(i32 noundef %86) #3
store i32 1, ptr %0, align 4, !tbaa !17
br label %90
88: ; preds = %67
%89 = tail call i32 @BEGIN_DMA(i32 noundef %77) #3
br label %90
90: ; preds = %88, %81
br label %91
91: ; preds = %90, %109
%92 = phi i32 [ %94, %109 ], [ %68, %90 ]
%93 = phi i32 [ %112, %109 ], [ %69, %90 ]
%94 = phi i32 [ 0, %109 ], [ %70, %90 ]
%95 = phi ptr [ %113, %109 ], [ %2, %90 ]
%96 = icmp eq i32 %92, 0
br i1 %96, label %109, label %97
97: ; preds = %91, %97
%98 = phi ptr [ %107, %97 ], [ %95, %91 ]
%99 = phi i32 [ %105, %97 ], [ %93, %91 ]
%100 = phi i32 [ %104, %97 ], [ %92, %91 ]
%101 = tail call i32 @llvm.umin.i32(i32 %100, i32 255)
%102 = tail call i32 @DMA_SET_REGISTERS(i32 noundef %99, i32 noundef %101) #3
%103 = tail call i32 @DMA_COPY(ptr noundef %98, i32 noundef %101) #3
%104 = sub i32 %100, %101
%105 = add i32 %99, %101
%106 = zext nneg i32 %101 to i64
%107 = getelementptr inbounds i32, ptr %98, i64 %106
%108 = icmp eq i32 %104, 0
br i1 %108, label %109, label %97, !llvm.loop !18
109: ; preds = %97, %91
%110 = phi i32 [ %93, %91 ], [ %105, %97 ]
%111 = phi ptr [ %95, %91 ], [ %107, %97 ]
%112 = add i32 %110, 2
%113 = getelementptr inbounds i32, ptr %111, i64 2
%114 = icmp eq i32 %94, 0
br i1 %114, label %115, label %91, !llvm.loop !20
115: ; preds = %109
%116 = tail call i32 (...) @DMA_COMMIT() #3
br label %117
117: ; preds = %60, %40, %33, %13, %3, %115
%118 = phi i32 [ 0, %115 ], [ 0, %3 ], [ %14, %13 ], [ 0, %33 ], [ %41, %40 ], [ 0, %60 ]
ret i32 %118
}
declare i64 @S3_SAVAGE3D_SERIES(i32 noundef) local_unnamed_addr #1
declare i32 @savage_verify_state_s3d(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @savage_verify_state_s4(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BEGIN_DMA(i32 noundef) local_unnamed_addr #1
declare i32 @DMA_WRITE(i32 noundef) local_unnamed_addr #1
declare i32 @DMA_SET_REGISTERS(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DMA_COPY(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DMA_COMMIT(...) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_10__", !7, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!6, !8, i64 4}
!13 = !{!14, !8, i64 4}
!14 = !{!"TYPE_9__", !8, i64 0, !8, i64 4}
!15 = !{!8, !8, i64 0}
!16 = !{!6, !11, i64 8}
!17 = !{!14, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/savage/extr_savage_state.c_savage_dispatch_state.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/savage/extr_savage_state.c_savage_dispatch_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DMA_LOCALS = common local_unnamed_addr global i32 0, align 4
@SAVAGE_SCSTART_S3D = common local_unnamed_addr global i32 0, align 4
@SAVAGE_SCEND_S3D = common local_unnamed_addr global i32 0, align 4
@SAVAGE_DRAWCTRL0_S4 = common local_unnamed_addr global i32 0, align 4
@SAVAGE_DRAWCTRL1_S4 = common local_unnamed_addr global i32 0, align 4
@BCI_CMD_WAIT = common local_unnamed_addr global i32 0, align 4
@BCI_CMD_WAIT_3D = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @savage_dispatch_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @savage_dispatch_state(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !13
%7 = icmp eq i32 %4, 0
br i1 %7, label %117, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = tail call i64 @S3_SAVAGE3D_SERIES(i32 noundef %10) #3
%12 = icmp eq i64 %11, 0
br i1 %12, label %40, label %13
13: ; preds = %8
%14 = tail call i32 @savage_verify_state_s3d(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %4, ptr noundef %2) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %117
16: ; preds = %13
%17 = load i32, ptr @SAVAGE_SCSTART_S3D, align 4, !tbaa !16
%18 = icmp ult i32 %6, %17
br i1 %18, label %19, label %30
19: ; preds = %16
%20 = add i32 %6, %4
%21 = load i32, ptr @SAVAGE_SCEND_S3D, align 4, !tbaa !16
%22 = add nsw i32 %21, 1
%23 = icmp ugt i32 %20, %22
%24 = xor i32 %21, -1
%25 = add i32 %20, %24
%26 = select i1 %23, i32 %25, i32 0
%27 = icmp ugt i32 %20, %17
%28 = sub i32 %17, %6
%29 = select i1 %27, i32 %28, i32 %4
br label %67
30: ; preds = %16
%31 = load i32, ptr @SAVAGE_SCEND_S3D, align 4, !tbaa !16
%32 = icmp ugt i32 %6, %31
br i1 %32, label %67, label %33
33: ; preds = %30
%34 = add i32 %6, %4
%35 = add nsw i32 %31, 1
%36 = icmp ugt i32 %34, %35
br i1 %36, label %37, label %117
37: ; preds = %33
%38 = xor i32 %31, -1
%39 = add i32 %34, %38
br label %67
40: ; preds = %8
%41 = tail call i32 @savage_verify_state_s4(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %4, ptr noundef %2) #3
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %117
43: ; preds = %40
%44 = load i32, ptr @SAVAGE_DRAWCTRL0_S4, align 4, !tbaa !16
%45 = icmp ult i32 %6, %44
br i1 %45, label %46, label %57
46: ; preds = %43
%47 = add i32 %6, %4
%48 = load i32, ptr @SAVAGE_DRAWCTRL1_S4, align 4, !tbaa !16
%49 = add nsw i32 %48, 1
%50 = icmp ugt i32 %47, %49
%51 = xor i32 %48, -1
%52 = add i32 %47, %51
%53 = select i1 %50, i32 %52, i32 0
%54 = icmp ugt i32 %47, %44
%55 = sub i32 %44, %6
%56 = select i1 %54, i32 %55, i32 %4
br label %67
57: ; preds = %43
%58 = load i32, ptr @SAVAGE_DRAWCTRL1_S4, align 4, !tbaa !16
%59 = icmp ugt i32 %6, %58
br i1 %59, label %67, label %60
60: ; preds = %57
%61 = add i32 %6, %4
%62 = add nsw i32 %58, 1
%63 = icmp ugt i32 %61, %62
br i1 %63, label %64, label %117
64: ; preds = %60
%65 = xor i32 %58, -1
%66 = add i32 %61, %65
br label %67
67: ; preds = %46, %19, %64, %57, %37, %30
%68 = phi i32 [ %39, %37 ], [ %4, %30 ], [ %66, %64 ], [ %4, %57 ], [ %29, %19 ], [ %56, %46 ]
%69 = phi i32 [ %35, %37 ], [ %6, %30 ], [ %62, %64 ], [ %6, %57 ], [ %6, %19 ], [ %6, %46 ]
%70 = phi i32 [ 0, %37 ], [ 0, %30 ], [ 0, %64 ], [ 0, %57 ], [ %26, %19 ], [ %53, %46 ]
%71 = add i32 %68, 254
%72 = udiv i32 %71, 255
%73 = add i32 %72, %68
%74 = add i32 %73, %70
%75 = add i32 %70, 254
%76 = udiv i32 %75, 255
%77 = add i32 %74, %76
%78 = getelementptr inbounds i8, ptr %1, i64 8
%79 = load i64, ptr %78, align 8, !tbaa !17
%80 = icmp eq i64 %79, 0
br i1 %80, label %88, label %81
81: ; preds = %67
%82 = add i32 %77, 1
%83 = tail call i32 @BEGIN_DMA(i32 noundef %82) #3
%84 = load i32, ptr @BCI_CMD_WAIT, align 4, !tbaa !16
%85 = load i32, ptr @BCI_CMD_WAIT_3D, align 4, !tbaa !16
%86 = or i32 %85, %84
%87 = tail call i32 @DMA_WRITE(i32 noundef %86) #3
store i32 1, ptr %0, align 4, !tbaa !18
br label %90
88: ; preds = %67
%89 = tail call i32 @BEGIN_DMA(i32 noundef %77) #3
br label %90
90: ; preds = %88, %81
br label %91
91: ; preds = %90, %109
%92 = phi i32 [ %94, %109 ], [ %68, %90 ]
%93 = phi i32 [ %112, %109 ], [ %69, %90 ]
%94 = phi i32 [ 0, %109 ], [ %70, %90 ]
%95 = phi ptr [ %113, %109 ], [ %2, %90 ]
%96 = icmp eq i32 %92, 0
br i1 %96, label %109, label %97
97: ; preds = %91, %97
%98 = phi ptr [ %107, %97 ], [ %95, %91 ]
%99 = phi i32 [ %105, %97 ], [ %93, %91 ]
%100 = phi i32 [ %104, %97 ], [ %92, %91 ]
%101 = tail call i32 @llvm.umin.i32(i32 %100, i32 255)
%102 = tail call i32 @DMA_SET_REGISTERS(i32 noundef %99, i32 noundef %101) #3
%103 = tail call i32 @DMA_COPY(ptr noundef %98, i32 noundef %101) #3
%104 = sub i32 %100, %101
%105 = add i32 %99, %101
%106 = zext nneg i32 %101 to i64
%107 = getelementptr inbounds i32, ptr %98, i64 %106
%108 = icmp eq i32 %104, 0
br i1 %108, label %109, label %97, !llvm.loop !19
109: ; preds = %97, %91
%110 = phi i32 [ %93, %91 ], [ %105, %97 ]
%111 = phi ptr [ %95, %91 ], [ %107, %97 ]
%112 = add i32 %110, 2
%113 = getelementptr inbounds i8, ptr %111, i64 8
%114 = icmp eq i32 %94, 0
br i1 %114, label %115, label %91, !llvm.loop !21
115: ; preds = %109
%116 = tail call i32 @DMA_COMMIT() #3
br label %117
117: ; preds = %60, %40, %33, %13, %3, %115
%118 = phi i32 [ 0, %115 ], [ 0, %3 ], [ %14, %13 ], [ 0, %33 ], [ %41, %40 ], [ 0, %60 ]
ret i32 %118
}
declare i64 @S3_SAVAGE3D_SERIES(i32 noundef) local_unnamed_addr #1
declare i32 @savage_verify_state_s3d(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @savage_verify_state_s4(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @BEGIN_DMA(i32 noundef) local_unnamed_addr #1
declare i32 @DMA_WRITE(i32 noundef) local_unnamed_addr #1
declare i32 @DMA_SET_REGISTERS(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DMA_COPY(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DMA_COMMIT(...) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_10__", !8, i64 0}
!8 = !{!"TYPE_8__", !9, i64 0, !9, i64 4, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!7, !9, i64 4}
!14 = !{!15, !9, i64 4}
!15 = !{!"TYPE_9__", !9, i64 0, !9, i64 4}
!16 = !{!9, !9, i64 0}
!17 = !{!7, !12, i64 8}
!18 = !{!15, !9, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
| linux_drivers_gpu_drm_savage_extr_savage_state.c_savage_dispatch_state |
; ModuleID = 'AnghaBench/linux/drivers/tty/extr_synclinkmp.c_init_adapter.c'
source_filename = "AnghaBench/linux/drivers/tty/extr_synclinkmp.c_init_adapter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr, i64, i32 }
@BIT30 = dso_local local_unnamed_addr global i32 0, align 4
@BIT5 = dso_local local_unnamed_addr global i32 0, align 4
@BIT4 = dso_local local_unnamed_addr global i32 0, align 4
@BIT3 = dso_local local_unnamed_addr global i32 0, align 4
@lcr1_brdr_value = dso_local local_unnamed_addr global i32 0, align 4
@read_ahead_count = dso_local local_unnamed_addr global i32 0, align 4
@misc_ctrl_value = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @init_adapter], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @init_adapter(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = add nsw i64 %3, 80
%5 = inttoptr i64 %4 to ptr
%6 = load i32, ptr @BIT30, align 4, !tbaa !12
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 3
%8 = load i32, ptr %7, align 8, !tbaa !13
%9 = or i32 %8, %6
store i32 %9, ptr %7, align 8, !tbaa !13
store volatile i32 %9, ptr %5, align 4, !tbaa !12
%10 = load volatile i32, ptr %5, align 4, !tbaa !12
%11 = load volatile i32, ptr %5, align 4, !tbaa !12
%12 = load volatile i32, ptr %5, align 4, !tbaa !12
%13 = load volatile i32, ptr %5, align 4, !tbaa !12
%14 = load volatile i32, ptr %5, align 4, !tbaa !12
%15 = load volatile i32, ptr %5, align 4, !tbaa !12
%16 = load volatile i32, ptr %5, align 4, !tbaa !12
%17 = load volatile i32, ptr %5, align 4, !tbaa !12
%18 = load volatile i32, ptr %5, align 4, !tbaa !12
%19 = load volatile i32, ptr %5, align 4, !tbaa !12
%20 = load i32, ptr @BIT30, align 4, !tbaa !12
%21 = xor i32 %20, -1
%22 = load i32, ptr %7, align 8, !tbaa !13
%23 = and i32 %22, %21
store i32 %23, ptr %7, align 8, !tbaa !13
store volatile i32 %23, ptr %5, align 4, !tbaa !12
store i32 170, ptr %0, align 8, !tbaa !14
%24 = tail call i32 @write_control_reg(ptr noundef nonnull %0) #3
%25 = load i64, ptr %2, align 8, !tbaa !5
%26 = load i32, ptr @BIT5, align 4, !tbaa !12
%27 = load i32, ptr @BIT4, align 4, !tbaa !12
%28 = add nsw i32 %27, %26
%29 = load i32, ptr @BIT3, align 4, !tbaa !12
%30 = add nsw i32 %28, %29
%31 = xor i32 %30, -1
%32 = load i32, ptr @lcr1_brdr_value, align 4, !tbaa !12
%33 = and i32 %32, %31
store i32 %33, ptr @lcr1_brdr_value, align 4, !tbaa !12
%34 = load i32, ptr @read_ahead_count, align 4, !tbaa !12
%35 = tail call i32 @llvm.fshl.i32(i32 %34, i32 %34, i32 30)
switch i32 %35, label %47 [
i32 4, label %36
i32 2, label %38
i32 1, label %40
i32 0, label %43
]
36: ; preds = %1
%37 = or i32 %32, %30
br label %45
38: ; preds = %1
%39 = or i32 %33, %28
br label %45
40: ; preds = %1
%41 = add nsw i32 %29, %26
%42 = or i32 %33, %41
br label %45
43: ; preds = %1
%44 = or i32 %33, %26
br label %45
45: ; preds = %36, %38, %40, %43
%46 = phi i32 [ %44, %43 ], [ %42, %40 ], [ %39, %38 ], [ %37, %36 ]
store i32 %46, ptr @lcr1_brdr_value, align 4, !tbaa !12
br label %47
47: ; preds = %45, %1
%48 = phi i32 [ %33, %1 ], [ %46, %45 ]
%49 = add nsw i64 %25, 44
%50 = inttoptr i64 %49 to ptr
store volatile i32 %48, ptr %50, align 4, !tbaa !12
%51 = load i32, ptr @misc_ctrl_value, align 4, !tbaa !12
store volatile i32 %51, ptr %5, align 4, !tbaa !12
%52 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%53 = load ptr, ptr %52, align 8, !tbaa !15
%54 = load i32, ptr %53, align 4, !tbaa !12
%55 = tail call i32 @sca_init(i32 noundef %54) #3
%56 = load ptr, ptr %52, align 8, !tbaa !15
%57 = getelementptr inbounds i32, ptr %56, i64 2
%58 = load i32, ptr %57, align 4, !tbaa !12
%59 = tail call i32 @sca_init(i32 noundef %58) #3
ret i32 1
}
declare i32 @write_control_reg(ptr noundef) local_unnamed_addr #1
declare i32 @sca_init(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fshl.i32(i32, i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8, !11, i64 16, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 24}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/tty/extr_synclinkmp.c_init_adapter.c'
source_filename = "AnghaBench/linux/drivers/tty/extr_synclinkmp.c_init_adapter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BIT30 = common local_unnamed_addr global i32 0, align 4
@BIT5 = common local_unnamed_addr global i32 0, align 4
@BIT4 = common local_unnamed_addr global i32 0, align 4
@BIT3 = common local_unnamed_addr global i32 0, align 4
@lcr1_brdr_value = common local_unnamed_addr global i32 0, align 4
@read_ahead_count = common local_unnamed_addr global i32 0, align 4
@misc_ctrl_value = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @init_adapter], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @init_adapter(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = add nsw i64 %3, 80
%5 = inttoptr i64 %4 to ptr
%6 = load i32, ptr @BIT30, align 4, !tbaa !13
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = load i32, ptr %7, align 8, !tbaa !14
%9 = or i32 %8, %6
store i32 %9, ptr %7, align 8, !tbaa !14
store volatile i32 %9, ptr %5, align 4, !tbaa !13
%10 = load volatile i32, ptr %5, align 4, !tbaa !13
%11 = load volatile i32, ptr %5, align 4, !tbaa !13
%12 = load volatile i32, ptr %5, align 4, !tbaa !13
%13 = load volatile i32, ptr %5, align 4, !tbaa !13
%14 = load volatile i32, ptr %5, align 4, !tbaa !13
%15 = load volatile i32, ptr %5, align 4, !tbaa !13
%16 = load volatile i32, ptr %5, align 4, !tbaa !13
%17 = load volatile i32, ptr %5, align 4, !tbaa !13
%18 = load volatile i32, ptr %5, align 4, !tbaa !13
%19 = load volatile i32, ptr %5, align 4, !tbaa !13
%20 = load i32, ptr @BIT30, align 4, !tbaa !13
%21 = xor i32 %20, -1
%22 = load i32, ptr %7, align 8, !tbaa !14
%23 = and i32 %22, %21
store i32 %23, ptr %7, align 8, !tbaa !14
store volatile i32 %23, ptr %5, align 4, !tbaa !13
store i32 170, ptr %0, align 8, !tbaa !15
%24 = tail call i32 @write_control_reg(ptr noundef nonnull %0) #3
%25 = load i64, ptr %2, align 8, !tbaa !6
%26 = load i32, ptr @BIT5, align 4, !tbaa !13
%27 = load i32, ptr @BIT4, align 4, !tbaa !13
%28 = add nsw i32 %27, %26
%29 = load i32, ptr @BIT3, align 4, !tbaa !13
%30 = add nsw i32 %28, %29
%31 = xor i32 %30, -1
%32 = load i32, ptr @lcr1_brdr_value, align 4, !tbaa !13
%33 = and i32 %32, %31
store i32 %33, ptr @lcr1_brdr_value, align 4, !tbaa !13
%34 = load i32, ptr @read_ahead_count, align 4, !tbaa !13
%35 = tail call i32 @llvm.fshl.i32(i32 %34, i32 %34, i32 30)
switch i32 %35, label %47 [
i32 4, label %36
i32 2, label %38
i32 1, label %40
i32 0, label %43
]
36: ; preds = %1
%37 = or i32 %32, %30
br label %45
38: ; preds = %1
%39 = or i32 %33, %28
br label %45
40: ; preds = %1
%41 = add nsw i32 %29, %26
%42 = or i32 %33, %41
br label %45
43: ; preds = %1
%44 = or i32 %33, %26
br label %45
45: ; preds = %36, %38, %40, %43
%46 = phi i32 [ %44, %43 ], [ %42, %40 ], [ %39, %38 ], [ %37, %36 ]
store i32 %46, ptr @lcr1_brdr_value, align 4, !tbaa !13
br label %47
47: ; preds = %45, %1
%48 = phi i32 [ %33, %1 ], [ %46, %45 ]
%49 = add nsw i64 %25, 44
%50 = inttoptr i64 %49 to ptr
store volatile i32 %48, ptr %50, align 4, !tbaa !13
%51 = load i32, ptr @misc_ctrl_value, align 4, !tbaa !13
store volatile i32 %51, ptr %5, align 4, !tbaa !13
%52 = getelementptr inbounds i8, ptr %0, i64 8
%53 = load ptr, ptr %52, align 8, !tbaa !16
%54 = load i32, ptr %53, align 4, !tbaa !13
%55 = tail call i32 @sca_init(i32 noundef %54) #3
%56 = load ptr, ptr %52, align 8, !tbaa !16
%57 = getelementptr inbounds i8, ptr %56, i64 8
%58 = load i32, ptr %57, align 4, !tbaa !13
%59 = tail call i32 @sca_init(i32 noundef %58) #3
ret i32 1
}
declare i32 @write_control_reg(ptr noundef) local_unnamed_addr #1
declare i32 @sca_init(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fshl.i32(i32, i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8, !12, i64 16, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 24}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !11, i64 8}
| linux_drivers_tty_extr_synclinkmp.c_init_adapter |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_erp.c_zfcp_erp_port_shutdown.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_erp.c_zfcp_erp_port_shutdown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ZFCP_STATUS_COMMON_RUNNING = dso_local local_unnamed_addr global i32 0, align 4
@ZFCP_STATUS_COMMON_ERP_FAILED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @zfcp_erp_port_shutdown(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @ZFCP_STATUS_COMMON_RUNNING, align 4, !tbaa !5
%6 = load i32, ptr @ZFCP_STATUS_COMMON_ERP_FAILED, align 4, !tbaa !5
%7 = or i32 %5, %1
%8 = or i32 %7, %6
%9 = tail call i32 @zfcp_erp_port_reopen(ptr noundef %0, i32 noundef %8, ptr noundef %2, ptr noundef %3) #2
ret void
}
declare i32 @zfcp_erp_port_reopen(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_erp.c_zfcp_erp_port_shutdown.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_erp.c_zfcp_erp_port_shutdown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ZFCP_STATUS_COMMON_RUNNING = common local_unnamed_addr global i32 0, align 4
@ZFCP_STATUS_COMMON_ERP_FAILED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @zfcp_erp_port_shutdown(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @ZFCP_STATUS_COMMON_RUNNING, align 4, !tbaa !6
%6 = load i32, ptr @ZFCP_STATUS_COMMON_ERP_FAILED, align 4, !tbaa !6
%7 = or i32 %5, %1
%8 = or i32 %7, %6
%9 = tail call i32 @zfcp_erp_port_reopen(ptr noundef %0, i32 noundef %8, ptr noundef %2, ptr noundef %3) #2
ret void
}
declare i32 @zfcp_erp_port_reopen(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_s390_scsi_extr_zfcp_erp.c_zfcp_erp_port_shutdown |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_timeout_invite_listen.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_timeout_invite_listen.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.p2p_data = type { ptr, ptr, i32, i32 }
%struct.TYPE_4__ = type { i32, ptr }
%struct.TYPE_6__ = type { i32, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32 }
@P2P_INVITE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"Invitation Request retry limit reached\00", align 1
@P2P_IDLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @p2p_timeout_invite_listen], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @p2p_timeout_invite_listen(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %29, label %4
4: ; preds = %1
%5 = load i32, ptr %2, align 4, !tbaa !11
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, ptr @P2P_INVITE, align 4, !tbaa !14
%9 = tail call i32 @p2p_set_state(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = load ptr, ptr %0, align 8, !tbaa !5
%11 = getelementptr inbounds %struct.p2p_data, ptr %0, i64 0, i32 3
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = getelementptr inbounds %struct.p2p_data, ptr %0, i64 0, i32 2
%14 = load i32, ptr %13, align 8, !tbaa !16
%15 = tail call i32 @p2p_invite_send(ptr noundef nonnull %0, ptr noundef %10, i32 noundef %12, i32 noundef %14) #2
br label %32
16: ; preds = %4
%17 = tail call i32 @p2p_dbg(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
%18 = getelementptr inbounds %struct.p2p_data, ptr %0, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !17
%20 = getelementptr inbounds %struct.TYPE_4__, ptr %19, i64 0, i32 1
%21 = load ptr, ptr %20, align 8, !tbaa !18
%22 = icmp eq ptr %21, null
br i1 %22, label %29, label %23
23: ; preds = %16
%24 = load i32, ptr %19, align 8, !tbaa !20
%25 = load ptr, ptr %0, align 8, !tbaa !5
%26 = getelementptr inbounds %struct.TYPE_6__, ptr %25, i64 0, i32 1
%27 = load i32, ptr %26, align 4, !tbaa !21
%28 = tail call i32 %21(i32 noundef %24, i32 noundef -1, ptr noundef null, ptr noundef null, i32 noundef %27, i32 noundef 0, i32 noundef 0) #2
br label %29
29: ; preds = %1, %16, %23
%30 = load i32, ptr @P2P_IDLE, align 4, !tbaa !14
%31 = tail call i32 @p2p_set_state(ptr noundef nonnull %0, i32 noundef %30) #2
br label %32
32: ; preds = %29, %7
ret void
}
declare i32 @p2p_set_state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @p2p_invite_send(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @p2p_dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"p2p_data", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 20}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_6__", !10, i64 0, !13, i64 4}
!13 = !{!"TYPE_5__", !10, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !10, i64 20}
!16 = !{!6, !10, i64 16}
!17 = !{!6, !7, i64 8}
!18 = !{!19, !7, i64 8}
!19 = !{!"TYPE_4__", !10, i64 0, !7, i64 8}
!20 = !{!19, !10, i64 0}
!21 = !{!12, !10, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_timeout_invite_listen.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/p2p/extr_p2p.c_p2p_timeout_invite_listen.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@P2P_INVITE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"Invitation Request retry limit reached\00", align 1
@P2P_IDLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @p2p_timeout_invite_listen], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @p2p_timeout_invite_listen(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %29, label %4
4: ; preds = %1
%5 = load i32, ptr %2, align 4, !tbaa !12
%6 = icmp slt i32 %5, 100
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i32, ptr @P2P_INVITE, align 4, !tbaa !15
%9 = tail call i32 @p2p_set_state(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = load ptr, ptr %0, align 8, !tbaa !6
%11 = getelementptr inbounds i8, ptr %0, i64 20
%12 = load i32, ptr %11, align 4, !tbaa !16
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load i32, ptr %13, align 8, !tbaa !17
%15 = tail call i32 @p2p_invite_send(ptr noundef nonnull %0, ptr noundef %10, i32 noundef %12, i32 noundef %14) #2
br label %32
16: ; preds = %4
%17 = tail call i32 @p2p_dbg(ptr noundef nonnull %0, ptr noundef nonnull @.str) #2
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !18
%20 = getelementptr inbounds i8, ptr %19, i64 8
%21 = load ptr, ptr %20, align 8, !tbaa !19
%22 = icmp eq ptr %21, null
br i1 %22, label %29, label %23
23: ; preds = %16
%24 = load i32, ptr %19, align 8, !tbaa !21
%25 = load ptr, ptr %0, align 8, !tbaa !6
%26 = getelementptr inbounds i8, ptr %25, i64 4
%27 = load i32, ptr %26, align 4, !tbaa !22
%28 = tail call i32 %21(i32 noundef %24, i32 noundef -1, ptr noundef null, ptr noundef null, i32 noundef %27, i32 noundef 0, i32 noundef 0) #2
br label %29
29: ; preds = %1, %16, %23
%30 = load i32, ptr @P2P_IDLE, align 4, !tbaa !15
%31 = tail call i32 @p2p_set_state(ptr noundef nonnull %0, i32 noundef %30) #2
br label %32
32: ; preds = %29, %7
ret void
}
declare i32 @p2p_set_state(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @p2p_invite_send(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @p2p_dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"p2p_data", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 20}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_6__", !11, i64 0, !14, i64 4}
!14 = !{!"TYPE_5__", !11, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !11, i64 20}
!17 = !{!7, !11, i64 16}
!18 = !{!7, !8, i64 8}
!19 = !{!20, !8, i64 8}
!20 = !{!"TYPE_4__", !11, i64 0, !8, i64 8}
!21 = !{!20, !11, i64 0}
!22 = !{!13, !11, i64 4}
| freebsd_contrib_wpa_src_p2p_extr_p2p.c_p2p_timeout_invite_listen |
; ModuleID = 'AnghaBench/linux/fs/btrfs/extr_raid56.c_raid_recover_end_io.c'
source_filename = "AnghaBench/linux/fs/btrfs/extr_raid56.c_raid_recover_end_io.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bio = type { i64, ptr }
%struct.btrfs_raid_bio = type { ptr, i32, i32 }
@BLK_STS_IOERR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @raid_recover_end_io], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @raid_recover_end_io(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.bio, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr %0, align 8, !tbaa !11
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @fail_bio_stripe(ptr noundef %3, ptr noundef nonnull %0) #2
br label %10
8: ; preds = %1
%9 = tail call i32 @set_bio_pages_uptodate(ptr noundef nonnull %0) #2
br label %10
10: ; preds = %8, %6
%11 = tail call i32 @bio_put(ptr noundef nonnull %0) #2
%12 = getelementptr inbounds %struct.btrfs_raid_bio, ptr %3, i64 0, i32 2
%13 = tail call i32 @atomic_dec_and_test(ptr noundef nonnull %12) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %26, label %15
15: ; preds = %10
%16 = getelementptr inbounds %struct.btrfs_raid_bio, ptr %3, i64 0, i32 1
%17 = tail call i64 @atomic_read(ptr noundef nonnull %16) #2
%18 = load ptr, ptr %3, align 8, !tbaa !12
%19 = load i64, ptr %18, align 8, !tbaa !15
%20 = icmp sgt i64 %17, %19
br i1 %20, label %21, label %24
21: ; preds = %15
%22 = load i32, ptr @BLK_STS_IOERR, align 4, !tbaa !17
%23 = tail call i32 @rbio_orig_end_io(ptr noundef nonnull %3, i32 noundef %22) #2
br label %26
24: ; preds = %15
%25 = tail call i32 @__raid_recover_end_io(ptr noundef nonnull %3) #2
br label %26
26: ; preds = %21, %24, %10
ret void
}
declare i32 @fail_bio_stripe(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @set_bio_pages_uptodate(ptr noundef) local_unnamed_addr #1
declare i32 @bio_put(ptr noundef) local_unnamed_addr #1
declare i32 @atomic_dec_and_test(ptr noundef) local_unnamed_addr #1
declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1
declare i32 @rbio_orig_end_io(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__raid_recover_end_io(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"bio", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"btrfs_raid_bio", !10, i64 0, !14, i64 8, !14, i64 12}
!14 = !{!"int", !8, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_2__", !7, i64 0}
!17 = !{!14, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/btrfs/extr_raid56.c_raid_recover_end_io.c'
source_filename = "AnghaBench/linux/fs/btrfs/extr_raid56.c_raid_recover_end_io.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BLK_STS_IOERR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @raid_recover_end_io], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @raid_recover_end_io(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %0, align 8, !tbaa !12
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @fail_bio_stripe(ptr noundef %3, ptr noundef nonnull %0) #2
br label %10
8: ; preds = %1
%9 = tail call i32 @set_bio_pages_uptodate(ptr noundef nonnull %0) #2
br label %10
10: ; preds = %8, %6
%11 = tail call i32 @bio_put(ptr noundef nonnull %0) #2
%12 = getelementptr inbounds i8, ptr %3, i64 12
%13 = tail call i32 @atomic_dec_and_test(ptr noundef nonnull %12) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %26, label %15
15: ; preds = %10
%16 = getelementptr inbounds i8, ptr %3, i64 8
%17 = tail call i64 @atomic_read(ptr noundef nonnull %16) #2
%18 = load ptr, ptr %3, align 8, !tbaa !13
%19 = load i64, ptr %18, align 8, !tbaa !16
%20 = icmp sgt i64 %17, %19
br i1 %20, label %21, label %24
21: ; preds = %15
%22 = load i32, ptr @BLK_STS_IOERR, align 4, !tbaa !18
%23 = tail call i32 @rbio_orig_end_io(ptr noundef nonnull %3, i32 noundef %22) #2
br label %26
24: ; preds = %15
%25 = tail call i32 @__raid_recover_end_io(ptr noundef nonnull %3) #2
br label %26
26: ; preds = %21, %24, %10
ret void
}
declare i32 @fail_bio_stripe(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @set_bio_pages_uptodate(ptr noundef) local_unnamed_addr #1
declare i32 @bio_put(ptr noundef) local_unnamed_addr #1
declare i32 @atomic_dec_and_test(ptr noundef) local_unnamed_addr #1
declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1
declare i32 @rbio_orig_end_io(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__raid_recover_end_io(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"bio", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"btrfs_raid_bio", !11, i64 0, !15, i64 8, !15, i64 12}
!15 = !{!"int", !9, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"TYPE_2__", !8, i64 0}
!18 = !{!15, !15, i64 0}
| linux_fs_btrfs_extr_raid56.c_raid_recover_end_io |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_event-top.c_async_do_nothing.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_event-top.c_async_do_nothing.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @async_do_nothing], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @async_do_nothing(i32 %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_event-top.c_async_do_nothing.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_event-top.c_async_do_nothing.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @async_do_nothing], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @async_do_nothing(i32 %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_gdb_gdb_extr_event-top.c_async_do_nothing |
; ModuleID = 'AnghaBench/freebsd/contrib/bsnmp/lib/extr_snmpclient.c_snmp_pdu_create.c'
source_filename = "AnghaBench/freebsd/contrib/bsnmp/lib/extr_snmpclient.c_snmp_pdu_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i64, i64, i32, i32, %struct.TYPE_7__, ptr, %struct.TYPE_7__, i64, i32, i32 }
%struct.TYPE_7__ = type { i32, ptr, i32 }
%struct.snmp_pdu = type { i64, i64, i32, i32, ptr, %struct.TYPE_6__, %struct.TYPE_6__, i64, i64, i64, i64, i64, i64, i32 }
%struct.TYPE_6__ = type { i32 }
@SNMP_PDU_SET = dso_local local_unnamed_addr global i64 0, align 8
@snmp_client = dso_local global %struct.TYPE_5__ zeroinitializer, align 8
@SNMP_V3 = dso_local local_unnamed_addr global i64 0, align 8
@SNMP_SECMODEL_USM = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [23 x i8] c"unknown security model\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @snmp_pdu_create(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 96) #3
%4 = load i64, ptr @SNMP_PDU_SET, align 8, !tbaa !5
%5 = icmp eq i64 %4, %1
%6 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 13
%7 = load i32, ptr %6, align 8, !tbaa !9
%8 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 8), align 8
%9 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 9), align 4
%10 = select i1 %5, i32 %9, i32 %8
%11 = tail call i32 @strlcpy(i32 noundef %7, i32 noundef %10, i32 noundef 4) #3
%12 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 12
store i64 %1, ptr %12, align 8, !tbaa !14
%13 = load i64, ptr @snmp_client, align 8, !tbaa !15
store i64 %13, ptr %0, align 8, !tbaa !18
%14 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 9
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %14, i8 0, i64 24, i1 false)
%15 = load i64, ptr @SNMP_V3, align 8, !tbaa !5
%16 = icmp eq i64 %13, %15
br i1 %16, label %17, label %55
17: ; preds = %2
%18 = load i64, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 7), align 8, !tbaa !19
%19 = add nsw i64 %18, 1
store i64 %19, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 7), align 8, !tbaa !19
%20 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 8
store i64 %19, ptr %20, align 8, !tbaa !20
%21 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 4, i32 2), align 8, !tbaa !21
%22 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 6
store i32 %21, ptr %22, align 4, !tbaa !22
%23 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 7
store i64 0, ptr %23, align 8, !tbaa !23
%24 = load i64, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 1), align 8, !tbaa !24
%25 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 1
store i64 %24, ptr %25, align 8, !tbaa !25
%26 = load i64, ptr @SNMP_SECMODEL_USM, align 8, !tbaa !5
%27 = icmp eq i64 %24, %26
br i1 %27, label %28, label %33
28: ; preds = %17
%29 = tail call i32 @memcpy(ptr noundef nonnull %22, ptr noundef nonnull getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 4), i32 noundef 4) #3
%30 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 5
%31 = tail call i32 @memcpy(ptr noundef nonnull %30, ptr noundef nonnull getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 6), i32 noundef 4) #3
%32 = tail call i32 @snmp_pdu_init_secparams(ptr noundef nonnull %0) #3
br label %35
33: ; preds = %17
%34 = tail call i32 @seterr(ptr noundef nonnull @snmp_client, ptr noundef nonnull @.str) #3
br label %35
35: ; preds = %33, %28
%36 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 2), align 8, !tbaa !26
%37 = icmp sgt i32 %36, 0
%38 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 4
%39 = load ptr, ptr %38, align 8, !tbaa !27
br i1 %37, label %40, label %43
40: ; preds = %35
%41 = load ptr, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 5), align 8, !tbaa !28
%42 = tail call i32 @memcpy(ptr noundef %39, ptr noundef %41, i32 noundef %36) #3
br label %47
43: ; preds = %35
%44 = load ptr, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 4, i32 1), align 8, !tbaa !29
%45 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 4), align 8, !tbaa !30
%46 = tail call i32 @memcpy(ptr noundef %39, ptr noundef %44, i32 noundef %45) #3
br label %47
47: ; preds = %43, %40
%48 = phi ptr [ getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 2), %40 ], [ getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 4), %43 ]
%49 = load i32, ptr %48, align 8, !tbaa !31
%50 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 2
store i32 %49, ptr %50, align 8
%51 = getelementptr inbounds %struct.snmp_pdu, ptr %0, i64 0, i32 3
%52 = load i32, ptr %51, align 4, !tbaa !32
%53 = load i32, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @snmp_client, i64 0, i32 3), align 4, !tbaa !33
%54 = tail call i32 @strlcpy(i32 noundef %52, i32 noundef %53, i32 noundef 4) #3
br label %55
55: ; preds = %2, %47
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snmp_pdu_init_secparams(ptr noundef) local_unnamed_addr #1
declare i32 @seterr(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 88}
!10 = !{!"snmp_pdu", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 20, !12, i64 24, !13, i64 32, !13, i64 36, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !11, i64 88}
!11 = !{!"int", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"TYPE_6__", !11, i64 0}
!14 = !{!10, !6, i64 80}
!15 = !{!16, !6, i64 0}
!16 = !{!"TYPE_5__", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 20, !17, i64 24, !12, i64 48, !17, i64 56, !6, i64 80, !11, i64 88, !11, i64 92}
!17 = !{!"TYPE_7__", !11, i64 0, !12, i64 8, !11, i64 16}
!18 = !{!10, !6, i64 0}
!19 = !{!16, !6, i64 80}
!20 = !{!10, !6, i64 48}
!21 = !{!16, !11, i64 40}
!22 = !{!10, !11, i64 36}
!23 = !{!10, !6, i64 40}
!24 = !{!16, !6, i64 8}
!25 = !{!10, !6, i64 8}
!26 = !{!16, !11, i64 16}
!27 = !{!10, !12, i64 24}
!28 = !{!16, !12, i64 48}
!29 = !{!16, !12, i64 32}
!30 = !{!16, !11, i64 24}
!31 = !{!11, !11, i64 0}
!32 = !{!10, !11, i64 20}
!33 = !{!16, !11, i64 20}
| ; ModuleID = 'AnghaBench/freebsd/contrib/bsnmp/lib/extr_snmpclient.c_snmp_pdu_create.c'
source_filename = "AnghaBench/freebsd/contrib/bsnmp/lib/extr_snmpclient.c_snmp_pdu_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i64, i64, i32, i32, %struct.TYPE_7__, ptr, %struct.TYPE_7__, i64, i32, i32 }
%struct.TYPE_7__ = type { i32, ptr, i32 }
@SNMP_PDU_SET = common local_unnamed_addr global i64 0, align 8
@snmp_client = common global %struct.TYPE_5__ zeroinitializer, align 8
@SNMP_V3 = common local_unnamed_addr global i64 0, align 8
@SNMP_SECMODEL_USM = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [23 x i8] c"unknown security model\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @snmp_pdu_create(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 96) #3
%4 = load i64, ptr @SNMP_PDU_SET, align 8, !tbaa !6
%5 = icmp eq i64 %4, %1
%6 = getelementptr inbounds i8, ptr %0, i64 88
%7 = load i32, ptr %6, align 8, !tbaa !10
%8 = load i32, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 88), align 8
%9 = load i32, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 92), align 4
%10 = select i1 %5, i32 %9, i32 %8
%11 = tail call i32 @strlcpy(i32 noundef %7, i32 noundef %10, i32 noundef 4) #3
%12 = getelementptr inbounds i8, ptr %0, i64 80
store i64 %1, ptr %12, align 8, !tbaa !15
%13 = load i64, ptr @snmp_client, align 8, !tbaa !16
store i64 %13, ptr %0, align 8, !tbaa !19
%14 = getelementptr inbounds i8, ptr %0, i64 56
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %14, i8 0, i64 24, i1 false)
%15 = load i64, ptr @SNMP_V3, align 8, !tbaa !6
%16 = icmp eq i64 %13, %15
br i1 %16, label %17, label %55
17: ; preds = %2
%18 = load i64, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 80), align 8, !tbaa !20
%19 = add nsw i64 %18, 1
store i64 %19, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 80), align 8, !tbaa !20
%20 = getelementptr inbounds i8, ptr %0, i64 48
store i64 %19, ptr %20, align 8, !tbaa !21
%21 = load i32, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 40), align 8, !tbaa !22
%22 = getelementptr inbounds i8, ptr %0, i64 36
store i32 %21, ptr %22, align 4, !tbaa !23
%23 = getelementptr inbounds i8, ptr %0, i64 40
store i64 0, ptr %23, align 8, !tbaa !24
%24 = load i64, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 8), align 8, !tbaa !25
%25 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %24, ptr %25, align 8, !tbaa !26
%26 = load i64, ptr @SNMP_SECMODEL_USM, align 8, !tbaa !6
%27 = icmp eq i64 %24, %26
br i1 %27, label %28, label %33
28: ; preds = %17
%29 = tail call i32 @memcpy(ptr noundef nonnull %22, ptr noundef nonnull getelementptr inbounds (i8, ptr @snmp_client, i64 24), i32 noundef 4) #3
%30 = getelementptr inbounds i8, ptr %0, i64 32
%31 = tail call i32 @memcpy(ptr noundef nonnull %30, ptr noundef nonnull getelementptr inbounds (i8, ptr @snmp_client, i64 56), i32 noundef 4) #3
%32 = tail call i32 @snmp_pdu_init_secparams(ptr noundef nonnull %0) #3
br label %35
33: ; preds = %17
%34 = tail call i32 @seterr(ptr noundef nonnull @snmp_client, ptr noundef nonnull @.str) #3
br label %35
35: ; preds = %33, %28
%36 = load i32, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 16), align 8, !tbaa !27
%37 = icmp sgt i32 %36, 0
%38 = getelementptr inbounds i8, ptr %0, i64 24
%39 = load ptr, ptr %38, align 8, !tbaa !28
br i1 %37, label %40, label %43
40: ; preds = %35
%41 = load ptr, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 48), align 8, !tbaa !29
%42 = tail call i32 @memcpy(ptr noundef %39, ptr noundef %41, i32 noundef %36) #3
br label %47
43: ; preds = %35
%44 = load ptr, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 32), align 8, !tbaa !30
%45 = load i32, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 24), align 8, !tbaa !31
%46 = tail call i32 @memcpy(ptr noundef %39, ptr noundef %44, i32 noundef %45) #3
br label %47
47: ; preds = %43, %40
%48 = phi ptr [ getelementptr inbounds (i8, ptr @snmp_client, i64 16), %40 ], [ getelementptr inbounds (i8, ptr @snmp_client, i64 24), %43 ]
%49 = load i32, ptr %48, align 8, !tbaa !32
%50 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %49, ptr %50, align 8
%51 = getelementptr inbounds i8, ptr %0, i64 20
%52 = load i32, ptr %51, align 4, !tbaa !33
%53 = load i32, ptr getelementptr inbounds (i8, ptr @snmp_client, i64 20), align 4, !tbaa !34
%54 = tail call i32 @strlcpy(i32 noundef %52, i32 noundef %53, i32 noundef 4) #3
br label %55
55: ; preds = %2, %47
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snmp_pdu_init_secparams(ptr noundef) local_unnamed_addr #1
declare i32 @seterr(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 88}
!11 = !{!"snmp_pdu", !7, i64 0, !7, i64 8, !12, i64 16, !12, i64 20, !13, i64 24, !14, i64 32, !14, i64 36, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72, !7, i64 80, !12, i64 88}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_6__", !12, i64 0}
!15 = !{!11, !7, i64 80}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_5__", !7, i64 0, !7, i64 8, !12, i64 16, !12, i64 20, !18, i64 24, !13, i64 48, !18, i64 56, !7, i64 80, !12, i64 88, !12, i64 92}
!18 = !{!"TYPE_7__", !12, i64 0, !13, i64 8, !12, i64 16}
!19 = !{!11, !7, i64 0}
!20 = !{!17, !7, i64 80}
!21 = !{!11, !7, i64 48}
!22 = !{!17, !12, i64 40}
!23 = !{!11, !12, i64 36}
!24 = !{!11, !7, i64 40}
!25 = !{!17, !7, i64 8}
!26 = !{!11, !7, i64 8}
!27 = !{!17, !12, i64 16}
!28 = !{!11, !13, i64 24}
!29 = !{!17, !13, i64 48}
!30 = !{!17, !13, i64 32}
!31 = !{!17, !12, i64 24}
!32 = !{!12, !12, i64 0}
!33 = !{!11, !12, i64 20}
!34 = !{!17, !12, i64 20}
| freebsd_contrib_bsnmp_lib_extr_snmpclient.c_snmp_pdu_create |
; ModuleID = 'AnghaBench/sumatrapdf/ext/openjpeg/src/bin/jpwl/extr_opj_jpwl_compress.c_load_images.c'
source_filename = "AnghaBench/sumatrapdf/ext/openjpeg/src/bin/jpwl/extr_opj_jpwl_compress.c_load_images.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"Could not open Folder %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"Folder opened successfully\0A\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c".\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"..\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @load_images], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @load_images(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = tail call ptr @opendir(ptr noundef %1)
%4 = icmp eq ptr %3, null
%5 = load i32, ptr @stderr, align 4, !tbaa !5
br i1 %4, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %5, ptr noundef nonnull @.str, ptr noundef %1) #3
br label %36
8: ; preds = %2
%9 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %5, ptr noundef nonnull @.str.1) #3
%10 = tail call ptr @readdir(ptr noundef nonnull %3) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %36, label %12
12: ; preds = %8, %27
%13 = phi i64 [ %33, %27 ], [ 0, %8 ]
%14 = phi ptr [ %34, %27 ], [ %10, %8 ]
br label %15
15: ; preds = %12, %24
%16 = phi ptr [ %14, %12 ], [ %25, %24 ]
%17 = load i32, ptr %16, align 4, !tbaa !9
%18 = tail call i64 @strcmp(ptr noundef nonnull @.str.2, i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %15
%21 = load i32, ptr %16, align 4, !tbaa !9
%22 = tail call i64 @strcmp(ptr noundef nonnull @.str.3, i32 noundef %21) #3
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %20, %15
%25 = tail call ptr @readdir(ptr noundef nonnull %3) #3
%26 = icmp eq ptr %25, null
br i1 %26, label %36, label %15, !llvm.loop !11
27: ; preds = %20
%28 = load ptr, ptr %0, align 8, !tbaa !13
%29 = getelementptr inbounds i32, ptr %28, i64 %13
%30 = load i32, ptr %29, align 4, !tbaa !5
%31 = load i32, ptr %16, align 4, !tbaa !9
%32 = tail call i32 @strcpy(i32 noundef %30, i32 noundef %31) #3
%33 = add nuw i64 %13, 1
%34 = tail call ptr @readdir(ptr noundef nonnull %3) #3
%35 = icmp eq ptr %34, null
br i1 %35, label %36, label %12, !llvm.loop !11
36: ; preds = %27, %24, %8, %6
%37 = phi i32 [ 1, %6 ], [ 0, %8 ], [ 0, %24 ], [ 0, %27 ]
ret i32 %37
}
; Function Attrs: nofree nounwind
declare noalias noundef ptr @opendir(ptr nocapture noundef readonly) local_unnamed_addr #1
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare ptr @readdir(ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"dirent", !6, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/openjpeg/src/bin/jpwl/extr_opj_jpwl_compress.c_load_images.c'
source_filename = "AnghaBench/sumatrapdf/ext/openjpeg/src/bin/jpwl/extr_opj_jpwl_compress.c_load_images.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"Could not open Folder %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [28 x i8] c"Folder opened successfully\0A\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c".\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"..\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @load_images], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @load_images(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = tail call ptr @opendir(ptr noundef %1)
%4 = icmp eq ptr %3, null
%5 = load i32, ptr @stderr, align 4, !tbaa !6
br i1 %4, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %5, ptr noundef nonnull @.str, ptr noundef %1) #3
br label %36
8: ; preds = %2
%9 = tail call i32 (i32, ptr, ...) @fprintf(i32 noundef %5, ptr noundef nonnull @.str.1) #3
%10 = tail call ptr @readdir(ptr noundef nonnull %3) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %36, label %12
12: ; preds = %8, %27
%13 = phi i64 [ %33, %27 ], [ 0, %8 ]
%14 = phi ptr [ %34, %27 ], [ %10, %8 ]
br label %15
15: ; preds = %12, %24
%16 = phi ptr [ %14, %12 ], [ %25, %24 ]
%17 = load i32, ptr %16, align 4, !tbaa !10
%18 = tail call i64 @strcmp(ptr noundef nonnull @.str.2, i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %15
%21 = load i32, ptr %16, align 4, !tbaa !10
%22 = tail call i64 @strcmp(ptr noundef nonnull @.str.3, i32 noundef %21) #3
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %20, %15
%25 = tail call ptr @readdir(ptr noundef nonnull %3) #3
%26 = icmp eq ptr %25, null
br i1 %26, label %36, label %15, !llvm.loop !12
27: ; preds = %20
%28 = load ptr, ptr %0, align 8, !tbaa !14
%29 = getelementptr inbounds i32, ptr %28, i64 %13
%30 = load i32, ptr %29, align 4, !tbaa !6
%31 = load i32, ptr %16, align 4, !tbaa !10
%32 = tail call i32 @strcpy(i32 noundef %30, i32 noundef %31) #3
%33 = add nuw nsw i64 %13, 1
%34 = tail call ptr @readdir(ptr noundef nonnull %3) #3
%35 = icmp eq ptr %34, null
br i1 %35, label %36, label %12, !llvm.loop !12
36: ; preds = %27, %24, %8, %6
%37 = phi i32 [ 1, %6 ], [ 0, %8 ], [ 0, %24 ], [ 0, %27 ]
ret i32 %37
}
; Function Attrs: nofree nounwind
declare noalias noundef ptr @opendir(ptr nocapture noundef readonly) local_unnamed_addr #1
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare ptr @readdir(ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"dirent", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
| sumatrapdf_ext_openjpeg_src_bin_jpwl_extr_opj_jpwl_compress.c_load_images |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptbase.c_pci_enable_io_access.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptbase.c_pci_enable_io_access.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PCI_COMMAND = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pci_enable_io_access], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pci_enable_io_access(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @PCI_COMMAND, align 4, !tbaa !5
%4 = call i32 @pci_read_config_word(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = load i32, ptr %2, align 4, !tbaa !5
%6 = or i32 %5, 1
store i32 %6, ptr %2, align 4, !tbaa !5
%7 = load i32, ptr @PCI_COMMAND, align 4, !tbaa !5
%8 = call i32 @pci_write_config_word(ptr noundef %0, i32 noundef %7, i32 noundef %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pci_read_config_word(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pci_write_config_word(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptbase.c_pci_enable_io_access.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptbase.c_pci_enable_io_access.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PCI_COMMAND = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pci_enable_io_access], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pci_enable_io_access(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @PCI_COMMAND, align 4, !tbaa !6
%4 = call i32 @pci_read_config_word(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = load i32, ptr %2, align 4, !tbaa !6
%6 = or i32 %5, 1
store i32 %6, ptr %2, align 4, !tbaa !6
%7 = load i32, ptr @PCI_COMMAND, align 4, !tbaa !6
%8 = call i32 @pci_write_config_word(ptr noundef %0, i32 noundef %7, i32 noundef %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pci_read_config_word(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @pci_write_config_word(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_message_fusion_extr_mptbase.c_pci_enable_io_access |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1_sru.c_sru_partition.c'
source_filename = "AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1_sru.c_sru_partition.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SRU_PAD_SINK = dso_local local_unnamed_addr global i32 0, align 4
@SRU_PAD_SOURCE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sru_partition], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sru_partition(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef writeonly %2, i32 %3, ptr nocapture noundef %4) #0 {
%6 = tail call ptr @to_sru(ptr noundef %0) #2
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = load i32, ptr @SRU_PAD_SINK, align 4, !tbaa !11
%9 = tail call ptr @vsp1_entity_get_pad_format(ptr noundef nonnull %6, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr %6, align 4, !tbaa !5
%11 = load i32, ptr @SRU_PAD_SOURCE, align 4, !tbaa !11
%12 = tail call ptr @vsp1_entity_get_pad_format(ptr noundef nonnull %6, i32 noundef %10, i32 noundef %11) #2
%13 = load i64, ptr %9, align 8, !tbaa !12
%14 = load i64, ptr %12, align 8, !tbaa !12
%15 = icmp eq i64 %13, %14
br i1 %15, label %19, label %16
16: ; preds = %5
%17 = load <2 x i32>, ptr %4, align 4, !tbaa !11
%18 = sdiv <2 x i32> %17, <i32 2, i32 2>
store <2 x i32> %18, ptr %4, align 4, !tbaa !11
br label %19
19: ; preds = %16, %5
%20 = load i64, ptr %4, align 4
store i64 %20, ptr %2, align 4
ret void
}
declare ptr @to_sru(ptr noundef) local_unnamed_addr #1
declare ptr @vsp1_entity_get_pad_format(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"vsp1_sru", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"v4l2_mbus_framefmt", !14, i64 0}
!14 = !{!"long", !9, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1_sru.c_sru_partition.c'
source_filename = "AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1_sru.c_sru_partition.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SRU_PAD_SINK = common local_unnamed_addr global i32 0, align 4
@SRU_PAD_SOURCE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sru_partition], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sru_partition(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef writeonly %2, i32 %3, ptr nocapture noundef %4) #0 {
%6 = tail call ptr @to_sru(ptr noundef %0) #2
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = load i32, ptr @SRU_PAD_SINK, align 4, !tbaa !12
%9 = tail call ptr @vsp1_entity_get_pad_format(ptr noundef nonnull %6, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr %6, align 4, !tbaa !6
%11 = load i32, ptr @SRU_PAD_SOURCE, align 4, !tbaa !12
%12 = tail call ptr @vsp1_entity_get_pad_format(ptr noundef nonnull %6, i32 noundef %10, i32 noundef %11) #2
%13 = load i64, ptr %9, align 8, !tbaa !13
%14 = load i64, ptr %12, align 8, !tbaa !13
%15 = icmp eq i64 %13, %14
br i1 %15, label %22, label %16
16: ; preds = %5
%17 = load i32, ptr %4, align 4, !tbaa !16
%18 = sdiv i32 %17, 2
store i32 %18, ptr %4, align 4, !tbaa !16
%19 = getelementptr inbounds i8, ptr %4, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !18
%21 = sdiv i32 %20, 2
store i32 %21, ptr %19, align 4, !tbaa !18
br label %22
22: ; preds = %16, %5
%23 = load i64, ptr %4, align 4
store i64 %23, ptr %2, align 4
ret void
}
declare ptr @to_sru(ptr noundef) local_unnamed_addr #1
declare ptr @vsp1_entity_get_pad_format(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"vsp1_sru", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"v4l2_mbus_framefmt", !15, i64 0}
!15 = !{!"long", !10, i64 0}
!16 = !{!17, !9, i64 0}
!17 = !{!"vsp1_partition_window", !9, i64 0, !9, i64 4}
!18 = !{!17, !9, i64 4}
| linux_drivers_media_platform_vsp1_extr_vsp1_sru.c_sru_partition |
; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/power/extr_swap.c_swsusp_check.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/power/extr_swap.c_swsusp_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32 }
@swsusp_resume_device = dso_local local_unnamed_addr global i32 0, align 4
@FMODE_READ = dso_local local_unnamed_addr global i32 0, align 4
@resume_bdev = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@swsusp_header = dso_local local_unnamed_addr global ptr null, align 8
@swsusp_resume_block = dso_local local_unnamed_addr global i32 0, align 4
@SWSUSP_SIG = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"PM: Signature found, resuming\0A\00", align 1
@.str.1 = private unnamed_addr constant [34 x i8] c"PM: Error %d checking image file\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @swsusp_check() local_unnamed_addr #0 {
%1 = load i32, ptr @swsusp_resume_device, align 4, !tbaa !5
%2 = load i32, ptr @FMODE_READ, align 4, !tbaa !5
%3 = tail call i32 @open_by_devnum(i32 noundef %1, i32 noundef %2) #2
store i32 %3, ptr @resume_bdev, align 4, !tbaa !5
%4 = tail call i32 @IS_ERR(i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @resume_bdev, align 4, !tbaa !5
br i1 %5, label %7, label %46
7: ; preds = %0
%8 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !5
%9 = tail call i32 @set_blocksize(i32 noundef %6, i32 noundef %8) #2
%10 = load ptr, ptr @swsusp_header, align 8, !tbaa !9
%11 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !5
%12 = tail call i32 @memset(ptr noundef %10, i32 noundef 0, i32 noundef %11) #2
%13 = load i32, ptr @swsusp_resume_block, align 4, !tbaa !5
%14 = load ptr, ptr @swsusp_header, align 8, !tbaa !9
%15 = tail call i32 @bio_read_page(i32 noundef %13, ptr noundef %14, ptr noundef null) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %39
17: ; preds = %7
%18 = load i32, ptr @SWSUSP_SIG, align 4, !tbaa !5
%19 = load ptr, ptr @swsusp_header, align 8, !tbaa !9
%20 = getelementptr inbounds %struct.TYPE_5__, ptr %19, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !11
%22 = tail call i32 @memcmp(i32 noundef %18, i32 noundef %21, i32 noundef 10) #2
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %33
24: ; preds = %17
%25 = load ptr, ptr @swsusp_header, align 8, !tbaa !9
%26 = getelementptr inbounds %struct.TYPE_5__, ptr %25, i64 0, i32 1
%27 = load i32, ptr %26, align 4, !tbaa !11
%28 = load i32, ptr %25, align 4, !tbaa !13
%29 = tail call i32 @memcpy(i32 noundef %27, i32 noundef %28, i32 noundef 10) #2
%30 = load i32, ptr @swsusp_resume_block, align 4, !tbaa !5
%31 = load ptr, ptr @swsusp_header, align 8, !tbaa !9
%32 = tail call i32 @bio_write_page(i32 noundef %30, ptr noundef %31, ptr noundef null) #2
br label %36
33: ; preds = %17
%34 = load i32, ptr @EINVAL, align 4, !tbaa !5
%35 = sub nsw i32 0, %34
br label %36
36: ; preds = %24, %33
%37 = phi i32 [ %35, %33 ], [ %32, %24 ]
%38 = icmp eq i32 %37, 0
br i1 %38, label %44, label %39
39: ; preds = %36, %7
%40 = phi i32 [ %37, %36 ], [ %15, %7 ]
%41 = load i32, ptr @resume_bdev, align 4, !tbaa !5
%42 = load i32, ptr @FMODE_READ, align 4, !tbaa !5
%43 = tail call i32 @blkdev_put(i32 noundef %41, i32 noundef %42) #2
br label %49
44: ; preds = %36
%45 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str) #2
br label %52
46: ; preds = %0
%47 = tail call i32 @PTR_ERR(i32 noundef %6) #2
%48 = icmp eq i32 %47, 0
br i1 %48, label %52, label %49
49: ; preds = %39, %46
%50 = phi i32 [ %40, %39 ], [ %47, %46 ]
%51 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str.1, i32 noundef %50) #2
br label %52
52: ; preds = %44, %49, %46
%53 = phi i32 [ 0, %44 ], [ %50, %49 ], [ 0, %46 ]
ret i32 %53
}
declare i32 @open_by_devnum(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IS_ERR(i32 noundef) local_unnamed_addr #1
declare i32 @set_blocksize(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bio_read_page(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memcmp(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bio_write_page(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @blkdev_put(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_debug(ptr noundef, ...) local_unnamed_addr #1
declare i32 @PTR_ERR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"TYPE_5__", !6, i64 0, !6, i64 4}
!13 = !{!12, !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/power/extr_swap.c_swsusp_check.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/power/extr_swap.c_swsusp_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@swsusp_resume_device = common local_unnamed_addr global i32 0, align 4
@FMODE_READ = common local_unnamed_addr global i32 0, align 4
@resume_bdev = common local_unnamed_addr global i32 0, align 4
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@swsusp_header = common local_unnamed_addr global ptr null, align 8
@swsusp_resume_block = common local_unnamed_addr global i32 0, align 4
@SWSUSP_SIG = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"PM: Signature found, resuming\0A\00", align 1
@.str.1 = private unnamed_addr constant [34 x i8] c"PM: Error %d checking image file\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @swsusp_check() local_unnamed_addr #0 {
%1 = load i32, ptr @swsusp_resume_device, align 4, !tbaa !6
%2 = load i32, ptr @FMODE_READ, align 4, !tbaa !6
%3 = tail call i32 @open_by_devnum(i32 noundef %1, i32 noundef %2) #2
store i32 %3, ptr @resume_bdev, align 4, !tbaa !6
%4 = tail call i32 @IS_ERR(i32 noundef %3) #2
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @resume_bdev, align 4, !tbaa !6
br i1 %5, label %7, label %46
7: ; preds = %0
%8 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%9 = tail call i32 @set_blocksize(i32 noundef %6, i32 noundef %8) #2
%10 = load ptr, ptr @swsusp_header, align 8, !tbaa !10
%11 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%12 = tail call i32 @memset(ptr noundef %10, i32 noundef 0, i32 noundef %11) #2
%13 = load i32, ptr @swsusp_resume_block, align 4, !tbaa !6
%14 = load ptr, ptr @swsusp_header, align 8, !tbaa !10
%15 = tail call i32 @bio_read_page(i32 noundef %13, ptr noundef %14, ptr noundef null) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %39
17: ; preds = %7
%18 = load i32, ptr @SWSUSP_SIG, align 4, !tbaa !6
%19 = load ptr, ptr @swsusp_header, align 8, !tbaa !10
%20 = getelementptr inbounds i8, ptr %19, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !12
%22 = tail call i32 @memcmp(i32 noundef %18, i32 noundef %21, i32 noundef 10) #2
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %33
24: ; preds = %17
%25 = load ptr, ptr @swsusp_header, align 8, !tbaa !10
%26 = getelementptr inbounds i8, ptr %25, i64 4
%27 = load i32, ptr %26, align 4, !tbaa !12
%28 = load i32, ptr %25, align 4, !tbaa !14
%29 = tail call i32 @memcpy(i32 noundef %27, i32 noundef %28, i32 noundef 10) #2
%30 = load i32, ptr @swsusp_resume_block, align 4, !tbaa !6
%31 = load ptr, ptr @swsusp_header, align 8, !tbaa !10
%32 = tail call i32 @bio_write_page(i32 noundef %30, ptr noundef %31, ptr noundef null) #2
br label %36
33: ; preds = %17
%34 = load i32, ptr @EINVAL, align 4, !tbaa !6
%35 = sub nsw i32 0, %34
br label %36
36: ; preds = %24, %33
%37 = phi i32 [ %35, %33 ], [ %32, %24 ]
%38 = icmp eq i32 %37, 0
br i1 %38, label %44, label %39
39: ; preds = %36, %7
%40 = phi i32 [ %37, %36 ], [ %15, %7 ]
%41 = load i32, ptr @resume_bdev, align 4, !tbaa !6
%42 = load i32, ptr @FMODE_READ, align 4, !tbaa !6
%43 = tail call i32 @blkdev_put(i32 noundef %41, i32 noundef %42) #2
br label %49
44: ; preds = %36
%45 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str) #2
br label %52
46: ; preds = %0
%47 = tail call i32 @PTR_ERR(i32 noundef %6) #2
%48 = icmp eq i32 %47, 0
br i1 %48, label %52, label %49
49: ; preds = %39, %46
%50 = phi i32 [ %40, %39 ], [ %47, %46 ]
%51 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str.1, i32 noundef %50) #2
br label %52
52: ; preds = %44, %49, %46
%53 = phi i32 [ 0, %44 ], [ %50, %49 ], [ 0, %46 ]
ret i32 %53
}
declare i32 @open_by_devnum(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IS_ERR(i32 noundef) local_unnamed_addr #1
declare i32 @set_blocksize(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bio_read_page(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memcmp(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bio_write_page(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @blkdev_put(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_debug(ptr noundef, ...) local_unnamed_addr #1
declare i32 @PTR_ERR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 4}
!13 = !{!"TYPE_5__", !7, i64 0, !7, i64 4}
!14 = !{!13, !7, i64 0}
| fastsocket_kernel_kernel_power_extr_swap.c_swsusp_check |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ata/extr_ata-sata.c_ata_sata_phy_reset.c'
source_filename = "AnghaBench/freebsd/sys/dev/ata/extr_ata-sata.c_ata_sata_phy_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ata_channel = type { i64, ptr }
%struct.TYPE_2__ = type { i32 }
@ATA_SCONTROL = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_DET_MASK = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_DET_IDLE = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_IPM_DIS_PARTIAL = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_IPM_DIS_SLUMBER = dso_local local_unnamed_addr global i32 0, align 4
@bootverbose = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [16 x i8] c"hard reset ...\0A\00", align 1
@.str.1 = private unnamed_addr constant [21 x i8] c"p%d: hard reset ...\0A\00", align 1
@ATA_SC_SPD_SPEED_GEN1 = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_SPD_SPEED_GEN2 = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_SPD_SPEED_GEN3 = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SC_DET_RESET = dso_local local_unnamed_addr global i32 0, align 4
@ATA_SERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [19 x i8] c"hard reset failed\0A\00", align 1
@.str.3 = private unnamed_addr constant [24 x i8] c"p%d: hard reset failed\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @ata_sata_phy_reset(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
%5 = tail call ptr @device_get_softc(i32 noundef %0) #4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%6 = getelementptr inbounds %struct.ata_channel, ptr %5, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = icmp slt i32 %1, 0
%9 = tail call i32 @llvm.smax.i32(i32 %1, i32 0)
%10 = zext nneg i32 %9 to i64
%11 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !11
%13 = icmp sgt i32 %12, 0
%14 = icmp eq i32 %2, 0
%15 = or i1 %14, %13
br i1 %15, label %37, label %16
16: ; preds = %3
%17 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !14
%18 = call i64 @ata_sata_scr_read(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %17, ptr noundef nonnull %4) #4
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %126
20: ; preds = %16
%21 = load i32, ptr %4, align 4, !tbaa !14
%22 = load i32, ptr @ATA_SC_DET_MASK, align 4, !tbaa !14
%23 = and i32 %22, %21
%24 = load i32, ptr @ATA_SC_DET_IDLE, align 4, !tbaa !14
%25 = icmp eq i32 %23, %24
br i1 %25, label %26, label %37
26: ; preds = %20
%27 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !14
%28 = load i64, ptr %5, align 8, !tbaa !15
%29 = icmp sgt i64 %28, 0
%30 = load i32, ptr @ATA_SC_IPM_DIS_PARTIAL, align 4
%31 = load i32, ptr @ATA_SC_IPM_DIS_SLUMBER, align 4
%32 = or i32 %31, %30
%33 = select i1 %29, i32 0, i32 %32
%34 = or i32 %33, %23
%35 = call i64 @ata_sata_scr_write(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %27, i32 noundef %34) #4
%36 = call i32 @ata_sata_connect(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %2) #4
br label %126
37: ; preds = %20, %3
%38 = load i64, ptr @bootverbose, align 8, !tbaa !16
%39 = icmp eq i64 %38, 0
br i1 %39, label %45, label %40
40: ; preds = %37
br i1 %8, label %41, label %43
41: ; preds = %40
%42 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str) #4
br label %45
43: ; preds = %40
%44 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.1, i32 noundef %1) #4
br label %45
45: ; preds = %41, %43, %37
switch i32 %12, label %52 [
i32 1, label %46
i32 2, label %48
i32 3, label %50
]
46: ; preds = %45
%47 = load i32, ptr @ATA_SC_SPD_SPEED_GEN1, align 4, !tbaa !14
br label %52
48: ; preds = %45
%49 = load i32, ptr @ATA_SC_SPD_SPEED_GEN2, align 4, !tbaa !14
br label %52
50: ; preds = %45
%51 = load i32, ptr @ATA_SC_SPD_SPEED_GEN3, align 4, !tbaa !14
br label %52
52: ; preds = %45, %48, %50, %46
%53 = phi i32 [ %47, %46 ], [ %49, %48 ], [ %51, %50 ], [ 0, %45 ]
br label %54
54: ; preds = %52, %113
%55 = phi i32 [ 0, %52 ], [ %114, %113 ]
%56 = load i32, ptr @ATA_SC_DET_RESET, align 4, !tbaa !14
br label %57
57: ; preds = %73, %54
%58 = phi i32 [ %56, %54 ], [ %77, %73 ]
%59 = phi i32 [ 0, %54 ], [ %79, %73 ]
%60 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !14
%61 = load i32, ptr @ATA_SC_IPM_DIS_PARTIAL, align 4, !tbaa !14
%62 = load i32, ptr @ATA_SC_IPM_DIS_SLUMBER, align 4, !tbaa !14
%63 = or i32 %58, %61
%64 = or i32 %63, %62
%65 = or i32 %64, %53
%66 = call i64 @ata_sata_scr_write(ptr noundef %5, i32 noundef %1, i32 noundef %60, i32 noundef %65) #4
%67 = icmp eq i64 %66, 0
br i1 %67, label %68, label %116
68: ; preds = %57
%69 = call i32 @ata_udelay(i32 noundef 100) #4
%70 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !14
%71 = call i64 @ata_sata_scr_read(ptr noundef %5, i32 noundef %1, i32 noundef %70, ptr noundef nonnull %4) #4
%72 = icmp eq i64 %71, 0
br i1 %72, label %73, label %116
73: ; preds = %68
%74 = load i32, ptr %4, align 4, !tbaa !14
%75 = load i32, ptr @ATA_SC_DET_MASK, align 4, !tbaa !14
%76 = and i32 %75, %74
%77 = load i32, ptr @ATA_SC_DET_RESET, align 4, !tbaa !14
%78 = icmp ne i32 %76, %77
%79 = add nuw nsw i32 %59, 1
%80 = icmp ult i32 %59, 9
%81 = select i1 %78, i1 %80, i1 false
br i1 %81, label %57, label %82, !llvm.loop !17
82: ; preds = %73
%83 = call i32 @ata_udelay(i32 noundef 5000) #4
br label %87
84: ; preds = %106
%85 = add nuw nsw i32 %88, 1
%86 = icmp eq i32 %85, 10
br i1 %86, label %113, label %87, !llvm.loop !19
87: ; preds = %82, %84
%88 = phi i32 [ 0, %82 ], [ %85, %84 ]
%89 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !14
%90 = load i32, ptr @ATA_SC_DET_IDLE, align 4, !tbaa !14
%91 = load i64, ptr %5, align 8, !tbaa !15
%92 = icmp sgt i64 %91, 0
%93 = load i32, ptr @ATA_SC_IPM_DIS_PARTIAL, align 4
%94 = load i32, ptr @ATA_SC_IPM_DIS_SLUMBER, align 4
%95 = or i32 %94, %93
%96 = select i1 %92, i32 0, i32 %95
%97 = or i32 %90, %96
%98 = or i32 %97, %53
%99 = call i64 @ata_sata_scr_write(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %89, i32 noundef %98) #4
%100 = icmp eq i64 %99, 0
br i1 %100, label %101, label %116
101: ; preds = %87
%102 = call i32 @ata_udelay(i32 noundef 100) #4
%103 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !14
%104 = call i64 @ata_sata_scr_read(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %103, ptr noundef nonnull %4) #4
%105 = icmp eq i64 %104, 0
br i1 %105, label %106, label %116
106: ; preds = %101
%107 = load i32, ptr %4, align 4, !tbaa !14
%108 = load i32, ptr @ATA_SC_DET_MASK, align 4, !tbaa !14
%109 = and i32 %108, %107
%110 = icmp eq i32 %109, 0
br i1 %110, label %111, label %84
111: ; preds = %106
%112 = call i32 @ata_sata_connect(ptr noundef nonnull %5, i32 noundef %1, i32 noundef 0) #4
br label %126
113: ; preds = %84
%114 = add nuw nsw i32 %55, 1
%115 = icmp eq i32 %114, 10
br i1 %115, label %116, label %54, !llvm.loop !20
116: ; preds = %113, %68, %57, %101, %87
%117 = load i32, ptr @ATA_SERROR, align 4, !tbaa !14
%118 = call i64 @ata_sata_scr_write(ptr noundef %5, i32 noundef %1, i32 noundef %117, i32 noundef -1) #4
%119 = load i64, ptr @bootverbose, align 8, !tbaa !16
%120 = icmp eq i64 %119, 0
br i1 %120, label %126, label %121
121: ; preds = %116
br i1 %8, label %122, label %124
122: ; preds = %121
%123 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.2) #4
br label %126
124: ; preds = %121
%125 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.3, i32 noundef %1) #4
br label %126
126: ; preds = %116, %124, %122, %16, %111, %26
%127 = phi i32 [ %36, %26 ], [ %112, %111 ], [ 0, %16 ], [ 0, %122 ], [ 0, %124 ], [ 0, %116 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %127
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare i64 @ata_sata_scr_read(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @ata_sata_scr_write(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ata_sata_connect(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @ata_udelay(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ata_channel", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ata/extr_ata-sata.c_ata_sata_phy_reset.c'
source_filename = "AnghaBench/freebsd/sys/dev/ata/extr_ata-sata.c_ata_sata_phy_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@ATA_SCONTROL = common local_unnamed_addr global i32 0, align 4
@ATA_SC_DET_MASK = common local_unnamed_addr global i32 0, align 4
@ATA_SC_DET_IDLE = common local_unnamed_addr global i32 0, align 4
@ATA_SC_IPM_DIS_PARTIAL = common local_unnamed_addr global i32 0, align 4
@ATA_SC_IPM_DIS_SLUMBER = common local_unnamed_addr global i32 0, align 4
@bootverbose = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [16 x i8] c"hard reset ...\0A\00", align 1
@.str.1 = private unnamed_addr constant [21 x i8] c"p%d: hard reset ...\0A\00", align 1
@ATA_SC_SPD_SPEED_GEN1 = common local_unnamed_addr global i32 0, align 4
@ATA_SC_SPD_SPEED_GEN2 = common local_unnamed_addr global i32 0, align 4
@ATA_SC_SPD_SPEED_GEN3 = common local_unnamed_addr global i32 0, align 4
@ATA_SC_DET_RESET = common local_unnamed_addr global i32 0, align 4
@ATA_SERROR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [19 x i8] c"hard reset failed\0A\00", align 1
@.str.3 = private unnamed_addr constant [24 x i8] c"p%d: hard reset failed\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ata_sata_phy_reset(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
%5 = tail call ptr @device_get_softc(i32 noundef %0) #4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%6 = getelementptr inbounds i8, ptr %5, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = icmp slt i32 %1, 0
%9 = tail call i32 @llvm.smax.i32(i32 %1, i32 0)
%10 = zext nneg i32 %9 to i64
%11 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = icmp sgt i32 %12, 0
%14 = icmp eq i32 %2, 0
%15 = or i1 %14, %13
br i1 %15, label %37, label %16
16: ; preds = %3
%17 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !15
%18 = call i64 @ata_sata_scr_read(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %17, ptr noundef nonnull %4) #4
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %126
20: ; preds = %16
%21 = load i32, ptr %4, align 4, !tbaa !15
%22 = load i32, ptr @ATA_SC_DET_MASK, align 4, !tbaa !15
%23 = and i32 %22, %21
%24 = load i32, ptr @ATA_SC_DET_IDLE, align 4, !tbaa !15
%25 = icmp eq i32 %23, %24
br i1 %25, label %26, label %37
26: ; preds = %20
%27 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !15
%28 = load i64, ptr %5, align 8, !tbaa !16
%29 = icmp sgt i64 %28, 0
%30 = load i32, ptr @ATA_SC_IPM_DIS_PARTIAL, align 4
%31 = load i32, ptr @ATA_SC_IPM_DIS_SLUMBER, align 4
%32 = or i32 %31, %30
%33 = select i1 %29, i32 0, i32 %32
%34 = or i32 %33, %23
%35 = call i64 @ata_sata_scr_write(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %27, i32 noundef %34) #4
%36 = call i32 @ata_sata_connect(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %2) #4
br label %126
37: ; preds = %20, %3
%38 = load i64, ptr @bootverbose, align 8, !tbaa !17
%39 = icmp eq i64 %38, 0
br i1 %39, label %45, label %40
40: ; preds = %37
br i1 %8, label %41, label %43
41: ; preds = %40
%42 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str) #4
br label %45
43: ; preds = %40
%44 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.1, i32 noundef %1) #4
br label %45
45: ; preds = %41, %43, %37
switch i32 %12, label %52 [
i32 1, label %46
i32 2, label %48
i32 3, label %50
]
46: ; preds = %45
%47 = load i32, ptr @ATA_SC_SPD_SPEED_GEN1, align 4, !tbaa !15
br label %52
48: ; preds = %45
%49 = load i32, ptr @ATA_SC_SPD_SPEED_GEN2, align 4, !tbaa !15
br label %52
50: ; preds = %45
%51 = load i32, ptr @ATA_SC_SPD_SPEED_GEN3, align 4, !tbaa !15
br label %52
52: ; preds = %45, %48, %50, %46
%53 = phi i32 [ %47, %46 ], [ %49, %48 ], [ %51, %50 ], [ 0, %45 ]
br label %54
54: ; preds = %52, %113
%55 = phi i32 [ 0, %52 ], [ %114, %113 ]
%56 = load i32, ptr @ATA_SC_DET_RESET, align 4, !tbaa !15
br label %57
57: ; preds = %73, %54
%58 = phi i32 [ %56, %54 ], [ %77, %73 ]
%59 = phi i32 [ 0, %54 ], [ %79, %73 ]
%60 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !15
%61 = load i32, ptr @ATA_SC_IPM_DIS_PARTIAL, align 4, !tbaa !15
%62 = load i32, ptr @ATA_SC_IPM_DIS_SLUMBER, align 4, !tbaa !15
%63 = or i32 %58, %61
%64 = or i32 %63, %62
%65 = or i32 %64, %53
%66 = call i64 @ata_sata_scr_write(ptr noundef %5, i32 noundef %1, i32 noundef %60, i32 noundef %65) #4
%67 = icmp eq i64 %66, 0
br i1 %67, label %68, label %116
68: ; preds = %57
%69 = call i32 @ata_udelay(i32 noundef 100) #4
%70 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !15
%71 = call i64 @ata_sata_scr_read(ptr noundef %5, i32 noundef %1, i32 noundef %70, ptr noundef nonnull %4) #4
%72 = icmp eq i64 %71, 0
br i1 %72, label %73, label %116
73: ; preds = %68
%74 = load i32, ptr %4, align 4, !tbaa !15
%75 = load i32, ptr @ATA_SC_DET_MASK, align 4, !tbaa !15
%76 = and i32 %75, %74
%77 = load i32, ptr @ATA_SC_DET_RESET, align 4, !tbaa !15
%78 = icmp ne i32 %76, %77
%79 = add nuw nsw i32 %59, 1
%80 = icmp ult i32 %59, 9
%81 = select i1 %78, i1 %80, i1 false
br i1 %81, label %57, label %82, !llvm.loop !18
82: ; preds = %73
%83 = call i32 @ata_udelay(i32 noundef 5000) #4
br label %87
84: ; preds = %106
%85 = add nuw nsw i32 %88, 1
%86 = icmp eq i32 %85, 10
br i1 %86, label %113, label %87, !llvm.loop !20
87: ; preds = %82, %84
%88 = phi i32 [ 0, %82 ], [ %85, %84 ]
%89 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !15
%90 = load i32, ptr @ATA_SC_DET_IDLE, align 4, !tbaa !15
%91 = load i64, ptr %5, align 8, !tbaa !16
%92 = icmp sgt i64 %91, 0
%93 = load i32, ptr @ATA_SC_IPM_DIS_PARTIAL, align 4
%94 = load i32, ptr @ATA_SC_IPM_DIS_SLUMBER, align 4
%95 = or i32 %94, %93
%96 = select i1 %92, i32 0, i32 %95
%97 = or i32 %90, %96
%98 = or i32 %97, %53
%99 = call i64 @ata_sata_scr_write(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %89, i32 noundef %98) #4
%100 = icmp eq i64 %99, 0
br i1 %100, label %101, label %116
101: ; preds = %87
%102 = call i32 @ata_udelay(i32 noundef 100) #4
%103 = load i32, ptr @ATA_SCONTROL, align 4, !tbaa !15
%104 = call i64 @ata_sata_scr_read(ptr noundef nonnull %5, i32 noundef %1, i32 noundef %103, ptr noundef nonnull %4) #4
%105 = icmp eq i64 %104, 0
br i1 %105, label %106, label %116
106: ; preds = %101
%107 = load i32, ptr %4, align 4, !tbaa !15
%108 = load i32, ptr @ATA_SC_DET_MASK, align 4, !tbaa !15
%109 = and i32 %108, %107
%110 = icmp eq i32 %109, 0
br i1 %110, label %111, label %84
111: ; preds = %106
%112 = call i32 @ata_sata_connect(ptr noundef nonnull %5, i32 noundef %1, i32 noundef 0) #4
br label %126
113: ; preds = %84
%114 = add nuw nsw i32 %55, 1
%115 = icmp eq i32 %114, 10
br i1 %115, label %116, label %54, !llvm.loop !21
116: ; preds = %113, %68, %57, %101, %87
%117 = load i32, ptr @ATA_SERROR, align 4, !tbaa !15
%118 = call i64 @ata_sata_scr_write(ptr noundef %5, i32 noundef %1, i32 noundef %117, i32 noundef -1) #4
%119 = load i64, ptr @bootverbose, align 8, !tbaa !17
%120 = icmp eq i64 %119, 0
br i1 %120, label %126, label %121
121: ; preds = %116
br i1 %8, label %122, label %124
122: ; preds = %121
%123 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.2) #4
br label %126
124: ; preds = %121
%125 = call i32 (i32, ptr, ...) @device_printf(i32 noundef %0, ptr noundef nonnull @.str.3, i32 noundef %1) #4
br label %126
126: ; preds = %116, %124, %122, %16, %111, %26
%127 = phi i32 [ %36, %26 ], [ %112, %111 ], [ 0, %16 ], [ 0, %122 ], [ 0, %124 ], [ 0, %116 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %127
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare i64 @ata_sata_scr_read(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @ata_sata_scr_write(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ata_sata_connect(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
declare i32 @ata_udelay(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ata_channel", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
!21 = distinct !{!21, !19}
| freebsd_sys_dev_ata_extr_ata-sata.c_ata_sata_phy_reset |
; ModuleID = 'AnghaBench/freebsd/usr.sbin/ppp/extr_bundle.c_bundle_StartSessionTimer.c'
source_filename = "AnghaBench/freebsd/usr.sbin/ppp/extr_bundle.c_bundle_StartSessionTimer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, %struct.TYPE_9__ }
%struct.TYPE_9__ = type { ptr, i32, ptr, i32 }
%struct.bundle = type { %struct.TYPE_8__, %struct.TYPE_7__, %struct.TYPE_6__ }
%struct.TYPE_7__ = type { i32 }
%struct.TYPE_6__ = type { i32 }
@PHYS_DEDICATED = dso_local local_unnamed_addr global i32 0, align 4
@PHYS_DDIAL = dso_local local_unnamed_addr global i32 0, align 4
@bundle_SessionTimeout = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"session\00", align 1
@SECTICKS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @bundle_StartSessionTimer(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%4 = tail call i32 @timer_Stop(ptr noundef nonnull %3) #2
%5 = getelementptr inbounds %struct.bundle, ptr %0, i64 0, i32 2
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = load i32, ptr @PHYS_DEDICATED, align 4, !tbaa !15
%8 = load i32, ptr @PHYS_DDIAL, align 4, !tbaa !15
%9 = or i32 %8, %7
%10 = and i32 %9, %6
%11 = icmp eq i32 %10, %6
br i1 %11, label %31, label %12
12: ; preds = %2
%13 = getelementptr inbounds %struct.bundle, ptr %0, i64 0, i32 1
%14 = load i32, ptr %13, align 8, !tbaa !16
%15 = icmp eq i32 %14, 0
br i1 %15, label %31, label %16
16: ; preds = %12
%17 = tail call i32 @time(ptr noundef null) #2
%18 = icmp eq i32 %1, 0
br i1 %18, label %19, label %21
19: ; preds = %16
%20 = load i32, ptr %13, align 8, !tbaa !16
br label %21
21: ; preds = %19, %16
%22 = phi i32 [ %20, %19 ], [ %1, %16 ]
%23 = load i32, ptr @bundle_SessionTimeout, align 4, !tbaa !15
%24 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1, i32 3
store i32 %23, ptr %24, align 8, !tbaa !17
store ptr @.str, ptr %3, align 8, !tbaa !18
%25 = load i32, ptr @SECTICKS, align 4, !tbaa !15
%26 = mul i32 %25, %22
%27 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1, i32 1
store i32 %26, ptr %27, align 8, !tbaa !19
%28 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1, i32 2
store ptr %0, ptr %28, align 8, !tbaa !20
%29 = tail call i32 @timer_Start(ptr noundef nonnull %3) #2
%30 = add i32 %22, %17
store i32 %30, ptr %0, align 8, !tbaa !21
br label %31
31: ; preds = %21, %12, %2
ret void
}
declare i32 @timer_Stop(ptr noundef) local_unnamed_addr #1
declare i32 @time(ptr noundef) local_unnamed_addr #1
declare i32 @timer_Start(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 44}
!6 = !{!"bundle", !7, i64 0, !13, i64 40, !14, i64 44}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_9__", !12, i64 0, !8, i64 8, !12, i64 16, !8, i64 24}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_7__", !8, i64 0}
!14 = !{!"TYPE_6__", !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!6, !8, i64 40}
!17 = !{!6, !8, i64 32}
!18 = !{!6, !12, i64 8}
!19 = !{!6, !8, i64 16}
!20 = !{!6, !12, i64 24}
!21 = !{!6, !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/usr.sbin/ppp/extr_bundle.c_bundle_StartSessionTimer.c'
source_filename = "AnghaBench/freebsd/usr.sbin/ppp/extr_bundle.c_bundle_StartSessionTimer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PHYS_DEDICATED = common local_unnamed_addr global i32 0, align 4
@PHYS_DDIAL = common local_unnamed_addr global i32 0, align 4
@bundle_SessionTimeout = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"session\00", align 1
@SECTICKS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @bundle_StartSessionTimer(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = tail call i32 @timer_Stop(ptr noundef nonnull %3) #2
%5 = getelementptr inbounds i8, ptr %0, i64 44
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = load i32, ptr @PHYS_DEDICATED, align 4, !tbaa !16
%8 = load i32, ptr @PHYS_DDIAL, align 4, !tbaa !16
%9 = or i32 %8, %7
%10 = and i32 %9, %6
%11 = icmp eq i32 %10, %6
br i1 %11, label %31, label %12
12: ; preds = %2
%13 = getelementptr inbounds i8, ptr %0, i64 40
%14 = load i32, ptr %13, align 8, !tbaa !17
%15 = icmp eq i32 %14, 0
br i1 %15, label %31, label %16
16: ; preds = %12
%17 = tail call i32 @time(ptr noundef null) #2
%18 = icmp eq i32 %1, 0
br i1 %18, label %19, label %21
19: ; preds = %16
%20 = load i32, ptr %13, align 8, !tbaa !17
br label %21
21: ; preds = %19, %16
%22 = phi i32 [ %20, %19 ], [ %1, %16 ]
%23 = load i32, ptr @bundle_SessionTimeout, align 4, !tbaa !16
%24 = getelementptr inbounds i8, ptr %0, i64 32
store i32 %23, ptr %24, align 8, !tbaa !18
store ptr @.str, ptr %3, align 8, !tbaa !19
%25 = load i32, ptr @SECTICKS, align 4, !tbaa !16
%26 = mul i32 %25, %22
%27 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %26, ptr %27, align 8, !tbaa !20
%28 = getelementptr inbounds i8, ptr %0, i64 24
store ptr %0, ptr %28, align 8, !tbaa !21
%29 = tail call i32 @timer_Start(ptr noundef nonnull %3) #2
%30 = add i32 %22, %17
store i32 %30, ptr %0, align 8, !tbaa !22
br label %31
31: ; preds = %21, %12, %2
ret void
}
declare i32 @timer_Stop(ptr noundef) local_unnamed_addr #1
declare i32 @time(ptr noundef) local_unnamed_addr #1
declare i32 @timer_Start(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 44}
!7 = !{!"bundle", !8, i64 0, !14, i64 40, !15, i64 44}
!8 = !{!"TYPE_8__", !9, i64 0, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_9__", !13, i64 0, !9, i64 8, !13, i64 16, !9, i64 24}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!"TYPE_7__", !9, i64 0}
!15 = !{!"TYPE_6__", !9, i64 0}
!16 = !{!9, !9, i64 0}
!17 = !{!7, !9, i64 40}
!18 = !{!7, !9, i64 32}
!19 = !{!7, !13, i64 8}
!20 = !{!7, !9, i64 16}
!21 = !{!7, !13, i64 24}
!22 = !{!7, !9, i64 0}
| freebsd_usr.sbin_ppp_extr_bundle.c_bundle_StartSessionTimer |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_fs_core.c_init_egress_acl_root_ns.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_fs_core.c_init_egress_acl_root_ns.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FS_FT_ESW_EGRESS_ACL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @init_egress_acl_root_ns], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @init_egress_acl_root_ns(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @FS_FT_ESW_EGRESS_ACL, align 4, !tbaa !5
%4 = tail call ptr @create_root_ns(ptr noundef %0, i32 noundef %3) #2
%5 = load ptr, ptr %0, align 8, !tbaa !9
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds ptr, ptr %5, i64 %6
store ptr %4, ptr %7, align 8, !tbaa !12
%8 = load ptr, ptr %0, align 8, !tbaa !9
%9 = getelementptr inbounds ptr, ptr %8, i64 %6
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%14 = sub nsw i32 0, %13
br label %18
15: ; preds = %2
%16 = tail call ptr @fs_create_prio(ptr noundef nonnull %10, i32 noundef 0, i32 noundef 1) #2
%17 = tail call i32 @PTR_ERR_OR_ZERO(ptr noundef %16) #2
br label %18
18: ; preds = %15, %12
%19 = phi i32 [ %17, %15 ], [ %14, %12 ]
ret i32 %19
}
declare ptr @create_root_ns(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @fs_create_prio(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PTR_ERR_OR_ZERO(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"mlx5_flow_steering", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_fs_core.c_init_egress_acl_root_ns.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/extr_fs_core.c_init_egress_acl_root_ns.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FS_FT_ESW_EGRESS_ACL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @init_egress_acl_root_ns], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @init_egress_acl_root_ns(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @FS_FT_ESW_EGRESS_ACL, align 4, !tbaa !6
%4 = tail call ptr @create_root_ns(ptr noundef %0, i32 noundef %3) #2
%5 = load ptr, ptr %0, align 8, !tbaa !10
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds ptr, ptr %5, i64 %6
store ptr %4, ptr %7, align 8, !tbaa !13
%8 = load ptr, ptr %0, align 8, !tbaa !10
%9 = getelementptr inbounds ptr, ptr %8, i64 %6
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%14 = sub nsw i32 0, %13
br label %18
15: ; preds = %2
%16 = tail call ptr @fs_create_prio(ptr noundef nonnull %10, i32 noundef 0, i32 noundef 1) #2
%17 = tail call i32 @PTR_ERR_OR_ZERO(ptr noundef %16) #2
br label %18
18: ; preds = %15, %12
%19 = phi i32 [ %17, %15 ], [ %14, %12 ]
ret i32 %19
}
declare ptr @create_root_ns(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @fs_create_prio(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PTR_ERR_OR_ZERO(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"mlx5_flow_steering", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_drivers_net_ethernet_mellanox_mlx5_core_extr_fs_core.c_init_egress_acl_root_ns |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_execbuffer.c_eb_relocate_entry.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_execbuffer.c_eb_relocate_entry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_i915_gem_relocation_entry = type { i32, i32, i32, i64, i32 }
%struct.i915_vma = type { i32, ptr, %struct.TYPE_5__, ptr }
%struct.TYPE_5__ = type { i32 }
%struct.i915_execbuffer = type { %struct.TYPE_6__, i32 }
%struct.TYPE_6__ = type { i64 }
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [76 x i8] c"reloc with multiple write domains: target %d offset %d read %08x write %08x\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@I915_GEM_GPU_DOMAINS = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [80 x i8] c"reloc with read/write non-GPU domains: target %d offset %d read %08x write %08x\00", align 1
@EXEC_OBJECT_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@I915_GEM_DOMAIN_INSTRUCTION = dso_local local_unnamed_addr global i32 0, align 4
@PIN_GLOBAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [39 x i8] c"Unexpected failure to bind target VMA!\00", align 1
@DBG_FORCE_RELOC = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [63 x i8] c"Relocation beyond object bounds: target %d offset %d size %d.\0A\00", align 1
@.str.4 = private unnamed_addr constant [53 x i8] c"Relocation not 4-byte aligned: target %d offset %d.\0A\00", align 1
@EXEC_OBJECT_ASYNC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @eb_relocate_entry], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @eb_relocate_entry(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 4
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = tail call ptr @eb_get_vma(ptr noundef %0, i32 noundef %5) #2
%7 = icmp eq ptr %6, null
%8 = zext i1 %7 to i32
%9 = tail call i64 @unlikely(i32 noundef %8) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %3
%12 = load i32, ptr @ENOENT, align 4, !tbaa !11
%13 = sub nsw i32 0, %12
br label %122
14: ; preds = %3
%15 = load i32, ptr %2, align 8, !tbaa !12
%16 = add nsw i32 %15, -1
%17 = and i32 %16, %15
%18 = tail call i64 @unlikely(i32 noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %30, label %20
20: ; preds = %14
%21 = load i32, ptr %4, align 8, !tbaa !5
%22 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 1
%23 = load i32, ptr %22, align 4, !tbaa !13
%24 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 2
%25 = load i32, ptr %24, align 8, !tbaa !14
%26 = load i32, ptr %2, align 8, !tbaa !12
%27 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str, i32 noundef %21, i32 noundef %23, i32 noundef %25, i32 noundef %26) #2
%28 = load i32, ptr @EINVAL, align 4, !tbaa !11
%29 = sub nsw i32 0, %28
br label %122
30: ; preds = %14
%31 = load i32, ptr %2, align 8, !tbaa !12
%32 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 2
%33 = load i32, ptr %32, align 8, !tbaa !14
%34 = or i32 %33, %31
%35 = load i32, ptr @I915_GEM_GPU_DOMAINS, align 4, !tbaa !11
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = tail call i64 @unlikely(i32 noundef %37) #2
%39 = icmp eq i64 %38, 0
br i1 %39, label %49, label %40
40: ; preds = %30
%41 = load i32, ptr %4, align 8, !tbaa !5
%42 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 1
%43 = load i32, ptr %42, align 4, !tbaa !13
%44 = load i32, ptr %32, align 8, !tbaa !14
%45 = load i32, ptr %2, align 8, !tbaa !12
%46 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str.1, i32 noundef %41, i32 noundef %43, i32 noundef %44, i32 noundef %45) #2
%47 = load i32, ptr @EINVAL, align 4, !tbaa !11
%48 = sub nsw i32 0, %47
br label %122
49: ; preds = %30
%50 = load i32, ptr %2, align 8, !tbaa !12
%51 = icmp eq i32 %50, 0
br i1 %51, label %74, label %52
52: ; preds = %49
%53 = load i32, ptr @EXEC_OBJECT_WRITE, align 4, !tbaa !11
%54 = getelementptr inbounds %struct.i915_vma, ptr %6, i64 0, i32 1
%55 = load ptr, ptr %54, align 8, !tbaa !15
%56 = load i32, ptr %55, align 4, !tbaa !11
%57 = or i32 %56, %53
store i32 %57, ptr %55, align 4, !tbaa !11
%58 = load i32, ptr %2, align 8, !tbaa !12
%59 = load i32, ptr @I915_GEM_DOMAIN_INSTRUCTION, align 4, !tbaa !11
%60 = icmp eq i32 %58, %59
br i1 %60, label %61, label %74
61: ; preds = %52
%62 = getelementptr inbounds %struct.i915_execbuffer, ptr %0, i64 0, i32 1
%63 = load i32, ptr %62, align 8, !tbaa !19
%64 = tail call i64 @IS_GEN(i32 noundef %63, i32 noundef 6) #2
%65 = icmp eq i64 %64, 0
br i1 %65, label %74, label %66
66: ; preds = %61
%67 = getelementptr inbounds %struct.i915_vma, ptr %6, i64 0, i32 3
%68 = load ptr, ptr %67, align 8, !tbaa !22
%69 = load i32, ptr %68, align 4, !tbaa !23
%70 = load i32, ptr @PIN_GLOBAL, align 4, !tbaa !11
%71 = tail call i32 @i915_vma_bind(ptr noundef nonnull %6, i32 noundef %69, i32 noundef %70) #2
%72 = tail call i64 @WARN_ONCE(i32 noundef %71, ptr noundef nonnull @.str.2) #2
%73 = icmp eq i64 %72, 0
br i1 %73, label %74, label %122
74: ; preds = %52, %61, %66, %49
%75 = load i32, ptr @DBG_FORCE_RELOC, align 4, !tbaa !11
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %84
77: ; preds = %74
%78 = getelementptr inbounds %struct.i915_vma, ptr %6, i64 0, i32 2
%79 = load i32, ptr %78, align 8, !tbaa !25
%80 = tail call i64 @gen8_canonical_addr(i32 noundef %79) #2
%81 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 3
%82 = load i64, ptr %81, align 8, !tbaa !26
%83 = icmp eq i64 %80, %82
br i1 %83, label %122, label %84
84: ; preds = %77, %74
%85 = getelementptr inbounds %struct.drm_i915_gem_relocation_entry, ptr %2, i64 0, i32 1
%86 = load i32, ptr %85, align 4, !tbaa !13
%87 = load i32, ptr %1, align 8, !tbaa !27
%88 = load i64, ptr %0, align 8, !tbaa !28
%89 = icmp eq i64 %88, 0
%90 = select i1 %89, i32 -4, i32 -8
%91 = add i32 %90, %87
%92 = icmp sgt i32 %86, %91
%93 = zext i1 %92 to i32
%94 = tail call i64 @unlikely(i32 noundef %93) #2
%95 = icmp eq i64 %94, 0
br i1 %95, label %103, label %96
96: ; preds = %84
%97 = load i32, ptr %4, align 8, !tbaa !5
%98 = load i32, ptr %85, align 4, !tbaa !13
%99 = load i32, ptr %1, align 8, !tbaa !27
%100 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str.3, i32 noundef %97, i32 noundef %98, i32 noundef %99) #2
%101 = load i32, ptr @EINVAL, align 4, !tbaa !11
%102 = sub nsw i32 0, %101
br label %122
103: ; preds = %84
%104 = load i32, ptr %85, align 4, !tbaa !13
%105 = and i32 %104, 3
%106 = tail call i64 @unlikely(i32 noundef %105) #2
%107 = icmp eq i64 %106, 0
br i1 %107, label %114, label %108
108: ; preds = %103
%109 = load i32, ptr %4, align 8, !tbaa !5
%110 = load i32, ptr %85, align 4, !tbaa !13
%111 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str.4, i32 noundef %109, i32 noundef %110) #2
%112 = load i32, ptr @EINVAL, align 4, !tbaa !11
%113 = sub nsw i32 0, %112
br label %122
114: ; preds = %103
%115 = load i32, ptr @EXEC_OBJECT_ASYNC, align 4, !tbaa !11
%116 = xor i32 %115, -1
%117 = getelementptr inbounds %struct.i915_vma, ptr %1, i64 0, i32 1
%118 = load ptr, ptr %117, align 8, !tbaa !15
%119 = load i32, ptr %118, align 4, !tbaa !11
%120 = and i32 %119, %116
store i32 %120, ptr %118, align 4, !tbaa !11
%121 = tail call i32 @relocate_entry(ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %0, ptr noundef %6) #2
br label %122
122: ; preds = %77, %66, %114, %108, %96, %40, %20, %11
%123 = phi i32 [ %13, %11 ], [ %29, %20 ], [ %48, %40 ], [ %102, %96 ], [ %113, %108 ], [ %121, %114 ], [ %71, %66 ], [ 0, %77 ]
ret i32 %123
}
declare ptr @eb_get_vma(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG(ptr noundef, i32 noundef, i32 noundef, ...) local_unnamed_addr #1
declare i64 @IS_GEN(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i915_vma_bind(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @WARN_ONCE(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @gen8_canonical_addr(i32 noundef) local_unnamed_addr #1
declare i32 @relocate_entry(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"drm_i915_gem_relocation_entry", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !7, i64 8}
!15 = !{!16, !17, i64 8}
!16 = !{!"i915_vma", !7, i64 0, !17, i64 8, !18, i64 16, !17, i64 24}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!"TYPE_5__", !7, i64 0}
!19 = !{!20, !7, i64 8}
!20 = !{!"i915_execbuffer", !21, i64 0, !7, i64 8}
!21 = !{!"TYPE_6__", !10, i64 0}
!22 = !{!16, !17, i64 24}
!23 = !{!24, !7, i64 0}
!24 = !{!"TYPE_4__", !7, i64 0}
!25 = !{!16, !7, i64 16}
!26 = !{!6, !10, i64 16}
!27 = !{!16, !7, i64 0}
!28 = !{!20, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_execbuffer.c_eb_relocate_entry.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_execbuffer.c_eb_relocate_entry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOENT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [76 x i8] c"reloc with multiple write domains: target %d offset %d read %08x write %08x\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@I915_GEM_GPU_DOMAINS = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [80 x i8] c"reloc with read/write non-GPU domains: target %d offset %d read %08x write %08x\00", align 1
@EXEC_OBJECT_WRITE = common local_unnamed_addr global i32 0, align 4
@I915_GEM_DOMAIN_INSTRUCTION = common local_unnamed_addr global i32 0, align 4
@PIN_GLOBAL = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [39 x i8] c"Unexpected failure to bind target VMA!\00", align 1
@DBG_FORCE_RELOC = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [63 x i8] c"Relocation beyond object bounds: target %d offset %d size %d.\0A\00", align 1
@.str.4 = private unnamed_addr constant [53 x i8] c"Relocation not 4-byte aligned: target %d offset %d.\0A\00", align 1
@EXEC_OBJECT_ASYNC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @eb_relocate_entry], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @eb_relocate_entry(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 24
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = tail call ptr @eb_get_vma(ptr noundef %0, i32 noundef %5) #2
%7 = icmp eq ptr %6, null
%8 = zext i1 %7 to i32
%9 = tail call i64 @unlikely(i32 noundef %8) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %3
%12 = load i32, ptr @ENOENT, align 4, !tbaa !12
%13 = sub nsw i32 0, %12
br label %122
14: ; preds = %3
%15 = load i32, ptr %2, align 8, !tbaa !13
%16 = add nsw i32 %15, -1
%17 = and i32 %16, %15
%18 = tail call i64 @unlikely(i32 noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %30, label %20
20: ; preds = %14
%21 = load i32, ptr %4, align 8, !tbaa !6
%22 = getelementptr inbounds i8, ptr %2, i64 4
%23 = load i32, ptr %22, align 4, !tbaa !14
%24 = getelementptr inbounds i8, ptr %2, i64 8
%25 = load i32, ptr %24, align 8, !tbaa !15
%26 = load i32, ptr %2, align 8, !tbaa !13
%27 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str, i32 noundef %21, i32 noundef %23, i32 noundef %25, i32 noundef %26) #2
%28 = load i32, ptr @EINVAL, align 4, !tbaa !12
%29 = sub nsw i32 0, %28
br label %122
30: ; preds = %14
%31 = load i32, ptr %2, align 8, !tbaa !13
%32 = getelementptr inbounds i8, ptr %2, i64 8
%33 = load i32, ptr %32, align 8, !tbaa !15
%34 = or i32 %33, %31
%35 = load i32, ptr @I915_GEM_GPU_DOMAINS, align 4, !tbaa !12
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = tail call i64 @unlikely(i32 noundef %37) #2
%39 = icmp eq i64 %38, 0
br i1 %39, label %49, label %40
40: ; preds = %30
%41 = load i32, ptr %4, align 8, !tbaa !6
%42 = getelementptr inbounds i8, ptr %2, i64 4
%43 = load i32, ptr %42, align 4, !tbaa !14
%44 = load i32, ptr %32, align 8, !tbaa !15
%45 = load i32, ptr %2, align 8, !tbaa !13
%46 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str.1, i32 noundef %41, i32 noundef %43, i32 noundef %44, i32 noundef %45) #2
%47 = load i32, ptr @EINVAL, align 4, !tbaa !12
%48 = sub nsw i32 0, %47
br label %122
49: ; preds = %30
%50 = load i32, ptr %2, align 8, !tbaa !13
%51 = icmp eq i32 %50, 0
br i1 %51, label %74, label %52
52: ; preds = %49
%53 = load i32, ptr @EXEC_OBJECT_WRITE, align 4, !tbaa !12
%54 = getelementptr inbounds i8, ptr %6, i64 8
%55 = load ptr, ptr %54, align 8, !tbaa !16
%56 = load i32, ptr %55, align 4, !tbaa !12
%57 = or i32 %56, %53
store i32 %57, ptr %55, align 4, !tbaa !12
%58 = load i32, ptr %2, align 8, !tbaa !13
%59 = load i32, ptr @I915_GEM_DOMAIN_INSTRUCTION, align 4, !tbaa !12
%60 = icmp eq i32 %58, %59
br i1 %60, label %61, label %74
61: ; preds = %52
%62 = getelementptr inbounds i8, ptr %0, i64 8
%63 = load i32, ptr %62, align 8, !tbaa !20
%64 = tail call i64 @IS_GEN(i32 noundef %63, i32 noundef 6) #2
%65 = icmp eq i64 %64, 0
br i1 %65, label %74, label %66
66: ; preds = %61
%67 = getelementptr inbounds i8, ptr %6, i64 24
%68 = load ptr, ptr %67, align 8, !tbaa !23
%69 = load i32, ptr %68, align 4, !tbaa !24
%70 = load i32, ptr @PIN_GLOBAL, align 4, !tbaa !12
%71 = tail call i32 @i915_vma_bind(ptr noundef nonnull %6, i32 noundef %69, i32 noundef %70) #2
%72 = tail call i64 @WARN_ONCE(i32 noundef %71, ptr noundef nonnull @.str.2) #2
%73 = icmp eq i64 %72, 0
br i1 %73, label %74, label %122
74: ; preds = %52, %61, %66, %49
%75 = load i32, ptr @DBG_FORCE_RELOC, align 4, !tbaa !12
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %84
77: ; preds = %74
%78 = getelementptr inbounds i8, ptr %6, i64 16
%79 = load i32, ptr %78, align 8, !tbaa !26
%80 = tail call i64 @gen8_canonical_addr(i32 noundef %79) #2
%81 = getelementptr inbounds i8, ptr %2, i64 16
%82 = load i64, ptr %81, align 8, !tbaa !27
%83 = icmp eq i64 %80, %82
br i1 %83, label %122, label %84
84: ; preds = %77, %74
%85 = getelementptr inbounds i8, ptr %2, i64 4
%86 = load i32, ptr %85, align 4, !tbaa !14
%87 = load i32, ptr %1, align 8, !tbaa !28
%88 = load i64, ptr %0, align 8, !tbaa !29
%89 = icmp eq i64 %88, 0
%90 = select i1 %89, i32 -4, i32 -8
%91 = add i32 %90, %87
%92 = icmp sgt i32 %86, %91
%93 = zext i1 %92 to i32
%94 = tail call i64 @unlikely(i32 noundef %93) #2
%95 = icmp eq i64 %94, 0
br i1 %95, label %103, label %96
96: ; preds = %84
%97 = load i32, ptr %4, align 8, !tbaa !6
%98 = load i32, ptr %85, align 4, !tbaa !14
%99 = load i32, ptr %1, align 8, !tbaa !28
%100 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str.3, i32 noundef %97, i32 noundef %98, i32 noundef %99) #2
%101 = load i32, ptr @EINVAL, align 4, !tbaa !12
%102 = sub nsw i32 0, %101
br label %122
103: ; preds = %84
%104 = load i32, ptr %85, align 4, !tbaa !14
%105 = and i32 %104, 3
%106 = tail call i64 @unlikely(i32 noundef %105) #2
%107 = icmp eq i64 %106, 0
br i1 %107, label %114, label %108
108: ; preds = %103
%109 = load i32, ptr %4, align 8, !tbaa !6
%110 = load i32, ptr %85, align 4, !tbaa !14
%111 = tail call i32 (ptr, i32, i32, ...) @DRM_DEBUG(ptr noundef nonnull @.str.4, i32 noundef %109, i32 noundef %110) #2
%112 = load i32, ptr @EINVAL, align 4, !tbaa !12
%113 = sub nsw i32 0, %112
br label %122
114: ; preds = %103
%115 = load i32, ptr @EXEC_OBJECT_ASYNC, align 4, !tbaa !12
%116 = xor i32 %115, -1
%117 = getelementptr inbounds i8, ptr %1, i64 8
%118 = load ptr, ptr %117, align 8, !tbaa !16
%119 = load i32, ptr %118, align 4, !tbaa !12
%120 = and i32 %119, %116
store i32 %120, ptr %118, align 4, !tbaa !12
%121 = tail call i32 @relocate_entry(ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %0, ptr noundef %6) #2
br label %122
122: ; preds = %77, %66, %114, %108, %96, %40, %20, %11
%123 = phi i32 [ %13, %11 ], [ %29, %20 ], [ %48, %40 ], [ %102, %96 ], [ %113, %108 ], [ %121, %114 ], [ %71, %66 ], [ 0, %77 ]
ret i32 %123
}
declare ptr @eb_get_vma(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG(ptr noundef, i32 noundef, i32 noundef, ...) local_unnamed_addr #1
declare i64 @IS_GEN(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i915_vma_bind(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @WARN_ONCE(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @gen8_canonical_addr(i32 noundef) local_unnamed_addr #1
declare i32 @relocate_entry(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"drm_i915_gem_relocation_entry", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !8, i64 4}
!15 = !{!7, !8, i64 8}
!16 = !{!17, !18, i64 8}
!17 = !{!"i915_vma", !8, i64 0, !18, i64 8, !19, i64 16, !18, i64 24}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!"TYPE_5__", !8, i64 0}
!20 = !{!21, !8, i64 8}
!21 = !{!"i915_execbuffer", !22, i64 0, !8, i64 8}
!22 = !{!"TYPE_6__", !11, i64 0}
!23 = !{!17, !18, i64 24}
!24 = !{!25, !8, i64 0}
!25 = !{!"TYPE_4__", !8, i64 0}
!26 = !{!17, !8, i64 16}
!27 = !{!7, !11, i64 16}
!28 = !{!17, !8, i64 0}
!29 = !{!21, !11, i64 0}
| linux_drivers_gpu_drm_i915_gem_extr_i915_gem_execbuffer.c_eb_relocate_entry |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_debug.c_sdebug_delay_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_debug.c_sdebug_delay_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@scsi_debug_delay = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sdebug_delay_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sdebug_delay_show(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !5
%4 = load i32, ptr @scsi_debug_delay, align 4, !tbaa !5
%5 = tail call i32 @scnprintf(ptr noundef %1, i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4) #2
ret i32 %5
}
declare i32 @scnprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_debug.c_sdebug_delay_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_debug.c_sdebug_delay_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@scsi_debug_delay = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sdebug_delay_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sdebug_delay_show(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%4 = load i32, ptr @scsi_debug_delay, align 4, !tbaa !6
%5 = tail call i32 @scnprintf(ptr noundef %1, i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4) #2
ret i32 %5
}
declare i32 @scnprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_scsi_extr_scsi_debug.c_sdebug_delay_show |
; ModuleID = 'AnghaBench/h2o/deps/mruby/src/extr_load.c_read_binary_header.c'
source_filename = "AnghaBench/h2o/deps/mruby/src/extr_load.c_read_binary_header.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rite_binary_header = type { i32, i32, i32 }
@RITE_BINARY_IDENT = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_BYTEORDER_NATIVE = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_BYTEORDER_BIG = dso_local local_unnamed_addr global i32 0, align 4
@RITE_BINARY_IDENT_LIL = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_BYTEORDER_LIL = dso_local local_unnamed_addr global i32 0, align 4
@MRB_DUMP_INVALID_FILE_HEADER = dso_local local_unnamed_addr global i32 0, align 4
@MRB_DUMP_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @read_binary_header], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @read_binary_header(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, ptr noundef writeonly %2, ptr nocapture noundef %3) #0 {
%5 = getelementptr inbounds %struct.rite_binary_header, ptr %0, i64 0, i32 2
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = load i32, ptr @RITE_BINARY_IDENT, align 4, !tbaa !10
%8 = tail call i64 @memcmp(i32 noundef %6, i32 noundef %7, i32 noundef 4) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
%11 = tail call i64 (...) @bigendian_p() #2
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, ptr @FLAG_BYTEORDER_BIG, ptr @FLAG_BYTEORDER_NATIVE
br label %23
14: ; preds = %4
%15 = load i32, ptr %5, align 4, !tbaa !5
%16 = load i32, ptr @RITE_BINARY_IDENT_LIL, align 4, !tbaa !10
%17 = tail call i64 @memcmp(i32 noundef %15, i32 noundef %16, i32 noundef 4) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %36
19: ; preds = %14
%20 = tail call i64 (...) @bigendian_p() #2
%21 = icmp eq i64 %20, 0
%22 = select i1 %21, ptr @FLAG_BYTEORDER_NATIVE, ptr @FLAG_BYTEORDER_LIL
br label %23
23: ; preds = %19, %10
%24 = phi ptr [ %13, %10 ], [ %22, %19 ]
%25 = load i32, ptr %3, align 4, !tbaa !10
%26 = load i32, ptr %24, align 4, !tbaa !10
%27 = or i32 %25, %26
store i32 %27, ptr %3, align 4, !tbaa !10
%28 = icmp eq ptr %2, null
br i1 %28, label %33, label %29
29: ; preds = %23
%30 = getelementptr inbounds %struct.rite_binary_header, ptr %0, i64 0, i32 1
%31 = load i32, ptr %30, align 4, !tbaa !11
%32 = tail call i32 @bin_to_uint16(i32 noundef %31) #2
store i32 %32, ptr %2, align 4, !tbaa !10
br label %33
33: ; preds = %29, %23
%34 = load i32, ptr %0, align 4, !tbaa !12
%35 = tail call i64 @bin_to_uint32(i32 noundef %34) #2
store i64 %35, ptr %1, align 8, !tbaa !13
br label %36
36: ; preds = %14, %33
%37 = phi ptr [ @MRB_DUMP_OK, %33 ], [ @MRB_DUMP_INVALID_FILE_HEADER, %14 ]
%38 = load i32, ptr %37, align 4, !tbaa !10
ret i32 %38
}
declare i64 @memcmp(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @bigendian_p(...) local_unnamed_addr #1
declare i32 @bin_to_uint16(i32 noundef) local_unnamed_addr #1
declare i64 @bin_to_uint32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"rite_binary_header", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/h2o/deps/mruby/src/extr_load.c_read_binary_header.c'
source_filename = "AnghaBench/h2o/deps/mruby/src/extr_load.c_read_binary_header.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RITE_BINARY_IDENT = common local_unnamed_addr global i32 0, align 4
@FLAG_BYTEORDER_NATIVE = common local_unnamed_addr global i32 0, align 4
@FLAG_BYTEORDER_BIG = common local_unnamed_addr global i32 0, align 4
@RITE_BINARY_IDENT_LIL = common local_unnamed_addr global i32 0, align 4
@FLAG_BYTEORDER_LIL = common local_unnamed_addr global i32 0, align 4
@MRB_DUMP_INVALID_FILE_HEADER = common local_unnamed_addr global i32 0, align 4
@MRB_DUMP_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @read_binary_header], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @read_binary_header(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, ptr noundef writeonly %2, ptr nocapture noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = load i32, ptr @RITE_BINARY_IDENT, align 4, !tbaa !11
%8 = tail call i64 @memcmp(i32 noundef %6, i32 noundef %7, i32 noundef 4) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
%11 = tail call i64 @bigendian_p() #2
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, ptr @FLAG_BYTEORDER_BIG, ptr @FLAG_BYTEORDER_NATIVE
br label %23
14: ; preds = %4
%15 = load i32, ptr %5, align 4, !tbaa !6
%16 = load i32, ptr @RITE_BINARY_IDENT_LIL, align 4, !tbaa !11
%17 = tail call i64 @memcmp(i32 noundef %15, i32 noundef %16, i32 noundef 4) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %36
19: ; preds = %14
%20 = tail call i64 @bigendian_p() #2
%21 = icmp eq i64 %20, 0
%22 = select i1 %21, ptr @FLAG_BYTEORDER_NATIVE, ptr @FLAG_BYTEORDER_LIL
br label %23
23: ; preds = %19, %10
%24 = phi ptr [ %13, %10 ], [ %22, %19 ]
%25 = load i32, ptr %3, align 4, !tbaa !11
%26 = load i32, ptr %24, align 4, !tbaa !11
%27 = or i32 %25, %26
store i32 %27, ptr %3, align 4, !tbaa !11
%28 = icmp eq ptr %2, null
br i1 %28, label %33, label %29
29: ; preds = %23
%30 = getelementptr inbounds i8, ptr %0, i64 4
%31 = load i32, ptr %30, align 4, !tbaa !12
%32 = tail call i32 @bin_to_uint16(i32 noundef %31) #2
store i32 %32, ptr %2, align 4, !tbaa !11
br label %33
33: ; preds = %29, %23
%34 = load i32, ptr %0, align 4, !tbaa !13
%35 = tail call i64 @bin_to_uint32(i32 noundef %34) #2
store i64 %35, ptr %1, align 8, !tbaa !14
br label %36
36: ; preds = %14, %33
%37 = phi ptr [ @MRB_DUMP_OK, %33 ], [ @MRB_DUMP_INVALID_FILE_HEADER, %14 ]
%38 = load i32, ptr %37, align 4, !tbaa !11
ret i32 %38
}
declare i64 @memcmp(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @bigendian_p(...) local_unnamed_addr #1
declare i32 @bin_to_uint16(i32 noundef) local_unnamed_addr #1
declare i64 @bin_to_uint32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"rite_binary_header", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !9, i64 0}
| h2o_deps_mruby_src_extr_load.c_read_binary_header |
; ModuleID = 'AnghaBench/freebsd/sys/dev/cxgbe/extr_t4_clip.c_t4_hold_lip.c'
source_filename = "AnghaBench/freebsd/sys/dev/cxgbe/extr_t4_clip.c_t4_hold_lip.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noalias noundef ptr @t4_hold_lip(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
ret ptr null
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/cxgbe/extr_t4_clip.c_t4_hold_lip.c'
source_filename = "AnghaBench/freebsd/sys/dev/cxgbe/extr_t4_clip.c_t4_hold_lip.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noalias noundef ptr @t4_hold_lip(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
ret ptr null
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_dev_cxgbe_extr_t4_clip.c_t4_hold_lip |
; ModuleID = 'AnghaBench/linux/kernel/trace/extr_trace.c_t_stop.c'
source_filename = "AnghaBench/linux/kernel/trace/extr_trace.c_t_stop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@trace_types_lock = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @t_stop], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @t_stop(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = tail call i32 @mutex_unlock(ptr noundef nonnull @trace_types_lock) #2
ret void
}
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/kernel/trace/extr_trace.c_t_stop.c'
source_filename = "AnghaBench/linux/kernel/trace/extr_trace.c_t_stop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@trace_types_lock = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @t_stop], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @t_stop(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = tail call i32 @mutex_unlock(ptr noundef nonnull @trace_types_lock) #2
ret void
}
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_kernel_trace_extr_trace.c_t_stop |
; ModuleID = 'AnghaBench/linux/drivers/tty/extr_synclink.c_mgsl_program_hw.c'
source_filename = "AnghaBench/linux/drivers/tty/extr_synclink.c_mgsl_program_hw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mgsl_struct = type { i32, %struct.TYPE_8__, i64, i64, i64, i64, i64, %struct.TYPE_5__, i64, i64, i64 }
%struct.TYPE_8__ = type { ptr }
%struct.TYPE_5__ = type { i64 }
@MGSL_MODE_HDLC = dso_local local_unnamed_addr global i64 0, align 8
@MGSL_MODE_RAW = dso_local local_unnamed_addr global i64 0, align 8
@SICR_CTS = dso_local local_unnamed_addr global i64 0, align 8
@SICR_DSR = dso_local local_unnamed_addr global i64 0, align 8
@SICR_DCD = dso_local local_unnamed_addr global i64 0, align 8
@SICR_RI = dso_local local_unnamed_addr global i64 0, align 8
@IO_PIN = dso_local local_unnamed_addr global i32 0, align 4
@CREAD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mgsl_program_hw], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mgsl_program_hw(ptr noundef %0) #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #3
%3 = tail call i32 @usc_stop_receiver(ptr noundef %0) #3
%4 = tail call i32 @usc_stop_transmitter(ptr noundef %0) #3
%5 = getelementptr inbounds %struct.mgsl_struct, ptr %0, i64 0, i32 8
%6 = getelementptr inbounds %struct.mgsl_struct, ptr %0, i64 0, i32 7
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %5, i8 0, i64 24, i1 false)
%7 = load i64, ptr %6, align 8, !tbaa !5
%8 = load i64, ptr @MGSL_MODE_HDLC, align 8, !tbaa !14
%9 = icmp eq i64 %7, %8
%10 = load i64, ptr @MGSL_MODE_RAW, align 8
%11 = icmp eq i64 %7, %10
%12 = select i1 %9, i1 true, i1 %11
br i1 %12, label %17, label %13
13: ; preds = %1
%14 = getelementptr inbounds %struct.mgsl_struct, ptr %0, i64 0, i32 2
%15 = load i64, ptr %14, align 8, !tbaa !15
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %13, %1
%18 = tail call i32 @usc_set_sync_mode(ptr noundef nonnull %0) #3
br label %21
19: ; preds = %13
%20 = tail call i32 @usc_set_async_mode(ptr noundef nonnull %0) #3
br label %21
21: ; preds = %19, %17
%22 = tail call i32 @usc_set_serial_signals(ptr noundef nonnull %0) #3
%23 = getelementptr inbounds %struct.mgsl_struct, ptr %0, i64 0, i32 3
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %23, i8 0, i64 32, i1 false)
%24 = load i64, ptr @SICR_CTS, align 8, !tbaa !14
%25 = load i64, ptr @SICR_DSR, align 8, !tbaa !14
%26 = add nsw i64 %25, %24
%27 = load i64, ptr @SICR_DCD, align 8, !tbaa !14
%28 = add nsw i64 %26, %27
%29 = load i64, ptr @SICR_RI, align 8, !tbaa !14
%30 = add nsw i64 %28, %29
%31 = tail call i32 @usc_EnableStatusIrqs(ptr noundef nonnull %0, i64 noundef %30) #3
%32 = load i32, ptr @IO_PIN, align 4, !tbaa !16
%33 = tail call i32 @usc_EnableInterrupts(ptr noundef nonnull %0, i32 noundef %32) #3
%34 = tail call i32 @usc_get_serial_signals(ptr noundef nonnull %0) #3
%35 = getelementptr inbounds %struct.mgsl_struct, ptr %0, i64 0, i32 2
%36 = load i64, ptr %35, align 8, !tbaa !15
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %45
38: ; preds = %21
%39 = getelementptr inbounds %struct.mgsl_struct, ptr %0, i64 0, i32 1
%40 = load ptr, ptr %39, align 8, !tbaa !17
%41 = load i32, ptr %40, align 4, !tbaa !18
%42 = load i32, ptr @CREAD, align 4, !tbaa !16
%43 = and i32 %42, %41
%44 = icmp eq i32 %43, 0
br i1 %44, label %47, label %45
45: ; preds = %38, %21
%46 = tail call i32 @usc_start_receiver(ptr noundef nonnull %0) #3
br label %47
47: ; preds = %45, %38
%48 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #3
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @usc_stop_receiver(ptr noundef) local_unnamed_addr #1
declare i32 @usc_stop_transmitter(ptr noundef) local_unnamed_addr #1
declare i32 @usc_set_sync_mode(ptr noundef) local_unnamed_addr #1
declare i32 @usc_set_async_mode(ptr noundef) local_unnamed_addr #1
declare i32 @usc_set_serial_signals(ptr noundef) local_unnamed_addr #1
declare i32 @usc_EnableStatusIrqs(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @usc_EnableInterrupts(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usc_get_serial_signals(ptr noundef) local_unnamed_addr #1
declare i32 @usc_start_receiver(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 56}
!6 = !{!"mgsl_struct", !7, i64 0, !10, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !13, i64 56, !12, i64 64, !12, i64 72, !12, i64 80}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_8__", !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_5__", !12, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!6, !12, i64 16}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !11, i64 8}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_7__", !20, i64 0}
!20 = !{!"TYPE_6__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/tty/extr_synclink.c_mgsl_program_hw.c'
source_filename = "AnghaBench/linux/drivers/tty/extr_synclink.c_mgsl_program_hw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MGSL_MODE_HDLC = common local_unnamed_addr global i64 0, align 8
@MGSL_MODE_RAW = common local_unnamed_addr global i64 0, align 8
@SICR_CTS = common local_unnamed_addr global i64 0, align 8
@SICR_DSR = common local_unnamed_addr global i64 0, align 8
@SICR_DCD = common local_unnamed_addr global i64 0, align 8
@SICR_RI = common local_unnamed_addr global i64 0, align 8
@IO_PIN = common local_unnamed_addr global i32 0, align 4
@CREAD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mgsl_program_hw], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mgsl_program_hw(ptr noundef %0) #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #3
%3 = tail call i32 @usc_stop_receiver(ptr noundef %0) #3
%4 = tail call i32 @usc_stop_transmitter(ptr noundef %0) #3
%5 = getelementptr inbounds i8, ptr %0, i64 64
%6 = getelementptr inbounds i8, ptr %0, i64 56
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %5, i8 0, i64 24, i1 false)
%7 = load i64, ptr %6, align 8, !tbaa !6
%8 = load i64, ptr @MGSL_MODE_HDLC, align 8, !tbaa !15
%9 = icmp eq i64 %7, %8
%10 = load i64, ptr @MGSL_MODE_RAW, align 8
%11 = icmp eq i64 %7, %10
%12 = select i1 %9, i1 true, i1 %11
br i1 %12, label %17, label %13
13: ; preds = %1
%14 = getelementptr inbounds i8, ptr %0, i64 16
%15 = load i64, ptr %14, align 8, !tbaa !16
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %13, %1
%18 = tail call i32 @usc_set_sync_mode(ptr noundef nonnull %0) #3
br label %21
19: ; preds = %13
%20 = tail call i32 @usc_set_async_mode(ptr noundef nonnull %0) #3
br label %21
21: ; preds = %19, %17
%22 = tail call i32 @usc_set_serial_signals(ptr noundef nonnull %0) #3
%23 = getelementptr inbounds i8, ptr %0, i64 24
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %23, i8 0, i64 32, i1 false)
%24 = load i64, ptr @SICR_CTS, align 8, !tbaa !15
%25 = load i64, ptr @SICR_DSR, align 8, !tbaa !15
%26 = add nsw i64 %25, %24
%27 = load i64, ptr @SICR_DCD, align 8, !tbaa !15
%28 = add nsw i64 %26, %27
%29 = load i64, ptr @SICR_RI, align 8, !tbaa !15
%30 = add nsw i64 %28, %29
%31 = tail call i32 @usc_EnableStatusIrqs(ptr noundef nonnull %0, i64 noundef %30) #3
%32 = load i32, ptr @IO_PIN, align 4, !tbaa !17
%33 = tail call i32 @usc_EnableInterrupts(ptr noundef nonnull %0, i32 noundef %32) #3
%34 = tail call i32 @usc_get_serial_signals(ptr noundef nonnull %0) #3
%35 = getelementptr inbounds i8, ptr %0, i64 16
%36 = load i64, ptr %35, align 8, !tbaa !16
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %45
38: ; preds = %21
%39 = getelementptr inbounds i8, ptr %0, i64 8
%40 = load ptr, ptr %39, align 8, !tbaa !18
%41 = load i32, ptr %40, align 4, !tbaa !19
%42 = load i32, ptr @CREAD, align 4, !tbaa !17
%43 = and i32 %42, %41
%44 = icmp eq i32 %43, 0
br i1 %44, label %47, label %45
45: ; preds = %38, %21
%46 = tail call i32 @usc_start_receiver(ptr noundef nonnull %0) #3
br label %47
47: ; preds = %45, %38
%48 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #3
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @usc_stop_receiver(ptr noundef) local_unnamed_addr #1
declare i32 @usc_stop_transmitter(ptr noundef) local_unnamed_addr #1
declare i32 @usc_set_sync_mode(ptr noundef) local_unnamed_addr #1
declare i32 @usc_set_async_mode(ptr noundef) local_unnamed_addr #1
declare i32 @usc_set_serial_signals(ptr noundef) local_unnamed_addr #1
declare i32 @usc_EnableStatusIrqs(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @usc_EnableInterrupts(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usc_get_serial_signals(ptr noundef) local_unnamed_addr #1
declare i32 @usc_start_receiver(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 56}
!7 = !{!"mgsl_struct", !8, i64 0, !11, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48, !14, i64 56, !13, i64 64, !13, i64 72, !13, i64 80}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_8__", !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!"TYPE_5__", !13, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!7, !13, i64 16}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !12, i64 8}
!19 = !{!20, !8, i64 0}
!20 = !{!"TYPE_7__", !21, i64 0}
!21 = !{!"TYPE_6__", !8, i64 0}
| linux_drivers_tty_extr_synclink.c_mgsl_program_hw |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/firewire/extr_core-device.c_fw_device_set_broadcast_channel.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/firewire/extr_core-device.c_fw_device_set_broadcast_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @fw_device_set_broadcast_channel(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @is_fw_device(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @fw_device(ptr noundef %0) #2
%7 = ptrtoint ptr %1 to i64
%8 = tail call i32 @set_broadcast_channel(i32 noundef %6, i64 noundef %7) #2
br label %9
9: ; preds = %5, %2
ret i32 0
}
declare i64 @is_fw_device(ptr noundef) local_unnamed_addr #1
declare i32 @set_broadcast_channel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @fw_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/firewire/extr_core-device.c_fw_device_set_broadcast_channel.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/firewire/extr_core-device.c_fw_device_set_broadcast_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @fw_device_set_broadcast_channel(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i64 @is_fw_device(ptr noundef %0) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i32 @fw_device(ptr noundef %0) #2
%7 = ptrtoint ptr %1 to i64
%8 = tail call i32 @set_broadcast_channel(i32 noundef %6, i64 noundef %7) #2
br label %9
9: ; preds = %5, %2
ret i32 0
}
declare i64 @is_fw_device(ptr noundef) local_unnamed_addr #1
declare i32 @set_broadcast_channel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @fw_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_firewire_extr_core-device.c_fw_device_set_broadcast_channel |
; ModuleID = 'AnghaBench/poco/SevenZip/src/extr_XzIn.c_Xz_ReadIndex2.c'
source_filename = "AnghaBench/poco/SevenZip/src/extr_XzIn.c_Xz_ReadIndex2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i64, i64, ptr }
%struct.TYPE_12__ = type { i64, i64 }
@SZ_ERROR_ARCHIVE = dso_local local_unnamed_addr global i32 0, align 4
@SZ_ERROR_MEM = dso_local local_unnamed_addr global i32 0, align 4
@SZ_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @Xz_ReadIndex2], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @Xz_ReadIndex2(ptr noundef %0, ptr noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = alloca i64, align 8
%6 = icmp ult i64 %2, 5
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = load i64, ptr %1, align 8, !tbaa !5
%9 = icmp eq i64 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %7, %4
%11 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4, !tbaa !9
br label %72
12: ; preds = %7
%13 = add i64 %2, -4
%14 = tail call i64 @CrcCalc(ptr noundef nonnull %1, i64 noundef %13) #3
%15 = getelementptr inbounds i64, ptr %1, i64 %13
%16 = tail call i64 @GetUi32(ptr noundef nonnull %15) #3
%17 = icmp eq i64 %14, %16
br i1 %17, label %20, label %18
18: ; preds = %12
%19 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4, !tbaa !9
br label %72
20: ; preds = %12
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%21 = call i32 @READ_VARINT_AND_CHECK(ptr noundef nonnull %1, i64 noundef 1, i64 noundef %13, ptr noundef nonnull %5) #3
%22 = load i64, ptr %5, align 8, !tbaa !5
%23 = shl i64 %22, 1
%24 = icmp ugt i64 %23, %13
%25 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br i1 %24, label %72, label %26
26: ; preds = %20
%27 = call i32 @Xz_Free(ptr noundef %0, ptr noundef %3) #3
%28 = icmp eq i64 %22, 0
br i1 %28, label %51, label %29
29: ; preds = %26
store i64 %22, ptr %0, align 8, !tbaa !11
%30 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 1
store i64 %22, ptr %30, align 8, !tbaa !14
%31 = load ptr, ptr %3, align 8, !tbaa !15
%32 = trunc i64 %22 to i32
%33 = shl i32 %32, 4
%34 = call ptr %31(ptr noundef nonnull %3, i32 noundef %33) #3
%35 = getelementptr inbounds %struct.TYPE_11__, ptr %0, i64 0, i32 2
store ptr %34, ptr %35, align 8, !tbaa !17
%36 = icmp eq ptr %34, null
br i1 %36, label %37, label %42
37: ; preds = %29
%38 = load i32, ptr @SZ_ERROR_MEM, align 4, !tbaa !9
br label %72
39: ; preds = %42
%40 = add nuw i64 %43, 1
%41 = icmp eq i64 %40, %22
br i1 %41, label %51, label %42, !llvm.loop !18
42: ; preds = %29, %39
%43 = phi i64 [ %40, %39 ], [ 0, %29 ]
%44 = load ptr, ptr %35, align 8, !tbaa !17
%45 = getelementptr inbounds %struct.TYPE_12__, ptr %44, i64 %43
%46 = call i32 @READ_VARINT_AND_CHECK(ptr noundef nonnull %1, i64 noundef 1, i64 noundef %13, ptr noundef %45) #3
%47 = getelementptr inbounds %struct.TYPE_12__, ptr %44, i64 %43, i32 1
%48 = call i32 @READ_VARINT_AND_CHECK(ptr noundef nonnull %1, i64 noundef 1, i64 noundef %13, ptr noundef nonnull %47) #3
%49 = load i64, ptr %45, align 8, !tbaa !20
%50 = icmp eq i64 %49, 0
br i1 %50, label %70, label %39
51: ; preds = %39, %26
%52 = getelementptr inbounds i64, ptr %1, i64 1
%53 = load i64, ptr %52, align 8, !tbaa !5
%54 = icmp eq i64 %53, 0
br i1 %54, label %55, label %63, !llvm.loop !22
55: ; preds = %51
%56 = getelementptr inbounds i64, ptr %1, i64 2
%57 = load i64, ptr %56, align 8, !tbaa !5
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %63, !llvm.loop !22
59: ; preds = %55
%60 = getelementptr inbounds i64, ptr %1, i64 3
%61 = load i64, ptr %60, align 8, !tbaa !5
%62 = icmp eq i64 %61, 0
br i1 %62, label %65, label %63, !llvm.loop !22
63: ; preds = %59, %55, %51
%64 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4, !tbaa !9
br label %72
65: ; preds = %59
%66 = icmp eq i64 %13, 4
%67 = load i32, ptr @SZ_OK, align 4
%68 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4
%69 = select i1 %66, i32 %67, i32 %68
br label %72
70: ; preds = %42
%71 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4
br label %72
72: ; preds = %70, %20, %65, %63, %37, %18, %10
%73 = phi i32 [ %11, %10 ], [ %19, %18 ], [ %38, %37 ], [ %64, %63 ], [ %69, %65 ], [ %25, %20 ], [ %71, %70 ]
ret i32 %73
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @CrcCalc(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @GetUi32(ptr noundef) local_unnamed_addr #2
declare i32 @READ_VARINT_AND_CHECK(ptr noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @Xz_Free(ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_11__", !6, i64 0, !6, i64 8, !13, i64 16}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!12, !6, i64 8}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_10__", !13, i64 0}
!17 = !{!12, !13, i64 16}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!21, !6, i64 0}
!21 = !{!"TYPE_12__", !6, i64 0, !6, i64 8}
!22 = distinct !{!22, !19}
| ; ModuleID = 'AnghaBench/poco/SevenZip/src/extr_XzIn.c_Xz_ReadIndex2.c'
source_filename = "AnghaBench/poco/SevenZip/src/extr_XzIn.c_Xz_ReadIndex2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_12__ = type { i64, i64 }
@SZ_ERROR_ARCHIVE = common local_unnamed_addr global i32 0, align 4
@SZ_ERROR_MEM = common local_unnamed_addr global i32 0, align 4
@SZ_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @Xz_ReadIndex2], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @Xz_ReadIndex2(ptr noundef %0, ptr noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = alloca i64, align 8
%6 = icmp ult i64 %2, 5
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = load i64, ptr %1, align 8, !tbaa !6
%9 = icmp eq i64 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %7, %4
%11 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4, !tbaa !10
br label %72
12: ; preds = %7
%13 = add i64 %2, -4
%14 = tail call i64 @CrcCalc(ptr noundef nonnull %1, i64 noundef %13) #3
%15 = getelementptr inbounds i64, ptr %1, i64 %13
%16 = tail call i64 @GetUi32(ptr noundef nonnull %15) #3
%17 = icmp eq i64 %14, %16
br i1 %17, label %20, label %18
18: ; preds = %12
%19 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4, !tbaa !10
br label %72
20: ; preds = %12
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%21 = call i32 @READ_VARINT_AND_CHECK(ptr noundef nonnull %1, i64 noundef 1, i64 noundef %13, ptr noundef nonnull %5) #3
%22 = load i64, ptr %5, align 8, !tbaa !6
%23 = shl i64 %22, 1
%24 = icmp ugt i64 %23, %13
%25 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br i1 %24, label %72, label %26
26: ; preds = %20
%27 = call i32 @Xz_Free(ptr noundef %0, ptr noundef %3) #3
%28 = icmp eq i64 %22, 0
br i1 %28, label %51, label %29
29: ; preds = %26
store i64 %22, ptr %0, align 8, !tbaa !12
%30 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %22, ptr %30, align 8, !tbaa !15
%31 = load ptr, ptr %3, align 8, !tbaa !16
%32 = trunc i64 %22 to i32
%33 = shl i32 %32, 4
%34 = call ptr %31(ptr noundef nonnull %3, i32 noundef %33) #3
%35 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %34, ptr %35, align 8, !tbaa !18
%36 = icmp eq ptr %34, null
br i1 %36, label %37, label %42
37: ; preds = %29
%38 = load i32, ptr @SZ_ERROR_MEM, align 4, !tbaa !10
br label %72
39: ; preds = %42
%40 = add nuw i64 %43, 1
%41 = icmp eq i64 %40, %22
br i1 %41, label %51, label %42, !llvm.loop !19
42: ; preds = %29, %39
%43 = phi i64 [ %40, %39 ], [ 0, %29 ]
%44 = load ptr, ptr %35, align 8, !tbaa !18
%45 = getelementptr inbounds %struct.TYPE_12__, ptr %44, i64 %43
%46 = call i32 @READ_VARINT_AND_CHECK(ptr noundef nonnull %1, i64 noundef 1, i64 noundef %13, ptr noundef %45) #3
%47 = getelementptr inbounds i8, ptr %45, i64 8
%48 = call i32 @READ_VARINT_AND_CHECK(ptr noundef nonnull %1, i64 noundef 1, i64 noundef %13, ptr noundef nonnull %47) #3
%49 = load i64, ptr %45, align 8, !tbaa !21
%50 = icmp eq i64 %49, 0
br i1 %50, label %70, label %39
51: ; preds = %39, %26
%52 = getelementptr inbounds i8, ptr %1, i64 8
%53 = load i64, ptr %52, align 8, !tbaa !6
%54 = icmp eq i64 %53, 0
br i1 %54, label %55, label %63, !llvm.loop !23
55: ; preds = %51
%56 = getelementptr inbounds i8, ptr %1, i64 16
%57 = load i64, ptr %56, align 8, !tbaa !6
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %63, !llvm.loop !23
59: ; preds = %55
%60 = getelementptr inbounds i8, ptr %1, i64 24
%61 = load i64, ptr %60, align 8, !tbaa !6
%62 = icmp eq i64 %61, 0
br i1 %62, label %65, label %63, !llvm.loop !23
63: ; preds = %59, %55, %51
%64 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4, !tbaa !10
br label %72
65: ; preds = %59
%66 = icmp eq i64 %13, 4
%67 = load i32, ptr @SZ_OK, align 4
%68 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4
%69 = select i1 %66, i32 %67, i32 %68
br label %72
70: ; preds = %42
%71 = load i32, ptr @SZ_ERROR_ARCHIVE, align 4
br label %72
72: ; preds = %70, %20, %65, %63, %37, %18, %10
%73 = phi i32 [ %11, %10 ], [ %19, %18 ], [ %38, %37 ], [ %64, %63 ], [ %69, %65 ], [ %25, %20 ], [ %71, %70 ]
ret i32 %73
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @CrcCalc(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @GetUi32(ptr noundef) local_unnamed_addr #2
declare i32 @READ_VARINT_AND_CHECK(ptr noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @Xz_Free(ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_11__", !7, i64 0, !7, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !7, i64 8}
!16 = !{!17, !14, i64 0}
!17 = !{!"TYPE_10__", !14, i64 0}
!18 = !{!13, !14, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!22, !7, i64 0}
!22 = !{!"TYPE_12__", !7, i64 0, !7, i64 8}
!23 = distinct !{!23, !20}
| poco_SevenZip_src_extr_XzIn.c_Xz_ReadIndex2 |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/lib/isc/extr_task.c_dispatch.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/lib/isc/extr_task.c_dispatch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_21__ = type { i32, i32, ptr, i32, i32, i32, i32, i64, i32, i64 }
%struct.TYPE_22__ = type { i64, i64, i32, i32, i32, i32, i32 }
@DEFAULT_TASKMGR_QUANTUM = dso_local local_unnamed_addr global i32 0, align 4
@isc_msgcat = dso_local local_unnamed_addr global i32 0, align 4
@ISC_MSGSET_TASK = dso_local local_unnamed_addr global i32 0, align 4
@ISC_MSG_WORKING = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"working\00", align 1
@ISC_FALSE = dso_local local_unnamed_addr global i64 0, align 8
@task_state_ready = dso_local local_unnamed_addr global i64 0, align 8
@task_state_running = dso_local local_unnamed_addr global i64 0, align 8
@ISC_MSGSET_GENERAL = dso_local local_unnamed_addr global i32 0, align 4
@ISC_MSG_RUNNING = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [8 x i8] c"running\00", align 1
@ev_link = dso_local local_unnamed_addr global i32 0, align 4
@ISC_MSG_EXECUTE = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [15 x i8] c"execute action\00", align 1
@ISC_MSG_EMPTY = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [6 x i8] c"empty\00", align 1
@ISC_MSG_DONE = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [5 x i8] c"done\00", align 1
@ISC_TRUE = dso_local local_unnamed_addr global i64 0, align 8
@task_state_done = dso_local local_unnamed_addr global i64 0, align 8
@task_state_idle = dso_local local_unnamed_addr global i64 0, align 8
@ISC_MSG_QUANTUM = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [8 x i8] c"quantum\00", align 1
@ready_link = dso_local local_unnamed_addr global i32 0, align 4
@TASK_F_PRIVILEGED = dso_local local_unnamed_addr global i32 0, align 4
@ready_priority_link = dso_local local_unnamed_addr global i32 0, align 4
@isc_taskmgrmode_normal = dso_local local_unnamed_addr global ptr null, align 8
@ISC_MSG_AWAKE = dso_local local_unnamed_addr global i32 0, align 4
@ISC_MSG_WAIT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dispatch], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @dispatch(ptr noundef %0) #0 {
%2 = tail call i32 @VALID_MANAGER(ptr noundef %0) #2
%3 = tail call i32 @REQUIRE(i32 noundef %2) #2
%4 = tail call i32 @ISC_LIST_INIT(i32 noundef undef) #2
%5 = tail call i32 @ISC_LIST_INIT(i32 noundef undef) #2
%6 = getelementptr inbounds %struct.TYPE_21__, ptr %0, i64 0, i32 1
%7 = tail call i32 @LOCK(ptr noundef nonnull %6) #2
%8 = tail call i32 @FINISHED(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @DEFAULT_TASKMGR_QUANTUM, align 4
%11 = icmp ne i32 %10, 0
%12 = select i1 %9, i1 %11, i1 false
br i1 %12, label %13, label %168
13: ; preds = %1, %161
%14 = phi i32 [ %162, %161 ], [ 0, %1 ]
%15 = tail call i64 @empty_readyq(ptr noundef %0) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %168
17: ; preds = %13
%18 = load i32, ptr @isc_msgcat, align 4, !tbaa !5
%19 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !5
%20 = load i32, ptr @ISC_MSG_WORKING, align 4, !tbaa !5
%21 = tail call i32 @isc_msgcat_get(i32 noundef %18, i32 noundef %19, i32 noundef %20, ptr noundef nonnull @.str) #2
%22 = tail call i32 @XTHREADTRACE(i32 noundef %21) #2
%23 = tail call ptr @pop_readyq(ptr noundef %0) #2
%24 = icmp eq ptr %23, null
br i1 %24, label %161, label %25
25: ; preds = %17
%26 = load i64, ptr @ISC_FALSE, align 8, !tbaa !9
%27 = tail call i32 @VALID_TASK(ptr noundef nonnull %23) #2
%28 = tail call i32 @INSIST(i32 noundef %27) #2
%29 = load i32, ptr %0, align 8, !tbaa !11
%30 = add nsw i32 %29, 1
store i32 %30, ptr %0, align 8, !tbaa !11
%31 = tail call i32 @UNLOCK(ptr noundef nonnull %6) #2
%32 = getelementptr inbounds %struct.TYPE_22__, ptr %23, i64 0, i32 4
%33 = tail call i32 @LOCK(ptr noundef nonnull %32) #2
%34 = load i64, ptr %23, align 8, !tbaa !14
%35 = load i64, ptr @task_state_ready, align 8, !tbaa !9
%36 = icmp eq i64 %34, %35
%37 = zext i1 %36 to i32
%38 = tail call i32 @INSIST(i32 noundef %37) #2
%39 = load i64, ptr @task_state_running, align 8, !tbaa !9
store i64 %39, ptr %23, align 8, !tbaa !14
%40 = load i32, ptr @isc_msgcat, align 4, !tbaa !5
%41 = load i32, ptr @ISC_MSGSET_GENERAL, align 4, !tbaa !5
%42 = load i32, ptr @ISC_MSG_RUNNING, align 4, !tbaa !5
%43 = tail call i32 @isc_msgcat_get(i32 noundef %40, i32 noundef %41, i32 noundef %42, ptr noundef nonnull @.str.1) #2
%44 = tail call i32 @XTRACE(i32 noundef %43) #2
%45 = getelementptr inbounds %struct.TYPE_22__, ptr %23, i64 0, i32 6
%46 = tail call i32 @isc_stdtime_get(ptr noundef nonnull %45) #2
%47 = getelementptr inbounds %struct.TYPE_22__, ptr %23, i64 0, i32 5
%48 = getelementptr inbounds %struct.TYPE_22__, ptr %23, i64 0, i32 1
%49 = getelementptr inbounds %struct.TYPE_22__, ptr %23, i64 0, i32 2
br label %50
50: ; preds = %135, %25
%51 = phi i32 [ 0, %25 ], [ %81, %135 ]
%52 = phi i64 [ %26, %25 ], [ 0, %135 ]
%53 = phi i64 [ %26, %25 ], [ %137, %135 ]
%54 = phi i64 [ %26, %25 ], [ %138, %135 ]
%55 = phi i32 [ %14, %25 ], [ %82, %135 ]
%56 = load i32, ptr %47, align 4, !tbaa !16
%57 = tail call i64 @EMPTY(i32 noundef %56) #2
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %80
59: ; preds = %50
%60 = load i32, ptr %47, align 4, !tbaa !16
%61 = tail call ptr @HEAD(i32 noundef %60) #2
%62 = load i32, ptr %47, align 4, !tbaa !16
%63 = load i32, ptr @ev_link, align 4, !tbaa !5
%64 = tail call i32 @DEQUEUE(i32 noundef %62, ptr noundef %61, i32 noundef %63) #2
%65 = load i32, ptr @isc_msgcat, align 4, !tbaa !5
%66 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !5
%67 = load i32, ptr @ISC_MSG_EXECUTE, align 4, !tbaa !5
%68 = tail call i32 @isc_msgcat_get(i32 noundef %65, i32 noundef %66, i32 noundef %67, ptr noundef nonnull @.str.2) #2
%69 = tail call i32 @XTRACE(i32 noundef %68) #2
%70 = load ptr, ptr %61, align 8, !tbaa !17
%71 = icmp eq ptr %70, null
br i1 %71, label %77, label %72
72: ; preds = %59
%73 = tail call i32 @UNLOCK(ptr noundef nonnull %32) #2
%74 = load ptr, ptr %61, align 8, !tbaa !17
%75 = tail call i32 %74(ptr noundef nonnull %23, ptr noundef nonnull %61) #2
%76 = tail call i32 @LOCK(ptr noundef nonnull %32) #2
br label %77
77: ; preds = %72, %59
%78 = add i32 %51, 1
%79 = add i32 %55, 1
br label %80
80: ; preds = %77, %50
%81 = phi i32 [ %51, %50 ], [ %78, %77 ]
%82 = phi i32 [ %55, %50 ], [ %79, %77 ]
%83 = load i64, ptr %48, align 8, !tbaa !19
%84 = icmp eq i64 %83, 0
br i1 %84, label %85, label %97
85: ; preds = %80
%86 = load i32, ptr %47, align 4, !tbaa !16
%87 = tail call i64 @EMPTY(i32 noundef %86) #2
%88 = icmp eq i64 %87, 0
br i1 %88, label %97, label %89
89: ; preds = %85
%90 = tail call i64 @TASK_SHUTTINGDOWN(ptr noundef nonnull %23) #2
%91 = icmp eq i64 %90, 0
br i1 %91, label %92, label %97
92: ; preds = %89
%93 = tail call i64 @task_shutdown(ptr noundef nonnull %23) #2
%94 = icmp eq i64 %93, 0
%95 = zext i1 %94 to i32
%96 = tail call i32 @INSIST(i32 noundef %95) #2
br label %97
97: ; preds = %92, %89, %85, %80
%98 = load i32, ptr %47, align 4, !tbaa !16
%99 = tail call i64 @EMPTY(i32 noundef %98) #2
%100 = icmp eq i64 %99, 0
br i1 %100, label %124, label %101
101: ; preds = %97
%102 = load i32, ptr @isc_msgcat, align 4, !tbaa !5
%103 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !5
%104 = load i32, ptr @ISC_MSG_EMPTY, align 4, !tbaa !5
%105 = tail call i32 @isc_msgcat_get(i32 noundef %102, i32 noundef %103, i32 noundef %104, ptr noundef nonnull @.str.3) #2
%106 = tail call i32 @XTRACE(i32 noundef %105) #2
%107 = load i64, ptr %48, align 8, !tbaa !19
%108 = icmp eq i64 %107, 0
br i1 %108, label %109, label %119
109: ; preds = %101
%110 = tail call i64 @TASK_SHUTTINGDOWN(ptr noundef nonnull %23) #2
%111 = icmp eq i64 %110, 0
br i1 %111, label %119, label %112
112: ; preds = %109
%113 = load i32, ptr @isc_msgcat, align 4, !tbaa !5
%114 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !5
%115 = load i32, ptr @ISC_MSG_DONE, align 4, !tbaa !5
%116 = tail call i32 @isc_msgcat_get(i32 noundef %113, i32 noundef %114, i32 noundef %115, ptr noundef nonnull @.str.4) #2
%117 = tail call i32 @XTRACE(i32 noundef %116) #2
%118 = load i64, ptr @ISC_TRUE, align 8, !tbaa !9
br label %119
119: ; preds = %101, %109, %112
%120 = phi ptr [ @task_state_done, %112 ], [ @task_state_idle, %109 ], [ @task_state_idle, %101 ]
%121 = phi i64 [ %118, %112 ], [ %54, %109 ], [ %54, %101 ]
%122 = load i64, ptr %120, align 8, !tbaa !9
store i64 %122, ptr %23, align 8, !tbaa !14
%123 = load i64, ptr @ISC_TRUE, align 8, !tbaa !9
br label %135
124: ; preds = %97
%125 = load i32, ptr %49, align 8, !tbaa !20
%126 = icmp ult i32 %81, %125
br i1 %126, label %135, label %127
127: ; preds = %124
%128 = load i32, ptr @isc_msgcat, align 4, !tbaa !5
%129 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !5
%130 = load i32, ptr @ISC_MSG_QUANTUM, align 4, !tbaa !5
%131 = tail call i32 @isc_msgcat_get(i32 noundef %128, i32 noundef %129, i32 noundef %130, ptr noundef nonnull @.str.5) #2
%132 = tail call i32 @XTRACE(i32 noundef %131) #2
%133 = load i64, ptr @task_state_ready, align 8, !tbaa !9
store i64 %133, ptr %23, align 8, !tbaa !14
%134 = load i64, ptr @ISC_TRUE, align 8, !tbaa !9
br label %135
135: ; preds = %119, %127, %124
%136 = phi i64 [ %123, %119 ], [ %134, %127 ], [ %52, %124 ]
%137 = phi i64 [ %53, %119 ], [ %134, %127 ], [ %53, %124 ]
%138 = phi i64 [ %121, %119 ], [ %54, %127 ], [ %54, %124 ]
%139 = icmp eq i64 %136, 0
br i1 %139, label %50, label %140, !llvm.loop !21
140: ; preds = %135
%141 = tail call i32 @UNLOCK(ptr noundef nonnull %32) #2
%142 = icmp eq i64 %138, 0
br i1 %142, label %145, label %143
143: ; preds = %140
%144 = tail call i32 @task_finished(ptr noundef nonnull %23) #2
br label %145
145: ; preds = %143, %140
%146 = tail call i32 @LOCK(ptr noundef nonnull %6) #2
%147 = load i32, ptr %0, align 8, !tbaa !11
%148 = add nsw i32 %147, -1
store i32 %148, ptr %0, align 8, !tbaa !11
%149 = icmp eq i64 %137, 0
br i1 %149, label %161, label %150
150: ; preds = %145
%151 = load i32, ptr @ready_link, align 4, !tbaa !5
%152 = tail call i32 @ENQUEUE(i32 noundef undef, ptr noundef nonnull %23, i32 noundef %151) #2
%153 = getelementptr inbounds %struct.TYPE_22__, ptr %23, i64 0, i32 3
%154 = load i32, ptr %153, align 4, !tbaa !23
%155 = load i32, ptr @TASK_F_PRIVILEGED, align 4, !tbaa !5
%156 = and i32 %155, %154
%157 = icmp eq i32 %156, 0
br i1 %157, label %161, label %158
158: ; preds = %150
%159 = load i32, ptr @ready_priority_link, align 4, !tbaa !5
%160 = tail call i32 @ENQUEUE(i32 noundef undef, ptr noundef nonnull %23, i32 noundef %159) #2
br label %161
161: ; preds = %145, %158, %150, %17
%162 = phi i32 [ %14, %17 ], [ %82, %150 ], [ %82, %158 ], [ %82, %145 ]
%163 = tail call i32 @FINISHED(ptr noundef %0) #2
%164 = icmp eq i32 %163, 0
%165 = load i32, ptr @DEFAULT_TASKMGR_QUANTUM, align 4
%166 = icmp ult i32 %162, %165
%167 = select i1 %164, i1 %166, i1 false
br i1 %167, label %13, label %168, !llvm.loop !24
168: ; preds = %161, %13, %1
%169 = getelementptr inbounds %struct.TYPE_21__, ptr %0, i64 0, i32 4
%170 = load i32, ptr %169, align 4, !tbaa !25
%171 = load i32, ptr @ready_link, align 4, !tbaa !5
%172 = tail call i32 @ISC_LIST_APPENDLIST(i32 noundef %170, i32 noundef undef, i32 noundef %171) #2
%173 = getelementptr inbounds %struct.TYPE_21__, ptr %0, i64 0, i32 3
%174 = load i32, ptr %173, align 8, !tbaa !26
%175 = load i32, ptr @ready_priority_link, align 4, !tbaa !5
%176 = tail call i32 @ISC_LIST_APPENDLIST(i32 noundef %174, i32 noundef undef, i32 noundef %175) #2
%177 = tail call i64 @empty_readyq(ptr noundef %0) #2
%178 = icmp eq i64 %177, 0
br i1 %178, label %182, label %179
179: ; preds = %168
%180 = load ptr, ptr @isc_taskmgrmode_normal, align 8, !tbaa !27
%181 = getelementptr inbounds %struct.TYPE_21__, ptr %0, i64 0, i32 2
store ptr %180, ptr %181, align 8, !tbaa !28
br label %182
182: ; preds = %179, %168
%183 = tail call i32 @UNLOCK(ptr noundef nonnull %6) #2
ret void
}
declare i32 @REQUIRE(i32 noundef) local_unnamed_addr #1
declare i32 @VALID_MANAGER(ptr noundef) local_unnamed_addr #1
declare i32 @ISC_LIST_INIT(i32 noundef) local_unnamed_addr #1
declare i32 @LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @FINISHED(ptr noundef) local_unnamed_addr #1
declare i64 @empty_readyq(ptr noundef) local_unnamed_addr #1
declare i32 @XTHREADTRACE(i32 noundef) local_unnamed_addr #1
declare i32 @isc_msgcat_get(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @pop_readyq(ptr noundef) local_unnamed_addr #1
declare i32 @INSIST(i32 noundef) local_unnamed_addr #1
declare i32 @VALID_TASK(ptr noundef) local_unnamed_addr #1
declare i32 @UNLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @XTRACE(i32 noundef) local_unnamed_addr #1
declare i32 @isc_stdtime_get(ptr noundef) local_unnamed_addr #1
declare i64 @EMPTY(i32 noundef) local_unnamed_addr #1
declare ptr @HEAD(i32 noundef) local_unnamed_addr #1
declare i32 @DEQUEUE(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @TASK_SHUTTINGDOWN(ptr noundef) local_unnamed_addr #1
declare i64 @task_shutdown(ptr noundef) local_unnamed_addr #1
declare i32 @task_finished(ptr noundef) local_unnamed_addr #1
declare i32 @ENQUEUE(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ISC_LIST_APPENDLIST(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"TYPE_21__", !6, i64 0, !6, i64 4, !13, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !10, i64 32, !6, i64 40, !10, i64 48}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"TYPE_22__", !10, i64 0, !10, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32}
!16 = !{!15, !6, i64 28}
!17 = !{!18, !13, i64 0}
!18 = !{!"TYPE_20__", !13, i64 0}
!19 = !{!15, !10, i64 8}
!20 = !{!15, !6, i64 16}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!15, !6, i64 20}
!24 = distinct !{!24, !22}
!25 = !{!12, !6, i64 20}
!26 = !{!12, !6, i64 16}
!27 = !{!13, !13, i64 0}
!28 = !{!12, !13, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/lib/isc/extr_task.c_dispatch.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/lib/isc/extr_task.c_dispatch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DEFAULT_TASKMGR_QUANTUM = common local_unnamed_addr global i32 0, align 4
@isc_msgcat = common local_unnamed_addr global i32 0, align 4
@ISC_MSGSET_TASK = common local_unnamed_addr global i32 0, align 4
@ISC_MSG_WORKING = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"working\00", align 1
@ISC_FALSE = common local_unnamed_addr global i64 0, align 8
@task_state_ready = common local_unnamed_addr global i64 0, align 8
@task_state_running = common local_unnamed_addr global i64 0, align 8
@ISC_MSGSET_GENERAL = common local_unnamed_addr global i32 0, align 4
@ISC_MSG_RUNNING = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [8 x i8] c"running\00", align 1
@ev_link = common local_unnamed_addr global i32 0, align 4
@ISC_MSG_EXECUTE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [15 x i8] c"execute action\00", align 1
@ISC_MSG_EMPTY = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [6 x i8] c"empty\00", align 1
@ISC_MSG_DONE = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [5 x i8] c"done\00", align 1
@ISC_TRUE = common local_unnamed_addr global i64 0, align 8
@task_state_done = common local_unnamed_addr global i64 0, align 8
@task_state_idle = common local_unnamed_addr global i64 0, align 8
@ISC_MSG_QUANTUM = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [8 x i8] c"quantum\00", align 1
@ready_link = common local_unnamed_addr global i32 0, align 4
@TASK_F_PRIVILEGED = common local_unnamed_addr global i32 0, align 4
@ready_priority_link = common local_unnamed_addr global i32 0, align 4
@isc_taskmgrmode_normal = common local_unnamed_addr global ptr null, align 8
@ISC_MSG_AWAKE = common local_unnamed_addr global i32 0, align 4
@ISC_MSG_WAIT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dispatch], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @dispatch(ptr noundef %0) #0 {
%2 = tail call i32 @VALID_MANAGER(ptr noundef %0) #2
%3 = tail call i32 @REQUIRE(i32 noundef %2) #2
%4 = tail call i32 @ISC_LIST_INIT(i32 noundef undef) #2
%5 = tail call i32 @ISC_LIST_INIT(i32 noundef undef) #2
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = tail call i32 @LOCK(ptr noundef nonnull %6) #2
%8 = tail call i32 @FINISHED(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
%10 = load i32, ptr @DEFAULT_TASKMGR_QUANTUM, align 4
%11 = icmp ne i32 %10, 0
%12 = select i1 %9, i1 %11, i1 false
br i1 %12, label %13, label %168
13: ; preds = %1, %161
%14 = phi i32 [ %162, %161 ], [ 0, %1 ]
%15 = tail call i64 @empty_readyq(ptr noundef %0) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %168
17: ; preds = %13
%18 = load i32, ptr @isc_msgcat, align 4, !tbaa !6
%19 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !6
%20 = load i32, ptr @ISC_MSG_WORKING, align 4, !tbaa !6
%21 = tail call i32 @isc_msgcat_get(i32 noundef %18, i32 noundef %19, i32 noundef %20, ptr noundef nonnull @.str) #2
%22 = tail call i32 @XTHREADTRACE(i32 noundef %21) #2
%23 = tail call ptr @pop_readyq(ptr noundef %0) #2
%24 = icmp eq ptr %23, null
br i1 %24, label %161, label %25
25: ; preds = %17
%26 = load i64, ptr @ISC_FALSE, align 8, !tbaa !10
%27 = tail call i32 @VALID_TASK(ptr noundef nonnull %23) #2
%28 = tail call i32 @INSIST(i32 noundef %27) #2
%29 = load i32, ptr %0, align 8, !tbaa !12
%30 = add nsw i32 %29, 1
store i32 %30, ptr %0, align 8, !tbaa !12
%31 = tail call i32 @UNLOCK(ptr noundef nonnull %6) #2
%32 = getelementptr inbounds i8, ptr %23, i64 24
%33 = tail call i32 @LOCK(ptr noundef nonnull %32) #2
%34 = load i64, ptr %23, align 8, !tbaa !15
%35 = load i64, ptr @task_state_ready, align 8, !tbaa !10
%36 = icmp eq i64 %34, %35
%37 = zext i1 %36 to i32
%38 = tail call i32 @INSIST(i32 noundef %37) #2
%39 = load i64, ptr @task_state_running, align 8, !tbaa !10
store i64 %39, ptr %23, align 8, !tbaa !15
%40 = load i32, ptr @isc_msgcat, align 4, !tbaa !6
%41 = load i32, ptr @ISC_MSGSET_GENERAL, align 4, !tbaa !6
%42 = load i32, ptr @ISC_MSG_RUNNING, align 4, !tbaa !6
%43 = tail call i32 @isc_msgcat_get(i32 noundef %40, i32 noundef %41, i32 noundef %42, ptr noundef nonnull @.str.1) #2
%44 = tail call i32 @XTRACE(i32 noundef %43) #2
%45 = getelementptr inbounds i8, ptr %23, i64 32
%46 = tail call i32 @isc_stdtime_get(ptr noundef nonnull %45) #2
%47 = getelementptr inbounds i8, ptr %23, i64 28
%48 = getelementptr inbounds i8, ptr %23, i64 8
%49 = getelementptr inbounds i8, ptr %23, i64 16
br label %50
50: ; preds = %135, %25
%51 = phi i32 [ 0, %25 ], [ %81, %135 ]
%52 = phi i64 [ %26, %25 ], [ 0, %135 ]
%53 = phi i64 [ %26, %25 ], [ %137, %135 ]
%54 = phi i64 [ %26, %25 ], [ %138, %135 ]
%55 = phi i32 [ %14, %25 ], [ %82, %135 ]
%56 = load i32, ptr %47, align 4, !tbaa !17
%57 = tail call i64 @EMPTY(i32 noundef %56) #2
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %80
59: ; preds = %50
%60 = load i32, ptr %47, align 4, !tbaa !17
%61 = tail call ptr @HEAD(i32 noundef %60) #2
%62 = load i32, ptr %47, align 4, !tbaa !17
%63 = load i32, ptr @ev_link, align 4, !tbaa !6
%64 = tail call i32 @DEQUEUE(i32 noundef %62, ptr noundef %61, i32 noundef %63) #2
%65 = load i32, ptr @isc_msgcat, align 4, !tbaa !6
%66 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !6
%67 = load i32, ptr @ISC_MSG_EXECUTE, align 4, !tbaa !6
%68 = tail call i32 @isc_msgcat_get(i32 noundef %65, i32 noundef %66, i32 noundef %67, ptr noundef nonnull @.str.2) #2
%69 = tail call i32 @XTRACE(i32 noundef %68) #2
%70 = load ptr, ptr %61, align 8, !tbaa !18
%71 = icmp eq ptr %70, null
br i1 %71, label %77, label %72
72: ; preds = %59
%73 = tail call i32 @UNLOCK(ptr noundef nonnull %32) #2
%74 = load ptr, ptr %61, align 8, !tbaa !18
%75 = tail call i32 %74(ptr noundef nonnull %23, ptr noundef nonnull %61) #2
%76 = tail call i32 @LOCK(ptr noundef nonnull %32) #2
br label %77
77: ; preds = %72, %59
%78 = add i32 %51, 1
%79 = add i32 %55, 1
br label %80
80: ; preds = %77, %50
%81 = phi i32 [ %51, %50 ], [ %78, %77 ]
%82 = phi i32 [ %55, %50 ], [ %79, %77 ]
%83 = load i64, ptr %48, align 8, !tbaa !20
%84 = icmp eq i64 %83, 0
br i1 %84, label %85, label %97
85: ; preds = %80
%86 = load i32, ptr %47, align 4, !tbaa !17
%87 = tail call i64 @EMPTY(i32 noundef %86) #2
%88 = icmp eq i64 %87, 0
br i1 %88, label %97, label %89
89: ; preds = %85
%90 = tail call i64 @TASK_SHUTTINGDOWN(ptr noundef nonnull %23) #2
%91 = icmp eq i64 %90, 0
br i1 %91, label %92, label %97
92: ; preds = %89
%93 = tail call i64 @task_shutdown(ptr noundef nonnull %23) #2
%94 = icmp eq i64 %93, 0
%95 = zext i1 %94 to i32
%96 = tail call i32 @INSIST(i32 noundef %95) #2
br label %97
97: ; preds = %92, %89, %85, %80
%98 = load i32, ptr %47, align 4, !tbaa !17
%99 = tail call i64 @EMPTY(i32 noundef %98) #2
%100 = icmp eq i64 %99, 0
br i1 %100, label %124, label %101
101: ; preds = %97
%102 = load i32, ptr @isc_msgcat, align 4, !tbaa !6
%103 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !6
%104 = load i32, ptr @ISC_MSG_EMPTY, align 4, !tbaa !6
%105 = tail call i32 @isc_msgcat_get(i32 noundef %102, i32 noundef %103, i32 noundef %104, ptr noundef nonnull @.str.3) #2
%106 = tail call i32 @XTRACE(i32 noundef %105) #2
%107 = load i64, ptr %48, align 8, !tbaa !20
%108 = icmp eq i64 %107, 0
br i1 %108, label %109, label %119
109: ; preds = %101
%110 = tail call i64 @TASK_SHUTTINGDOWN(ptr noundef nonnull %23) #2
%111 = icmp eq i64 %110, 0
br i1 %111, label %119, label %112
112: ; preds = %109
%113 = load i32, ptr @isc_msgcat, align 4, !tbaa !6
%114 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !6
%115 = load i32, ptr @ISC_MSG_DONE, align 4, !tbaa !6
%116 = tail call i32 @isc_msgcat_get(i32 noundef %113, i32 noundef %114, i32 noundef %115, ptr noundef nonnull @.str.4) #2
%117 = tail call i32 @XTRACE(i32 noundef %116) #2
%118 = load i64, ptr @ISC_TRUE, align 8, !tbaa !10
br label %119
119: ; preds = %101, %109, %112
%120 = phi ptr [ @task_state_done, %112 ], [ @task_state_idle, %109 ], [ @task_state_idle, %101 ]
%121 = phi i64 [ %118, %112 ], [ %54, %109 ], [ %54, %101 ]
%122 = load i64, ptr %120, align 8, !tbaa !10
store i64 %122, ptr %23, align 8, !tbaa !15
%123 = load i64, ptr @ISC_TRUE, align 8, !tbaa !10
br label %135
124: ; preds = %97
%125 = load i32, ptr %49, align 8, !tbaa !21
%126 = icmp ult i32 %81, %125
br i1 %126, label %135, label %127
127: ; preds = %124
%128 = load i32, ptr @isc_msgcat, align 4, !tbaa !6
%129 = load i32, ptr @ISC_MSGSET_TASK, align 4, !tbaa !6
%130 = load i32, ptr @ISC_MSG_QUANTUM, align 4, !tbaa !6
%131 = tail call i32 @isc_msgcat_get(i32 noundef %128, i32 noundef %129, i32 noundef %130, ptr noundef nonnull @.str.5) #2
%132 = tail call i32 @XTRACE(i32 noundef %131) #2
%133 = load i64, ptr @task_state_ready, align 8, !tbaa !10
store i64 %133, ptr %23, align 8, !tbaa !15
%134 = load i64, ptr @ISC_TRUE, align 8, !tbaa !10
br label %135
135: ; preds = %119, %127, %124
%136 = phi i64 [ %123, %119 ], [ %134, %127 ], [ %52, %124 ]
%137 = phi i64 [ %53, %119 ], [ %134, %127 ], [ %53, %124 ]
%138 = phi i64 [ %121, %119 ], [ %54, %127 ], [ %54, %124 ]
%139 = icmp eq i64 %136, 0
br i1 %139, label %50, label %140, !llvm.loop !22
140: ; preds = %135
%141 = tail call i32 @UNLOCK(ptr noundef nonnull %32) #2
%142 = icmp eq i64 %138, 0
br i1 %142, label %145, label %143
143: ; preds = %140
%144 = tail call i32 @task_finished(ptr noundef nonnull %23) #2
br label %145
145: ; preds = %143, %140
%146 = tail call i32 @LOCK(ptr noundef nonnull %6) #2
%147 = load i32, ptr %0, align 8, !tbaa !12
%148 = add nsw i32 %147, -1
store i32 %148, ptr %0, align 8, !tbaa !12
%149 = icmp eq i64 %137, 0
br i1 %149, label %161, label %150
150: ; preds = %145
%151 = load i32, ptr @ready_link, align 4, !tbaa !6
%152 = tail call i32 @ENQUEUE(i32 noundef undef, ptr noundef nonnull %23, i32 noundef %151) #2
%153 = getelementptr inbounds i8, ptr %23, i64 20
%154 = load i32, ptr %153, align 4, !tbaa !24
%155 = load i32, ptr @TASK_F_PRIVILEGED, align 4, !tbaa !6
%156 = and i32 %155, %154
%157 = icmp eq i32 %156, 0
br i1 %157, label %161, label %158
158: ; preds = %150
%159 = load i32, ptr @ready_priority_link, align 4, !tbaa !6
%160 = tail call i32 @ENQUEUE(i32 noundef undef, ptr noundef nonnull %23, i32 noundef %159) #2
br label %161
161: ; preds = %145, %158, %150, %17
%162 = phi i32 [ %14, %17 ], [ %82, %150 ], [ %82, %158 ], [ %82, %145 ]
%163 = tail call i32 @FINISHED(ptr noundef %0) #2
%164 = icmp eq i32 %163, 0
%165 = load i32, ptr @DEFAULT_TASKMGR_QUANTUM, align 4
%166 = icmp ult i32 %162, %165
%167 = select i1 %164, i1 %166, i1 false
br i1 %167, label %13, label %168, !llvm.loop !25
168: ; preds = %161, %13, %1
%169 = getelementptr inbounds i8, ptr %0, i64 20
%170 = load i32, ptr %169, align 4, !tbaa !26
%171 = load i32, ptr @ready_link, align 4, !tbaa !6
%172 = tail call i32 @ISC_LIST_APPENDLIST(i32 noundef %170, i32 noundef undef, i32 noundef %171) #2
%173 = getelementptr inbounds i8, ptr %0, i64 16
%174 = load i32, ptr %173, align 8, !tbaa !27
%175 = load i32, ptr @ready_priority_link, align 4, !tbaa !6
%176 = tail call i32 @ISC_LIST_APPENDLIST(i32 noundef %174, i32 noundef undef, i32 noundef %175) #2
%177 = tail call i64 @empty_readyq(ptr noundef %0) #2
%178 = icmp eq i64 %177, 0
br i1 %178, label %182, label %179
179: ; preds = %168
%180 = load ptr, ptr @isc_taskmgrmode_normal, align 8, !tbaa !28
%181 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %180, ptr %181, align 8, !tbaa !29
br label %182
182: ; preds = %179, %168
%183 = tail call i32 @UNLOCK(ptr noundef nonnull %6) #2
ret void
}
declare i32 @REQUIRE(i32 noundef) local_unnamed_addr #1
declare i32 @VALID_MANAGER(ptr noundef) local_unnamed_addr #1
declare i32 @ISC_LIST_INIT(i32 noundef) local_unnamed_addr #1
declare i32 @LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @FINISHED(ptr noundef) local_unnamed_addr #1
declare i64 @empty_readyq(ptr noundef) local_unnamed_addr #1
declare i32 @XTHREADTRACE(i32 noundef) local_unnamed_addr #1
declare i32 @isc_msgcat_get(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @pop_readyq(ptr noundef) local_unnamed_addr #1
declare i32 @INSIST(i32 noundef) local_unnamed_addr #1
declare i32 @VALID_TASK(ptr noundef) local_unnamed_addr #1
declare i32 @UNLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @XTRACE(i32 noundef) local_unnamed_addr #1
declare i32 @isc_stdtime_get(ptr noundef) local_unnamed_addr #1
declare i64 @EMPTY(i32 noundef) local_unnamed_addr #1
declare ptr @HEAD(i32 noundef) local_unnamed_addr #1
declare i32 @DEQUEUE(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @TASK_SHUTTINGDOWN(ptr noundef) local_unnamed_addr #1
declare i64 @task_shutdown(ptr noundef) local_unnamed_addr #1
declare i32 @task_finished(ptr noundef) local_unnamed_addr #1
declare i32 @ENQUEUE(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ISC_LIST_APPENDLIST(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_21__", !7, i64 0, !7, i64 4, !14, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !11, i64 32, !7, i64 40, !11, i64 48}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_22__", !11, i64 0, !11, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32}
!17 = !{!16, !7, i64 28}
!18 = !{!19, !14, i64 0}
!19 = !{!"TYPE_20__", !14, i64 0}
!20 = !{!16, !11, i64 8}
!21 = !{!16, !7, i64 16}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!16, !7, i64 20}
!25 = distinct !{!25, !23}
!26 = !{!13, !7, i64 20}
!27 = !{!13, !7, i64 16}
!28 = !{!14, !14, i64 0}
!29 = !{!13, !14, i64 8}
| freebsd_contrib_ntp_lib_isc_extr_task.c_dispatch |
; ModuleID = 'AnghaBench/vim.js/src/extr_hardcopy.c_prt_use_number.c'
source_filename = "AnghaBench/vim.js/src/extr_hardcopy.c_prt_use_number.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr, i64 }
@printer_opts = dso_local local_unnamed_addr global ptr null, align 8
@OPT_PRINT_NUMBER = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @prt_use_number() local_unnamed_addr #0 {
%1 = load ptr, ptr @printer_opts, align 8, !tbaa !5
%2 = load i64, ptr @OPT_PRINT_NUMBER, align 8, !tbaa !9
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 %2, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !11
%5 = icmp eq i64 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %0
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 %2
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = tail call signext i8 @TOLOWER_ASC(i32 noundef %9) #2
%11 = icmp eq i8 %10, 121
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %6, %0
%14 = phi i32 [ 0, %0 ], [ %12, %6 ]
ret i32 %14
}
declare signext i8 @TOLOWER_ASC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"TYPE_2__", !6, i64 0, !10, i64 8}
!13 = !{!12, !6, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/vim.js/src/extr_hardcopy.c_prt_use_number.c'
source_filename = "AnghaBench/vim.js/src/extr_hardcopy.c_prt_use_number.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr, i64 }
@printer_opts = common local_unnamed_addr global ptr null, align 8
@OPT_PRINT_NUMBER = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @prt_use_number() local_unnamed_addr #0 {
%1 = load ptr, ptr @printer_opts, align 8, !tbaa !6
%2 = load i64, ptr @OPT_PRINT_NUMBER, align 8, !tbaa !10
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 %2
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = icmp eq i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %0
%8 = load ptr, ptr %3, align 8, !tbaa !14
%9 = load i32, ptr %8, align 4, !tbaa !15
%10 = tail call signext i8 @TOLOWER_ASC(i32 noundef %9) #2
%11 = icmp eq i8 %10, 121
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %7, %0
%14 = phi i32 [ 0, %0 ], [ %12, %7 ]
ret i32 %14
}
declare signext i8 @TOLOWER_ASC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"TYPE_2__", !7, i64 0, !11, i64 8}
!14 = !{!13, !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !8, i64 0}
| vim.js_src_extr_hardcopy.c_prt_use_number |
; ModuleID = 'AnghaBench/linux/drivers/dma/extr_sun6i-dma.c_sun6i_dma_prep_dma_cyclic.c'
source_filename = "AnghaBench/linux/drivers/dma/extr_sun6i-dma.c_sun6i_dma_prep_dma_cyclic.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sun6i_vchan = type { i32, i32, i32, %struct.dma_slave_config }
%struct.dma_slave_config = type { ptr, ptr }
%struct.sun6i_dma_dev = type { i32, ptr, %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
%struct.sun6i_dma_lli = type { i64, ptr, i32, ptr, ptr, ptr, i32 }
%struct.TYPE_4__ = type { ptr, ptr }
%struct.sun6i_desc = type { ptr, i32, i32 }
@.str = private unnamed_addr constant [27 x i8] c"Invalid DMA configuration\0A\00", align 1
@GFP_NOWAIT = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [28 x i8] c"Failed to alloc lli memory\0A\00", align 1
@NORMAL_WAIT = dso_local local_unnamed_addr global i32 0, align 4
@DMA_MEM_TO_DEV = dso_local local_unnamed_addr global i32 0, align 4
@DRQ_SDRAM = dso_local local_unnamed_addr global i32 0, align 4
@LINEAR_MODE = dso_local local_unnamed_addr global i32 0, align 4
@IO_MODE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sun6i_dma_prep_dma_cyclic], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @sun6i_dma_prep_dma_cyclic(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %4, i64 noundef %5) #0 {
%7 = alloca ptr, align 8
%8 = alloca ptr, align 8
%9 = load i32, ptr %0, align 4, !tbaa !5
%10 = tail call ptr @to_sun6i_dma_dev(i32 noundef %9) #4
%11 = tail call ptr @to_sun6i_vchan(ptr noundef nonnull %0) #4
%12 = getelementptr inbounds %struct.sun6i_vchan, ptr %11, i64 0, i32 3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #4
%13 = udiv i64 %2, %3
%14 = call i32 @set_config(ptr noundef %10, ptr noundef nonnull %12, i32 noundef %4, ptr noundef nonnull %8) #4
%15 = icmp eq i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %6
%17 = call i32 @chan2dev(ptr noundef nonnull %0) #4
%18 = call i32 @dev_err(i32 noundef %17, ptr noundef nonnull @.str) #4
br label %103
19: ; preds = %6
%20 = load i32, ptr @GFP_NOWAIT, align 4, !tbaa !10
%21 = call ptr @kzalloc(i32 noundef 16, i32 noundef %20) #4
%22 = icmp eq ptr %21, null
br i1 %22, label %103, label %23
23: ; preds = %19
%24 = and i64 %13, 4294967295
%25 = icmp ne i64 %24, 0
call void @llvm.assume(i1 %25)
%26 = getelementptr inbounds %struct.sun6i_dma_dev, ptr %10, i64 0, i32 1
%27 = getelementptr inbounds %struct.sun6i_vchan, ptr %11, i64 0, i32 2
%28 = getelementptr inbounds %struct.sun6i_vchan, ptr %11, i64 0, i32 3, i32 1
%29 = and i64 %13, 4294967295
br label %30
30: ; preds = %23, %74
%31 = phi i64 [ 0, %23 ], [ %84, %74 ]
%32 = phi ptr [ null, %23 ], [ %83, %74 ]
%33 = load i32, ptr %10, align 8, !tbaa !11
%34 = load i32, ptr @GFP_NOWAIT, align 4, !tbaa !10
%35 = call ptr @dma_pool_alloc(i32 noundef %33, i32 noundef %34, ptr noundef nonnull %7) #4
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %43
37: ; preds = %30
%38 = getelementptr inbounds %struct.sun6i_dma_dev, ptr %10, i64 0, i32 2
%39 = load i32, ptr %38, align 8, !tbaa !15
%40 = call i32 @dev_err(i32 noundef %39, ptr noundef nonnull @.str.1) #4
%41 = load ptr, ptr %21, align 8, !tbaa !16
%42 = icmp eq ptr %41, null
br i1 %42, label %101, label %93
43: ; preds = %30
store i64 %3, ptr %35, align 8, !tbaa !17
%44 = load i32, ptr @NORMAL_WAIT, align 4, !tbaa !10
%45 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %35, i64 0, i32 6
store i32 %44, ptr %45, align 8, !tbaa !20
%46 = load i32, ptr @DMA_MEM_TO_DEV, align 4, !tbaa !10
%47 = icmp eq i32 %46, %4
%48 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %35, i64 0, i32 4
%49 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %35, i64 0, i32 3
br i1 %47, label %50, label %62
50: ; preds = %43
%51 = mul i64 %31, %3
%52 = getelementptr inbounds i8, ptr %1, i64 %51
%53 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %35, i64 0, i32 5
store ptr %52, ptr %53, align 8, !tbaa !21
%54 = load ptr, ptr %28, align 8, !tbaa !22
store ptr %54, ptr %48, align 8, !tbaa !24
%55 = load ptr, ptr %8, align 8, !tbaa !16
store ptr %55, ptr %49, align 8, !tbaa !25
%56 = load ptr, ptr %26, align 8, !tbaa !26
%57 = getelementptr inbounds %struct.TYPE_4__, ptr %56, i64 0, i32 1
%58 = load ptr, ptr %57, align 8, !tbaa !27
%59 = load i32, ptr @DRQ_SDRAM, align 4, !tbaa !10
%60 = load i32, ptr %27, align 8, !tbaa !29
%61 = call i32 %58(ptr noundef nonnull %49, i32 noundef %59, i32 noundef %60) #4
br label %74
62: ; preds = %43
%63 = load ptr, ptr %12, align 8, !tbaa !31
%64 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %35, i64 0, i32 5
store ptr %63, ptr %64, align 8, !tbaa !21
%65 = mul i64 %31, %3
%66 = getelementptr inbounds i8, ptr %1, i64 %65
store ptr %66, ptr %48, align 8, !tbaa !24
%67 = load ptr, ptr %8, align 8, !tbaa !16
store ptr %67, ptr %49, align 8, !tbaa !25
%68 = load ptr, ptr %26, align 8, !tbaa !26
%69 = getelementptr inbounds %struct.TYPE_4__, ptr %68, i64 0, i32 1
%70 = load ptr, ptr %69, align 8, !tbaa !27
%71 = load i32, ptr %27, align 8, !tbaa !29
%72 = load i32, ptr @DRQ_SDRAM, align 4, !tbaa !10
%73 = call i32 %70(ptr noundef nonnull %49, i32 noundef %71, i32 noundef %72) #4
br label %74
74: ; preds = %62, %50
%75 = phi ptr [ @IO_MODE, %62 ], [ @LINEAR_MODE, %50 ]
%76 = phi ptr [ @LINEAR_MODE, %62 ], [ @IO_MODE, %50 ]
%77 = load ptr, ptr %26, align 8, !tbaa !26
%78 = load ptr, ptr %77, align 8, !tbaa !32
%79 = load i32, ptr %75, align 4, !tbaa !10
%80 = load i32, ptr %76, align 4, !tbaa !10
%81 = call i32 %78(ptr noundef nonnull %49, i32 noundef %79, i32 noundef %80) #4
%82 = load ptr, ptr %7, align 8, !tbaa !16
%83 = call ptr @sun6i_dma_lli_add(ptr noundef %32, ptr noundef nonnull %35, ptr noundef %82, ptr noundef nonnull %21) #4
%84 = add nuw nsw i64 %31, 1
%85 = icmp ult i64 %84, %29
br i1 %85, label %30, label %86, !llvm.loop !33
86: ; preds = %74
%87 = getelementptr inbounds %struct.sun6i_desc, ptr %21, i64 0, i32 2
%88 = load i32, ptr %87, align 4, !tbaa !35
%89 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %83, i64 0, i32 2
store i32 %88, ptr %89, align 8, !tbaa !37
store i32 1, ptr %11, align 8, !tbaa !38
%90 = getelementptr inbounds %struct.sun6i_vchan, ptr %11, i64 0, i32 1
%91 = getelementptr inbounds %struct.sun6i_desc, ptr %21, i64 0, i32 1
%92 = call ptr @vchan_tx_prep(ptr noundef nonnull %90, ptr noundef nonnull %91, i64 noundef %5) #4
br label %103
93: ; preds = %37, %93
%94 = phi ptr [ %99, %93 ], [ %41, %37 ]
%95 = load i32, ptr %10, align 8, !tbaa !11
%96 = call i32 @virt_to_phys(ptr noundef nonnull %94) #4
%97 = call i32 @dma_pool_free(i32 noundef %95, ptr noundef nonnull %94, i32 noundef %96) #4
%98 = getelementptr inbounds %struct.sun6i_dma_lli, ptr %94, i64 0, i32 1
%99 = load ptr, ptr %98, align 8, !tbaa !16
%100 = icmp eq ptr %99, null
br i1 %100, label %101, label %93, !llvm.loop !39
101: ; preds = %93, %37
%102 = call i32 @kfree(ptr noundef nonnull %21) #4
br label %103
103: ; preds = %19, %101, %86, %16
%104 = phi ptr [ null, %16 ], [ null, %101 ], [ %92, %86 ], [ null, %19 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
ret ptr %104
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_sun6i_dma_dev(i32 noundef) local_unnamed_addr #2
declare ptr @to_sun6i_vchan(ptr noundef) local_unnamed_addr #2
declare i32 @set_config(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @chan2dev(ptr noundef) local_unnamed_addr #2
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @dma_pool_alloc(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @sun6i_dma_lli_add(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @vchan_tx_prep(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @dma_pool_free(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @virt_to_phys(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dma_chan", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"sun6i_dma_dev", !7, i64 0, !13, i64 8, !14, i64 16}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_3__", !7, i64 0}
!15 = !{!12, !7, i64 16}
!16 = !{!13, !13, i64 0}
!17 = !{!18, !19, i64 0}
!18 = !{!"sun6i_dma_lli", !19, i64 0, !13, i64 8, !7, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !7, i64 48}
!19 = !{!"long", !8, i64 0}
!20 = !{!18, !7, i64 48}
!21 = !{!18, !13, i64 40}
!22 = !{!23, !13, i64 8}
!23 = !{!"dma_slave_config", !13, i64 0, !13, i64 8}
!24 = !{!18, !13, i64 32}
!25 = !{!18, !13, i64 24}
!26 = !{!12, !13, i64 8}
!27 = !{!28, !13, i64 8}
!28 = !{!"TYPE_4__", !13, i64 0, !13, i64 8}
!29 = !{!30, !7, i64 8}
!30 = !{!"sun6i_vchan", !7, i64 0, !7, i64 4, !7, i64 8, !23, i64 16}
!31 = !{!23, !13, i64 0}
!32 = !{!28, !13, i64 0}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = !{!36, !7, i64 12}
!36 = !{!"sun6i_desc", !13, i64 0, !7, i64 8, !7, i64 12}
!37 = !{!18, !7, i64 16}
!38 = !{!30, !7, i64 0}
!39 = distinct !{!39, !34}
| ; ModuleID = 'AnghaBench/linux/drivers/dma/extr_sun6i-dma.c_sun6i_dma_prep_dma_cyclic.c'
source_filename = "AnghaBench/linux/drivers/dma/extr_sun6i-dma.c_sun6i_dma_prep_dma_cyclic.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [27 x i8] c"Invalid DMA configuration\0A\00", align 1
@GFP_NOWAIT = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [28 x i8] c"Failed to alloc lli memory\0A\00", align 1
@NORMAL_WAIT = common local_unnamed_addr global i32 0, align 4
@DMA_MEM_TO_DEV = common local_unnamed_addr global i32 0, align 4
@DRQ_SDRAM = common local_unnamed_addr global i32 0, align 4
@LINEAR_MODE = common local_unnamed_addr global i32 0, align 4
@IO_MODE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sun6i_dma_prep_dma_cyclic], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @sun6i_dma_prep_dma_cyclic(ptr noundef %0, ptr noundef %1, i64 noundef %2, i64 noundef %3, i32 noundef %4, i64 noundef %5) #0 {
%7 = alloca ptr, align 8
%8 = alloca ptr, align 8
%9 = load i32, ptr %0, align 4, !tbaa !6
%10 = tail call ptr @to_sun6i_dma_dev(i32 noundef %9) #4
%11 = tail call ptr @to_sun6i_vchan(ptr noundef nonnull %0) #4
%12 = getelementptr inbounds i8, ptr %11, i64 16
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #4
%13 = udiv i64 %2, %3
%14 = call i32 @set_config(ptr noundef %10, ptr noundef nonnull %12, i32 noundef %4, ptr noundef nonnull %8) #4
%15 = icmp eq i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %6
%17 = call i32 @chan2dev(ptr noundef nonnull %0) #4
%18 = call i32 @dev_err(i32 noundef %17, ptr noundef nonnull @.str) #4
br label %102
19: ; preds = %6
%20 = load i32, ptr @GFP_NOWAIT, align 4, !tbaa !11
%21 = call ptr @kzalloc(i32 noundef 16, i32 noundef %20) #4
%22 = icmp eq ptr %21, null
br i1 %22, label %102, label %23
23: ; preds = %19
%24 = and i64 %13, 4294967295
%25 = icmp ne i64 %24, 0
call void @llvm.assume(i1 %25)
%26 = getelementptr inbounds i8, ptr %10, i64 8
%27 = getelementptr inbounds i8, ptr %11, i64 8
%28 = getelementptr inbounds i8, ptr %11, i64 24
br label %29
29: ; preds = %23, %73
%30 = phi i64 [ 0, %23 ], [ %83, %73 ]
%31 = phi ptr [ null, %23 ], [ %82, %73 ]
%32 = load i32, ptr %10, align 8, !tbaa !12
%33 = load i32, ptr @GFP_NOWAIT, align 4, !tbaa !11
%34 = call ptr @dma_pool_alloc(i32 noundef %32, i32 noundef %33, ptr noundef nonnull %7) #4
%35 = icmp eq ptr %34, null
br i1 %35, label %36, label %42
36: ; preds = %29
%37 = getelementptr inbounds i8, ptr %10, i64 16
%38 = load i32, ptr %37, align 8, !tbaa !16
%39 = call i32 @dev_err(i32 noundef %38, ptr noundef nonnull @.str.1) #4
%40 = load ptr, ptr %21, align 8, !tbaa !17
%41 = icmp eq ptr %40, null
br i1 %41, label %100, label %92
42: ; preds = %29
store i64 %3, ptr %34, align 8, !tbaa !18
%43 = load i32, ptr @NORMAL_WAIT, align 4, !tbaa !11
%44 = getelementptr inbounds i8, ptr %34, i64 48
store i32 %43, ptr %44, align 8, !tbaa !21
%45 = load i32, ptr @DMA_MEM_TO_DEV, align 4, !tbaa !11
%46 = icmp eq i32 %45, %4
%47 = getelementptr inbounds i8, ptr %34, i64 32
%48 = getelementptr inbounds i8, ptr %34, i64 24
br i1 %46, label %49, label %61
49: ; preds = %42
%50 = mul i64 %30, %3
%51 = getelementptr inbounds i8, ptr %1, i64 %50
%52 = getelementptr inbounds i8, ptr %34, i64 40
store ptr %51, ptr %52, align 8, !tbaa !22
%53 = load ptr, ptr %28, align 8, !tbaa !23
store ptr %53, ptr %47, align 8, !tbaa !25
%54 = load ptr, ptr %8, align 8, !tbaa !17
store ptr %54, ptr %48, align 8, !tbaa !26
%55 = load ptr, ptr %26, align 8, !tbaa !27
%56 = getelementptr inbounds i8, ptr %55, i64 8
%57 = load ptr, ptr %56, align 8, !tbaa !28
%58 = load i32, ptr @DRQ_SDRAM, align 4, !tbaa !11
%59 = load i32, ptr %27, align 8, !tbaa !30
%60 = call i32 %57(ptr noundef nonnull %48, i32 noundef %58, i32 noundef %59) #4
br label %73
61: ; preds = %42
%62 = load ptr, ptr %12, align 8, !tbaa !32
%63 = getelementptr inbounds i8, ptr %34, i64 40
store ptr %62, ptr %63, align 8, !tbaa !22
%64 = mul i64 %30, %3
%65 = getelementptr inbounds i8, ptr %1, i64 %64
store ptr %65, ptr %47, align 8, !tbaa !25
%66 = load ptr, ptr %8, align 8, !tbaa !17
store ptr %66, ptr %48, align 8, !tbaa !26
%67 = load ptr, ptr %26, align 8, !tbaa !27
%68 = getelementptr inbounds i8, ptr %67, i64 8
%69 = load ptr, ptr %68, align 8, !tbaa !28
%70 = load i32, ptr %27, align 8, !tbaa !30
%71 = load i32, ptr @DRQ_SDRAM, align 4, !tbaa !11
%72 = call i32 %69(ptr noundef nonnull %48, i32 noundef %70, i32 noundef %71) #4
br label %73
73: ; preds = %61, %49
%74 = phi ptr [ @IO_MODE, %61 ], [ @LINEAR_MODE, %49 ]
%75 = phi ptr [ @LINEAR_MODE, %61 ], [ @IO_MODE, %49 ]
%76 = load ptr, ptr %26, align 8, !tbaa !27
%77 = load ptr, ptr %76, align 8, !tbaa !33
%78 = load i32, ptr %74, align 4, !tbaa !11
%79 = load i32, ptr %75, align 4, !tbaa !11
%80 = call i32 %77(ptr noundef nonnull %48, i32 noundef %78, i32 noundef %79) #4
%81 = load ptr, ptr %7, align 8, !tbaa !17
%82 = call ptr @sun6i_dma_lli_add(ptr noundef %31, ptr noundef nonnull %34, ptr noundef %81, ptr noundef nonnull %21) #4
%83 = add nuw nsw i64 %30, 1
%84 = icmp ult i64 %83, %24
br i1 %84, label %29, label %85, !llvm.loop !34
85: ; preds = %73
%86 = getelementptr inbounds i8, ptr %21, i64 12
%87 = load i32, ptr %86, align 4, !tbaa !36
%88 = getelementptr inbounds i8, ptr %82, i64 16
store i32 %87, ptr %88, align 8, !tbaa !38
store i32 1, ptr %11, align 8, !tbaa !39
%89 = getelementptr inbounds i8, ptr %11, i64 4
%90 = getelementptr inbounds i8, ptr %21, i64 8
%91 = call ptr @vchan_tx_prep(ptr noundef nonnull %89, ptr noundef nonnull %90, i64 noundef %5) #4
br label %102
92: ; preds = %36, %92
%93 = phi ptr [ %98, %92 ], [ %40, %36 ]
%94 = load i32, ptr %10, align 8, !tbaa !12
%95 = call i32 @virt_to_phys(ptr noundef nonnull %93) #4
%96 = call i32 @dma_pool_free(i32 noundef %94, ptr noundef nonnull %93, i32 noundef %95) #4
%97 = getelementptr inbounds i8, ptr %93, i64 8
%98 = load ptr, ptr %97, align 8, !tbaa !17
%99 = icmp eq ptr %98, null
br i1 %99, label %100, label %92, !llvm.loop !40
100: ; preds = %92, %36
%101 = call i32 @kfree(ptr noundef nonnull %21) #4
br label %102
102: ; preds = %19, %100, %85, %16
%103 = phi ptr [ null, %16 ], [ null, %100 ], [ %91, %85 ], [ null, %19 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
ret ptr %103
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_sun6i_dma_dev(i32 noundef) local_unnamed_addr #2
declare ptr @to_sun6i_vchan(ptr noundef) local_unnamed_addr #2
declare i32 @set_config(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @chan2dev(ptr noundef) local_unnamed_addr #2
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @dma_pool_alloc(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @sun6i_dma_lli_add(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @vchan_tx_prep(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @dma_pool_free(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @virt_to_phys(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dma_chan", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"sun6i_dma_dev", !8, i64 0, !14, i64 8, !15, i64 16}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!"TYPE_3__", !8, i64 0}
!16 = !{!13, !8, i64 16}
!17 = !{!14, !14, i64 0}
!18 = !{!19, !20, i64 0}
!19 = !{!"sun6i_dma_lli", !20, i64 0, !14, i64 8, !8, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !8, i64 48}
!20 = !{!"long", !9, i64 0}
!21 = !{!19, !8, i64 48}
!22 = !{!19, !14, i64 40}
!23 = !{!24, !14, i64 8}
!24 = !{!"dma_slave_config", !14, i64 0, !14, i64 8}
!25 = !{!19, !14, i64 32}
!26 = !{!19, !14, i64 24}
!27 = !{!13, !14, i64 8}
!28 = !{!29, !14, i64 8}
!29 = !{!"TYPE_4__", !14, i64 0, !14, i64 8}
!30 = !{!31, !8, i64 8}
!31 = !{!"sun6i_vchan", !8, i64 0, !8, i64 4, !8, i64 8, !24, i64 16}
!32 = !{!24, !14, i64 0}
!33 = !{!29, !14, i64 0}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = !{!37, !8, i64 12}
!37 = !{!"sun6i_desc", !14, i64 0, !8, i64 8, !8, i64 12}
!38 = !{!19, !8, i64 16}
!39 = !{!31, !8, i64 0}
!40 = distinct !{!40, !35}
| linux_drivers_dma_extr_sun6i-dma.c_sun6i_dma_prep_dma_cyclic |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine_pm.h_intel_engine_pm_get_if_awake.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine_pm.h_intel_engine_pm_get_if_awake.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_engine_pm_get_if_awake], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @intel_engine_pm_get_if_awake(ptr noundef %0) #0 {
%2 = tail call i32 @intel_wakeref_get_if_active(ptr noundef %0) #2
ret i32 %2
}
declare i32 @intel_wakeref_get_if_active(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine_pm.h_intel_engine_pm_get_if_awake.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine_pm.h_intel_engine_pm_get_if_awake.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @intel_engine_pm_get_if_awake], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @intel_engine_pm_get_if_awake(ptr noundef %0) #0 {
%2 = tail call i32 @intel_wakeref_get_if_active(ptr noundef %0) #2
ret i32 %2
}
declare i32 @intel_wakeref_get_if_active(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_i915_gt_extr_intel_engine_pm.h_intel_engine_pm_get_if_awake |
; ModuleID = 'AnghaBench/esp-idf/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/extr_bt_app_av.c_volume_change_simulation.c'
source_filename = "AnghaBench/esp-idf/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/extr_bt_app_av.c_volume_change_simulation.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BT_RC_TG_TAG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"start volume change simulation\00", align 1
@portTICK_RATE_MS = dso_local local_unnamed_addr global i32 0, align 4
@s_volume = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @volume_change_simulation], section "llvm.metadata"
; Function Attrs: noreturn nounwind uwtable
define internal void @volume_change_simulation(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @BT_RC_TG_TAG, align 4, !tbaa !5
%3 = tail call i32 @ESP_LOGI(i32 noundef %2, ptr noundef nonnull @.str) #2
br label %4
4: ; preds = %4, %1
%5 = load i32, ptr @portTICK_RATE_MS, align 4, !tbaa !5
%6 = sdiv i32 10000, %5
%7 = tail call i32 @vTaskDelay(i32 noundef %6) #2
%8 = load i32, ptr @s_volume, align 4, !tbaa !5
%9 = add nsw i32 %8, 5
%10 = and i32 %9, 127
%11 = tail call i32 @volume_set_by_local_host(i32 noundef %10) #2
br label %4
}
declare i32 @ESP_LOGI(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vTaskDelay(i32 noundef) local_unnamed_addr #1
declare i32 @volume_set_by_local_host(i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/esp-idf/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/extr_bt_app_av.c_volume_change_simulation.c'
source_filename = "AnghaBench/esp-idf/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/extr_bt_app_av.c_volume_change_simulation.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BT_RC_TG_TAG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"start volume change simulation\00", align 1
@portTICK_RATE_MS = common local_unnamed_addr global i32 0, align 4
@s_volume = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @volume_change_simulation], section "llvm.metadata"
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define internal void @volume_change_simulation(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @BT_RC_TG_TAG, align 4, !tbaa !6
%3 = tail call i32 @ESP_LOGI(i32 noundef %2, ptr noundef nonnull @.str) #2
br label %4
4: ; preds = %4, %1
%5 = load i32, ptr @portTICK_RATE_MS, align 4, !tbaa !6
%6 = sdiv i32 10000, %5
%7 = tail call i32 @vTaskDelay(i32 noundef %6) #2
%8 = load i32, ptr @s_volume, align 4, !tbaa !6
%9 = add nsw i32 %8, 5
%10 = and i32 %9, 127
%11 = tail call i32 @volume_set_by_local_host(i32 noundef %10) #2
br label %4
}
declare i32 @ESP_LOGI(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vTaskDelay(i32 noundef) local_unnamed_addr #1
declare i32 @volume_set_by_local_host(i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| esp-idf_examples_bluetooth_bluedroid_classic_bt_a2dp_sink_main_extr_bt_app_av.c_volume_change_simulation |
; ModuleID = 'AnghaBench/linux/arch/sh/kernel/cpu/sh4a/extr_clock-sh7780.c_module_clk_recalc.c'
source_filename = "AnghaBench/linux/arch/sh/kernel/cpu/sh4a/extr_clock-sh7780.c_module_clk_recalc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FRQCR = dso_local local_unnamed_addr global i32 0, align 4
@pfc_divisors = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @module_clk_recalc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @module_clk_recalc(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @FRQCR, align 4, !tbaa !5
%3 = tail call i32 @__raw_readl(i32 noundef %2) #2
%4 = and i32 %3, 3
%5 = load ptr, ptr %0, align 8, !tbaa !9
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = load ptr, ptr @pfc_divisors, align 8, !tbaa !15
%8 = zext nneg i32 %4 to i64
%9 = getelementptr inbounds i64, ptr %7, i64 %8
%10 = load i64, ptr %9, align 8, !tbaa !16
%11 = udiv i64 %6, %10
ret i64 %11
}
declare i32 @__raw_readl(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"clk", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!14, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/sh/kernel/cpu/sh4a/extr_clock-sh7780.c_module_clk_recalc.c'
source_filename = "AnghaBench/linux/arch/sh/kernel/cpu/sh4a/extr_clock-sh7780.c_module_clk_recalc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FRQCR = common local_unnamed_addr global i32 0, align 4
@pfc_divisors = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @module_clk_recalc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @module_clk_recalc(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @FRQCR, align 4, !tbaa !6
%3 = tail call i32 @__raw_readl(i32 noundef %2) #2
%4 = and i32 %3, 3
%5 = load ptr, ptr %0, align 8, !tbaa !10
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = load ptr, ptr @pfc_divisors, align 8, !tbaa !16
%8 = zext nneg i32 %4 to i64
%9 = getelementptr inbounds i64, ptr %7, i64 %8
%10 = load i64, ptr %9, align 8, !tbaa !17
%11 = udiv i64 %6, %10
ret i64 %11
}
declare i32 @__raw_readl(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"clk", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_2__", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!15, !15, i64 0}
| linux_arch_sh_kernel_cpu_sh4a_extr_clock-sh7780.c_module_clk_recalc |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_svc.c_hal_fcxp_rx_plog.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_svc.c_hal_fcxp_rx_plog.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bfi_fcxp_send_rsp_s = type { i64, i32 }
@BFA_PL_MID_HAL_FCXP = dso_local local_unnamed_addr global i32 0, align 4
@BFA_PL_EID_RX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hal_fcxp_rx_plog], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @hal_fcxp_rx_plog(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i64, ptr %2, align 8, !tbaa !5
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %27
6: ; preds = %3
%7 = load i64, ptr %1, align 8, !tbaa !11
%8 = icmp eq i64 %7, 0
br i1 %8, label %20, label %9
9: ; preds = %6
%10 = tail call i64 @BFA_FCXP_RSP_PLD(ptr noundef nonnull %1) #2
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = load i32, ptr %0, align 4, !tbaa !14
%14 = load i32, ptr @BFA_PL_MID_HAL_FCXP, align 4, !tbaa !13
%15 = load i32, ptr @BFA_PL_EID_RX, align 4, !tbaa !13
%16 = load i64, ptr %2, align 8, !tbaa !5
%17 = trunc i64 %16 to i32
%18 = getelementptr inbounds %struct.bfi_fcxp_send_rsp_s, ptr %2, i64 0, i32 1
%19 = tail call i32 @bfa_plog_fchdr_and_pl(i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %17, ptr noundef nonnull %18, i32 noundef %12) #2
br label %34
20: ; preds = %6
%21 = load i32, ptr %0, align 4, !tbaa !14
%22 = load i32, ptr @BFA_PL_MID_HAL_FCXP, align 4, !tbaa !13
%23 = load i32, ptr @BFA_PL_EID_RX, align 4, !tbaa !13
%24 = trunc i64 %4 to i32
%25 = getelementptr inbounds %struct.bfi_fcxp_send_rsp_s, ptr %2, i64 0, i32 1
%26 = tail call i32 @bfa_plog_fchdr(i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, ptr noundef nonnull %25) #2
br label %34
27: ; preds = %3
%28 = load i32, ptr %0, align 4, !tbaa !14
%29 = load i32, ptr @BFA_PL_MID_HAL_FCXP, align 4, !tbaa !13
%30 = load i32, ptr @BFA_PL_EID_RX, align 4, !tbaa !13
%31 = trunc i64 %4 to i32
%32 = getelementptr inbounds %struct.bfi_fcxp_send_rsp_s, ptr %2, i64 0, i32 1
%33 = tail call i32 @bfa_plog_fchdr(i32 noundef %28, i32 noundef %29, i32 noundef %30, i32 noundef %31, ptr noundef nonnull %32) #2
br label %34
34: ; preds = %9, %20, %27
ret void
}
declare i64 @BFA_FCXP_RSP_PLD(ptr noundef) local_unnamed_addr #1
declare i32 @bfa_plog_fchdr_and_pl(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bfa_plog_fchdr(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bfi_fcxp_send_rsp_s", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"bfa_fcxp_s", !7, i64 0}
!13 = !{!10, !10, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"bfa_s", !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_svc.c_hal_fcxp_rx_plog.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_svc.c_hal_fcxp_rx_plog.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BFA_PL_MID_HAL_FCXP = common local_unnamed_addr global i32 0, align 4
@BFA_PL_EID_RX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hal_fcxp_rx_plog], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @hal_fcxp_rx_plog(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i64, ptr %2, align 8, !tbaa !6
%5 = icmp sgt i64 %4, 0
br i1 %5, label %6, label %27
6: ; preds = %3
%7 = load i64, ptr %1, align 8, !tbaa !12
%8 = icmp eq i64 %7, 0
br i1 %8, label %20, label %9
9: ; preds = %6
%10 = tail call i64 @BFA_FCXP_RSP_PLD(ptr noundef nonnull %1) #2
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = load i32, ptr %0, align 4, !tbaa !15
%14 = load i32, ptr @BFA_PL_MID_HAL_FCXP, align 4, !tbaa !14
%15 = load i32, ptr @BFA_PL_EID_RX, align 4, !tbaa !14
%16 = load i64, ptr %2, align 8, !tbaa !6
%17 = trunc i64 %16 to i32
%18 = getelementptr inbounds i8, ptr %2, i64 8
%19 = tail call i32 @bfa_plog_fchdr_and_pl(i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %17, ptr noundef nonnull %18, i32 noundef %12) #2
br label %34
20: ; preds = %6
%21 = load i32, ptr %0, align 4, !tbaa !15
%22 = load i32, ptr @BFA_PL_MID_HAL_FCXP, align 4, !tbaa !14
%23 = load i32, ptr @BFA_PL_EID_RX, align 4, !tbaa !14
%24 = trunc i64 %4 to i32
%25 = getelementptr inbounds i8, ptr %2, i64 8
%26 = tail call i32 @bfa_plog_fchdr(i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, ptr noundef nonnull %25) #2
br label %34
27: ; preds = %3
%28 = load i32, ptr %0, align 4, !tbaa !15
%29 = load i32, ptr @BFA_PL_MID_HAL_FCXP, align 4, !tbaa !14
%30 = load i32, ptr @BFA_PL_EID_RX, align 4, !tbaa !14
%31 = trunc i64 %4 to i32
%32 = getelementptr inbounds i8, ptr %2, i64 8
%33 = tail call i32 @bfa_plog_fchdr(i32 noundef %28, i32 noundef %29, i32 noundef %30, i32 noundef %31, ptr noundef nonnull %32) #2
br label %34
34: ; preds = %9, %20, %27
ret void
}
declare i64 @BFA_FCXP_RSP_PLD(ptr noundef) local_unnamed_addr #1
declare i32 @bfa_plog_fchdr_and_pl(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bfa_plog_fchdr(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bfi_fcxp_send_rsp_s", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"bfa_fcxp_s", !8, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"bfa_s", !11, i64 0}
| fastsocket_kernel_drivers_scsi_bfa_extr_bfa_svc.c_hal_fcxp_rx_plog |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce/extr_dce_link_encoder.c_dce110_psr_program_dp_dphy_fast_training.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce/extr_dce_link_encoder.c_dce110_psr_program_dp_dphy_fast_training.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DP_DPHY_FAST_TRAINING = dso_local local_unnamed_addr global i32 0, align 4
@DPHY_RX_FAST_TRAINING_CAPABLE = dso_local local_unnamed_addr global i32 0, align 4
@DP_DPHY_BS_SR_SWAP_CNTL = dso_local local_unnamed_addr global i32 0, align 4
@DPHY_LOAD_BS_COUNT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @dce110_psr_program_dp_dphy_fast_training(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @TO_DCE110_LINK_ENC(ptr noundef %0) #2
%4 = icmp eq i32 %1, 0
%5 = load i32, ptr @DP_DPHY_FAST_TRAINING, align 4, !tbaa !5
%6 = load i32, ptr @DPHY_RX_FAST_TRAINING_CAPABLE, align 4, !tbaa !5
br i1 %4, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @REG_UPDATE(i32 noundef %5, i32 noundef %6, i32 noundef 1) #2
br label %14
9: ; preds = %2
%10 = tail call i32 @REG_UPDATE(i32 noundef %5, i32 noundef %6, i32 noundef 0) #2
%11 = load i32, ptr @DP_DPHY_BS_SR_SWAP_CNTL, align 4, !tbaa !5
%12 = load i32, ptr @DPHY_LOAD_BS_COUNT, align 4, !tbaa !5
%13 = tail call i32 @REG_UPDATE(i32 noundef %11, i32 noundef %12, i32 noundef 5) #2
br label %14
14: ; preds = %9, %7
ret void
}
declare ptr @TO_DCE110_LINK_ENC(ptr noundef) local_unnamed_addr #1
declare i32 @REG_UPDATE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce/extr_dce_link_encoder.c_dce110_psr_program_dp_dphy_fast_training.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce/extr_dce_link_encoder.c_dce110_psr_program_dp_dphy_fast_training.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DP_DPHY_FAST_TRAINING = common local_unnamed_addr global i32 0, align 4
@DPHY_RX_FAST_TRAINING_CAPABLE = common local_unnamed_addr global i32 0, align 4
@DP_DPHY_BS_SR_SWAP_CNTL = common local_unnamed_addr global i32 0, align 4
@DPHY_LOAD_BS_COUNT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @dce110_psr_program_dp_dphy_fast_training(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @TO_DCE110_LINK_ENC(ptr noundef %0) #2
%4 = icmp eq i32 %1, 0
%5 = load i32, ptr @DP_DPHY_FAST_TRAINING, align 4, !tbaa !6
%6 = load i32, ptr @DPHY_RX_FAST_TRAINING_CAPABLE, align 4, !tbaa !6
br i1 %4, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @REG_UPDATE(i32 noundef %5, i32 noundef %6, i32 noundef 1) #2
br label %14
9: ; preds = %2
%10 = tail call i32 @REG_UPDATE(i32 noundef %5, i32 noundef %6, i32 noundef 0) #2
%11 = load i32, ptr @DP_DPHY_BS_SR_SWAP_CNTL, align 4, !tbaa !6
%12 = load i32, ptr @DPHY_LOAD_BS_COUNT, align 4, !tbaa !6
%13 = tail call i32 @REG_UPDATE(i32 noundef %11, i32 noundef %12, i32 noundef 5) #2
br label %14
14: ; preds = %9, %7
ret void
}
declare ptr @TO_DCE110_LINK_ENC(ptr noundef) local_unnamed_addr #1
declare i32 @REG_UPDATE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_amd_display_dc_dce_extr_dce_link_encoder.c_dce110_psr_program_dp_dphy_fast_training |
; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_ov6650.c_ov6650_remove.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_ov6650.c_ov6650_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ov6650 = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @ov6650_remove], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ov6650_remove(ptr noundef %0) #0 {
%2 = tail call ptr @to_ov6650(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.ov6650, ptr %2, i64 0, i32 2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @v4l2_clk_put(i32 noundef %4) #2
%6 = getelementptr inbounds %struct.ov6650, ptr %2, i64 0, i32 1
%7 = tail call i32 @v4l2_async_unregister_subdev(ptr noundef nonnull %6) #2
%8 = tail call i32 @v4l2_ctrl_handler_free(ptr noundef %2) #2
ret i32 0
}
declare ptr @to_ov6650(ptr noundef) local_unnamed_addr #1
declare i32 @v4l2_clk_put(i32 noundef) local_unnamed_addr #1
declare i32 @v4l2_async_unregister_subdev(ptr noundef) local_unnamed_addr #1
declare i32 @v4l2_ctrl_handler_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"ov6650", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_ov6650.c_ov6650_remove.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_ov6650.c_ov6650_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ov6650_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ov6650_remove(ptr noundef %0) #0 {
%2 = tail call ptr @to_ov6650(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @v4l2_clk_put(i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %2, i64 4
%7 = tail call i32 @v4l2_async_unregister_subdev(ptr noundef nonnull %6) #2
%8 = tail call i32 @v4l2_ctrl_handler_free(ptr noundef %2) #2
ret i32 0
}
declare ptr @to_ov6650(ptr noundef) local_unnamed_addr #1
declare i32 @v4l2_clk_put(i32 noundef) local_unnamed_addr #1
declare i32 @v4l2_async_unregister_subdev(ptr noundef) local_unnamed_addr #1
declare i32 @v4l2_ctrl_handler_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"ov6650", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_media_i2c_extr_ov6650.c_ov6650_remove |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_eid_create.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_eid_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_branch__rev_bid_eid_create(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @apr_palloc(ptr noundef %3, i32 noundef 12) #2
%6 = tail call i32 @apr_pstrdup(ptr noundef %3, ptr noundef %1) #2
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 2
store i32 %6, ptr %7, align 4, !tbaa !5
store i32 %2, ptr %5, align 4, !tbaa !10
%8 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 1
store i32 %0, ptr %8, align 4, !tbaa !11
ret ptr %5
}
declare ptr @apr_palloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_eid_create.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_delta/extr_branch.c_svn_branch__rev_bid_eid_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_branch__rev_bid_eid_create(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @apr_palloc(ptr noundef %3, i32 noundef 12) #2
%6 = tail call i32 @apr_pstrdup(ptr noundef %3, ptr noundef %1) #2
%7 = getelementptr inbounds i8, ptr %5, i64 8
store i32 %6, ptr %7, align 4, !tbaa !6
store i32 %2, ptr %5, align 4, !tbaa !11
%8 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %0, ptr %8, align 4, !tbaa !12
ret ptr %5
}
declare ptr @apr_palloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!7, !8, i64 4}
| freebsd_contrib_subversion_subversion_libsvn_delta_extr_branch.c_svn_branch__rev_bid_eid_create |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/dlm/extr_lowcomms.c_cbuf_data.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/dlm/extr_lowcomms.c_cbuf_data.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cbuf = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @cbuf_data], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @cbuf_data(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.cbuf, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = add nsw i32 %4, %2
%6 = getelementptr inbounds %struct.cbuf, ptr %0, i64 0, i32 2
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = and i32 %5, %7
ret i32 %8
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cbuf", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/dlm/extr_lowcomms.c_cbuf_data.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/dlm/extr_lowcomms.c_cbuf_data.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cbuf_data], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @cbuf_data(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = add nsw i32 %4, %2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = and i32 %5, %7
ret i32 %8
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cbuf", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 8}
| fastsocket_kernel_fs_dlm_extr_lowcomms.c_cbuf_data |
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_auth2-pubkey.c_user_key_allowed2.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_auth2-pubkey.c_user_key_allowed2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@.str = private unnamed_addr constant [26 x i8] c"trying public key file %s\00", align 1
@options = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @user_key_allowed2], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @user_key_allowed2(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
%6 = icmp eq ptr %4, null
br i1 %6, label %8, label %7
7: ; preds = %5
store ptr null, ptr %4, align 8, !tbaa !5
br label %8
8: ; preds = %7, %5
%9 = tail call i32 @temporarily_use_uid(ptr noundef %1) #3
%10 = tail call i32 @debug(ptr noundef nonnull @.str, ptr noundef %3) #3
%11 = load i32, ptr @options, align 4, !tbaa !9
%12 = tail call ptr @auth_openkeyfile(ptr noundef %3, ptr noundef %1, i32 noundef %11) #3
%13 = icmp eq ptr %12, null
br i1 %13, label %17, label %14
14: ; preds = %8
%15 = tail call i32 @check_authkeys_file(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %12, ptr noundef %3, ptr noundef %2, ptr noundef %4) #3
%16 = tail call i32 @fclose(ptr noundef nonnull %12)
br label %17
17: ; preds = %14, %8
%18 = phi i32 [ %15, %14 ], [ 0, %8 ]
%19 = tail call i32 (...) @restore_uid() #3
ret i32 %18
}
declare i32 @temporarily_use_uid(ptr noundef) local_unnamed_addr #1
declare i32 @debug(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @auth_openkeyfile(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @check_authkeys_file(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @restore_uid(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_auth2-pubkey.c_user_key_allowed2.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_auth2-pubkey.c_user_key_allowed2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@.str = private unnamed_addr constant [26 x i8] c"trying public key file %s\00", align 1
@options = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @user_key_allowed2], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @user_key_allowed2(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
%6 = icmp eq ptr %4, null
br i1 %6, label %8, label %7
7: ; preds = %5
store ptr null, ptr %4, align 8, !tbaa !6
br label %8
8: ; preds = %7, %5
%9 = tail call i32 @temporarily_use_uid(ptr noundef %1) #3
%10 = tail call i32 @debug(ptr noundef nonnull @.str, ptr noundef %3) #3
%11 = load i32, ptr @options, align 4, !tbaa !10
%12 = tail call ptr @auth_openkeyfile(ptr noundef %3, ptr noundef %1, i32 noundef %11) #3
%13 = icmp eq ptr %12, null
br i1 %13, label %17, label %14
14: ; preds = %8
%15 = tail call i32 @check_authkeys_file(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %12, ptr noundef %3, ptr noundef %2, ptr noundef %4) #3
%16 = tail call i32 @fclose(ptr noundef nonnull %12)
br label %17
17: ; preds = %14, %8
%18 = phi i32 [ %15, %14 ], [ 0, %8 ]
%19 = tail call i32 @restore_uid() #3
ret i32 %18
}
declare i32 @temporarily_use_uid(ptr noundef) local_unnamed_addr #1
declare i32 @debug(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @auth_openkeyfile(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @check_authkeys_file(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @restore_uid(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| freebsd_crypto_openssh_extr_auth2-pubkey.c_user_key_allowed2 |
; ModuleID = 'AnghaBench/RetroArch/deps/libz/extr_zutil.c_zlibCompileFlags.c'
source_filename = "AnghaBench/RetroArch/deps/libz/extr_zutil.c_zlibCompileFlags.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @zlibCompileFlags() local_unnamed_addr #0 {
ret i64 16777305
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/RetroArch/deps/libz/extr_zutil.c_zlibCompileFlags.c'
source_filename = "AnghaBench/RetroArch/deps/libz/extr_zutil.c_zlibCompileFlags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i64 @zlibCompileFlags() local_unnamed_addr #0 {
ret i64 16777305
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| RetroArch_deps_libz_extr_zutil.c_zlibCompileFlags |
; ModuleID = 'AnghaBench/freebsd/sys/dev/isci/scil/extr_scif_sas_smp_io_request.c_scif_sas_smp_internal_request_retry.c'
source_filename = "AnghaBench/freebsd/sys/dev/isci/scil/extr_scif_sas_smp_io_request.c_scif_sas_smp_internal_request_retry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { i32, i32, i64 }
%struct.TYPE_14__ = type { %struct.TYPE_13__, ptr }
%struct.TYPE_13__ = type { %struct.TYPE_12__ }
@SCIF_LOG_OBJECT_IO_REQUEST = dso_local local_unnamed_addr global i32 0, align 4
@SCIF_LOG_OBJECT_DOMAIN_DISCOVERY = dso_local local_unnamed_addr global i32 0, align 4
@scif_sas_controller_start_high_priority_io = dso_local local_unnamed_addr global i32 0, align 4
@SCI_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@SCI_FAILURE_INSUFFICIENT_RESOURCES = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @scif_sas_smp_internal_request_retry(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @sci_base_object_get_logger(ptr noundef %0) #2
%5 = trunc i64 %3 to i32
%6 = tail call i32 @SCIF_LOG_TRACE(i32 noundef %5) #2
%7 = getelementptr inbounds %struct.TYPE_14__, ptr %0, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = load i32, ptr %0, align 8, !tbaa !17
switch i32 %10, label %28 [
i32 129, label %11
i32 130, label %13
i32 128, label %17
]
11: ; preds = %1
%12 = tail call ptr @scif_sas_smp_request_construct_report_general(ptr noundef %9, ptr noundef nonnull %0) #2
br label %21
13: ; preds = %1
%14 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !18
%16 = tail call ptr @scif_sas_smp_request_construct_discover(ptr noundef %9, ptr noundef nonnull %0, i32 noundef %15, ptr noundef null, ptr noundef null) #2
br label %21
17: ; preds = %1
%18 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !18
%20 = tail call ptr @scif_sas_smp_request_construct_report_phy_sata(ptr noundef %9, ptr noundef nonnull %0, i32 noundef %19) #2
br label %21
21: ; preds = %17, %13, %11
%22 = phi ptr [ %20, %17 ], [ %16, %13 ], [ %12, %11 ]
%23 = icmp eq ptr %22, null
br i1 %23, label %28, label %24
24: ; preds = %21
%25 = add nsw i64 %3, 1
store i64 %25, ptr %22, align 8, !tbaa !19
%26 = load i32, ptr @scif_sas_controller_start_high_priority_io, align 4, !tbaa !21
%27 = tail call i32 @scif_cb_start_internal_io_task_schedule(ptr noundef %9, i32 noundef %26, ptr noundef %9) #2
br label %28
28: ; preds = %1, %21, %24
%29 = phi ptr [ @SCI_SUCCESS, %24 ], [ @SCI_FAILURE_INSUFFICIENT_RESOURCES, %21 ], [ @SCI_FAILURE_INSUFFICIENT_RESOURCES, %1 ]
%30 = load i32, ptr %29, align 4, !tbaa !21
ret i32 %30
}
declare i32 @SCIF_LOG_TRACE(i32 noundef) local_unnamed_addr #1
declare i32 @sci_base_object_get_logger(ptr noundef) local_unnamed_addr #1
declare ptr @scif_sas_smp_request_construct_report_general(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @scif_sas_smp_request_construct_discover(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @scif_sas_smp_request_construct_report_phy_sata(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @scif_cb_start_internal_io_task_schedule(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 8}
!6 = !{!"TYPE_14__", !7, i64 0, !13, i64 16}
!7 = !{!"TYPE_13__", !8, i64 0}
!8 = !{!"TYPE_12__", !9, i64 0, !9, i64 4, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!6, !13, i64 16}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_11__", !13, i64 0}
!17 = !{!6, !9, i64 0}
!18 = !{!6, !9, i64 4}
!19 = !{!20, !12, i64 0}
!20 = !{!"TYPE_15__", !12, i64 0}
!21 = !{!9, !9, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/isci/scil/extr_scif_sas_smp_io_request.c_scif_sas_smp_internal_request_retry.c'
source_filename = "AnghaBench/freebsd/sys/dev/isci/scil/extr_scif_sas_smp_io_request.c_scif_sas_smp_internal_request_retry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SCIF_LOG_OBJECT_IO_REQUEST = common local_unnamed_addr global i32 0, align 4
@SCIF_LOG_OBJECT_DOMAIN_DISCOVERY = common local_unnamed_addr global i32 0, align 4
@scif_sas_controller_start_high_priority_io = common local_unnamed_addr global i32 0, align 4
@SCI_SUCCESS = common local_unnamed_addr global i32 0, align 4
@SCI_FAILURE_INSUFFICIENT_RESOURCES = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @scif_sas_smp_internal_request_retry(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @sci_base_object_get_logger(ptr noundef %0) #2
%5 = trunc i64 %3 to i32
%6 = tail call i32 @SCIF_LOG_TRACE(i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !15
%9 = load ptr, ptr %8, align 8, !tbaa !16
%10 = load i32, ptr %0, align 8, !tbaa !18
switch i32 %10, label %28 [
i32 129, label %11
i32 130, label %13
i32 128, label %17
]
11: ; preds = %1
%12 = tail call ptr @scif_sas_smp_request_construct_report_general(ptr noundef %9, ptr noundef nonnull %0) #2
br label %21
13: ; preds = %1
%14 = getelementptr inbounds i8, ptr %0, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !19
%16 = tail call ptr @scif_sas_smp_request_construct_discover(ptr noundef %9, ptr noundef nonnull %0, i32 noundef %15, ptr noundef null, ptr noundef null) #2
br label %21
17: ; preds = %1
%18 = getelementptr inbounds i8, ptr %0, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !19
%20 = tail call ptr @scif_sas_smp_request_construct_report_phy_sata(ptr noundef %9, ptr noundef nonnull %0, i32 noundef %19) #2
br label %21
21: ; preds = %17, %13, %11
%22 = phi ptr [ %20, %17 ], [ %16, %13 ], [ %12, %11 ]
%23 = icmp eq ptr %22, null
br i1 %23, label %28, label %24
24: ; preds = %21
%25 = add nsw i64 %3, 1
store i64 %25, ptr %22, align 8, !tbaa !20
%26 = load i32, ptr @scif_sas_controller_start_high_priority_io, align 4, !tbaa !22
%27 = tail call i32 @scif_cb_start_internal_io_task_schedule(ptr noundef %9, i32 noundef %26, ptr noundef %9) #2
br label %28
28: ; preds = %1, %21, %24
%29 = phi ptr [ @SCI_SUCCESS, %24 ], [ @SCI_FAILURE_INSUFFICIENT_RESOURCES, %21 ], [ @SCI_FAILURE_INSUFFICIENT_RESOURCES, %1 ]
%30 = load i32, ptr %29, align 4, !tbaa !22
ret i32 %30
}
declare i32 @SCIF_LOG_TRACE(i32 noundef) local_unnamed_addr #1
declare i32 @sci_base_object_get_logger(ptr noundef) local_unnamed_addr #1
declare ptr @scif_sas_smp_request_construct_report_general(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @scif_sas_smp_request_construct_discover(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @scif_sas_smp_request_construct_report_phy_sata(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @scif_cb_start_internal_io_task_schedule(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 8}
!7 = !{!"TYPE_14__", !8, i64 0, !14, i64 16}
!8 = !{!"TYPE_13__", !9, i64 0}
!9 = !{!"TYPE_12__", !10, i64 0, !10, i64 4, !13, i64 8}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"long", !11, i64 0}
!14 = !{!"any pointer", !11, i64 0}
!15 = !{!7, !14, i64 16}
!16 = !{!17, !14, i64 0}
!17 = !{!"TYPE_11__", !14, i64 0}
!18 = !{!7, !10, i64 0}
!19 = !{!7, !10, i64 4}
!20 = !{!21, !13, i64 0}
!21 = !{!"TYPE_15__", !13, i64 0}
!22 = !{!10, !10, i64 0}
| freebsd_sys_dev_isci_scil_extr_scif_sas_smp_io_request.c_scif_sas_smp_internal_request_retry |
; ModuleID = 'AnghaBench/linux/drivers/char/agp/extr_via-agp.c_via_configure.c'
source_filename = "AnghaBench/linux/drivers/char/agp/extr_via-agp.c_via_configure.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32, i32, i32 }
@agp_bridge = dso_local local_unnamed_addr global ptr null, align 8
@VIA_APSIZE = dso_local local_unnamed_addr global i32 0, align 4
@AGP_APERTURE_BAR = dso_local local_unnamed_addr global i32 0, align 4
@VIA_GARTCTRL = dso_local local_unnamed_addr global i32 0, align 4
@VIA_ATTBASE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @via_configure], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @via_configure() #0 {
%1 = load ptr, ptr @agp_bridge, align 8, !tbaa !5
%2 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 3
%3 = load i32, ptr %2, align 4, !tbaa !9
%4 = tail call ptr @A_SIZE_8(i32 noundef %3) #2
%5 = load ptr, ptr @agp_bridge, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = load i32, ptr @VIA_APSIZE, align 4, !tbaa !13
%9 = load i32, ptr %4, align 4, !tbaa !14
%10 = tail call i32 @pci_write_config_byte(i32 noundef %7, i32 noundef %8, i32 noundef %9) #2
%11 = load ptr, ptr @agp_bridge, align 8, !tbaa !5
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %11, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !12
%14 = load i32, ptr @AGP_APERTURE_BAR, align 4, !tbaa !13
%15 = tail call i32 @pci_bus_address(i32 noundef %13, i32 noundef %14) #2
%16 = load ptr, ptr @agp_bridge, align 8, !tbaa !5
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 0, i32 2
store i32 %15, ptr %17, align 4, !tbaa !16
%18 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !12
%20 = load i32, ptr @VIA_GARTCTRL, align 4, !tbaa !13
%21 = tail call i32 @pci_write_config_dword(i32 noundef %19, i32 noundef %20, i32 noundef 15) #2
%22 = load ptr, ptr @agp_bridge, align 8, !tbaa !5
%23 = getelementptr inbounds %struct.TYPE_2__, ptr %22, i64 0, i32 1
%24 = load i32, ptr %23, align 4, !tbaa !12
%25 = load i32, ptr @VIA_ATTBASE, align 4, !tbaa !13
%26 = load i32, ptr %22, align 4, !tbaa !17
%27 = and i32 %26, -4096
%28 = or disjoint i32 %27, 3
%29 = tail call i32 @pci_write_config_dword(i32 noundef %24, i32 noundef %25, i32 noundef %28) #2
ret i32 0
}
declare ptr @A_SIZE_8(i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config_byte(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_bus_address(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config_dword(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 12}
!10 = !{!"TYPE_2__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 4}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"aper_size_info_8", !11, i64 0}
!16 = !{!10, !11, i64 8}
!17 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/char/agp/extr_via-agp.c_via_configure.c'
source_filename = "AnghaBench/linux/drivers/char/agp/extr_via-agp.c_via_configure.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@agp_bridge = common local_unnamed_addr global ptr null, align 8
@VIA_APSIZE = common local_unnamed_addr global i32 0, align 4
@AGP_APERTURE_BAR = common local_unnamed_addr global i32 0, align 4
@VIA_GARTCTRL = common local_unnamed_addr global i32 0, align 4
@VIA_ATTBASE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @via_configure], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @via_configure() #0 {
%1 = load ptr, ptr @agp_bridge, align 8, !tbaa !6
%2 = getelementptr inbounds i8, ptr %1, i64 12
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = tail call ptr @A_SIZE_8(i32 noundef %3) #2
%5 = load ptr, ptr @agp_bridge, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !13
%8 = load i32, ptr @VIA_APSIZE, align 4, !tbaa !14
%9 = load i32, ptr %4, align 4, !tbaa !15
%10 = tail call i32 @pci_write_config_byte(i32 noundef %7, i32 noundef %8, i32 noundef %9) #2
%11 = load ptr, ptr @agp_bridge, align 8, !tbaa !6
%12 = getelementptr inbounds i8, ptr %11, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = load i32, ptr @AGP_APERTURE_BAR, align 4, !tbaa !14
%15 = tail call i32 @pci_bus_address(i32 noundef %13, i32 noundef %14) #2
%16 = load ptr, ptr @agp_bridge, align 8, !tbaa !6
%17 = getelementptr inbounds i8, ptr %16, i64 8
store i32 %15, ptr %17, align 4, !tbaa !17
%18 = getelementptr inbounds i8, ptr %16, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !13
%20 = load i32, ptr @VIA_GARTCTRL, align 4, !tbaa !14
%21 = tail call i32 @pci_write_config_dword(i32 noundef %19, i32 noundef %20, i32 noundef 15) #2
%22 = load ptr, ptr @agp_bridge, align 8, !tbaa !6
%23 = getelementptr inbounds i8, ptr %22, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !13
%25 = load i32, ptr @VIA_ATTBASE, align 4, !tbaa !14
%26 = load i32, ptr %22, align 4, !tbaa !18
%27 = and i32 %26, -4096
%28 = or disjoint i32 %27, 3
%29 = tail call i32 @pci_write_config_dword(i32 noundef %24, i32 noundef %25, i32 noundef %28) #2
ret i32 0
}
declare ptr @A_SIZE_8(i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config_byte(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_bus_address(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config_dword(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 12}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 4}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"aper_size_info_8", !12, i64 0}
!17 = !{!11, !12, i64 8}
!18 = !{!11, !12, i64 0}
| linux_drivers_char_agp_extr_via-agp.c_via_configure |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/mediatek/mt76/extr_usb.c_mt76u_tx_kick.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/mediatek/mt76/extr_usb.c_mt76u_tx_kick.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mt76_queue = type { i64, i64, i32, ptr }
%struct.TYPE_2__ = type { ptr }
%struct.mt76_dev = type { i32, i32 }
@GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@MT76_REMOVED = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"tx urb submit failed:%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mt76u_tx_kick], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mt76u_tx_kick(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = getelementptr inbounds %struct.mt76_queue, ptr %1, i64 0, i32 1
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = load i64, ptr %3, align 8, !tbaa !12
%6 = icmp eq i64 %4, %5
br i1 %6, label %38, label %7
7: ; preds = %2
%8 = getelementptr inbounds %struct.mt76_queue, ptr %1, i64 0, i32 3
%9 = getelementptr inbounds %struct.mt76_queue, ptr %1, i64 0, i32 2
br label %10
10: ; preds = %7, %30
%11 = phi i64 [ %4, %7 ], [ %35, %30 ]
%12 = load ptr, ptr %8, align 8, !tbaa !13
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %12, i64 %11
%14 = load ptr, ptr %13, align 8, !tbaa !14
%15 = tail call i32 @trace_submit_urb(ptr noundef %0, ptr noundef %14) #2
%16 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !16
%17 = tail call i32 @usb_submit_urb(ptr noundef %14, i32 noundef %16) #2
%18 = icmp slt i32 %17, 0
br i1 %18, label %19, label %30
19: ; preds = %10
%20 = load i32, ptr @ENODEV, align 4, !tbaa !16
%21 = sub nsw i32 0, %20
%22 = icmp eq i32 %17, %21
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i32, ptr @MT76_REMOVED, align 4, !tbaa !16
%25 = getelementptr inbounds %struct.mt76_dev, ptr %0, i64 0, i32 1
%26 = tail call i32 @set_bit(i32 noundef %24, ptr noundef nonnull %25) #2
br label %38
27: ; preds = %19
%28 = load i32, ptr %0, align 4, !tbaa !17
%29 = tail call i32 @dev_err(i32 noundef %28, ptr noundef nonnull @.str, i32 noundef %17) #2
br label %38
30: ; preds = %10
%31 = load i64, ptr %1, align 8, !tbaa !5
%32 = add i64 %31, 1
%33 = load i32, ptr %9, align 8, !tbaa !19
%34 = sext i32 %33 to i64
%35 = urem i64 %32, %34
store i64 %35, ptr %1, align 8, !tbaa !5
%36 = load i64, ptr %3, align 8, !tbaa !12
%37 = icmp eq i64 %35, %36
br i1 %37, label %38, label %10, !llvm.loop !20
38: ; preds = %30, %2, %23, %27
ret void
}
declare i32 @trace_submit_urb(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @usb_submit_urb(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mt76_queue", !7, i64 0, !7, i64 8, !10, i64 16, !11, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !11, i64 24}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_2__", !11, i64 0}
!16 = !{!10, !10, i64 0}
!17 = !{!18, !10, i64 0}
!18 = !{!"mt76_dev", !10, i64 0, !10, i64 4}
!19 = !{!6, !10, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/mediatek/mt76/extr_usb.c_mt76u_tx_kick.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/mediatek/mt76/extr_usb.c_mt76u_tx_kick.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr }
@GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4
@ENODEV = common local_unnamed_addr global i32 0, align 4
@MT76_REMOVED = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"tx urb submit failed:%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mt76u_tx_kick], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mt76u_tx_kick(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = load i64, ptr %3, align 8, !tbaa !13
%6 = icmp eq i64 %4, %5
br i1 %6, label %38, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, ptr %1, i64 24
%9 = getelementptr inbounds i8, ptr %1, i64 16
br label %10
10: ; preds = %7, %30
%11 = phi i64 [ %4, %7 ], [ %35, %30 ]
%12 = load ptr, ptr %8, align 8, !tbaa !14
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %12, i64 %11
%14 = load ptr, ptr %13, align 8, !tbaa !15
%15 = tail call i32 @trace_submit_urb(ptr noundef %0, ptr noundef %14) #2
%16 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !17
%17 = tail call i32 @usb_submit_urb(ptr noundef %14, i32 noundef %16) #2
%18 = icmp slt i32 %17, 0
br i1 %18, label %19, label %30
19: ; preds = %10
%20 = load i32, ptr @ENODEV, align 4, !tbaa !17
%21 = sub nsw i32 0, %20
%22 = icmp eq i32 %17, %21
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = load i32, ptr @MT76_REMOVED, align 4, !tbaa !17
%25 = getelementptr inbounds i8, ptr %0, i64 4
%26 = tail call i32 @set_bit(i32 noundef %24, ptr noundef nonnull %25) #2
br label %38
27: ; preds = %19
%28 = load i32, ptr %0, align 4, !tbaa !18
%29 = tail call i32 @dev_err(i32 noundef %28, ptr noundef nonnull @.str, i32 noundef %17) #2
br label %38
30: ; preds = %10
%31 = load i64, ptr %1, align 8, !tbaa !6
%32 = add i64 %31, 1
%33 = load i32, ptr %9, align 8, !tbaa !20
%34 = sext i32 %33 to i64
%35 = urem i64 %32, %34
store i64 %35, ptr %1, align 8, !tbaa !6
%36 = load i64, ptr %3, align 8, !tbaa !13
%37 = icmp eq i64 %35, %36
br i1 %37, label %38, label %10, !llvm.loop !21
38: ; preds = %30, %2, %23, %27
ret void
}
declare i32 @trace_submit_urb(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @usb_submit_urb(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mt76_queue", !8, i64 0, !8, i64 8, !11, i64 16, !12, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !12, i64 24}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_2__", !12, i64 0}
!17 = !{!11, !11, i64 0}
!18 = !{!19, !11, i64 0}
!19 = !{!"mt76_dev", !11, i64 0, !11, i64 4}
!20 = !{!7, !11, i64 16}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_wireless_mediatek_mt76_extr_usb.c_mt76u_tx_kick |
; ModuleID = 'AnghaBench/linux/net/ceph/extr_osd_client.c_lwork_queue.c'
source_filename = "AnghaBench/linux/net/ceph/extr_osd_client.c_lwork_queue.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.linger_work = type { i32, i32, i32, ptr }
%struct.ceph_osd_linger_request = type { i32, ptr }
@jiffies = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lwork_queue], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @lwork_queue(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.linger_work, ptr %0, i64 0, i32 3
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.ceph_osd_linger_request, ptr %3, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = tail call i32 @verify_lreq_locked(ptr noundef %3) #2
%7 = getelementptr inbounds %struct.linger_work, ptr %0, i64 0, i32 1
%8 = tail call i32 @list_empty(ptr noundef nonnull %7) #2
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #2
%12 = load i32, ptr @jiffies, align 4, !tbaa !13
%13 = getelementptr inbounds %struct.linger_work, ptr %0, i64 0, i32 2
store i32 %12, ptr %13, align 8, !tbaa !14
%14 = tail call i32 @list_add_tail(ptr noundef nonnull %7, ptr noundef %3) #2
%15 = load i32, ptr %5, align 4, !tbaa !15
%16 = tail call i32 @queue_work(i32 noundef %15, ptr noundef %0) #2
ret void
}
declare i32 @verify_lreq_locked(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @queue_work(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"linger_work", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"ceph_osd_linger_request", !7, i64 0, !10, i64 8}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 8}
!15 = !{!16, !7, i64 0}
!16 = !{!"ceph_osd_client", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/ceph/extr_osd_client.c_lwork_queue.c'
source_filename = "AnghaBench/linux/net/ceph/extr_osd_client.c_lwork_queue.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@jiffies = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lwork_queue], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @lwork_queue(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = tail call i32 @verify_lreq_locked(ptr noundef %3) #2
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = tail call i32 @list_empty(ptr noundef nonnull %7) #2
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @WARN_ON(i32 noundef %10) #2
%12 = load i32, ptr @jiffies, align 4, !tbaa !14
%13 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %12, ptr %13, align 8, !tbaa !15
%14 = tail call i32 @list_add_tail(ptr noundef nonnull %7, ptr noundef %3) #2
%15 = load i32, ptr %5, align 4, !tbaa !16
%16 = tail call i32 @queue_work(i32 noundef %15, ptr noundef %0) #2
ret void
}
declare i32 @verify_lreq_locked(ptr noundef) local_unnamed_addr #1
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @queue_work(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"linger_work", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"ceph_osd_linger_request", !8, i64 0, !11, i64 8}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 8}
!16 = !{!17, !8, i64 0}
!17 = !{!"ceph_osd_client", !8, i64 0}
| linux_net_ceph_extr_osd_client.c_lwork_queue |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_client_blt.c_destroy_sleeve.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_client_blt.c_destroy_sleeve.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @destroy_sleeve], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @destroy_sleeve(ptr noundef %0) #0 {
%2 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_client_blt.c_destroy_sleeve.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gem/extr_i915_gem_client_blt.c_destroy_sleeve.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @destroy_sleeve], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @destroy_sleeve(ptr noundef %0) #0 {
%2 = tail call i32 @kfree(ptr noundef %0) #2
ret void
}
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_i915_gem_extr_i915_gem_client_blt.c_destroy_sleeve |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_board-sx1.c_sx1_setmmipower.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_board-sx1.c_sx1_setmmipower.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SOFIA_I2C_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@SOFIA_POWER1_REG = dso_local local_unnamed_addr global i32 0, align 4
@SOFIA_MMILIGHT_POWER = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @sx1_setmmipower(i64 noundef %0) local_unnamed_addr #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store i64 0, ptr %2, align 8, !tbaa !5
%3 = load i32, ptr @SOFIA_I2C_ADDR, align 4, !tbaa !9
%4 = load i32, ptr @SOFIA_POWER1_REG, align 4, !tbaa !9
%5 = call i32 @sx1_i2c_read_byte(i32 noundef %3, i32 noundef %4, ptr noundef nonnull %2) #3
%6 = icmp slt i32 %5, 0
br i1 %6, label %22, label %7
7: ; preds = %1
%8 = icmp eq i64 %0, 0
%9 = load i64, ptr @SOFIA_MMILIGHT_POWER, align 8, !tbaa !5
br i1 %8, label %13, label %10
10: ; preds = %7
%11 = load i64, ptr %2, align 8, !tbaa !5
%12 = or i64 %11, %9
br label %17
13: ; preds = %7
%14 = xor i64 %9, -1
%15 = load i64, ptr %2, align 8, !tbaa !5
%16 = and i64 %15, %14
br label %17
17: ; preds = %13, %10
%18 = phi i64 [ %16, %13 ], [ %12, %10 ]
store i64 %18, ptr %2, align 8, !tbaa !5
%19 = load i32, ptr @SOFIA_I2C_ADDR, align 4, !tbaa !9
%20 = load i32, ptr @SOFIA_POWER1_REG, align 4, !tbaa !9
%21 = call i32 @sx1_i2c_write_byte(i32 noundef %19, i32 noundef %20, i64 noundef %18) #3
br label %22
22: ; preds = %1, %17
%23 = phi i32 [ %21, %17 ], [ %5, %1 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sx1_i2c_read_byte(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sx1_i2c_write_byte(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_board-sx1.c_sx1_setmmipower.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_board-sx1.c_sx1_setmmipower.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SOFIA_I2C_ADDR = common local_unnamed_addr global i32 0, align 4
@SOFIA_POWER1_REG = common local_unnamed_addr global i32 0, align 4
@SOFIA_MMILIGHT_POWER = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sx1_setmmipower(i64 noundef %0) local_unnamed_addr #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
store i64 0, ptr %2, align 8, !tbaa !6
%3 = load i32, ptr @SOFIA_I2C_ADDR, align 4, !tbaa !10
%4 = load i32, ptr @SOFIA_POWER1_REG, align 4, !tbaa !10
%5 = call i32 @sx1_i2c_read_byte(i32 noundef %3, i32 noundef %4, ptr noundef nonnull %2) #3
%6 = icmp slt i32 %5, 0
br i1 %6, label %22, label %7
7: ; preds = %1
%8 = icmp eq i64 %0, 0
%9 = load i64, ptr @SOFIA_MMILIGHT_POWER, align 8, !tbaa !6
br i1 %8, label %13, label %10
10: ; preds = %7
%11 = load i64, ptr %2, align 8, !tbaa !6
%12 = or i64 %11, %9
br label %17
13: ; preds = %7
%14 = xor i64 %9, -1
%15 = load i64, ptr %2, align 8, !tbaa !6
%16 = and i64 %15, %14
br label %17
17: ; preds = %13, %10
%18 = phi i64 [ %16, %13 ], [ %12, %10 ]
store i64 %18, ptr %2, align 8, !tbaa !6
%19 = load i32, ptr @SOFIA_I2C_ADDR, align 4, !tbaa !10
%20 = load i32, ptr @SOFIA_POWER1_REG, align 4, !tbaa !10
%21 = call i32 @sx1_i2c_write_byte(i32 noundef %19, i32 noundef %20, i64 noundef %18) #3
br label %22
22: ; preds = %1, %17
%23 = phi i32 [ %21, %17 ], [ %5, %1 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sx1_i2c_read_byte(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sx1_i2c_write_byte(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| fastsocket_kernel_arch_arm_mach-omap1_extr_board-sx1.c_sx1_setmmipower |
; ModuleID = 'AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_sab82532.c_sab82532_getc.c'
source_filename = "AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_sab82532.c_sab82532_getc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SAB_STAR = dso_local local_unnamed_addr global i32 0, align 4
@SAB_STAR_RFNE = dso_local local_unnamed_addr global i32 0, align 4
@SAB_STAR_CEC = dso_local local_unnamed_addr global i32 0, align 4
@SAB_CMDR = dso_local local_unnamed_addr global i32 0, align 4
@SAB_CMDR_RFRD = dso_local local_unnamed_addr global i32 0, align 4
@SAB_ISR0 = dso_local local_unnamed_addr global i32 0, align 4
@SAB_ISR0_TCD = dso_local local_unnamed_addr global i32 0, align 4
@SAB_RFIFO = dso_local local_unnamed_addr global i32 0, align 4
@SAB_CMDR_RMC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sab82532_getc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sab82532_getc(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @uart_lock(ptr noundef %1) #2
%4 = tail call i32 @sab82532_delay(ptr noundef %0) #2
%5 = load i32, ptr @SAB_STAR, align 4, !tbaa !5
%6 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %5) #2
%7 = load i32, ptr @SAB_STAR_RFNE, align 4, !tbaa !5
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %2, %10
%11 = tail call i32 @uart_unlock(ptr noundef %1) #2
%12 = tail call i32 @DELAY(i32 noundef %4) #2
%13 = tail call i32 @uart_lock(ptr noundef %1) #2
%14 = load i32, ptr @SAB_STAR, align 4, !tbaa !5
%15 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %14) #2
%16 = load i32, ptr @SAB_STAR_RFNE, align 4, !tbaa !5
%17 = and i32 %16, %15
%18 = icmp eq i32 %17, 0
br i1 %18, label %10, label %19, !llvm.loop !9
19: ; preds = %10, %2
br label %20
20: ; preds = %19, %20
%21 = load i32, ptr @SAB_STAR, align 4, !tbaa !5
%22 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %21) #2
%23 = load i32, ptr @SAB_STAR_CEC, align 4, !tbaa !5
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %20, !llvm.loop !11
26: ; preds = %20
%27 = load i32, ptr @SAB_CMDR, align 4, !tbaa !5
%28 = load i32, ptr @SAB_CMDR_RFRD, align 4, !tbaa !5
%29 = tail call i32 @uart_setreg(ptr noundef %0, i32 noundef %27, i32 noundef %28) #2
%30 = tail call i32 @uart_barrier(ptr noundef %0) #2
%31 = load i32, ptr @SAB_ISR0, align 4, !tbaa !5
%32 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %31) #2
%33 = load i32, ptr @SAB_ISR0_TCD, align 4, !tbaa !5
%34 = and i32 %33, %32
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %43
36: ; preds = %26, %36
%37 = tail call i32 @DELAY(i32 noundef %4) #2
%38 = load i32, ptr @SAB_ISR0, align 4, !tbaa !5
%39 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %38) #2
%40 = load i32, ptr @SAB_ISR0_TCD, align 4, !tbaa !5
%41 = and i32 %40, %39
%42 = icmp eq i32 %41, 0
br i1 %42, label %36, label %43, !llvm.loop !12
43: ; preds = %36, %26
%44 = load i32, ptr @SAB_RFIFO, align 4, !tbaa !5
%45 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %44) #2
%46 = tail call i32 @uart_barrier(ptr noundef %0) #2
br label %47
47: ; preds = %47, %43
%48 = load i32, ptr @SAB_STAR, align 4, !tbaa !5
%49 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %48) #2
%50 = load i32, ptr @SAB_STAR_CEC, align 4, !tbaa !5
%51 = and i32 %50, %49
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %47, !llvm.loop !13
53: ; preds = %47
%54 = load i32, ptr @SAB_CMDR, align 4, !tbaa !5
%55 = load i32, ptr @SAB_CMDR_RMC, align 4, !tbaa !5
%56 = tail call i32 @uart_setreg(ptr noundef %0, i32 noundef %54, i32 noundef %55) #2
%57 = tail call i32 @uart_barrier(ptr noundef %0) #2
%58 = tail call i32 @uart_unlock(ptr noundef %1) #2
ret i32 %45
}
declare i32 @uart_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sab82532_delay(ptr noundef) local_unnamed_addr #1
declare i32 @uart_getreg(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uart_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @uart_setreg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uart_barrier(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_sab82532.c_sab82532_getc.c'
source_filename = "AnghaBench/freebsd/sys/dev/uart/extr_uart_dev_sab82532.c_sab82532_getc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SAB_STAR = common local_unnamed_addr global i32 0, align 4
@SAB_STAR_RFNE = common local_unnamed_addr global i32 0, align 4
@SAB_STAR_CEC = common local_unnamed_addr global i32 0, align 4
@SAB_CMDR = common local_unnamed_addr global i32 0, align 4
@SAB_CMDR_RFRD = common local_unnamed_addr global i32 0, align 4
@SAB_ISR0 = common local_unnamed_addr global i32 0, align 4
@SAB_ISR0_TCD = common local_unnamed_addr global i32 0, align 4
@SAB_RFIFO = common local_unnamed_addr global i32 0, align 4
@SAB_CMDR_RMC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sab82532_getc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sab82532_getc(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @uart_lock(ptr noundef %1) #2
%4 = tail call i32 @sab82532_delay(ptr noundef %0) #2
%5 = load i32, ptr @SAB_STAR, align 4, !tbaa !6
%6 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %5) #2
%7 = load i32, ptr @SAB_STAR_RFNE, align 4, !tbaa !6
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %2, %10
%11 = tail call i32 @uart_unlock(ptr noundef %1) #2
%12 = tail call i32 @DELAY(i32 noundef %4) #2
%13 = tail call i32 @uart_lock(ptr noundef %1) #2
%14 = load i32, ptr @SAB_STAR, align 4, !tbaa !6
%15 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %14) #2
%16 = load i32, ptr @SAB_STAR_RFNE, align 4, !tbaa !6
%17 = and i32 %16, %15
%18 = icmp eq i32 %17, 0
br i1 %18, label %10, label %19, !llvm.loop !10
19: ; preds = %10, %2
br label %20
20: ; preds = %19, %20
%21 = load i32, ptr @SAB_STAR, align 4, !tbaa !6
%22 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %21) #2
%23 = load i32, ptr @SAB_STAR_CEC, align 4, !tbaa !6
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %20, !llvm.loop !12
26: ; preds = %20
%27 = load i32, ptr @SAB_CMDR, align 4, !tbaa !6
%28 = load i32, ptr @SAB_CMDR_RFRD, align 4, !tbaa !6
%29 = tail call i32 @uart_setreg(ptr noundef %0, i32 noundef %27, i32 noundef %28) #2
%30 = tail call i32 @uart_barrier(ptr noundef %0) #2
%31 = load i32, ptr @SAB_ISR0, align 4, !tbaa !6
%32 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %31) #2
%33 = load i32, ptr @SAB_ISR0_TCD, align 4, !tbaa !6
%34 = and i32 %33, %32
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %43
36: ; preds = %26, %36
%37 = tail call i32 @DELAY(i32 noundef %4) #2
%38 = load i32, ptr @SAB_ISR0, align 4, !tbaa !6
%39 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %38) #2
%40 = load i32, ptr @SAB_ISR0_TCD, align 4, !tbaa !6
%41 = and i32 %40, %39
%42 = icmp eq i32 %41, 0
br i1 %42, label %36, label %43, !llvm.loop !13
43: ; preds = %36, %26
%44 = load i32, ptr @SAB_RFIFO, align 4, !tbaa !6
%45 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %44) #2
%46 = tail call i32 @uart_barrier(ptr noundef %0) #2
br label %47
47: ; preds = %47, %43
%48 = load i32, ptr @SAB_STAR, align 4, !tbaa !6
%49 = tail call i32 @uart_getreg(ptr noundef %0, i32 noundef %48) #2
%50 = load i32, ptr @SAB_STAR_CEC, align 4, !tbaa !6
%51 = and i32 %50, %49
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %47, !llvm.loop !14
53: ; preds = %47
%54 = load i32, ptr @SAB_CMDR, align 4, !tbaa !6
%55 = load i32, ptr @SAB_CMDR_RMC, align 4, !tbaa !6
%56 = tail call i32 @uart_setreg(ptr noundef %0, i32 noundef %54, i32 noundef %55) #2
%57 = tail call i32 @uart_barrier(ptr noundef %0) #2
%58 = tail call i32 @uart_unlock(ptr noundef %1) #2
ret i32 %45
}
declare i32 @uart_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sab82532_delay(ptr noundef) local_unnamed_addr #1
declare i32 @uart_getreg(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uart_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @DELAY(i32 noundef) local_unnamed_addr #1
declare i32 @uart_setreg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uart_barrier(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}
| freebsd_sys_dev_uart_extr_uart_dev_sab82532.c_sab82532_getc |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/802/extr_fddi.c_fddi_type_trans.c'
source_filename = "AnghaBench/fastsocket/kernel/net/802/extr_fddi.c_fddi_type_trans.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sk_buff = type { i32, ptr, i64 }
%struct.fddihdr = type { ptr, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { %struct.TYPE_5__, %struct.TYPE_4__ }
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_4__ = type { i32 }
%struct.net_device = type { i32, i32, i32 }
@FDDI_K_8022_HLEN = dso_local local_unnamed_addr global i64 0, align 8
@ETH_P_802_2 = dso_local local_unnamed_addr global i32 0, align 4
@FDDI_K_SNAP_HLEN = dso_local local_unnamed_addr global i64 0, align 8
@FDDI_K_ALEN = dso_local local_unnamed_addr global i32 0, align 4
@PACKET_BROADCAST = dso_local local_unnamed_addr global i32 0, align 4
@PACKET_MULTICAST = dso_local local_unnamed_addr global i32 0, align 4
@IFF_PROMISC = dso_local local_unnamed_addr global i32 0, align 4
@PACKET_OTHERHOST = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @fddi_type_trans(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.sk_buff, ptr %0, i64 0, i32 2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = inttoptr i64 %4 to ptr
%6 = getelementptr inbounds %struct.sk_buff, ptr %0, i64 0, i32 1
store ptr %1, ptr %6, align 8, !tbaa !12
%7 = tail call i32 @skb_reset_mac_header(ptr noundef %0) #2
%8 = getelementptr inbounds %struct.fddihdr, ptr %5, i64 0, i32 1, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !13
%10 = icmp eq i32 %9, 224
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i64, ptr @FDDI_K_8022_HLEN, align 8, !tbaa !18
%13 = add nsw i64 %12, -3
%14 = tail call i32 @skb_pull(ptr noundef nonnull %0, i64 noundef %13) #2
%15 = load i32, ptr @ETH_P_802_2, align 4, !tbaa !19
%16 = tail call i32 @htons(i32 noundef %15) #2
br label %22
17: ; preds = %2
%18 = getelementptr inbounds %struct.fddihdr, ptr %5, i64 0, i32 1
%19 = load i64, ptr @FDDI_K_SNAP_HLEN, align 8, !tbaa !18
%20 = tail call i32 @skb_pull(ptr noundef nonnull %0, i64 noundef %19) #2
%21 = load i32, ptr %18, align 8, !tbaa !20
br label %22
22: ; preds = %17, %11
%23 = phi i32 [ %16, %11 ], [ %21, %17 ]
%24 = load ptr, ptr %5, align 8, !tbaa !21
%25 = load i32, ptr %24, align 4, !tbaa !19
%26 = and i32 %25, 1
%27 = icmp eq i32 %26, 0
br i1 %27, label %35, label %28
28: ; preds = %22
%29 = getelementptr inbounds %struct.net_device, ptr %1, i64 0, i32 2
%30 = load i32, ptr %29, align 4, !tbaa !22
%31 = load i32, ptr @FDDI_K_ALEN, align 4, !tbaa !19
%32 = tail call i64 @memcmp(ptr noundef nonnull %24, i32 noundef %30, i32 noundef %31) #2
%33 = icmp eq i64 %32, 0
%34 = select i1 %33, ptr @PACKET_BROADCAST, ptr @PACKET_MULTICAST
br label %46
35: ; preds = %22
%36 = load i32, ptr %1, align 4, !tbaa !24
%37 = load i32, ptr @IFF_PROMISC, align 4, !tbaa !19
%38 = and i32 %37, %36
%39 = icmp eq i32 %38, 0
br i1 %39, label %49, label %40
40: ; preds = %35
%41 = getelementptr inbounds %struct.net_device, ptr %1, i64 0, i32 1
%42 = load i32, ptr %41, align 4, !tbaa !25
%43 = load i32, ptr @FDDI_K_ALEN, align 4, !tbaa !19
%44 = tail call i64 @memcmp(ptr noundef nonnull %24, i32 noundef %42, i32 noundef %43) #2
%45 = icmp eq i64 %44, 0
br i1 %45, label %49, label %46
46: ; preds = %40, %28
%47 = phi ptr [ %34, %28 ], [ @PACKET_OTHERHOST, %40 ]
%48 = load i32, ptr %47, align 4, !tbaa !19
store i32 %48, ptr %0, align 8, !tbaa !26
br label %49
49: ; preds = %46, %35, %40
ret i32 %23
}
declare i32 @skb_reset_mac_header(ptr noundef) local_unnamed_addr #1
declare i32 @skb_pull(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @htons(i32 noundef) local_unnamed_addr #1
declare i64 @memcmp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"sk_buff", !7, i64 0, !10, i64 8, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!14, !7, i64 12}
!14 = !{!"fddihdr", !10, i64 0, !15, i64 8}
!15 = !{!"TYPE_6__", !16, i64 0, !17, i64 4}
!16 = !{!"TYPE_5__", !7, i64 0}
!17 = !{!"TYPE_4__", !7, i64 0}
!18 = !{!11, !11, i64 0}
!19 = !{!7, !7, i64 0}
!20 = !{!14, !7, i64 8}
!21 = !{!14, !10, i64 0}
!22 = !{!23, !7, i64 8}
!23 = !{!"net_device", !7, i64 0, !7, i64 4, !7, i64 8}
!24 = !{!23, !7, i64 0}
!25 = !{!23, !7, i64 4}
!26 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/802/extr_fddi.c_fddi_type_trans.c'
source_filename = "AnghaBench/fastsocket/kernel/net/802/extr_fddi.c_fddi_type_trans.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FDDI_K_8022_HLEN = common local_unnamed_addr global i64 0, align 8
@ETH_P_802_2 = common local_unnamed_addr global i32 0, align 4
@FDDI_K_SNAP_HLEN = common local_unnamed_addr global i64 0, align 8
@FDDI_K_ALEN = common local_unnamed_addr global i32 0, align 4
@PACKET_BROADCAST = common local_unnamed_addr global i32 0, align 4
@PACKET_MULTICAST = common local_unnamed_addr global i32 0, align 4
@IFF_PROMISC = common local_unnamed_addr global i32 0, align 4
@PACKET_OTHERHOST = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @fddi_type_trans(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = inttoptr i64 %4 to ptr
%6 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %1, ptr %6, align 8, !tbaa !13
%7 = tail call i32 @skb_reset_mac_header(ptr noundef %0) #2
%8 = getelementptr inbounds i8, ptr %5, i64 12
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = icmp eq i32 %9, 224
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i64, ptr @FDDI_K_8022_HLEN, align 8, !tbaa !19
%13 = add nsw i64 %12, -3
%14 = tail call i32 @skb_pull(ptr noundef nonnull %0, i64 noundef %13) #2
%15 = load i32, ptr @ETH_P_802_2, align 4, !tbaa !20
%16 = tail call i32 @htons(i32 noundef %15) #2
br label %22
17: ; preds = %2
%18 = getelementptr inbounds i8, ptr %5, i64 8
%19 = load i64, ptr @FDDI_K_SNAP_HLEN, align 8, !tbaa !19
%20 = tail call i32 @skb_pull(ptr noundef nonnull %0, i64 noundef %19) #2
%21 = load i32, ptr %18, align 8, !tbaa !21
br label %22
22: ; preds = %17, %11
%23 = phi i32 [ %16, %11 ], [ %21, %17 ]
%24 = load ptr, ptr %5, align 8, !tbaa !22
%25 = load i32, ptr %24, align 4, !tbaa !20
%26 = and i32 %25, 1
%27 = icmp eq i32 %26, 0
br i1 %27, label %35, label %28
28: ; preds = %22
%29 = getelementptr inbounds i8, ptr %1, i64 8
%30 = load i32, ptr %29, align 4, !tbaa !23
%31 = load i32, ptr @FDDI_K_ALEN, align 4, !tbaa !20
%32 = tail call i64 @memcmp(ptr noundef nonnull %24, i32 noundef %30, i32 noundef %31) #2
%33 = icmp eq i64 %32, 0
%34 = select i1 %33, ptr @PACKET_BROADCAST, ptr @PACKET_MULTICAST
br label %46
35: ; preds = %22
%36 = load i32, ptr %1, align 4, !tbaa !25
%37 = load i32, ptr @IFF_PROMISC, align 4, !tbaa !20
%38 = and i32 %37, %36
%39 = icmp eq i32 %38, 0
br i1 %39, label %49, label %40
40: ; preds = %35
%41 = getelementptr inbounds i8, ptr %1, i64 4
%42 = load i32, ptr %41, align 4, !tbaa !26
%43 = load i32, ptr @FDDI_K_ALEN, align 4, !tbaa !20
%44 = tail call i64 @memcmp(ptr noundef nonnull %24, i32 noundef %42, i32 noundef %43) #2
%45 = icmp eq i64 %44, 0
br i1 %45, label %49, label %46
46: ; preds = %40, %28
%47 = phi ptr [ %34, %28 ], [ @PACKET_OTHERHOST, %40 ]
%48 = load i32, ptr %47, align 4, !tbaa !20
store i32 %48, ptr %0, align 8, !tbaa !27
br label %49
49: ; preds = %46, %35, %40
ret i32 %23
}
declare i32 @skb_reset_mac_header(ptr noundef) local_unnamed_addr #1
declare i32 @skb_pull(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @htons(i32 noundef) local_unnamed_addr #1
declare i64 @memcmp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"sk_buff", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!15, !8, i64 12}
!15 = !{!"fddihdr", !11, i64 0, !16, i64 8}
!16 = !{!"TYPE_6__", !17, i64 0, !18, i64 4}
!17 = !{!"TYPE_5__", !8, i64 0}
!18 = !{!"TYPE_4__", !8, i64 0}
!19 = !{!12, !12, i64 0}
!20 = !{!8, !8, i64 0}
!21 = !{!15, !8, i64 8}
!22 = !{!15, !11, i64 0}
!23 = !{!24, !8, i64 8}
!24 = !{!"net_device", !8, i64 0, !8, i64 4, !8, i64 8}
!25 = !{!24, !8, i64 0}
!26 = !{!24, !8, i64 4}
!27 = !{!7, !8, i64 0}
| fastsocket_kernel_net_802_extr_fddi.c_fddi_type_trans |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/fsl-dcu/extr_fsl_tcon.c_fsl_tcon_init.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/fsl-dcu/extr_fsl_tcon.c_fsl_tcon_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [9 x i8] c"fsl,tcon\00", align 1
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [33 x i8] c"Couldn't create the TCON regmap\0A\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"ipg\00", align 1
@.str.3 = private unnamed_addr constant [33 x i8] c"Couldn't get the TCON bus clock\0A\00", align 1
@.str.4 = private unnamed_addr constant [32 x i8] c"Couldn't enable the TCON clock\0A\00", align 1
@.str.5 = private unnamed_addr constant [27 x i8] c"Using TCON in bypass mode\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local ptr @fsl_tcon_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call ptr @of_parse_phandle(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef 0) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %28, label %5
5: ; preds = %1
%6 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !10
%7 = tail call ptr @devm_kzalloc(ptr noundef nonnull %0, i32 noundef 4, i32 noundef %6) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %26, label %9
9: ; preds = %5
%10 = tail call i32 @fsl_tcon_init_regmap(ptr noundef nonnull %0, ptr noundef nonnull %7, ptr noundef nonnull %3) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %23
12: ; preds = %9
%13 = tail call i32 @of_clk_get_by_name(ptr noundef nonnull %3, ptr noundef nonnull @.str.2) #2
store i32 %13, ptr %7, align 4, !tbaa !11
%14 = tail call i64 @IS_ERR(i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %12
%17 = load i32, ptr %7, align 4, !tbaa !11
%18 = tail call i32 @clk_prepare_enable(i32 noundef %17) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %16
%21 = tail call i32 @of_node_put(ptr noundef nonnull %3) #2
%22 = tail call i32 @dev_info(ptr noundef nonnull %0, ptr noundef nonnull @.str.5) #2
br label %28
23: ; preds = %16, %12, %9
%24 = phi ptr [ @.str.1, %9 ], [ @.str.3, %12 ], [ @.str.4, %16 ]
%25 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull %24) #2
br label %26
26: ; preds = %23, %5
%27 = tail call i32 @of_node_put(ptr noundef nonnull %3) #2
br label %28
28: ; preds = %1, %26, %20
%29 = phi ptr [ null, %26 ], [ %7, %20 ], [ null, %1 ]
ret ptr %29
}
declare ptr @of_parse_phandle(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fsl_tcon_init_regmap(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @of_clk_get_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(i32 noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
declare i32 @of_node_put(ptr noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"device", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"fsl_tcon", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/fsl-dcu/extr_fsl_tcon.c_fsl_tcon_init.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/fsl-dcu/extr_fsl_tcon.c_fsl_tcon_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [9 x i8] c"fsl,tcon\00", align 1
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [33 x i8] c"Couldn't create the TCON regmap\0A\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"ipg\00", align 1
@.str.3 = private unnamed_addr constant [33 x i8] c"Couldn't get the TCON bus clock\0A\00", align 1
@.str.4 = private unnamed_addr constant [32 x i8] c"Couldn't enable the TCON clock\0A\00", align 1
@.str.5 = private unnamed_addr constant [27 x i8] c"Using TCON in bypass mode\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @fsl_tcon_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call ptr @of_parse_phandle(i32 noundef %2, ptr noundef nonnull @.str, i32 noundef 0) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %28, label %5
5: ; preds = %1
%6 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11
%7 = tail call ptr @devm_kzalloc(ptr noundef nonnull %0, i32 noundef 4, i32 noundef %6) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %26, label %9
9: ; preds = %5
%10 = tail call i32 @fsl_tcon_init_regmap(ptr noundef nonnull %0, ptr noundef nonnull %7, ptr noundef nonnull %3) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %23
12: ; preds = %9
%13 = tail call i32 @of_clk_get_by_name(ptr noundef nonnull %3, ptr noundef nonnull @.str.2) #2
store i32 %13, ptr %7, align 4, !tbaa !12
%14 = tail call i64 @IS_ERR(i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %23
16: ; preds = %12
%17 = load i32, ptr %7, align 4, !tbaa !12
%18 = tail call i32 @clk_prepare_enable(i32 noundef %17) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %16
%21 = tail call i32 @of_node_put(ptr noundef nonnull %3) #2
%22 = tail call i32 @dev_info(ptr noundef nonnull %0, ptr noundef nonnull @.str.5) #2
br label %28
23: ; preds = %16, %12, %9
%24 = phi ptr [ @.str.1, %9 ], [ @.str.3, %12 ], [ @.str.4, %16 ]
%25 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull %24) #2
br label %26
26: ; preds = %23, %5
%27 = tail call i32 @of_node_put(ptr noundef nonnull %3) #2
br label %28
28: ; preds = %1, %26, %20
%29 = phi ptr [ null, %26 ], [ %7, %20 ], [ null, %1 ]
ret ptr %29
}
declare ptr @of_parse_phandle(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fsl_tcon_init_regmap(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @of_clk_get_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(i32 noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(i32 noundef) local_unnamed_addr #1
declare i32 @of_node_put(ptr noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"device", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"fsl_tcon", !8, i64 0}
| linux_drivers_gpu_drm_fsl-dcu_extr_fsl_tcon.c_fsl_tcon_init |
; ModuleID = 'AnghaBench/postgres/src/backend/storage/file/extr_buffile.c_MakeNewSharedSegment.c'
source_filename = "AnghaBench/postgres/src/backend/storage/file/extr_buffile.c_MakeNewSharedSegment.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@MAXPGPATH = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @MakeNewSharedSegment], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @MakeNewSharedSegment(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @MAXPGPATH, align 4, !tbaa !5
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 16
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !9
%8 = add nsw i32 %1, 1
%9 = call i32 @SharedSegmentName(ptr noundef nonnull %5, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr %0, align 4, !tbaa !11
%11 = call i32 @SharedFileSetDelete(i32 noundef %10, ptr noundef nonnull %5, i32 noundef 1) #2
%12 = load i32, ptr %6, align 4, !tbaa !9
%13 = call i32 @SharedSegmentName(ptr noundef nonnull %5, i32 noundef %12, i32 noundef %1) #2
%14 = load i32, ptr %0, align 4, !tbaa !11
%15 = call i64 @SharedFileSetCreate(i32 noundef %14, ptr noundef nonnull %5) #2
%16 = icmp sgt i64 %15, 0
%17 = zext i1 %16 to i32
%18 = call i32 @Assert(i32 noundef %17) #2
ret i64 %15
}
declare i32 @SharedSegmentName(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SharedFileSetDelete(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @SharedFileSetCreate(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"TYPE_3__", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/storage/file/extr_buffile.c_MakeNewSharedSegment.c'
source_filename = "AnghaBench/postgres/src/backend/storage/file/extr_buffile.c_MakeNewSharedSegment.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAXPGPATH = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @MakeNewSharedSegment], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @MakeNewSharedSegment(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @MAXPGPATH, align 4, !tbaa !6
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 1
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = add nsw i32 %1, 1
%9 = call i32 @SharedSegmentName(ptr noundef nonnull %5, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr %0, align 4, !tbaa !12
%11 = call i32 @SharedFileSetDelete(i32 noundef %10, ptr noundef nonnull %5, i32 noundef 1) #2
%12 = load i32, ptr %6, align 4, !tbaa !10
%13 = call i32 @SharedSegmentName(ptr noundef nonnull %5, i32 noundef %12, i32 noundef %1) #2
%14 = load i32, ptr %0, align 4, !tbaa !12
%15 = call i64 @SharedFileSetCreate(i32 noundef %14, ptr noundef nonnull %5) #2
%16 = icmp sgt i64 %15, 0
%17 = zext i1 %16 to i32
%18 = call i32 @Assert(i32 noundef %17) #2
ret i64 %15
}
declare i32 @SharedSegmentName(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SharedFileSetDelete(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @SharedFileSetCreate(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| postgres_src_backend_storage_file_extr_buffile.c_MakeNewSharedSegment |
; ModuleID = 'AnghaBench/linux/arch/x86/events/intel/extr_core.c_intel_pmu_nhm_workaround.c'
source_filename = "AnghaBench/linux/arch/x86/events/intel/extr_core.c_intel_pmu_nhm_workaround.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cpu_hw_events = dso_local global i32 0, align 4
@MSR_ARCH_PERFMON_EVENTSEL0 = dso_local local_unnamed_addr global i64 0, align 8
@MSR_ARCH_PERFMON_PERFCTR0 = dso_local local_unnamed_addr global i64 0, align 8
@MSR_CORE_PERF_GLOBAL_CTRL = dso_local local_unnamed_addr global i64 0, align 8
@ARCH_PERFMON_EVENTSEL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_pmu_nhm_workaround], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @intel_pmu_nhm_workaround() #0 {
%1 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2
%2 = load ptr, ptr %1, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %3) #2
%7 = load ptr, ptr %1, align 8, !tbaa !5
br label %8
8: ; preds = %0, %5
%9 = phi ptr [ %2, %0 ], [ %7, %5 ]
%10 = getelementptr inbounds ptr, ptr %9, i64 1
%11 = load ptr, ptr %10, align 8, !tbaa !10
%12 = icmp eq ptr %11, null
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %11) #2
%15 = load ptr, ptr %1, align 8, !tbaa !5
br label %16
16: ; preds = %13, %8
%17 = phi ptr [ %15, %13 ], [ %9, %8 ]
%18 = getelementptr inbounds ptr, ptr %17, i64 2
%19 = load ptr, ptr %18, align 8, !tbaa !10
%20 = icmp eq ptr %19, null
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %19) #2
%23 = load ptr, ptr %1, align 8, !tbaa !5
br label %24
24: ; preds = %21, %16
%25 = phi ptr [ %23, %21 ], [ %17, %16 ]
%26 = getelementptr inbounds ptr, ptr %25, i64 3
%27 = load ptr, ptr %26, align 8, !tbaa !10
%28 = icmp eq ptr %27, null
br i1 %28, label %31, label %29
29: ; preds = %24
%30 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %27) #2
br label %31
31: ; preds = %29, %24
%32 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%33 = tail call i32 @wrmsrl(i64 noundef %32, i64 noundef 4391093) #2
%34 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !11
%35 = tail call i32 @wrmsrl(i64 noundef %34, i64 noundef 0) #2
%36 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%37 = add nsw i64 %36, 1
%38 = tail call i32 @wrmsrl(i64 noundef %37, i64 noundef 4391122) #2
%39 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !11
%40 = add nsw i64 %39, 1
%41 = tail call i32 @wrmsrl(i64 noundef %40, i64 noundef 0) #2
%42 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%43 = add nsw i64 %42, 2
%44 = tail call i32 @wrmsrl(i64 noundef %43, i64 noundef 4391089) #2
%45 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !11
%46 = add nsw i64 %45, 2
%47 = tail call i32 @wrmsrl(i64 noundef %46, i64 noundef 0) #2
%48 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%49 = add nsw i64 %48, 3
%50 = tail call i32 @wrmsrl(i64 noundef %49, i64 noundef 4391089) #2
%51 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !11
%52 = add nsw i64 %51, 3
%53 = tail call i32 @wrmsrl(i64 noundef %52, i64 noundef 0) #2
%54 = load i64, ptr @MSR_CORE_PERF_GLOBAL_CTRL, align 8, !tbaa !11
%55 = tail call i32 @wrmsrl(i64 noundef %54, i64 noundef 15) #2
%56 = load i64, ptr @MSR_CORE_PERF_GLOBAL_CTRL, align 8, !tbaa !11
%57 = tail call i32 @wrmsrl(i64 noundef %56, i64 noundef 0) #2
%58 = load ptr, ptr %1, align 8, !tbaa !5
%59 = load ptr, ptr %58, align 8, !tbaa !10
%60 = icmp eq ptr %59, null
br i1 %60, label %65, label %61
61: ; preds = %31
%62 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %59) #2
%63 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !13
%64 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %59, i32 noundef %63) #2
br label %68
65: ; preds = %31
%66 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%67 = tail call i32 @wrmsrl(i64 noundef %66, i64 noundef 0) #2
br label %68
68: ; preds = %61, %65
%69 = load ptr, ptr %1, align 8, !tbaa !5
%70 = getelementptr inbounds ptr, ptr %69, i64 1
%71 = load ptr, ptr %70, align 8, !tbaa !10
%72 = icmp eq ptr %71, null
br i1 %72, label %77, label %73
73: ; preds = %68
%74 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %71) #2
%75 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !13
%76 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %71, i32 noundef %75) #2
br label %81
77: ; preds = %68
%78 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%79 = add nsw i64 %78, 1
%80 = tail call i32 @wrmsrl(i64 noundef %79, i64 noundef 0) #2
br label %81
81: ; preds = %77, %73
%82 = load ptr, ptr %1, align 8, !tbaa !5
%83 = getelementptr inbounds ptr, ptr %82, i64 2
%84 = load ptr, ptr %83, align 8, !tbaa !10
%85 = icmp eq ptr %84, null
br i1 %85, label %90, label %86
86: ; preds = %81
%87 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %84) #2
%88 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !13
%89 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %84, i32 noundef %88) #2
br label %94
90: ; preds = %81
%91 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%92 = add nsw i64 %91, 2
%93 = tail call i32 @wrmsrl(i64 noundef %92, i64 noundef 0) #2
br label %94
94: ; preds = %90, %86
%95 = load ptr, ptr %1, align 8, !tbaa !5
%96 = getelementptr inbounds ptr, ptr %95, i64 3
%97 = load ptr, ptr %96, align 8, !tbaa !10
%98 = icmp eq ptr %97, null
br i1 %98, label %103, label %99
99: ; preds = %94
%100 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %97) #2
%101 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !13
%102 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %97, i32 noundef %101) #2
br label %107
103: ; preds = %94
%104 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !11
%105 = add nsw i64 %104, 3
%106 = tail call i32 @wrmsrl(i64 noundef %105, i64 noundef 0) #2
br label %107
107: ; preds = %103, %99
ret void
}
declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1
declare i32 @x86_perf_event_update(ptr noundef) local_unnamed_addr #1
declare i32 @wrmsrl(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @x86_perf_event_set_period(ptr noundef) local_unnamed_addr #1
declare i32 @__x86_pmu_enable_event(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cpu_hw_events", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/x86/events/intel/extr_core.c_intel_pmu_nhm_workaround.c'
source_filename = "AnghaBench/linux/arch/x86/events/intel/extr_core.c_intel_pmu_nhm_workaround.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cpu_hw_events = common global i32 0, align 4
@MSR_ARCH_PERFMON_EVENTSEL0 = common local_unnamed_addr global i64 0, align 8
@MSR_ARCH_PERFMON_PERFCTR0 = common local_unnamed_addr global i64 0, align 8
@MSR_CORE_PERF_GLOBAL_CTRL = common local_unnamed_addr global i64 0, align 8
@ARCH_PERFMON_EVENTSEL_ENABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intel_pmu_nhm_workaround], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @intel_pmu_nhm_workaround() #0 {
%1 = tail call ptr @this_cpu_ptr(ptr noundef nonnull @cpu_hw_events) #2
%2 = load ptr, ptr %1, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %3) #2
%7 = load ptr, ptr %1, align 8, !tbaa !6
br label %8
8: ; preds = %0, %5
%9 = phi ptr [ %2, %0 ], [ %7, %5 ]
%10 = getelementptr inbounds i8, ptr %9, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !11
%12 = icmp eq ptr %11, null
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %11) #2
%15 = load ptr, ptr %1, align 8, !tbaa !6
br label %16
16: ; preds = %13, %8
%17 = phi ptr [ %15, %13 ], [ %9, %8 ]
%18 = getelementptr inbounds i8, ptr %17, i64 16
%19 = load ptr, ptr %18, align 8, !tbaa !11
%20 = icmp eq ptr %19, null
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %19) #2
%23 = load ptr, ptr %1, align 8, !tbaa !6
br label %24
24: ; preds = %21, %16
%25 = phi ptr [ %23, %21 ], [ %17, %16 ]
%26 = getelementptr inbounds i8, ptr %25, i64 24
%27 = load ptr, ptr %26, align 8, !tbaa !11
%28 = icmp eq ptr %27, null
br i1 %28, label %31, label %29
29: ; preds = %24
%30 = tail call i32 @x86_perf_event_update(ptr noundef nonnull %27) #2
br label %31
31: ; preds = %29, %24
%32 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%33 = tail call i32 @wrmsrl(i64 noundef %32, i64 noundef 4391093) #2
%34 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !12
%35 = tail call i32 @wrmsrl(i64 noundef %34, i64 noundef 0) #2
%36 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%37 = add nsw i64 %36, 1
%38 = tail call i32 @wrmsrl(i64 noundef %37, i64 noundef 4391122) #2
%39 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !12
%40 = add nsw i64 %39, 1
%41 = tail call i32 @wrmsrl(i64 noundef %40, i64 noundef 0) #2
%42 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%43 = add nsw i64 %42, 2
%44 = tail call i32 @wrmsrl(i64 noundef %43, i64 noundef 4391089) #2
%45 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !12
%46 = add nsw i64 %45, 2
%47 = tail call i32 @wrmsrl(i64 noundef %46, i64 noundef 0) #2
%48 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%49 = add nsw i64 %48, 3
%50 = tail call i32 @wrmsrl(i64 noundef %49, i64 noundef 4391089) #2
%51 = load i64, ptr @MSR_ARCH_PERFMON_PERFCTR0, align 8, !tbaa !12
%52 = add nsw i64 %51, 3
%53 = tail call i32 @wrmsrl(i64 noundef %52, i64 noundef 0) #2
%54 = load i64, ptr @MSR_CORE_PERF_GLOBAL_CTRL, align 8, !tbaa !12
%55 = tail call i32 @wrmsrl(i64 noundef %54, i64 noundef 15) #2
%56 = load i64, ptr @MSR_CORE_PERF_GLOBAL_CTRL, align 8, !tbaa !12
%57 = tail call i32 @wrmsrl(i64 noundef %56, i64 noundef 0) #2
%58 = load ptr, ptr %1, align 8, !tbaa !6
%59 = load ptr, ptr %58, align 8, !tbaa !11
%60 = icmp eq ptr %59, null
br i1 %60, label %65, label %61
61: ; preds = %31
%62 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %59) #2
%63 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !14
%64 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %59, i32 noundef %63) #2
br label %68
65: ; preds = %31
%66 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%67 = tail call i32 @wrmsrl(i64 noundef %66, i64 noundef 0) #2
br label %68
68: ; preds = %61, %65
%69 = load ptr, ptr %1, align 8, !tbaa !6
%70 = getelementptr inbounds i8, ptr %69, i64 8
%71 = load ptr, ptr %70, align 8, !tbaa !11
%72 = icmp eq ptr %71, null
br i1 %72, label %77, label %73
73: ; preds = %68
%74 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %71) #2
%75 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !14
%76 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %71, i32 noundef %75) #2
br label %81
77: ; preds = %68
%78 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%79 = add nsw i64 %78, 1
%80 = tail call i32 @wrmsrl(i64 noundef %79, i64 noundef 0) #2
br label %81
81: ; preds = %77, %73
%82 = load ptr, ptr %1, align 8, !tbaa !6
%83 = getelementptr inbounds i8, ptr %82, i64 16
%84 = load ptr, ptr %83, align 8, !tbaa !11
%85 = icmp eq ptr %84, null
br i1 %85, label %90, label %86
86: ; preds = %81
%87 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %84) #2
%88 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !14
%89 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %84, i32 noundef %88) #2
br label %94
90: ; preds = %81
%91 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%92 = add nsw i64 %91, 2
%93 = tail call i32 @wrmsrl(i64 noundef %92, i64 noundef 0) #2
br label %94
94: ; preds = %90, %86
%95 = load ptr, ptr %1, align 8, !tbaa !6
%96 = getelementptr inbounds i8, ptr %95, i64 24
%97 = load ptr, ptr %96, align 8, !tbaa !11
%98 = icmp eq ptr %97, null
br i1 %98, label %103, label %99
99: ; preds = %94
%100 = tail call i32 @x86_perf_event_set_period(ptr noundef nonnull %97) #2
%101 = load i32, ptr @ARCH_PERFMON_EVENTSEL_ENABLE, align 4, !tbaa !14
%102 = tail call i32 @__x86_pmu_enable_event(ptr noundef nonnull %97, i32 noundef %101) #2
br label %107
103: ; preds = %94
%104 = load i64, ptr @MSR_ARCH_PERFMON_EVENTSEL0, align 8, !tbaa !12
%105 = add nsw i64 %104, 3
%106 = tail call i32 @wrmsrl(i64 noundef %105, i64 noundef 0) #2
br label %107
107: ; preds = %103, %99
ret void
}
declare ptr @this_cpu_ptr(ptr noundef) local_unnamed_addr #1
declare i32 @x86_perf_event_update(ptr noundef) local_unnamed_addr #1
declare i32 @wrmsrl(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @x86_perf_event_set_period(ptr noundef) local_unnamed_addr #1
declare i32 @__x86_pmu_enable_event(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cpu_hw_events", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
| linux_arch_x86_events_intel_extr_core.c_intel_pmu_nhm_workaround |
; ModuleID = 'AnghaBench/beanstalkd/extr_prot.c_wait_for_job.c'
source_filename = "AnghaBench/beanstalkd/extr_prot.c_wait_for_job.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32 }
@STATE_WAIT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wait_for_job], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @wait_for_job(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @STATE_WAIT, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
store i32 %3, ptr %4, align 4, !tbaa !9
%5 = tail call i32 @enqueue_waiting_conn(ptr noundef %0) #2
store i32 %1, ptr %0, align 4, !tbaa !11
%6 = tail call i32 @epollq_add(ptr noundef nonnull %0, i8 noundef signext 104) #2
ret void
}
declare i32 @enqueue_waiting_conn(ptr noundef) local_unnamed_addr #1
declare i32 @epollq_add(ptr noundef, i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"TYPE_5__", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/beanstalkd/extr_prot.c_wait_for_job.c'
source_filename = "AnghaBench/beanstalkd/extr_prot.c_wait_for_job.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@STATE_WAIT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wait_for_job], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wait_for_job(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @STATE_WAIT, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %3, ptr %4, align 4, !tbaa !10
%5 = tail call i32 @enqueue_waiting_conn(ptr noundef %0) #2
store i32 %1, ptr %0, align 4, !tbaa !12
%6 = tail call i32 @epollq_add(ptr noundef nonnull %0, i8 noundef signext 104) #2
ret void
}
declare i32 @enqueue_waiting_conn(ptr noundef) local_unnamed_addr #1
declare i32 @epollq_add(ptr noundef, i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"TYPE_5__", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| beanstalkd_extr_prot.c_wait_for_job |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alphanbsd-tdep.c_alphanbsd_pc_in_sigtramp.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alphanbsd-tdep.c_alphanbsd_pc_in_sigtramp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @alphanbsd_pc_in_sigtramp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @alphanbsd_pc_in_sigtramp(i32 noundef %0, ptr noundef %1) #0 {
%3 = tail call i64 @nbsd_pc_in_sigtramp(i32 noundef %0, ptr noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @alphanbsd_sigtramp_offset(i32 noundef %0) #2
%7 = icmp sgt i64 %6, -1
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
declare i64 @nbsd_pc_in_sigtramp(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @alphanbsd_sigtramp_offset(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alphanbsd-tdep.c_alphanbsd_pc_in_sigtramp.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alphanbsd-tdep.c_alphanbsd_pc_in_sigtramp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @alphanbsd_pc_in_sigtramp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @alphanbsd_pc_in_sigtramp(i32 noundef %0, ptr noundef %1) #0 {
%3 = tail call i64 @nbsd_pc_in_sigtramp(i32 noundef %0, ptr noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @alphanbsd_sigtramp_offset(i32 noundef %0) #2
%7 = icmp sgt i64 %6, -1
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %2
%10 = phi i32 [ 1, %2 ], [ %8, %5 ]
ret i32 %10
}
declare i64 @nbsd_pc_in_sigtramp(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @alphanbsd_sigtramp_offset(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_gdb_gdb_extr_alphanbsd-tdep.c_alphanbsd_pc_in_sigtramp |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/pcmcia/extr_nmclan_cs.c_netdev_get_drvinfo.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/pcmcia/extr_nmclan_cs.c_netdev_get_drvinfo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ethtool_drvinfo = type { i32, i32, i32 }
@DRV_NAME = dso_local local_unnamed_addr global i32 0, align 4
@DRV_VERSION = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [13 x i8] c"PCMCIA 0x%lx\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @netdev_get_drvinfo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @netdev_get_drvinfo(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.ethtool_drvinfo, ptr %1, i64 0, i32 2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = load i32, ptr @DRV_NAME, align 4, !tbaa !10
%6 = tail call i32 @strcpy(i32 noundef %4, i32 noundef %5) #2
%7 = getelementptr inbounds %struct.ethtool_drvinfo, ptr %1, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = load i32, ptr @DRV_VERSION, align 4, !tbaa !10
%10 = tail call i32 @strcpy(i32 noundef %8, i32 noundef %9) #2
%11 = load i32, ptr %1, align 4, !tbaa !12
%12 = load i32, ptr %0, align 4, !tbaa !13
%13 = tail call i32 @sprintf(i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %12) #2
ret void
}
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"ethtool_drvinfo", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"net_device", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/pcmcia/extr_nmclan_cs.c_netdev_get_drvinfo.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/pcmcia/extr_nmclan_cs.c_netdev_get_drvinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DRV_NAME = common local_unnamed_addr global i32 0, align 4
@DRV_VERSION = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [13 x i8] c"PCMCIA 0x%lx\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @netdev_get_drvinfo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @netdev_get_drvinfo(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = load i32, ptr @DRV_NAME, align 4, !tbaa !11
%6 = tail call i32 @strcpy(i32 noundef %4, i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %1, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = load i32, ptr @DRV_VERSION, align 4, !tbaa !11
%10 = tail call i32 @strcpy(i32 noundef %8, i32 noundef %9) #2
%11 = load i32, ptr %1, align 4, !tbaa !13
%12 = load i32, ptr %0, align 4, !tbaa !14
%13 = tail call i32 @sprintf(i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %12) #2
ret void
}
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"ethtool_drvinfo", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"net_device", !8, i64 0}
| fastsocket_kernel_drivers_net_pcmcia_extr_nmclan_cs.c_netdev_get_drvinfo |
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/omap2/omapfb/displays/extr_panel-tpo-td028ttec1.c_td028ttec1_panel_disable.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/omap2/omapfb/displays/extr_panel-tpo-td028ttec1.c_td028ttec1_panel_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.omap_dss_device = type { i32, %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { ptr }
@.str = private unnamed_addr constant [28 x i8] c"td028ttec1_panel_disable()\0A\00", align 1
@JBT_REG_DISPLAY_OFF = dso_local local_unnamed_addr global i32 0, align 4
@JBT_REG_OUTPUT_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@JBT_REG_SLEEP_IN = dso_local local_unnamed_addr global i32 0, align 4
@JBT_REG_POWER_ON_OFF = dso_local local_unnamed_addr global i32 0, align 4
@OMAP_DSS_DISPLAY_DISABLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @td028ttec1_panel_disable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @td028ttec1_panel_disable(ptr noundef %0) #0 {
%2 = tail call ptr @to_panel_data(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @omapdss_device_is_enabled(ptr noundef %0) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %23, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.omap_dss_device, ptr %0, i64 0, i32 2
%8 = load i32, ptr %7, align 8, !tbaa !10
%9 = tail call i32 @dev_dbg(i32 noundef %8, ptr noundef nonnull @.str) #2
%10 = load i32, ptr @JBT_REG_DISPLAY_OFF, align 4, !tbaa !14
%11 = tail call i32 @jbt_ret_write_0(ptr noundef nonnull %2, i32 noundef %10) #2
%12 = load i32, ptr @JBT_REG_OUTPUT_CONTROL, align 4, !tbaa !14
%13 = tail call i32 @jbt_reg_write_2(ptr noundef nonnull %2, i32 noundef %12, i32 noundef 32770) #2
%14 = load i32, ptr @JBT_REG_SLEEP_IN, align 4, !tbaa !14
%15 = tail call i32 @jbt_ret_write_0(ptr noundef nonnull %2, i32 noundef %14) #2
%16 = load i32, ptr @JBT_REG_POWER_ON_OFF, align 4, !tbaa !14
%17 = tail call i32 @jbt_reg_write_1(ptr noundef nonnull %2, i32 noundef %16, i32 noundef 0) #2
%18 = getelementptr inbounds %struct.omap_dss_device, ptr %3, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !15
%20 = load ptr, ptr %19, align 8, !tbaa !16
%21 = tail call i32 %20(ptr noundef %3) #2
%22 = load i32, ptr @OMAP_DSS_DISPLAY_DISABLED, align 4, !tbaa !14
store i32 %22, ptr %0, align 8, !tbaa !18
br label %23
23: ; preds = %1, %6
ret void
}
declare ptr @to_panel_data(ptr noundef) local_unnamed_addr #1
declare i32 @omapdss_device_is_enabled(ptr noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @jbt_ret_write_0(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @jbt_reg_write_2(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @jbt_reg_write_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"panel_drv_data", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"omap_dss_device", !12, i64 0, !13, i64 8, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_4__", !7, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!11, !7, i64 8}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_3__", !7, i64 0}
!18 = !{!11, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/omap2/omapfb/displays/extr_panel-tpo-td028ttec1.c_td028ttec1_panel_disable.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/omap2/omapfb/displays/extr_panel-tpo-td028ttec1.c_td028ttec1_panel_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [28 x i8] c"td028ttec1_panel_disable()\0A\00", align 1
@JBT_REG_DISPLAY_OFF = common local_unnamed_addr global i32 0, align 4
@JBT_REG_OUTPUT_CONTROL = common local_unnamed_addr global i32 0, align 4
@JBT_REG_SLEEP_IN = common local_unnamed_addr global i32 0, align 4
@JBT_REG_POWER_ON_OFF = common local_unnamed_addr global i32 0, align 4
@OMAP_DSS_DISPLAY_DISABLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @td028ttec1_panel_disable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @td028ttec1_panel_disable(ptr noundef %0) #0 {
%2 = tail call ptr @to_panel_data(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @omapdss_device_is_enabled(ptr noundef %0) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %23, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load i32, ptr %7, align 8, !tbaa !11
%9 = tail call i32 @dev_dbg(i32 noundef %8, ptr noundef nonnull @.str) #2
%10 = load i32, ptr @JBT_REG_DISPLAY_OFF, align 4, !tbaa !15
%11 = tail call i32 @jbt_ret_write_0(ptr noundef nonnull %2, i32 noundef %10) #2
%12 = load i32, ptr @JBT_REG_OUTPUT_CONTROL, align 4, !tbaa !15
%13 = tail call i32 @jbt_reg_write_2(ptr noundef nonnull %2, i32 noundef %12, i32 noundef 32770) #2
%14 = load i32, ptr @JBT_REG_SLEEP_IN, align 4, !tbaa !15
%15 = tail call i32 @jbt_ret_write_0(ptr noundef nonnull %2, i32 noundef %14) #2
%16 = load i32, ptr @JBT_REG_POWER_ON_OFF, align 4, !tbaa !15
%17 = tail call i32 @jbt_reg_write_1(ptr noundef nonnull %2, i32 noundef %16, i32 noundef 0) #2
%18 = getelementptr inbounds i8, ptr %3, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !16
%20 = load ptr, ptr %19, align 8, !tbaa !17
%21 = tail call i32 %20(ptr noundef %3) #2
%22 = load i32, ptr @OMAP_DSS_DISPLAY_DISABLED, align 4, !tbaa !15
store i32 %22, ptr %0, align 8, !tbaa !19
br label %23
23: ; preds = %1, %6
ret void
}
declare ptr @to_panel_data(ptr noundef) local_unnamed_addr #1
declare i32 @omapdss_device_is_enabled(ptr noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @jbt_ret_write_0(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @jbt_reg_write_2(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @jbt_reg_write_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"panel_drv_data", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 16}
!12 = !{!"omap_dss_device", !13, i64 0, !14, i64 8, !13, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!"TYPE_4__", !8, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !8, i64 8}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_3__", !8, i64 0}
!19 = !{!12, !13, i64 0}
| linux_drivers_video_fbdev_omap2_omapfb_displays_extr_panel-tpo-td028ttec1.c_td028ttec1_panel_disable |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_gas.c_gas_anqp_build_initial_resp_buf.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_gas.c_gas_anqp_build_initial_resp_buf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @gas_anqp_build_initial_resp_buf(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = icmp eq ptr %3, null
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = tail call ptr @gas_anqp_build_initial_resp(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef 0) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %18, label %15
9: ; preds = %4
%10 = tail call i32 @wpabuf_len(ptr noundef nonnull %3) #2
%11 = tail call ptr @gas_anqp_build_initial_resp(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %10) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %18, label %13
13: ; preds = %9
%14 = tail call i32 @wpabuf_put_buf(ptr noundef nonnull %11, ptr noundef nonnull %3) #2
br label %15
15: ; preds = %6, %13
%16 = phi ptr [ %11, %13 ], [ %7, %6 ]
%17 = tail call i32 @gas_anqp_set_len(ptr noundef nonnull %16) #2
br label %18
18: ; preds = %9, %6, %15
%19 = phi ptr [ %16, %15 ], [ null, %6 ], [ null, %9 ]
ret ptr %19
}
declare ptr @gas_anqp_build_initial_resp(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_len(ptr noundef) local_unnamed_addr #1
declare i32 @wpabuf_put_buf(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @gas_anqp_set_len(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_gas.c_gas_anqp_build_initial_resp_buf.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_gas.c_gas_anqp_build_initial_resp_buf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @gas_anqp_build_initial_resp_buf(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = icmp eq ptr %3, null
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = tail call ptr @gas_anqp_build_initial_resp(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef 0) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %18, label %15
9: ; preds = %4
%10 = tail call i32 @wpabuf_len(ptr noundef nonnull %3) #2
%11 = tail call ptr @gas_anqp_build_initial_resp(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %10) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %18, label %13
13: ; preds = %9
%14 = tail call i32 @wpabuf_put_buf(ptr noundef nonnull %11, ptr noundef nonnull %3) #2
br label %15
15: ; preds = %6, %13
%16 = phi ptr [ %11, %13 ], [ %7, %6 ]
%17 = tail call i32 @gas_anqp_set_len(ptr noundef nonnull %16) #2
br label %18
18: ; preds = %9, %6, %15
%19 = phi ptr [ %16, %15 ], [ null, %6 ], [ null, %9 ]
ret ptr %19
}
declare ptr @gas_anqp_build_initial_resp(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_len(ptr noundef) local_unnamed_addr #1
declare i32 @wpabuf_put_buf(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @gas_anqp_set_len(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_wpa_src_common_extr_gas.c_gas_anqp_build_initial_resp_buf |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/kern/extr_thread_act.c_act_set_ast_async.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/kern/extr_thread_act.c_act_set_ast_async.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @act_set_ast_async], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @act_set_ast_async(i64 noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @thread_ast_set(i64 noundef %0, i32 noundef %1) #2
%4 = tail call i64 (...) @current_thread() #2
%5 = icmp eq i64 %4, %0
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 (...) @splsched() #2
%8 = tail call i32 @ast_propagate(i64 noundef %0) #2
%9 = tail call i32 @splx(i32 noundef %7) #2
br label %10
10: ; preds = %6, %2
ret void
}
declare i32 @thread_ast_set(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @current_thread(...) local_unnamed_addr #1
declare i32 @splsched(...) local_unnamed_addr #1
declare i32 @ast_propagate(i64 noundef) local_unnamed_addr #1
declare i32 @splx(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/kern/extr_thread_act.c_act_set_ast_async.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/kern/extr_thread_act.c_act_set_ast_async.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @act_set_ast_async], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @act_set_ast_async(i64 noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @thread_ast_set(i64 noundef %0, i32 noundef %1) #2
%4 = tail call i64 @current_thread() #2
%5 = icmp eq i64 %4, %0
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 @splsched() #2
%8 = tail call i32 @ast_propagate(i64 noundef %0) #2
%9 = tail call i32 @splx(i32 noundef %7) #2
br label %10
10: ; preds = %6, %2
ret void
}
declare i32 @thread_ast_set(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @current_thread(...) local_unnamed_addr #1
declare i32 @splsched(...) local_unnamed_addr #1
declare i32 @ast_propagate(i64 noundef) local_unnamed_addr #1
declare i32 @splx(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_osfmk_kern_extr_thread_act.c_act_set_ast_async |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/be2iscsi/extr_be_mgmt.c_mgmt_set_vlan.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/be2iscsi/extr_be_mgmt.c_mgmt_set_vlan.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@KERN_ERR = dso_local local_unnamed_addr global i32 0, align 4
@BEISCSI_LOG_CONFIG = dso_local local_unnamed_addr global i32 0, align 4
@BEISCSI_LOG_MBOX = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"BG_%d : VLAN Setting Failed\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [29 x i8] c"BS_%d : VLAN MBX Cmd Failed\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @mgmt_set_vlan(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !5
%4 = tail call i32 @be_cmd_set_vlan(ptr noundef %0, i32 noundef %1) #3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = load i32, ptr @KERN_ERR, align 4, !tbaa !9
%8 = load i32, ptr @BEISCSI_LOG_CONFIG, align 4, !tbaa !9
%9 = load i32, ptr @BEISCSI_LOG_MBOX, align 4, !tbaa !9
%10 = or i32 %9, %8
%11 = tail call i32 @beiscsi_log(ptr noundef %0, i32 noundef %7, i32 noundef %10, ptr noundef nonnull @.str) #3
%12 = load i32, ptr @EBUSY, align 4, !tbaa !9
%13 = sub nsw i32 0, %12
br label %23
14: ; preds = %2
%15 = call i32 @beiscsi_mccq_compl(ptr noundef %0, i32 noundef %4, ptr noundef nonnull %3, ptr noundef null) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %23, label %17
17: ; preds = %14
%18 = load i32, ptr @KERN_ERR, align 4, !tbaa !9
%19 = load i32, ptr @BEISCSI_LOG_CONFIG, align 4, !tbaa !9
%20 = load i32, ptr @BEISCSI_LOG_MBOX, align 4, !tbaa !9
%21 = or i32 %20, %19
%22 = call i32 @beiscsi_log(ptr noundef %0, i32 noundef %18, i32 noundef %21, ptr noundef nonnull @.str.1) #3
br label %23
23: ; preds = %14, %17, %6
%24 = phi i32 [ %15, %17 ], [ %13, %6 ], [ 0, %14 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @be_cmd_set_vlan(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @beiscsi_log(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @beiscsi_mccq_compl(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/be2iscsi/extr_be_mgmt.c_mgmt_set_vlan.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/be2iscsi/extr_be_mgmt.c_mgmt_set_vlan.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KERN_ERR = common local_unnamed_addr global i32 0, align 4
@BEISCSI_LOG_CONFIG = common local_unnamed_addr global i32 0, align 4
@BEISCSI_LOG_MBOX = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"BG_%d : VLAN Setting Failed\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [29 x i8] c"BS_%d : VLAN MBX Cmd Failed\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mgmt_set_vlan(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
store ptr null, ptr %3, align 8, !tbaa !6
%4 = tail call i32 @be_cmd_set_vlan(ptr noundef %0, i32 noundef %1) #3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = load i32, ptr @KERN_ERR, align 4, !tbaa !10
%8 = load i32, ptr @BEISCSI_LOG_CONFIG, align 4, !tbaa !10
%9 = load i32, ptr @BEISCSI_LOG_MBOX, align 4, !tbaa !10
%10 = or i32 %9, %8
%11 = tail call i32 @beiscsi_log(ptr noundef %0, i32 noundef %7, i32 noundef %10, ptr noundef nonnull @.str) #3
%12 = load i32, ptr @EBUSY, align 4, !tbaa !10
%13 = sub nsw i32 0, %12
br label %23
14: ; preds = %2
%15 = call i32 @beiscsi_mccq_compl(ptr noundef %0, i32 noundef %4, ptr noundef nonnull %3, ptr noundef null) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %23, label %17
17: ; preds = %14
%18 = load i32, ptr @KERN_ERR, align 4, !tbaa !10
%19 = load i32, ptr @BEISCSI_LOG_CONFIG, align 4, !tbaa !10
%20 = load i32, ptr @BEISCSI_LOG_MBOX, align 4, !tbaa !10
%21 = or i32 %20, %19
%22 = call i32 @beiscsi_log(ptr noundef %0, i32 noundef %18, i32 noundef %21, ptr noundef nonnull @.str.1) #3
br label %23
23: ; preds = %14, %17, %6
%24 = phi i32 [ %15, %17 ], [ %13, %6 ], [ 0, %14 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @be_cmd_set_vlan(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @beiscsi_log(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @beiscsi_mccq_compl(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| fastsocket_kernel_drivers_scsi_be2iscsi_extr_be_mgmt.c_mgmt_set_vlan |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/core/oss/extr_pcm_oss.c_snd_pcm_oss_set_subdivide1.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/core/oss/extr_pcm_oss.c_snd_pcm_oss_set_subdivide1.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32, i64 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_pcm_oss_set_subdivide1], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @snd_pcm_oss_set_subdivide1(ptr noundef readonly %0, i32 noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %26, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = tail call ptr @oss_runtime(i32 noundef %5) #3
%7 = icmp eq i32 %1, 0
%8 = load i32, ptr %6, align 8, !tbaa !10
br i1 %7, label %9, label %11
9: ; preds = %4
%10 = tail call i32 @llvm.umax.i32(i32 %8, i32 1)
br label %26
11: ; preds = %4
%12 = icmp eq i32 %8, 0
br i1 %12, label %13, label %17
13: ; preds = %11
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %6, i64 0, i32 2
%15 = load i64, ptr %14, align 8, !tbaa !14
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %13, %11
%18 = load i32, ptr @EINVAL, align 4, !tbaa !15
%19 = sub nsw i32 0, %18
br label %26
20: ; preds = %13
switch i32 %1, label %21 [
i32 16, label %24
i32 8, label %24
i32 4, label %24
i32 2, label %24
i32 1, label %24
]
21: ; preds = %20
%22 = load i32, ptr @EINVAL, align 4, !tbaa !15
%23 = sub nsw i32 0, %22
br label %26
24: ; preds = %20, %20, %20, %20, %20
store i32 %1, ptr %6, align 8, !tbaa !10
%25 = getelementptr inbounds %struct.TYPE_2__, ptr %6, i64 0, i32 1
store i32 1, ptr %25, align 4, !tbaa !16
br label %26
26: ; preds = %2, %24, %21, %17, %9
%27 = phi i32 [ %10, %9 ], [ %19, %17 ], [ %23, %21 ], [ %1, %24 ], [ 0, %2 ]
ret i32 %27
}
declare ptr @oss_runtime(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_pcm_substream", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"snd_pcm_runtime2", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !13, i64 8}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !13, i64 8}
!15 = !{!7, !7, i64 0}
!16 = !{!11, !7, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/core/oss/extr_pcm_oss.c_snd_pcm_oss_set_subdivide1.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/core/oss/extr_pcm_oss.c_snd_pcm_oss_set_subdivide1.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_pcm_oss_set_subdivide1], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @snd_pcm_oss_set_subdivide1(ptr noundef readonly %0, i32 noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %26, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = tail call ptr @oss_runtime(i32 noundef %5) #3
%7 = icmp eq i32 %1, 0
%8 = load i32, ptr %6, align 8, !tbaa !11
br i1 %7, label %9, label %11
9: ; preds = %4
%10 = tail call i32 @llvm.umax.i32(i32 %8, i32 1)
br label %26
11: ; preds = %4
%12 = icmp eq i32 %8, 0
br i1 %12, label %13, label %17
13: ; preds = %11
%14 = getelementptr inbounds i8, ptr %6, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !15
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %13, %11
%18 = load i32, ptr @EINVAL, align 4, !tbaa !16
%19 = sub nsw i32 0, %18
br label %26
20: ; preds = %13
switch i32 %1, label %21 [
i32 16, label %24
i32 8, label %24
i32 4, label %24
i32 2, label %24
i32 1, label %24
]
21: ; preds = %20
%22 = load i32, ptr @EINVAL, align 4, !tbaa !16
%23 = sub nsw i32 0, %22
br label %26
24: ; preds = %20, %20, %20, %20, %20
store i32 %1, ptr %6, align 8, !tbaa !11
%25 = getelementptr inbounds i8, ptr %6, i64 4
store i32 1, ptr %25, align 4, !tbaa !17
br label %26
26: ; preds = %2, %24, %21, %17, %9
%27 = phi i32 [ %10, %9 ], [ %19, %17 ], [ %23, %21 ], [ %1, %24 ], [ 0, %2 ]
ret i32 %27
}
declare ptr @oss_runtime(i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_pcm_substream", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"snd_pcm_runtime2", !13, i64 0}
!13 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !14, i64 8}
!14 = !{!"long", !9, i64 0}
!15 = !{!12, !14, i64 8}
!16 = !{!8, !8, i64 0}
!17 = !{!12, !8, i64 4}
| fastsocket_kernel_sound_core_oss_extr_pcm_oss.c_snd_pcm_oss_set_subdivide1 |
; ModuleID = 'AnghaBench/libgit2/tests/repo/extr_init.c_test_repo_init__nonexisting_directory.c'
source_filename = "AnghaBench/libgit2/tests/repo/extr_init.c_test_repo_init__nonexisting_directory.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GIT_REPOSITORY_INIT_OPTIONS_INIT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [17 x i8] c"nonexisting/path\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @test_repo_init__nonexisting_directory() local_unnamed_addr #0 {
%1 = alloca i32, align 4
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%3 = load i32, ptr @GIT_REPOSITORY_INIT_OPTIONS_INIT, align 4, !tbaa !5
store i32 %3, ptr %1, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%4 = call i32 @git_repository_init_ext(ptr noundef nonnull %2, ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%5 = call i32 @cl_git_fail(i32 noundef %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_fail(i32 noundef) local_unnamed_addr #2
declare i32 @git_repository_init_ext(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/libgit2/tests/repo/extr_init.c_test_repo_init__nonexisting_directory.c'
source_filename = "AnghaBench/libgit2/tests/repo/extr_init.c_test_repo_init__nonexisting_directory.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GIT_REPOSITORY_INIT_OPTIONS_INIT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [17 x i8] c"nonexisting/path\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_repo_init__nonexisting_directory() local_unnamed_addr #0 {
%1 = alloca i32, align 4
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%3 = load i32, ptr @GIT_REPOSITORY_INIT_OPTIONS_INIT, align 4, !tbaa !6
store i32 %3, ptr %1, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%4 = call i32 @git_repository_init_ext(ptr noundef nonnull %2, ptr noundef nonnull @.str, ptr noundef nonnull %1) #3
%5 = call i32 @cl_git_fail(i32 noundef %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_fail(i32 noundef) local_unnamed_addr #2
declare i32 @git_repository_init_ext(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| libgit2_tests_repo_extr_init.c_test_repo_init__nonexisting_directory |
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_move_32_pi_pi.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_move_32_pi_pi.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FLAG_N = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_Z = dso_local local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_V = dso_local local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_C = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @m68k_op_move_32_pi_pi], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @m68k_op_move_32_pi_pi() #0 {
%1 = tail call i32 (...) @OPER_AY_PI_32() #2
%2 = tail call i32 (...) @EA_AX_PI_32() #2
%3 = tail call i32 @NFLAG_32(i32 noundef %1) #2
store i32 %3, ptr @FLAG_N, align 4, !tbaa !5
store i32 %1, ptr @FLAG_Z, align 4, !tbaa !5
%4 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !5
store i32 %4, ptr @FLAG_V, align 4, !tbaa !5
%5 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !5
store i32 %5, ptr @FLAG_C, align 4, !tbaa !5
%6 = tail call i32 @m68ki_write_32(i32 noundef %2, i32 noundef %1) #2
ret void
}
declare i32 @OPER_AY_PI_32(...) local_unnamed_addr #1
declare i32 @EA_AX_PI_32(...) local_unnamed_addr #1
declare i32 @NFLAG_32(i32 noundef) local_unnamed_addr #1
declare i32 @m68ki_write_32(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_move_32_pi_pi.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_move_32_pi_pi.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FLAG_N = common local_unnamed_addr global i32 0, align 4
@FLAG_Z = common local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_V = common local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_C = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @m68k_op_move_32_pi_pi], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @m68k_op_move_32_pi_pi() #0 {
%1 = tail call i32 @OPER_AY_PI_32() #2
%2 = tail call i32 @EA_AX_PI_32() #2
%3 = tail call i32 @NFLAG_32(i32 noundef %1) #2
store i32 %3, ptr @FLAG_N, align 4, !tbaa !6
store i32 %1, ptr @FLAG_Z, align 4, !tbaa !6
%4 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !6
store i32 %4, ptr @FLAG_V, align 4, !tbaa !6
%5 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !6
store i32 %5, ptr @FLAG_C, align 4, !tbaa !6
%6 = tail call i32 @m68ki_write_32(i32 noundef %2, i32 noundef %1) #2
ret void
}
declare i32 @OPER_AY_PI_32(...) local_unnamed_addr #1
declare i32 @EA_AX_PI_32(...) local_unnamed_addr #1
declare i32 @NFLAG_32(i32 noundef) local_unnamed_addr #1
declare i32 @m68ki_write_32(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_genplusgx_source_m68k_extr_m68kops.h_m68k_op_move_32_pi_pi |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_set_par.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_set_par.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cirrusfb_set_par], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cirrusfb_set_par(ptr noundef %0) #0 {
%2 = tail call i32 @cirrusfb_set_par_foo(ptr noundef %0) #2
%3 = tail call i32 @cirrusfb_set_par_foo(ptr noundef %0) #2
ret i32 %3
}
declare i32 @cirrusfb_set_par_foo(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_set_par.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/extr_cirrusfb.c_cirrusfb_set_par.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cirrusfb_set_par], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cirrusfb_set_par(ptr noundef %0) #0 {
%2 = tail call i32 @cirrusfb_set_par_foo(ptr noundef %0) #2
%3 = tail call i32 @cirrusfb_set_par_foo(ptr noundef %0) #2
ret i32 %3
}
declare i32 @cirrusfb_set_par_foo(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_video_extr_cirrusfb.c_cirrusfb_set_par |
; ModuleID = 'AnghaBench/linux/drivers/media/usb/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_get_type.c'
source_filename = "AnghaBench/linux/drivers/media/usb/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_get_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local ptr @pvr2_hdw_get_type(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !10
ret ptr %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pvr2_hdw", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_get_type.c'
source_filename = "AnghaBench/linux/drivers/media/usb/pvrusb2/extr_pvrusb2-hdw.c_pvr2_hdw_get_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define ptr @pvr2_hdw_get_type(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
ret ptr %3
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pvr2_hdw", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
| linux_drivers_media_usb_pvrusb2_extr_pvrusb2-hdw.c_pvr2_hdw_get_type |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_join.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_join.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GFP_NOIO = dso_local local_unnamed_addr global i32 0, align 4
@__GFP_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"%s/%s\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @join], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @join(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i8, ptr %1, align 1
%4 = icmp eq i8 %3, 0
%5 = load i32, ptr @GFP_NOIO, align 4, !tbaa !5
%6 = load i32, ptr @__GFP_HIGH, align 4, !tbaa !5
%7 = or i32 %6, %5
br i1 %4, label %8, label %10
8: ; preds = %2
%9 = tail call ptr (i32, ptr, ptr, ...) @kasprintf(i32 noundef %7, ptr noundef nonnull @.str, ptr noundef %0) #2
br label %12
10: ; preds = %2
%11 = tail call ptr (i32, ptr, ptr, ...) @kasprintf(i32 noundef %7, ptr noundef nonnull @.str.1, ptr noundef %0, ptr noundef nonnull %1) #2
br label %12
12: ; preds = %10, %8
%13 = phi ptr [ %9, %8 ], [ %11, %10 ]
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%17 = sub nsw i32 0, %16
%18 = tail call ptr @ERR_PTR(i32 noundef %17) #2
br label %19
19: ; preds = %12, %15
%20 = phi ptr [ %18, %15 ], [ %13, %12 ]
ret ptr %20
}
declare ptr @kasprintf(i32 noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_join.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/xen/xenbus/extr_xenbus_xs.c_join.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_NOIO = common local_unnamed_addr global i32 0, align 4
@__GFP_HIGH = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"%s/%s\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @join], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @join(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i8, ptr %1, align 1
%4 = icmp eq i8 %3, 0
%5 = load i32, ptr @GFP_NOIO, align 4, !tbaa !6
%6 = load i32, ptr @__GFP_HIGH, align 4, !tbaa !6
%7 = or i32 %6, %5
br i1 %4, label %8, label %10
8: ; preds = %2
%9 = tail call ptr (i32, ptr, ptr, ...) @kasprintf(i32 noundef %7, ptr noundef nonnull @.str, ptr noundef %0) #2
br label %12
10: ; preds = %2
%11 = tail call ptr (i32, ptr, ptr, ...) @kasprintf(i32 noundef %7, ptr noundef nonnull @.str.1, ptr noundef %0, ptr noundef nonnull %1) #2
br label %12
12: ; preds = %10, %8
%13 = phi ptr [ %9, %8 ], [ %11, %10 ]
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%17 = sub nsw i32 0, %16
%18 = tail call ptr @ERR_PTR(i32 noundef %17) #2
br label %19
19: ; preds = %12, %15
%20 = phi ptr [ %18, %15 ], [ %13, %12 ]
ret ptr %20
}
declare ptr @kasprintf(i32 noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_xen_xenbus_extr_xenbus_xs.c_join |
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/gatt/extr_gatt_utils.c_gatt_add_bg_dev_list.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/gatt/extr_gatt_utils.c_gatt_add_bg_dev_list.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { ptr, ptr }
%struct.TYPE_6__ = type { i64, i64 }
@FALSE = dso_local local_unnamed_addr global i64 0, align 8
@GATT_MAX_APPS = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [37 x i8] c"device already in iniator white list\00", align 1
@TRUE = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [33 x i8] c"device already in adv white list\00", align 1
@GATT_LISTEN_TO_ALL = dso_local local_unnamed_addr global i64 0, align 8
@GATT_LISTEN_TO_NONE = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [27 x i8] c"no device record available\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i64 @gatt_add_bg_dev_list(ptr nocapture noundef %0, i32 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = load i64, ptr @FALSE, align 8, !tbaa !10
%6 = tail call ptr @gatt_find_bg_dev(i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = tail call ptr @gatt_alloc_bg_dev(i32 noundef %1) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %62, label %11
11: ; preds = %3, %8
%12 = phi ptr [ %9, %8 ], [ %6, %3 ]
%13 = load i64, ptr @GATT_MAX_APPS, align 8, !tbaa !10
%14 = icmp eq i64 %13, 0
br i1 %14, label %64, label %15
15: ; preds = %11
%16 = icmp eq i64 %2, 0
%17 = getelementptr inbounds %struct.TYPE_7__, ptr %12, i64 0, i32 1
br label %18
18: ; preds = %15, %59
%19 = phi i64 [ 0, %15 ], [ %60, %59 ]
br i1 %16, label %36, label %20
20: ; preds = %18
%21 = load ptr, ptr %12, align 8, !tbaa !11
%22 = getelementptr inbounds i64, ptr %21, i64 %19
%23 = load i64, ptr %22, align 8, !tbaa !10
%24 = icmp eq i64 %23, %4
br i1 %24, label %25, label %28
25: ; preds = %20
%26 = tail call i32 @GATT_TRACE_ERROR(ptr noundef nonnull @.str) #2
%27 = load i64, ptr @TRUE, align 8, !tbaa !10
br label %64
28: ; preds = %20
%29 = icmp eq i64 %23, 0
br i1 %29, label %30, label %59
30: ; preds = %28
%31 = getelementptr inbounds i64, ptr %21, i64 %19
store i64 %4, ptr %31, align 8, !tbaa !10
%32 = icmp eq i64 %19, 0
%33 = load i64, ptr @TRUE, align 8, !tbaa !10
br i1 %32, label %34, label %64
34: ; preds = %30
%35 = tail call i64 @BTM_BleUpdateBgConnDev(i64 noundef %33, i32 noundef %1) #2
br label %64
36: ; preds = %18
%37 = load ptr, ptr %17, align 8, !tbaa !14
%38 = getelementptr inbounds i64, ptr %37, i64 %19
%39 = load i64, ptr %38, align 8, !tbaa !10
%40 = icmp eq i64 %39, %4
br i1 %40, label %41, label %44
41: ; preds = %36
%42 = tail call i32 @GATT_TRACE_ERROR(ptr noundef nonnull @.str.1) #2
%43 = load i64, ptr @TRUE, align 8, !tbaa !10
br label %64
44: ; preds = %36
%45 = icmp eq i64 %39, 0
br i1 %45, label %46, label %59
46: ; preds = %44
%47 = getelementptr inbounds i64, ptr %37, i64 %19
%48 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%49 = load i64, ptr %48, align 8, !tbaa !15
%50 = load i64, ptr @GATT_LISTEN_TO_ALL, align 8, !tbaa !10
%51 = icmp eq i64 %49, %50
%52 = load i64, ptr @GATT_LISTEN_TO_NONE, align 8
%53 = select i1 %51, i64 %52, i64 %49
%54 = add nsw i64 %53, 1
store i64 %54, ptr %48, align 8, !tbaa !15
store i64 %4, ptr %47, align 8, !tbaa !10
%55 = icmp eq i64 %19, 0
%56 = load i64, ptr @TRUE, align 8, !tbaa !10
br i1 %55, label %57, label %64
57: ; preds = %46
%58 = tail call i64 @BTM_BleUpdateAdvWhitelist(i64 noundef %56, i32 noundef %1, i32 noundef 0, ptr noundef null) #2
br label %64
59: ; preds = %28, %44
%60 = add nuw i64 %19, 1
%61 = icmp eq i64 %60, %13
br i1 %61, label %64, label %18, !llvm.loop !16
62: ; preds = %8
%63 = tail call i32 @GATT_TRACE_ERROR(ptr noundef nonnull @.str.2) #2
br label %64
64: ; preds = %59, %46, %30, %11, %62, %57, %34, %41, %25
%65 = phi i64 [ %27, %25 ], [ %43, %41 ], [ %35, %34 ], [ %58, %57 ], [ %5, %62 ], [ %5, %11 ], [ %33, %30 ], [ %56, %46 ], [ %5, %59 ]
ret i64 %65
}
declare ptr @gatt_find_bg_dev(i32 noundef) local_unnamed_addr #1
declare ptr @gatt_alloc_bg_dev(i32 noundef) local_unnamed_addr #1
declare i32 @GATT_TRACE_ERROR(ptr noundef) local_unnamed_addr #1
declare i64 @BTM_BleUpdateBgConnDev(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @BTM_BleUpdateAdvWhitelist(i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_7__", !13, i64 0, !13, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!6, !7, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/gatt/extr_gatt_utils.c_gatt_add_bg_dev_list.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/gatt/extr_gatt_utils.c_gatt_add_bg_dev_list.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALSE = common local_unnamed_addr global i64 0, align 8
@GATT_MAX_APPS = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [37 x i8] c"device already in iniator white list\00", align 1
@TRUE = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [33 x i8] c"device already in adv white list\00", align 1
@GATT_LISTEN_TO_ALL = common local_unnamed_addr global i64 0, align 8
@GATT_LISTEN_TO_NONE = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [27 x i8] c"no device record available\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @gatt_add_bg_dev_list(ptr nocapture noundef %0, i32 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = load i64, ptr @FALSE, align 8, !tbaa !11
%6 = tail call ptr @gatt_find_bg_dev(i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = tail call ptr @gatt_alloc_bg_dev(i32 noundef %1) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %62, label %11
11: ; preds = %3, %8
%12 = phi ptr [ %9, %8 ], [ %6, %3 ]
%13 = load i64, ptr @GATT_MAX_APPS, align 8, !tbaa !11
%14 = icmp eq i64 %13, 0
br i1 %14, label %64, label %15
15: ; preds = %11
%16 = icmp eq i64 %2, 0
%17 = getelementptr inbounds i8, ptr %12, i64 8
br label %18
18: ; preds = %15, %59
%19 = phi i64 [ 0, %15 ], [ %60, %59 ]
br i1 %16, label %36, label %20
20: ; preds = %18
%21 = load ptr, ptr %12, align 8, !tbaa !12
%22 = getelementptr inbounds i64, ptr %21, i64 %19
%23 = load i64, ptr %22, align 8, !tbaa !11
%24 = icmp eq i64 %23, %4
br i1 %24, label %25, label %28
25: ; preds = %20
%26 = tail call i32 @GATT_TRACE_ERROR(ptr noundef nonnull @.str) #2
%27 = load i64, ptr @TRUE, align 8, !tbaa !11
br label %64
28: ; preds = %20
%29 = icmp eq i64 %23, 0
br i1 %29, label %30, label %59
30: ; preds = %28
%31 = getelementptr inbounds i64, ptr %21, i64 %19
store i64 %4, ptr %31, align 8, !tbaa !11
%32 = icmp eq i64 %19, 0
%33 = load i64, ptr @TRUE, align 8, !tbaa !11
br i1 %32, label %34, label %64
34: ; preds = %30
%35 = tail call i64 @BTM_BleUpdateBgConnDev(i64 noundef %33, i32 noundef %1) #2
br label %64
36: ; preds = %18
%37 = load ptr, ptr %17, align 8, !tbaa !15
%38 = getelementptr inbounds i64, ptr %37, i64 %19
%39 = load i64, ptr %38, align 8, !tbaa !11
%40 = icmp eq i64 %39, %4
br i1 %40, label %41, label %44
41: ; preds = %36
%42 = tail call i32 @GATT_TRACE_ERROR(ptr noundef nonnull @.str.1) #2
%43 = load i64, ptr @TRUE, align 8, !tbaa !11
br label %64
44: ; preds = %36
%45 = icmp eq i64 %39, 0
br i1 %45, label %46, label %59
46: ; preds = %44
%47 = getelementptr inbounds i64, ptr %37, i64 %19
%48 = getelementptr inbounds i8, ptr %0, i64 8
%49 = load i64, ptr %48, align 8, !tbaa !16
%50 = load i64, ptr @GATT_LISTEN_TO_ALL, align 8, !tbaa !11
%51 = icmp eq i64 %49, %50
%52 = load i64, ptr @GATT_LISTEN_TO_NONE, align 8
%53 = select i1 %51, i64 %52, i64 %49
%54 = add nsw i64 %53, 1
store i64 %54, ptr %48, align 8, !tbaa !16
store i64 %4, ptr %47, align 8, !tbaa !11
%55 = icmp eq i64 %19, 0
%56 = load i64, ptr @TRUE, align 8, !tbaa !11
br i1 %55, label %57, label %64
57: ; preds = %46
%58 = tail call i64 @BTM_BleUpdateAdvWhitelist(i64 noundef %56, i32 noundef %1, i32 noundef 0, ptr noundef null) #2
br label %64
59: ; preds = %28, %44
%60 = add nuw i64 %19, 1
%61 = icmp eq i64 %60, %13
br i1 %61, label %64, label %18, !llvm.loop !17
62: ; preds = %8
%63 = tail call i32 @GATT_TRACE_ERROR(ptr noundef nonnull @.str.2) #2
br label %64
64: ; preds = %59, %46, %30, %11, %62, %57, %34, %41, %25
%65 = phi i64 [ %27, %25 ], [ %43, %41 ], [ %35, %34 ], [ %58, %57 ], [ %5, %62 ], [ %5, %11 ], [ %33, %30 ], [ %56, %46 ], [ %5, %59 ]
ret i64 %65
}
declare ptr @gatt_find_bg_dev(i32 noundef) local_unnamed_addr #1
declare ptr @gatt_alloc_bg_dev(i32 noundef) local_unnamed_addr #1
declare i32 @GATT_TRACE_ERROR(ptr noundef) local_unnamed_addr #1
declare i64 @BTM_BleUpdateBgConnDev(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @BTM_BleUpdateAdvWhitelist(i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_7__", !14, i64 0, !14, i64 8}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!7, !8, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| esp-idf_components_bt_host_bluedroid_stack_gatt_extr_gatt_utils.c_gatt_add_bg_dev_list |
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scu.c_writeloadimdest.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scu.c_writeloadimdest.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
@ScuDsp = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @writeloadimdest], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal void @writeloadimdest(i32 noundef %0, i32 noundef %1) #0 {
switch i32 %0, label %74 [
i32 0, label %3
i32 1, label %13
i32 2, label %25
i32 3, label %37
i32 4, label %49
i32 5, label %52
i32 6, label %55
i32 7, label %59
i32 10, label %63
i32 12, label %66
]
3: ; preds = %2
%4 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !9
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = load i64, ptr %8, align 8, !tbaa !14
%10 = getelementptr inbounds i32, ptr %6, i64 %9
store i32 %1, ptr %10, align 4, !tbaa !16
%11 = add i64 %9, 1
%12 = and i64 %11, 63
store i64 %12, ptr %8, align 8, !tbaa !14
br label %74
13: ; preds = %2
%14 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%15 = load ptr, ptr %14, align 8, !tbaa !9
%16 = getelementptr inbounds ptr, ptr %15, i64 1
%17 = load ptr, ptr %16, align 8, !tbaa !5
%18 = getelementptr inbounds %struct.TYPE_4__, ptr %14, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = getelementptr inbounds i64, ptr %19, i64 1
%21 = load i64, ptr %20, align 8, !tbaa !14
%22 = getelementptr inbounds i32, ptr %17, i64 %21
store i32 %1, ptr %22, align 4, !tbaa !16
%23 = add i64 %21, 1
%24 = and i64 %23, 63
store i64 %24, ptr %20, align 8, !tbaa !14
br label %74
25: ; preds = %2
%26 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%27 = load ptr, ptr %26, align 8, !tbaa !9
%28 = getelementptr inbounds ptr, ptr %27, i64 2
%29 = load ptr, ptr %28, align 8, !tbaa !5
%30 = getelementptr inbounds %struct.TYPE_4__, ptr %26, i64 0, i32 1
%31 = load ptr, ptr %30, align 8, !tbaa !13
%32 = getelementptr inbounds i64, ptr %31, i64 2
%33 = load i64, ptr %32, align 8, !tbaa !14
%34 = getelementptr inbounds i32, ptr %29, i64 %33
store i32 %1, ptr %34, align 4, !tbaa !16
%35 = add i64 %33, 1
%36 = and i64 %35, 63
store i64 %36, ptr %32, align 8, !tbaa !14
br label %74
37: ; preds = %2
%38 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%39 = load ptr, ptr %38, align 8, !tbaa !9
%40 = getelementptr inbounds ptr, ptr %39, i64 3
%41 = load ptr, ptr %40, align 8, !tbaa !5
%42 = getelementptr inbounds %struct.TYPE_4__, ptr %38, i64 0, i32 1
%43 = load ptr, ptr %42, align 8, !tbaa !13
%44 = getelementptr inbounds i64, ptr %43, i64 3
%45 = load i64, ptr %44, align 8, !tbaa !14
%46 = getelementptr inbounds i32, ptr %41, i64 %45
store i32 %1, ptr %46, align 4, !tbaa !16
%47 = add i64 %45, 1
%48 = and i64 %47, 63
store i64 %48, ptr %44, align 8, !tbaa !14
br label %74
49: ; preds = %2
%50 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%51 = getelementptr inbounds %struct.TYPE_4__, ptr %50, i64 0, i32 2
store i32 %1, ptr %51, align 8, !tbaa !17
br label %74
52: ; preds = %2
%53 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%54 = getelementptr inbounds %struct.TYPE_4__, ptr %53, i64 0, i32 10
store i32 %1, ptr %54, align 8, !tbaa !18
br label %74
55: ; preds = %2
%56 = and i32 %1, 33554431
%57 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%58 = getelementptr inbounds %struct.TYPE_4__, ptr %57, i64 0, i32 3
store i32 %56, ptr %58, align 4, !tbaa !19
br label %74
59: ; preds = %2
%60 = and i32 %1, 33554431
%61 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%62 = getelementptr inbounds %struct.TYPE_4__, ptr %61, i64 0, i32 4
store i32 %60, ptr %62, align 8, !tbaa !20
br label %74
63: ; preds = %2
%64 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%65 = getelementptr inbounds %struct.TYPE_4__, ptr %64, i64 0, i32 9
store i32 %1, ptr %65, align 4, !tbaa !21
br label %74
66: ; preds = %2
%67 = load ptr, ptr @ScuDsp, align 8, !tbaa !5
%68 = getelementptr inbounds %struct.TYPE_4__, ptr %67, i64 0, i32 7
%69 = load i32, ptr %68, align 4, !tbaa !22
%70 = add nsw i32 %69, 1
%71 = getelementptr inbounds %struct.TYPE_4__, ptr %67, i64 0, i32 8
store i32 %70, ptr %71, align 8, !tbaa !23
%72 = getelementptr inbounds %struct.TYPE_4__, ptr %67, i64 0, i32 5
store i32 %1, ptr %72, align 4, !tbaa !24
%73 = getelementptr inbounds %struct.TYPE_4__, ptr %67, i64 0, i32 6
store i32 0, ptr %73, align 8, !tbaa !25
br label %74
74: ; preds = %2, %3, %13, %25, %37, %49, %52, %55, %59, %63, %66
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !12, i64 48}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_3__", !11, i64 0}
!13 = !{!10, !6, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!10, !11, i64 16}
!18 = !{!10, !11, i64 48}
!19 = !{!10, !11, i64 20}
!20 = !{!10, !11, i64 24}
!21 = !{!10, !11, i64 44}
!22 = !{!10, !11, i64 36}
!23 = !{!10, !11, i64 40}
!24 = !{!10, !11, i64 28}
!25 = !{!10, !11, i64 32}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scu.c_writeloadimdest.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_scu.c_writeloadimdest.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ScuDsp = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @writeloadimdest], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @writeloadimdest(i32 noundef %0, i32 noundef %1) #0 {
switch i32 %0, label %74 [
i32 0, label %3
i32 1, label %13
i32 2, label %25
i32 3, label %37
i32 4, label %49
i32 5, label %52
i32 6, label %55
i32 7, label %59
i32 10, label %63
i32 12, label %66
]
3: ; preds = %2
%4 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %4, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = load i64, ptr %8, align 8, !tbaa !15
%10 = getelementptr inbounds i32, ptr %6, i64 %9
store i32 %1, ptr %10, align 4, !tbaa !17
%11 = add i64 %9, 1
%12 = and i64 %11, 63
store i64 %12, ptr %8, align 8, !tbaa !15
br label %74
13: ; preds = %2
%14 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%15 = load ptr, ptr %14, align 8, !tbaa !10
%16 = getelementptr inbounds i8, ptr %15, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !6
%18 = getelementptr inbounds i8, ptr %14, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !14
%20 = getelementptr inbounds i8, ptr %19, i64 8
%21 = load i64, ptr %20, align 8, !tbaa !15
%22 = getelementptr inbounds i32, ptr %17, i64 %21
store i32 %1, ptr %22, align 4, !tbaa !17
%23 = add i64 %21, 1
%24 = and i64 %23, 63
store i64 %24, ptr %20, align 8, !tbaa !15
br label %74
25: ; preds = %2
%26 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%27 = load ptr, ptr %26, align 8, !tbaa !10
%28 = getelementptr inbounds i8, ptr %27, i64 16
%29 = load ptr, ptr %28, align 8, !tbaa !6
%30 = getelementptr inbounds i8, ptr %26, i64 8
%31 = load ptr, ptr %30, align 8, !tbaa !14
%32 = getelementptr inbounds i8, ptr %31, i64 16
%33 = load i64, ptr %32, align 8, !tbaa !15
%34 = getelementptr inbounds i32, ptr %29, i64 %33
store i32 %1, ptr %34, align 4, !tbaa !17
%35 = add i64 %33, 1
%36 = and i64 %35, 63
store i64 %36, ptr %32, align 8, !tbaa !15
br label %74
37: ; preds = %2
%38 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%39 = load ptr, ptr %38, align 8, !tbaa !10
%40 = getelementptr inbounds i8, ptr %39, i64 24
%41 = load ptr, ptr %40, align 8, !tbaa !6
%42 = getelementptr inbounds i8, ptr %38, i64 8
%43 = load ptr, ptr %42, align 8, !tbaa !14
%44 = getelementptr inbounds i8, ptr %43, i64 24
%45 = load i64, ptr %44, align 8, !tbaa !15
%46 = getelementptr inbounds i32, ptr %41, i64 %45
store i32 %1, ptr %46, align 4, !tbaa !17
%47 = add i64 %45, 1
%48 = and i64 %47, 63
store i64 %48, ptr %44, align 8, !tbaa !15
br label %74
49: ; preds = %2
%50 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%51 = getelementptr inbounds i8, ptr %50, i64 16
store i32 %1, ptr %51, align 8, !tbaa !18
br label %74
52: ; preds = %2
%53 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%54 = getelementptr inbounds i8, ptr %53, i64 48
store i32 %1, ptr %54, align 8, !tbaa !19
br label %74
55: ; preds = %2
%56 = and i32 %1, 33554431
%57 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%58 = getelementptr inbounds i8, ptr %57, i64 20
store i32 %56, ptr %58, align 4, !tbaa !20
br label %74
59: ; preds = %2
%60 = and i32 %1, 33554431
%61 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%62 = getelementptr inbounds i8, ptr %61, i64 24
store i32 %60, ptr %62, align 8, !tbaa !21
br label %74
63: ; preds = %2
%64 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%65 = getelementptr inbounds i8, ptr %64, i64 44
store i32 %1, ptr %65, align 4, !tbaa !22
br label %74
66: ; preds = %2
%67 = load ptr, ptr @ScuDsp, align 8, !tbaa !6
%68 = getelementptr inbounds i8, ptr %67, i64 36
%69 = load i32, ptr %68, align 4, !tbaa !23
%70 = add nsw i32 %69, 1
%71 = getelementptr inbounds i8, ptr %67, i64 40
store i32 %70, ptr %71, align 8, !tbaa !24
%72 = getelementptr inbounds i8, ptr %67, i64 28
store i32 %1, ptr %72, align 4, !tbaa !25
%73 = getelementptr inbounds i8, ptr %67, i64 32
store i32 0, ptr %73, align 8, !tbaa !26
br label %74
74: ; preds = %2, %3, %13, %25, %37, %49, %52, %55, %59, %63, %66
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0, !7, i64 8, !12, i64 16, !12, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !13, i64 48}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_3__", !12, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !8, i64 0}
!17 = !{!12, !12, i64 0}
!18 = !{!11, !12, i64 16}
!19 = !{!11, !12, i64 48}
!20 = !{!11, !12, i64 20}
!21 = !{!11, !12, i64 24}
!22 = !{!11, !12, i64 44}
!23 = !{!11, !12, i64 36}
!24 = !{!11, !12, i64 40}
!25 = !{!11, !12, i64 28}
!26 = !{!11, !12, i64 32}
| Provenance_Cores_Yabause_yabause_src_extr_scu.c_writeloadimdest |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Command.c_ParseMacAddressAndMask.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Command.c_ParseMacAddressAndMask.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr }
@.str = private unnamed_addr constant [2 x i8] c"/\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @ParseMacAddressAndMask(ptr noundef %0, ptr noundef writeonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca [6 x i32], align 16
%6 = alloca [6 x i32], align 16
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
%7 = icmp eq ptr %0, null
br i1 %7, label %47, label %8
8: ; preds = %4
%9 = icmp ne ptr %1, null
%10 = icmp ne ptr %2, null
%11 = and i1 %9, %10
%12 = icmp ne ptr %3, null
%13 = and i1 %11, %12
%14 = tail call i32 @IsEmptyStr(ptr noundef nonnull %0) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %20, label %16
16: ; preds = %8
br i1 %13, label %17, label %47
17: ; preds = %16
store i32 0, ptr %1, align 4, !tbaa !5
%18 = tail call i32 @Zero(ptr noundef nonnull %2, i32 noundef 6) #3
%19 = tail call i32 @Zero(ptr noundef nonnull %3, i32 noundef 6) #3
br label %47
20: ; preds = %8
%21 = tail call ptr @ParseToken(ptr noundef nonnull %0, ptr noundef nonnull @.str) #3
%22 = load i32, ptr %21, align 8, !tbaa !9
%23 = icmp eq i32 %22, 2
br i1 %23, label %26, label %24
24: ; preds = %20
%25 = tail call i32 @FreeToken(ptr noundef nonnull %21) #3
br label %47
26: ; preds = %20
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %21, i64 0, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !12
%29 = load ptr, ptr %28, align 8, !tbaa !13
%30 = getelementptr inbounds ptr, ptr %28, i64 1
%31 = load ptr, ptr %30, align 8, !tbaa !13
%32 = tail call i32 @Trim(ptr noundef %29) #3
%33 = tail call i32 @Trim(ptr noundef %31) #3
%34 = call i32 @StrToMac(ptr noundef nonnull %5, ptr noundef %29) #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %39, label %36
36: ; preds = %26
%37 = call i32 @StrToMac(ptr noundef nonnull %6, ptr noundef %31) #3
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %41
39: ; preds = %36, %26
%40 = call i32 @FreeToken(ptr noundef nonnull %21) #3
br label %47
41: ; preds = %36
br i1 %13, label %42, label %45
42: ; preds = %41
%43 = call i32 @Copy(ptr noundef nonnull %2, ptr noundef nonnull %5, i32 noundef 6) #3
%44 = call i32 @Copy(ptr noundef nonnull %3, ptr noundef nonnull %6, i32 noundef 6) #3
store i32 1, ptr %1, align 4, !tbaa !5
br label %45
45: ; preds = %41, %42
%46 = call i32 @FreeToken(ptr noundef nonnull %21) #3
br label %47
47: ; preds = %16, %17, %4, %45, %39, %24
%48 = phi i32 [ 0, %24 ], [ 0, %39 ], [ 1, %45 ], [ 0, %4 ], [ 1, %17 ], [ 1, %16 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
ret i32 %48
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @IsEmptyStr(ptr noundef) local_unnamed_addr #2
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @ParseToken(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @FreeToken(ptr noundef) local_unnamed_addr #2
declare i32 @Trim(ptr noundef) local_unnamed_addr #2
declare i32 @StrToMac(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Copy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Command.c_ParseMacAddressAndMask.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Command.c_ParseMacAddressAndMask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [2 x i8] c"/\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @ParseMacAddressAndMask(ptr noundef %0, ptr noundef writeonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca [6 x i32], align 4
%6 = alloca [6 x i32], align 4
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
%7 = icmp eq ptr %0, null
br i1 %7, label %47, label %8
8: ; preds = %4
%9 = icmp eq ptr %1, null
%10 = icmp eq ptr %2, null
%11 = or i1 %9, %10
%12 = icmp eq ptr %3, null
%13 = or i1 %11, %12
%14 = tail call i32 @IsEmptyStr(ptr noundef nonnull %0) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %20, label %16
16: ; preds = %8
br i1 %13, label %47, label %17
17: ; preds = %16
store i32 0, ptr %1, align 4, !tbaa !6
%18 = tail call i32 @Zero(ptr noundef nonnull %2, i32 noundef 6) #3
%19 = tail call i32 @Zero(ptr noundef nonnull %3, i32 noundef 6) #3
br label %47
20: ; preds = %8
%21 = tail call ptr @ParseToken(ptr noundef nonnull %0, ptr noundef nonnull @.str) #3
%22 = load i32, ptr %21, align 8, !tbaa !10
%23 = icmp eq i32 %22, 2
br i1 %23, label %26, label %24
24: ; preds = %20
%25 = tail call i32 @FreeToken(ptr noundef nonnull %21) #3
br label %47
26: ; preds = %20
%27 = getelementptr inbounds i8, ptr %21, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !13
%29 = load ptr, ptr %28, align 8, !tbaa !14
%30 = getelementptr inbounds i8, ptr %28, i64 8
%31 = load ptr, ptr %30, align 8, !tbaa !14
%32 = tail call i32 @Trim(ptr noundef %29) #3
%33 = tail call i32 @Trim(ptr noundef %31) #3
%34 = call i32 @StrToMac(ptr noundef nonnull %5, ptr noundef %29) #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %39, label %36
36: ; preds = %26
%37 = call i32 @StrToMac(ptr noundef nonnull %6, ptr noundef %31) #3
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %41
39: ; preds = %36, %26
%40 = call i32 @FreeToken(ptr noundef nonnull %21) #3
br label %47
41: ; preds = %36
br i1 %13, label %45, label %42
42: ; preds = %41
%43 = call i32 @Copy(ptr noundef nonnull %2, ptr noundef nonnull %5, i32 noundef 6) #3
%44 = call i32 @Copy(ptr noundef nonnull %3, ptr noundef nonnull %6, i32 noundef 6) #3
store i32 1, ptr %1, align 4, !tbaa !6
br label %45
45: ; preds = %41, %42
%46 = call i32 @FreeToken(ptr noundef nonnull %21) #3
br label %47
47: ; preds = %16, %17, %4, %45, %39, %24
%48 = phi i32 [ 0, %24 ], [ 0, %39 ], [ 1, %45 ], [ 0, %4 ], [ 1, %17 ], [ 1, %16 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
ret i32 %48
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @IsEmptyStr(ptr noundef) local_unnamed_addr #2
declare i32 @Zero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @ParseToken(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @FreeToken(ptr noundef) local_unnamed_addr #2
declare i32 @Trim(ptr noundef) local_unnamed_addr #2
declare i32 @StrToMac(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Copy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!12, !12, i64 0}
| SoftEtherVPN_src_Cedar_extr_Command.c_ParseMacAddressAndMask |
; ModuleID = 'AnghaBench/libgit2/tests/stash/extr_drop.c_test_stash_drop__dropping_the_last_entry_removes_the_stash.c'
source_filename = "AnghaBench/libgit2/tests/stash/extr_drop.c_test_stash_drop__dropping_the_last_entry_removes_the_stash.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@repo = dso_local local_unnamed_addr global i32 0, align 4
@GIT_REFS_STASH_FILE = dso_local local_unnamed_addr global i32 0, align 4
@GIT_ENOTFOUND = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @test_stash_drop__dropping_the_last_entry_removes_the_stash() local_unnamed_addr #0 {
%1 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
%2 = tail call i32 (...) @push_three_states() #3
%3 = load i32, ptr @repo, align 4, !tbaa !5
%4 = load i32, ptr @GIT_REFS_STASH_FILE, align 4, !tbaa !5
%5 = call i32 @git_reference_lookup(ptr noundef nonnull %1, i32 noundef %3, i32 noundef %4) #3
%6 = call i32 @cl_git_pass(i32 noundef %5) #3
%7 = load ptr, ptr %1, align 8, !tbaa !9
%8 = call i32 @git_reference_free(ptr noundef %7) #3
%9 = load i32, ptr @repo, align 4, !tbaa !5
%10 = call i32 @git_stash_drop(i32 noundef %9, i32 noundef 0) #3
%11 = call i32 @cl_git_pass(i32 noundef %10) #3
%12 = load i32, ptr @repo, align 4, !tbaa !5
%13 = call i32 @git_stash_drop(i32 noundef %12, i32 noundef 0) #3
%14 = call i32 @cl_git_pass(i32 noundef %13) #3
%15 = load i32, ptr @repo, align 4, !tbaa !5
%16 = call i32 @git_stash_drop(i32 noundef %15, i32 noundef 0) #3
%17 = call i32 @cl_git_pass(i32 noundef %16) #3
%18 = load i32, ptr @repo, align 4, !tbaa !5
%19 = load i32, ptr @GIT_REFS_STASH_FILE, align 4, !tbaa !5
%20 = call i32 @git_reference_lookup(ptr noundef nonnull %1, i32 noundef %18, i32 noundef %19) #3
%21 = load i32, ptr @GIT_ENOTFOUND, align 4, !tbaa !5
%22 = call i32 @cl_git_fail_with(i32 noundef %20, i32 noundef %21) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @push_three_states(...) local_unnamed_addr #2
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @git_reference_lookup(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_reference_free(ptr noundef) local_unnamed_addr #2
declare i32 @git_stash_drop(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @cl_git_fail_with(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/libgit2/tests/stash/extr_drop.c_test_stash_drop__dropping_the_last_entry_removes_the_stash.c'
source_filename = "AnghaBench/libgit2/tests/stash/extr_drop.c_test_stash_drop__dropping_the_last_entry_removes_the_stash.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@repo = common local_unnamed_addr global i32 0, align 4
@GIT_REFS_STASH_FILE = common local_unnamed_addr global i32 0, align 4
@GIT_ENOTFOUND = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_stash_drop__dropping_the_last_entry_removes_the_stash() local_unnamed_addr #0 {
%1 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
%2 = tail call i32 @push_three_states() #3
%3 = load i32, ptr @repo, align 4, !tbaa !6
%4 = load i32, ptr @GIT_REFS_STASH_FILE, align 4, !tbaa !6
%5 = call i32 @git_reference_lookup(ptr noundef nonnull %1, i32 noundef %3, i32 noundef %4) #3
%6 = call i32 @cl_git_pass(i32 noundef %5) #3
%7 = load ptr, ptr %1, align 8, !tbaa !10
%8 = call i32 @git_reference_free(ptr noundef %7) #3
%9 = load i32, ptr @repo, align 4, !tbaa !6
%10 = call i32 @git_stash_drop(i32 noundef %9, i32 noundef 0) #3
%11 = call i32 @cl_git_pass(i32 noundef %10) #3
%12 = load i32, ptr @repo, align 4, !tbaa !6
%13 = call i32 @git_stash_drop(i32 noundef %12, i32 noundef 0) #3
%14 = call i32 @cl_git_pass(i32 noundef %13) #3
%15 = load i32, ptr @repo, align 4, !tbaa !6
%16 = call i32 @git_stash_drop(i32 noundef %15, i32 noundef 0) #3
%17 = call i32 @cl_git_pass(i32 noundef %16) #3
%18 = load i32, ptr @repo, align 4, !tbaa !6
%19 = load i32, ptr @GIT_REFS_STASH_FILE, align 4, !tbaa !6
%20 = call i32 @git_reference_lookup(ptr noundef nonnull %1, i32 noundef %18, i32 noundef %19) #3
%21 = load i32, ptr @GIT_ENOTFOUND, align 4, !tbaa !6
%22 = call i32 @cl_git_fail_with(i32 noundef %20, i32 noundef %21) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @push_three_states(...) local_unnamed_addr #2
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @git_reference_lookup(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_reference_free(ptr noundef) local_unnamed_addr #2
declare i32 @git_stash_drop(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @cl_git_fail_with(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| libgit2_tests_stash_extr_drop.c_test_stash_drop__dropping_the_last_entry_removes_the_stash |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gnu-nat.c_show_thread_pause_cmd.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gnu-nat.c_show_thread_pause_cmd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.proc = type { i32, ptr }
@.str = private unnamed_addr constant [16 x i8] c"show task pause\00", align 1
@.str.1 = private unnamed_addr constant [49 x i8] c"Thread %s %s suspended while gdb has control%s.\0A\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"is\00", align 1
@.str.3 = private unnamed_addr constant [6 x i8] c"isn't\00", align 1
@.str.4 = private unnamed_addr constant [19 x i8] c" (but the task is)\00", align 1
@.str.5 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @show_thread_pause_cmd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @show_thread_pause_cmd(ptr noundef %0, i32 %1) #0 {
%3 = tail call ptr (...) @cur_thread() #2
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = tail call i32 @check_empty(ptr noundef %0, ptr noundef nonnull @.str) #2
%6 = tail call i32 @proc_string(ptr noundef nonnull %3) #2
%7 = icmp eq i32 %4, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = getelementptr inbounds %struct.proc, ptr %3, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !11
%11 = load i64, ptr %10, align 8, !tbaa !12
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, ptr @.str.5, ptr @.str.4
br label %14
14: ; preds = %8, %2
%15 = phi ptr [ @.str.3, %8 ], [ @.str.2, %2 ]
%16 = phi ptr [ %13, %8 ], [ @.str.5, %2 ]
%17 = tail call i32 @printf_unfiltered(ptr noundef nonnull @.str.1, i32 noundef %6, ptr noundef nonnull %15, ptr noundef nonnull %16) #2
ret void
}
declare ptr @cur_thread(...) local_unnamed_addr #1
declare i32 @check_empty(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @printf_unfiltered(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @proc_string(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"proc", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gnu-nat.c_show_thread_pause_cmd.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gnu-nat.c_show_thread_pause_cmd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [16 x i8] c"show task pause\00", align 1
@.str.1 = private unnamed_addr constant [49 x i8] c"Thread %s %s suspended while gdb has control%s.\0A\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"is\00", align 1
@.str.3 = private unnamed_addr constant [6 x i8] c"isn't\00", align 1
@.str.4 = private unnamed_addr constant [19 x i8] c" (but the task is)\00", align 1
@.str.5 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@llvm.used = appending global [1 x ptr] [ptr @show_thread_pause_cmd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @show_thread_pause_cmd(ptr noundef %0, i32 %1) #0 {
%3 = tail call ptr @cur_thread() #2
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = tail call i32 @check_empty(ptr noundef %0, ptr noundef nonnull @.str) #2
%6 = tail call i32 @proc_string(ptr noundef nonnull %3) #2
%7 = icmp eq i32 %4, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = getelementptr inbounds i8, ptr %3, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = load i64, ptr %10, align 8, !tbaa !13
%12 = icmp eq i64 %11, 0
%13 = select i1 %12, ptr @.str.5, ptr @.str.4
br label %14
14: ; preds = %8, %2
%15 = phi ptr [ @.str.3, %8 ], [ @.str.2, %2 ]
%16 = phi ptr [ %13, %8 ], [ @.str.5, %2 ]
%17 = tail call i32 @printf_unfiltered(ptr noundef nonnull @.str.1, i32 noundef %6, ptr noundef nonnull %15, ptr noundef nonnull %16) #2
ret void
}
declare ptr @cur_thread(...) local_unnamed_addr #1
declare i32 @check_empty(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @printf_unfiltered(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @proc_string(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"proc", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_2__", !15, i64 0}
!15 = !{!"long", !9, i64 0}
| freebsd_contrib_gdb_gdb_extr_gnu-nat.c_show_thread_pause_cmd |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/gpio/extr_gpio_service.c_dal_gpio_get_generic_pin_info.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/gpio/extr_gpio_service.c_dal_gpio_get_generic_pin_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.gpio_pin_info = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local i64 @dal_gpio_get_generic_pin_info(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.gpio_pin_info, align 8
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = call i32 %6(i32 noundef %1, i32 noundef %2, ptr noundef nonnull %4) #1
br label %12
10: ; preds = %3
store i32 -1, ptr %4, align 8, !tbaa !13
%11 = getelementptr inbounds %struct.gpio_pin_info, ptr %4, i64 0, i32 1
store i32 -1, ptr %11, align 4, !tbaa !16
br label %12
12: ; preds = %10, %8
%13 = load i64, ptr %4, align 8
ret i64 %13
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"gpio_service", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"gpio_pin_info", !15, i64 0, !15, i64 4}
!15 = !{!"int", !9, i64 0}
!16 = !{!14, !15, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/gpio/extr_gpio_service.c_dal_gpio_get_generic_pin_info.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/gpio/extr_gpio_service.c_dal_gpio_get_generic_pin_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.gpio_pin_info = type { i32, i32 }
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @dal_gpio_get_generic_pin_info(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.gpio_pin_info, align 8
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = icmp eq ptr %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = call i32 %6(i32 noundef %1, i32 noundef %2, ptr noundef nonnull %4) #1
br label %11
10: ; preds = %3
store <2 x i32> <i32 -1, i32 -1>, ptr %4, align 8, !tbaa !14
br label %11
11: ; preds = %10, %8
%12 = load i64, ptr %4, align 8
ret i64 %12
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"gpio_service", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !9, i64 0}
!13 = !{!"TYPE_3__", !9, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !10, i64 0}
| linux_drivers_gpu_drm_amd_display_dc_gpio_extr_gpio_service.c_dal_gpio_get_generic_pin_info |
; ModuleID = 'AnghaBench/linux/drivers/char/tpm/extr_tpm.h_tpm_msleep.c'
source_filename = "AnghaBench/linux/drivers/char/tpm/extr_tpm.h_tpm_msleep.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TPM_TIMEOUT_RANGE_US = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @tpm_msleep], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @tpm_msleep(i32 noundef %0) #0 {
%2 = mul i32 %0, 1000
%3 = zext i32 %2 to i64
%4 = load i64, ptr @TPM_TIMEOUT_RANGE_US, align 8, !tbaa !5
%5 = sub nsw i64 %3, %4
%6 = tail call i32 @usleep_range(i64 noundef %5, i32 noundef %2) #2
ret void
}
declare i32 @usleep_range(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/char/tpm/extr_tpm.h_tpm_msleep.c'
source_filename = "AnghaBench/linux/drivers/char/tpm/extr_tpm.h_tpm_msleep.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TPM_TIMEOUT_RANGE_US = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @tpm_msleep], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @tpm_msleep(i32 noundef %0) #0 {
%2 = mul i32 %0, 1000
%3 = zext i32 %2 to i64
%4 = load i64, ptr @TPM_TIMEOUT_RANGE_US, align 8, !tbaa !6
%5 = sub nsw i64 %3, %4
%6 = tail call i32 @usleep_range(i64 noundef %5, i32 noundef %2) #2
ret void
}
declare i32 @usleep_range(i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_char_tpm_extr_tpm.h_tpm_msleep |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/crypto/extr_crypto_libtomcrypt.c_crypto_hash_finish.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/crypto/extr_crypto_libtomcrypt.c_crypto_hash_finish.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.crypto_hash = type { i32, %struct.TYPE_2__, i64 }
%struct.TYPE_2__ = type { i32, i32 }
@CRYPT_OK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @crypto_hash_finish(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = icmp eq ptr %0, null
br i1 %5, label %68, label %6
6: ; preds = %3
%7 = icmp eq ptr %1, null
%8 = icmp eq ptr %2, null
%9 = or i1 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
12: ; preds = %6
%13 = getelementptr inbounds %struct.crypto_hash, ptr %0, i64 0, i32 2
%14 = load i64, ptr %13, align 8, !tbaa !5
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %12
%17 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
18: ; preds = %12
%19 = load i32, ptr %0, align 8, !tbaa !12
switch i32 %19, label %62 [
i32 129, label %20
i32 128, label %31
i32 130, label %42
i32 131, label %47
]
20: ; preds = %18
%21 = load i64, ptr %2, align 8, !tbaa !13
%22 = icmp ult i64 %21, 16
store i64 16, ptr %2, align 8, !tbaa !13
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
25: ; preds = %20
%26 = getelementptr inbounds %struct.crypto_hash, ptr %0, i64 0, i32 1, i32 1
%27 = tail call i32 @md5_done(ptr noundef nonnull %26, ptr noundef nonnull %1) #3
%28 = load i32, ptr @CRYPT_OK, align 4, !tbaa !14
%29 = icmp eq i32 %27, %28
%30 = select i1 %29, i32 0, i32 -2
br label %62
31: ; preds = %18
%32 = load i64, ptr %2, align 8, !tbaa !13
%33 = icmp ult i64 %32, 20
store i64 20, ptr %2, align 8, !tbaa !13
br i1 %33, label %34, label %36
34: ; preds = %31
%35 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
36: ; preds = %31
%37 = getelementptr inbounds %struct.crypto_hash, ptr %0, i64 0, i32 1, i32 1
%38 = tail call i32 @sha1_done(ptr noundef nonnull %37, ptr noundef nonnull %1) #3
%39 = load i32, ptr @CRYPT_OK, align 4, !tbaa !14
%40 = icmp eq i32 %38, %39
%41 = select i1 %40, i32 0, i32 -2
br label %62
42: ; preds = %18
%43 = load i64, ptr %2, align 8, !tbaa !13
%44 = icmp ult i64 %43, 20
br i1 %44, label %45, label %52
45: ; preds = %42
store i64 20, ptr %2, align 8, !tbaa !13
%46 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
47: ; preds = %18
%48 = load i64, ptr %2, align 8, !tbaa !13
%49 = icmp ult i64 %48, 16
br i1 %49, label %50, label %52
50: ; preds = %47
store i64 16, ptr %2, align 8, !tbaa !13
%51 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
52: ; preds = %42, %47
%53 = phi i64 [ %48, %47 ], [ %43, %42 ]
store i64 %53, ptr %4, align 8, !tbaa !13
%54 = getelementptr inbounds %struct.crypto_hash, ptr %0, i64 0, i32 1
%55 = call i32 @hmac_done(ptr noundef nonnull %54, ptr noundef nonnull %1, ptr noundef nonnull %4) #3
%56 = load i32, ptr @CRYPT_OK, align 4, !tbaa !14
%57 = icmp eq i32 %55, %56
br i1 %57, label %60, label %58
58: ; preds = %52
%59 = call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
60: ; preds = %52
%61 = load i64, ptr %4, align 8, !tbaa !13
store i64 %61, ptr %2, align 8, !tbaa !13
br label %62
62: ; preds = %36, %25, %18, %60
%63 = phi i32 [ 0, %60 ], [ %30, %25 ], [ %41, %36 ], [ -2, %18 ]
%64 = call i32 @os_free(ptr noundef nonnull %0) #3
%65 = call i64 (...) @TEST_FAIL() #3
%66 = icmp eq i64 %65, 0
%67 = select i1 %66, i32 %63, i32 -1
br label %68
68: ; preds = %62, %3, %58, %50, %45, %34, %23, %16, %10
%69 = phi i32 [ 0, %10 ], [ -2, %16 ], [ -1, %50 ], [ -1, %58 ], [ -1, %45 ], [ -1, %34 ], [ -1, %23 ], [ -2, %3 ], [ %67, %62 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %69
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @os_free(ptr noundef) local_unnamed_addr #2
declare i32 @md5_done(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sha1_done(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hmac_done(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @TEST_FAIL(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"crypto_hash", !7, i64 0, !10, i64 4, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0, !7, i64 4}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/crypto/extr_crypto_libtomcrypt.c_crypto_hash_finish.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/crypto/extr_crypto_libtomcrypt.c_crypto_hash_finish.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CRYPT_OK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2, 1) i32 @crypto_hash_finish(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = icmp eq ptr %0, null
br i1 %5, label %68, label %6
6: ; preds = %3
%7 = icmp eq ptr %1, null
%8 = icmp eq ptr %2, null
%9 = or i1 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %6
%11 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
12: ; preds = %6
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load i64, ptr %13, align 8, !tbaa !6
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %12
%17 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
18: ; preds = %12
%19 = load i32, ptr %0, align 8, !tbaa !13
switch i32 %19, label %62 [
i32 129, label %20
i32 128, label %31
i32 130, label %42
i32 131, label %47
]
20: ; preds = %18
%21 = load i64, ptr %2, align 8, !tbaa !14
%22 = icmp ult i64 %21, 16
store i64 16, ptr %2, align 8, !tbaa !14
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
25: ; preds = %20
%26 = getelementptr inbounds i8, ptr %0, i64 8
%27 = tail call i32 @md5_done(ptr noundef nonnull %26, ptr noundef nonnull %1) #3
%28 = load i32, ptr @CRYPT_OK, align 4, !tbaa !15
%29 = icmp eq i32 %27, %28
%30 = select i1 %29, i32 0, i32 -2
br label %62
31: ; preds = %18
%32 = load i64, ptr %2, align 8, !tbaa !14
%33 = icmp ult i64 %32, 20
store i64 20, ptr %2, align 8, !tbaa !14
br i1 %33, label %34, label %36
34: ; preds = %31
%35 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
36: ; preds = %31
%37 = getelementptr inbounds i8, ptr %0, i64 8
%38 = tail call i32 @sha1_done(ptr noundef nonnull %37, ptr noundef nonnull %1) #3
%39 = load i32, ptr @CRYPT_OK, align 4, !tbaa !15
%40 = icmp eq i32 %38, %39
%41 = select i1 %40, i32 0, i32 -2
br label %62
42: ; preds = %18
%43 = load i64, ptr %2, align 8, !tbaa !14
%44 = icmp ult i64 %43, 20
br i1 %44, label %45, label %52
45: ; preds = %42
store i64 20, ptr %2, align 8, !tbaa !14
%46 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
47: ; preds = %18
%48 = load i64, ptr %2, align 8, !tbaa !14
%49 = icmp ult i64 %48, 16
br i1 %49, label %50, label %52
50: ; preds = %47
store i64 16, ptr %2, align 8, !tbaa !14
%51 = tail call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
52: ; preds = %42, %47
%53 = phi i64 [ %48, %47 ], [ %43, %42 ]
store i64 %53, ptr %4, align 8, !tbaa !14
%54 = getelementptr inbounds i8, ptr %0, i64 4
%55 = call i32 @hmac_done(ptr noundef nonnull %54, ptr noundef nonnull %1, ptr noundef nonnull %4) #3
%56 = load i32, ptr @CRYPT_OK, align 4, !tbaa !15
%57 = icmp eq i32 %55, %56
br i1 %57, label %60, label %58
58: ; preds = %52
%59 = call i32 @os_free(ptr noundef nonnull %0) #3
br label %68
60: ; preds = %52
%61 = load i64, ptr %4, align 8, !tbaa !14
store i64 %61, ptr %2, align 8, !tbaa !14
br label %62
62: ; preds = %36, %25, %18, %60
%63 = phi i32 [ 0, %60 ], [ %30, %25 ], [ %41, %36 ], [ -2, %18 ]
%64 = call i32 @os_free(ptr noundef nonnull %0) #3
%65 = call i64 @TEST_FAIL() #3
%66 = icmp eq i64 %65, 0
%67 = select i1 %66, i32 %63, i32 -1
br label %68
68: ; preds = %62, %3, %58, %50, %45, %34, %23, %16, %10
%69 = phi i32 [ 0, %10 ], [ -2, %16 ], [ -1, %50 ], [ -1, %58 ], [ -1, %45 ], [ -1, %34 ], [ -1, %23 ], [ -2, %3 ], [ %67, %62 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %69
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @os_free(ptr noundef) local_unnamed_addr #2
declare i32 @md5_done(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sha1_done(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hmac_done(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @TEST_FAIL(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"crypto_hash", !8, i64 0, !11, i64 4, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!8, !8, i64 0}
| freebsd_contrib_wpa_src_crypto_extr_crypto_libtomcrypt.c_crypto_hash_finish |
; ModuleID = 'AnghaBench/freebsd/sys/dev/bwi/extr_if_bwi.c_bwi_free_rx_ring32.c'
source_filename = "AnghaBench/freebsd/sys/dev/bwi/extr_if_bwi.c_bwi_free_rx_ring32.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bwi_softc = type { i32, %struct.bwi_rxbuf_data, %struct.bwi_ring_data }
%struct.bwi_rxbuf_data = type { ptr }
%struct.bwi_ring_data = type { i32 }
%struct.bwi_rxbuf = type { ptr, i32 }
@BWI_RX_NDESC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bwi_free_rx_ring32], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bwi_free_rx_ring32(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.bwi_softc, ptr %0, i64 0, i32 2
%3 = getelementptr inbounds %struct.bwi_softc, ptr %0, i64 0, i32 1
%4 = load i32, ptr %2, align 4, !tbaa !5
%5 = tail call i32 @bwi_reset_rx_ring32(ptr noundef %0, i32 noundef %4) #2
%6 = load i32, ptr @BWI_RX_NDESC, align 4, !tbaa !10
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %28
8: ; preds = %1, %23
%9 = phi i32 [ %24, %23 ], [ %6, %1 ]
%10 = phi i64 [ %25, %23 ], [ 0, %1 ]
%11 = load ptr, ptr %3, align 8, !tbaa !11
%12 = getelementptr inbounds %struct.bwi_rxbuf, ptr %11, i64 %10
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = icmp eq ptr %13, null
br i1 %14, label %23, label %15
15: ; preds = %8
%16 = load i32, ptr %0, align 8, !tbaa !16
%17 = getelementptr inbounds %struct.bwi_rxbuf, ptr %11, i64 %10, i32 1
%18 = load i32, ptr %17, align 8, !tbaa !18
%19 = tail call i32 @bus_dmamap_unload(i32 noundef %16, i32 noundef %18) #2
%20 = load ptr, ptr %12, align 8, !tbaa !14
%21 = tail call i32 @m_freem(ptr noundef %20) #2
store ptr null, ptr %12, align 8, !tbaa !14
%22 = load i32, ptr @BWI_RX_NDESC, align 4, !tbaa !10
br label %23
23: ; preds = %15, %8
%24 = phi i32 [ %22, %15 ], [ %9, %8 ]
%25 = add nuw nsw i64 %10, 1
%26 = sext i32 %24 to i64
%27 = icmp slt i64 %25, %26
br i1 %27, label %8, label %28, !llvm.loop !19
28: ; preds = %23, %1
ret void
}
declare i32 @bwi_reset_rx_ring32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_dmamap_unload(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @m_freem(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bwi_ring_data", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"bwi_rxbuf_data", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"bwi_rxbuf", !13, i64 0, !7, i64 8}
!16 = !{!17, !7, i64 0}
!17 = !{!"bwi_softc", !7, i64 0, !12, i64 8, !6, i64 16}
!18 = !{!15, !7, i64 8}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/bwi/extr_if_bwi.c_bwi_free_rx_ring32.c'
source_filename = "AnghaBench/freebsd/sys/dev/bwi/extr_if_bwi.c_bwi_free_rx_ring32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.bwi_rxbuf = type { ptr, i32 }
@BWI_RX_NDESC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bwi_free_rx_ring32], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bwi_free_rx_ring32(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i32, ptr %2, align 4, !tbaa !6
%5 = tail call i32 @bwi_reset_rx_ring32(ptr noundef %0, i32 noundef %4) #2
%6 = load i32, ptr @BWI_RX_NDESC, align 4, !tbaa !11
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %28
8: ; preds = %1, %23
%9 = phi i32 [ %24, %23 ], [ %6, %1 ]
%10 = phi i64 [ %25, %23 ], [ 0, %1 ]
%11 = load ptr, ptr %3, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.bwi_rxbuf, ptr %11, i64 %10
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = icmp eq ptr %13, null
br i1 %14, label %23, label %15
15: ; preds = %8
%16 = load i32, ptr %0, align 8, !tbaa !17
%17 = getelementptr inbounds i8, ptr %12, i64 8
%18 = load i32, ptr %17, align 8, !tbaa !19
%19 = tail call i32 @bus_dmamap_unload(i32 noundef %16, i32 noundef %18) #2
%20 = load ptr, ptr %12, align 8, !tbaa !15
%21 = tail call i32 @m_freem(ptr noundef %20) #2
store ptr null, ptr %12, align 8, !tbaa !15
%22 = load i32, ptr @BWI_RX_NDESC, align 4, !tbaa !11
br label %23
23: ; preds = %15, %8
%24 = phi i32 [ %22, %15 ], [ %9, %8 ]
%25 = add nuw nsw i64 %10, 1
%26 = sext i32 %24 to i64
%27 = icmp slt i64 %25, %26
br i1 %27, label %8, label %28, !llvm.loop !20
28: ; preds = %23, %1
ret void
}
declare i32 @bwi_reset_rx_ring32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bus_dmamap_unload(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @m_freem(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bwi_ring_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"bwi_rxbuf_data", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"bwi_rxbuf", !14, i64 0, !8, i64 8}
!17 = !{!18, !8, i64 0}
!18 = !{!"bwi_softc", !8, i64 0, !13, i64 8, !7, i64 16}
!19 = !{!16, !8, i64 8}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_dev_bwi_extr_if_bwi.c_bwi_free_rx_ring32 |
; ModuleID = 'AnghaBench/tengine/src/core/extr_ngx_string.c_ngx_escape_html.c'
source_filename = "AnghaBench/tengine/src/core/extr_ngx_string.c_ngx_escape_html.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local i64 @ngx_escape_html(ptr noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
%5 = icmp eq i64 %2, 0
br i1 %4, label %7, label %6
6: ; preds = %3
br i1 %5, label %66, label %43
7: ; preds = %3
br i1 %5, label %84, label %8
8: ; preds = %7
%9 = and i64 %2, 1
%10 = icmp eq i64 %2, 1
br i1 %10, label %69, label %11
11: ; preds = %8
%12 = and i64 %2, -2
br label %13
13: ; preds = %39, %11
%14 = phi i64 [ 0, %11 ], [ %40, %39 ]
%15 = phi ptr [ %1, %11 ], [ %29, %39 ]
%16 = phi i64 [ 0, %11 ], [ %41, %39 ]
%17 = getelementptr inbounds i32, ptr %15, i64 1
%18 = load i32, ptr %15, align 4, !tbaa !5
switch i32 %18, label %27 [
i32 60, label %19
i32 62, label %21
i32 38, label %23
i32 34, label %25
]
19: ; preds = %13
%20 = add i64 %14, 3
br label %27
21: ; preds = %13
%22 = add i64 %14, 3
br label %27
23: ; preds = %13
%24 = add i64 %14, 4
br label %27
25: ; preds = %13
%26 = add i64 %14, 5
br label %27
27: ; preds = %13, %25, %23, %21, %19
%28 = phi i64 [ %14, %13 ], [ %26, %25 ], [ %24, %23 ], [ %22, %21 ], [ %20, %19 ]
%29 = getelementptr inbounds i32, ptr %15, i64 2
%30 = load i32, ptr %17, align 4, !tbaa !5
switch i32 %30, label %39 [
i32 60, label %37
i32 62, label %35
i32 38, label %33
i32 34, label %31
]
31: ; preds = %27
%32 = add i64 %28, 5
br label %39
33: ; preds = %27
%34 = add i64 %28, 4
br label %39
35: ; preds = %27
%36 = add i64 %28, 3
br label %39
37: ; preds = %27
%38 = add i64 %28, 3
br label %39
39: ; preds = %37, %35, %33, %31, %27
%40 = phi i64 [ %28, %27 ], [ %32, %31 ], [ %34, %33 ], [ %36, %35 ], [ %38, %37 ]
%41 = add i64 %16, 2
%42 = icmp eq i64 %41, %12
br i1 %42, label %69, label %13, !llvm.loop !9
43: ; preds = %6, %62
%44 = phi i64 [ %64, %62 ], [ %2, %6 ]
%45 = phi ptr [ %47, %62 ], [ %1, %6 ]
%46 = phi ptr [ %63, %62 ], [ %0, %6 ]
%47 = getelementptr inbounds i32, ptr %45, i64 1
%48 = load i32, ptr %45, align 4, !tbaa !5
switch i32 %48, label %60 [
i32 60, label %49
i32 62, label %51
i32 38, label %53
i32 34, label %56
]
49: ; preds = %43
%50 = getelementptr inbounds i32, ptr %46, i64 4
store <4 x i32> <i32 38, i32 108, i32 116, i32 59>, ptr %46, align 4, !tbaa !5
br label %62
51: ; preds = %43
%52 = getelementptr inbounds i32, ptr %46, i64 4
store <4 x i32> <i32 38, i32 103, i32 116, i32 59>, ptr %46, align 4, !tbaa !5
br label %62
53: ; preds = %43
%54 = getelementptr inbounds i32, ptr %46, i64 4
store <4 x i32> <i32 38, i32 97, i32 109, i32 112>, ptr %46, align 4, !tbaa !5
%55 = getelementptr inbounds i32, ptr %46, i64 5
store i32 59, ptr %54, align 4, !tbaa !5
br label %62
56: ; preds = %43
%57 = getelementptr inbounds i32, ptr %46, i64 4
store <4 x i32> <i32 38, i32 113, i32 117, i32 111>, ptr %46, align 4, !tbaa !5
%58 = getelementptr inbounds i32, ptr %46, i64 5
store i32 116, ptr %57, align 4, !tbaa !5
%59 = getelementptr inbounds i32, ptr %46, i64 6
store i32 59, ptr %58, align 4, !tbaa !5
br label %62
60: ; preds = %43
%61 = getelementptr inbounds i32, ptr %46, i64 1
store i32 %48, ptr %46, align 4, !tbaa !5
br label %62
62: ; preds = %60, %56, %53, %51, %49
%63 = phi ptr [ %61, %60 ], [ %59, %56 ], [ %55, %53 ], [ %52, %51 ], [ %50, %49 ]
%64 = add i64 %44, -1
%65 = icmp eq i64 %64, 0
br i1 %65, label %66, label %43, !llvm.loop !11
66: ; preds = %62, %6
%67 = phi ptr [ %0, %6 ], [ %63, %62 ]
%68 = ptrtoint ptr %67 to i64
br label %84
69: ; preds = %39, %8
%70 = phi i64 [ undef, %8 ], [ %40, %39 ]
%71 = phi i64 [ 0, %8 ], [ %40, %39 ]
%72 = phi ptr [ %1, %8 ], [ %29, %39 ]
%73 = icmp eq i64 %9, 0
br i1 %73, label %84, label %74
74: ; preds = %69
%75 = load i32, ptr %72, align 4, !tbaa !5
switch i32 %75, label %84 [
i32 60, label %82
i32 62, label %80
i32 38, label %78
i32 34, label %76
]
76: ; preds = %74
%77 = add i64 %71, 5
br label %84
78: ; preds = %74
%79 = add i64 %71, 4
br label %84
80: ; preds = %74
%81 = add i64 %71, 3
br label %84
82: ; preds = %74
%83 = add i64 %71, 3
br label %84
84: ; preds = %69, %82, %80, %78, %76, %74, %7, %66
%85 = phi i64 [ %68, %66 ], [ 0, %7 ], [ %70, %69 ], [ %71, %74 ], [ %77, %76 ], [ %79, %78 ], [ %81, %80 ], [ %83, %82 ]
ret i64 %85
}
attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
| ; ModuleID = 'AnghaBench/tengine/src/core/extr_ngx_string.c_ngx_escape_html.c'
source_filename = "AnghaBench/tengine/src/core/extr_ngx_string.c_ngx_escape_html.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync)
define i64 @ngx_escape_html(ptr noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
%5 = icmp eq i64 %2, 0
br i1 %4, label %7, label %6
6: ; preds = %3
br i1 %5, label %48, label %26
7: ; preds = %3
br i1 %5, label %51, label %8
8: ; preds = %7, %22
%9 = phi i64 [ %23, %22 ], [ 0, %7 ]
%10 = phi i64 [ %24, %22 ], [ %2, %7 ]
%11 = phi ptr [ %12, %22 ], [ %1, %7 ]
%12 = getelementptr inbounds i8, ptr %11, i64 4
%13 = load i32, ptr %11, align 4, !tbaa !6
switch i32 %13, label %22 [
i32 60, label %14
i32 62, label %16
i32 38, label %18
i32 34, label %20
]
14: ; preds = %8
%15 = add i64 %9, 3
br label %22
16: ; preds = %8
%17 = add i64 %9, 3
br label %22
18: ; preds = %8
%19 = add i64 %9, 4
br label %22
20: ; preds = %8
%21 = add i64 %9, 5
br label %22
22: ; preds = %8, %20, %18, %16, %14
%23 = phi i64 [ %9, %8 ], [ %21, %20 ], [ %19, %18 ], [ %17, %16 ], [ %15, %14 ]
%24 = add i64 %10, -1
%25 = icmp eq i64 %24, 0
br i1 %25, label %51, label %8, !llvm.loop !10
26: ; preds = %6, %44
%27 = phi i64 [ %46, %44 ], [ %2, %6 ]
%28 = phi ptr [ %30, %44 ], [ %1, %6 ]
%29 = phi ptr [ %45, %44 ], [ %0, %6 ]
%30 = getelementptr inbounds i8, ptr %28, i64 4
%31 = load i32, ptr %28, align 4, !tbaa !6
switch i32 %31, label %42 [
i32 60, label %32
i32 62, label %34
i32 38, label %36
i32 34, label %39
]
32: ; preds = %26
%33 = getelementptr inbounds i8, ptr %29, i64 16
store <4 x i32> <i32 38, i32 108, i32 116, i32 59>, ptr %29, align 4, !tbaa !6
br label %44
34: ; preds = %26
%35 = getelementptr inbounds i8, ptr %29, i64 16
store <4 x i32> <i32 38, i32 103, i32 116, i32 59>, ptr %29, align 4, !tbaa !6
br label %44
36: ; preds = %26
%37 = getelementptr inbounds i8, ptr %29, i64 16
store <4 x i32> <i32 38, i32 97, i32 109, i32 112>, ptr %29, align 4, !tbaa !6
%38 = getelementptr inbounds i8, ptr %29, i64 20
store i32 59, ptr %37, align 4, !tbaa !6
br label %44
39: ; preds = %26
%40 = getelementptr inbounds i8, ptr %29, i64 16
store <4 x i32> <i32 38, i32 113, i32 117, i32 111>, ptr %29, align 4, !tbaa !6
%41 = getelementptr inbounds i8, ptr %29, i64 24
store <2 x i32> <i32 116, i32 59>, ptr %40, align 4, !tbaa !6
br label %44
42: ; preds = %26
%43 = getelementptr inbounds i8, ptr %29, i64 4
store i32 %31, ptr %29, align 4, !tbaa !6
br label %44
44: ; preds = %42, %39, %36, %34, %32
%45 = phi ptr [ %43, %42 ], [ %41, %39 ], [ %38, %36 ], [ %35, %34 ], [ %33, %32 ]
%46 = add i64 %27, -1
%47 = icmp eq i64 %46, 0
br i1 %47, label %48, label %26, !llvm.loop !12
48: ; preds = %44, %6
%49 = phi ptr [ %0, %6 ], [ %45, %44 ]
%50 = ptrtoint ptr %49 to i64
br label %51
51: ; preds = %22, %7, %48
%52 = phi i64 [ %50, %48 ], [ 0, %7 ], [ %23, %22 ]
ret i64 %52
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
| tengine_src_core_extr_ngx_string.c_ngx_escape_html |
; ModuleID = 'AnghaBench/linux/drivers/pinctrl/qcom/extr_pinctrl-spmi-mpp.c_pmic_mpp_populate.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/qcom/extr_pinctrl-spmi-mpp.c_pmic_mpp_populate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pmic_mpp_pad = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32 }
@PMIC_MPP_REG_TYPE = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_TYPE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"incorrect block type 0x%x at 0x%x\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_SUBTYPE = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [31 x i8] c"unknown MPP type 0x%x at 0x%x\0A\00", align 1
@PMIC_MPP_REG_MODE_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_VALUE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_DIR_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_DIR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_DIGITAL = dso_local local_unnamed_addr global ptr null, align 8
@PMIC_MPP_ANALOG = dso_local local_unnamed_addr global ptr null, align 8
@PMIC_MPP_SINK = dso_local local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [23 x i8] c"unknown MPP direction\0A\00", align 1
@PMIC_MPP_REG_MODE_FUNCTION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_FUNCTION_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_SELECTOR_DTEST_FIRST = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_SELECTOR_PAIRED = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_DIG_VIN_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_VIN_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_VIN_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_DIG_PULL_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_PULL_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_PULL_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AIN_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AIN_ROUTE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AIN_ROUTE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_SINK_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AOUT_CTL = dso_local local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_EN_CTL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pmic_mpp_populate], section "llvm.metadata"
@switch.table.pmic_mpp_populate = private unnamed_addr constant [6 x i32] [i32 4, i32 4, i32 8, i32 4, i32 4, i32 4], align 4
@switch.table.pmic_mpp_populate.3 = private unnamed_addr constant [7 x i32] [i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 1], align 4
@switch.table.pmic_mpp_populate.4 = private unnamed_addr constant [7 x i32] [i32 1, i32 0, i32 1, i32 1, i32 1, i32 0, i32 1], align 4
@switch.table.pmic_mpp_populate.5 = private unnamed_addr constant [7 x ptr] [ptr @PMIC_MPP_DIGITAL, ptr @PMIC_MPP_DIGITAL, ptr @PMIC_MPP_DIGITAL, ptr @PMIC_MPP_SINK, ptr @PMIC_MPP_ANALOG, ptr @PMIC_MPP_ANALOG, ptr @PMIC_MPP_ANALOG], align 8
; Function Attrs: nounwind uwtable
define internal i32 @pmic_mpp_populate(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PMIC_MPP_REG_TYPE, align 4, !tbaa !5
%4 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef %1, i32 noundef %3) #2
%5 = icmp slt i32 %4, 0
br i1 %5, label %130, label %6
6: ; preds = %2
%7 = load i32, ptr @PMIC_MPP_TYPE, align 4, !tbaa !5
%8 = icmp eq i32 %4, %7
br i1 %8, label %16, label %9
9: ; preds = %6
%10 = load i32, ptr %0, align 4, !tbaa !9
%11 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 14
%12 = load i32, ptr %11, align 8, !tbaa !11
%13 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %10, ptr noundef nonnull @.str, i32 noundef %4, i32 noundef %12) #2
%14 = load i32, ptr @ENODEV, align 4, !tbaa !5
%15 = sub nsw i32 0, %14
br label %130
16: ; preds = %6
%17 = load i32, ptr @PMIC_MPP_REG_SUBTYPE, align 4, !tbaa !5
%18 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef %1, i32 noundef %17) #2
%19 = icmp slt i32 %18, 0
br i1 %19, label %130, label %20
20: ; preds = %16
%21 = add nsw i32 %18, -128
%22 = icmp ult i32 %21, 6
br i1 %22, label %30, label %23
23: ; preds = %20
%24 = load i32, ptr %0, align 4, !tbaa !9
%25 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 14
%26 = load i32, ptr %25, align 8, !tbaa !11
%27 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %24, ptr noundef nonnull @.str.1, i32 noundef %18, i32 noundef %26) #2
%28 = load i32, ptr @ENODEV, align 4, !tbaa !5
%29 = sub nsw i32 0, %28
br label %130
30: ; preds = %20
%31 = zext nneg i32 %21 to i64
%32 = getelementptr inbounds [6 x i32], ptr @switch.table.pmic_mpp_populate, i64 0, i64 %31
%33 = load i32, ptr %32, align 4
store i32 %33, ptr %1, align 8, !tbaa !14
%34 = load i32, ptr @PMIC_MPP_REG_MODE_CTL, align 4, !tbaa !5
%35 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %34) #2
%36 = icmp slt i32 %35, 0
br i1 %36, label %130, label %37
37: ; preds = %30
%38 = load i32, ptr @PMIC_MPP_REG_MODE_VALUE_MASK, align 4, !tbaa !5
%39 = and i32 %38, %35
%40 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 1
store i32 %39, ptr %40, align 4, !tbaa !15
%41 = load i32, ptr @PMIC_MPP_REG_MODE_DIR_SHIFT, align 4, !tbaa !5
%42 = lshr i32 %35, %41
%43 = load i32, ptr @PMIC_MPP_REG_MODE_DIR_MASK, align 4, !tbaa !5
%44 = and i32 %42, %43
%45 = add nsw i32 %44, -134
%46 = icmp ult i32 %45, 7
br i1 %46, label %52, label %47
47: ; preds = %37
%48 = load i32, ptr %0, align 4, !tbaa !9
%49 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %48, ptr noundef nonnull @.str.2) #2
%50 = load i32, ptr @ENODEV, align 4, !tbaa !5
%51 = sub nsw i32 0, %50
br label %130
52: ; preds = %37
%53 = zext nneg i32 %45 to i64
%54 = getelementptr inbounds [7 x i32], ptr @switch.table.pmic_mpp_populate.3, i64 0, i64 %53
%55 = load i32, ptr %54, align 4
%56 = zext nneg i32 %45 to i64
%57 = getelementptr inbounds [7 x i32], ptr @switch.table.pmic_mpp_populate.4, i64 0, i64 %56
%58 = load i32, ptr %57, align 4
%59 = zext nneg i32 %45 to i64
%60 = getelementptr inbounds [7 x ptr], ptr @switch.table.pmic_mpp_populate.5, i64 0, i64 %59
%61 = load ptr, ptr %60, align 8
%62 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 2
store i32 %55, ptr %62, align 8, !tbaa !16
%63 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 3
store i32 %58, ptr %63, align 4, !tbaa !17
%64 = load ptr, ptr %61, align 8, !tbaa !18
%65 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 13
store ptr %64, ptr %65, align 8, !tbaa !19
%66 = load i32, ptr @PMIC_MPP_REG_MODE_FUNCTION_SHIFT, align 4, !tbaa !5
%67 = lshr i32 %35, %66
%68 = load i32, ptr @PMIC_MPP_REG_MODE_FUNCTION_MASK, align 4, !tbaa !5
%69 = and i32 %67, %68
%70 = load i32, ptr @PMIC_MPP_SELECTOR_DTEST_FIRST, align 4, !tbaa !5
%71 = icmp ult i32 %69, %70
br i1 %71, label %75, label %72
72: ; preds = %52
%73 = add nuw i32 %69, 1
%74 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 4
store i32 %73, ptr %74, align 8, !tbaa !20
br label %80
75: ; preds = %52
%76 = load i32, ptr @PMIC_MPP_SELECTOR_PAIRED, align 4, !tbaa !5
%77 = icmp eq i32 %69, %76
br i1 %77, label %78, label %80
78: ; preds = %75
%79 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 5
store i32 1, ptr %79, align 4, !tbaa !21
br label %80
80: ; preds = %75, %78, %72
%81 = load i32, ptr @PMIC_MPP_REG_DIG_VIN_CTL, align 4, !tbaa !5
%82 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %81) #2
%83 = icmp slt i32 %82, 0
br i1 %83, label %130, label %84
84: ; preds = %80
%85 = load i32, ptr @PMIC_MPP_REG_VIN_SHIFT, align 4, !tbaa !5
%86 = lshr i32 %82, %85
%87 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 6
%88 = load i32, ptr @PMIC_MPP_REG_VIN_MASK, align 4, !tbaa !5
%89 = and i32 %88, %86
store i32 %89, ptr %87, align 8, !tbaa !22
%90 = add nsw i32 %18, -130
%91 = icmp ult i32 %90, -2
br i1 %91, label %92, label %103
92: ; preds = %84
%93 = load i32, ptr @PMIC_MPP_REG_DIG_PULL_CTL, align 4, !tbaa !5
%94 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %93) #2
%95 = icmp slt i32 %94, 0
br i1 %95, label %130, label %96
96: ; preds = %92
%97 = load i32, ptr @PMIC_MPP_REG_PULL_SHIFT, align 4, !tbaa !5
%98 = lshr i32 %94, %97
%99 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 7
%100 = load i32, ptr @PMIC_MPP_REG_PULL_MASK, align 4, !tbaa !5
%101 = and i32 %100, %98
store i32 %101, ptr %99, align 4, !tbaa !23
%102 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 8
store i32 1, ptr %102, align 8, !tbaa !24
br label %103
103: ; preds = %96, %84
%104 = load i32, ptr @PMIC_MPP_REG_AIN_CTL, align 4, !tbaa !5
%105 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %104) #2
%106 = icmp slt i32 %105, 0
br i1 %106, label %130, label %107
107: ; preds = %103
%108 = load i32, ptr @PMIC_MPP_REG_AIN_ROUTE_SHIFT, align 4, !tbaa !5
%109 = lshr i32 %105, %108
%110 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 9
%111 = load i32, ptr @PMIC_MPP_REG_AIN_ROUTE_MASK, align 4, !tbaa !5
%112 = and i32 %111, %109
store i32 %112, ptr %110, align 4, !tbaa !25
%113 = load i32, ptr @PMIC_MPP_REG_SINK_CTL, align 4, !tbaa !5
%114 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %113) #2
%115 = icmp slt i32 %114, 0
br i1 %115, label %130, label %116
116: ; preds = %107
%117 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 10
store i32 %114, ptr %117, align 8, !tbaa !26
%118 = load i32, ptr @PMIC_MPP_REG_AOUT_CTL, align 4, !tbaa !5
%119 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %118) #2
%120 = icmp slt i32 %119, 0
br i1 %120, label %130, label %121
121: ; preds = %116
%122 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 11
store i32 %119, ptr %122, align 4, !tbaa !27
%123 = load i32, ptr @PMIC_MPP_REG_EN_CTL, align 4, !tbaa !5
%124 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %123) #2
%125 = icmp slt i32 %124, 0
br i1 %125, label %130, label %126
126: ; preds = %121
%127 = icmp ne i32 %124, 0
%128 = zext i1 %127 to i32
%129 = getelementptr inbounds %struct.pmic_mpp_pad, ptr %1, i64 0, i32 12
store i32 %128, ptr %129, align 8, !tbaa !28
br label %130
130: ; preds = %121, %116, %107, %103, %92, %80, %30, %16, %2, %126, %47, %23, %9
%131 = phi i32 [ %15, %9 ], [ %29, %23 ], [ %51, %47 ], [ 0, %126 ], [ %4, %2 ], [ %18, %16 ], [ %35, %30 ], [ %82, %80 ], [ %94, %92 ], [ %105, %103 ], [ %114, %107 ], [ %119, %116 ], [ %124, %121 ]
ret i32 %131
}
declare i32 @pmic_mpp_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"pmic_mpp_state", !6, i64 0}
!11 = !{!12, !6, i64 64}
!12 = !{!"pmic_mpp_pad", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !13, i64 56, !6, i64 64}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!12, !6, i64 0}
!15 = !{!12, !6, i64 4}
!16 = !{!12, !6, i64 8}
!17 = !{!12, !6, i64 12}
!18 = !{!13, !13, i64 0}
!19 = !{!12, !13, i64 56}
!20 = !{!12, !6, i64 16}
!21 = !{!12, !6, i64 20}
!22 = !{!12, !6, i64 24}
!23 = !{!12, !6, i64 28}
!24 = !{!12, !6, i64 32}
!25 = !{!12, !6, i64 36}
!26 = !{!12, !6, i64 40}
!27 = !{!12, !6, i64 44}
!28 = !{!12, !6, i64 48}
| ; ModuleID = 'AnghaBench/linux/drivers/pinctrl/qcom/extr_pinctrl-spmi-mpp.c_pmic_mpp_populate.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/qcom/extr_pinctrl-spmi-mpp.c_pmic_mpp_populate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PMIC_MPP_REG_TYPE = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_TYPE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"incorrect block type 0x%x at 0x%x\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_SUBTYPE = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [31 x i8] c"unknown MPP type 0x%x at 0x%x\0A\00", align 1
@PMIC_MPP_REG_MODE_CTL = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_VALUE_MASK = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_DIR_SHIFT = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_DIR_MASK = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_DIGITAL = common local_unnamed_addr global ptr null, align 8
@PMIC_MPP_ANALOG = common local_unnamed_addr global ptr null, align 8
@PMIC_MPP_SINK = common local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [23 x i8] c"unknown MPP direction\0A\00", align 1
@PMIC_MPP_REG_MODE_FUNCTION_SHIFT = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_MODE_FUNCTION_MASK = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_SELECTOR_DTEST_FIRST = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_SELECTOR_PAIRED = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_DIG_VIN_CTL = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_VIN_SHIFT = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_VIN_MASK = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_DIG_PULL_CTL = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_PULL_SHIFT = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_PULL_MASK = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AIN_CTL = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AIN_ROUTE_SHIFT = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AIN_ROUTE_MASK = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_SINK_CTL = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_AOUT_CTL = common local_unnamed_addr global i32 0, align 4
@PMIC_MPP_REG_EN_CTL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pmic_mpp_populate], section "llvm.metadata"
@switch.table.pmic_mpp_populate = private unnamed_addr constant [6 x i32] [i32 4, i32 4, i32 8, i32 4, i32 4, i32 4], align 4
@switch.table.pmic_mpp_populate.3 = private unnamed_addr constant [7 x i32] [i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 1], align 4
@switch.table.pmic_mpp_populate.4 = private unnamed_addr constant [7 x i32] [i32 1, i32 0, i32 1, i32 1, i32 1, i32 0, i32 1], align 4
@switch.table.pmic_mpp_populate.5 = private unnamed_addr constant [7 x ptr] [ptr @PMIC_MPP_DIGITAL, ptr @PMIC_MPP_DIGITAL, ptr @PMIC_MPP_DIGITAL, ptr @PMIC_MPP_SINK, ptr @PMIC_MPP_ANALOG, ptr @PMIC_MPP_ANALOG, ptr @PMIC_MPP_ANALOG], align 8
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pmic_mpp_populate(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @PMIC_MPP_REG_TYPE, align 4, !tbaa !6
%4 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef %1, i32 noundef %3) #2
%5 = icmp slt i32 %4, 0
br i1 %5, label %130, label %6
6: ; preds = %2
%7 = load i32, ptr @PMIC_MPP_TYPE, align 4, !tbaa !6
%8 = icmp eq i32 %4, %7
br i1 %8, label %16, label %9
9: ; preds = %6
%10 = load i32, ptr %0, align 4, !tbaa !10
%11 = getelementptr inbounds i8, ptr %1, i64 64
%12 = load i32, ptr %11, align 8, !tbaa !12
%13 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %10, ptr noundef nonnull @.str, i32 noundef %4, i32 noundef %12) #2
%14 = load i32, ptr @ENODEV, align 4, !tbaa !6
%15 = sub nsw i32 0, %14
br label %130
16: ; preds = %6
%17 = load i32, ptr @PMIC_MPP_REG_SUBTYPE, align 4, !tbaa !6
%18 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef %1, i32 noundef %17) #2
%19 = icmp slt i32 %18, 0
br i1 %19, label %130, label %20
20: ; preds = %16
%21 = add nsw i32 %18, -128
%22 = icmp ult i32 %21, 6
br i1 %22, label %30, label %23
23: ; preds = %20
%24 = load i32, ptr %0, align 4, !tbaa !10
%25 = getelementptr inbounds i8, ptr %1, i64 64
%26 = load i32, ptr %25, align 8, !tbaa !12
%27 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %24, ptr noundef nonnull @.str.1, i32 noundef %18, i32 noundef %26) #2
%28 = load i32, ptr @ENODEV, align 4, !tbaa !6
%29 = sub nsw i32 0, %28
br label %130
30: ; preds = %20
%31 = zext nneg i32 %21 to i64
%32 = getelementptr inbounds [6 x i32], ptr @switch.table.pmic_mpp_populate, i64 0, i64 %31
%33 = load i32, ptr %32, align 4
store i32 %33, ptr %1, align 8, !tbaa !15
%34 = load i32, ptr @PMIC_MPP_REG_MODE_CTL, align 4, !tbaa !6
%35 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %34) #2
%36 = icmp slt i32 %35, 0
br i1 %36, label %130, label %37
37: ; preds = %30
%38 = load i32, ptr @PMIC_MPP_REG_MODE_VALUE_MASK, align 4, !tbaa !6
%39 = and i32 %38, %35
%40 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %39, ptr %40, align 4, !tbaa !16
%41 = load i32, ptr @PMIC_MPP_REG_MODE_DIR_SHIFT, align 4, !tbaa !6
%42 = lshr i32 %35, %41
%43 = load i32, ptr @PMIC_MPP_REG_MODE_DIR_MASK, align 4, !tbaa !6
%44 = and i32 %42, %43
%45 = add nsw i32 %44, -134
%46 = icmp ult i32 %45, 7
br i1 %46, label %52, label %47
47: ; preds = %37
%48 = load i32, ptr %0, align 4, !tbaa !10
%49 = tail call i32 (i32, ptr, ...) @dev_err(i32 noundef %48, ptr noundef nonnull @.str.2) #2
%50 = load i32, ptr @ENODEV, align 4, !tbaa !6
%51 = sub nsw i32 0, %50
br label %130
52: ; preds = %37
%53 = zext nneg i32 %45 to i64
%54 = getelementptr inbounds [7 x i32], ptr @switch.table.pmic_mpp_populate.3, i64 0, i64 %53
%55 = load i32, ptr %54, align 4
%56 = zext nneg i32 %45 to i64
%57 = getelementptr inbounds [7 x i32], ptr @switch.table.pmic_mpp_populate.4, i64 0, i64 %56
%58 = load i32, ptr %57, align 4
%59 = zext nneg i32 %45 to i64
%60 = getelementptr inbounds [7 x ptr], ptr @switch.table.pmic_mpp_populate.5, i64 0, i64 %59
%61 = load ptr, ptr %60, align 8
%62 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %55, ptr %62, align 8, !tbaa !17
%63 = getelementptr inbounds i8, ptr %1, i64 12
store i32 %58, ptr %63, align 4, !tbaa !18
%64 = load ptr, ptr %61, align 8, !tbaa !19
%65 = getelementptr inbounds i8, ptr %1, i64 56
store ptr %64, ptr %65, align 8, !tbaa !20
%66 = load i32, ptr @PMIC_MPP_REG_MODE_FUNCTION_SHIFT, align 4, !tbaa !6
%67 = lshr i32 %35, %66
%68 = load i32, ptr @PMIC_MPP_REG_MODE_FUNCTION_MASK, align 4, !tbaa !6
%69 = and i32 %67, %68
%70 = load i32, ptr @PMIC_MPP_SELECTOR_DTEST_FIRST, align 4, !tbaa !6
%71 = icmp ult i32 %69, %70
br i1 %71, label %75, label %72
72: ; preds = %52
%73 = add nuw i32 %69, 1
%74 = getelementptr inbounds i8, ptr %1, i64 16
store i32 %73, ptr %74, align 8, !tbaa !21
br label %80
75: ; preds = %52
%76 = load i32, ptr @PMIC_MPP_SELECTOR_PAIRED, align 4, !tbaa !6
%77 = icmp eq i32 %69, %76
br i1 %77, label %78, label %80
78: ; preds = %75
%79 = getelementptr inbounds i8, ptr %1, i64 20
store i32 1, ptr %79, align 4, !tbaa !22
br label %80
80: ; preds = %75, %78, %72
%81 = load i32, ptr @PMIC_MPP_REG_DIG_VIN_CTL, align 4, !tbaa !6
%82 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %81) #2
%83 = icmp slt i32 %82, 0
br i1 %83, label %130, label %84
84: ; preds = %80
%85 = load i32, ptr @PMIC_MPP_REG_VIN_SHIFT, align 4, !tbaa !6
%86 = lshr i32 %82, %85
%87 = getelementptr inbounds i8, ptr %1, i64 24
%88 = load i32, ptr @PMIC_MPP_REG_VIN_MASK, align 4, !tbaa !6
%89 = and i32 %88, %86
store i32 %89, ptr %87, align 8, !tbaa !23
%90 = add nsw i32 %18, -130
%91 = icmp ult i32 %90, -2
br i1 %91, label %92, label %103
92: ; preds = %84
%93 = load i32, ptr @PMIC_MPP_REG_DIG_PULL_CTL, align 4, !tbaa !6
%94 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %93) #2
%95 = icmp slt i32 %94, 0
br i1 %95, label %130, label %96
96: ; preds = %92
%97 = load i32, ptr @PMIC_MPP_REG_PULL_SHIFT, align 4, !tbaa !6
%98 = lshr i32 %94, %97
%99 = getelementptr inbounds i8, ptr %1, i64 28
%100 = load i32, ptr @PMIC_MPP_REG_PULL_MASK, align 4, !tbaa !6
%101 = and i32 %100, %98
store i32 %101, ptr %99, align 4, !tbaa !24
%102 = getelementptr inbounds i8, ptr %1, i64 32
store i32 1, ptr %102, align 8, !tbaa !25
br label %103
103: ; preds = %96, %84
%104 = load i32, ptr @PMIC_MPP_REG_AIN_CTL, align 4, !tbaa !6
%105 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %104) #2
%106 = icmp slt i32 %105, 0
br i1 %106, label %130, label %107
107: ; preds = %103
%108 = load i32, ptr @PMIC_MPP_REG_AIN_ROUTE_SHIFT, align 4, !tbaa !6
%109 = lshr i32 %105, %108
%110 = getelementptr inbounds i8, ptr %1, i64 36
%111 = load i32, ptr @PMIC_MPP_REG_AIN_ROUTE_MASK, align 4, !tbaa !6
%112 = and i32 %111, %109
store i32 %112, ptr %110, align 4, !tbaa !26
%113 = load i32, ptr @PMIC_MPP_REG_SINK_CTL, align 4, !tbaa !6
%114 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %113) #2
%115 = icmp slt i32 %114, 0
br i1 %115, label %130, label %116
116: ; preds = %107
%117 = getelementptr inbounds i8, ptr %1, i64 40
store i32 %114, ptr %117, align 8, !tbaa !27
%118 = load i32, ptr @PMIC_MPP_REG_AOUT_CTL, align 4, !tbaa !6
%119 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %118) #2
%120 = icmp slt i32 %119, 0
br i1 %120, label %130, label %121
121: ; preds = %116
%122 = getelementptr inbounds i8, ptr %1, i64 44
store i32 %119, ptr %122, align 4, !tbaa !28
%123 = load i32, ptr @PMIC_MPP_REG_EN_CTL, align 4, !tbaa !6
%124 = tail call i32 @pmic_mpp_read(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %123) #2
%125 = icmp slt i32 %124, 0
br i1 %125, label %130, label %126
126: ; preds = %121
%127 = icmp ne i32 %124, 0
%128 = zext i1 %127 to i32
%129 = getelementptr inbounds i8, ptr %1, i64 48
store i32 %128, ptr %129, align 8, !tbaa !29
br label %130
130: ; preds = %121, %116, %107, %103, %92, %80, %30, %16, %2, %126, %47, %23, %9
%131 = phi i32 [ %15, %9 ], [ %29, %23 ], [ %51, %47 ], [ 0, %126 ], [ %4, %2 ], [ %18, %16 ], [ %35, %30 ], [ %82, %80 ], [ %94, %92 ], [ %105, %103 ], [ %114, %107 ], [ %119, %116 ], [ %124, %121 ]
ret i32 %131
}
declare i32 @pmic_mpp_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"pmic_mpp_state", !7, i64 0}
!12 = !{!13, !7, i64 64}
!13 = !{!"pmic_mpp_pad", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !14, i64 56, !7, i64 64}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !7, i64 0}
!16 = !{!13, !7, i64 4}
!17 = !{!13, !7, i64 8}
!18 = !{!13, !7, i64 12}
!19 = !{!14, !14, i64 0}
!20 = !{!13, !14, i64 56}
!21 = !{!13, !7, i64 16}
!22 = !{!13, !7, i64 20}
!23 = !{!13, !7, i64 24}
!24 = !{!13, !7, i64 28}
!25 = !{!13, !7, i64 32}
!26 = !{!13, !7, i64 36}
!27 = !{!13, !7, i64 40}
!28 = !{!13, !7, i64 44}
!29 = !{!13, !7, i64 48}
| linux_drivers_pinctrl_qcom_extr_pinctrl-spmi-mpp.c_pmic_mpp_populate |
; ModuleID = 'AnghaBench/freebsd/contrib/libucl/src/extr_ucl_emitter_utils.c_ucl_fd_append_int.c'
source_filename = "AnghaBench/freebsd/contrib/libucl/src/extr_ucl_emitter_utils.c_ucl_fd_append_int.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"%jd\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ucl_fd_append_int], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ucl_fd_append_int(i64 noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca [64 x i8], align 16
%4 = load i32, ptr %1, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3
%5 = trunc i64 %0 to i32
%6 = call i32 @snprintf(ptr noundef nonnull %3, i32 noundef 64, ptr noundef nonnull @.str, i32 noundef %5) #3
%7 = call i32 @strlen(ptr noundef nonnull %3) #3
%8 = call i32 @write(i32 noundef %4, ptr noundef nonnull %3, i32 noundef %7) #3
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libucl/src/extr_ucl_emitter_utils.c_ucl_fd_append_int.c'
source_filename = "AnghaBench/freebsd/contrib/libucl/src/extr_ucl_emitter_utils.c_ucl_fd_append_int.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%jd\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ucl_fd_append_int], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ucl_fd_append_int(i64 noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca [64 x i8], align 1
%4 = load i32, ptr %1, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %3) #3
%5 = trunc i64 %0 to i32
%6 = call i32 @snprintf(ptr noundef nonnull %3, i32 noundef 64, ptr noundef nonnull @.str, i32 noundef %5) #3
%7 = call i32 @strlen(ptr noundef nonnull %3) #3
%8 = call i32 @write(i32 noundef %4, ptr noundef nonnull %3, i32 noundef %7) #3
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %3) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_libucl_src_extr_ucl_emitter_utils.c_ucl_fd_append_int |
; ModuleID = 'AnghaBench/TDengine/src/util/src/extr_sql.c_yyTraceShift.c'
source_filename = "AnghaBench/TDengine/src/util/src/extr_sql.c_yyTraceShift.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i64, ptr }
%struct.TYPE_4__ = type { i64 }
@yyTraceFILE = dso_local local_unnamed_addr global i64 0, align 8
@YYNSTATE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"%sShift '%s', go to state %d\0A\00", align 1
@yyTracePrompt = dso_local local_unnamed_addr global ptr null, align 8
@yyTokenName = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [14 x i8] c"%sShift '%s'\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @yyTraceShift], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @yyTraceShift(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i64, ptr @yyTraceFILE, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %21, label %5
5: ; preds = %2
%6 = load i32, ptr @YYNSTATE, align 4, !tbaa !9
%7 = icmp sgt i32 %6, %1
%8 = load ptr, ptr @yyTracePrompt, align 8, !tbaa !11
%9 = load ptr, ptr @yyTokenName, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = load i64, ptr %0, align 8, !tbaa !15
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %11, i64 %12
%14 = load i64, ptr %13, align 8, !tbaa !16
%15 = getelementptr inbounds ptr, ptr %9, i64 %14
%16 = load ptr, ptr %15, align 8, !tbaa !11
br i1 %7, label %17, label %19
17: ; preds = %5
%18 = tail call i32 (i64, ptr, ptr, ptr, ...) @fprintf(i64 noundef %3, ptr noundef nonnull @.str, ptr noundef %8, ptr noundef %16, i32 noundef %1) #2
br label %21
19: ; preds = %5
%20 = tail call i32 (i64, ptr, ptr, ptr, ...) @fprintf(i64 noundef %3, ptr noundef nonnull @.str.1, ptr noundef %8, ptr noundef %16) #2
br label %21
21: ; preds = %17, %19, %2
ret void
}
declare i32 @fprintf(i64 noundef, ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"TYPE_5__", !6, i64 0, !12, i64 8}
!15 = !{!14, !6, i64 0}
!16 = !{!17, !6, i64 0}
!17 = !{!"TYPE_4__", !6, i64 0}
| ; ModuleID = 'AnghaBench/TDengine/src/util/src/extr_sql.c_yyTraceShift.c'
source_filename = "AnghaBench/TDengine/src/util/src/extr_sql.c_yyTraceShift.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64 }
@yyTraceFILE = common local_unnamed_addr global i64 0, align 8
@YYNSTATE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"%sShift '%s', go to state %d\0A\00", align 1
@yyTracePrompt = common local_unnamed_addr global ptr null, align 8
@yyTokenName = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [14 x i8] c"%sShift '%s'\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @yyTraceShift], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @yyTraceShift(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i64, ptr @yyTraceFILE, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %21, label %5
5: ; preds = %2
%6 = load i32, ptr @YYNSTATE, align 4, !tbaa !10
%7 = icmp sgt i32 %6, %1
%8 = load ptr, ptr @yyTracePrompt, align 8, !tbaa !12
%9 = load ptr, ptr @yyTokenName, align 8, !tbaa !12
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = load i64, ptr %0, align 8, !tbaa !16
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %11, i64 %12
%14 = load i64, ptr %13, align 8, !tbaa !17
%15 = getelementptr inbounds ptr, ptr %9, i64 %14
%16 = load ptr, ptr %15, align 8, !tbaa !12
br i1 %7, label %17, label %19
17: ; preds = %5
%18 = tail call i32 (i64, ptr, ptr, ptr, ...) @fprintf(i64 noundef %3, ptr noundef nonnull @.str, ptr noundef %8, ptr noundef %16, i32 noundef %1) #2
br label %21
19: ; preds = %5
%20 = tail call i32 (i64, ptr, ptr, ptr, ...) @fprintf(i64 noundef %3, ptr noundef nonnull @.str.1, ptr noundef %8, ptr noundef %16) #2
br label %21
21: ; preds = %17, %19, %2
ret void
}
declare i32 @fprintf(i64 noundef, ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 8}
!15 = !{!"TYPE_5__", !7, i64 0, !13, i64 8}
!16 = !{!15, !7, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_4__", !7, i64 0}
| TDengine_src_util_src_extr_sql.c_yyTraceShift |
; ModuleID = 'AnghaBench/linux/drivers/iio/magnetometer/extr_ak8974.c_ak8974_getresult.c'
source_filename = "AnghaBench/linux/drivers/iio/magnetometer/extr_ak8974.c_ak8974_getresult.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ak8974 = type { i32, ptr }
@AK8974_INT_SRC = dso_local local_unnamed_addr global i32 0, align 4
@AK8974_INT_RANGE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"range overflow in sensor\0A\00", align 1
@ERANGE = dso_local local_unnamed_addr global i32 0, align 4
@AK8974_DATA_X = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ak8974_getresult], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ak8974_getresult(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = tail call i32 @ak8974_await_drdy(ptr noundef %0) #3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %26
6: ; preds = %2
%7 = load i32, ptr %0, align 8, !tbaa !5
%8 = load i32, ptr @AK8974_INT_SRC, align 4, !tbaa !11
%9 = call i32 @regmap_read(i32 noundef %7, i32 noundef %8, ptr noundef nonnull %3) #3
%10 = icmp slt i32 %9, 0
br i1 %10, label %26, label %11
11: ; preds = %6
%12 = load i32, ptr %3, align 4, !tbaa !11
%13 = load i32, ptr @AK8974_INT_RANGE, align 4, !tbaa !11
%14 = and i32 %13, %12
%15 = icmp eq i32 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %11
%17 = getelementptr inbounds %struct.ak8974, ptr %0, i64 0, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !12
%19 = call i32 @dev_err(ptr noundef %18, ptr noundef nonnull @.str) #3
%20 = load i32, ptr @ERANGE, align 4, !tbaa !11
%21 = sub nsw i32 0, %20
br label %26
22: ; preds = %11
%23 = load i32, ptr %0, align 8, !tbaa !5
%24 = load i32, ptr @AK8974_DATA_X, align 4, !tbaa !11
%25 = call i32 @regmap_bulk_read(i32 noundef %23, i32 noundef %24, ptr noundef %1, i32 noundef 6) #3
br label %26
26: ; preds = %22, %6, %2, %16
%27 = phi i32 [ %21, %16 ], [ %4, %2 ], [ %9, %6 ], [ %25, %22 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ak8974_await_drdy(ptr noundef) local_unnamed_addr #2
declare i32 @regmap_read(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @regmap_bulk_read(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ak8974", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/iio/magnetometer/extr_ak8974.c_ak8974_getresult.c'
source_filename = "AnghaBench/linux/drivers/iio/magnetometer/extr_ak8974.c_ak8974_getresult.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AK8974_INT_SRC = common local_unnamed_addr global i32 0, align 4
@AK8974_INT_RANGE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"range overflow in sensor\0A\00", align 1
@ERANGE = common local_unnamed_addr global i32 0, align 4
@AK8974_DATA_X = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ak8974_getresult], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ak8974_getresult(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = tail call i32 @ak8974_await_drdy(ptr noundef %0) #3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %26
6: ; preds = %2
%7 = load i32, ptr %0, align 8, !tbaa !6
%8 = load i32, ptr @AK8974_INT_SRC, align 4, !tbaa !12
%9 = call i32 @regmap_read(i32 noundef %7, i32 noundef %8, ptr noundef nonnull %3) #3
%10 = icmp slt i32 %9, 0
br i1 %10, label %26, label %11
11: ; preds = %6
%12 = load i32, ptr %3, align 4, !tbaa !12
%13 = load i32, ptr @AK8974_INT_RANGE, align 4, !tbaa !12
%14 = and i32 %13, %12
%15 = icmp eq i32 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %11
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !13
%19 = call i32 @dev_err(ptr noundef %18, ptr noundef nonnull @.str) #3
%20 = load i32, ptr @ERANGE, align 4, !tbaa !12
%21 = sub nsw i32 0, %20
br label %26
22: ; preds = %11
%23 = load i32, ptr %0, align 8, !tbaa !6
%24 = load i32, ptr @AK8974_DATA_X, align 4, !tbaa !12
%25 = call i32 @regmap_bulk_read(i32 noundef %23, i32 noundef %24, ptr noundef %1, i32 noundef 6) #3
br label %26
26: ; preds = %22, %6, %2, %16
%27 = phi i32 [ %21, %16 ], [ %4, %2 ], [ %9, %6 ], [ %25, %22 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ak8974_await_drdy(ptr noundef) local_unnamed_addr #2
declare i32 @regmap_read(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @regmap_bulk_read(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ak8974", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
| linux_drivers_iio_magnetometer_extr_ak8974.c_ak8974_getresult |
; ModuleID = 'AnghaBench/radare2/libr/anal/extr_esil.c_esil_mem_modeq.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_esil.c_esil_mem_modeq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @esil_mem_modeq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @esil_mem_modeq(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = tail call i32 @esil_mem_modeq_n(ptr noundef nonnull %0, i32 noundef %3) #2
ret i32 %4
}
declare i32 @esil_mem_modeq_n(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/radare2/libr/anal/extr_esil.c_esil_mem_modeq.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_esil.c_esil_mem_modeq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @esil_mem_modeq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @esil_mem_modeq(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !11
%4 = tail call i32 @esil_mem_modeq_n(ptr noundef nonnull %0, i32 noundef %3) #2
ret i32 %4
}
declare i32 @esil_mem_modeq_n(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| radare2_libr_anal_extr_esil.c_esil_mem_modeq |
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_mmu.c_kvm_mmu_page_set_gfn.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_mmu.c_kvm_mmu_page_set_gfn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.kvm_mmu_page = type { i32, ptr, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@.str = private unnamed_addr constant [63 x i8] c"gfn mismatch under direct page %llx (expected %llx, got %llx)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @kvm_mmu_page_set_gfn], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @kvm_mmu_page_set_gfn(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds %struct.kvm_mmu_page, ptr %0, i64 0, i32 2
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = getelementptr inbounds %struct.kvm_mmu_page, ptr %0, i64 0, i32 1
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = sext i32 %1 to i64
%11 = getelementptr inbounds i64, ptr %9, i64 %10
store i64 %2, ptr %11, align 8, !tbaa !13
br label %22
12: ; preds = %3
%13 = tail call i64 @kvm_mmu_page_get_gfn(ptr noundef nonnull %0, i32 noundef %1) #2
%14 = icmp ne i64 %13, %2
%15 = zext i1 %14 to i32
%16 = tail call i64 @WARN_ON(i32 noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %22, label %18
18: ; preds = %12
%19 = load i32, ptr %0, align 8, !tbaa !15
%20 = tail call i64 @kvm_mmu_page_get_gfn(ptr noundef nonnull %0, i32 noundef %1) #2
%21 = tail call i32 @pr_err_ratelimited(ptr noundef nonnull @.str, i32 noundef %19, i64 noundef %20, i64 noundef %2) #2
br label %22
22: ; preds = %7, %18, %12
ret void
}
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i64 @kvm_mmu_page_get_gfn(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_err_ratelimited(ptr noundef, i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"kvm_mmu_page", !7, i64 0, !10, i64 8, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_mmu.c_kvm_mmu_page_set_gfn.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_mmu.c_kvm_mmu_page_set_gfn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [63 x i8] c"gfn mismatch under direct page %llx (expected %llx, got %llx)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @kvm_mmu_page_set_gfn], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @kvm_mmu_page_set_gfn(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 16
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = sext i32 %1 to i64
%11 = getelementptr inbounds i64, ptr %9, i64 %10
store i64 %2, ptr %11, align 8, !tbaa !14
br label %22
12: ; preds = %3
%13 = tail call i64 @kvm_mmu_page_get_gfn(ptr noundef nonnull %0, i32 noundef %1) #2
%14 = icmp ne i64 %13, %2
%15 = zext i1 %14 to i32
%16 = tail call i64 @WARN_ON(i32 noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %22, label %18
18: ; preds = %12
%19 = load i32, ptr %0, align 8, !tbaa !16
%20 = tail call i64 @kvm_mmu_page_get_gfn(ptr noundef nonnull %0, i32 noundef %1) #2
%21 = tail call i32 @pr_err_ratelimited(ptr noundef nonnull @.str, i32 noundef %19, i64 noundef %20, i64 noundef %2) #2
br label %22
22: ; preds = %7, %18, %12
ret void
}
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i64 @kvm_mmu_page_get_gfn(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_err_ratelimited(ptr noundef, i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"kvm_mmu_page", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!7, !8, i64 0}
| linux_arch_x86_kvm_extr_mmu.c_kvm_mmu_page_set_gfn |
; ModuleID = 'AnghaBench/linux/sound/isa/gus/extr_gus_io.c___snd_gf1_look8.c'
source_filename = "AnghaBench/linux/sound/isa/gus/extr_gus_io.c___snd_gf1_look8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @__snd_gf1_look8], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal zeroext i8 @__snd_gf1_look8(ptr nocapture noundef readonly %0, i8 noundef zeroext %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @outb(i8 noundef zeroext %1, i32 noundef %4) #2
%6 = tail call i32 (...) @mb() #2
%7 = load i32, ptr %0, align 4, !tbaa !11
%8 = tail call zeroext i8 @inb(i32 noundef %7) #2
ret i8 %8
}
declare i32 @outb(i8 noundef zeroext, i32 noundef) local_unnamed_addr #1
declare i32 @mb(...) local_unnamed_addr #1
declare zeroext i8 @inb(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 4}
!6 = !{!"snd_gus_card", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!6, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/isa/gus/extr_gus_io.c___snd_gf1_look8.c'
source_filename = "AnghaBench/linux/sound/isa/gus/extr_gus_io.c___snd_gf1_look8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__snd_gf1_look8], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal zeroext i8 @__snd_gf1_look8(ptr nocapture noundef readonly %0, i8 noundef zeroext %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @outb(i8 noundef zeroext %1, i32 noundef %4) #2
%6 = tail call i32 @mb() #2
%7 = load i32, ptr %0, align 4, !tbaa !12
%8 = tail call zeroext i8 @inb(i32 noundef %7) #2
ret i8 %8
}
declare i32 @outb(i8 noundef zeroext, i32 noundef) local_unnamed_addr #1
declare i32 @mb(...) local_unnamed_addr #1
declare zeroext i8 @inb(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 4}
!7 = !{!"snd_gus_card", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!7, !9, i64 0}
| linux_sound_isa_gus_extr_gus_io.c___snd_gf1_look8 |
; ModuleID = 'AnghaBench/linux/arch/x86/pci/extr_ce4100.c_sata_revid_init.c'
source_filename = "AnghaBench/linux/arch/x86/pci/extr_ce4100.c_sata_revid_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i64 }
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @sata_revid_init(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
store i32 17170688, ptr %0, align 8, !tbaa !5
%2 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
store i64 0, ptr %2, align 8, !tbaa !12
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"sim_dev_reg", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!6, !11, i64 8}
| ; ModuleID = 'AnghaBench/linux/arch/x86/pci/extr_ce4100.c_sata_revid_init.c'
source_filename = "AnghaBench/linux/arch/x86/pci/extr_ce4100.c_sata_revid_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @sata_revid_init(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
store i32 17170688, ptr %0, align 8, !tbaa !6
%2 = getelementptr inbounds i8, ptr %0, i64 8
store i64 0, ptr %2, align 8, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"sim_dev_reg", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!7, !12, i64 8}
| linux_arch_x86_pci_extr_ce4100.c_sata_revid_init |
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/sis/extr_init301.c_SiS_GetCRT2ResInfo.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/sis/extr_init301.c_SiS_GetCRT2ResInfo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.SiS_Private = type { i16, i32, i16, i16, i16, i16, i16, i64, i32, i32, i32, i32, i32, i32, i64, i64, i32, i32, ptr, ptr, ptr, i64 }
%struct.TYPE_4__ = type { i16, i16 }
%struct.TYPE_5__ = type { i16, i16 }
%struct.TYPE_6__ = type { i16 }
@HalfDCLK = dso_local local_unnamed_addr global i32 0, align 4
@SIS_315H = dso_local local_unnamed_addr global i64 0, align 8
@SetDOSMode = dso_local local_unnamed_addr global i32 0, align 4
@DoubleScanMode = dso_local local_unnamed_addr global i16 0, align 2
@VB_SISVB = dso_local local_unnamed_addr global i32 0, align 4
@VB_NoLCD = dso_local local_unnamed_addr global i32 0, align 4
@SetCRT2ToLCD = dso_local local_unnamed_addr global i32 0, align 4
@LCDVESATiming = dso_local local_unnamed_addr global i32 0, align 4
@DontExpandLCD = dso_local local_unnamed_addr global i32 0, align 4
@SetCRT2ToHiVision = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @SiS_GetCRT2ResInfo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @SiS_GetCRT2ResInfo(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2) #0 {
%4 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 21
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %3
%8 = load i16, ptr %0, align 8, !tbaa !13
%9 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = load i32, ptr @HalfDCLK, align 4, !tbaa !15
%12 = and i32 %11, %10
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i16
%15 = shl i16 %8, %14
%16 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 3
store i16 %15, ptr %16, align 2, !tbaa !16
%17 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 2
store i16 %15, ptr %17, align 8, !tbaa !17
%18 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 6
%19 = load i16, ptr %18, align 8, !tbaa !18
br label %205
20: ; preds = %3
%21 = tail call zeroext i16 @SiS_GetResInfo(ptr noundef nonnull %0, i16 noundef zeroext %1, i16 noundef zeroext %2) #2
%22 = icmp ult i16 %1, 20
%23 = zext i16 %21 to i64
br i1 %22, label %24, label %29
24: ; preds = %20
%25 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 20
%26 = load ptr, ptr %25, align 8, !tbaa !19
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %26, i64 %23
%28 = getelementptr inbounds %struct.TYPE_4__, ptr %26, i64 %23, i32 1
br label %39
29: ; preds = %20
%30 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 19
%31 = load ptr, ptr %30, align 8, !tbaa !20
%32 = getelementptr inbounds %struct.TYPE_5__, ptr %31, i64 %23
%33 = getelementptr inbounds %struct.TYPE_5__, ptr %31, i64 %23, i32 1
%34 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 18
%35 = load ptr, ptr %34, align 8, !tbaa !21
%36 = zext i16 %2 to i64
%37 = getelementptr inbounds %struct.TYPE_6__, ptr %35, i64 %36
%38 = load i16, ptr %37, align 2, !tbaa !22
br label %39
39: ; preds = %29, %24
%40 = phi ptr [ %28, %24 ], [ %33, %29 ]
%41 = phi i16 [ 0, %24 ], [ %38, %29 ]
%42 = phi ptr [ %27, %24 ], [ %32, %29 ]
%43 = load i16, ptr %42, align 2, !tbaa !24
%44 = load i16, ptr %40, align 2, !tbaa !24
%45 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 15
%46 = load i64, ptr %45, align 8, !tbaa !25
%47 = icmp eq i64 %46, 0
br i1 %47, label %48, label %95
48: ; preds = %39
%49 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 14
%50 = load i64, ptr %49, align 8, !tbaa !26
%51 = icmp eq i64 %50, 0
br i1 %51, label %52, label %95
52: ; preds = %48
%53 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 7
%54 = load i64, ptr %53, align 8, !tbaa !27
%55 = load i64, ptr @SIS_315H, align 8, !tbaa !28
%56 = icmp slt i64 %54, %55
br i1 %56, label %82, label %57
57: ; preds = %52
%58 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 8
%59 = load i32, ptr %58, align 8, !tbaa !29
%60 = icmp eq i32 %59, 1
br i1 %60, label %61, label %82
61: ; preds = %57
%62 = icmp eq i16 %1, 3
br i1 %62, label %72, label %63
63: ; preds = %61
%64 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 9
%65 = load i32, ptr %64, align 4, !tbaa !30
%66 = load i32, ptr @SetDOSMode, align 4, !tbaa !15
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
br i1 %68, label %72, label %69
69: ; preds = %63
%70 = icmp eq i16 %44, 350
%71 = select i1 %70, i16 400, i16 %44
br label %72
72: ; preds = %69, %63, %61
%73 = phi i16 [ %71, %69 ], [ %44, %63 ], [ %44, %61 ]
%74 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 17
%75 = load i32, ptr %74, align 4, !tbaa !31
%76 = tail call i32 @SiS_GetReg(i32 noundef %75, i32 noundef 58) #2
%77 = and i32 %76, 1
%78 = icmp ne i32 %77, 0
%79 = icmp eq i16 %1, 18
%80 = and i1 %79, %78
%81 = select i1 %80, i16 400, i16 %73
br label %82
82: ; preds = %72, %57, %52
%83 = phi i16 [ %44, %57 ], [ %44, %52 ], [ %81, %72 ]
%84 = zext i16 %41 to i32
%85 = load i32, ptr @HalfDCLK, align 4, !tbaa !15
%86 = and i32 %85, %84
%87 = icmp ne i32 %86, 0
%88 = zext i1 %87 to i16
%89 = shl i16 %43, %88
%90 = load i16, ptr @DoubleScanMode, align 2, !tbaa !24
%91 = and i16 %90, %41
%92 = icmp ne i16 %91, 0
%93 = zext i1 %92 to i16
%94 = shl i16 %83, %93
br label %95
95: ; preds = %82, %48, %39
%96 = phi i16 [ %44, %39 ], [ %44, %48 ], [ %94, %82 ]
%97 = phi i16 [ %43, %39 ], [ %43, %48 ], [ %89, %82 ]
%98 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 10
%99 = load i32, ptr %98, align 8, !tbaa !32
%100 = load i32, ptr @VB_SISVB, align 4, !tbaa !15
%101 = and i32 %100, %99
%102 = icmp eq i32 %101, 0
br i1 %102, label %171, label %103
103: ; preds = %95
%104 = load i32, ptr @VB_NoLCD, align 4, !tbaa !15
%105 = and i32 %104, %99
%106 = icmp eq i32 %105, 0
%107 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 11
%108 = load i32, ptr %107, align 4, !tbaa !33
%109 = load i32, ptr @SetCRT2ToLCD, align 4, !tbaa !15
br i1 %106, label %110, label %163
110: ; preds = %103
%111 = and i32 %109, %108
%112 = icmp eq i32 %111, 0
br i1 %112, label %200, label %113
113: ; preds = %110
%114 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 12
%115 = load i32, ptr %114, align 8, !tbaa !34
switch i32 %115, label %200 [
i32 130, label %116
i32 129, label %135
i32 128, label %154
]
116: ; preds = %113
%117 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 9
%118 = load i32, ptr %117, align 4, !tbaa !30
%119 = load i32, ptr @LCDVESATiming, align 4, !tbaa !15
%120 = and i32 %119, %118
%121 = icmp eq i32 %120, 0
br i1 %121, label %122, label %200
122: ; preds = %116
%123 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 13
%124 = load i32, ptr %123, align 4, !tbaa !35
%125 = load i32, ptr @DontExpandLCD, align 4, !tbaa !15
%126 = and i32 %125, %124
%127 = icmp eq i32 %126, 0
br i1 %127, label %128, label %200
128: ; preds = %122
%129 = icmp eq i16 %96, 350
%130 = select i1 %129, i16 357, i16 %96
%131 = icmp eq i16 %130, 400
%132 = select i1 %131, i16 420, i16 %130
%133 = icmp eq i16 %132, 480
%134 = select i1 %133, i16 525, i16 %132
br label %200
135: ; preds = %113
%136 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 13
%137 = load i32, ptr %136, align 4, !tbaa !35
%138 = load i32, ptr @DontExpandLCD, align 4, !tbaa !15
%139 = and i32 %138, %137
%140 = icmp eq i32 %139, 0
%141 = icmp eq i16 %96, 400
%142 = select i1 %140, i1 %141, i1 false
%143 = select i1 %142, i16 405, i16 %96
%144 = icmp eq i16 %143, 350
%145 = select i1 %144, i16 360, i16 %143
%146 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 9
%147 = load i32, ptr %146, align 4, !tbaa !30
%148 = load i32, ptr @LCDVESATiming, align 4, !tbaa !15
%149 = and i32 %148, %147
%150 = icmp eq i32 %149, 0
br i1 %150, label %200, label %151
151: ; preds = %135
%152 = icmp eq i16 %145, 360
%153 = select i1 %152, i16 375, i16 %145
br label %200
154: ; preds = %113
%155 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 9
%156 = load i32, ptr %155, align 4, !tbaa !30
%157 = load i32, ptr @LCDVESATiming, align 4, !tbaa !15
%158 = and i32 %157, %156
%159 = icmp eq i32 %158, 0
br i1 %159, label %160, label %200
160: ; preds = %154
%161 = icmp eq i16 %96, 1024
%162 = select i1 %161, i16 1056, i16 %96
br label %200
163: ; preds = %103
%164 = load i32, ptr @SetCRT2ToHiVision, align 4, !tbaa !15
%165 = or i32 %164, %109
%166 = and i32 %165, %108
%167 = icmp eq i32 %166, 0
br i1 %167, label %174, label %168
168: ; preds = %163
%169 = icmp eq i16 %97, 720
%170 = select i1 %169, i16 640, i16 %97
br label %174
171: ; preds = %95
%172 = icmp eq i16 %97, 720
%173 = select i1 %172, i16 640, i16 %97
br label %174
174: ; preds = %163, %168, %171
%175 = phi i16 [ %170, %168 ], [ %97, %163 ], [ %173, %171 ]
%176 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 9
%177 = load i32, ptr %176, align 4, !tbaa !30
%178 = load i32, ptr @SetDOSMode, align 4, !tbaa !15
%179 = and i32 %178, %177
%180 = icmp eq i32 %179, 0
br i1 %180, label %200, label %181
181: ; preds = %174
%182 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 7
%183 = load i64, ptr %182, align 8, !tbaa !27
%184 = load i64, ptr @SIS_315H, align 8, !tbaa !28
%185 = icmp slt i64 %183, %184
%186 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 16
%187 = load i32, ptr %186, align 8, !tbaa !36
%188 = select i1 %185, i32 19, i32 23
%189 = tail call i32 @SiS_GetReg(i32 noundef %187, i32 noundef %188) #2
%190 = load i64, ptr %45, align 8, !tbaa !25
%191 = icmp eq i64 %190, 0
br i1 %191, label %192, label %199
192: ; preds = %181
%193 = and i32 %189, 128
%194 = icmp eq i32 %193, 0
%195 = select i1 %194, i16 400, i16 480
%196 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 14
%197 = load i64, ptr %196, align 8, !tbaa !26
%198 = icmp eq i64 %197, 0
br i1 %198, label %200, label %199
199: ; preds = %192, %181
br label %200
200: ; preds = %174, %199, %192, %110, %154, %160, %135, %151, %116, %128, %122, %113
%201 = phi i16 [ 480, %199 ], [ %195, %192 ], [ %96, %174 ], [ %96, %113 ], [ %96, %154 ], [ %162, %160 ], [ %153, %151 ], [ %145, %135 ], [ %96, %116 ], [ %96, %122 ], [ %134, %128 ], [ %96, %110 ]
%202 = phi i16 [ %175, %199 ], [ %175, %192 ], [ %175, %174 ], [ %97, %113 ], [ %97, %154 ], [ %97, %160 ], [ %97, %151 ], [ %97, %135 ], [ %97, %116 ], [ %97, %122 ], [ %97, %128 ], [ %97, %110 ]
%203 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 3
store i16 %202, ptr %203, align 2, !tbaa !16
%204 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 2
store i16 %202, ptr %204, align 8, !tbaa !17
br label %205
205: ; preds = %200, %7
%206 = phi i16 [ %201, %200 ], [ %19, %7 ]
%207 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 5
store i16 %206, ptr %207, align 2, !tbaa !37
%208 = getelementptr inbounds %struct.SiS_Private, ptr %0, i64 0, i32 4
store i16 %206, ptr %208, align 4, !tbaa !38
ret void
}
declare zeroext i16 @SiS_GetResInfo(ptr noundef, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @SiS_GetReg(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 104}
!6 = !{!"SiS_Private", !7, i64 0, !10, i64 4, !7, i64 8, !7, i64 10, !7, i64 12, !7, i64 14, !7, i64 16, !11, i64 24, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !11, i64 56, !11, i64 64, !10, i64 72, !10, i64 76, !12, i64 80, !12, i64 88, !12, i64 96, !11, i64 104}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !10, i64 4}
!15 = !{!10, !10, i64 0}
!16 = !{!6, !7, i64 10}
!17 = !{!6, !7, i64 8}
!18 = !{!6, !7, i64 16}
!19 = !{!6, !12, i64 96}
!20 = !{!6, !12, i64 88}
!21 = !{!6, !12, i64 80}
!22 = !{!23, !7, i64 0}
!23 = !{!"TYPE_6__", !7, i64 0}
!24 = !{!7, !7, i64 0}
!25 = !{!6, !11, i64 64}
!26 = !{!6, !11, i64 56}
!27 = !{!6, !11, i64 24}
!28 = !{!11, !11, i64 0}
!29 = !{!6, !10, i64 32}
!30 = !{!6, !10, i64 36}
!31 = !{!6, !10, i64 76}
!32 = !{!6, !10, i64 40}
!33 = !{!6, !10, i64 44}
!34 = !{!6, !10, i64 48}
!35 = !{!6, !10, i64 52}
!36 = !{!6, !10, i64 72}
!37 = !{!6, !7, i64 14}
!38 = !{!6, !7, i64 12}
| ; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/sis/extr_init301.c_SiS_GetCRT2ResInfo.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/sis/extr_init301.c_SiS_GetCRT2ResInfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i16, i16 }
%struct.TYPE_5__ = type { i16, i16 }
%struct.TYPE_6__ = type { i16 }
@HalfDCLK = common local_unnamed_addr global i32 0, align 4
@SIS_315H = common local_unnamed_addr global i64 0, align 8
@SetDOSMode = common local_unnamed_addr global i32 0, align 4
@DoubleScanMode = common local_unnamed_addr global i16 0, align 2
@VB_SISVB = common local_unnamed_addr global i32 0, align 4
@VB_NoLCD = common local_unnamed_addr global i32 0, align 4
@SetCRT2ToLCD = common local_unnamed_addr global i32 0, align 4
@LCDVESATiming = common local_unnamed_addr global i32 0, align 4
@DontExpandLCD = common local_unnamed_addr global i32 0, align 4
@SetCRT2ToHiVision = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @SiS_GetCRT2ResInfo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @SiS_GetCRT2ResInfo(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 104
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %20, label %7
7: ; preds = %3
%8 = load i16, ptr %0, align 8, !tbaa !14
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !15
%11 = load i32, ptr @HalfDCLK, align 4, !tbaa !16
%12 = and i32 %11, %10
%13 = icmp ne i32 %12, 0
%14 = zext i1 %13 to i16
%15 = shl i16 %8, %14
%16 = getelementptr inbounds i8, ptr %0, i64 10
store i16 %15, ptr %16, align 2, !tbaa !17
%17 = getelementptr inbounds i8, ptr %0, i64 8
store i16 %15, ptr %17, align 8, !tbaa !18
%18 = getelementptr inbounds i8, ptr %0, i64 16
%19 = load i16, ptr %18, align 8, !tbaa !19
br label %203
20: ; preds = %3
%21 = tail call zeroext i16 @SiS_GetResInfo(ptr noundef nonnull %0, i16 noundef zeroext %1, i16 noundef zeroext %2) #2
%22 = icmp ult i16 %1, 20
%23 = zext i16 %21 to i64
br i1 %22, label %24, label %28
24: ; preds = %20
%25 = getelementptr inbounds i8, ptr %0, i64 96
%26 = load ptr, ptr %25, align 8, !tbaa !20
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %26, i64 %23
br label %37
28: ; preds = %20
%29 = getelementptr inbounds i8, ptr %0, i64 88
%30 = load ptr, ptr %29, align 8, !tbaa !21
%31 = getelementptr inbounds %struct.TYPE_5__, ptr %30, i64 %23
%32 = getelementptr inbounds i8, ptr %0, i64 80
%33 = load ptr, ptr %32, align 8, !tbaa !22
%34 = zext i16 %2 to i64
%35 = getelementptr inbounds %struct.TYPE_6__, ptr %33, i64 %34
%36 = load i16, ptr %35, align 2, !tbaa !23
br label %37
37: ; preds = %28, %24
%38 = phi ptr [ %27, %24 ], [ %31, %28 ]
%39 = phi i16 [ 0, %24 ], [ %36, %28 ]
%40 = load i16, ptr %38, align 2, !tbaa !25
%41 = getelementptr inbounds i8, ptr %38, i64 2
%42 = load i16, ptr %41, align 2, !tbaa !25
%43 = getelementptr inbounds i8, ptr %0, i64 64
%44 = load i64, ptr %43, align 8, !tbaa !26
%45 = icmp eq i64 %44, 0
br i1 %45, label %46, label %93
46: ; preds = %37
%47 = getelementptr inbounds i8, ptr %0, i64 56
%48 = load i64, ptr %47, align 8, !tbaa !27
%49 = icmp eq i64 %48, 0
br i1 %49, label %50, label %93
50: ; preds = %46
%51 = getelementptr inbounds i8, ptr %0, i64 24
%52 = load i64, ptr %51, align 8, !tbaa !28
%53 = load i64, ptr @SIS_315H, align 8, !tbaa !29
%54 = icmp slt i64 %52, %53
br i1 %54, label %80, label %55
55: ; preds = %50
%56 = getelementptr inbounds i8, ptr %0, i64 32
%57 = load i32, ptr %56, align 8, !tbaa !30
%58 = icmp eq i32 %57, 1
br i1 %58, label %59, label %80
59: ; preds = %55
%60 = icmp eq i16 %1, 3
br i1 %60, label %70, label %61
61: ; preds = %59
%62 = getelementptr inbounds i8, ptr %0, i64 36
%63 = load i32, ptr %62, align 4, !tbaa !31
%64 = load i32, ptr @SetDOSMode, align 4, !tbaa !16
%65 = and i32 %64, %63
%66 = icmp eq i32 %65, 0
br i1 %66, label %70, label %67
67: ; preds = %61
%68 = icmp eq i16 %42, 350
%69 = select i1 %68, i16 400, i16 %42
br label %70
70: ; preds = %67, %61, %59
%71 = phi i16 [ %69, %67 ], [ %42, %61 ], [ %42, %59 ]
%72 = getelementptr inbounds i8, ptr %0, i64 76
%73 = load i32, ptr %72, align 4, !tbaa !32
%74 = tail call i32 @SiS_GetReg(i32 noundef %73, i32 noundef 58) #2
%75 = and i32 %74, 1
%76 = icmp ne i32 %75, 0
%77 = icmp eq i16 %1, 18
%78 = and i1 %77, %76
%79 = select i1 %78, i16 400, i16 %71
br label %80
80: ; preds = %70, %55, %50
%81 = phi i16 [ %42, %55 ], [ %42, %50 ], [ %79, %70 ]
%82 = zext i16 %39 to i32
%83 = load i32, ptr @HalfDCLK, align 4, !tbaa !16
%84 = and i32 %83, %82
%85 = icmp ne i32 %84, 0
%86 = zext i1 %85 to i16
%87 = shl i16 %40, %86
%88 = load i16, ptr @DoubleScanMode, align 2, !tbaa !25
%89 = and i16 %88, %39
%90 = icmp ne i16 %89, 0
%91 = zext i1 %90 to i16
%92 = shl i16 %81, %91
br label %93
93: ; preds = %80, %46, %37
%94 = phi i16 [ %42, %37 ], [ %42, %46 ], [ %92, %80 ]
%95 = phi i16 [ %40, %37 ], [ %40, %46 ], [ %87, %80 ]
%96 = getelementptr inbounds i8, ptr %0, i64 40
%97 = load i32, ptr %96, align 8, !tbaa !33
%98 = load i32, ptr @VB_SISVB, align 4, !tbaa !16
%99 = and i32 %98, %97
%100 = icmp eq i32 %99, 0
br i1 %100, label %169, label %101
101: ; preds = %93
%102 = load i32, ptr @VB_NoLCD, align 4, !tbaa !16
%103 = and i32 %102, %97
%104 = icmp eq i32 %103, 0
%105 = getelementptr inbounds i8, ptr %0, i64 44
%106 = load i32, ptr %105, align 4, !tbaa !34
%107 = load i32, ptr @SetCRT2ToLCD, align 4, !tbaa !16
br i1 %104, label %108, label %161
108: ; preds = %101
%109 = and i32 %107, %106
%110 = icmp eq i32 %109, 0
br i1 %110, label %198, label %111
111: ; preds = %108
%112 = getelementptr inbounds i8, ptr %0, i64 48
%113 = load i32, ptr %112, align 8, !tbaa !35
switch i32 %113, label %198 [
i32 130, label %114
i32 129, label %133
i32 128, label %152
]
114: ; preds = %111
%115 = getelementptr inbounds i8, ptr %0, i64 36
%116 = load i32, ptr %115, align 4, !tbaa !31
%117 = load i32, ptr @LCDVESATiming, align 4, !tbaa !16
%118 = and i32 %117, %116
%119 = icmp eq i32 %118, 0
br i1 %119, label %120, label %198
120: ; preds = %114
%121 = getelementptr inbounds i8, ptr %0, i64 52
%122 = load i32, ptr %121, align 4, !tbaa !36
%123 = load i32, ptr @DontExpandLCD, align 4, !tbaa !16
%124 = and i32 %123, %122
%125 = icmp eq i32 %124, 0
br i1 %125, label %126, label %198
126: ; preds = %120
%127 = icmp eq i16 %94, 350
%128 = select i1 %127, i16 357, i16 %94
%129 = icmp eq i16 %128, 400
%130 = select i1 %129, i16 420, i16 %128
%131 = icmp eq i16 %130, 480
%132 = select i1 %131, i16 525, i16 %130
br label %198
133: ; preds = %111
%134 = getelementptr inbounds i8, ptr %0, i64 52
%135 = load i32, ptr %134, align 4, !tbaa !36
%136 = load i32, ptr @DontExpandLCD, align 4, !tbaa !16
%137 = and i32 %136, %135
%138 = icmp eq i32 %137, 0
%139 = icmp eq i16 %94, 400
%140 = select i1 %138, i1 %139, i1 false
%141 = select i1 %140, i16 405, i16 %94
%142 = icmp eq i16 %141, 350
%143 = select i1 %142, i16 360, i16 %141
%144 = getelementptr inbounds i8, ptr %0, i64 36
%145 = load i32, ptr %144, align 4, !tbaa !31
%146 = load i32, ptr @LCDVESATiming, align 4, !tbaa !16
%147 = and i32 %146, %145
%148 = icmp eq i32 %147, 0
br i1 %148, label %198, label %149
149: ; preds = %133
%150 = icmp eq i16 %143, 360
%151 = select i1 %150, i16 375, i16 %143
br label %198
152: ; preds = %111
%153 = getelementptr inbounds i8, ptr %0, i64 36
%154 = load i32, ptr %153, align 4, !tbaa !31
%155 = load i32, ptr @LCDVESATiming, align 4, !tbaa !16
%156 = and i32 %155, %154
%157 = icmp eq i32 %156, 0
br i1 %157, label %158, label %198
158: ; preds = %152
%159 = icmp eq i16 %94, 1024
%160 = select i1 %159, i16 1056, i16 %94
br label %198
161: ; preds = %101
%162 = load i32, ptr @SetCRT2ToHiVision, align 4, !tbaa !16
%163 = or i32 %162, %107
%164 = and i32 %163, %106
%165 = icmp eq i32 %164, 0
br i1 %165, label %172, label %166
166: ; preds = %161
%167 = icmp eq i16 %95, 720
%168 = select i1 %167, i16 640, i16 %95
br label %172
169: ; preds = %93
%170 = icmp eq i16 %95, 720
%171 = select i1 %170, i16 640, i16 %95
br label %172
172: ; preds = %161, %166, %169
%173 = phi i16 [ %168, %166 ], [ %95, %161 ], [ %171, %169 ]
%174 = getelementptr inbounds i8, ptr %0, i64 36
%175 = load i32, ptr %174, align 4, !tbaa !31
%176 = load i32, ptr @SetDOSMode, align 4, !tbaa !16
%177 = and i32 %176, %175
%178 = icmp eq i32 %177, 0
br i1 %178, label %198, label %179
179: ; preds = %172
%180 = getelementptr inbounds i8, ptr %0, i64 24
%181 = load i64, ptr %180, align 8, !tbaa !28
%182 = load i64, ptr @SIS_315H, align 8, !tbaa !29
%183 = icmp slt i64 %181, %182
%184 = getelementptr inbounds i8, ptr %0, i64 72
%185 = load i32, ptr %184, align 8, !tbaa !37
%186 = select i1 %183, i32 19, i32 23
%187 = tail call i32 @SiS_GetReg(i32 noundef %185, i32 noundef %186) #2
%188 = load i64, ptr %43, align 8, !tbaa !26
%189 = icmp eq i64 %188, 0
br i1 %189, label %190, label %197
190: ; preds = %179
%191 = and i32 %187, 128
%192 = icmp eq i32 %191, 0
%193 = select i1 %192, i16 400, i16 480
%194 = getelementptr inbounds i8, ptr %0, i64 56
%195 = load i64, ptr %194, align 8, !tbaa !27
%196 = icmp eq i64 %195, 0
br i1 %196, label %198, label %197
197: ; preds = %190, %179
br label %198
198: ; preds = %172, %197, %190, %108, %152, %158, %133, %149, %114, %126, %120, %111
%199 = phi i16 [ 480, %197 ], [ %193, %190 ], [ %94, %172 ], [ %94, %111 ], [ %94, %152 ], [ %160, %158 ], [ %151, %149 ], [ %143, %133 ], [ %94, %114 ], [ %94, %120 ], [ %132, %126 ], [ %94, %108 ]
%200 = phi i16 [ %173, %197 ], [ %173, %190 ], [ %173, %172 ], [ %95, %111 ], [ %95, %152 ], [ %95, %158 ], [ %95, %149 ], [ %95, %133 ], [ %95, %114 ], [ %95, %120 ], [ %95, %126 ], [ %95, %108 ]
%201 = getelementptr inbounds i8, ptr %0, i64 10
store i16 %200, ptr %201, align 2, !tbaa !17
%202 = getelementptr inbounds i8, ptr %0, i64 8
store i16 %200, ptr %202, align 8, !tbaa !18
br label %203
203: ; preds = %198, %7
%204 = phi i16 [ %199, %198 ], [ %19, %7 ]
%205 = getelementptr inbounds i8, ptr %0, i64 14
store i16 %204, ptr %205, align 2, !tbaa !38
%206 = getelementptr inbounds i8, ptr %0, i64 12
store i16 %204, ptr %206, align 4, !tbaa !39
ret void
}
declare zeroext i16 @SiS_GetResInfo(ptr noundef, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1
declare i32 @SiS_GetReg(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 104}
!7 = !{!"SiS_Private", !8, i64 0, !11, i64 4, !8, i64 8, !8, i64 10, !8, i64 12, !8, i64 14, !8, i64 16, !12, i64 24, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !12, i64 56, !12, i64 64, !11, i64 72, !11, i64 76, !13, i64 80, !13, i64 88, !13, i64 96, !12, i64 104}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!7, !11, i64 4}
!16 = !{!11, !11, i64 0}
!17 = !{!7, !8, i64 10}
!18 = !{!7, !8, i64 8}
!19 = !{!7, !8, i64 16}
!20 = !{!7, !13, i64 96}
!21 = !{!7, !13, i64 88}
!22 = !{!7, !13, i64 80}
!23 = !{!24, !8, i64 0}
!24 = !{!"TYPE_6__", !8, i64 0}
!25 = !{!8, !8, i64 0}
!26 = !{!7, !12, i64 64}
!27 = !{!7, !12, i64 56}
!28 = !{!7, !12, i64 24}
!29 = !{!12, !12, i64 0}
!30 = !{!7, !11, i64 32}
!31 = !{!7, !11, i64 36}
!32 = !{!7, !11, i64 76}
!33 = !{!7, !11, i64 40}
!34 = !{!7, !11, i64 44}
!35 = !{!7, !11, i64 48}
!36 = !{!7, !11, i64 52}
!37 = !{!7, !11, i64 72}
!38 = !{!7, !8, i64 14}
!39 = !{!7, !8, i64 12}
| linux_drivers_video_fbdev_sis_extr_init301.c_SiS_GetCRT2ResInfo |
; ModuleID = 'AnghaBench/linux/drivers/pnp/extr_support.c_pnp_is_active.c'
source_filename = "AnghaBench/linux/drivers/pnp/extr_support.c_pnp_is_active.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @pnp_is_active(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @pnp_port_start(ptr noundef %0, i32 noundef 0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %19
4: ; preds = %1
%5 = tail call i32 @pnp_port_len(ptr noundef %0, i32 noundef 0) #2
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = tail call i32 @pnp_mem_start(ptr noundef %0, i32 noundef 0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = tail call i32 @pnp_mem_len(ptr noundef %0, i32 noundef 0) #2
%12 = icmp slt i32 %11, 2
br i1 %12, label %13, label %19
13: ; preds = %10
%14 = tail call i32 @pnp_irq(ptr noundef %0, i32 noundef 0) #2
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = tail call i32 @pnp_dma(ptr noundef %0, i32 noundef 0) #2
%18 = icmp eq i32 %17, -1
br i1 %18, label %20, label %19
19: ; preds = %16, %13, %10, %7, %4, %1
br label %20
20: ; preds = %16, %19
%21 = phi i32 [ 1, %19 ], [ 0, %16 ]
ret i32 %21
}
declare i32 @pnp_port_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_port_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_mem_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_mem_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_dma(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/pnp/extr_support.c_pnp_is_active.c'
source_filename = "AnghaBench/linux/drivers/pnp/extr_support.c_pnp_is_active.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @pnp_is_active(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @pnp_port_start(ptr noundef %0, i32 noundef 0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %19
4: ; preds = %1
%5 = tail call i32 @pnp_port_len(ptr noundef %0, i32 noundef 0) #2
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %19
7: ; preds = %4
%8 = tail call i32 @pnp_mem_start(ptr noundef %0, i32 noundef 0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = tail call i32 @pnp_mem_len(ptr noundef %0, i32 noundef 0) #2
%12 = icmp slt i32 %11, 2
br i1 %12, label %13, label %19
13: ; preds = %10
%14 = tail call i32 @pnp_irq(ptr noundef %0, i32 noundef 0) #2
%15 = icmp eq i32 %14, -1
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = tail call i32 @pnp_dma(ptr noundef %0, i32 noundef 0) #2
%18 = icmp eq i32 %17, -1
br i1 %18, label %20, label %19
19: ; preds = %16, %13, %10, %7, %4, %1
br label %20
20: ; preds = %16, %19
%21 = phi i32 [ 1, %19 ], [ 0, %16 ]
ret i32 %21
}
declare i32 @pnp_port_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_port_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_mem_start(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_mem_len(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pnp_dma(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_pnp_extr_support.c_pnp_is_active |
; ModuleID = 'AnghaBench/linux/drivers/infiniband/core/extr_iwpm_util.c_iwpm_add_remote_info.c'
source_filename = "AnghaBench/linux/drivers/infiniband/core/extr_iwpm_util.c_iwpm_add_remote_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iwpm_remote_info = type { i32, i32, i32 }
@iwpm_reminfo_lock = dso_local global i32 0, align 4
@iwpm_reminfo_bucket = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @iwpm_add_remote_info(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull @iwpm_reminfo_lock, i64 noundef undef) #2
%3 = load i64, ptr @iwpm_reminfo_bucket, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.iwpm_remote_info, ptr %0, i64 0, i32 2
%7 = getelementptr inbounds %struct.iwpm_remote_info, ptr %0, i64 0, i32 1
%8 = tail call ptr @get_reminfo_hash_bucket(ptr noundef nonnull %6, ptr noundef nonnull %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %12, label %10
10: ; preds = %5
%11 = tail call i32 @hlist_add_head(ptr noundef %0, ptr noundef nonnull %8) #2
br label %12
12: ; preds = %5, %10, %1
%13 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull @iwpm_reminfo_lock, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @get_reminfo_hash_bucket(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hlist_add_head(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/core/extr_iwpm_util.c_iwpm_add_remote_info.c'
source_filename = "AnghaBench/linux/drivers/infiniband/core/extr_iwpm_util.c_iwpm_add_remote_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@iwpm_reminfo_lock = common global i32 0, align 4
@iwpm_reminfo_bucket = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @iwpm_add_remote_info(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull @iwpm_reminfo_lock, i64 noundef undef) #2
%3 = load i64, ptr @iwpm_reminfo_bucket, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = tail call ptr @get_reminfo_hash_bucket(ptr noundef nonnull %6, ptr noundef nonnull %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %12, label %10
10: ; preds = %5
%11 = tail call i32 @hlist_add_head(ptr noundef %0, ptr noundef nonnull %8) #2
br label %12
12: ; preds = %5, %10, %1
%13 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull @iwpm_reminfo_lock, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @get_reminfo_hash_bucket(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hlist_add_head(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_infiniband_core_extr_iwpm_util.c_iwpm_add_remote_info |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/serial/extr_mpsc.c_mpsc_break_ctl.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/serial/extr_mpsc.c_mpsc_break_ctl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mpsc_port_info = type { i32, %struct.TYPE_2__, i64, i64 }
%struct.TYPE_2__ = type { i32 }
@MPSC_CHR_1 = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @mpsc_break_ctl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mpsc_break_ctl(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i32 0, i32 16711680
%5 = getelementptr inbounds %struct.mpsc_port_info, ptr %0, i64 0, i32 1
%6 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i32 noundef undef) #2
%7 = getelementptr inbounds %struct.mpsc_port_info, ptr %0, i64 0, i32 3
%8 = load i64, ptr %7, align 8, !tbaa !5
%9 = icmp eq i64 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 %4, ptr %0, align 8, !tbaa !12
br label %11
11: ; preds = %10, %2
%12 = getelementptr inbounds %struct.mpsc_port_info, ptr %0, i64 0, i32 2
%13 = load i64, ptr %12, align 8, !tbaa !13
%14 = load i64, ptr @MPSC_CHR_1, align 8, !tbaa !14
%15 = add nsw i64 %14, %13
%16 = tail call i32 @writel(i32 noundef %4, i64 noundef %15) #2
%17 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i32 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"mpsc_port_info", !7, i64 0, !10, i64 4, !11, i64 8, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !11, i64 8}
!14 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/serial/extr_mpsc.c_mpsc_break_ctl.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/serial/extr_mpsc.c_mpsc_break_ctl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MPSC_CHR_1 = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @mpsc_break_ctl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mpsc_break_ctl(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i32 0, i32 16711680
%5 = getelementptr inbounds i8, ptr %0, i64 4
%6 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i32 noundef undef) #2
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load i64, ptr %7, align 8, !tbaa !6
%9 = icmp eq i64 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 %4, ptr %0, align 8, !tbaa !13
br label %11
11: ; preds = %10, %2
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i64, ptr %12, align 8, !tbaa !14
%14 = load i64, ptr @MPSC_CHR_1, align 8, !tbaa !15
%15 = add nsw i64 %14, %13
%16 = tail call i32 @writel(i32 noundef %4, i64 noundef %15) #2
%17 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i32 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"mpsc_port_info", !8, i64 0, !11, i64 4, !12, i64 8, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !12, i64 8}
!15 = !{!12, !12, i64 0}
| fastsocket_kernel_drivers_serial_extr_mpsc.c_mpsc_break_ctl |
; ModuleID = 'AnghaBench/esp-idf/components/wpa_supplicant/src/wps/extr_wps_registrar.c_wps_build_wps_state.c'
source_filename = "AnghaBench/esp-idf/components/wpa_supplicant/src/wps/extr_wps_registrar.c_wps_build_wps_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MSG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [41 x i8] c"WPS: * Wi-Fi Protected Setup State (%d)\00", align 1
@ATTR_WPS_STATE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wps_build_wps_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wps_build_wps_state(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr @MSG_DEBUG, align 4, !tbaa !5
%4 = load i32, ptr %0, align 4, !tbaa !9
%5 = tail call i32 @wpa_printf(i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4) #2
%6 = load i32, ptr @ATTR_WPS_STATE, align 4, !tbaa !5
%7 = tail call i32 @wpabuf_put_be16(ptr noundef %1, i32 noundef %6) #2
%8 = tail call i32 @wpabuf_put_be16(ptr noundef %1, i32 noundef 1) #2
%9 = load i32, ptr %0, align 4, !tbaa !9
%10 = tail call i32 @wpabuf_put_u8(ptr noundef %1, i32 noundef %9) #2
ret i32 0
}
declare i32 @wpa_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_put_be16(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_put_u8(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"wps_context", !6, i64 0}
| ; ModuleID = 'AnghaBench/esp-idf/components/wpa_supplicant/src/wps/extr_wps_registrar.c_wps_build_wps_state.c'
source_filename = "AnghaBench/esp-idf/components/wpa_supplicant/src/wps/extr_wps_registrar.c_wps_build_wps_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MSG_DEBUG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [41 x i8] c"WPS: * Wi-Fi Protected Setup State (%d)\00", align 1
@ATTR_WPS_STATE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wps_build_wps_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @wps_build_wps_state(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr @MSG_DEBUG, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call i32 @wpa_printf(i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %4) #2
%6 = load i32, ptr @ATTR_WPS_STATE, align 4, !tbaa !6
%7 = tail call i32 @wpabuf_put_be16(ptr noundef %1, i32 noundef %6) #2
%8 = tail call i32 @wpabuf_put_be16(ptr noundef %1, i32 noundef 1) #2
%9 = load i32, ptr %0, align 4, !tbaa !10
%10 = tail call i32 @wpabuf_put_u8(ptr noundef %1, i32 noundef %9) #2
ret i32 0
}
declare i32 @wpa_printf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_put_be16(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpabuf_put_u8(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"wps_context", !7, i64 0}
| esp-idf_components_wpa_supplicant_src_wps_extr_wps_registrar.c_wps_build_wps_state |
; ModuleID = 'AnghaBench/linux/drivers/iio/magnetometer/extr_bmc150_magn.c_bmc150_magn_match_acpi_device.c'
source_filename = "AnghaBench/linux/drivers/iio/magnetometer/extr_bmc150_magn.c_bmc150_magn_match_acpi_device.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @bmc150_magn_match_acpi_device], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @bmc150_magn_match_acpi_device(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = tail call ptr @acpi_match_device(i32 noundef %3, ptr noundef nonnull %0) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call ptr @dev_name(ptr noundef nonnull %0) #2
br label %8
8: ; preds = %1, %6
%9 = phi ptr [ %7, %6 ], [ null, %1 ]
ret ptr %9
}
declare ptr @acpi_match_device(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/iio/magnetometer/extr_bmc150_magn.c_bmc150_magn_match_acpi_device.c'
source_filename = "AnghaBench/linux/drivers/iio/magnetometer/extr_bmc150_magn.c_bmc150_magn_match_acpi_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @bmc150_magn_match_acpi_device], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @bmc150_magn_match_acpi_device(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !11
%4 = tail call ptr @acpi_match_device(i32 noundef %3, ptr noundef nonnull %0) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call ptr @dev_name(ptr noundef nonnull %0) #2
br label %8
8: ; preds = %1, %6
%9 = phi ptr [ %7, %6 ], [ null, %1 ]
ret ptr %9
}
declare ptr @acpi_match_device(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| linux_drivers_iio_magnetometer_extr_bmc150_magn.c_bmc150_magn_match_acpi_device |
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm8958-dsp2.c_wm8958_hpf_put.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm8958-dsp2.c_wm8958_hpf_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wm8994_priv = type { ptr, ptr, ptr, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"DSP2 active on %d already\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wm8958_hpf_put], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @wm8958_hpf_put(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call ptr @snd_soc_kcontrol_component(ptr noundef nonnull %0) #2
%5 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %4) #2
%6 = icmp slt i32 %3, 3
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load ptr, ptr %5, align 8, !tbaa !10
%9 = srem i32 %3, 3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %8, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = load ptr, ptr %1, align 8, !tbaa !14
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = icmp eq i32 %12, %14
br i1 %15, label %66, label %26
16: ; preds = %2
%17 = getelementptr inbounds %struct.wm8994_priv, ptr %5, i64 0, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !18
%19 = urem i32 %3, 3
%20 = zext nneg i32 %19 to i64
%21 = getelementptr inbounds i32, ptr %18, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !13
%23 = load ptr, ptr %1, align 8, !tbaa !14
%24 = load i32, ptr %23, align 4, !tbaa !13
%25 = icmp eq i32 %22, %24
br i1 %25, label %66, label %26
26: ; preds = %16, %7
%27 = phi i32 [ %24, %16 ], [ %14, %7 ]
%28 = icmp sgt i32 %27, 1
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, ptr @EINVAL, align 4, !tbaa !13
%31 = sub nsw i32 0, %30
br label %66
32: ; preds = %26
%33 = getelementptr inbounds %struct.wm8994_priv, ptr %5, i64 0, i32 3
%34 = load i32, ptr %33, align 8, !tbaa !19
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %39
36: ; preds = %32
%37 = load i32, ptr @ENODEV, align 4, !tbaa !13
%38 = sub nsw i32 0, %37
br label %66
39: ; preds = %32
%40 = srem i32 %3, 3
%41 = tail call i64 @wm8958_dsp2_busy(ptr noundef nonnull %5, i32 noundef %40) #2
%42 = icmp eq i64 %41, 0
br i1 %42, label %48, label %43
43: ; preds = %39
%44 = load i32, ptr %4, align 4, !tbaa !20
%45 = tail call i32 @dev_dbg(i32 noundef %44, ptr noundef nonnull @.str, i32 noundef %3) #2
%46 = load i32, ptr @EBUSY, align 4, !tbaa !13
%47 = sub nsw i32 0, %46
br label %66
48: ; preds = %39
%49 = getelementptr inbounds %struct.wm8994_priv, ptr %5, i64 0, i32 2
%50 = load ptr, ptr %49, align 8, !tbaa !22
%51 = sext i32 %40 to i64
%52 = getelementptr inbounds i64, ptr %50, i64 %51
%53 = load i64, ptr %52, align 8, !tbaa !23
%54 = icmp eq i64 %53, 0
br i1 %54, label %58, label %55
55: ; preds = %48
%56 = load i32, ptr @EBUSY, align 4, !tbaa !13
%57 = sub nsw i32 0, %56
br label %66
58: ; preds = %48
%59 = load ptr, ptr %1, align 8, !tbaa !14
%60 = load i32, ptr %59, align 4, !tbaa !13
%61 = getelementptr inbounds %struct.wm8994_priv, ptr %5, i64 0, i32 1
%62 = select i1 %6, ptr %5, ptr %61
%63 = load ptr, ptr %62, align 8, !tbaa !25
%64 = getelementptr inbounds i32, ptr %63, i64 %51
store i32 %60, ptr %64, align 4, !tbaa !13
%65 = tail call i32 @wm8958_dsp_apply(ptr noundef %4, i32 noundef %40, i32 noundef %60) #2
br label %66
66: ; preds = %16, %7, %58, %55, %43, %36, %29
%67 = phi i32 [ %31, %29 ], [ %47, %43 ], [ %57, %55 ], [ 0, %58 ], [ %38, %36 ], [ 0, %7 ], [ 0, %16 ]
ret i32 %67
}
declare ptr @snd_soc_kcontrol_component(ptr noundef) local_unnamed_addr #1
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i64 @wm8958_dsp2_busy(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wm8958_dsp_apply(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_kcontrol", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"wm8994_priv", !12, i64 0, !12, i64 8, !12, i64 16, !7, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"snd_ctl_elem_value", !16, i64 0}
!16 = !{!"TYPE_4__", !17, i64 0}
!17 = !{!"TYPE_3__", !12, i64 0}
!18 = !{!11, !12, i64 8}
!19 = !{!11, !7, i64 24}
!20 = !{!21, !7, i64 0}
!21 = !{!"snd_soc_component", !7, i64 0}
!22 = !{!11, !12, i64 16}
!23 = !{!24, !24, i64 0}
!24 = !{!"long", !8, i64 0}
!25 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm8958-dsp2.c_wm8958_hpf_put.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm8958-dsp2.c_wm8958_hpf_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@ENODEV = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"DSP2 active on %d already\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wm8958_hpf_put], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @wm8958_hpf_put(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call ptr @snd_soc_kcontrol_component(ptr noundef nonnull %0) #2
%5 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %4) #2
%6 = icmp slt i32 %3, 3
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load ptr, ptr %5, align 8, !tbaa !11
%9 = srem i32 %3, 3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %8, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = load ptr, ptr %1, align 8, !tbaa !15
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = icmp eq i32 %12, %14
br i1 %15, label %66, label %26
16: ; preds = %2
%17 = getelementptr inbounds i8, ptr %5, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !19
%19 = urem i32 %3, 3
%20 = zext nneg i32 %19 to i64
%21 = getelementptr inbounds i32, ptr %18, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !14
%23 = load ptr, ptr %1, align 8, !tbaa !15
%24 = load i32, ptr %23, align 4, !tbaa !14
%25 = icmp eq i32 %22, %24
br i1 %25, label %66, label %26
26: ; preds = %16, %7
%27 = phi i32 [ %24, %16 ], [ %14, %7 ]
%28 = icmp sgt i32 %27, 1
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, ptr @EINVAL, align 4, !tbaa !14
%31 = sub nsw i32 0, %30
br label %66
32: ; preds = %26
%33 = getelementptr inbounds i8, ptr %5, i64 24
%34 = load i32, ptr %33, align 8, !tbaa !20
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %39
36: ; preds = %32
%37 = load i32, ptr @ENODEV, align 4, !tbaa !14
%38 = sub nsw i32 0, %37
br label %66
39: ; preds = %32
%40 = srem i32 %3, 3
%41 = tail call i64 @wm8958_dsp2_busy(ptr noundef nonnull %5, i32 noundef %40) #2
%42 = icmp eq i64 %41, 0
br i1 %42, label %48, label %43
43: ; preds = %39
%44 = load i32, ptr %4, align 4, !tbaa !21
%45 = tail call i32 @dev_dbg(i32 noundef %44, ptr noundef nonnull @.str, i32 noundef %3) #2
%46 = load i32, ptr @EBUSY, align 4, !tbaa !14
%47 = sub nsw i32 0, %46
br label %66
48: ; preds = %39
%49 = getelementptr inbounds i8, ptr %5, i64 16
%50 = load ptr, ptr %49, align 8, !tbaa !23
%51 = sext i32 %40 to i64
%52 = getelementptr inbounds i64, ptr %50, i64 %51
%53 = load i64, ptr %52, align 8, !tbaa !24
%54 = icmp eq i64 %53, 0
br i1 %54, label %58, label %55
55: ; preds = %48
%56 = load i32, ptr @EBUSY, align 4, !tbaa !14
%57 = sub nsw i32 0, %56
br label %66
58: ; preds = %48
%59 = load ptr, ptr %1, align 8, !tbaa !15
%60 = load i32, ptr %59, align 4, !tbaa !14
%61 = select i1 %6, i64 0, i64 8
%62 = getelementptr inbounds i8, ptr %5, i64 %61
%63 = load ptr, ptr %62, align 8, !tbaa !26
%64 = getelementptr inbounds i32, ptr %63, i64 %51
store i32 %60, ptr %64, align 4, !tbaa !14
%65 = tail call i32 @wm8958_dsp_apply(ptr noundef %4, i32 noundef %40, i32 noundef %60) #2
br label %66
66: ; preds = %16, %7, %58, %55, %43, %36, %29
%67 = phi i32 [ %31, %29 ], [ %47, %43 ], [ %57, %55 ], [ 0, %58 ], [ %38, %36 ], [ 0, %7 ], [ 0, %16 ]
ret i32 %67
}
declare ptr @snd_soc_kcontrol_component(ptr noundef) local_unnamed_addr #1
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i64 @wm8958_dsp2_busy(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wm8958_dsp_apply(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_kcontrol", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"wm8994_priv", !13, i64 0, !13, i64 8, !13, i64 16, !8, i64 24}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"snd_ctl_elem_value", !17, i64 0}
!17 = !{!"TYPE_4__", !18, i64 0}
!18 = !{!"TYPE_3__", !13, i64 0}
!19 = !{!12, !13, i64 8}
!20 = !{!12, !8, i64 24}
!21 = !{!22, !8, i64 0}
!22 = !{!"snd_soc_component", !8, i64 0}
!23 = !{!12, !13, i64 16}
!24 = !{!25, !25, i64 0}
!25 = !{!"long", !9, i64 0}
!26 = !{!13, !13, i64 0}
| linux_sound_soc_codecs_extr_wm8958-dsp2.c_wm8958_hpf_put |
; ModuleID = 'AnghaBench/beanstalkd/ct/extr_ct.c_report.c'
source_filename = "AnghaBench/beanstalkd/ct/extr_ct.c_report.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i32, i32, i32, i64 }
@.str = private unnamed_addr constant [6 x i8] c"\0A%s: \00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"failure\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c"error\00", align 1
@.str.3 = private unnamed_addr constant [18 x i8] c" (exit status %d)\00", align 1
@.str.4 = private unnamed_addr constant [13 x i8] c" (signal %d)\00", align 1
@SEEK_SET = dso_local local_unnamed_addr global i32 0, align 4
@stdout = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [26 x i8] c"\0A%d failures; %d errors.\0A\00", align 1
@str = private unnamed_addr constant [6 x i8] c"\0APASS\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @report], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @report(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @putchar(i8 noundef signext 10) #4
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 4
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %61, label %6
6: ; preds = %1, %54
%7 = phi i32 [ %56, %54 ], [ 0, %1 ]
%8 = phi i32 [ %55, %54 ], [ 0, %1 ]
%9 = phi ptr [ %57, %54 ], [ %0, %1 ]
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 3
%11 = load i32, ptr %10, align 8, !tbaa !12
%12 = tail call i32 @rmtree(i32 noundef %11) #4
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 2
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = icmp eq i32 %14, 0
br i1 %15, label %54, label %16
16: ; preds = %6
%17 = load ptr, ptr %9, align 8, !tbaa !14
%18 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef %17)
%19 = load i32, ptr %13, align 4, !tbaa !13
%20 = tail call i64 @failed(i32 noundef %19) #4
%21 = icmp eq i64 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %16
%23 = add nsw i32 %8, 1
%24 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
br label %43
25: ; preds = %16
%26 = add nsw i32 %7, 1
%27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2)
%28 = load i32, ptr %13, align 4, !tbaa !13
%29 = tail call i64 @WIFEXITED(i32 noundef %28) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %35, label %31
31: ; preds = %25
%32 = load i32, ptr %13, align 4, !tbaa !13
%33 = tail call i32 @WEXITSTATUS(i32 noundef %32) #4
%34 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %33)
br label %35
35: ; preds = %31, %25
%36 = load i32, ptr %13, align 4, !tbaa !13
%37 = tail call i64 @WIFSIGNALED(i32 noundef %36) #4
%38 = icmp eq i64 %37, 0
br i1 %38, label %43, label %39
39: ; preds = %35
%40 = load i32, ptr %13, align 4, !tbaa !13
%41 = tail call i32 @WTERMSIG(i32 noundef %40) #4
%42 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %41)
br label %43
43: ; preds = %35, %39, %22
%44 = phi i32 [ %23, %22 ], [ %8, %39 ], [ %8, %35 ]
%45 = phi i32 [ %7, %22 ], [ %26, %39 ], [ %26, %35 ]
%46 = tail call i32 @putchar(i8 noundef signext 10) #4
%47 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 1
%48 = load i32, ptr %47, align 8, !tbaa !15
%49 = load i32, ptr @SEEK_SET, align 4, !tbaa !16
%50 = tail call i32 @lseek(i32 noundef %48, i32 noundef 0, i32 noundef %49) #4
%51 = load i32, ptr @stdout, align 4, !tbaa !16
%52 = load i32, ptr %47, align 8, !tbaa !15
%53 = tail call i32 @copyfd(i32 noundef %51, i32 noundef %52) #4
br label %54
54: ; preds = %6, %43
%55 = phi i32 [ %44, %43 ], [ %8, %6 ]
%56 = phi i32 [ %45, %43 ], [ %7, %6 ]
%57 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 1
%58 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 1, i32 4
%59 = load i64, ptr %58, align 8, !tbaa !5
%60 = icmp eq i64 %59, 0
br i1 %60, label %61, label %6, !llvm.loop !17
61: ; preds = %54, %1
%62 = phi i32 [ 0, %1 ], [ %55, %54 ]
%63 = phi i32 [ 0, %1 ], [ %56, %54 ]
%64 = icmp ne i32 %62, 0
%65 = icmp ne i32 %63, 0
%66 = select i1 %64, i1 true, i1 %65
br i1 %66, label %67, label %69
67: ; preds = %61
%68 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %62, i32 noundef %63)
br label %71
69: ; preds = %61
%70 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str)
br label %71
71: ; preds = %69, %67
%72 = zext i1 %66 to i32
ret i32 %72
}
declare i32 @putchar(i8 noundef signext) local_unnamed_addr #1
declare i32 @rmtree(i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i64 @failed(i32 noundef) local_unnamed_addr #1
declare i64 @WIFEXITED(i32 noundef) local_unnamed_addr #1
declare i32 @WEXITSTATUS(i32 noundef) local_unnamed_addr #1
declare i64 @WIFSIGNALED(i32 noundef) local_unnamed_addr #1
declare i32 @WTERMSIG(i32 noundef) local_unnamed_addr #1
declare i32 @lseek(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @copyfd(i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 24}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !11, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !10, i64 16}
!13 = !{!6, !10, i64 12}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !10, i64 8}
!16 = !{!10, !10, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/beanstalkd/ct/extr_ct.c_report.c'
source_filename = "AnghaBench/beanstalkd/ct/extr_ct.c_report.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c"\0A%s: \00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"failure\00", align 1
@.str.2 = private unnamed_addr constant [6 x i8] c"error\00", align 1
@.str.3 = private unnamed_addr constant [18 x i8] c" (exit status %d)\00", align 1
@.str.4 = private unnamed_addr constant [13 x i8] c" (signal %d)\00", align 1
@SEEK_SET = common local_unnamed_addr global i32 0, align 4
@stdout = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [26 x i8] c"\0A%d failures; %d errors.\0A\00", align 1
@str = private unnamed_addr constant [6 x i8] c"\0APASS\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @report], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @report(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @putchar(i8 noundef signext 10) #4
%3 = getelementptr inbounds i8, ptr %0, i64 24
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %61, label %6
6: ; preds = %1, %54
%7 = phi i32 [ %56, %54 ], [ 0, %1 ]
%8 = phi i32 [ %55, %54 ], [ 0, %1 ]
%9 = phi ptr [ %57, %54 ], [ %0, %1 ]
%10 = getelementptr inbounds i8, ptr %9, i64 16
%11 = load i32, ptr %10, align 8, !tbaa !13
%12 = tail call i32 @rmtree(i32 noundef %11) #4
%13 = getelementptr inbounds i8, ptr %9, i64 12
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = icmp eq i32 %14, 0
br i1 %15, label %54, label %16
16: ; preds = %6
%17 = load ptr, ptr %9, align 8, !tbaa !15
%18 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef %17)
%19 = load i32, ptr %13, align 4, !tbaa !14
%20 = tail call i64 @failed(i32 noundef %19) #4
%21 = icmp eq i64 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %16
%23 = add nsw i32 %8, 1
%24 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
br label %43
25: ; preds = %16
%26 = add nsw i32 %7, 1
%27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2)
%28 = load i32, ptr %13, align 4, !tbaa !14
%29 = tail call i64 @WIFEXITED(i32 noundef %28) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %35, label %31
31: ; preds = %25
%32 = load i32, ptr %13, align 4, !tbaa !14
%33 = tail call i32 @WEXITSTATUS(i32 noundef %32) #4
%34 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %33)
br label %35
35: ; preds = %31, %25
%36 = load i32, ptr %13, align 4, !tbaa !14
%37 = tail call i64 @WIFSIGNALED(i32 noundef %36) #4
%38 = icmp eq i64 %37, 0
br i1 %38, label %43, label %39
39: ; preds = %35
%40 = load i32, ptr %13, align 4, !tbaa !14
%41 = tail call i32 @WTERMSIG(i32 noundef %40) #4
%42 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %41)
br label %43
43: ; preds = %35, %39, %22
%44 = phi i32 [ %23, %22 ], [ %8, %39 ], [ %8, %35 ]
%45 = phi i32 [ %7, %22 ], [ %26, %39 ], [ %26, %35 ]
%46 = tail call i32 @putchar(i8 noundef signext 10) #4
%47 = getelementptr inbounds i8, ptr %9, i64 8
%48 = load i32, ptr %47, align 8, !tbaa !16
%49 = load i32, ptr @SEEK_SET, align 4, !tbaa !17
%50 = tail call i32 @lseek(i32 noundef %48, i32 noundef 0, i32 noundef %49) #4
%51 = load i32, ptr @stdout, align 4, !tbaa !17
%52 = load i32, ptr %47, align 8, !tbaa !16
%53 = tail call i32 @copyfd(i32 noundef %51, i32 noundef %52) #4
br label %54
54: ; preds = %6, %43
%55 = phi i32 [ %44, %43 ], [ %8, %6 ]
%56 = phi i32 [ %45, %43 ], [ %7, %6 ]
%57 = getelementptr inbounds i8, ptr %9, i64 32
%58 = getelementptr inbounds i8, ptr %9, i64 56
%59 = load i64, ptr %58, align 8, !tbaa !6
%60 = icmp eq i64 %59, 0
br i1 %60, label %61, label %6, !llvm.loop !18
61: ; preds = %54, %1
%62 = phi i32 [ 0, %1 ], [ %55, %54 ]
%63 = phi i32 [ 0, %1 ], [ %56, %54 ]
%64 = icmp ne i32 %62, 0
%65 = icmp ne i32 %63, 0
%66 = select i1 %64, i1 true, i1 %65
br i1 %66, label %67, label %69
67: ; preds = %61
%68 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %62, i32 noundef %63)
br label %71
69: ; preds = %61
%70 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str)
br label %71
71: ; preds = %69, %67
%72 = zext i1 %66 to i32
ret i32 %72
}
declare i32 @putchar(i8 noundef signext) local_unnamed_addr #1
declare i32 @rmtree(i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare i64 @failed(i32 noundef) local_unnamed_addr #1
declare i64 @WIFEXITED(i32 noundef) local_unnamed_addr #1
declare i32 @WEXITSTATUS(i32 noundef) local_unnamed_addr #1
declare i64 @WIFSIGNALED(i32 noundef) local_unnamed_addr #1
declare i32 @WTERMSIG(i32 noundef) local_unnamed_addr #1
declare i32 @lseek(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @copyfd(i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 24}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !12, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !11, i64 12}
!15 = !{!7, !8, i64 0}
!16 = !{!7, !11, i64 8}
!17 = !{!11, !11, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| beanstalkd_ct_extr_ct.c_report |
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_x86.c_kvm_arch_hardware_disable.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_x86.c_kvm_arch_hardware_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@kvm_x86_ops = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @kvm_arch_hardware_disable() local_unnamed_addr #0 {
%1 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !5
%2 = load ptr, ptr %1, align 8, !tbaa !9
%3 = tail call i32 (...) %2() #2
%4 = tail call i32 (...) @drop_user_return_notifiers() #2
ret void
}
declare i32 @drop_user_return_notifiers(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_x86.c_kvm_arch_hardware_disable.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_x86.c_kvm_arch_hardware_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@kvm_x86_ops = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @kvm_arch_hardware_disable() local_unnamed_addr #0 {
%1 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !6
%2 = load ptr, ptr %1, align 8, !tbaa !10
%3 = tail call i32 %2() #2
%4 = tail call i32 @drop_user_return_notifiers() #2
ret void
}
declare i32 @drop_user_return_notifiers(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| linux_arch_x86_kvm_extr_x86.c_kvm_arch_hardware_disable |
; ModuleID = 'AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_dreq_set_remote_qpn.c'
source_filename = "AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_dreq_set_remote_qpn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cm_dreq_set_remote_qpn], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @cm_dreq_set_remote_qpn(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @be32_to_cpu(i32 noundef %1) #2
%4 = shl i32 %3, 8
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = tail call i32 @be32_to_cpu(i32 noundef %5) #2
%7 = and i32 %6, 255
%8 = or disjoint i32 %7, %4
%9 = tail call i32 @cpu_to_be32(i32 noundef %8) #2
store i32 %9, ptr %0, align 4, !tbaa !5
ret void
}
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cm_dreq_msg", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_dreq_set_remote_qpn.c'
source_filename = "AnghaBench/linux/drivers/infiniband/core/extr_cm_msgs.h_cm_dreq_set_remote_qpn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cm_dreq_set_remote_qpn], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @cm_dreq_set_remote_qpn(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @be32_to_cpu(i32 noundef %1) #2
%4 = shl i32 %3, 8
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = tail call i32 @be32_to_cpu(i32 noundef %5) #2
%7 = and i32 %6, 255
%8 = or disjoint i32 %7, %4
%9 = tail call i32 @cpu_to_be32(i32 noundef %8) #2
store i32 %9, ptr %0, align 4, !tbaa !6
ret void
}
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cm_dreq_msg", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_infiniband_core_extr_cm_msgs.h_cm_dreq_set_remote_qpn |
; ModuleID = 'AnghaBench/linux/net/sched/extr_act_api.c_tcf_action_dump_old.c'
source_filename = "AnghaBench/linux/net/sched/extr_act_api.c_tcf_action_dump_old.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @tcf_action_dump_old(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr %1, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = tail call i32 %6(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %3) #1
ret i32 %7
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tc_action", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/sched/extr_act_api.c_tcf_action_dump_old.c'
source_filename = "AnghaBench/linux/net/sched/extr_act_api.c_tcf_action_dump_old.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @tcf_action_dump_old(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr %1, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = tail call i32 %6(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %3) #1
ret i32 %7
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tc_action", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
| linux_net_sched_extr_act_api.c_tcf_action_dump_old |
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/rsa/extr_rsa_i15_pss_sign.c_br_rsa_i15_pss_sign.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/rsa/extr_rsa_i15_pss_sign.c_br_rsa_i15_pss_sign.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @br_rsa_i15_pss_sign(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #0 {
%8 = load i32, ptr %5, align 4, !tbaa !5
%9 = tail call i32 @br_rsa_pss_sig_pad(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %8, ptr noundef %6) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = tail call i32 @br_rsa_i15_private(ptr noundef %6, ptr noundef nonnull %5) #2
br label %13
13: ; preds = %7, %11
%14 = phi i32 [ %12, %11 ], [ 0, %7 ]
ret i32 %14
}
declare i32 @br_rsa_pss_sig_pad(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @br_rsa_i15_private(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/rsa/extr_rsa_i15_pss_sign.c_br_rsa_i15_pss_sign.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/rsa/extr_rsa_i15_pss_sign.c_br_rsa_i15_pss_sign.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @br_rsa_i15_pss_sign(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, ptr noundef %5, ptr noundef %6) local_unnamed_addr #0 {
%8 = load i32, ptr %5, align 4, !tbaa !6
%9 = tail call i32 @br_rsa_pss_sig_pad(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %8, ptr noundef %6) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = tail call i32 @br_rsa_i15_private(ptr noundef %6, ptr noundef nonnull %5) #2
br label %13
13: ; preds = %7, %11
%14 = phi i32 [ %12, %11 ], [ 0, %7 ]
ret i32 %14
}
declare i32 @br_rsa_pss_sig_pad(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @br_rsa_i15_private(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_bearssl_src_rsa_extr_rsa_i15_pss_sign.c_br_rsa_i15_pss_sign |
; ModuleID = 'AnghaBench/esp-idf/examples/peripherals/i2c/i2c_tools/main/extr_cmd_i2ctools.c_register_i2ctools.c'
source_filename = "AnghaBench/esp-idf/examples/peripherals/i2c/i2c_tools/main/extr_cmd_i2ctools.c_register_i2ctools.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @register_i2ctools() local_unnamed_addr #0 {
%1 = tail call i32 (...) @register_i2cconfig() #2
%2 = tail call i32 (...) @register_i2cdectect() #2
%3 = tail call i32 (...) @register_i2cget() #2
%4 = tail call i32 (...) @register_i2cset() #2
%5 = tail call i32 (...) @register_i2cdump() #2
ret void
}
declare i32 @register_i2cconfig(...) local_unnamed_addr #1
declare i32 @register_i2cdectect(...) local_unnamed_addr #1
declare i32 @register_i2cget(...) local_unnamed_addr #1
declare i32 @register_i2cset(...) local_unnamed_addr #1
declare i32 @register_i2cdump(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/esp-idf/examples/peripherals/i2c/i2c_tools/main/extr_cmd_i2ctools.c_register_i2ctools.c'
source_filename = "AnghaBench/esp-idf/examples/peripherals/i2c/i2c_tools/main/extr_cmd_i2ctools.c_register_i2ctools.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @register_i2ctools() local_unnamed_addr #0 {
%1 = tail call i32 @register_i2cconfig() #2
%2 = tail call i32 @register_i2cdectect() #2
%3 = tail call i32 @register_i2cget() #2
%4 = tail call i32 @register_i2cset() #2
%5 = tail call i32 @register_i2cdump() #2
ret void
}
declare i32 @register_i2cconfig(...) local_unnamed_addr #1
declare i32 @register_i2cdectect(...) local_unnamed_addr #1
declare i32 @register_i2cget(...) local_unnamed_addr #1
declare i32 @register_i2cset(...) local_unnamed_addr #1
declare i32 @register_i2cdump(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| esp-idf_examples_peripherals_i2c_i2c_tools_main_extr_cmd_i2ctools.c_register_i2ctools |
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/setupapi/extr_devinst.c_test_device_interface_key.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/setupapi/extr_devinst.c_test_device_interface_key.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i32 }
%struct.TYPE_10__ = type { i32 }
@__const.test_device_interface_key.keypath = private unnamed_addr constant [152 x i8] c"System\\CurrentControlSet\\Control\\DeviceClasses\\{6a55b5a4-3f65-11db-b704-0011955c2bdb}\\##?#ROOT#LEGACY_BOGUS#0001#{6a55b5a4-3f65-11db-b704-0011955c2bdb}\00", align 16
@DIGCF_ALLCLASSES = dso_local local_unnamed_addr global i32 0, align 4
@INVALID_HANDLE_VALUE = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [33 x i8] c"SetupDiGetClassDevs failed: %#x\0A\00", align 1
@.str.1 = private unnamed_addr constant [23 x i8] c"ROOT\\LEGACY_BOGUS\\0001\00", align 1
@guid = dso_local global i32 0, align 4
@.str.2 = private unnamed_addr constant [37 x i8] c"SetupDiCreateDeviceInfo failed: %#x\0A\00", align 1
@.str.3 = private unnamed_addr constant [42 x i8] c"SetupDiCreateDeviceInterface failed: %#x\0A\00", align 1
@HKEY_LOCAL_MACHINE = dso_local local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [38 x i8] c"failed to open device parent key: %u\0A\00", align 1
@.str.5 = private unnamed_addr constant [20 x i8] c"#\\Device Parameters\00", align 1
@ERROR_FILE_NOT_FOUND = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [21 x i8] c"key shouldn't exist\0A\00", align 1
@KEY_ALL_ACCESS = dso_local local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [14 x i8] c"got error %u\0A\00", align 1
@.str.8 = private unnamed_addr constant [22 x i8] c"key should exist: %u\0A\00", align 1
@REG_SZ = dso_local local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [5 x i8] c"test\00", align 1
@.str.10 = private unnamed_addr constant [26 x i8] c"RegQueryValue failed: %u\0A\00", align 1
@.str.11 = private unnamed_addr constant [19 x i8] c"got wrong data %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_device_interface_key], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @test_device_interface_key() #0 {
%1 = alloca [152 x i8], align 16
%2 = alloca %struct.TYPE_11__, align 4
%3 = alloca %struct.TYPE_10__, align 4
%4 = alloca i64, align 8
%5 = alloca i64, align 8
%6 = alloca [5 x i8], align 1
%7 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 152, ptr nonnull %1) #5
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(152) %1, ptr noundef nonnull align 16 dereferenceable(152) @__const.test_device_interface_key.keypath, i64 152, i1 false)
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
store i32 4, ptr %2, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
store i32 4, ptr %3, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
call void @llvm.lifetime.start.p0(i64 5, ptr nonnull %6) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #5
%8 = load i32, ptr @DIGCF_ALLCLASSES, align 4, !tbaa !5
%9 = tail call i64 @SetupDiGetClassDevsA(ptr noundef null, ptr noundef null, i32 noundef 0, i32 noundef %8) #5
%10 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !9
%11 = icmp ne i64 %9, %10
%12 = zext i1 %11 to i32
%13 = tail call i32 (...) @GetLastError() #5
%14 = tail call i32 (i32, ptr, ...) @ok(i32 noundef %12, ptr noundef nonnull @.str, i32 noundef %13) #5
%15 = call i32 @SetupDiCreateDeviceInfoA(i64 noundef %9, ptr noundef nonnull @.str.1, ptr noundef nonnull @guid, ptr noundef null, ptr noundef null, i32 noundef 0, ptr noundef nonnull %3) #5
%16 = call i32 (...) @GetLastError() #5
%17 = call i32 (i32, ptr, ...) @ok(i32 noundef %15, ptr noundef nonnull @.str.2, i32 noundef %16) #5
%18 = call i32 @SetupDiCreateDeviceInterfaceA(i64 noundef %9, ptr noundef nonnull %3, ptr noundef nonnull @guid, ptr noundef null, i32 noundef 0, ptr noundef nonnull %2) #5
%19 = call i32 (...) @GetLastError() #5
%20 = call i32 (i32, ptr, ...) @ok(i32 noundef %18, ptr noundef nonnull @.str.3, i32 noundef %19) #5
%21 = load i64, ptr @HKEY_LOCAL_MACHINE, align 8, !tbaa !9
%22 = call i32 @RegOpenKeyA(i64 noundef %21, ptr noundef nonnull %1, ptr noundef nonnull %4) #5
%23 = icmp eq i32 %22, 0
%24 = zext i1 %23 to i32
%25 = call i32 (i32, ptr, ...) @ok(i32 noundef %24, ptr noundef nonnull @.str.4, i32 noundef %22) #5
%26 = load i64, ptr %4, align 8, !tbaa !9
%27 = call i32 @RegOpenKeyA(i64 noundef %26, ptr noundef nonnull @.str.5, ptr noundef nonnull %5) #5
%28 = load i32, ptr @ERROR_FILE_NOT_FOUND, align 4, !tbaa !5
%29 = icmp eq i32 %27, %28
%30 = zext i1 %29 to i32
%31 = call i32 (i32, ptr, ...) @ok(i32 noundef %30, ptr noundef nonnull @.str.6) #5
%32 = load i32, ptr @KEY_ALL_ACCESS, align 4, !tbaa !5
%33 = call i64 @SetupDiCreateDeviceInterfaceRegKeyA(i64 noundef %9, ptr noundef nonnull %2, i32 noundef 0, i32 noundef %32, ptr noundef null, ptr noundef null) #5
%34 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !9
%35 = icmp ne i64 %33, %34
%36 = zext i1 %35 to i32
%37 = call i32 (...) @GetLastError() #5
%38 = call i32 (i32, ptr, ...) @ok(i32 noundef %36, ptr noundef nonnull @.str.7, i32 noundef %37) #5
%39 = load i64, ptr %4, align 8, !tbaa !9
%40 = call i32 @RegOpenKeyA(i64 noundef %39, ptr noundef nonnull @.str.5, ptr noundef nonnull %5) #5
%41 = icmp eq i32 %40, 0
%42 = zext i1 %41 to i32
%43 = call i32 (i32, ptr, ...) @ok(i32 noundef %42, ptr noundef nonnull @.str.8, i32 noundef %40) #5
%44 = load i64, ptr %5, align 8, !tbaa !9
%45 = load i32, ptr @REG_SZ, align 4, !tbaa !5
%46 = call i32 @RegSetValueA(i64 noundef %44, ptr noundef null, i32 noundef %45, ptr noundef nonnull @.str.9, i32 noundef 5) #5
store i32 5, ptr %7, align 4, !tbaa !5
%47 = call i32 @RegQueryValueA(i64 noundef %33, ptr noundef null, ptr noundef nonnull %6, ptr noundef nonnull %7) #5
%48 = icmp eq i32 %47, 0
%49 = zext i1 %48 to i32
%50 = call i32 (i32, ptr, ...) @ok(i32 noundef %49, ptr noundef nonnull @.str.10, i32 noundef %47) #5
%51 = call i32 @bcmp(ptr noundef nonnull dereferenceable(5) %6, ptr noundef nonnull dereferenceable(5) @.str.9, i64 5)
%52 = icmp eq i32 %51, 0
%53 = zext i1 %52 to i32
%54 = call i32 (i32, ptr, ...) @ok(i32 noundef %53, ptr noundef nonnull @.str.11, ptr noundef nonnull %6) #5
%55 = call i32 @RegCloseKey(i64 noundef %33) #5
%56 = load i64, ptr %5, align 8, !tbaa !9
%57 = call i32 @RegCloseKey(i64 noundef %56) #5
%58 = call i32 @SetupDiDeleteDeviceInterfaceRegKey(i64 noundef %9, ptr noundef nonnull %2, i32 noundef 0) #5
%59 = call i32 (...) @GetLastError() #5
%60 = call i32 (i32, ptr, ...) @ok(i32 noundef %58, ptr noundef nonnull @.str.7, i32 noundef %59) #5
%61 = load i64, ptr %4, align 8, !tbaa !9
%62 = call i32 @RegOpenKeyA(i64 noundef %61, ptr noundef nonnull @.str.5, ptr noundef nonnull %5) #5
%63 = load i32, ptr @ERROR_FILE_NOT_FOUND, align 4, !tbaa !5
%64 = icmp eq i32 %62, %63
%65 = zext i1 %64 to i32
%66 = call i32 (i32, ptr, ...) @ok(i32 noundef %65, ptr noundef nonnull @.str.6) #5
%67 = load i64, ptr %4, align 8, !tbaa !9
%68 = call i32 @RegCloseKey(i64 noundef %67) #5
%69 = call i32 @SetupDiRemoveDeviceInterface(i64 noundef %9, ptr noundef nonnull %2) #5
%70 = call i32 @SetupDiRemoveDevice(i64 noundef %9, ptr noundef nonnull %3) #5
%71 = call i32 @SetupDiDestroyDeviceInfoList(i64 noundef %9) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #5
call void @llvm.lifetime.end.p0(i64 5, ptr nonnull %6) #5
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
call void @llvm.lifetime.end.p0(i64 152, ptr nonnull %1) #5
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i64 @SetupDiGetClassDevsA(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @ok(i32 noundef, ptr noundef, ...) local_unnamed_addr #3
declare i32 @GetLastError(...) local_unnamed_addr #3
declare i32 @SetupDiCreateDeviceInfoA(i64 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @SetupDiCreateDeviceInterfaceA(i64 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @RegOpenKeyA(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i64 @SetupDiCreateDeviceInterfaceRegKeyA(i64 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @RegSetValueA(i64 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @RegQueryValueA(i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @RegCloseKey(i64 noundef) local_unnamed_addr #3
declare i32 @SetupDiDeleteDeviceInterfaceRegKey(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @SetupDiRemoveDeviceInterface(i64 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @SetupDiRemoveDevice(i64 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @SetupDiDestroyDeviceInfoList(i64 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind willreturn memory(argmem: read)
declare i32 @bcmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #4
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind willreturn memory(argmem: read) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/setupapi/extr_devinst.c_test_device_interface_key.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/setupapi/extr_devinst.c_test_device_interface_key.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { i32 }
%struct.TYPE_10__ = type { i32 }
@__const.test_device_interface_key.keypath = private unnamed_addr constant [152 x i8] c"System\\CurrentControlSet\\Control\\DeviceClasses\\{6a55b5a4-3f65-11db-b704-0011955c2bdb}\\##?#ROOT#LEGACY_BOGUS#0001#{6a55b5a4-3f65-11db-b704-0011955c2bdb}\00", align 1
@DIGCF_ALLCLASSES = common local_unnamed_addr global i32 0, align 4
@INVALID_HANDLE_VALUE = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [33 x i8] c"SetupDiGetClassDevs failed: %#x\0A\00", align 1
@.str.1 = private unnamed_addr constant [23 x i8] c"ROOT\\LEGACY_BOGUS\\0001\00", align 1
@guid = common global i32 0, align 4
@.str.2 = private unnamed_addr constant [37 x i8] c"SetupDiCreateDeviceInfo failed: %#x\0A\00", align 1
@.str.3 = private unnamed_addr constant [42 x i8] c"SetupDiCreateDeviceInterface failed: %#x\0A\00", align 1
@HKEY_LOCAL_MACHINE = common local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [38 x i8] c"failed to open device parent key: %u\0A\00", align 1
@.str.5 = private unnamed_addr constant [20 x i8] c"#\\Device Parameters\00", align 1
@ERROR_FILE_NOT_FOUND = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [21 x i8] c"key shouldn't exist\0A\00", align 1
@KEY_ALL_ACCESS = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [14 x i8] c"got error %u\0A\00", align 1
@.str.8 = private unnamed_addr constant [22 x i8] c"key should exist: %u\0A\00", align 1
@REG_SZ = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [5 x i8] c"test\00", align 1
@.str.10 = private unnamed_addr constant [26 x i8] c"RegQueryValue failed: %u\0A\00", align 1
@.str.11 = private unnamed_addr constant [19 x i8] c"got wrong data %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @test_device_interface_key], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @test_device_interface_key() #0 {
%1 = alloca [152 x i8], align 1
%2 = alloca %struct.TYPE_11__, align 4
%3 = alloca %struct.TYPE_10__, align 4
%4 = alloca i64, align 8
%5 = alloca i64, align 8
%6 = alloca [5 x i8], align 1
%7 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 152, ptr nonnull %1) #5
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(152) %1, ptr noundef nonnull align 1 dereferenceable(152) @__const.test_device_interface_key.keypath, i64 152, i1 false)
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
store i32 4, ptr %2, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
store i32 4, ptr %3, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
call void @llvm.lifetime.start.p0(i64 5, ptr nonnull %6) #5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #5
%8 = load i32, ptr @DIGCF_ALLCLASSES, align 4, !tbaa !6
%9 = tail call i64 @SetupDiGetClassDevsA(ptr noundef null, ptr noundef null, i32 noundef 0, i32 noundef %8) #5
%10 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !10
%11 = icmp ne i64 %9, %10
%12 = zext i1 %11 to i32
%13 = tail call i32 @GetLastError() #5
%14 = tail call i32 (i32, ptr, ...) @ok(i32 noundef %12, ptr noundef nonnull @.str, i32 noundef %13) #5
%15 = call i32 @SetupDiCreateDeviceInfoA(i64 noundef %9, ptr noundef nonnull @.str.1, ptr noundef nonnull @guid, ptr noundef null, ptr noundef null, i32 noundef 0, ptr noundef nonnull %3) #5
%16 = call i32 @GetLastError() #5
%17 = call i32 (i32, ptr, ...) @ok(i32 noundef %15, ptr noundef nonnull @.str.2, i32 noundef %16) #5
%18 = call i32 @SetupDiCreateDeviceInterfaceA(i64 noundef %9, ptr noundef nonnull %3, ptr noundef nonnull @guid, ptr noundef null, i32 noundef 0, ptr noundef nonnull %2) #5
%19 = call i32 @GetLastError() #5
%20 = call i32 (i32, ptr, ...) @ok(i32 noundef %18, ptr noundef nonnull @.str.3, i32 noundef %19) #5
%21 = load i64, ptr @HKEY_LOCAL_MACHINE, align 8, !tbaa !10
%22 = call i32 @RegOpenKeyA(i64 noundef %21, ptr noundef nonnull %1, ptr noundef nonnull %4) #5
%23 = icmp eq i32 %22, 0
%24 = zext i1 %23 to i32
%25 = call i32 (i32, ptr, ...) @ok(i32 noundef %24, ptr noundef nonnull @.str.4, i32 noundef %22) #5
%26 = load i64, ptr %4, align 8, !tbaa !10
%27 = call i32 @RegOpenKeyA(i64 noundef %26, ptr noundef nonnull @.str.5, ptr noundef nonnull %5) #5
%28 = load i32, ptr @ERROR_FILE_NOT_FOUND, align 4, !tbaa !6
%29 = icmp eq i32 %27, %28
%30 = zext i1 %29 to i32
%31 = call i32 (i32, ptr, ...) @ok(i32 noundef %30, ptr noundef nonnull @.str.6) #5
%32 = load i32, ptr @KEY_ALL_ACCESS, align 4, !tbaa !6
%33 = call i64 @SetupDiCreateDeviceInterfaceRegKeyA(i64 noundef %9, ptr noundef nonnull %2, i32 noundef 0, i32 noundef %32, ptr noundef null, ptr noundef null) #5
%34 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !10
%35 = icmp ne i64 %33, %34
%36 = zext i1 %35 to i32
%37 = call i32 @GetLastError() #5
%38 = call i32 (i32, ptr, ...) @ok(i32 noundef %36, ptr noundef nonnull @.str.7, i32 noundef %37) #5
%39 = load i64, ptr %4, align 8, !tbaa !10
%40 = call i32 @RegOpenKeyA(i64 noundef %39, ptr noundef nonnull @.str.5, ptr noundef nonnull %5) #5
%41 = icmp eq i32 %40, 0
%42 = zext i1 %41 to i32
%43 = call i32 (i32, ptr, ...) @ok(i32 noundef %42, ptr noundef nonnull @.str.8, i32 noundef %40) #5
%44 = load i64, ptr %5, align 8, !tbaa !10
%45 = load i32, ptr @REG_SZ, align 4, !tbaa !6
%46 = call i32 @RegSetValueA(i64 noundef %44, ptr noundef null, i32 noundef %45, ptr noundef nonnull @.str.9, i32 noundef 5) #5
store i32 5, ptr %7, align 4, !tbaa !6
%47 = call i32 @RegQueryValueA(i64 noundef %33, ptr noundef null, ptr noundef nonnull %6, ptr noundef nonnull %7) #5
%48 = icmp eq i32 %47, 0
%49 = zext i1 %48 to i32
%50 = call i32 (i32, ptr, ...) @ok(i32 noundef %49, ptr noundef nonnull @.str.10, i32 noundef %47) #5
%51 = call i32 @memcmp(ptr noundef nonnull dereferenceable(5) %6, ptr noundef nonnull dereferenceable(5) @.str.9, i64 5)
%52 = icmp eq i32 %51, 0
%53 = zext i1 %52 to i32
%54 = call i32 (i32, ptr, ...) @ok(i32 noundef %53, ptr noundef nonnull @.str.11, ptr noundef nonnull %6) #5
%55 = call i32 @RegCloseKey(i64 noundef %33) #5
%56 = load i64, ptr %5, align 8, !tbaa !10
%57 = call i32 @RegCloseKey(i64 noundef %56) #5
%58 = call i32 @SetupDiDeleteDeviceInterfaceRegKey(i64 noundef %9, ptr noundef nonnull %2, i32 noundef 0) #5
%59 = call i32 @GetLastError() #5
%60 = call i32 (i32, ptr, ...) @ok(i32 noundef %58, ptr noundef nonnull @.str.7, i32 noundef %59) #5
%61 = load i64, ptr %4, align 8, !tbaa !10
%62 = call i32 @RegOpenKeyA(i64 noundef %61, ptr noundef nonnull @.str.5, ptr noundef nonnull %5) #5
%63 = load i32, ptr @ERROR_FILE_NOT_FOUND, align 4, !tbaa !6
%64 = icmp eq i32 %62, %63
%65 = zext i1 %64 to i32
%66 = call i32 (i32, ptr, ...) @ok(i32 noundef %65, ptr noundef nonnull @.str.6) #5
%67 = load i64, ptr %4, align 8, !tbaa !10
%68 = call i32 @RegCloseKey(i64 noundef %67) #5
%69 = call i32 @SetupDiRemoveDeviceInterface(i64 noundef %9, ptr noundef nonnull %2) #5
%70 = call i32 @SetupDiRemoveDevice(i64 noundef %9, ptr noundef nonnull %3) #5
%71 = call i32 @SetupDiDestroyDeviceInfoList(i64 noundef %9) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #5
call void @llvm.lifetime.end.p0(i64 5, ptr nonnull %6) #5
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
call void @llvm.lifetime.end.p0(i64 152, ptr nonnull %1) #5
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i64 @SetupDiGetClassDevsA(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @ok(i32 noundef, ptr noundef, ...) local_unnamed_addr #3
declare i32 @GetLastError(...) local_unnamed_addr #3
declare i32 @SetupDiCreateDeviceInfoA(i64 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @SetupDiCreateDeviceInterfaceA(i64 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @RegOpenKeyA(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i64 @SetupDiCreateDeviceInterfaceRegKeyA(i64 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @RegSetValueA(i64 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @RegQueryValueA(i64 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @RegCloseKey(i64 noundef) local_unnamed_addr #3
declare i32 @SetupDiDeleteDeviceInterfaceRegKey(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @SetupDiRemoveDeviceInterface(i64 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @SetupDiRemoveDevice(i64 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @SetupDiDestroyDeviceInfoList(i64 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind willreturn memory(argmem: read)
declare i32 @memcmp(ptr nocapture, ptr nocapture, i64) local_unnamed_addr #4
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nofree nounwind willreturn memory(argmem: read) }
attributes #5 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| reactos_modules_rostests_winetests_setupapi_extr_devinst.c_test_device_interface_key |
; ModuleID = 'AnghaBench/lwan/src/samples/techempower/extr_json.c_parse_value.c'
source_filename = "AnghaBench/lwan/src/samples/techempower/extr_json.c_parse_value.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [5 x i8] c"null\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"false\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"true\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @parse_value], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @parse_value(ptr nocapture noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca ptr, align 8
%5 = alloca double, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%6 = load ptr, ptr %0, align 8, !tbaa !5
store ptr %6, ptr %3, align 8, !tbaa !5
%7 = load i8, ptr %6, align 1, !tbaa !9
switch i8 %7, label %58 [
i8 110, label %8
i8 102, label %17
i8 116, label %26
i8 34, label %35
i8 91, label %48
i8 123, label %53
]
8: ; preds = %2
%9 = call i32 @expect_literal(ptr noundef nonnull %3, ptr noundef nonnull @.str) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %71, label %11
11: ; preds = %8
%12 = icmp eq ptr %1, null
br i1 %12, label %15, label %13
13: ; preds = %11
%14 = call ptr (...) @json_mknull() #3
store ptr %14, ptr %1, align 8, !tbaa !5
br label %15
15: ; preds = %13, %11
%16 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %16, ptr %0, align 8, !tbaa !5
br label %71
17: ; preds = %2
%18 = call i32 @expect_literal(ptr noundef nonnull %3, ptr noundef nonnull @.str.1) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %71, label %20
20: ; preds = %17
%21 = icmp eq ptr %1, null
br i1 %21, label %24, label %22
22: ; preds = %20
%23 = call ptr @json_mkbool(i32 noundef 0) #3
store ptr %23, ptr %1, align 8, !tbaa !5
br label %24
24: ; preds = %22, %20
%25 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %25, ptr %0, align 8, !tbaa !5
br label %71
26: ; preds = %2
%27 = call i32 @expect_literal(ptr noundef nonnull %3, ptr noundef nonnull @.str.2) #3
%28 = icmp eq i32 %27, 0
br i1 %28, label %71, label %29
29: ; preds = %26
%30 = icmp eq ptr %1, null
br i1 %30, label %33, label %31
31: ; preds = %29
%32 = call ptr @json_mkbool(i32 noundef 1) #3
store ptr %32, ptr %1, align 8, !tbaa !5
br label %33
33: ; preds = %31, %29
%34 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %34, ptr %0, align 8, !tbaa !5
br label %71
35: ; preds = %2
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%36 = icmp eq ptr %1, null
%37 = select i1 %36, ptr null, ptr %4
%38 = call i32 @parse_string(ptr noundef nonnull %3, ptr noundef %37) #3
%39 = icmp eq i32 %38, 0
br i1 %39, label %46, label %40
40: ; preds = %35
br i1 %36, label %44, label %41
41: ; preds = %40
%42 = load ptr, ptr %4, align 8, !tbaa !5
%43 = call ptr @mkstring(ptr noundef %42) #3
store ptr %43, ptr %1, align 8, !tbaa !5
br label %44
44: ; preds = %41, %40
%45 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %45, ptr %0, align 8, !tbaa !5
br label %46
46: ; preds = %35, %44
%47 = phi i32 [ 1, %44 ], [ 0, %35 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %71
48: ; preds = %2
%49 = call i32 @parse_array(ptr noundef nonnull %3, ptr noundef %1) #3
%50 = icmp eq i32 %49, 0
br i1 %50, label %71, label %51
51: ; preds = %48
%52 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %52, ptr %0, align 8, !tbaa !5
br label %71
53: ; preds = %2
%54 = call i32 @parse_object(ptr noundef nonnull %3, ptr noundef %1) #3
%55 = icmp eq i32 %54, 0
br i1 %55, label %71, label %56
56: ; preds = %53
%57 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %57, ptr %0, align 8, !tbaa !5
br label %71
58: ; preds = %2
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%59 = icmp eq ptr %1, null
%60 = select i1 %59, ptr null, ptr %5
%61 = call i32 @parse_number(ptr noundef nonnull %3, ptr noundef %60) #3
%62 = icmp eq i32 %61, 0
br i1 %62, label %69, label %63
63: ; preds = %58
br i1 %59, label %67, label %64
64: ; preds = %63
%65 = load double, ptr %5, align 8, !tbaa !10
%66 = call ptr @json_mknumber(double noundef %65) #3
store ptr %66, ptr %1, align 8, !tbaa !5
br label %67
67: ; preds = %64, %63
%68 = load ptr, ptr %3, align 8, !tbaa !5
store ptr %68, ptr %0, align 8, !tbaa !5
br label %69
69: ; preds = %58, %67
%70 = phi i32 [ 1, %67 ], [ 0, %58 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br label %71
71: ; preds = %53, %48, %26, %17, %8, %69, %56, %51, %46, %33, %24, %15
%72 = phi i32 [ %70, %69 ], [ 1, %56 ], [ 1, %51 ], [ %47, %46 ], [ 1, %33 ], [ 1, %24 ], [ 1, %15 ], [ 0, %8 ], [ 0, %17 ], [ 0, %26 ], [ 0, %48 ], [ 0, %53 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %72
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @expect_literal(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @json_mknull(...) local_unnamed_addr #2
declare ptr @json_mkbool(i32 noundef) local_unnamed_addr #2
declare i32 @parse_string(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @mkstring(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @parse_array(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @parse_object(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @parse_number(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @json_mknumber(double noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"double", !7, i64 0}
| ; ModuleID = 'AnghaBench/lwan/src/samples/techempower/extr_json.c_parse_value.c'
source_filename = "AnghaBench/lwan/src/samples/techempower/extr_json.c_parse_value.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [5 x i8] c"null\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"false\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"true\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @parse_value], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @parse_value(ptr nocapture noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca ptr, align 8
%5 = alloca double, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%6 = load ptr, ptr %0, align 8, !tbaa !6
store ptr %6, ptr %3, align 8, !tbaa !6
%7 = load i8, ptr %6, align 1, !tbaa !10
switch i8 %7, label %58 [
i8 110, label %8
i8 102, label %17
i8 116, label %26
i8 34, label %35
i8 91, label %48
i8 123, label %53
]
8: ; preds = %2
%9 = call i32 @expect_literal(ptr noundef nonnull %3, ptr noundef nonnull @.str) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %71, label %11
11: ; preds = %8
%12 = icmp eq ptr %1, null
br i1 %12, label %15, label %13
13: ; preds = %11
%14 = call ptr @json_mknull() #3
store ptr %14, ptr %1, align 8, !tbaa !6
br label %15
15: ; preds = %13, %11
%16 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %16, ptr %0, align 8, !tbaa !6
br label %71
17: ; preds = %2
%18 = call i32 @expect_literal(ptr noundef nonnull %3, ptr noundef nonnull @.str.1) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %71, label %20
20: ; preds = %17
%21 = icmp eq ptr %1, null
br i1 %21, label %24, label %22
22: ; preds = %20
%23 = call ptr @json_mkbool(i32 noundef 0) #3
store ptr %23, ptr %1, align 8, !tbaa !6
br label %24
24: ; preds = %22, %20
%25 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %25, ptr %0, align 8, !tbaa !6
br label %71
26: ; preds = %2
%27 = call i32 @expect_literal(ptr noundef nonnull %3, ptr noundef nonnull @.str.2) #3
%28 = icmp eq i32 %27, 0
br i1 %28, label %71, label %29
29: ; preds = %26
%30 = icmp eq ptr %1, null
br i1 %30, label %33, label %31
31: ; preds = %29
%32 = call ptr @json_mkbool(i32 noundef 1) #3
store ptr %32, ptr %1, align 8, !tbaa !6
br label %33
33: ; preds = %31, %29
%34 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %34, ptr %0, align 8, !tbaa !6
br label %71
35: ; preds = %2
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%36 = icmp eq ptr %1, null
%37 = select i1 %36, ptr null, ptr %4
%38 = call i32 @parse_string(ptr noundef nonnull %3, ptr noundef %37) #3
%39 = icmp eq i32 %38, 0
br i1 %39, label %46, label %40
40: ; preds = %35
br i1 %36, label %44, label %41
41: ; preds = %40
%42 = load ptr, ptr %4, align 8, !tbaa !6
%43 = call ptr @mkstring(ptr noundef %42) #3
store ptr %43, ptr %1, align 8, !tbaa !6
br label %44
44: ; preds = %41, %40
%45 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %45, ptr %0, align 8, !tbaa !6
br label %46
46: ; preds = %35, %44
%47 = phi i32 [ 1, %44 ], [ 0, %35 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
br label %71
48: ; preds = %2
%49 = call i32 @parse_array(ptr noundef nonnull %3, ptr noundef %1) #3
%50 = icmp eq i32 %49, 0
br i1 %50, label %71, label %51
51: ; preds = %48
%52 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %52, ptr %0, align 8, !tbaa !6
br label %71
53: ; preds = %2
%54 = call i32 @parse_object(ptr noundef nonnull %3, ptr noundef %1) #3
%55 = icmp eq i32 %54, 0
br i1 %55, label %71, label %56
56: ; preds = %53
%57 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %57, ptr %0, align 8, !tbaa !6
br label %71
58: ; preds = %2
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%59 = icmp eq ptr %1, null
%60 = select i1 %59, ptr null, ptr %5
%61 = call i32 @parse_number(ptr noundef nonnull %3, ptr noundef %60) #3
%62 = icmp eq i32 %61, 0
br i1 %62, label %69, label %63
63: ; preds = %58
br i1 %59, label %67, label %64
64: ; preds = %63
%65 = load double, ptr %5, align 8, !tbaa !11
%66 = call ptr @json_mknumber(double noundef %65) #3
store ptr %66, ptr %1, align 8, !tbaa !6
br label %67
67: ; preds = %64, %63
%68 = load ptr, ptr %3, align 8, !tbaa !6
store ptr %68, ptr %0, align 8, !tbaa !6
br label %69
69: ; preds = %58, %67
%70 = phi i32 [ 1, %67 ], [ 0, %58 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br label %71
71: ; preds = %53, %48, %26, %17, %8, %69, %56, %51, %46, %33, %24, %15
%72 = phi i32 [ %70, %69 ], [ 1, %56 ], [ 1, %51 ], [ %47, %46 ], [ 1, %33 ], [ 1, %24 ], [ 1, %15 ], [ 0, %8 ], [ 0, %17 ], [ 0, %26 ], [ 0, %48 ], [ 0, %53 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %72
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @expect_literal(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @json_mknull(...) local_unnamed_addr #2
declare ptr @json_mkbool(i32 noundef) local_unnamed_addr #2
declare i32 @parse_string(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @mkstring(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @parse_array(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @parse_object(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @parse_number(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @json_mknumber(double noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !8, i64 0}
| lwan_src_samples_techempower_extr_json.c_parse_value |
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