IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/freebsd/contrib/libexecinfo/extr_backtrace.c_backtrace_symbols.c'
source_filename = "AnghaBench/freebsd/contrib/libexecinfo/extr_backtrace.c_backtrace_symbols.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@fmt = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @backtrace_symbols(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @fmt, align 4, !tbaa !5
%4 = tail call ptr @backtrace_symbols_fmt(ptr noundef %0, i64 noundef %1, i32 noundef %3) #2
ret ptr %4
}
declare ptr @backtrace_symbols_fmt(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libexecinfo/extr_backtrace.c_backtrace_symbols.c'
source_filename = "AnghaBench/freebsd/contrib/libexecinfo/extr_backtrace.c_backtrace_symbols.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fmt = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @backtrace_symbols(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @fmt, align 4, !tbaa !6
%4 = tail call ptr @backtrace_symbols_fmt(ptr noundef %0, i64 noundef %1, i32 noundef %3) #2
ret ptr %4
}
declare ptr @backtrace_symbols_fmt(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_libexecinfo_extr_backtrace.c_backtrace_symbols |
; ModuleID = 'AnghaBench/linux/security/keys/extr_process_keys.c_key_fsuid_changed.c'
source_filename = "AnghaBench/linux/security/keys/extr_process_keys.c_key_fsuid_changed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cred = type { ptr, i32 }
%struct.TYPE_2__ = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @key_fsuid_changed(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = tail call i32 @down_write(ptr noundef nonnull %2) #2
%6 = getelementptr inbounds %struct.cred, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 8, !tbaa !11
%8 = load ptr, ptr %0, align 8, !tbaa !5
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 0, i32 1
store i32 %7, ptr %9, align 4, !tbaa !12
%10 = tail call i32 @up_write(ptr noundef %8) #2
br label %11
11: ; preds = %4, %1
ret void
}
declare i32 @down_write(ptr noundef) local_unnamed_addr #1
declare i32 @up_write(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cred", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !10, i64 4}
!13 = !{!"TYPE_2__", !10, i64 0, !10, i64 4}
| ; ModuleID = 'AnghaBench/linux/security/keys/extr_process_keys.c_key_fsuid_changed.c'
source_filename = "AnghaBench/linux/security/keys/extr_process_keys.c_key_fsuid_changed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @key_fsuid_changed(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = tail call i32 @down_write(ptr noundef nonnull %2) #2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i32, ptr %6, align 8, !tbaa !12
%8 = load ptr, ptr %0, align 8, !tbaa !6
%9 = getelementptr inbounds i8, ptr %8, i64 4
store i32 %7, ptr %9, align 4, !tbaa !13
%10 = tail call i32 @up_write(ptr noundef %8) #2
br label %11
11: ; preds = %4, %1
ret void
}
declare i32 @down_write(ptr noundef) local_unnamed_addr #1
declare i32 @up_write(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cred", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !11, i64 4}
!14 = !{!"TYPE_2__", !11, i64 0, !11, i64 4}
| linux_security_keys_extr_process_keys.c_key_fsuid_changed |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-cmos.c_cmos_set_alarm.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-cmos.c_cmos_set_alarm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cmos_rtc = type { i64, i64, i32 }
%struct.rtc_wkalrm = type { i64, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i8, i8, i8, i8 }
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@rtc_lock = dso_local global i32 0, align 4
@RTC_AIE = dso_local local_unnamed_addr global i32 0, align 4
@RTC_HOURS_ALARM = dso_local local_unnamed_addr global i64 0, align 8
@RTC_MINUTES_ALARM = dso_local local_unnamed_addr global i64 0, align 8
@RTC_SECONDS_ALARM = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @cmos_set_alarm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cmos_set_alarm(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.cmos_rtc, ptr %3, i64 0, i32 2
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = tail call i32 @is_valid_irq(i32 noundef %5) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, ptr @EIO, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %85
11: ; preds = %2
%12 = getelementptr inbounds %struct.rtc_wkalrm, ptr %1, i64 0, i32 1
%13 = load i32, ptr %12, align 8, !tbaa !12
%14 = trunc i32 %13 to i8
%15 = add i8 %14, 1
%16 = icmp ult i8 %15, 13
br i1 %16, label %17, label %20
17: ; preds = %11
%18 = tail call i32 @bin2bcd(i8 noundef zeroext %15) #2
%19 = trunc i32 %18 to i8
br label %20
20: ; preds = %11, %17
%21 = phi i8 [ %19, %17 ], [ -1, %11 ]
%22 = getelementptr inbounds %struct.rtc_wkalrm, ptr %1, i64 0, i32 1, i32 1
%23 = load i8, ptr %22, align 4, !tbaa !15
%24 = add i8 %23, -1
%25 = icmp ult i8 %24, 31
br i1 %25, label %26, label %29
26: ; preds = %20
%27 = tail call i32 @bin2bcd(i8 noundef zeroext %23) #2
%28 = trunc i32 %27 to i8
br label %29
29: ; preds = %20, %26
%30 = phi i8 [ %28, %26 ], [ -1, %20 ]
%31 = getelementptr inbounds %struct.rtc_wkalrm, ptr %1, i64 0, i32 1, i32 2
%32 = load i8, ptr %31, align 1, !tbaa !16
%33 = icmp ult i8 %32, 24
br i1 %33, label %34, label %37
34: ; preds = %29
%35 = tail call i32 @bin2bcd(i8 noundef zeroext %32) #2
%36 = trunc i32 %35 to i8
br label %37
37: ; preds = %29, %34
%38 = phi i8 [ %36, %34 ], [ -1, %29 ]
%39 = getelementptr inbounds %struct.rtc_wkalrm, ptr %1, i64 0, i32 1, i32 3
%40 = load i8, ptr %39, align 2, !tbaa !17
%41 = icmp ult i8 %40, 60
br i1 %41, label %42, label %45
42: ; preds = %37
%43 = tail call i32 @bin2bcd(i8 noundef zeroext %40) #2
%44 = trunc i32 %43 to i8
br label %45
45: ; preds = %37, %42
%46 = phi i8 [ %44, %42 ], [ -1, %37 ]
%47 = getelementptr inbounds %struct.rtc_wkalrm, ptr %1, i64 0, i32 1, i32 4
%48 = load i8, ptr %47, align 1, !tbaa !18
%49 = icmp ult i8 %48, 60
br i1 %49, label %50, label %53
50: ; preds = %45
%51 = tail call i32 @bin2bcd(i8 noundef zeroext %48) #2
%52 = trunc i32 %51 to i8
br label %53
53: ; preds = %45, %50
%54 = phi i8 [ %52, %50 ], [ -1, %45 ]
%55 = tail call i32 @spin_lock_irq(ptr noundef nonnull @rtc_lock) #2
%56 = load i32, ptr @RTC_AIE, align 4, !tbaa !11
%57 = tail call i32 @cmos_irq_disable(ptr noundef nonnull %3, i32 noundef %56) #2
%58 = load i64, ptr @RTC_HOURS_ALARM, align 8, !tbaa !19
%59 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %38, i64 noundef %58) #2
%60 = load i64, ptr @RTC_MINUTES_ALARM, align 8, !tbaa !19
%61 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %46, i64 noundef %60) #2
%62 = load i64, ptr @RTC_SECONDS_ALARM, align 8, !tbaa !19
%63 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %54, i64 noundef %62) #2
%64 = getelementptr inbounds %struct.cmos_rtc, ptr %3, i64 0, i32 1
%65 = load i64, ptr %64, align 8, !tbaa !20
%66 = icmp eq i64 %65, 0
br i1 %66, label %73, label %67
67: ; preds = %53
%68 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %30, i64 noundef %65) #2
%69 = load i64, ptr %3, align 8, !tbaa !21
%70 = icmp eq i64 %69, 0
br i1 %70, label %73, label %71
71: ; preds = %67
%72 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %21, i64 noundef %69) #2
br label %73
73: ; preds = %67, %71, %53
%74 = load i8, ptr %31, align 1, !tbaa !16
%75 = load i8, ptr %39, align 2, !tbaa !17
%76 = load i8, ptr %47, align 1, !tbaa !18
%77 = tail call i32 @hpet_set_alarm_time(i8 noundef zeroext %74, i8 noundef zeroext %75, i8 noundef zeroext %76) #2
%78 = load i64, ptr %1, align 8, !tbaa !22
%79 = icmp eq i64 %78, 0
br i1 %79, label %83, label %80
80: ; preds = %73
%81 = load i32, ptr @RTC_AIE, align 4, !tbaa !11
%82 = tail call i32 @cmos_irq_enable(ptr noundef nonnull %3, i32 noundef %81) #2
br label %83
83: ; preds = %80, %73
%84 = tail call i32 @spin_unlock_irq(ptr noundef nonnull @rtc_lock) #2
br label %85
85: ; preds = %83, %8
%86 = phi i32 [ 0, %83 ], [ %10, %8 ]
ret i32 %86
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @is_valid_irq(i32 noundef) local_unnamed_addr #1
declare i32 @bin2bcd(i8 noundef zeroext) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @cmos_irq_disable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CMOS_WRITE(i8 noundef zeroext, i64 noundef) local_unnamed_addr #1
declare i32 @hpet_set_alarm_time(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @cmos_irq_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"cmos_rtc", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!13, !10, i64 8}
!13 = !{!"rtc_wkalrm", !7, i64 0, !14, i64 8}
!14 = !{!"TYPE_2__", !10, i64 0, !8, i64 4, !8, i64 5, !8, i64 6, !8, i64 7}
!15 = !{!13, !8, i64 12}
!16 = !{!13, !8, i64 13}
!17 = !{!13, !8, i64 14}
!18 = !{!13, !8, i64 15}
!19 = !{!7, !7, i64 0}
!20 = !{!6, !7, i64 8}
!21 = !{!6, !7, i64 0}
!22 = !{!13, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-cmos.c_cmos_set_alarm.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rtc/extr_rtc-cmos.c_cmos_set_alarm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EIO = common local_unnamed_addr global i32 0, align 4
@rtc_lock = common global i32 0, align 4
@RTC_AIE = common local_unnamed_addr global i32 0, align 4
@RTC_HOURS_ALARM = common local_unnamed_addr global i64 0, align 8
@RTC_MINUTES_ALARM = common local_unnamed_addr global i64 0, align 8
@RTC_SECONDS_ALARM = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @cmos_set_alarm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @cmos_set_alarm(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 16
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = tail call i32 @is_valid_irq(i32 noundef %5) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, ptr @EIO, align 4, !tbaa !12
%10 = sub nsw i32 0, %9
br label %85
11: ; preds = %2
%12 = getelementptr inbounds i8, ptr %1, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !13
%14 = trunc i32 %13 to i8
%15 = add i8 %14, 1
%16 = icmp ult i8 %15, 13
br i1 %16, label %17, label %20
17: ; preds = %11
%18 = tail call i32 @bin2bcd(i8 noundef zeroext %15) #2
%19 = trunc i32 %18 to i8
br label %20
20: ; preds = %11, %17
%21 = phi i8 [ %19, %17 ], [ -1, %11 ]
%22 = getelementptr inbounds i8, ptr %1, i64 12
%23 = load i8, ptr %22, align 4, !tbaa !16
%24 = add i8 %23, -1
%25 = icmp ult i8 %24, 31
br i1 %25, label %26, label %29
26: ; preds = %20
%27 = tail call i32 @bin2bcd(i8 noundef zeroext %23) #2
%28 = trunc i32 %27 to i8
br label %29
29: ; preds = %20, %26
%30 = phi i8 [ %28, %26 ], [ -1, %20 ]
%31 = getelementptr inbounds i8, ptr %1, i64 13
%32 = load i8, ptr %31, align 1, !tbaa !17
%33 = icmp ult i8 %32, 24
br i1 %33, label %34, label %37
34: ; preds = %29
%35 = tail call i32 @bin2bcd(i8 noundef zeroext %32) #2
%36 = trunc i32 %35 to i8
br label %37
37: ; preds = %29, %34
%38 = phi i8 [ %36, %34 ], [ -1, %29 ]
%39 = getelementptr inbounds i8, ptr %1, i64 14
%40 = load i8, ptr %39, align 2, !tbaa !18
%41 = icmp ult i8 %40, 60
br i1 %41, label %42, label %45
42: ; preds = %37
%43 = tail call i32 @bin2bcd(i8 noundef zeroext %40) #2
%44 = trunc i32 %43 to i8
br label %45
45: ; preds = %37, %42
%46 = phi i8 [ %44, %42 ], [ -1, %37 ]
%47 = getelementptr inbounds i8, ptr %1, i64 15
%48 = load i8, ptr %47, align 1, !tbaa !19
%49 = icmp ult i8 %48, 60
br i1 %49, label %50, label %53
50: ; preds = %45
%51 = tail call i32 @bin2bcd(i8 noundef zeroext %48) #2
%52 = trunc i32 %51 to i8
br label %53
53: ; preds = %45, %50
%54 = phi i8 [ %52, %50 ], [ -1, %45 ]
%55 = tail call i32 @spin_lock_irq(ptr noundef nonnull @rtc_lock) #2
%56 = load i32, ptr @RTC_AIE, align 4, !tbaa !12
%57 = tail call i32 @cmos_irq_disable(ptr noundef nonnull %3, i32 noundef %56) #2
%58 = load i64, ptr @RTC_HOURS_ALARM, align 8, !tbaa !20
%59 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %38, i64 noundef %58) #2
%60 = load i64, ptr @RTC_MINUTES_ALARM, align 8, !tbaa !20
%61 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %46, i64 noundef %60) #2
%62 = load i64, ptr @RTC_SECONDS_ALARM, align 8, !tbaa !20
%63 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %54, i64 noundef %62) #2
%64 = getelementptr inbounds i8, ptr %3, i64 8
%65 = load i64, ptr %64, align 8, !tbaa !21
%66 = icmp eq i64 %65, 0
br i1 %66, label %73, label %67
67: ; preds = %53
%68 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %30, i64 noundef %65) #2
%69 = load i64, ptr %3, align 8, !tbaa !22
%70 = icmp eq i64 %69, 0
br i1 %70, label %73, label %71
71: ; preds = %67
%72 = tail call i32 @CMOS_WRITE(i8 noundef zeroext %21, i64 noundef %69) #2
br label %73
73: ; preds = %67, %71, %53
%74 = load i8, ptr %31, align 1, !tbaa !17
%75 = load i8, ptr %39, align 2, !tbaa !18
%76 = load i8, ptr %47, align 1, !tbaa !19
%77 = tail call i32 @hpet_set_alarm_time(i8 noundef zeroext %74, i8 noundef zeroext %75, i8 noundef zeroext %76) #2
%78 = load i64, ptr %1, align 8, !tbaa !23
%79 = icmp eq i64 %78, 0
br i1 %79, label %83, label %80
80: ; preds = %73
%81 = load i32, ptr @RTC_AIE, align 4, !tbaa !12
%82 = tail call i32 @cmos_irq_enable(ptr noundef nonnull %3, i32 noundef %81) #2
br label %83
83: ; preds = %80, %73
%84 = tail call i32 @spin_unlock_irq(ptr noundef nonnull @rtc_lock) #2
br label %85
85: ; preds = %83, %8
%86 = phi i32 [ 0, %83 ], [ %10, %8 ]
ret i32 %86
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @is_valid_irq(i32 noundef) local_unnamed_addr #1
declare i32 @bin2bcd(i8 noundef zeroext) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @cmos_irq_disable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CMOS_WRITE(i8 noundef zeroext, i64 noundef) local_unnamed_addr #1
declare i32 @hpet_set_alarm_time(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @cmos_irq_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"cmos_rtc", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !11, i64 8}
!14 = !{!"rtc_wkalrm", !8, i64 0, !15, i64 8}
!15 = !{!"TYPE_2__", !11, i64 0, !9, i64 4, !9, i64 5, !9, i64 6, !9, i64 7}
!16 = !{!14, !9, i64 12}
!17 = !{!14, !9, i64 13}
!18 = !{!14, !9, i64 14}
!19 = !{!14, !9, i64 15}
!20 = !{!8, !8, i64 0}
!21 = !{!7, !8, i64 8}
!22 = !{!7, !8, i64 0}
!23 = !{!14, !8, i64 0}
| fastsocket_kernel_drivers_rtc_extr_rtc-cmos.c_cmos_set_alarm |
; ModuleID = 'AnghaBench/freebsd/contrib/dialog/extr_util.c_real_auto_size.c'
source_filename = "AnghaBench/freebsd/contrib/dialog/extr_util.c_real_auto_size.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i64 }
%struct.TYPE_4__ = type { double, i32, i32 }
@dialog_vars = dso_local local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 8
@SLINES = dso_local local_unnamed_addr global i32 0, align 4
@dialog_state = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@SCOLS = dso_local local_unnamed_addr global i32 0, align 4
@MARGIN = dso_local local_unnamed_addr global i32 0, align 4
@SHADOW_COLS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @real_auto_size], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @real_auto_size(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) #0 {
%7 = load i64, ptr getelementptr inbounds (%struct.TYPE_3__, ptr @dialog_vars, i64 0, i32 2), align 8, !tbaa !5
%8 = icmp eq i64 %7, 0
%9 = load i32, ptr @dialog_vars, align 8
%10 = select i1 %8, i32 2, i32 %9
%11 = load i32, ptr getelementptr inbounds (%struct.TYPE_3__, ptr @dialog_vars, i64 0, i32 1), align 4
%12 = select i1 %8, i32 1, i32 %11
%13 = icmp eq ptr %0, null
br i1 %13, label %16, label %14
14: ; preds = %6
%15 = tail call i32 @dlg_count_columns(ptr noundef nonnull %0) #3
br label %16
16: ; preds = %6, %14
%17 = phi i32 [ %15, %14 ], [ 0, %6 ]
%18 = load i32, ptr %2, align 4, !tbaa !11
%19 = load i32, ptr %3, align 4, !tbaa !11
%20 = icmp eq ptr %1, null
br i1 %20, label %21, label %31
21: ; preds = %16
%22 = icmp eq i32 %18, 0
br i1 %22, label %23, label %25
23: ; preds = %21
store i32 -1, ptr %2, align 4, !tbaa !11
%24 = load i32, ptr %3, align 4, !tbaa !11
br label %25
25: ; preds = %23, %21
%26 = phi i32 [ -1, %23 ], [ %18, %21 ]
%27 = phi i32 [ %24, %23 ], [ %19, %21 ]
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %31
29: ; preds = %25
store i32 -1, ptr %3, align 4, !tbaa !11
%30 = load i32, ptr %2, align 4, !tbaa !11
br label %31
31: ; preds = %29, %25, %16
%32 = phi i32 [ %18, %16 ], [ %30, %29 ], [ %26, %25 ]
%33 = phi i32 [ %19, %16 ], [ -1, %29 ], [ %27, %25 ]
%34 = icmp slt i32 %32, 0
%35 = icmp slt i32 %33, 0
%36 = icmp sgt i32 %32, 0
%37 = load i32, ptr @SLINES, align 4
%38 = sub nsw i32 %37, %12
%39 = select i1 %36, i32 %32, i32 %38
%40 = icmp slt i32 %33, 1
br i1 %40, label %41, label %62
41: ; preds = %31
br i1 %20, label %58, label %42
42: ; preds = %41
%43 = tail call i32 @MAX(i32 noundef %17, i32 noundef %5) #3
%44 = tail call i64 @strchr(ptr noundef nonnull %1, i8 noundef signext 10) #3
%45 = icmp eq i64 %44, 0
br i1 %45, label %46, label %56
46: ; preds = %42
%47 = load double, ptr @dialog_state, align 8, !tbaa !12
%48 = tail call double @dlg_count_real_columns(ptr noundef nonnull %1) #3
%49 = fmul double %47, %48
%50 = tail call double @sqrt(double noundef %49) #3
%51 = fptosi double %50 to i32
%52 = tail call i32 @MAX(i32 noundef %43, i32 noundef %51) #3
%53 = tail call i32 @longest_word(ptr noundef nonnull %1) #3
%54 = tail call i32 @MAX(i32 noundef %52, i32 noundef %53) #3
%55 = tail call i32 @justify_text(ptr noundef null, ptr noundef nonnull %1, i32 noundef %39, i32 noundef %54, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
br label %62
56: ; preds = %42
%57 = tail call i32 @auto_size_preformatted(ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
br label %62
58: ; preds = %41
%59 = load i32, ptr @SCOLS, align 4, !tbaa !11
%60 = sub nsw i32 %59, %10
%61 = tail call i32 @justify_text(ptr noundef null, ptr noundef null, i32 noundef %39, i32 noundef %60, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
br label %62
62: ; preds = %58, %56, %46, %31
%63 = load i32, ptr %3, align 4, !tbaa !11
%64 = icmp slt i32 %63, %17
br i1 %64, label %65, label %67
65: ; preds = %62
%66 = tail call i32 @justify_text(ptr noundef null, ptr noundef %1, i32 noundef %39, i32 noundef %17, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
store i32 %17, ptr %3, align 4, !tbaa !11
br label %67
67: ; preds = %65, %62
%68 = load i32, ptr %2, align 4, !tbaa !11
store i32 %68, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @dialog_state, i64 0, i32 1), align 8, !tbaa !15
%69 = load i32, ptr %3, align 4, !tbaa !11
store i32 %69, ptr getelementptr inbounds (%struct.TYPE_4__, ptr @dialog_state, i64 0, i32 2), align 4, !tbaa !16
%70 = icmp slt i32 %69, %5
%71 = icmp eq i32 %19, 0
%72 = select i1 %70, i1 %71, i1 false
br i1 %72, label %73, label %74
73: ; preds = %67
store i32 %5, ptr %3, align 4, !tbaa !11
br label %74
74: ; preds = %73, %67
%75 = phi i32 [ %5, %73 ], [ %69, %67 ]
br i1 %20, label %88, label %76
76: ; preds = %74
%77 = load i32, ptr @MARGIN, align 4, !tbaa !11
%78 = shl nsw i32 %77, 1
%79 = load i64, ptr @SHADOW_COLS, align 8, !tbaa !17
%80 = trunc i64 %79 to i32
%81 = add i32 %78, %80
%82 = add i32 %81, %75
store i32 %82, ptr %3, align 4, !tbaa !11
%83 = load i32, ptr @MARGIN, align 4, !tbaa !11
%84 = shl nsw i32 %83, 1
%85 = add nsw i32 %84, %4
%86 = load i32, ptr %2, align 4, !tbaa !11
%87 = add nsw i32 %85, %86
store i32 %87, ptr %2, align 4, !tbaa !11
br label %88
88: ; preds = %76, %74
%89 = icmp sgt i32 %18, 0
br i1 %89, label %90, label %91
90: ; preds = %88
store i32 %18, ptr %2, align 4, !tbaa !11
br label %91
91: ; preds = %90, %88
%92 = icmp sgt i32 %19, 0
br i1 %92, label %93, label %94
93: ; preds = %91
store i32 %19, ptr %3, align 4, !tbaa !11
br label %94
94: ; preds = %93, %91
br i1 %34, label %95, label %102
95: ; preds = %94
%96 = load i32, ptr @SLINES, align 4, !tbaa !11
%97 = load i64, ptr getelementptr inbounds (%struct.TYPE_3__, ptr @dialog_vars, i64 0, i32 2), align 8, !tbaa !5
%98 = icmp eq i64 %97, 0
%99 = load i32, ptr getelementptr inbounds (%struct.TYPE_3__, ptr @dialog_vars, i64 0, i32 1), align 4
%100 = select i1 %98, i32 0, i32 %99
%101 = sub nsw i32 %96, %100
store i32 %101, ptr %2, align 4, !tbaa !11
br label %102
102: ; preds = %95, %94
br i1 %35, label %103, label %110
103: ; preds = %102
%104 = load i32, ptr @SCOLS, align 4, !tbaa !11
%105 = load i64, ptr getelementptr inbounds (%struct.TYPE_3__, ptr @dialog_vars, i64 0, i32 2), align 8, !tbaa !5
%106 = icmp eq i64 %105, 0
%107 = load i32, ptr @dialog_vars, align 8
%108 = select i1 %106, i32 0, i32 %107
%109 = sub nsw i32 %104, %108
store i32 %109, ptr %3, align 4, !tbaa !11
br label %110
110: ; preds = %103, %102
ret void
}
declare i32 @dlg_count_columns(ptr noundef) local_unnamed_addr #1
declare i32 @MAX(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @strchr(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare double @dlg_count_real_columns(ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @sqrt(double noundef) local_unnamed_addr #2
declare i32 @longest_word(ptr noundef) local_unnamed_addr #1
declare i32 @justify_text(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @auto_size_preformatted(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0, !7, i64 8, !7, i64 12}
!14 = !{!"double", !8, i64 0}
!15 = !{!13, !7, i64 8}
!16 = !{!13, !7, i64 12}
!17 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/dialog/extr_util.c_real_auto_size.c'
source_filename = "AnghaBench/freebsd/contrib/dialog/extr_util.c_real_auto_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32, i32, i64 }
%struct.TYPE_4__ = type { double, i32, i32 }
@dialog_vars = common local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 8
@SLINES = common local_unnamed_addr global i32 0, align 4
@dialog_state = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@SCOLS = common local_unnamed_addr global i32 0, align 4
@MARGIN = common local_unnamed_addr global i32 0, align 4
@SHADOW_COLS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @real_auto_size], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @real_auto_size(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) #0 {
%7 = load i64, ptr getelementptr inbounds (i8, ptr @dialog_vars, i64 8), align 8, !tbaa !6
%8 = icmp eq i64 %7, 0
%9 = load i32, ptr @dialog_vars, align 8
%10 = select i1 %8, i32 2, i32 %9
%11 = load i32, ptr getelementptr inbounds (i8, ptr @dialog_vars, i64 4), align 4
%12 = select i1 %8, i32 1, i32 %11
%13 = icmp eq ptr %0, null
br i1 %13, label %16, label %14
14: ; preds = %6
%15 = tail call i32 @dlg_count_columns(ptr noundef nonnull %0) #3
br label %16
16: ; preds = %6, %14
%17 = phi i32 [ %15, %14 ], [ 0, %6 ]
%18 = load i32, ptr %2, align 4, !tbaa !12
%19 = load i32, ptr %3, align 4, !tbaa !12
%20 = icmp eq ptr %1, null
br i1 %20, label %21, label %31
21: ; preds = %16
%22 = icmp eq i32 %18, 0
br i1 %22, label %23, label %25
23: ; preds = %21
store i32 -1, ptr %2, align 4, !tbaa !12
%24 = load i32, ptr %3, align 4, !tbaa !12
br label %25
25: ; preds = %23, %21
%26 = phi i32 [ -1, %23 ], [ %18, %21 ]
%27 = phi i32 [ %24, %23 ], [ %19, %21 ]
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %31
29: ; preds = %25
store i32 -1, ptr %3, align 4, !tbaa !12
%30 = load i32, ptr %2, align 4, !tbaa !12
br label %31
31: ; preds = %29, %25, %16
%32 = phi i32 [ %18, %16 ], [ %30, %29 ], [ %26, %25 ]
%33 = phi i32 [ %19, %16 ], [ -1, %29 ], [ %27, %25 ]
%34 = icmp slt i32 %32, 0
%35 = icmp slt i32 %33, 0
%36 = icmp sgt i32 %32, 0
%37 = load i32, ptr @SLINES, align 4
%38 = sub nsw i32 %37, %12
%39 = select i1 %36, i32 %32, i32 %38
%40 = icmp slt i32 %33, 1
br i1 %40, label %41, label %62
41: ; preds = %31
br i1 %20, label %58, label %42
42: ; preds = %41
%43 = tail call i32 @MAX(i32 noundef %17, i32 noundef %5) #3
%44 = tail call i64 @strchr(ptr noundef nonnull %1, i8 noundef signext 10) #3
%45 = icmp eq i64 %44, 0
br i1 %45, label %46, label %56
46: ; preds = %42
%47 = load double, ptr @dialog_state, align 8, !tbaa !13
%48 = tail call double @dlg_count_real_columns(ptr noundef nonnull %1) #3
%49 = fmul double %47, %48
%50 = tail call double @llvm.sqrt.f64(double %49)
%51 = fptosi double %50 to i32
%52 = tail call i32 @MAX(i32 noundef %43, i32 noundef %51) #3
%53 = tail call i32 @longest_word(ptr noundef nonnull %1) #3
%54 = tail call i32 @MAX(i32 noundef %52, i32 noundef %53) #3
%55 = tail call i32 @justify_text(ptr noundef null, ptr noundef nonnull %1, i32 noundef %39, i32 noundef %54, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
br label %62
56: ; preds = %42
%57 = tail call i32 @auto_size_preformatted(ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
br label %62
58: ; preds = %41
%59 = load i32, ptr @SCOLS, align 4, !tbaa !12
%60 = sub nsw i32 %59, %10
%61 = tail call i32 @justify_text(ptr noundef null, ptr noundef null, i32 noundef %39, i32 noundef %60, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
br label %62
62: ; preds = %58, %56, %46, %31
%63 = load i32, ptr %3, align 4, !tbaa !12
%64 = icmp slt i32 %63, %17
br i1 %64, label %65, label %67
65: ; preds = %62
%66 = tail call i32 @justify_text(ptr noundef null, ptr noundef %1, i32 noundef %39, i32 noundef %17, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
store i32 %17, ptr %3, align 4, !tbaa !12
br label %67
67: ; preds = %65, %62
%68 = load i32, ptr %2, align 4, !tbaa !12
store i32 %68, ptr getelementptr inbounds (i8, ptr @dialog_state, i64 8), align 8, !tbaa !16
%69 = load i32, ptr %3, align 4, !tbaa !12
store i32 %69, ptr getelementptr inbounds (i8, ptr @dialog_state, i64 12), align 4, !tbaa !17
%70 = icmp slt i32 %69, %5
%71 = icmp eq i32 %19, 0
%72 = select i1 %70, i1 %71, i1 false
br i1 %72, label %73, label %74
73: ; preds = %67
store i32 %5, ptr %3, align 4, !tbaa !12
br label %74
74: ; preds = %73, %67
%75 = phi i32 [ %5, %73 ], [ %69, %67 ]
br i1 %20, label %88, label %76
76: ; preds = %74
%77 = load i32, ptr @MARGIN, align 4, !tbaa !12
%78 = shl nsw i32 %77, 1
%79 = load i64, ptr @SHADOW_COLS, align 8, !tbaa !18
%80 = trunc i64 %79 to i32
%81 = add i32 %78, %80
%82 = add i32 %81, %75
store i32 %82, ptr %3, align 4, !tbaa !12
%83 = load i32, ptr @MARGIN, align 4, !tbaa !12
%84 = shl nsw i32 %83, 1
%85 = add nsw i32 %84, %4
%86 = load i32, ptr %2, align 4, !tbaa !12
%87 = add nsw i32 %85, %86
store i32 %87, ptr %2, align 4, !tbaa !12
br label %88
88: ; preds = %76, %74
%89 = icmp sgt i32 %18, 0
br i1 %89, label %90, label %91
90: ; preds = %88
store i32 %18, ptr %2, align 4, !tbaa !12
br label %91
91: ; preds = %90, %88
%92 = icmp sgt i32 %19, 0
br i1 %92, label %93, label %94
93: ; preds = %91
store i32 %19, ptr %3, align 4, !tbaa !12
br label %94
94: ; preds = %93, %91
br i1 %34, label %95, label %102
95: ; preds = %94
%96 = load i32, ptr @SLINES, align 4, !tbaa !12
%97 = load i64, ptr getelementptr inbounds (i8, ptr @dialog_vars, i64 8), align 8, !tbaa !6
%98 = icmp eq i64 %97, 0
%99 = load i32, ptr getelementptr inbounds (i8, ptr @dialog_vars, i64 4), align 4
%100 = select i1 %98, i32 0, i32 %99
%101 = sub nsw i32 %96, %100
store i32 %101, ptr %2, align 4, !tbaa !12
br label %102
102: ; preds = %95, %94
br i1 %35, label %103, label %110
103: ; preds = %102
%104 = load i32, ptr @SCOLS, align 4, !tbaa !12
%105 = load i64, ptr getelementptr inbounds (i8, ptr @dialog_vars, i64 8), align 8, !tbaa !6
%106 = icmp eq i64 %105, 0
%107 = load i32, ptr @dialog_vars, align 8
%108 = select i1 %106, i32 0, i32 %107
%109 = sub nsw i32 %104, %108
store i32 %109, ptr %3, align 4, !tbaa !12
br label %110
110: ; preds = %103, %102
ret void
}
declare i32 @dlg_count_columns(ptr noundef) local_unnamed_addr #1
declare i32 @MAX(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @strchr(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare double @dlg_count_real_columns(ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.sqrt.f64(double) #2
declare i32 @longest_word(ptr noundef) local_unnamed_addr #1
declare i32 @justify_text(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @auto_size_preformatted(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0, !8, i64 8, !8, i64 12}
!15 = !{!"double", !9, i64 0}
!16 = !{!14, !8, i64 8}
!17 = !{!14, !8, i64 12}
!18 = !{!11, !11, i64 0}
| freebsd_contrib_dialog_extr_util.c_real_auto_size |
; ModuleID = 'AnghaBench/linux/drivers/clk/qcom/extr_clk-rpm.c_clk_rpm_fixed_prepare.c'
source_filename = "AnghaBench/linux/drivers/clk/qcom/extr_clk-rpm.c_clk_rpm_fixed_prepare.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.clk_rpm = type { i32, i32, i32 }
@QCOM_RPM_ACTIVE_STATE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @clk_rpm_fixed_prepare], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @clk_rpm_fixed_prepare(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = tail call ptr @to_clk_rpm(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 1, ptr %2, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.clk_rpm, ptr %3, i64 0, i32 2
%5 = load i32, ptr %4, align 4, !tbaa !9
%6 = load i32, ptr @QCOM_RPM_ACTIVE_STATE, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.clk_rpm, ptr %3, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = call i32 @qcom_rpm_write(i32 noundef %5, i32 noundef %6, i32 noundef %8, ptr noundef nonnull %2, i32 noundef 1) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 1, ptr %3, align 4, !tbaa !12
br label %12
12: ; preds = %11, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %9
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_clk_rpm(ptr noundef) local_unnamed_addr #2
declare i32 @qcom_rpm_write(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"clk_rpm", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!10, !6, i64 4}
!12 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/clk/qcom/extr_clk-rpm.c_clk_rpm_fixed_prepare.c'
source_filename = "AnghaBench/linux/drivers/clk/qcom/extr_clk-rpm.c_clk_rpm_fixed_prepare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@QCOM_RPM_ACTIVE_STATE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @clk_rpm_fixed_prepare], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @clk_rpm_fixed_prepare(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = tail call ptr @to_clk_rpm(ptr noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 1, ptr %2, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = load i32, ptr @QCOM_RPM_ACTIVE_STATE, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %3, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = call i32 @qcom_rpm_write(i32 noundef %5, i32 noundef %6, i32 noundef %8, ptr noundef nonnull %2, i32 noundef 1) #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 1, ptr %3, align 4, !tbaa !13
br label %12
12: ; preds = %11, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %9
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_clk_rpm(ptr noundef) local_unnamed_addr #2
declare i32 @qcom_rpm_write(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"clk_rpm", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!11, !7, i64 4}
!13 = !{!11, !7, i64 0}
| linux_drivers_clk_qcom_extr_clk-rpm.c_clk_rpm_fixed_prepare |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wl1251/extr_init.c_wl1251_hw_init_pta.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wl1251/extr_init.c_wl1251_hw_init_pta.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @wl1251_hw_init_pta(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @wl1251_acx_sg_enable(ptr noundef %0) #3
%3 = icmp slt i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @wl1251_acx_sg_cfg(ptr noundef %0) #3
%6 = tail call i32 @llvm.smin.i32(i32 %5, i32 0)
br label %7
7: ; preds = %4, %1
%8 = phi i32 [ %2, %1 ], [ %6, %4 ]
ret i32 %8
}
declare i32 @wl1251_acx_sg_enable(ptr noundef) local_unnamed_addr #1
declare i32 @wl1251_acx_sg_cfg(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wl1251/extr_init.c_wl1251_hw_init_pta.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ti/wl1251/extr_init.c_wl1251_hw_init_pta.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483648, 1) i32 @wl1251_hw_init_pta(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @wl1251_acx_sg_enable(ptr noundef %0) #3
%3 = icmp slt i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @wl1251_acx_sg_cfg(ptr noundef %0) #3
%6 = tail call i32 @llvm.smin.i32(i32 %5, i32 0)
br label %7
7: ; preds = %4, %1
%8 = phi i32 [ %2, %1 ], [ %6, %4 ]
ret i32 %8
}
declare i32 @wl1251_acx_sg_enable(ptr noundef) local_unnamed_addr #1
declare i32 @wl1251_acx_sg_cfg(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_net_wireless_ti_wl1251_extr_init.c_wl1251_hw_init_pta |
; ModuleID = 'AnghaBench/linux/drivers/opp/extr_core.c_dev_pm_opp_put_prop_name.c'
source_filename = "AnghaBench/linux/drivers/opp/extr_core.c_dev_pm_opp_put_prop_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.opp_table = type { ptr, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @dev_pm_opp_put_prop_name(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.opp_table, ptr %0, i64 0, i32 1
%3 = tail call i32 @list_empty(ptr noundef nonnull %2) #2
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @WARN_ON(i32 noundef %5) #2
%7 = load ptr, ptr %0, align 8, !tbaa !5
%8 = tail call i32 @kfree(ptr noundef %7) #2
store ptr null, ptr %0, align 8, !tbaa !5
%9 = tail call i32 @dev_pm_opp_put_opp_table(ptr noundef nonnull %0) #2
ret void
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @dev_pm_opp_put_opp_table(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"opp_table", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/opp/extr_core.c_dev_pm_opp_put_prop_name.c'
source_filename = "AnghaBench/linux/drivers/opp/extr_core.c_dev_pm_opp_put_prop_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @dev_pm_opp_put_prop_name(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = tail call i32 @list_empty(ptr noundef nonnull %2) #2
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @WARN_ON(i32 noundef %5) #2
%7 = load ptr, ptr %0, align 8, !tbaa !6
%8 = tail call i32 @kfree(ptr noundef %7) #2
store ptr null, ptr %0, align 8, !tbaa !6
%9 = tail call i32 @dev_pm_opp_put_opp_table(ptr noundef nonnull %0) #2
ret void
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare i32 @dev_pm_opp_put_opp_table(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"opp_table", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
| linux_drivers_opp_extr_core.c_dev_pm_opp_put_prop_name |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.h_algorithm_valid_raid6.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.h_algorithm_valid_raid6.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @algorithm_valid_raid6], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @algorithm_valid_raid6(i32 noundef %0) #0 {
%2 = icmp ult i32 %0, 6
%3 = add i32 %0, -8
%4 = icmp ult i32 %3, 3
%5 = or i1 %2, %4
%6 = add i32 %0, -16
%7 = icmp ult i32 %6, 5
%8 = or i1 %7, %5
%9 = zext i1 %8 to i32
ret i32 %9
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.h_algorithm_valid_raid6.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/md/extr_raid5.h_algorithm_valid_raid6.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @algorithm_valid_raid6], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 0, 2) i32 @algorithm_valid_raid6(i32 noundef %0) #0 {
%2 = icmp ult i32 %0, 6
%3 = add i32 %0, -8
%4 = icmp ult i32 %3, 3
%5 = or i1 %2, %4
%6 = add i32 %0, -16
%7 = icmp ult i32 %6, 5
%8 = or i1 %7, %5
%9 = zext i1 %8 to i32
ret i32 %9
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_md_extr_raid5.h_algorithm_valid_raid6 |
; ModuleID = 'AnghaBench/radare2/libr/anal/extr_..includesdbsdbht.h_sdbkv_value_len.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_..includesdbsdbht.h_sdbkv_value_len.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sdbkv_value_len], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @sdbkv_value_len(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/radare2/libr/anal/extr_..includesdbsdbht.h_sdbkv_value_len.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_..includesdbsdbht.h_sdbkv_value_len.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sdbkv_value_len], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @sdbkv_value_len(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| radare2_libr_anal_extr_..includesdbsdbht.h_sdbkv_value_len |
; ModuleID = 'AnghaBench/linux/sound/firewire/bebob/extr_bebob_stream.c_snd_bebob_stream_get_rate.c'
source_filename = "AnghaBench/linux/sound/firewire/bebob/extr_bebob_stream.c_snd_bebob_stream_get_rate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AVC_GENERAL_PLUG_DIR_OUT = dso_local local_unnamed_addr global i32 0, align 4
@EAGAIN = dso_local local_unnamed_addr global i32 0, align 4
@AVC_GENERAL_PLUG_DIR_IN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @snd_bebob_stream_get_rate(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
br label %5
5: ; preds = %5, %2
%6 = phi i32 [ 0, %2 ], [ %13, %5 ]
%7 = load i32, ptr %0, align 4, !tbaa !5
%8 = load i32, ptr @AVC_GENERAL_PLUG_DIR_OUT, align 4, !tbaa !10
%9 = call i32 @avc_general_get_sig_fmt(i32 noundef %7, ptr noundef nonnull %3, i32 noundef %8, i32 noundef 0) #3
%10 = load i32, ptr @EAGAIN, align 4, !tbaa !10
%11 = sub nsw i32 0, %10
%12 = icmp eq i32 %9, %11
%13 = add nuw nsw i32 %6, 1
%14 = icmp ult i32 %6, 2
%15 = select i1 %12, i1 %14, i1 false
br i1 %15, label %5, label %16, !llvm.loop !11
16: ; preds = %5
%17 = icmp slt i32 %9, 0
br i1 %17, label %39, label %18
18: ; preds = %16, %18
%19 = phi i32 [ %26, %18 ], [ 0, %16 ]
%20 = load i32, ptr %0, align 4, !tbaa !5
%21 = load i32, ptr @AVC_GENERAL_PLUG_DIR_IN, align 4, !tbaa !10
%22 = call i32 @avc_general_get_sig_fmt(i32 noundef %20, ptr noundef nonnull %4, i32 noundef %21, i32 noundef 0) #3
%23 = load i32, ptr @EAGAIN, align 4, !tbaa !10
%24 = sub nsw i32 0, %23
%25 = icmp eq i32 %22, %24
%26 = add nuw nsw i32 %19, 1
%27 = icmp ult i32 %19, 2
%28 = select i1 %25, i1 %27, i1 false
br i1 %28, label %18, label %29, !llvm.loop !13
29: ; preds = %18
%30 = icmp slt i32 %22, 0
br i1 %30, label %39, label %31
31: ; preds = %29
%32 = load i32, ptr %4, align 4, !tbaa !10
store i32 %32, ptr %1, align 4, !tbaa !10
%33 = load i32, ptr %3, align 4, !tbaa !10
%34 = icmp eq i32 %32, %33
br i1 %34, label %39, label %35
35: ; preds = %31
%36 = load i32, ptr %0, align 4, !tbaa !5
%37 = load i32, ptr @AVC_GENERAL_PLUG_DIR_IN, align 4, !tbaa !10
%38 = call i32 @avc_general_set_sig_fmt(i32 noundef %36, i32 noundef %32, i32 noundef %37, i32 noundef 0) #3
br label %39
39: ; preds = %31, %29, %16, %35
%40 = phi i32 [ %9, %16 ], [ %22, %29 ], [ %22, %31 ], [ %38, %35 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %40
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @avc_general_get_sig_fmt(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @avc_general_set_sig_fmt(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_bebob", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
| ; ModuleID = 'AnghaBench/linux/sound/firewire/bebob/extr_bebob_stream.c_snd_bebob_stream_get_rate.c'
source_filename = "AnghaBench/linux/sound/firewire/bebob/extr_bebob_stream.c_snd_bebob_stream_get_rate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AVC_GENERAL_PLUG_DIR_OUT = common local_unnamed_addr global i32 0, align 4
@EAGAIN = common local_unnamed_addr global i32 0, align 4
@AVC_GENERAL_PLUG_DIR_IN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @snd_bebob_stream_get_rate(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = load i32, ptr @AVC_GENERAL_PLUG_DIR_OUT, align 4, !tbaa !11
%7 = call i32 @avc_general_get_sig_fmt(i32 noundef %5, ptr noundef nonnull %3, i32 noundef %6, i32 noundef 0) #3
%8 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
%10 = icmp eq i32 %7, %9
br i1 %10, label %11, label %22, !llvm.loop !12
11: ; preds = %2
%12 = load i32, ptr %0, align 4, !tbaa !6
%13 = load i32, ptr @AVC_GENERAL_PLUG_DIR_OUT, align 4, !tbaa !11
%14 = call i32 @avc_general_get_sig_fmt(i32 noundef %12, ptr noundef nonnull %3, i32 noundef %13, i32 noundef 0) #3
%15 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%16 = sub nsw i32 0, %15
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %22, !llvm.loop !12
18: ; preds = %11
%19 = load i32, ptr %0, align 4, !tbaa !6
%20 = load i32, ptr @AVC_GENERAL_PLUG_DIR_OUT, align 4, !tbaa !11
%21 = call i32 @avc_general_get_sig_fmt(i32 noundef %19, ptr noundef nonnull %3, i32 noundef %20, i32 noundef 0) #3
br label %22
22: ; preds = %18, %11, %2
%23 = phi i32 [ %7, %2 ], [ %14, %11 ], [ %21, %18 ]
%24 = icmp slt i32 %23, 0
br i1 %24, label %54, label %25
25: ; preds = %22
%26 = load i32, ptr %0, align 4, !tbaa !6
%27 = load i32, ptr @AVC_GENERAL_PLUG_DIR_IN, align 4, !tbaa !11
%28 = call i32 @avc_general_get_sig_fmt(i32 noundef %26, ptr noundef nonnull %4, i32 noundef %27, i32 noundef 0) #3
%29 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%30 = sub nsw i32 0, %29
%31 = icmp eq i32 %28, %30
br i1 %31, label %32, label %43, !llvm.loop !14
32: ; preds = %25
%33 = load i32, ptr %0, align 4, !tbaa !6
%34 = load i32, ptr @AVC_GENERAL_PLUG_DIR_IN, align 4, !tbaa !11
%35 = call i32 @avc_general_get_sig_fmt(i32 noundef %33, ptr noundef nonnull %4, i32 noundef %34, i32 noundef 0) #3
%36 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%37 = sub nsw i32 0, %36
%38 = icmp eq i32 %35, %37
br i1 %38, label %39, label %43, !llvm.loop !14
39: ; preds = %32
%40 = load i32, ptr %0, align 4, !tbaa !6
%41 = load i32, ptr @AVC_GENERAL_PLUG_DIR_IN, align 4, !tbaa !11
%42 = call i32 @avc_general_get_sig_fmt(i32 noundef %40, ptr noundef nonnull %4, i32 noundef %41, i32 noundef 0) #3
br label %43
43: ; preds = %39, %32, %25
%44 = phi i32 [ %28, %25 ], [ %35, %32 ], [ %42, %39 ]
%45 = icmp slt i32 %44, 0
br i1 %45, label %54, label %46
46: ; preds = %43
%47 = load i32, ptr %4, align 4, !tbaa !11
store i32 %47, ptr %1, align 4, !tbaa !11
%48 = load i32, ptr %3, align 4, !tbaa !11
%49 = icmp eq i32 %47, %48
br i1 %49, label %54, label %50
50: ; preds = %46
%51 = load i32, ptr %0, align 4, !tbaa !6
%52 = load i32, ptr @AVC_GENERAL_PLUG_DIR_IN, align 4, !tbaa !11
%53 = call i32 @avc_general_set_sig_fmt(i32 noundef %51, i32 noundef %47, i32 noundef %52, i32 noundef 0) #3
br label %54
54: ; preds = %46, %43, %22, %50
%55 = phi i32 [ %23, %22 ], [ %44, %43 ], [ %44, %46 ], [ %53, %50 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %55
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @avc_general_get_sig_fmt(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @avc_general_set_sig_fmt(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_bebob", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
| linux_sound_firewire_bebob_extr_bebob_stream.c_snd_bebob_stream_get_rate |
; ModuleID = 'AnghaBench/linux/fs/proc/extr_base.c_proc_exe_link.c'
source_filename = "AnghaBench/linux/fs/proc/extr_base.c_proc_exe_link.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @proc_exe_link], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @proc_exe_link(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = tail call i32 @d_inode(ptr noundef %0) #2
%4 = tail call ptr @get_proc_task(i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, ptr @ENOENT, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %20
9: ; preds = %2
%10 = tail call ptr @get_task_exe_file(ptr noundef nonnull %4) #2
%11 = tail call i32 @put_task_struct(ptr noundef nonnull %4) #2
%12 = icmp eq ptr %10, null
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = load i32, ptr %10, align 4, !tbaa !5
store i32 %14, ptr %1, align 4, !tbaa !5
%15 = tail call i32 @path_get(ptr noundef nonnull %10) #2
%16 = tail call i32 @fput(ptr noundef nonnull %10) #2
br label %20
17: ; preds = %9
%18 = load i32, ptr @ENOENT, align 4, !tbaa !5
%19 = sub nsw i32 0, %18
br label %20
20: ; preds = %17, %13, %6
%21 = phi i32 [ 0, %13 ], [ %19, %17 ], [ %8, %6 ]
ret i32 %21
}
declare ptr @get_proc_task(i32 noundef) local_unnamed_addr #1
declare i32 @d_inode(ptr noundef) local_unnamed_addr #1
declare ptr @get_task_exe_file(ptr noundef) local_unnamed_addr #1
declare i32 @put_task_struct(ptr noundef) local_unnamed_addr #1
declare i32 @path_get(ptr noundef) local_unnamed_addr #1
declare i32 @fput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/proc/extr_base.c_proc_exe_link.c'
source_filename = "AnghaBench/linux/fs/proc/extr_base.c_proc_exe_link.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOENT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @proc_exe_link], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @proc_exe_link(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = tail call i32 @d_inode(ptr noundef %0) #2
%4 = tail call ptr @get_proc_task(i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, ptr @ENOENT, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %20
9: ; preds = %2
%10 = tail call ptr @get_task_exe_file(ptr noundef nonnull %4) #2
%11 = tail call i32 @put_task_struct(ptr noundef nonnull %4) #2
%12 = icmp eq ptr %10, null
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = load i32, ptr %10, align 4, !tbaa !6
store i32 %14, ptr %1, align 4, !tbaa !6
%15 = tail call i32 @path_get(ptr noundef nonnull %10) #2
%16 = tail call i32 @fput(ptr noundef nonnull %10) #2
br label %20
17: ; preds = %9
%18 = load i32, ptr @ENOENT, align 4, !tbaa !6
%19 = sub nsw i32 0, %18
br label %20
20: ; preds = %17, %13, %6
%21 = phi i32 [ 0, %13 ], [ %19, %17 ], [ %8, %6 ]
ret i32 %21
}
declare ptr @get_proc_task(i32 noundef) local_unnamed_addr #1
declare i32 @d_inode(ptr noundef) local_unnamed_addr #1
declare ptr @get_task_exe_file(ptr noundef) local_unnamed_addr #1
declare i32 @put_task_struct(ptr noundef) local_unnamed_addr #1
declare i32 @path_get(ptr noundef) local_unnamed_addr #1
declare i32 @fput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_fs_proc_extr_base.c_proc_exe_link |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/tegra-cec/extr_tegra_cec.c_tegra_cec_adap_enable.c'
source_filename = "AnghaBench/linux/drivers/media/platform/tegra-cec/extr_tegra_cec.c_tegra_cec_adap_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TEGRA_CEC_HW_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_STAT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_SW_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INPUT_FILTER = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIMING_0 = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MAX_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MIN_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MAX_DURATION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MIN_DURATION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIMING_1 = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_SAMPLE_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_DURATION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_MIN_DURATION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIMING_2 = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM2_END_OF_BLOCK_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIMING_0 = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_START_BIT_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_START_BIT_DURATION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_BUS_XITION_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_BUS_ERROR_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIMING_1 = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_LO_DATA_BIT_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_HI_DATA_BIT_LO_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_DATA_BIT_DURATION_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_ACK_NAK_BIT_SAMPLE_TIME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIMING_2 = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_ADDITIONAL_FRAME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_NEW_FRAME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_RETRY_FRAME_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_REGISTER_UNDERRUN = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_FRAME_OR_BLOCK_NAKD = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_ARBITRATION_FAILED = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_BUS_ANOMALY_DETECTED = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_FRAME_TRANSMITTED = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_RX_REGISTER_FULL = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_RX_START_BIT_DETECTED = dso_local local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_HWCTRL_TX_RX_MODE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tegra_cec_adap_enable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @tegra_cec_adap_enable(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %3, i8 0, i64 24, i1 false)
%4 = load i32, ptr @TEGRA_CEC_HW_CONTROL, align 4, !tbaa !10
%5 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %4, i32 noundef 0) #3
%6 = load i32, ptr @TEGRA_CEC_INT_MASK, align 4, !tbaa !10
%7 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %6, i32 noundef 0) #3
%8 = load i32, ptr @TEGRA_CEC_INT_STAT, align 4, !tbaa !10
%9 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %8, i32 noundef -1) #3
%10 = load i32, ptr @TEGRA_CEC_SW_CONTROL, align 4, !tbaa !10
%11 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %10, i32 noundef 0) #3
%12 = icmp eq i32 %1, 0
br i1 %12, label %100, label %13
13: ; preds = %2
%14 = load i32, ptr @TEGRA_CEC_INPUT_FILTER, align 4, !tbaa !10
%15 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %14, i32 noundef -2147483616) #3
%16 = load i32, ptr @TEGRA_CEC_RX_TIMING_0, align 4, !tbaa !10
%17 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MAX_LO_TIME_SHIFT, align 4, !tbaa !10
%18 = shl i32 122, %17
%19 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MIN_LO_TIME_SHIFT, align 4, !tbaa !10
%20 = shl i32 109, %19
%21 = or i32 %20, %18
%22 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MAX_DURATION_SHIFT, align 4, !tbaa !10
%23 = shl i32 147, %22
%24 = or i32 %21, %23
%25 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MIN_DURATION_SHIFT, align 4, !tbaa !10
%26 = shl i32 134, %25
%27 = or i32 %24, %26
%28 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %16, i32 noundef %27) #3
%29 = load i32, ptr @TEGRA_CEC_RX_TIMING_1, align 4, !tbaa !10
%30 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_LO_TIME_SHIFT, align 4, !tbaa !10
%31 = shl i32 53, %30
%32 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_SAMPLE_TIME_SHIFT, align 4, !tbaa !10
%33 = shl i32 33, %32
%34 = or i32 %33, %31
%35 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_DURATION_SHIFT, align 4, !tbaa !10
%36 = shl i32 86, %35
%37 = or i32 %34, %36
%38 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_MIN_DURATION_SHIFT, align 4, !tbaa !10
%39 = shl i32 64, %38
%40 = or i32 %37, %39
%41 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %29, i32 noundef %40) #3
%42 = load i32, ptr @TEGRA_CEC_RX_TIMING_2, align 4, !tbaa !10
%43 = load i32, ptr @TEGRA_CEC_RX_TIM2_END_OF_BLOCK_TIME_SHIFT, align 4, !tbaa !10
%44 = shl i32 80, %43
%45 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %42, i32 noundef %44) #3
%46 = load i32, ptr @TEGRA_CEC_TX_TIMING_0, align 4, !tbaa !10
%47 = load i32, ptr @TEGRA_CEC_TX_TIM0_START_BIT_LO_TIME_SHIFT, align 4, !tbaa !10
%48 = shl i32 116, %47
%49 = load i32, ptr @TEGRA_CEC_TX_TIM0_START_BIT_DURATION_SHIFT, align 4, !tbaa !10
%50 = shl i32 141, %49
%51 = or i32 %50, %48
%52 = load i32, ptr @TEGRA_CEC_TX_TIM0_BUS_XITION_TIME_SHIFT, align 4, !tbaa !10
%53 = shl i32 8, %52
%54 = or i32 %51, %53
%55 = load i32, ptr @TEGRA_CEC_TX_TIM0_BUS_ERROR_LO_TIME_SHIFT, align 4, !tbaa !10
%56 = shl i32 113, %55
%57 = or i32 %54, %56
%58 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %46, i32 noundef %57) #3
%59 = load i32, ptr @TEGRA_CEC_TX_TIMING_1, align 4, !tbaa !10
%60 = load i32, ptr @TEGRA_CEC_TX_TIM1_LO_DATA_BIT_LO_TIME_SHIFT, align 4, !tbaa !10
%61 = shl i32 47, %60
%62 = load i32, ptr @TEGRA_CEC_TX_TIM1_HI_DATA_BIT_LO_TIME_SHIFT, align 4, !tbaa !10
%63 = shl i32 19, %62
%64 = or i32 %63, %61
%65 = load i32, ptr @TEGRA_CEC_TX_TIM1_DATA_BIT_DURATION_SHIFT, align 4, !tbaa !10
%66 = shl i32 75, %65
%67 = or i32 %64, %66
%68 = load i32, ptr @TEGRA_CEC_TX_TIM1_ACK_NAK_BIT_SAMPLE_TIME_SHIFT, align 4, !tbaa !10
%69 = shl i32 33, %68
%70 = or i32 %67, %69
%71 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %59, i32 noundef %70) #3
%72 = load i32, ptr @TEGRA_CEC_TX_TIMING_2, align 4, !tbaa !10
%73 = load i32, ptr @TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_ADDITIONAL_FRAME_SHIFT, align 4, !tbaa !10
%74 = shl i32 7, %73
%75 = load i32, ptr @TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_NEW_FRAME_SHIFT, align 4, !tbaa !10
%76 = shl i32 5, %75
%77 = or i32 %76, %74
%78 = load i32, ptr @TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_RETRY_FRAME_SHIFT, align 4, !tbaa !10
%79 = shl i32 3, %78
%80 = or i32 %77, %79
%81 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %72, i32 noundef %80) #3
%82 = load i32, ptr @TEGRA_CEC_INT_MASK, align 4, !tbaa !10
%83 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_REGISTER_UNDERRUN, align 4, !tbaa !10
%84 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_FRAME_OR_BLOCK_NAKD, align 4, !tbaa !10
%85 = or i32 %84, %83
%86 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_ARBITRATION_FAILED, align 4, !tbaa !10
%87 = or i32 %85, %86
%88 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_BUS_ANOMALY_DETECTED, align 4, !tbaa !10
%89 = or i32 %87, %88
%90 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_FRAME_TRANSMITTED, align 4, !tbaa !10
%91 = or i32 %89, %90
%92 = load i32, ptr @TEGRA_CEC_INT_MASK_RX_REGISTER_FULL, align 4, !tbaa !10
%93 = or i32 %91, %92
%94 = load i32, ptr @TEGRA_CEC_INT_MASK_RX_START_BIT_DETECTED, align 4, !tbaa !10
%95 = or i32 %93, %94
%96 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %82, i32 noundef %95) #3
%97 = load i32, ptr @TEGRA_CEC_HW_CONTROL, align 4, !tbaa !10
%98 = load i32, ptr @TEGRA_CEC_HWCTRL_TX_RX_MODE, align 4, !tbaa !10
%99 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %97, i32 noundef %98) #3
br label %100
100: ; preds = %2, %13
ret i32 0
}
declare i32 @cec_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cec_adapter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/tegra-cec/extr_tegra_cec.c_tegra_cec_adap_enable.c'
source_filename = "AnghaBench/linux/drivers/media/platform/tegra-cec/extr_tegra_cec.c_tegra_cec_adap_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TEGRA_CEC_HW_CONTROL = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_STAT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_SW_CONTROL = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INPUT_FILTER = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIMING_0 = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MAX_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MIN_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MAX_DURATION_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM0_START_BIT_MIN_DURATION_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIMING_1 = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_SAMPLE_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_DURATION_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM1_DATA_BIT_MIN_DURATION_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIMING_2 = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_RX_TIM2_END_OF_BLOCK_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIMING_0 = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_START_BIT_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_START_BIT_DURATION_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_BUS_XITION_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM0_BUS_ERROR_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIMING_1 = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_LO_DATA_BIT_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_HI_DATA_BIT_LO_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_DATA_BIT_DURATION_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM1_ACK_NAK_BIT_SAMPLE_TIME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIMING_2 = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_ADDITIONAL_FRAME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_NEW_FRAME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_RETRY_FRAME_SHIFT = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_REGISTER_UNDERRUN = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_FRAME_OR_BLOCK_NAKD = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_ARBITRATION_FAILED = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_BUS_ANOMALY_DETECTED = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_TX_FRAME_TRANSMITTED = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_RX_REGISTER_FULL = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_INT_MASK_RX_START_BIT_DETECTED = common local_unnamed_addr global i32 0, align 4
@TEGRA_CEC_HWCTRL_TX_RX_MODE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tegra_cec_adap_enable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @tegra_cec_adap_enable(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %3, i8 0, i64 24, i1 false)
%4 = load i32, ptr @TEGRA_CEC_HW_CONTROL, align 4, !tbaa !11
%5 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %4, i32 noundef 0) #3
%6 = load i32, ptr @TEGRA_CEC_INT_MASK, align 4, !tbaa !11
%7 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %6, i32 noundef 0) #3
%8 = load i32, ptr @TEGRA_CEC_INT_STAT, align 4, !tbaa !11
%9 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %8, i32 noundef -1) #3
%10 = load i32, ptr @TEGRA_CEC_SW_CONTROL, align 4, !tbaa !11
%11 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %10, i32 noundef 0) #3
%12 = icmp eq i32 %1, 0
br i1 %12, label %100, label %13
13: ; preds = %2
%14 = load i32, ptr @TEGRA_CEC_INPUT_FILTER, align 4, !tbaa !11
%15 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %14, i32 noundef -2147483616) #3
%16 = load i32, ptr @TEGRA_CEC_RX_TIMING_0, align 4, !tbaa !11
%17 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MAX_LO_TIME_SHIFT, align 4, !tbaa !11
%18 = shl i32 122, %17
%19 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MIN_LO_TIME_SHIFT, align 4, !tbaa !11
%20 = shl i32 109, %19
%21 = or i32 %20, %18
%22 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MAX_DURATION_SHIFT, align 4, !tbaa !11
%23 = shl i32 147, %22
%24 = or i32 %21, %23
%25 = load i32, ptr @TEGRA_CEC_RX_TIM0_START_BIT_MIN_DURATION_SHIFT, align 4, !tbaa !11
%26 = shl i32 134, %25
%27 = or i32 %24, %26
%28 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %16, i32 noundef %27) #3
%29 = load i32, ptr @TEGRA_CEC_RX_TIMING_1, align 4, !tbaa !11
%30 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_LO_TIME_SHIFT, align 4, !tbaa !11
%31 = shl i32 53, %30
%32 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_SAMPLE_TIME_SHIFT, align 4, !tbaa !11
%33 = shl i32 33, %32
%34 = or i32 %33, %31
%35 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_MAX_DURATION_SHIFT, align 4, !tbaa !11
%36 = shl i32 86, %35
%37 = or i32 %34, %36
%38 = load i32, ptr @TEGRA_CEC_RX_TIM1_DATA_BIT_MIN_DURATION_SHIFT, align 4, !tbaa !11
%39 = shl i32 64, %38
%40 = or i32 %37, %39
%41 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %29, i32 noundef %40) #3
%42 = load i32, ptr @TEGRA_CEC_RX_TIMING_2, align 4, !tbaa !11
%43 = load i32, ptr @TEGRA_CEC_RX_TIM2_END_OF_BLOCK_TIME_SHIFT, align 4, !tbaa !11
%44 = shl i32 80, %43
%45 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %42, i32 noundef %44) #3
%46 = load i32, ptr @TEGRA_CEC_TX_TIMING_0, align 4, !tbaa !11
%47 = load i32, ptr @TEGRA_CEC_TX_TIM0_START_BIT_LO_TIME_SHIFT, align 4, !tbaa !11
%48 = shl i32 116, %47
%49 = load i32, ptr @TEGRA_CEC_TX_TIM0_START_BIT_DURATION_SHIFT, align 4, !tbaa !11
%50 = shl i32 141, %49
%51 = or i32 %50, %48
%52 = load i32, ptr @TEGRA_CEC_TX_TIM0_BUS_XITION_TIME_SHIFT, align 4, !tbaa !11
%53 = shl i32 8, %52
%54 = or i32 %51, %53
%55 = load i32, ptr @TEGRA_CEC_TX_TIM0_BUS_ERROR_LO_TIME_SHIFT, align 4, !tbaa !11
%56 = shl i32 113, %55
%57 = or i32 %54, %56
%58 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %46, i32 noundef %57) #3
%59 = load i32, ptr @TEGRA_CEC_TX_TIMING_1, align 4, !tbaa !11
%60 = load i32, ptr @TEGRA_CEC_TX_TIM1_LO_DATA_BIT_LO_TIME_SHIFT, align 4, !tbaa !11
%61 = shl i32 47, %60
%62 = load i32, ptr @TEGRA_CEC_TX_TIM1_HI_DATA_BIT_LO_TIME_SHIFT, align 4, !tbaa !11
%63 = shl i32 19, %62
%64 = or i32 %63, %61
%65 = load i32, ptr @TEGRA_CEC_TX_TIM1_DATA_BIT_DURATION_SHIFT, align 4, !tbaa !11
%66 = shl i32 75, %65
%67 = or i32 %64, %66
%68 = load i32, ptr @TEGRA_CEC_TX_TIM1_ACK_NAK_BIT_SAMPLE_TIME_SHIFT, align 4, !tbaa !11
%69 = shl i32 33, %68
%70 = or i32 %67, %69
%71 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %59, i32 noundef %70) #3
%72 = load i32, ptr @TEGRA_CEC_TX_TIMING_2, align 4, !tbaa !11
%73 = load i32, ptr @TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_ADDITIONAL_FRAME_SHIFT, align 4, !tbaa !11
%74 = shl i32 7, %73
%75 = load i32, ptr @TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_NEW_FRAME_SHIFT, align 4, !tbaa !11
%76 = shl i32 5, %75
%77 = or i32 %76, %74
%78 = load i32, ptr @TEGRA_CEC_TX_TIM2_BUS_IDLE_TIME_RETRY_FRAME_SHIFT, align 4, !tbaa !11
%79 = shl i32 3, %78
%80 = or i32 %77, %79
%81 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %72, i32 noundef %80) #3
%82 = load i32, ptr @TEGRA_CEC_INT_MASK, align 4, !tbaa !11
%83 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_REGISTER_UNDERRUN, align 4, !tbaa !11
%84 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_FRAME_OR_BLOCK_NAKD, align 4, !tbaa !11
%85 = or i32 %84, %83
%86 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_ARBITRATION_FAILED, align 4, !tbaa !11
%87 = or i32 %85, %86
%88 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_BUS_ANOMALY_DETECTED, align 4, !tbaa !11
%89 = or i32 %87, %88
%90 = load i32, ptr @TEGRA_CEC_INT_MASK_TX_FRAME_TRANSMITTED, align 4, !tbaa !11
%91 = or i32 %89, %90
%92 = load i32, ptr @TEGRA_CEC_INT_MASK_RX_REGISTER_FULL, align 4, !tbaa !11
%93 = or i32 %91, %92
%94 = load i32, ptr @TEGRA_CEC_INT_MASK_RX_START_BIT_DETECTED, align 4, !tbaa !11
%95 = or i32 %93, %94
%96 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %82, i32 noundef %95) #3
%97 = load i32, ptr @TEGRA_CEC_HW_CONTROL, align 4, !tbaa !11
%98 = load i32, ptr @TEGRA_CEC_HWCTRL_TX_RX_MODE, align 4, !tbaa !11
%99 = tail call i32 @cec_write(ptr noundef nonnull %3, i32 noundef %97, i32 noundef %98) #3
br label %100
100: ; preds = %2, %13
ret i32 0
}
declare i32 @cec_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cec_adapter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| linux_drivers_media_platform_tegra-cec_extr_tegra_cec.c_tegra_cec_adap_enable |
; ModuleID = 'AnghaBench/openvpn/src/openvpn/extr_ssl_verify.c_verify_cert_export_cert.c'
source_filename = "AnghaBench/openvpn/src/openvpn/extr_ssl_verify.c_verify_cert_export_cert.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str.1 = private unnamed_addr constant [4 x i8] c"pcf\00", align 1
@M_NONFATAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [32 x i8] c"Failed to create peer cert file\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"w+\00", align 1
@M_ERRNO = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [34 x i8] c"Failed to open temporary file: %s\00", align 1
@SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@.str.5 = private unnamed_addr constant [46 x i8] c"Error writing PEM file containing certificate\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @verify_cert_export_cert], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @verify_cert_export_cert(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = icmp eq ptr %1, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = tail call ptr @platform_create_temp_file(ptr noundef nonnull %1, ptr noundef nonnull @.str.1, ptr noundef %2) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %5, %3
%9 = load i32, ptr @M_NONFATAL, align 4, !tbaa !5
%10 = tail call i32 (i32, ptr, ...) @msg(i32 noundef %9, ptr noundef nonnull @.str.2) #3
br label %30
11: ; preds = %5
%12 = tail call ptr @fopen(ptr noundef nonnull %6, ptr noundef nonnull @.str.3)
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %19
14: ; preds = %11
%15 = load i32, ptr @M_NONFATAL, align 4, !tbaa !5
%16 = load i32, ptr @M_ERRNO, align 4, !tbaa !5
%17 = or i32 %16, %15
%18 = tail call i32 (i32, ptr, ...) @msg(i32 noundef %17, ptr noundef nonnull @.str.4, ptr noundef nonnull %6) #3
br label %30
19: ; preds = %11
%20 = load i64, ptr @SUCCESS, align 8, !tbaa !9
%21 = tail call i64 @x509_write_pem(ptr noundef nonnull %12, ptr noundef %0) #3
%22 = icmp eq i64 %20, %21
br i1 %22, label %27, label %23
23: ; preds = %19
%24 = load i32, ptr @M_NONFATAL, align 4, !tbaa !5
%25 = tail call i32 (i32, ptr, ...) @msg(i32 noundef %24, ptr noundef nonnull @.str.5) #3
%26 = tail call i32 @platform_unlink(ptr noundef nonnull %6) #3
br label %27
27: ; preds = %23, %19
%28 = phi ptr [ null, %23 ], [ %6, %19 ]
%29 = tail call i32 @fclose(ptr noundef nonnull %12)
br label %30
30: ; preds = %27, %14, %8
%31 = phi ptr [ %28, %27 ], [ null, %14 ], [ null, %8 ]
ret ptr %31
}
declare ptr @platform_create_temp_file(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @msg(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i64 @x509_write_pem(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @platform_unlink(ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/openvpn/src/openvpn/extr_ssl_verify.c_verify_cert_export_cert.c'
source_filename = "AnghaBench/openvpn/src/openvpn/extr_ssl_verify.c_verify_cert_export_cert.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str.1 = private unnamed_addr constant [4 x i8] c"pcf\00", align 1
@M_NONFATAL = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [32 x i8] c"Failed to create peer cert file\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"w+\00", align 1
@M_ERRNO = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [34 x i8] c"Failed to open temporary file: %s\00", align 1
@SUCCESS = common local_unnamed_addr global i64 0, align 8
@.str.5 = private unnamed_addr constant [46 x i8] c"Error writing PEM file containing certificate\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @verify_cert_export_cert], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @verify_cert_export_cert(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = icmp eq ptr %1, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = tail call ptr @platform_create_temp_file(ptr noundef nonnull %1, ptr noundef nonnull @.str.1, ptr noundef %2) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %5, %3
%9 = load i32, ptr @M_NONFATAL, align 4, !tbaa !6
%10 = tail call i32 (i32, ptr, ...) @msg(i32 noundef %9, ptr noundef nonnull @.str.2) #3
br label %30
11: ; preds = %5
%12 = tail call ptr @fopen(ptr noundef nonnull %6, ptr noundef nonnull @.str.3)
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %19
14: ; preds = %11
%15 = load i32, ptr @M_NONFATAL, align 4, !tbaa !6
%16 = load i32, ptr @M_ERRNO, align 4, !tbaa !6
%17 = or i32 %16, %15
%18 = tail call i32 (i32, ptr, ...) @msg(i32 noundef %17, ptr noundef nonnull @.str.4, ptr noundef nonnull %6) #3
br label %30
19: ; preds = %11
%20 = load i64, ptr @SUCCESS, align 8, !tbaa !10
%21 = tail call i64 @x509_write_pem(ptr noundef nonnull %12, ptr noundef %0) #3
%22 = icmp eq i64 %20, %21
br i1 %22, label %27, label %23
23: ; preds = %19
%24 = load i32, ptr @M_NONFATAL, align 4, !tbaa !6
%25 = tail call i32 (i32, ptr, ...) @msg(i32 noundef %24, ptr noundef nonnull @.str.5) #3
%26 = tail call i32 @platform_unlink(ptr noundef nonnull %6) #3
br label %27
27: ; preds = %23, %19
%28 = phi ptr [ null, %23 ], [ %6, %19 ]
%29 = tail call i32 @fclose(ptr noundef nonnull %12)
br label %30
30: ; preds = %27, %14, %8
%31 = phi ptr [ %28, %27 ], [ null, %14 ], [ null, %8 ]
ret ptr %31
}
declare ptr @platform_create_temp_file(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @msg(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i64 @x509_write_pem(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @platform_unlink(ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| openvpn_src_openvpn_extr_ssl_verify.c_verify_cert_export_cert |
; ModuleID = 'AnghaBench/kphp-kdb/search/extr_search-data.c_postprocess_res.c'
source_filename = "AnghaBench/kphp-kdb/search/extr_search-data.c_postprocess_res.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@Q_hash_group_mode = dso_local local_unnamed_addr global i64 0, align 8
@Q_type = dso_local local_unnamed_addr global i64 0, align 8
@MAX_RATES = dso_local local_unnamed_addr global i64 0, align 8
@Q_order = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_ENTRY_SORT_SEARCH = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_PRIORITY_SORT_SEARCH = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_REVERSE_SEARCH = dso_local local_unnamed_addr global i32 0, align 4
@R_cnt = dso_local local_unnamed_addr global i32 0, align 4
@R = dso_local local_unnamed_addr global ptr null, align 8
@R_tot = dso_local local_unnamed_addr global i32 0, align 4
@Q_limit = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @postprocess_res], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @postprocess_res() #0 {
%1 = load i64, ptr @Q_hash_group_mode, align 8, !tbaa !5
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @postprocess_res_group_mode() #2
br label %72
5: ; preds = %0
%6 = load i64, ptr @Q_type, align 8, !tbaa !5
%7 = load i64, ptr @MAX_RATES, align 8, !tbaa !5
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %67
9: ; preds = %5
%10 = load i32, ptr @Q_order, align 4, !tbaa !9
%11 = load i32, ptr @FLAG_ENTRY_SORT_SEARCH, align 4, !tbaa !9
%12 = load i32, ptr @FLAG_PRIORITY_SORT_SEARCH, align 4, !tbaa !9
%13 = or i32 %12, %11
%14 = and i32 %13, %10
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %67
16: ; preds = %9
%17 = load i32, ptr @FLAG_REVERSE_SEARCH, align 4, !tbaa !9
%18 = and i32 %17, %10
%19 = icmp eq i32 %18, 0
br i1 %19, label %72, label %20
20: ; preds = %16
%21 = load i32, ptr @R_cnt, align 4, !tbaa !9
%22 = add i32 %21, -1
%23 = icmp sgt i32 %22, 0
br i1 %23, label %24, label %41
24: ; preds = %20
%25 = zext nneg i32 %22 to i64
br label %26
26: ; preds = %24, %26
%27 = phi i64 [ 0, %24 ], [ %36, %26 ]
%28 = phi i64 [ %25, %24 ], [ %37, %26 ]
%29 = load ptr, ptr @R, align 8, !tbaa !11
%30 = getelementptr inbounds ptr, ptr %29, i64 %28
%31 = load ptr, ptr %30, align 8, !tbaa !11
%32 = getelementptr inbounds ptr, ptr %29, i64 %27
%33 = load ptr, ptr %32, align 8, !tbaa !11
store ptr %33, ptr %30, align 8, !tbaa !11
%34 = load ptr, ptr @R, align 8, !tbaa !11
%35 = getelementptr inbounds ptr, ptr %34, i64 %27
store ptr %31, ptr %35, align 8, !tbaa !11
%36 = add nuw nsw i64 %27, 1
%37 = add nsw i64 %28, -1
%38 = shl i64 %37, 32
%39 = ashr exact i64 %38, 32
%40 = icmp slt i64 %36, %39
br i1 %40, label %26, label %41, !llvm.loop !13
41: ; preds = %26, %20
%42 = load i32, ptr @R_tot, align 4, !tbaa !9
%43 = load i32, ptr @Q_limit, align 4, !tbaa !9
%44 = icmp slt i32 %42, %43
br i1 %44, label %72, label %45
45: ; preds = %41
%46 = add i32 %43, -1
%47 = icmp slt i32 %21, %46
br i1 %47, label %48, label %66
48: ; preds = %45
%49 = sext i32 %46 to i64
%50 = sext i32 %21 to i64
br label %51
51: ; preds = %48, %51
%52 = phi i64 [ %50, %48 ], [ %61, %51 ]
%53 = phi i64 [ %49, %48 ], [ %62, %51 ]
%54 = load ptr, ptr @R, align 8, !tbaa !11
%55 = getelementptr inbounds ptr, ptr %54, i64 %53
%56 = load ptr, ptr %55, align 8, !tbaa !11
%57 = getelementptr inbounds ptr, ptr %54, i64 %52
%58 = load ptr, ptr %57, align 8, !tbaa !11
store ptr %58, ptr %55, align 8, !tbaa !11
%59 = load ptr, ptr @R, align 8, !tbaa !11
%60 = getelementptr inbounds ptr, ptr %59, i64 %52
store ptr %56, ptr %60, align 8, !tbaa !11
%61 = add nsw i64 %52, 1
%62 = add nsw i64 %53, -1
%63 = shl i64 %62, 32
%64 = ashr exact i64 %63, 32
%65 = icmp slt i64 %61, %64
br i1 %65, label %51, label %66, !llvm.loop !15
66: ; preds = %51, %45
store i32 %43, ptr @R_cnt, align 4, !tbaa !9
br label %72
67: ; preds = %9, %5
%68 = load i32, ptr @R_cnt, align 4, !tbaa !9
%69 = icmp eq i32 %68, 0
br i1 %69, label %72, label %70
70: ; preds = %67
%71 = tail call i32 (...) @heap_sort_res() #2
br label %72
72: ; preds = %70, %41, %66, %16, %67, %3
ret void
}
declare i32 @postprocess_res_group_mode(...) local_unnamed_addr #1
declare i32 @heap_sort_res(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
| ; ModuleID = 'AnghaBench/kphp-kdb/search/extr_search-data.c_postprocess_res.c'
source_filename = "AnghaBench/kphp-kdb/search/extr_search-data.c_postprocess_res.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@Q_hash_group_mode = common local_unnamed_addr global i64 0, align 8
@Q_type = common local_unnamed_addr global i64 0, align 8
@MAX_RATES = common local_unnamed_addr global i64 0, align 8
@Q_order = common local_unnamed_addr global i32 0, align 4
@FLAG_ENTRY_SORT_SEARCH = common local_unnamed_addr global i32 0, align 4
@FLAG_PRIORITY_SORT_SEARCH = common local_unnamed_addr global i32 0, align 4
@FLAG_REVERSE_SEARCH = common local_unnamed_addr global i32 0, align 4
@R_cnt = common local_unnamed_addr global i32 0, align 4
@R = common local_unnamed_addr global ptr null, align 8
@R_tot = common local_unnamed_addr global i32 0, align 4
@Q_limit = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @postprocess_res], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @postprocess_res() #0 {
%1 = load i64, ptr @Q_hash_group_mode, align 8, !tbaa !6
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @postprocess_res_group_mode() #2
br label %72
5: ; preds = %0
%6 = load i64, ptr @Q_type, align 8, !tbaa !6
%7 = load i64, ptr @MAX_RATES, align 8, !tbaa !6
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %67
9: ; preds = %5
%10 = load i32, ptr @Q_order, align 4, !tbaa !10
%11 = load i32, ptr @FLAG_ENTRY_SORT_SEARCH, align 4, !tbaa !10
%12 = load i32, ptr @FLAG_PRIORITY_SORT_SEARCH, align 4, !tbaa !10
%13 = or i32 %12, %11
%14 = and i32 %13, %10
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %67
16: ; preds = %9
%17 = load i32, ptr @FLAG_REVERSE_SEARCH, align 4, !tbaa !10
%18 = and i32 %17, %10
%19 = icmp eq i32 %18, 0
br i1 %19, label %72, label %20
20: ; preds = %16
%21 = load i32, ptr @R_cnt, align 4, !tbaa !10
%22 = add i32 %21, -1
%23 = icmp sgt i32 %22, 0
br i1 %23, label %24, label %41
24: ; preds = %20
%25 = zext nneg i32 %22 to i64
br label %26
26: ; preds = %24, %26
%27 = phi i64 [ 0, %24 ], [ %36, %26 ]
%28 = phi i64 [ %25, %24 ], [ %37, %26 ]
%29 = load ptr, ptr @R, align 8, !tbaa !12
%30 = getelementptr inbounds ptr, ptr %29, i64 %28
%31 = load ptr, ptr %30, align 8, !tbaa !12
%32 = getelementptr inbounds ptr, ptr %29, i64 %27
%33 = load ptr, ptr %32, align 8, !tbaa !12
store ptr %33, ptr %30, align 8, !tbaa !12
%34 = load ptr, ptr @R, align 8, !tbaa !12
%35 = getelementptr inbounds ptr, ptr %34, i64 %27
store ptr %31, ptr %35, align 8, !tbaa !12
%36 = add nuw nsw i64 %27, 1
%37 = add nsw i64 %28, -1
%38 = shl i64 %37, 32
%39 = ashr exact i64 %38, 32
%40 = icmp slt i64 %36, %39
br i1 %40, label %26, label %41, !llvm.loop !14
41: ; preds = %26, %20
%42 = load i32, ptr @R_tot, align 4, !tbaa !10
%43 = load i32, ptr @Q_limit, align 4, !tbaa !10
%44 = icmp slt i32 %42, %43
br i1 %44, label %72, label %45
45: ; preds = %41
%46 = add i32 %43, -1
%47 = icmp slt i32 %21, %46
br i1 %47, label %48, label %66
48: ; preds = %45
%49 = sext i32 %46 to i64
%50 = sext i32 %21 to i64
br label %51
51: ; preds = %48, %51
%52 = phi i64 [ %50, %48 ], [ %61, %51 ]
%53 = phi i64 [ %49, %48 ], [ %62, %51 ]
%54 = load ptr, ptr @R, align 8, !tbaa !12
%55 = getelementptr inbounds ptr, ptr %54, i64 %53
%56 = load ptr, ptr %55, align 8, !tbaa !12
%57 = getelementptr inbounds ptr, ptr %54, i64 %52
%58 = load ptr, ptr %57, align 8, !tbaa !12
store ptr %58, ptr %55, align 8, !tbaa !12
%59 = load ptr, ptr @R, align 8, !tbaa !12
%60 = getelementptr inbounds ptr, ptr %59, i64 %52
store ptr %56, ptr %60, align 8, !tbaa !12
%61 = add nsw i64 %52, 1
%62 = add nsw i64 %53, -1
%63 = shl i64 %62, 32
%64 = ashr exact i64 %63, 32
%65 = icmp slt i64 %61, %64
br i1 %65, label %51, label %66, !llvm.loop !16
66: ; preds = %51, %45
store i32 %43, ptr @R_cnt, align 4, !tbaa !10
br label %72
67: ; preds = %9, %5
%68 = load i32, ptr @R_cnt, align 4, !tbaa !10
%69 = icmp eq i32 %68, 0
br i1 %69, label %72, label %70
70: ; preds = %67
%71 = tail call i32 @heap_sort_res() #2
br label %72
72: ; preds = %70, %41, %66, %16, %67, %3
ret void
}
declare i32 @postprocess_res_group_mode(...) local_unnamed_addr #1
declare i32 @heap_sort_res(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
| kphp-kdb_search_extr_search-data.c_postprocess_res |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/os-Linux/skas/extr_process.c_is_skas_winch.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/um/os-Linux/skas/extr_process.c_is_skas_winch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @is_skas_winch(i32 noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 (...) @getpgrp() #2
%5 = icmp eq i32 %4, %0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @register_winch_irq(i32 noundef -1, i32 noundef %1, i32 noundef -1, ptr noundef %2, i32 noundef 0) #2
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ 1, %6 ], [ 0, %3 ]
ret i32 %9
}
declare i32 @getpgrp(...) local_unnamed_addr #1
declare i32 @register_winch_irq(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/os-Linux/skas/extr_process.c_is_skas_winch.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/um/os-Linux/skas/extr_process.c_is_skas_winch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @is_skas_winch(i32 noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @getpgrp() #2
%5 = icmp eq i32 %4, %0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @register_winch_irq(i32 noundef -1, i32 noundef %1, i32 noundef -1, ptr noundef %2, i32 noundef 0) #2
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ 1, %6 ], [ 0, %3 ]
ret i32 %9
}
declare i32 @getpgrp(...) local_unnamed_addr #1
declare i32 @register_winch_irq(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_um_os-Linux_skas_extr_process.c_is_skas_winch |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_btc_dpm.c_btc_mg_clock_gating_enable.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_btc_dpm.c_btc_mg_clock_gating_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CHIP_BARTS = dso_local local_unnamed_addr global i64 0, align 8
@barts_mgcg_enable = dso_local global i32 0, align 4
@BARTS_MGCG_ENABLE_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@CHIP_TURKS = dso_local local_unnamed_addr global i64 0, align 8
@turks_mgcg_enable = dso_local global i32 0, align 4
@TURKS_MGCG_ENABLE_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@CHIP_CAICOS = dso_local local_unnamed_addr global i64 0, align 8
@caicos_mgcg_enable = dso_local global i32 0, align 4
@CAICOS_MGCG_ENABLE_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@barts_mgcg_disable = dso_local local_unnamed_addr global ptr null, align 8
@BARTS_MGCG_DISABLE_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@turks_mgcg_disable = dso_local local_unnamed_addr global ptr null, align 8
@TURKS_MGCG_DISABLE_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@caicos_mgcg_disable = dso_local local_unnamed_addr global ptr null, align 8
@CAICOS_MGCG_DISABLE_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @btc_mg_clock_gating_enable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @btc_mg_clock_gating_enable(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 0
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = load i64, ptr @CHIP_BARTS, align 8, !tbaa !10
%6 = icmp eq i64 %4, %5
br i1 %3, label %14, label %7
7: ; preds = %2
br i1 %6, label %27, label %8
8: ; preds = %7
%9 = load i64, ptr @CHIP_TURKS, align 8, !tbaa !10
%10 = icmp eq i64 %4, %9
br i1 %10, label %27, label %11
11: ; preds = %8
%12 = load i64, ptr @CHIP_CAICOS, align 8, !tbaa !10
%13 = icmp eq i64 %4, %12
br i1 %13, label %27, label %32
14: ; preds = %2
br i1 %6, label %15, label %17
15: ; preds = %14
%16 = load ptr, ptr @barts_mgcg_disable, align 8, !tbaa !11
br label %27
17: ; preds = %14
%18 = load i64, ptr @CHIP_TURKS, align 8, !tbaa !10
%19 = icmp eq i64 %4, %18
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = load ptr, ptr @turks_mgcg_disable, align 8, !tbaa !11
br label %27
22: ; preds = %17
%23 = load i64, ptr @CHIP_CAICOS, align 8, !tbaa !10
%24 = icmp eq i64 %4, %23
br i1 %24, label %25, label %32
25: ; preds = %22
%26 = load ptr, ptr @caicos_mgcg_disable, align 8, !tbaa !11
br label %27
27: ; preds = %11, %8, %7, %15, %25, %20
%28 = phi ptr [ @BARTS_MGCG_DISABLE_LENGTH, %15 ], [ @TURKS_MGCG_DISABLE_LENGTH, %20 ], [ @CAICOS_MGCG_DISABLE_LENGTH, %25 ], [ @BARTS_MGCG_ENABLE_LENGTH, %7 ], [ @TURKS_MGCG_ENABLE_LENGTH, %8 ], [ @CAICOS_MGCG_ENABLE_LENGTH, %11 ]
%29 = phi ptr [ %16, %15 ], [ %21, %20 ], [ %26, %25 ], [ @barts_mgcg_enable, %7 ], [ @turks_mgcg_enable, %8 ], [ @caicos_mgcg_enable, %11 ]
%30 = load i32, ptr %28, align 4, !tbaa !13
%31 = tail call i32 @btc_program_mgcg_hw_sequence(ptr noundef nonnull %0, ptr noundef %29, i32 noundef %30) #2
br label %32
32: ; preds = %22, %11, %27
ret void
}
declare i32 @btc_program_mgcg_hw_sequence(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"radeon_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_btc_dpm.c_btc_mg_clock_gating_enable.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_btc_dpm.c_btc_mg_clock_gating_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CHIP_BARTS = common local_unnamed_addr global i64 0, align 8
@barts_mgcg_enable = common global i32 0, align 4
@BARTS_MGCG_ENABLE_LENGTH = common local_unnamed_addr global i32 0, align 4
@CHIP_TURKS = common local_unnamed_addr global i64 0, align 8
@turks_mgcg_enable = common global i32 0, align 4
@TURKS_MGCG_ENABLE_LENGTH = common local_unnamed_addr global i32 0, align 4
@CHIP_CAICOS = common local_unnamed_addr global i64 0, align 8
@caicos_mgcg_enable = common global i32 0, align 4
@CAICOS_MGCG_ENABLE_LENGTH = common local_unnamed_addr global i32 0, align 4
@barts_mgcg_disable = common local_unnamed_addr global ptr null, align 8
@BARTS_MGCG_DISABLE_LENGTH = common local_unnamed_addr global i32 0, align 4
@turks_mgcg_disable = common local_unnamed_addr global ptr null, align 8
@TURKS_MGCG_DISABLE_LENGTH = common local_unnamed_addr global i32 0, align 4
@caicos_mgcg_disable = common local_unnamed_addr global ptr null, align 8
@CAICOS_MGCG_DISABLE_LENGTH = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @btc_mg_clock_gating_enable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @btc_mg_clock_gating_enable(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 0
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = load i64, ptr @CHIP_BARTS, align 8, !tbaa !11
%6 = icmp eq i64 %4, %5
br i1 %3, label %14, label %7
7: ; preds = %2
br i1 %6, label %27, label %8
8: ; preds = %7
%9 = load i64, ptr @CHIP_TURKS, align 8, !tbaa !11
%10 = icmp eq i64 %4, %9
br i1 %10, label %27, label %11
11: ; preds = %8
%12 = load i64, ptr @CHIP_CAICOS, align 8, !tbaa !11
%13 = icmp eq i64 %4, %12
br i1 %13, label %27, label %32
14: ; preds = %2
br i1 %6, label %15, label %17
15: ; preds = %14
%16 = load ptr, ptr @barts_mgcg_disable, align 8, !tbaa !12
br label %27
17: ; preds = %14
%18 = load i64, ptr @CHIP_TURKS, align 8, !tbaa !11
%19 = icmp eq i64 %4, %18
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = load ptr, ptr @turks_mgcg_disable, align 8, !tbaa !12
br label %27
22: ; preds = %17
%23 = load i64, ptr @CHIP_CAICOS, align 8, !tbaa !11
%24 = icmp eq i64 %4, %23
br i1 %24, label %25, label %32
25: ; preds = %22
%26 = load ptr, ptr @caicos_mgcg_disable, align 8, !tbaa !12
br label %27
27: ; preds = %11, %8, %7, %15, %25, %20
%28 = phi ptr [ @BARTS_MGCG_DISABLE_LENGTH, %15 ], [ @TURKS_MGCG_DISABLE_LENGTH, %20 ], [ @CAICOS_MGCG_DISABLE_LENGTH, %25 ], [ @BARTS_MGCG_ENABLE_LENGTH, %7 ], [ @TURKS_MGCG_ENABLE_LENGTH, %8 ], [ @CAICOS_MGCG_ENABLE_LENGTH, %11 ]
%29 = phi ptr [ %16, %15 ], [ %21, %20 ], [ %26, %25 ], [ @barts_mgcg_enable, %7 ], [ @turks_mgcg_enable, %8 ], [ @caicos_mgcg_enable, %11 ]
%30 = load i32, ptr %28, align 4, !tbaa !14
%31 = tail call i32 @btc_program_mgcg_hw_sequence(ptr noundef nonnull %0, ptr noundef %29, i32 noundef %30) #2
br label %32
32: ; preds = %22, %11, %27
ret void
}
declare i32 @btc_program_mgcg_hw_sequence(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"radeon_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
| linux_drivers_gpu_drm_radeon_extr_btc_dpm.c_btc_mg_clock_gating_enable |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/atheros/atlx/extr_atl2.c_TxdFreeBytes.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/atheros/atlx/extr_atl2.c_TxdFreeBytes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.atl2_adapter = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @TxdFreeBytes], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @TxdFreeBytes(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.atl2_adapter, ptr %0, i64 0, i32 2
%3 = tail call i32 @atomic_read(ptr noundef nonnull %2) #2
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = icmp slt i32 %4, %3
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.atl2_adapter, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !10
%9 = xor i32 %4, -1
%10 = add i32 %3, %9
%11 = add i32 %10, %8
br label %15
12: ; preds = %1
%13 = xor i32 %4, -1
%14 = add i32 %3, %13
br label %15
15: ; preds = %12, %6
%16 = phi i32 [ %11, %6 ], [ %14, %12 ]
ret i32 %16
}
declare i32 @atomic_read(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"atl2_adapter", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/atheros/atlx/extr_atl2.c_TxdFreeBytes.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/atheros/atlx/extr_atl2.c_TxdFreeBytes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @TxdFreeBytes], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 -2147483648, 2147483647) i32 @TxdFreeBytes(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = tail call i32 @atomic_read(ptr noundef nonnull %2) #2
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = icmp slt i32 %4, %3
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = xor i32 %4, -1
%10 = add i32 %3, %9
%11 = add i32 %10, %8
br label %15
12: ; preds = %1
%13 = xor i32 %4, -1
%14 = add i32 %3, %13
br label %15
15: ; preds = %12, %6
%16 = phi i32 [ %11, %6 ], [ %14, %12 ]
ret i32 %16
}
declare i32 @atomic_read(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"atl2_adapter", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| linux_drivers_net_ethernet_atheros_atlx_extr_atl2.c_TxdFreeBytes |
; ModuleID = 'AnghaBench/linux/sound/soc/sof/extr_control.c_snd_sof_volume_put.c'
source_filename = "AnghaBench/linux/sound/soc/sof/extr_control.c_snd_sof_volume_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.soc_mixer_control = type { i64, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { ptr }
%struct.snd_sof_control = type { i32, i32, ptr, ptr }
%struct.TYPE_8__ = type { i64, i32 }
%struct.snd_sof_dev = type { i32, i32 }
@SOF_IPC_COMP_SET_VALUE = dso_local local_unnamed_addr global i32 0, align 4
@SOF_CTRL_TYPE_VALUE_CHAN_GET = dso_local local_unnamed_addr global i32 0, align 4
@SOF_CTRL_CMD_VOLUME = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @snd_sof_volume_put(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = inttoptr i64 %3 to ptr
%5 = getelementptr inbounds %struct.soc_mixer_control, ptr %4, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = getelementptr inbounds %struct.snd_sof_control, ptr %6, i64 0, i32 3
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = getelementptr inbounds %struct.snd_sof_control, ptr %6, i64 0, i32 2
%10 = load ptr, ptr %9, align 8, !tbaa !17
%11 = load i32, ptr %6, align 8, !tbaa !18
%12 = icmp eq i32 %11, 0
br i1 %12, label %40, label %13
13: ; preds = %2
%14 = getelementptr inbounds %struct.snd_sof_control, ptr %6, i64 0, i32 1
%15 = zext i32 %11 to i64
br label %16
16: ; preds = %13, %32
%17 = phi i64 [ 0, %13 ], [ %38, %32 ]
%18 = phi i32 [ 0, %13 ], [ %34, %32 ]
%19 = load ptr, ptr %1, align 8, !tbaa !19
%20 = getelementptr inbounds i32, ptr %19, i64 %17
%21 = load i32, ptr %20, align 4, !tbaa !23
%22 = load i32, ptr %14, align 4, !tbaa !24
%23 = load i64, ptr %4, align 8, !tbaa !25
%24 = add nsw i64 %23, 1
%25 = tail call i64 @mixer_to_ipc(i32 noundef %21, i32 noundef %22, i64 noundef %24) #2
%26 = icmp eq i32 %18, 0
%27 = load ptr, ptr %10, align 8, !tbaa !26
br i1 %26, label %28, label %32
28: ; preds = %16
%29 = getelementptr inbounds %struct.TYPE_8__, ptr %27, i64 %17
%30 = load i64, ptr %29, align 8, !tbaa !28
%31 = icmp ne i64 %25, %30
br label %32
32: ; preds = %28, %16
%33 = phi i1 [ true, %16 ], [ %31, %28 ]
%34 = zext i1 %33 to i32
%35 = getelementptr inbounds %struct.TYPE_8__, ptr %27, i64 %17, i32 1
%36 = trunc i64 %17 to i32
store i32 %36, ptr %35, align 8, !tbaa !30
%37 = getelementptr inbounds %struct.TYPE_8__, ptr %27, i64 %17
store i64 %25, ptr %37, align 8, !tbaa !28
%38 = add nuw nsw i64 %17, 1
%39 = icmp eq i64 %38, %15
br i1 %39, label %40, label %16, !llvm.loop !31
40: ; preds = %32, %2
%41 = phi i32 [ 0, %2 ], [ %34, %32 ]
%42 = getelementptr inbounds %struct.snd_sof_dev, ptr %8, i64 0, i32 1
%43 = load i32, ptr %42, align 4, !tbaa !33
%44 = tail call i64 @pm_runtime_active(i32 noundef %43) #2
%45 = icmp eq i64 %44, 0
br i1 %45, label %52, label %46
46: ; preds = %40
%47 = load i32, ptr %8, align 4, !tbaa !35
%48 = load i32, ptr @SOF_IPC_COMP_SET_VALUE, align 4, !tbaa !23
%49 = load i32, ptr @SOF_CTRL_TYPE_VALUE_CHAN_GET, align 4, !tbaa !23
%50 = load i32, ptr @SOF_CTRL_CMD_VOLUME, align 4, !tbaa !23
%51 = tail call i32 @snd_sof_ipc_set_get_comp_data(i32 noundef %47, ptr noundef nonnull %6, i32 noundef %48, i32 noundef %49, i32 noundef %50, i32 noundef 1) #2
br label %52
52: ; preds = %46, %40
ret i32 %41
}
declare i64 @mixer_to_ipc(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @pm_runtime_active(i32 noundef) local_unnamed_addr #1
declare i32 @snd_sof_ipc_set_get_comp_data(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_kcontrol", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"soc_mixer_control", !7, i64 0, !12, i64 8}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 16}
!15 = !{!"snd_sof_control", !16, i64 0, !16, i64 4, !13, i64 8, !13, i64 16}
!16 = !{!"int", !8, i64 0}
!17 = !{!15, !13, i64 8}
!18 = !{!15, !16, i64 0}
!19 = !{!20, !13, i64 0}
!20 = !{!"snd_ctl_elem_value", !21, i64 0}
!21 = !{!"TYPE_7__", !22, i64 0}
!22 = !{!"TYPE_6__", !13, i64 0}
!23 = !{!16, !16, i64 0}
!24 = !{!15, !16, i64 4}
!25 = !{!11, !7, i64 0}
!26 = !{!27, !13, i64 0}
!27 = !{!"sof_ipc_ctrl_data", !13, i64 0}
!28 = !{!29, !7, i64 0}
!29 = !{!"TYPE_8__", !7, i64 0, !16, i64 8}
!30 = !{!29, !16, i64 8}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = !{!34, !16, i64 4}
!34 = !{!"snd_sof_dev", !16, i64 0, !16, i64 4}
!35 = !{!34, !16, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/sof/extr_control.c_snd_sof_volume_put.c'
source_filename = "AnghaBench/linux/sound/soc/sof/extr_control.c_snd_sof_volume_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_8__ = type { i64, i32 }
@SOF_IPC_COMP_SET_VALUE = common local_unnamed_addr global i32 0, align 4
@SOF_CTRL_TYPE_VALUE_CHAN_GET = common local_unnamed_addr global i32 0, align 4
@SOF_CTRL_CMD_VOLUME = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @snd_sof_volume_put(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = inttoptr i64 %3 to ptr
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = getelementptr inbounds i8, ptr %6, i64 16
%8 = load ptr, ptr %7, align 8, !tbaa !15
%9 = getelementptr inbounds i8, ptr %6, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !18
%11 = load i32, ptr %6, align 8, !tbaa !19
%12 = icmp eq i32 %11, 0
br i1 %12, label %40, label %13
13: ; preds = %2
%14 = getelementptr inbounds i8, ptr %6, i64 4
%15 = zext i32 %11 to i64
br label %16
16: ; preds = %13, %32
%17 = phi i64 [ 0, %13 ], [ %38, %32 ]
%18 = phi i32 [ 0, %13 ], [ %34, %32 ]
%19 = load ptr, ptr %1, align 8, !tbaa !20
%20 = getelementptr inbounds i32, ptr %19, i64 %17
%21 = load i32, ptr %20, align 4, !tbaa !24
%22 = load i32, ptr %14, align 4, !tbaa !25
%23 = load i64, ptr %4, align 8, !tbaa !26
%24 = add nsw i64 %23, 1
%25 = tail call i64 @mixer_to_ipc(i32 noundef %21, i32 noundef %22, i64 noundef %24) #2
%26 = icmp eq i32 %18, 0
%27 = load ptr, ptr %10, align 8, !tbaa !27
br i1 %26, label %28, label %32
28: ; preds = %16
%29 = getelementptr inbounds %struct.TYPE_8__, ptr %27, i64 %17
%30 = load i64, ptr %29, align 8, !tbaa !29
%31 = icmp ne i64 %25, %30
br label %32
32: ; preds = %28, %16
%33 = phi i1 [ true, %16 ], [ %31, %28 ]
%34 = zext i1 %33 to i32
%35 = getelementptr inbounds %struct.TYPE_8__, ptr %27, i64 %17, i32 1
%36 = trunc nuw i64 %17 to i32
store i32 %36, ptr %35, align 8, !tbaa !31
%37 = getelementptr inbounds %struct.TYPE_8__, ptr %27, i64 %17
store i64 %25, ptr %37, align 8, !tbaa !29
%38 = add nuw nsw i64 %17, 1
%39 = icmp eq i64 %38, %15
br i1 %39, label %40, label %16, !llvm.loop !32
40: ; preds = %32, %2
%41 = phi i32 [ 0, %2 ], [ %34, %32 ]
%42 = getelementptr inbounds i8, ptr %8, i64 4
%43 = load i32, ptr %42, align 4, !tbaa !34
%44 = tail call i64 @pm_runtime_active(i32 noundef %43) #2
%45 = icmp eq i64 %44, 0
br i1 %45, label %52, label %46
46: ; preds = %40
%47 = load i32, ptr %8, align 4, !tbaa !36
%48 = load i32, ptr @SOF_IPC_COMP_SET_VALUE, align 4, !tbaa !24
%49 = load i32, ptr @SOF_CTRL_TYPE_VALUE_CHAN_GET, align 4, !tbaa !24
%50 = load i32, ptr @SOF_CTRL_CMD_VOLUME, align 4, !tbaa !24
%51 = tail call i32 @snd_sof_ipc_set_get_comp_data(i32 noundef %47, ptr noundef nonnull %6, i32 noundef %48, i32 noundef %49, i32 noundef %50, i32 noundef 1) #2
br label %52
52: ; preds = %46, %40
ret i32 %41
}
declare i64 @mixer_to_ipc(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @pm_runtime_active(i32 noundef) local_unnamed_addr #1
declare i32 @snd_sof_ipc_set_get_comp_data(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_kcontrol", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 8}
!12 = !{!"soc_mixer_control", !8, i64 0, !13, i64 8}
!13 = !{!"TYPE_5__", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !14, i64 16}
!16 = !{!"snd_sof_control", !17, i64 0, !17, i64 4, !14, i64 8, !14, i64 16}
!17 = !{!"int", !9, i64 0}
!18 = !{!16, !14, i64 8}
!19 = !{!16, !17, i64 0}
!20 = !{!21, !14, i64 0}
!21 = !{!"snd_ctl_elem_value", !22, i64 0}
!22 = !{!"TYPE_7__", !23, i64 0}
!23 = !{!"TYPE_6__", !14, i64 0}
!24 = !{!17, !17, i64 0}
!25 = !{!16, !17, i64 4}
!26 = !{!12, !8, i64 0}
!27 = !{!28, !14, i64 0}
!28 = !{!"sof_ipc_ctrl_data", !14, i64 0}
!29 = !{!30, !8, i64 0}
!30 = !{!"TYPE_8__", !8, i64 0, !17, i64 8}
!31 = !{!30, !17, i64 8}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = !{!35, !17, i64 4}
!35 = !{!"snd_sof_dev", !17, i64 0, !17, i64 4}
!36 = !{!35, !17, i64 0}
| linux_sound_soc_sof_extr_control.c_snd_sof_volume_put |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/tegra/extr_falcon.c_falcon_execute_method.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/tegra/extr_falcon.c_falcon_execute_method.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FALCON_UCLASS_METHOD_OFFSET = dso_local local_unnamed_addr global i32 0, align 4
@FALCON_UCLASS_METHOD_DATA = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @falcon_execute_method(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = ashr i32 %1, 2
%5 = load i32, ptr @FALCON_UCLASS_METHOD_OFFSET, align 4, !tbaa !5
%6 = tail call i32 @falcon_writel(ptr noundef %0, i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr @FALCON_UCLASS_METHOD_DATA, align 4, !tbaa !5
%8 = tail call i32 @falcon_writel(ptr noundef %0, i32 noundef %2, i32 noundef %7) #2
ret void
}
declare i32 @falcon_writel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/tegra/extr_falcon.c_falcon_execute_method.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/tegra/extr_falcon.c_falcon_execute_method.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALCON_UCLASS_METHOD_OFFSET = common local_unnamed_addr global i32 0, align 4
@FALCON_UCLASS_METHOD_DATA = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @falcon_execute_method(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = ashr i32 %1, 2
%5 = load i32, ptr @FALCON_UCLASS_METHOD_OFFSET, align 4, !tbaa !6
%6 = tail call i32 @falcon_writel(ptr noundef %0, i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr @FALCON_UCLASS_METHOD_DATA, align 4, !tbaa !6
%8 = tail call i32 @falcon_writel(ptr noundef %0, i32 noundef %2, i32 noundef %7) #2
ret void
}
declare i32 @falcon_writel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_tegra_extr_falcon.c_falcon_execute_method |
; ModuleID = 'AnghaBench/linux/fs/nfs/blocklayout/extr_..pnfs.h_pnfs_commit_list.c'
source_filename = "AnghaBench/linux/fs/nfs/blocklayout/extr_..pnfs.h_pnfs_commit_list.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PNFS_NOT_ATTEMPTED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pnfs_commit_list], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @pnfs_commit_list(ptr nocapture readnone %0, ptr nocapture readnone %1, i32 %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @PNFS_NOT_ATTEMPTED, align 4, !tbaa !5
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/nfs/blocklayout/extr_..pnfs.h_pnfs_commit_list.c'
source_filename = "AnghaBench/linux/fs/nfs/blocklayout/extr_..pnfs.h_pnfs_commit_list.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PNFS_NOT_ATTEMPTED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pnfs_commit_list], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @pnfs_commit_list(ptr nocapture readnone %0, ptr nocapture readnone %1, i32 %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @PNFS_NOT_ATTEMPTED, align 4, !tbaa !6
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_fs_nfs_blocklayout_extr_..pnfs.h_pnfs_commit_list |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/pwc/extr_pwc-if.c_show_pan_tilt.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/pwc/extr_pwc-if.c_show_pan_tilt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pwc_device = type { i32, i32 }
@.str = private unnamed_addr constant [7 x i8] c"%d %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @show_pan_tilt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @show_pan_tilt(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @cd_to_pwc(ptr noundef %0) #2
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.pwc_device, ptr %4, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %5, i32 noundef %7) #2
ret i32 %8
}
declare ptr @cd_to_pwc(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pwc_device", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/pwc/extr_pwc-if.c_show_pan_tilt.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/pwc/extr_pwc-if.c_show_pan_tilt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"%d %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @show_pan_tilt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @show_pan_tilt(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @cd_to_pwc(ptr noundef %0) #2
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %4, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %5, i32 noundef %7) #2
ret i32 %8
}
declare ptr @cd_to_pwc(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pwc_device", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| fastsocket_kernel_drivers_media_video_pwc_extr_pwc-if.c_show_pan_tilt |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/cx18/extr_cx18-queue.c__cx18_enqueue.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/cx18/extr_cx18-queue.c__cx18_enqueue.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cx18_stream = type { %struct.cx18_queue, %struct.cx18_queue, %struct.cx18_queue }
%struct.cx18_queue = type { i32, i32, i32, i32 }
%struct.cx18_mdl = type { i64, i64, i32, ptr, i64, i64 }
@CX18_MAX_FW_MDLS_PER_STREAM = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @_cx18_enqueue(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = getelementptr inbounds %struct.cx18_stream, ptr %0, i64 0, i32 2
%6 = icmp eq ptr %5, %2
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = getelementptr inbounds %struct.cx18_mdl, ptr %1, i64 0, i32 3
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %1, i8 0, i64 16, i1 false)
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %8, i8 0, i64 24, i1 false)
br label %9
9: ; preds = %7, %4
%10 = getelementptr inbounds %struct.cx18_stream, ptr %0, i64 0, i32 1
%11 = icmp eq ptr %10, %2
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = getelementptr inbounds %struct.cx18_queue, ptr %2, i64 0, i32 1
%14 = tail call i64 @atomic_read(ptr noundef nonnull %13) #3
%15 = load i64, ptr @CX18_MAX_FW_MDLS_PER_STREAM, align 8, !tbaa !5
%16 = icmp slt i64 %14, %15
%17 = select i1 %16, ptr %2, ptr %0
br label %18
18: ; preds = %12, %9
%19 = phi ptr [ %2, %9 ], [ %17, %12 ]
%20 = tail call i32 @spin_lock(ptr noundef %19) #3
%21 = icmp eq i32 %3, 0
%22 = getelementptr inbounds %struct.cx18_mdl, ptr %1, i64 0, i32 2
%23 = getelementptr inbounds %struct.cx18_queue, ptr %19, i64 0, i32 3
br i1 %21, label %26, label %24
24: ; preds = %18
%25 = tail call i32 @list_add(ptr noundef nonnull %22, ptr noundef nonnull %23) #3
br label %28
26: ; preds = %18
%27 = tail call i32 @list_add_tail(ptr noundef nonnull %22, ptr noundef nonnull %23) #3
br label %28
28: ; preds = %26, %24
%29 = getelementptr inbounds %struct.cx18_mdl, ptr %1, i64 0, i32 1
%30 = load i64, ptr %29, align 8, !tbaa !9
%31 = load i64, ptr %1, align 8, !tbaa !13
%32 = sub nsw i64 %30, %31
%33 = getelementptr inbounds %struct.cx18_queue, ptr %19, i64 0, i32 2
%34 = load i32, ptr %33, align 4, !tbaa !14
%35 = trunc i64 %32 to i32
%36 = add i32 %34, %35
store i32 %36, ptr %33, align 4, !tbaa !14
%37 = getelementptr inbounds %struct.cx18_queue, ptr %19, i64 0, i32 1
%38 = tail call i32 @atomic_inc(ptr noundef nonnull %37) #3
%39 = tail call i32 @spin_unlock(ptr noundef %19) #3
ret ptr %19
}
declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"cx18_mdl", !6, i64 0, !6, i64 8, !11, i64 16, !12, i64 24, !6, i64 32, !6, i64 40}
!11 = !{!"int", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !6, i64 0}
!14 = !{!15, !11, i64 8}
!15 = !{!"cx18_queue", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/cx18/extr_cx18-queue.c__cx18_enqueue.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/cx18/extr_cx18-queue.c__cx18_enqueue.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CX18_MAX_FW_MDLS_PER_STREAM = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @_cx18_enqueue(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 32
%6 = icmp eq ptr %5, %2
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, ptr %1, i64 24
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %1, i8 0, i64 16, i1 false)
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %8, i8 0, i64 24, i1 false)
br label %9
9: ; preds = %7, %4
%10 = getelementptr inbounds i8, ptr %0, i64 16
%11 = icmp eq ptr %10, %2
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = getelementptr inbounds i8, ptr %2, i64 4
%14 = tail call i64 @atomic_read(ptr noundef nonnull %13) #3
%15 = load i64, ptr @CX18_MAX_FW_MDLS_PER_STREAM, align 8, !tbaa !6
%16 = icmp slt i64 %14, %15
%17 = select i1 %16, ptr %2, ptr %0
br label %18
18: ; preds = %12, %9
%19 = phi ptr [ %2, %9 ], [ %17, %12 ]
%20 = tail call i32 @spin_lock(ptr noundef %19) #3
%21 = icmp eq i32 %3, 0
%22 = getelementptr inbounds i8, ptr %1, i64 16
%23 = getelementptr inbounds i8, ptr %19, i64 12
br i1 %21, label %26, label %24
24: ; preds = %18
%25 = tail call i32 @list_add(ptr noundef nonnull %22, ptr noundef nonnull %23) #3
br label %28
26: ; preds = %18
%27 = tail call i32 @list_add_tail(ptr noundef nonnull %22, ptr noundef nonnull %23) #3
br label %28
28: ; preds = %26, %24
%29 = getelementptr inbounds i8, ptr %1, i64 8
%30 = load i64, ptr %29, align 8, !tbaa !10
%31 = load i64, ptr %1, align 8, !tbaa !14
%32 = sub nsw i64 %30, %31
%33 = getelementptr inbounds i8, ptr %19, i64 8
%34 = load i32, ptr %33, align 4, !tbaa !15
%35 = trunc i64 %32 to i32
%36 = add i32 %34, %35
store i32 %36, ptr %33, align 4, !tbaa !15
%37 = getelementptr inbounds i8, ptr %19, i64 4
%38 = tail call i32 @atomic_inc(ptr noundef nonnull %37) #3
%39 = tail call i32 @spin_unlock(ptr noundef %19) #3
ret ptr %19
}
declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"cx18_mdl", !7, i64 0, !7, i64 8, !12, i64 16, !13, i64 24, !7, i64 32, !7, i64 40}
!12 = !{!"int", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !7, i64 0}
!15 = !{!16, !12, i64 8}
!16 = !{!"cx18_queue", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
| fastsocket_kernel_drivers_media_video_cx18_extr_cx18-queue.c__cx18_enqueue |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs/extr_fs-loader.c_mergeinfo_receiver.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs/extr_fs-loader.c_mergeinfo_receiver.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
@SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @mergeinfo_receiver], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @mergeinfo_receiver(ptr nocapture readnone %0, i32 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr %2, align 8, !tbaa !5
%6 = tail call i32 @svn_mergeinfo_dup(i32 noundef %1, i32 noundef %5) #2
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %2, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !11
store i32 %6, ptr %8, align 4, !tbaa !12
%9 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !13
ret ptr %9
}
declare i32 @svn_mergeinfo_dup(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs/extr_fs-loader.c_mergeinfo_receiver.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs/extr_fs-loader.c_mergeinfo_receiver.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @mergeinfo_receiver], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @mergeinfo_receiver(ptr nocapture readnone %0, i32 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr %2, align 8, !tbaa !6
%6 = tail call i32 @svn_mergeinfo_dup(i32 noundef %1, i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %2, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !12
store i32 %6, ptr %8, align 4, !tbaa !13
%9 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !14
ret ptr %9
}
declare i32 @svn_mergeinfo_dup(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!8, !8, i64 0}
!14 = !{!11, !11, i64 0}
| freebsd_contrib_subversion_subversion_libsvn_fs_extr_fs-loader.c_mergeinfo_receiver |
; ModuleID = 'AnghaBench/esp-idf/components/wpa_supplicant/src/crypto/extr_ms_funcs.c_nt_password_hash.c'
source_filename = "AnghaBench/esp-idf/components/wpa_supplicant/src/crypto/extr_ms_funcs.c_nt_password_hash.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @nt_password_hash(ptr noundef %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca [512 x i32], align 16
%5 = alloca ptr, align 8
%6 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 2048, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%7 = call i64 @utf8_to_ucs2(ptr noundef %0, i64 noundef %1, ptr noundef nonnull %4, i64 noundef 2048, ptr noundef nonnull %6) #3
%8 = icmp slt i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = load i64, ptr %6, align 8, !tbaa !5
%11 = shl i64 %10, 1
store i64 %11, ptr %6, align 8, !tbaa !5
store ptr %4, ptr %5, align 8, !tbaa !9
%12 = call i32 @md4_vector(i32 noundef 1, ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef %2) #3
br label %13
13: ; preds = %3, %9
%14 = phi i32 [ %12, %9 ], [ -1, %3 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 2048, ptr nonnull %4) #3
ret i32 %14
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @utf8_to_ucs2(ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @md4_vector(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/esp-idf/components/wpa_supplicant/src/crypto/extr_ms_funcs.c_nt_password_hash.c'
source_filename = "AnghaBench/esp-idf/components/wpa_supplicant/src/crypto/extr_ms_funcs.c_nt_password_hash.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @nt_password_hash(ptr noundef %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca [512 x i32], align 4
%5 = alloca ptr, align 8
%6 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 2048, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%7 = call i64 @utf8_to_ucs2(ptr noundef %0, i64 noundef %1, ptr noundef nonnull %4, i64 noundef 2048, ptr noundef nonnull %6) #3
%8 = icmp slt i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = load i64, ptr %6, align 8, !tbaa !6
%11 = shl i64 %10, 1
store i64 %11, ptr %6, align 8, !tbaa !6
store ptr %4, ptr %5, align 8, !tbaa !10
%12 = call i32 @md4_vector(i32 noundef 1, ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef %2) #3
br label %13
13: ; preds = %3, %9
%14 = phi i32 [ %12, %9 ], [ -1, %3 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 2048, ptr nonnull %4) #3
ret i32 %14
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @utf8_to_ucs2(ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @md4_vector(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| esp-idf_components_wpa_supplicant_src_crypto_extr_ms_funcs.c_nt_password_hash |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_pcm.c_snd_vortex_spdif_info.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_pcm.c_snd_vortex_spdif_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ctl_elem_info = type { i32, i32 }
@SNDRV_CTL_ELEM_TYPE_IEC958 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_vortex_spdif_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal noundef i32 @snd_vortex_spdif_info(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_IEC958, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1
store i32 %3, ptr %4, align 4, !tbaa !9
store i32 1, ptr %1, align 4, !tbaa !11
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"snd_ctl_elem_info", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_pcm.c_snd_vortex_spdif_info.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_pcm.c_snd_vortex_spdif_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_CTL_ELEM_TYPE_IEC958 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_vortex_spdif_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @snd_vortex_spdif_info(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_IEC958, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %3, ptr %4, align 4, !tbaa !10
store i32 1, ptr %1, align 4, !tbaa !12
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"snd_ctl_elem_info", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| fastsocket_kernel_sound_pci_au88x0_extr_au88x0_pcm.c_snd_vortex_spdif_info |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_nic.h_ef4_nic_process_eventq.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_nic.h_ef4_nic_process_eventq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ef4_nic_process_eventq], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @ef4_nic_process_eventq(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = tail call i32 %5(ptr noundef nonnull %0, i32 noundef %1) #1
ret i32 %6
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ef4_channel", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_nic.h_ef4_nic_process_eventq.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_nic.h_ef4_nic_process_eventq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ef4_nic_process_eventq], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @ef4_nic_process_eventq(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load ptr, ptr %4, align 8, !tbaa !13
%6 = tail call i32 %5(ptr noundef nonnull %0, i32 noundef %1) #1
ret i32 %6
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ef4_channel", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_3__", !8, i64 0}
| linux_drivers_net_ethernet_sfc_falcon_extr_nic.h_ef4_nic_process_eventq |
; ModuleID = 'AnghaBench/libgit2/tests/odb/backend/extr_mempack.c_test_odb_backend_mempack__initialize.c'
source_filename = "AnghaBench/libgit2/tests/odb/backend/extr_mempack.c_test_odb_backend_mempack__initialize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@_odb = dso_local global i32 0, align 4
@_repo = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @test_odb_backend_mempack__initialize() local_unnamed_addr #0 {
%1 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
%2 = call i32 @git_mempack_new(ptr noundef nonnull %1) #3
%3 = call i32 @cl_git_pass(i32 noundef %2) #3
%4 = call i32 @git_odb_new(ptr noundef nonnull @_odb) #3
%5 = call i32 @cl_git_pass(i32 noundef %4) #3
%6 = load i32, ptr @_odb, align 4, !tbaa !5
%7 = load ptr, ptr %1, align 8, !tbaa !9
%8 = call i32 @git_odb_add_backend(i32 noundef %6, ptr noundef %7, i32 noundef 10) #3
%9 = call i32 @cl_git_pass(i32 noundef %8) #3
%10 = load i32, ptr @_odb, align 4, !tbaa !5
%11 = call i32 @git_repository_wrap_odb(ptr noundef nonnull @_repo, i32 noundef %10) #3
%12 = call i32 @cl_git_pass(i32 noundef %11) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @git_mempack_new(ptr noundef) local_unnamed_addr #2
declare i32 @git_odb_new(ptr noundef) local_unnamed_addr #2
declare i32 @git_odb_add_backend(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_repository_wrap_odb(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/libgit2/tests/odb/backend/extr_mempack.c_test_odb_backend_mempack__initialize.c'
source_filename = "AnghaBench/libgit2/tests/odb/backend/extr_mempack.c_test_odb_backend_mempack__initialize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@_odb = common global i32 0, align 4
@_repo = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_odb_backend_mempack__initialize() local_unnamed_addr #0 {
%1 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
%2 = call i32 @git_mempack_new(ptr noundef nonnull %1) #3
%3 = call i32 @cl_git_pass(i32 noundef %2) #3
%4 = call i32 @git_odb_new(ptr noundef nonnull @_odb) #3
%5 = call i32 @cl_git_pass(i32 noundef %4) #3
%6 = load i32, ptr @_odb, align 4, !tbaa !6
%7 = load ptr, ptr %1, align 8, !tbaa !10
%8 = call i32 @git_odb_add_backend(i32 noundef %6, ptr noundef %7, i32 noundef 10) #3
%9 = call i32 @cl_git_pass(i32 noundef %8) #3
%10 = load i32, ptr @_odb, align 4, !tbaa !6
%11 = call i32 @git_repository_wrap_odb(ptr noundef nonnull @_repo, i32 noundef %10) #3
%12 = call i32 @cl_git_pass(i32 noundef %11) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @git_mempack_new(ptr noundef) local_unnamed_addr #2
declare i32 @git_odb_new(ptr noundef) local_unnamed_addr #2
declare i32 @git_odb_add_backend(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_repository_wrap_odb(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| libgit2_tests_odb_backend_extr_mempack.c_test_odb_backend_mempack__initialize |
; ModuleID = 'AnghaBench/redis/deps/hiredis/extr_sds.c_sdsIncrLen.c'
source_filename = "AnghaBench/redis/deps/hiredis/extr_sds.c_sdsIncrLen.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@SDS_TYPE_MASK = dso_local local_unnamed_addr global i8 0, align 1
@SDS_TYPE_BITS = dso_local local_unnamed_addr global i8 0, align 1
@sh = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @sdsIncrLen(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 -1
%4 = load i8, ptr %3, align 1, !tbaa !5
%5 = load i8, ptr @SDS_TYPE_MASK, align 1, !tbaa !5
%6 = and i8 %5, %4
switch i8 %6, label %125 [
i8 -126, label %7
i8 -128, label %29
i8 -124, label %53
i8 -125, label %77
i8 -127, label %101
]
7: ; preds = %2
%8 = tail call zeroext i8 @SDS_TYPE_5_LEN(i8 noundef zeroext %4) #2
%9 = icmp sgt i32 %1, 0
%10 = zext i8 %8 to i32
%11 = add nsw i32 %10, %1
%12 = icmp ult i32 %11, 32
%13 = select i1 %9, i1 %12, i1 false
br i1 %13, label %20, label %14
14: ; preds = %7
%15 = icmp slt i32 %1, 0
%16 = sub nsw i32 0, %1
%17 = icmp uge i32 %10, %16
%18 = select i1 %15, i1 %17, i1 false
%19 = zext i1 %18 to i32
br label %20
20: ; preds = %7, %14
%21 = phi i32 [ %19, %14 ], [ 1, %7 ]
%22 = tail call i32 @assert(i32 noundef %21) #2
%23 = load i8, ptr @SDS_TYPE_BITS, align 1, !tbaa !5
%24 = zext nneg i8 %23 to i32
%25 = shl i32 %11, %24
%26 = trunc i32 %25 to i8
%27 = or i8 %26, -126
store i8 %27, ptr %3, align 1, !tbaa !5
%28 = sext i32 %11 to i64
br label %125
29: ; preds = %2
%30 = tail call i32 @SDS_HDR_VAR(i32 noundef 8, ptr noundef nonnull %0) #2
%31 = icmp sgt i32 %1, -1
%32 = load ptr, ptr @sh, align 8, !tbaa !8
br i1 %31, label %33, label %39
33: ; preds = %29
%34 = load i32, ptr %32, align 4, !tbaa !10
%35 = getelementptr inbounds %struct.TYPE_2__, ptr %32, i64 0, i32 1
%36 = load i32, ptr %35, align 4, !tbaa !13
%37 = sub nsw i32 %34, %36
%38 = icmp sge i32 %37, %1
br label %44
39: ; preds = %29
%40 = getelementptr inbounds %struct.TYPE_2__, ptr %32, i64 0, i32 1
%41 = load i32, ptr %40, align 4, !tbaa !13
%42 = sub nsw i32 0, %1
%43 = icmp uge i32 %41, %42
br label %44
44: ; preds = %33, %39
%45 = phi i1 [ %43, %39 ], [ %38, %33 ]
%46 = zext i1 %45 to i32
%47 = tail call i32 @assert(i32 noundef %46) #2
%48 = load ptr, ptr @sh, align 8, !tbaa !8
%49 = getelementptr inbounds %struct.TYPE_2__, ptr %48, i64 0, i32 1
%50 = load i32, ptr %49, align 4, !tbaa !13
%51 = add nsw i32 %50, %1
store i32 %51, ptr %49, align 4, !tbaa !13
%52 = sext i32 %51 to i64
br label %125
53: ; preds = %2
%54 = tail call i32 @SDS_HDR_VAR(i32 noundef 16, ptr noundef nonnull %0) #2
%55 = icmp sgt i32 %1, -1
%56 = load ptr, ptr @sh, align 8, !tbaa !8
br i1 %55, label %57, label %63
57: ; preds = %53
%58 = load i32, ptr %56, align 4, !tbaa !10
%59 = getelementptr inbounds %struct.TYPE_2__, ptr %56, i64 0, i32 1
%60 = load i32, ptr %59, align 4, !tbaa !13
%61 = sub nsw i32 %58, %60
%62 = icmp sge i32 %61, %1
br label %68
63: ; preds = %53
%64 = getelementptr inbounds %struct.TYPE_2__, ptr %56, i64 0, i32 1
%65 = load i32, ptr %64, align 4, !tbaa !13
%66 = sub nsw i32 0, %1
%67 = icmp uge i32 %65, %66
br label %68
68: ; preds = %57, %63
%69 = phi i1 [ %67, %63 ], [ %62, %57 ]
%70 = zext i1 %69 to i32
%71 = tail call i32 @assert(i32 noundef %70) #2
%72 = load ptr, ptr @sh, align 8, !tbaa !8
%73 = getelementptr inbounds %struct.TYPE_2__, ptr %72, i64 0, i32 1
%74 = load i32, ptr %73, align 4, !tbaa !13
%75 = add nsw i32 %74, %1
store i32 %75, ptr %73, align 4, !tbaa !13
%76 = sext i32 %75 to i64
br label %125
77: ; preds = %2
%78 = tail call i32 @SDS_HDR_VAR(i32 noundef 32, ptr noundef nonnull %0) #2
%79 = icmp sgt i32 %1, -1
%80 = load ptr, ptr @sh, align 8, !tbaa !8
br i1 %79, label %81, label %87
81: ; preds = %77
%82 = load i32, ptr %80, align 4, !tbaa !10
%83 = getelementptr inbounds %struct.TYPE_2__, ptr %80, i64 0, i32 1
%84 = load i32, ptr %83, align 4, !tbaa !13
%85 = sub nsw i32 %82, %84
%86 = icmp uge i32 %85, %1
br label %92
87: ; preds = %77
%88 = getelementptr inbounds %struct.TYPE_2__, ptr %80, i64 0, i32 1
%89 = load i32, ptr %88, align 4, !tbaa !13
%90 = sub nsw i32 0, %1
%91 = icmp uge i32 %89, %90
br label %92
92: ; preds = %81, %87
%93 = phi i1 [ %91, %87 ], [ %86, %81 ]
%94 = zext i1 %93 to i32
%95 = tail call i32 @assert(i32 noundef %94) #2
%96 = load ptr, ptr @sh, align 8, !tbaa !8
%97 = getelementptr inbounds %struct.TYPE_2__, ptr %96, i64 0, i32 1
%98 = load i32, ptr %97, align 4, !tbaa !13
%99 = add nsw i32 %98, %1
store i32 %99, ptr %97, align 4, !tbaa !13
%100 = sext i32 %99 to i64
br label %125
101: ; preds = %2
%102 = tail call i32 @SDS_HDR_VAR(i32 noundef 64, ptr noundef nonnull %0) #2
%103 = icmp sgt i32 %1, -1
%104 = load ptr, ptr @sh, align 8, !tbaa !8
br i1 %103, label %105, label %111
105: ; preds = %101
%106 = load i32, ptr %104, align 4, !tbaa !10
%107 = getelementptr inbounds %struct.TYPE_2__, ptr %104, i64 0, i32 1
%108 = load i32, ptr %107, align 4, !tbaa !13
%109 = sub nsw i32 %106, %108
%110 = icmp uge i32 %109, %1
br label %116
111: ; preds = %101
%112 = getelementptr inbounds %struct.TYPE_2__, ptr %104, i64 0, i32 1
%113 = load i32, ptr %112, align 4, !tbaa !13
%114 = sub nsw i32 0, %1
%115 = icmp uge i32 %113, %114
br label %116
116: ; preds = %105, %111
%117 = phi i1 [ %115, %111 ], [ %110, %105 ]
%118 = zext i1 %117 to i32
%119 = tail call i32 @assert(i32 noundef %118) #2
%120 = load ptr, ptr @sh, align 8, !tbaa !8
%121 = getelementptr inbounds %struct.TYPE_2__, ptr %120, i64 0, i32 1
%122 = load i32, ptr %121, align 4, !tbaa !13
%123 = add nsw i32 %122, %1
store i32 %123, ptr %121, align 4, !tbaa !13
%124 = sext i32 %123 to i64
br label %125
125: ; preds = %2, %116, %92, %68, %44, %20
%126 = phi i64 [ %124, %116 ], [ %100, %92 ], [ %76, %68 ], [ %52, %44 ], [ %28, %20 ], [ 0, %2 ]
%127 = getelementptr inbounds i8, ptr %0, i64 %126
store i8 0, ptr %127, align 1, !tbaa !5
ret void
}
declare zeroext i8 @SDS_TYPE_5_LEN(i8 noundef zeroext) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @SDS_HDR_VAR(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !6, i64 0}
!13 = !{!11, !12, i64 4}
| ; ModuleID = 'AnghaBench/redis/deps/hiredis/extr_sds.c_sdsIncrLen.c'
source_filename = "AnghaBench/redis/deps/hiredis/extr_sds.c_sdsIncrLen.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SDS_TYPE_MASK = common local_unnamed_addr global i8 0, align 1
@SDS_TYPE_BITS = common local_unnamed_addr global i8 0, align 1
@sh = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @sdsIncrLen(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 -1
%4 = load i8, ptr %3, align 1, !tbaa !6
%5 = load i8, ptr @SDS_TYPE_MASK, align 1, !tbaa !6
%6 = and i8 %5, %4
switch i8 %6, label %125 [
i8 -126, label %7
i8 -128, label %29
i8 -124, label %53
i8 -125, label %77
i8 -127, label %101
]
7: ; preds = %2
%8 = tail call zeroext i8 @SDS_TYPE_5_LEN(i8 noundef zeroext %4) #2
%9 = icmp sgt i32 %1, 0
%10 = zext i8 %8 to i32
%11 = add nsw i32 %10, %1
%12 = icmp ult i32 %11, 32
%13 = select i1 %9, i1 %12, i1 false
br i1 %13, label %20, label %14
14: ; preds = %7
%15 = icmp slt i32 %1, 0
%16 = sub nsw i32 0, %1
%17 = icmp uge i32 %10, %16
%18 = select i1 %15, i1 %17, i1 false
%19 = zext i1 %18 to i32
br label %20
20: ; preds = %7, %14
%21 = phi i32 [ %19, %14 ], [ 1, %7 ]
%22 = tail call i32 @assert(i32 noundef %21) #2
%23 = load i8, ptr @SDS_TYPE_BITS, align 1, !tbaa !6
%24 = zext nneg i8 %23 to i32
%25 = shl i32 %11, %24
%26 = trunc i32 %25 to i8
%27 = or i8 %26, -126
store i8 %27, ptr %3, align 1, !tbaa !6
%28 = sext i32 %11 to i64
br label %125
29: ; preds = %2
%30 = tail call i32 @SDS_HDR_VAR(i32 noundef 8, ptr noundef nonnull %0) #2
%31 = icmp sgt i32 %1, -1
%32 = load ptr, ptr @sh, align 8, !tbaa !9
br i1 %31, label %33, label %39
33: ; preds = %29
%34 = load i32, ptr %32, align 4, !tbaa !11
%35 = getelementptr inbounds i8, ptr %32, i64 4
%36 = load i32, ptr %35, align 4, !tbaa !14
%37 = sub nsw i32 %34, %36
%38 = icmp sge i32 %37, %1
br label %44
39: ; preds = %29
%40 = getelementptr inbounds i8, ptr %32, i64 4
%41 = load i32, ptr %40, align 4, !tbaa !14
%42 = sub nsw i32 0, %1
%43 = icmp uge i32 %41, %42
br label %44
44: ; preds = %33, %39
%45 = phi i1 [ %43, %39 ], [ %38, %33 ]
%46 = zext i1 %45 to i32
%47 = tail call i32 @assert(i32 noundef %46) #2
%48 = load ptr, ptr @sh, align 8, !tbaa !9
%49 = getelementptr inbounds i8, ptr %48, i64 4
%50 = load i32, ptr %49, align 4, !tbaa !14
%51 = add nsw i32 %50, %1
store i32 %51, ptr %49, align 4, !tbaa !14
%52 = sext i32 %51 to i64
br label %125
53: ; preds = %2
%54 = tail call i32 @SDS_HDR_VAR(i32 noundef 16, ptr noundef nonnull %0) #2
%55 = icmp sgt i32 %1, -1
%56 = load ptr, ptr @sh, align 8, !tbaa !9
br i1 %55, label %57, label %63
57: ; preds = %53
%58 = load i32, ptr %56, align 4, !tbaa !11
%59 = getelementptr inbounds i8, ptr %56, i64 4
%60 = load i32, ptr %59, align 4, !tbaa !14
%61 = sub nsw i32 %58, %60
%62 = icmp sge i32 %61, %1
br label %68
63: ; preds = %53
%64 = getelementptr inbounds i8, ptr %56, i64 4
%65 = load i32, ptr %64, align 4, !tbaa !14
%66 = sub nsw i32 0, %1
%67 = icmp uge i32 %65, %66
br label %68
68: ; preds = %57, %63
%69 = phi i1 [ %67, %63 ], [ %62, %57 ]
%70 = zext i1 %69 to i32
%71 = tail call i32 @assert(i32 noundef %70) #2
%72 = load ptr, ptr @sh, align 8, !tbaa !9
%73 = getelementptr inbounds i8, ptr %72, i64 4
%74 = load i32, ptr %73, align 4, !tbaa !14
%75 = add nsw i32 %74, %1
store i32 %75, ptr %73, align 4, !tbaa !14
%76 = sext i32 %75 to i64
br label %125
77: ; preds = %2
%78 = tail call i32 @SDS_HDR_VAR(i32 noundef 32, ptr noundef nonnull %0) #2
%79 = icmp sgt i32 %1, -1
%80 = load ptr, ptr @sh, align 8, !tbaa !9
br i1 %79, label %81, label %87
81: ; preds = %77
%82 = load i32, ptr %80, align 4, !tbaa !11
%83 = getelementptr inbounds i8, ptr %80, i64 4
%84 = load i32, ptr %83, align 4, !tbaa !14
%85 = sub nsw i32 %82, %84
%86 = icmp uge i32 %85, %1
br label %92
87: ; preds = %77
%88 = getelementptr inbounds i8, ptr %80, i64 4
%89 = load i32, ptr %88, align 4, !tbaa !14
%90 = sub nsw i32 0, %1
%91 = icmp uge i32 %89, %90
br label %92
92: ; preds = %81, %87
%93 = phi i1 [ %91, %87 ], [ %86, %81 ]
%94 = zext i1 %93 to i32
%95 = tail call i32 @assert(i32 noundef %94) #2
%96 = load ptr, ptr @sh, align 8, !tbaa !9
%97 = getelementptr inbounds i8, ptr %96, i64 4
%98 = load i32, ptr %97, align 4, !tbaa !14
%99 = add nsw i32 %98, %1
store i32 %99, ptr %97, align 4, !tbaa !14
%100 = sext i32 %99 to i64
br label %125
101: ; preds = %2
%102 = tail call i32 @SDS_HDR_VAR(i32 noundef 64, ptr noundef nonnull %0) #2
%103 = icmp sgt i32 %1, -1
%104 = load ptr, ptr @sh, align 8, !tbaa !9
br i1 %103, label %105, label %111
105: ; preds = %101
%106 = load i32, ptr %104, align 4, !tbaa !11
%107 = getelementptr inbounds i8, ptr %104, i64 4
%108 = load i32, ptr %107, align 4, !tbaa !14
%109 = sub nsw i32 %106, %108
%110 = icmp uge i32 %109, %1
br label %116
111: ; preds = %101
%112 = getelementptr inbounds i8, ptr %104, i64 4
%113 = load i32, ptr %112, align 4, !tbaa !14
%114 = sub nsw i32 0, %1
%115 = icmp uge i32 %113, %114
br label %116
116: ; preds = %105, %111
%117 = phi i1 [ %115, %111 ], [ %110, %105 ]
%118 = zext i1 %117 to i32
%119 = tail call i32 @assert(i32 noundef %118) #2
%120 = load ptr, ptr @sh, align 8, !tbaa !9
%121 = getelementptr inbounds i8, ptr %120, i64 4
%122 = load i32, ptr %121, align 4, !tbaa !14
%123 = add nsw i32 %122, %1
store i32 %123, ptr %121, align 4, !tbaa !14
%124 = sext i32 %123 to i64
br label %125
125: ; preds = %2, %116, %92, %68, %44, %20
%126 = phi i64 [ %124, %116 ], [ %100, %92 ], [ %76, %68 ], [ %52, %44 ], [ %28, %20 ], [ 0, %2 ]
%127 = getelementptr inbounds i8, ptr %0, i64 %126
store i8 0, ptr %127, align 1, !tbaa !6
ret void
}
declare zeroext i8 @SDS_TYPE_5_LEN(i8 noundef zeroext) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @SDS_HDR_VAR(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0, !13, i64 4}
!13 = !{!"int", !7, i64 0}
!14 = !{!12, !13, i64 4}
| redis_deps_hiredis_extr_sds.c_sdsIncrLen |
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_mcp.c_ecore_mcp_unload_req.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_mcp.c_ecore_mcp_unload_req.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ecore_mcp_mb_params = type { i32, i32, i32 }
@DRV_MB_PARAM_UNLOAD_WOL_DISABLED = dso_local local_unnamed_addr global i32 0, align 4
@DRV_MB_PARAM_UNLOAD_WOL_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"Unknown WoL configuration %02x\0A\00", align 1
@DRV_MB_PARAM_UNLOAD_WOL_MCP = dso_local local_unnamed_addr global i32 0, align 4
@DRV_MSG_CODE_UNLOAD_REQ = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_MB_FLAG_CAN_SLEEP = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_MB_FLAG_AVOID_BLOCK = dso_local local_unnamed_addr global i32 0, align 4
@switch.table.ecore_mcp_unload_req = private unnamed_addr constant [3 x ptr] [ptr @DRV_MB_PARAM_UNLOAD_WOL_ENABLED, ptr @DRV_MB_PARAM_UNLOAD_WOL_DISABLED, ptr @DRV_MB_PARAM_UNLOAD_WOL_MCP], align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @ecore_mcp_unload_req(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.ecore_mcp_mb_params, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = add i32 %5, -128
%7 = icmp ult i32 %6, 3
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 @DP_NOTICE(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %5) #3
br label %14
10: ; preds = %2
%11 = zext nneg i32 %6 to i64
%12 = getelementptr inbounds [3 x ptr], ptr @switch.table.ecore_mcp_unload_req, i64 0, i64 %11
%13 = load ptr, ptr %12, align 8
br label %14
14: ; preds = %10, %8
%15 = phi ptr [ @DRV_MB_PARAM_UNLOAD_WOL_MCP, %8 ], [ %13, %10 ]
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = call i32 @OSAL_MEM_ZERO(ptr noundef nonnull %3, i32 noundef 12) #3
%18 = load i32, ptr @DRV_MSG_CODE_UNLOAD_REQ, align 4, !tbaa !13
%19 = getelementptr inbounds %struct.ecore_mcp_mb_params, ptr %3, i64 0, i32 2
store i32 %18, ptr %19, align 4, !tbaa !14
%20 = getelementptr inbounds %struct.ecore_mcp_mb_params, ptr %3, i64 0, i32 1
store i32 %16, ptr %20, align 4, !tbaa !16
%21 = load i32, ptr @ECORE_MB_FLAG_CAN_SLEEP, align 4, !tbaa !13
%22 = load i32, ptr @ECORE_MB_FLAG_AVOID_BLOCK, align 4, !tbaa !13
%23 = or i32 %22, %21
store i32 %23, ptr %3, align 4, !tbaa !17
%24 = call i32 @ecore_mcp_cmd_and_union(ptr noundef nonnull %0, ptr noundef %1, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DP_NOTICE(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OSAL_MEM_ZERO(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ecore_mcp_cmd_and_union(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ecore_hwfn", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !12, i64 8}
!15 = !{!"ecore_mcp_mb_params", !12, i64 0, !12, i64 4, !12, i64 8}
!16 = !{!15, !12, i64 4}
!17 = !{!15, !12, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_mcp.c_ecore_mcp_unload_req.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_mcp.c_ecore_mcp_unload_req.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ecore_mcp_mb_params = type { i32, i32, i32 }
@DRV_MB_PARAM_UNLOAD_WOL_DISABLED = common local_unnamed_addr global i32 0, align 4
@DRV_MB_PARAM_UNLOAD_WOL_ENABLED = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"Unknown WoL configuration %02x\0A\00", align 1
@DRV_MB_PARAM_UNLOAD_WOL_MCP = common local_unnamed_addr global i32 0, align 4
@DRV_MSG_CODE_UNLOAD_REQ = common local_unnamed_addr global i32 0, align 4
@ECORE_MB_FLAG_CAN_SLEEP = common local_unnamed_addr global i32 0, align 4
@ECORE_MB_FLAG_AVOID_BLOCK = common local_unnamed_addr global i32 0, align 4
@switch.table.ecore_mcp_unload_req = private unnamed_addr constant [3 x ptr] [ptr @DRV_MB_PARAM_UNLOAD_WOL_ENABLED, ptr @DRV_MB_PARAM_UNLOAD_WOL_DISABLED, ptr @DRV_MB_PARAM_UNLOAD_WOL_MCP], align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ecore_mcp_unload_req(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.ecore_mcp_mb_params, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = add i32 %5, -128
%7 = icmp ult i32 %6, 3
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = tail call i32 @DP_NOTICE(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull @.str, i32 noundef %5) #3
br label %14
10: ; preds = %2
%11 = zext nneg i32 %6 to i64
%12 = getelementptr inbounds [3 x ptr], ptr @switch.table.ecore_mcp_unload_req, i64 0, i64 %11
%13 = load ptr, ptr %12, align 8
br label %14
14: ; preds = %10, %8
%15 = phi ptr [ @DRV_MB_PARAM_UNLOAD_WOL_MCP, %8 ], [ %13, %10 ]
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = call i32 @OSAL_MEM_ZERO(ptr noundef nonnull %3, i32 noundef 12) #3
%18 = load i32, ptr @DRV_MSG_CODE_UNLOAD_REQ, align 4, !tbaa !14
%19 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %18, ptr %19, align 4, !tbaa !15
%20 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %16, ptr %20, align 4, !tbaa !17
%21 = load i32, ptr @ECORE_MB_FLAG_CAN_SLEEP, align 4, !tbaa !14
%22 = load i32, ptr @ECORE_MB_FLAG_AVOID_BLOCK, align 4, !tbaa !14
%23 = or i32 %22, %21
store i32 %23, ptr %3, align 4, !tbaa !18
%24 = call i32 @ecore_mcp_cmd_and_union(ptr noundef nonnull %0, ptr noundef %1, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DP_NOTICE(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OSAL_MEM_ZERO(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ecore_mcp_cmd_and_union(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ecore_hwfn", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!16, !13, i64 8}
!16 = !{!"ecore_mcp_mb_params", !13, i64 0, !13, i64 4, !13, i64 8}
!17 = !{!16, !13, i64 4}
!18 = !{!16, !13, i64 0}
| freebsd_sys_dev_qlnx_qlnxe_extr_ecore_mcp.c_ecore_mcp_unload_req |
; ModuleID = 'AnghaBench/lede/package/network/config/swconfig/src/extr_swlib.c_add_switch.c'
source_filename = "AnghaBench/lede/package/network/config/swconfig/src/extr_swlib.c_add_switch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.swlib_scan_arg = type { ptr, ptr, i64 }
%struct.switch_dev = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32 }
@tb = dso_local local_unnamed_addr global ptr null, align 8
@SWITCH_ATTR_MAX = dso_local local_unnamed_addr global i32 0, align 4
@SWITCH_ATTR_DEV_NAME = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_ALIAS = dso_local local_unnamed_addr global i64 0, align 8
@IFNAMSIZ = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_ID = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_NAME = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_PORTS = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_VLANS = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_CPU_PORT = dso_local local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_PORTMAP = dso_local local_unnamed_addr global i64 0, align 8
@refcount = dso_local local_unnamed_addr global i32 0, align 4
@NL_SKIP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @add_switch], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @add_switch(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = tail call i32 @nlmsg_hdr(ptr noundef %0) #3
%4 = tail call ptr @nlmsg_data(i32 noundef %3) #3
%5 = load ptr, ptr @tb, align 8, !tbaa !5
%6 = load i32, ptr @SWITCH_ATTR_MAX, align 4, !tbaa !9
%7 = tail call i32 @genlmsg_attrdata(ptr noundef %4, i32 noundef 0) #3
%8 = tail call i32 @genlmsg_attrlen(ptr noundef %4, i32 noundef 0) #3
%9 = tail call i64 @nla_parse(ptr noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef null) #3
%10 = icmp slt i64 %9, 0
br i1 %10, label %113, label %11
11: ; preds = %2
%12 = load ptr, ptr @tb, align 8, !tbaa !5
%13 = load i64, ptr @SWITCH_ATTR_DEV_NAME, align 8, !tbaa !11
%14 = getelementptr inbounds i64, ptr %12, i64 %13
%15 = load i64, ptr %14, align 8, !tbaa !11
%16 = icmp eq i64 %15, 0
br i1 %16, label %113, label %17
17: ; preds = %11
%18 = tail call ptr @nla_get_string(i64 noundef %15) #3
%19 = load ptr, ptr @tb, align 8, !tbaa !5
%20 = load i64, ptr @SWITCH_ATTR_ALIAS, align 8, !tbaa !11
%21 = getelementptr inbounds i64, ptr %19, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !11
%23 = tail call ptr @nla_get_string(i64 noundef %22) #3
%24 = getelementptr inbounds %struct.swlib_scan_arg, ptr %1, i64 0, i32 2
%25 = load i64, ptr %24, align 8, !tbaa !13
%26 = icmp eq i64 %25, 0
br i1 %26, label %34, label %27
27: ; preds = %17
%28 = tail call i64 @strcmp(ptr noundef %18, i64 noundef %25) #3
%29 = icmp eq i64 %28, 0
br i1 %29, label %34, label %30
30: ; preds = %27
%31 = load i64, ptr %24, align 8, !tbaa !13
%32 = tail call i64 @strcmp(ptr noundef %23, i64 noundef %31) #3
%33 = icmp eq i64 %32, 0
br i1 %33, label %34, label %113
34: ; preds = %30, %27, %17
%35 = tail call ptr @swlib_alloc(i32 noundef 64) #3
%36 = icmp eq ptr %35, null
br i1 %36, label %113, label %37
37: ; preds = %34
%38 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 7
%39 = load i32, ptr %38, align 8, !tbaa !15
%40 = load i64, ptr @IFNAMSIZ, align 8, !tbaa !11
%41 = add nsw i64 %40, -1
%42 = tail call i32 @strncpy(i32 noundef %39, ptr noundef %18, i64 noundef %41) #3
%43 = tail call ptr @strdup(ptr noundef %23)
%44 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 6
store ptr %43, ptr %44, align 8, !tbaa !17
%45 = load ptr, ptr @tb, align 8, !tbaa !5
%46 = load i64, ptr @SWITCH_ATTR_ID, align 8, !tbaa !11
%47 = getelementptr inbounds i64, ptr %45, i64 %46
%48 = load i64, ptr %47, align 8, !tbaa !11
%49 = icmp eq i64 %48, 0
br i1 %49, label %54, label %50
50: ; preds = %37
%51 = tail call ptr @nla_get_u32(i64 noundef %48) #3
%52 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 5
store ptr %51, ptr %52, align 8, !tbaa !18
%53 = load ptr, ptr @tb, align 8, !tbaa !5
br label %54
54: ; preds = %50, %37
%55 = phi ptr [ %53, %50 ], [ %45, %37 ]
%56 = load i64, ptr @SWITCH_ATTR_NAME, align 8, !tbaa !11
%57 = getelementptr inbounds i64, ptr %55, i64 %56
%58 = load i64, ptr %57, align 8, !tbaa !11
%59 = icmp eq i64 %58, 0
br i1 %59, label %65, label %60
60: ; preds = %54
%61 = tail call ptr @nla_get_string(i64 noundef %58) #3
%62 = tail call ptr @strdup(ptr noundef %61)
%63 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 4
store ptr %62, ptr %63, align 8, !tbaa !19
%64 = load ptr, ptr @tb, align 8, !tbaa !5
br label %65
65: ; preds = %60, %54
%66 = phi ptr [ %64, %60 ], [ %55, %54 ]
%67 = load i64, ptr @SWITCH_ATTR_PORTS, align 8, !tbaa !11
%68 = getelementptr inbounds i64, ptr %66, i64 %67
%69 = load i64, ptr %68, align 8, !tbaa !11
%70 = icmp eq i64 %69, 0
br i1 %70, label %75, label %71
71: ; preds = %65
%72 = tail call ptr @nla_get_u32(i64 noundef %69) #3
%73 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 3
store ptr %72, ptr %73, align 8, !tbaa !20
%74 = load ptr, ptr @tb, align 8, !tbaa !5
br label %75
75: ; preds = %71, %65
%76 = phi ptr [ %74, %71 ], [ %66, %65 ]
%77 = load i64, ptr @SWITCH_ATTR_VLANS, align 8, !tbaa !11
%78 = getelementptr inbounds i64, ptr %76, i64 %77
%79 = load i64, ptr %78, align 8, !tbaa !11
%80 = icmp eq i64 %79, 0
br i1 %80, label %85, label %81
81: ; preds = %75
%82 = tail call ptr @nla_get_u32(i64 noundef %79) #3
%83 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 2
store ptr %82, ptr %83, align 8, !tbaa !21
%84 = load ptr, ptr @tb, align 8, !tbaa !5
br label %85
85: ; preds = %81, %75
%86 = phi ptr [ %84, %81 ], [ %76, %75 ]
%87 = load i64, ptr @SWITCH_ATTR_CPU_PORT, align 8, !tbaa !11
%88 = getelementptr inbounds i64, ptr %86, i64 %87
%89 = load i64, ptr %88, align 8, !tbaa !11
%90 = icmp eq i64 %89, 0
br i1 %90, label %95, label %91
91: ; preds = %85
%92 = tail call ptr @nla_get_u32(i64 noundef %89) #3
%93 = getelementptr inbounds %struct.switch_dev, ptr %35, i64 0, i32 1
store ptr %92, ptr %93, align 8, !tbaa !22
%94 = load ptr, ptr @tb, align 8, !tbaa !5
br label %95
95: ; preds = %91, %85
%96 = phi ptr [ %94, %91 ], [ %86, %85 ]
%97 = load i64, ptr @SWITCH_ATTR_PORTMAP, align 8, !tbaa !11
%98 = getelementptr inbounds i64, ptr %96, i64 %97
%99 = load i64, ptr %98, align 8, !tbaa !11
%100 = icmp eq i64 %99, 0
br i1 %100, label %103, label %101
101: ; preds = %95
%102 = tail call i32 @add_port_map(ptr noundef nonnull %35, i64 noundef %99) #3
br label %103
103: ; preds = %101, %95
%104 = getelementptr inbounds %struct.swlib_scan_arg, ptr %1, i64 0, i32 1
%105 = load ptr, ptr %104, align 8, !tbaa !23
%106 = icmp eq ptr %105, null
br i1 %106, label %109, label %107
107: ; preds = %103
%108 = load ptr, ptr %1, align 8, !tbaa !24
br label %109
109: ; preds = %103, %107
%110 = phi ptr [ %108, %107 ], [ %104, %103 ]
store ptr %35, ptr %110, align 8, !tbaa !5
store ptr %35, ptr %1, align 8, !tbaa !24
%111 = load i32, ptr @refcount, align 4, !tbaa !9
%112 = add nsw i32 %111, 1
store i32 %112, ptr @refcount, align 4, !tbaa !9
br label %113
113: ; preds = %34, %30, %11, %2, %109
%114 = load i32, ptr @NL_SKIP, align 4, !tbaa !9
ret i32 %114
}
declare ptr @nlmsg_data(i32 noundef) local_unnamed_addr #1
declare i32 @nlmsg_hdr(ptr noundef) local_unnamed_addr #1
declare i64 @nla_parse(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @genlmsg_attrdata(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @genlmsg_attrlen(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @nla_get_string(i64 noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @swlib_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @strncpy(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #2
declare ptr @nla_get_u32(i64 noundef) local_unnamed_addr #1
declare i32 @add_port_map(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !12, i64 16}
!14 = !{!"swlib_scan_arg", !6, i64 0, !6, i64 8, !12, i64 16}
!15 = !{!16, !10, i64 56}
!16 = !{!"switch_dev", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56}
!17 = !{!16, !6, i64 48}
!18 = !{!16, !6, i64 40}
!19 = !{!16, !6, i64 32}
!20 = !{!16, !6, i64 24}
!21 = !{!16, !6, i64 16}
!22 = !{!16, !6, i64 8}
!23 = !{!14, !6, i64 8}
!24 = !{!14, !6, i64 0}
| ; ModuleID = 'AnghaBench/lede/package/network/config/swconfig/src/extr_swlib.c_add_switch.c'
source_filename = "AnghaBench/lede/package/network/config/swconfig/src/extr_swlib.c_add_switch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@tb = common local_unnamed_addr global ptr null, align 8
@SWITCH_ATTR_MAX = common local_unnamed_addr global i32 0, align 4
@SWITCH_ATTR_DEV_NAME = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_ALIAS = common local_unnamed_addr global i64 0, align 8
@IFNAMSIZ = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_ID = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_NAME = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_PORTS = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_VLANS = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_CPU_PORT = common local_unnamed_addr global i64 0, align 8
@SWITCH_ATTR_PORTMAP = common local_unnamed_addr global i64 0, align 8
@refcount = common local_unnamed_addr global i32 0, align 4
@NL_SKIP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @add_switch], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @add_switch(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = tail call i32 @nlmsg_hdr(ptr noundef %0) #3
%4 = tail call ptr @nlmsg_data(i32 noundef %3) #3
%5 = load ptr, ptr @tb, align 8, !tbaa !6
%6 = load i32, ptr @SWITCH_ATTR_MAX, align 4, !tbaa !10
%7 = tail call i32 @genlmsg_attrdata(ptr noundef %4, i32 noundef 0) #3
%8 = tail call i32 @genlmsg_attrlen(ptr noundef %4, i32 noundef 0) #3
%9 = tail call i64 @nla_parse(ptr noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef null) #3
%10 = icmp slt i64 %9, 0
br i1 %10, label %113, label %11
11: ; preds = %2
%12 = load ptr, ptr @tb, align 8, !tbaa !6
%13 = load i64, ptr @SWITCH_ATTR_DEV_NAME, align 8, !tbaa !12
%14 = getelementptr inbounds i64, ptr %12, i64 %13
%15 = load i64, ptr %14, align 8, !tbaa !12
%16 = icmp eq i64 %15, 0
br i1 %16, label %113, label %17
17: ; preds = %11
%18 = tail call ptr @nla_get_string(i64 noundef %15) #3
%19 = load ptr, ptr @tb, align 8, !tbaa !6
%20 = load i64, ptr @SWITCH_ATTR_ALIAS, align 8, !tbaa !12
%21 = getelementptr inbounds i64, ptr %19, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !12
%23 = tail call ptr @nla_get_string(i64 noundef %22) #3
%24 = getelementptr inbounds i8, ptr %1, i64 16
%25 = load i64, ptr %24, align 8, !tbaa !14
%26 = icmp eq i64 %25, 0
br i1 %26, label %34, label %27
27: ; preds = %17
%28 = tail call i64 @strcmp(ptr noundef %18, i64 noundef %25) #3
%29 = icmp eq i64 %28, 0
br i1 %29, label %34, label %30
30: ; preds = %27
%31 = load i64, ptr %24, align 8, !tbaa !14
%32 = tail call i64 @strcmp(ptr noundef %23, i64 noundef %31) #3
%33 = icmp eq i64 %32, 0
br i1 %33, label %34, label %113
34: ; preds = %30, %27, %17
%35 = tail call ptr @swlib_alloc(i32 noundef 64) #3
%36 = icmp eq ptr %35, null
br i1 %36, label %113, label %37
37: ; preds = %34
%38 = getelementptr inbounds i8, ptr %35, i64 56
%39 = load i32, ptr %38, align 8, !tbaa !16
%40 = load i64, ptr @IFNAMSIZ, align 8, !tbaa !12
%41 = add nsw i64 %40, -1
%42 = tail call i32 @strncpy(i32 noundef %39, ptr noundef %18, i64 noundef %41) #3
%43 = tail call ptr @strdup(ptr noundef %23)
%44 = getelementptr inbounds i8, ptr %35, i64 48
store ptr %43, ptr %44, align 8, !tbaa !18
%45 = load ptr, ptr @tb, align 8, !tbaa !6
%46 = load i64, ptr @SWITCH_ATTR_ID, align 8, !tbaa !12
%47 = getelementptr inbounds i64, ptr %45, i64 %46
%48 = load i64, ptr %47, align 8, !tbaa !12
%49 = icmp eq i64 %48, 0
br i1 %49, label %54, label %50
50: ; preds = %37
%51 = tail call ptr @nla_get_u32(i64 noundef %48) #3
%52 = getelementptr inbounds i8, ptr %35, i64 40
store ptr %51, ptr %52, align 8, !tbaa !19
%53 = load ptr, ptr @tb, align 8, !tbaa !6
br label %54
54: ; preds = %50, %37
%55 = phi ptr [ %53, %50 ], [ %45, %37 ]
%56 = load i64, ptr @SWITCH_ATTR_NAME, align 8, !tbaa !12
%57 = getelementptr inbounds i64, ptr %55, i64 %56
%58 = load i64, ptr %57, align 8, !tbaa !12
%59 = icmp eq i64 %58, 0
br i1 %59, label %65, label %60
60: ; preds = %54
%61 = tail call ptr @nla_get_string(i64 noundef %58) #3
%62 = tail call ptr @strdup(ptr noundef %61)
%63 = getelementptr inbounds i8, ptr %35, i64 32
store ptr %62, ptr %63, align 8, !tbaa !20
%64 = load ptr, ptr @tb, align 8, !tbaa !6
br label %65
65: ; preds = %60, %54
%66 = phi ptr [ %64, %60 ], [ %55, %54 ]
%67 = load i64, ptr @SWITCH_ATTR_PORTS, align 8, !tbaa !12
%68 = getelementptr inbounds i64, ptr %66, i64 %67
%69 = load i64, ptr %68, align 8, !tbaa !12
%70 = icmp eq i64 %69, 0
br i1 %70, label %75, label %71
71: ; preds = %65
%72 = tail call ptr @nla_get_u32(i64 noundef %69) #3
%73 = getelementptr inbounds i8, ptr %35, i64 24
store ptr %72, ptr %73, align 8, !tbaa !21
%74 = load ptr, ptr @tb, align 8, !tbaa !6
br label %75
75: ; preds = %71, %65
%76 = phi ptr [ %74, %71 ], [ %66, %65 ]
%77 = load i64, ptr @SWITCH_ATTR_VLANS, align 8, !tbaa !12
%78 = getelementptr inbounds i64, ptr %76, i64 %77
%79 = load i64, ptr %78, align 8, !tbaa !12
%80 = icmp eq i64 %79, 0
br i1 %80, label %85, label %81
81: ; preds = %75
%82 = tail call ptr @nla_get_u32(i64 noundef %79) #3
%83 = getelementptr inbounds i8, ptr %35, i64 16
store ptr %82, ptr %83, align 8, !tbaa !22
%84 = load ptr, ptr @tb, align 8, !tbaa !6
br label %85
85: ; preds = %81, %75
%86 = phi ptr [ %84, %81 ], [ %76, %75 ]
%87 = load i64, ptr @SWITCH_ATTR_CPU_PORT, align 8, !tbaa !12
%88 = getelementptr inbounds i64, ptr %86, i64 %87
%89 = load i64, ptr %88, align 8, !tbaa !12
%90 = icmp eq i64 %89, 0
br i1 %90, label %95, label %91
91: ; preds = %85
%92 = tail call ptr @nla_get_u32(i64 noundef %89) #3
%93 = getelementptr inbounds i8, ptr %35, i64 8
store ptr %92, ptr %93, align 8, !tbaa !23
%94 = load ptr, ptr @tb, align 8, !tbaa !6
br label %95
95: ; preds = %91, %85
%96 = phi ptr [ %94, %91 ], [ %86, %85 ]
%97 = load i64, ptr @SWITCH_ATTR_PORTMAP, align 8, !tbaa !12
%98 = getelementptr inbounds i64, ptr %96, i64 %97
%99 = load i64, ptr %98, align 8, !tbaa !12
%100 = icmp eq i64 %99, 0
br i1 %100, label %103, label %101
101: ; preds = %95
%102 = tail call i32 @add_port_map(ptr noundef nonnull %35, i64 noundef %99) #3
br label %103
103: ; preds = %101, %95
%104 = getelementptr inbounds i8, ptr %1, i64 8
%105 = load ptr, ptr %104, align 8, !tbaa !24
%106 = icmp eq ptr %105, null
br i1 %106, label %109, label %107
107: ; preds = %103
%108 = load ptr, ptr %1, align 8, !tbaa !25
br label %109
109: ; preds = %103, %107
%110 = phi ptr [ %108, %107 ], [ %104, %103 ]
store ptr %35, ptr %110, align 8, !tbaa !6
store ptr %35, ptr %1, align 8, !tbaa !25
%111 = load i32, ptr @refcount, align 4, !tbaa !10
%112 = add nsw i32 %111, 1
store i32 %112, ptr @refcount, align 4, !tbaa !10
br label %113
113: ; preds = %34, %30, %11, %2, %109
%114 = load i32, ptr @NL_SKIP, align 4, !tbaa !10
ret i32 %114
}
declare ptr @nlmsg_data(i32 noundef) local_unnamed_addr #1
declare i32 @nlmsg_hdr(ptr noundef) local_unnamed_addr #1
declare i64 @nla_parse(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @genlmsg_attrdata(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @genlmsg_attrlen(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @nla_get_string(i64 noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @swlib_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @strncpy(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias ptr @strdup(ptr nocapture noundef readonly) local_unnamed_addr #2
declare ptr @nla_get_u32(i64 noundef) local_unnamed_addr #1
declare i32 @add_port_map(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !13, i64 16}
!15 = !{!"swlib_scan_arg", !7, i64 0, !7, i64 8, !13, i64 16}
!16 = !{!17, !11, i64 56}
!17 = !{!"switch_dev", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !11, i64 56}
!18 = !{!17, !7, i64 48}
!19 = !{!17, !7, i64 40}
!20 = !{!17, !7, i64 32}
!21 = !{!17, !7, i64 24}
!22 = !{!17, !7, i64 16}
!23 = !{!17, !7, i64 8}
!24 = !{!15, !7, i64 8}
!25 = !{!15, !7, i64 0}
| lede_package_network_config_swconfig_src_extr_swlib.c_add_switch |
; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lobject.c_l_str2int.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lobject.c_l_str2int.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MAXBY10 = dso_local local_unnamed_addr global i32 0, align 4
@MAXLASTD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @l_str2int], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @l_str2int(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca ptr, align 8
br label %4
4: ; preds = %4, %2
%5 = phi ptr [ %0, %2 ], [ %10, %4 ]
%6 = load i8, ptr %5, align 1, !tbaa !5
%7 = tail call i32 @cast_uchar(i8 noundef signext %6) #2
%8 = tail call i64 @lisspace(i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
%10 = getelementptr inbounds i8, ptr %5, i64 1
br i1 %9, label %11, label %4, !llvm.loop !8
11: ; preds = %4
store ptr %5, ptr %3, align 8, !tbaa !10
%12 = call i32 @isneg(ptr noundef nonnull %3) #2
%13 = load ptr, ptr %3, align 8, !tbaa !10
%14 = load i8, ptr %13, align 1, !tbaa !5
%15 = icmp eq i8 %14, 48
br i1 %15, label %16, label %38
16: ; preds = %11
%17 = getelementptr inbounds i8, ptr %13, i64 1
%18 = load i8, ptr %17, align 1, !tbaa !5
switch i8 %18, label %38 [
i8 120, label %19
i8 88, label %19
]
19: ; preds = %16, %16
%20 = getelementptr inbounds i8, ptr %13, i64 2
store ptr %20, ptr %3, align 8, !tbaa !10
%21 = load i8, ptr %20, align 1, !tbaa !5
%22 = call i32 @cast_uchar(i8 noundef signext %21) #2
%23 = call i64 @lisxdigit(i32 noundef %22) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %64, label %25
25: ; preds = %19, %25
%26 = phi i32 [ %31, %25 ], [ 0, %19 ]
%27 = shl nsw i32 %26, 4
%28 = load ptr, ptr %3, align 8, !tbaa !10
%29 = load i8, ptr %28, align 1, !tbaa !5
%30 = call i32 @luaO_hexavalue(i8 noundef signext %29) #2
%31 = add nsw i32 %30, %27
%32 = load ptr, ptr %3, align 8, !tbaa !10
%33 = getelementptr inbounds i8, ptr %32, i64 1
store ptr %33, ptr %3, align 8, !tbaa !10
%34 = load i8, ptr %33, align 1, !tbaa !5
%35 = call i32 @cast_uchar(i8 noundef signext %34) #2
%36 = call i64 @lisxdigit(i32 noundef %35) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %64, label %25, !llvm.loop !12
38: ; preds = %16, %11
%39 = call i32 @cast_uchar(i8 noundef signext %14) #2
%40 = call i64 @lisdigit(i32 noundef %39) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %64, label %42
42: ; preds = %38, %56
%43 = phi i32 [ %58, %56 ], [ 0, %38 ]
%44 = load ptr, ptr %3, align 8, !tbaa !10
%45 = load i8, ptr %44, align 1, !tbaa !5
%46 = sext i8 %45 to i32
%47 = add nsw i32 %46, -48
%48 = load i32, ptr @MAXBY10, align 4, !tbaa !13
%49 = icmp slt i32 %43, %48
br i1 %49, label %56, label %50
50: ; preds = %42
%51 = icmp sgt i32 %43, %48
br i1 %51, label %90, label %52
52: ; preds = %50
%53 = load i32, ptr @MAXLASTD, align 4, !tbaa !13
%54 = add nsw i32 %53, %12
%55 = icmp sgt i32 %47, %54
br i1 %55, label %90, label %56
56: ; preds = %52, %42
%57 = mul nsw i32 %43, 10
%58 = add nsw i32 %47, %57
%59 = getelementptr inbounds i8, ptr %44, i64 1
store ptr %59, ptr %3, align 8, !tbaa !10
%60 = load i8, ptr %59, align 1, !tbaa !5
%61 = call i32 @cast_uchar(i8 noundef signext %60) #2
%62 = call i64 @lisdigit(i32 noundef %61) #2
%63 = icmp eq i64 %62, 0
br i1 %63, label %64, label %42, !llvm.loop !15
64: ; preds = %25, %56, %19, %38
%65 = phi i1 [ false, %38 ], [ false, %19 ], [ true, %56 ], [ true, %25 ]
%66 = phi i32 [ 0, %38 ], [ 0, %19 ], [ %58, %56 ], [ %31, %25 ]
%67 = load ptr, ptr %3, align 8, !tbaa !10
%68 = load i8, ptr %67, align 1, !tbaa !5
%69 = call i32 @cast_uchar(i8 noundef signext %68) #2
%70 = call i64 @lisspace(i32 noundef %69) #2
%71 = icmp eq i64 %70, 0
br i1 %71, label %79, label %72
72: ; preds = %64, %72
%73 = load ptr, ptr %3, align 8, !tbaa !10
%74 = getelementptr inbounds i8, ptr %73, i64 1
store ptr %74, ptr %3, align 8, !tbaa !10
%75 = load i8, ptr %74, align 1, !tbaa !5
%76 = call i32 @cast_uchar(i8 noundef signext %75) #2
%77 = call i64 @lisspace(i32 noundef %76) #2
%78 = icmp eq i64 %77, 0
br i1 %78, label %79, label %72, !llvm.loop !16
79: ; preds = %72, %64
br i1 %65, label %80, label %90
80: ; preds = %79
%81 = load ptr, ptr %3, align 8, !tbaa !10
%82 = load i8, ptr %81, align 1, !tbaa !5
%83 = icmp eq i8 %82, 0
br i1 %83, label %84, label %90
84: ; preds = %80
%85 = icmp eq i32 %12, 0
%86 = sub i32 0, %66
%87 = select i1 %85, i32 %66, i32 %86
%88 = call i32 @l_castU2S(i32 noundef %87) #2
store i32 %88, ptr %1, align 4, !tbaa !13
%89 = load ptr, ptr %3, align 8, !tbaa !10
br label %90
90: ; preds = %50, %52, %79, %80, %84
%91 = phi ptr [ %89, %84 ], [ null, %80 ], [ null, %79 ], [ null, %52 ], [ null, %50 ]
ret ptr %91
}
declare i64 @lisspace(i32 noundef) local_unnamed_addr #1
declare i32 @cast_uchar(i8 noundef signext) local_unnamed_addr #1
declare i32 @isneg(ptr noundef) local_unnamed_addr #1
declare i64 @lisxdigit(i32 noundef) local_unnamed_addr #1
declare i32 @luaO_hexavalue(i8 noundef signext) local_unnamed_addr #1
declare i64 @lisdigit(i32 noundef) local_unnamed_addr #1
declare i32 @l_castU2S(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = distinct !{!12, !9}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !6, i64 0}
!15 = distinct !{!15, !9}
!16 = distinct !{!16, !9}
| ; ModuleID = 'AnghaBench/mjolnir/Mjolnir/lua/extr_lobject.c_l_str2int.c'
source_filename = "AnghaBench/mjolnir/Mjolnir/lua/extr_lobject.c_l_str2int.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAXBY10 = common local_unnamed_addr global i32 0, align 4
@MAXLASTD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @l_str2int], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @l_str2int(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
%3 = alloca ptr, align 8
br label %4
4: ; preds = %4, %2
%5 = phi ptr [ %0, %2 ], [ %10, %4 ]
%6 = load i8, ptr %5, align 1, !tbaa !6
%7 = tail call i32 @cast_uchar(i8 noundef signext %6) #2
%8 = tail call i64 @lisspace(i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
%10 = getelementptr inbounds i8, ptr %5, i64 1
br i1 %9, label %11, label %4, !llvm.loop !9
11: ; preds = %4
store ptr %5, ptr %3, align 8, !tbaa !11
%12 = call i32 @isneg(ptr noundef nonnull %3) #2
%13 = load ptr, ptr %3, align 8, !tbaa !11
%14 = load i8, ptr %13, align 1, !tbaa !6
%15 = icmp eq i8 %14, 48
br i1 %15, label %16, label %38
16: ; preds = %11
%17 = getelementptr inbounds i8, ptr %13, i64 1
%18 = load i8, ptr %17, align 1, !tbaa !6
switch i8 %18, label %38 [
i8 120, label %19
i8 88, label %19
]
19: ; preds = %16, %16
%20 = getelementptr inbounds i8, ptr %13, i64 2
store ptr %20, ptr %3, align 8, !tbaa !11
%21 = load i8, ptr %20, align 1, !tbaa !6
%22 = call i32 @cast_uchar(i8 noundef signext %21) #2
%23 = call i64 @lisxdigit(i32 noundef %22) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %64, label %25
25: ; preds = %19, %25
%26 = phi i32 [ %31, %25 ], [ 0, %19 ]
%27 = shl nsw i32 %26, 4
%28 = load ptr, ptr %3, align 8, !tbaa !11
%29 = load i8, ptr %28, align 1, !tbaa !6
%30 = call i32 @luaO_hexavalue(i8 noundef signext %29) #2
%31 = add nsw i32 %30, %27
%32 = load ptr, ptr %3, align 8, !tbaa !11
%33 = getelementptr inbounds i8, ptr %32, i64 1
store ptr %33, ptr %3, align 8, !tbaa !11
%34 = load i8, ptr %33, align 1, !tbaa !6
%35 = call i32 @cast_uchar(i8 noundef signext %34) #2
%36 = call i64 @lisxdigit(i32 noundef %35) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %64, label %25, !llvm.loop !13
38: ; preds = %16, %11
%39 = call i32 @cast_uchar(i8 noundef signext %14) #2
%40 = call i64 @lisdigit(i32 noundef %39) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %64, label %42
42: ; preds = %38, %56
%43 = phi i32 [ %58, %56 ], [ 0, %38 ]
%44 = load ptr, ptr %3, align 8, !tbaa !11
%45 = load i8, ptr %44, align 1, !tbaa !6
%46 = sext i8 %45 to i32
%47 = add nsw i32 %46, -48
%48 = load i32, ptr @MAXBY10, align 4, !tbaa !14
%49 = icmp slt i32 %43, %48
br i1 %49, label %56, label %50
50: ; preds = %42
%51 = icmp sgt i32 %43, %48
br i1 %51, label %90, label %52
52: ; preds = %50
%53 = load i32, ptr @MAXLASTD, align 4, !tbaa !14
%54 = add nsw i32 %53, %12
%55 = icmp sgt i32 %47, %54
br i1 %55, label %90, label %56
56: ; preds = %52, %42
%57 = mul nsw i32 %43, 10
%58 = add nsw i32 %47, %57
%59 = getelementptr inbounds i8, ptr %44, i64 1
store ptr %59, ptr %3, align 8, !tbaa !11
%60 = load i8, ptr %59, align 1, !tbaa !6
%61 = call i32 @cast_uchar(i8 noundef signext %60) #2
%62 = call i64 @lisdigit(i32 noundef %61) #2
%63 = icmp eq i64 %62, 0
br i1 %63, label %64, label %42, !llvm.loop !16
64: ; preds = %25, %56, %19, %38
%65 = phi i1 [ false, %38 ], [ false, %19 ], [ true, %56 ], [ true, %25 ]
%66 = phi i32 [ 0, %38 ], [ 0, %19 ], [ %58, %56 ], [ %31, %25 ]
%67 = load ptr, ptr %3, align 8, !tbaa !11
%68 = load i8, ptr %67, align 1, !tbaa !6
%69 = call i32 @cast_uchar(i8 noundef signext %68) #2
%70 = call i64 @lisspace(i32 noundef %69) #2
%71 = icmp eq i64 %70, 0
br i1 %71, label %79, label %72
72: ; preds = %64, %72
%73 = load ptr, ptr %3, align 8, !tbaa !11
%74 = getelementptr inbounds i8, ptr %73, i64 1
store ptr %74, ptr %3, align 8, !tbaa !11
%75 = load i8, ptr %74, align 1, !tbaa !6
%76 = call i32 @cast_uchar(i8 noundef signext %75) #2
%77 = call i64 @lisspace(i32 noundef %76) #2
%78 = icmp eq i64 %77, 0
br i1 %78, label %79, label %72, !llvm.loop !17
79: ; preds = %72, %64
br i1 %65, label %80, label %90
80: ; preds = %79
%81 = load ptr, ptr %3, align 8, !tbaa !11
%82 = load i8, ptr %81, align 1, !tbaa !6
%83 = icmp eq i8 %82, 0
br i1 %83, label %84, label %90
84: ; preds = %80
%85 = icmp eq i32 %12, 0
%86 = sub i32 0, %66
%87 = select i1 %85, i32 %66, i32 %86
%88 = call i32 @l_castU2S(i32 noundef %87) #2
store i32 %88, ptr %1, align 4, !tbaa !14
%89 = load ptr, ptr %3, align 8, !tbaa !11
br label %90
90: ; preds = %50, %52, %79, %80, %84
%91 = phi ptr [ %89, %84 ], [ null, %80 ], [ null, %79 ], [ null, %52 ], [ null, %50 ]
ret ptr %91
}
declare i64 @lisspace(i32 noundef) local_unnamed_addr #1
declare i32 @cast_uchar(i8 noundef signext) local_unnamed_addr #1
declare i32 @isneg(ptr noundef) local_unnamed_addr #1
declare i64 @lisxdigit(i32 noundef) local_unnamed_addr #1
declare i32 @luaO_hexavalue(i8 noundef signext) local_unnamed_addr #1
declare i64 @lisdigit(i32 noundef) local_unnamed_addr #1
declare i32 @l_castU2S(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !10}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
| mjolnir_Mjolnir_lua_extr_lobject.c_l_str2int |
; ModuleID = 'AnghaBench/linux/net/smc/extr_smc_pnet.c_smc_pnet_fill_entry.c'
source_filename = "AnghaBench/linux/net/smc/extr_smc_pnet.c_smc_pnet_fill_entry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.net = type { i32 }
%struct.smc_user_pnetentry = type { i32, i32, i32, i32, i32, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@SMC_PNETID_NAME = dso_local local_unnamed_addr global i64 0, align 8
@SMC_PNETID_ETHNAME = dso_local local_unnamed_addr global i64 0, align 8
@init_net = dso_local global %struct.net zeroinitializer, align 4
@SMC_PNETID_IBNAME = dso_local local_unnamed_addr global i64 0, align 8
@SMC_PNETID_IBPORT = dso_local local_unnamed_addr global i64 0, align 8
@SMC_MAX_PORTS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @smc_pnet_fill_entry], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @smc_pnet_fill_entry(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = tail call i32 @memset(ptr noundef %1, i32 noundef 0, i32 noundef 24) #2
%5 = getelementptr inbounds %struct.smc_user_pnetentry, ptr %1, i64 0, i32 5
%6 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %5) #2
%7 = load i32, ptr @EINVAL, align 4, !tbaa !5
%8 = load i64, ptr @SMC_PNETID_NAME, align 8, !tbaa !9
%9 = getelementptr inbounds ptr, ptr %2, i64 %8
%10 = load ptr, ptr %9, align 8, !tbaa !11
%11 = icmp eq ptr %10, null
br i1 %11, label %63, label %12
12: ; preds = %3
%13 = tail call i64 @nla_data(ptr noundef nonnull %10) #2
%14 = inttoptr i64 %13 to ptr
%15 = getelementptr inbounds %struct.smc_user_pnetentry, ptr %1, i64 0, i32 4
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = tail call i32 @smc_pnetid_valid(ptr noundef %14, i32 noundef %16) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %63, label %19
19: ; preds = %12
%20 = load i64, ptr @SMC_PNETID_ETHNAME, align 8, !tbaa !9
%21 = getelementptr inbounds ptr, ptr %2, i64 %20
%22 = load ptr, ptr %21, align 8, !tbaa !11
%23 = icmp eq ptr %22, null
br i1 %23, label %31, label %24
24: ; preds = %19
%25 = load i32, ptr @EINVAL, align 4, !tbaa !5
%26 = tail call i64 @nla_data(ptr noundef nonnull %22) #2
%27 = inttoptr i64 %26 to ptr
%28 = tail call i32 @dev_get_by_name(ptr noundef %0, ptr noundef %27) #2
%29 = getelementptr inbounds %struct.smc_user_pnetentry, ptr %1, i64 0, i32 3
store i32 %28, ptr %29, align 4, !tbaa !15
%30 = icmp eq i32 %28, 0
br i1 %30, label %63, label %31
31: ; preds = %24, %19
%32 = icmp eq ptr %0, @init_net
br i1 %32, label %33, label %66
33: ; preds = %31
%34 = load i32, ptr @EINVAL, align 4, !tbaa !5
%35 = load i64, ptr @SMC_PNETID_IBNAME, align 8, !tbaa !9
%36 = getelementptr inbounds ptr, ptr %2, i64 %35
%37 = load ptr, ptr %36, align 8, !tbaa !11
%38 = icmp eq ptr %37, null
br i1 %38, label %66, label %39
39: ; preds = %33
%40 = tail call i64 @nla_data(ptr noundef nonnull %37) #2
%41 = inttoptr i64 %40 to ptr
%42 = tail call ptr @strim(ptr noundef %41) #2
%43 = tail call i32 @smc_pnet_find_ib(ptr noundef %42) #2
%44 = getelementptr inbounds %struct.smc_user_pnetentry, ptr %1, i64 0, i32 1
store i32 %43, ptr %44, align 4, !tbaa !16
%45 = tail call i32 @smc_pnet_find_smcd(ptr noundef %42) #2
%46 = getelementptr inbounds %struct.smc_user_pnetentry, ptr %1, i64 0, i32 2
store i32 %45, ptr %46, align 4, !tbaa !17
%47 = load i32, ptr %44, align 4, !tbaa !16
%48 = icmp eq i32 %47, 0
%49 = icmp eq i32 %45, 0
%50 = select i1 %48, i1 %49, i1 false
br i1 %50, label %63, label %51
51: ; preds = %39
br i1 %48, label %66, label %52
52: ; preds = %51
%53 = load i64, ptr @SMC_PNETID_IBPORT, align 8, !tbaa !9
%54 = getelementptr inbounds ptr, ptr %2, i64 %53
%55 = load ptr, ptr %54, align 8, !tbaa !11
%56 = icmp eq ptr %55, null
br i1 %56, label %63, label %57
57: ; preds = %52
%58 = tail call i32 @nla_get_u8(ptr noundef nonnull %55) #2
store i32 %58, ptr %1, align 4, !tbaa !18
%59 = icmp slt i32 %58, 1
%60 = load i32, ptr @SMC_MAX_PORTS, align 4
%61 = icmp sgt i32 %58, %60
%62 = select i1 %59, i1 true, i1 %61
br i1 %62, label %63, label %66
63: ; preds = %39, %57, %52, %24, %12, %3
%64 = phi i32 [ %34, %57 ], [ %34, %52 ], [ %25, %24 ], [ %7, %12 ], [ %7, %3 ], [ %34, %39 ]
%65 = sub nsw i32 0, %64
br label %66
66: ; preds = %33, %51, %57, %31, %63
%67 = phi i32 [ %65, %63 ], [ 0, %31 ], [ 0, %57 ], [ 0, %51 ], [ 0, %33 ]
ret i32 %67
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i64 @nla_data(ptr noundef) local_unnamed_addr #1
declare i32 @smc_pnetid_valid(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_get_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @strim(ptr noundef) local_unnamed_addr #1
declare i32 @smc_pnet_find_ib(ptr noundef) local_unnamed_addr #1
declare i32 @smc_pnet_find_smcd(ptr noundef) local_unnamed_addr #1
declare i32 @nla_get_u8(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !6, i64 16}
!14 = !{!"smc_user_pnetentry", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20}
!15 = !{!14, !6, i64 12}
!16 = !{!14, !6, i64 4}
!17 = !{!14, !6, i64 8}
!18 = !{!14, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/smc/extr_smc_pnet.c_smc_pnet_fill_entry.c'
source_filename = "AnghaBench/linux/net/smc/extr_smc_pnet.c_smc_pnet_fill_entry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.net = type { i32 }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@SMC_PNETID_NAME = common local_unnamed_addr global i64 0, align 8
@SMC_PNETID_ETHNAME = common local_unnamed_addr global i64 0, align 8
@init_net = common global %struct.net zeroinitializer, align 4
@SMC_PNETID_IBNAME = common local_unnamed_addr global i64 0, align 8
@SMC_PNETID_IBPORT = common local_unnamed_addr global i64 0, align 8
@SMC_MAX_PORTS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @smc_pnet_fill_entry], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @smc_pnet_fill_entry(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = tail call i32 @memset(ptr noundef %1, i32 noundef 0, i32 noundef 24) #2
%5 = getelementptr inbounds i8, ptr %1, i64 20
%6 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %5) #2
%7 = load i32, ptr @EINVAL, align 4, !tbaa !6
%8 = load i64, ptr @SMC_PNETID_NAME, align 8, !tbaa !10
%9 = getelementptr inbounds ptr, ptr %2, i64 %8
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = icmp eq ptr %10, null
br i1 %11, label %63, label %12
12: ; preds = %3
%13 = tail call i64 @nla_data(ptr noundef nonnull %10) #2
%14 = inttoptr i64 %13 to ptr
%15 = getelementptr inbounds i8, ptr %1, i64 16
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = tail call i32 @smc_pnetid_valid(ptr noundef %14, i32 noundef %16) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %63, label %19
19: ; preds = %12
%20 = load i64, ptr @SMC_PNETID_ETHNAME, align 8, !tbaa !10
%21 = getelementptr inbounds ptr, ptr %2, i64 %20
%22 = load ptr, ptr %21, align 8, !tbaa !12
%23 = icmp eq ptr %22, null
br i1 %23, label %31, label %24
24: ; preds = %19
%25 = load i32, ptr @EINVAL, align 4, !tbaa !6
%26 = tail call i64 @nla_data(ptr noundef nonnull %22) #2
%27 = inttoptr i64 %26 to ptr
%28 = tail call i32 @dev_get_by_name(ptr noundef %0, ptr noundef %27) #2
%29 = getelementptr inbounds i8, ptr %1, i64 12
store i32 %28, ptr %29, align 4, !tbaa !16
%30 = icmp eq i32 %28, 0
br i1 %30, label %63, label %31
31: ; preds = %24, %19
%32 = icmp eq ptr %0, @init_net
br i1 %32, label %33, label %66
33: ; preds = %31
%34 = load i32, ptr @EINVAL, align 4, !tbaa !6
%35 = load i64, ptr @SMC_PNETID_IBNAME, align 8, !tbaa !10
%36 = getelementptr inbounds ptr, ptr %2, i64 %35
%37 = load ptr, ptr %36, align 8, !tbaa !12
%38 = icmp eq ptr %37, null
br i1 %38, label %66, label %39
39: ; preds = %33
%40 = tail call i64 @nla_data(ptr noundef nonnull %37) #2
%41 = inttoptr i64 %40 to ptr
%42 = tail call ptr @strim(ptr noundef %41) #2
%43 = tail call i32 @smc_pnet_find_ib(ptr noundef %42) #2
%44 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %43, ptr %44, align 4, !tbaa !17
%45 = tail call i32 @smc_pnet_find_smcd(ptr noundef %42) #2
%46 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %45, ptr %46, align 4, !tbaa !18
%47 = load i32, ptr %44, align 4, !tbaa !17
%48 = icmp eq i32 %47, 0
%49 = icmp eq i32 %45, 0
%50 = select i1 %48, i1 %49, i1 false
br i1 %50, label %63, label %51
51: ; preds = %39
br i1 %48, label %66, label %52
52: ; preds = %51
%53 = load i64, ptr @SMC_PNETID_IBPORT, align 8, !tbaa !10
%54 = getelementptr inbounds ptr, ptr %2, i64 %53
%55 = load ptr, ptr %54, align 8, !tbaa !12
%56 = icmp eq ptr %55, null
br i1 %56, label %63, label %57
57: ; preds = %52
%58 = tail call i32 @nla_get_u8(ptr noundef nonnull %55) #2
store i32 %58, ptr %1, align 4, !tbaa !19
%59 = icmp slt i32 %58, 1
%60 = load i32, ptr @SMC_MAX_PORTS, align 4
%61 = icmp sgt i32 %58, %60
%62 = select i1 %59, i1 true, i1 %61
br i1 %62, label %63, label %66
63: ; preds = %39, %57, %52, %24, %12, %3
%64 = phi i32 [ %34, %57 ], [ %34, %52 ], [ %25, %24 ], [ %7, %12 ], [ %7, %3 ], [ %34, %39 ]
%65 = sub nsw i32 0, %64
br label %66
66: ; preds = %33, %51, %57, %31, %63
%67 = phi i32 [ %65, %63 ], [ 0, %31 ], [ 0, %57 ], [ 0, %51 ], [ 0, %33 ]
ret i32 %67
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i64 @nla_data(ptr noundef) local_unnamed_addr #1
declare i32 @smc_pnetid_valid(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_get_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @strim(ptr noundef) local_unnamed_addr #1
declare i32 @smc_pnet_find_ib(ptr noundef) local_unnamed_addr #1
declare i32 @smc_pnet_find_smcd(ptr noundef) local_unnamed_addr #1
declare i32 @nla_get_u8(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !7, i64 16}
!15 = !{!"smc_user_pnetentry", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!16 = !{!15, !7, i64 12}
!17 = !{!15, !7, i64 4}
!18 = !{!15, !7, i64 8}
!19 = !{!15, !7, i64 0}
| linux_net_smc_extr_smc_pnet.c_smc_pnet_fill_entry |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dsi.c_dsi_probe.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dsi.c_dsi_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dsi_data = type { i64, i32, ptr, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, %struct.TYPE_5__, i32, i64, i32, i32, ptr }
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_6__ = type { i64, i32, ptr }
%struct.dsi_module_id_data = type { i64, i32 }
%struct.TYPE_8__ = type { i64, ptr, i32 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@dsi_framedone_timeout_work_callback = dso_local local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"proto\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"phy\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"pll\00", align 1
@.str.3 = private unnamed_addr constant [25 x i8] c"platform_get_irq failed\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@omap_dsi_irq_handler = dso_local local_unnamed_addr global i32 0, align 4
@IRQF_SHARED = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [20 x i8] c"request_irq failed\0A\00", align 1
@.str.5 = private unnamed_addr constant [4 x i8] c"vdd\00", align 1
@EPROBE_DEFER = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [29 x i8] c"can't get DSI VDD regulator\0A\00", align 1
@dsi_soc_devices = dso_local local_unnamed_addr global i32 0, align 4
@dsi_of_match = dso_local local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [24 x i8] c"unsupported DSI module\0A\00", align 1
@DSI_MODEL_OMAP4 = dso_local local_unnamed_addr global i64 0, align 8
@DSI_MODEL_OMAP5 = dso_local local_unnamed_addr global i64 0, align 8
@.str.8 = private unnamed_addr constant [21 x i8] c"omap4_padconf_global\00", align 1
@.str.9 = private unnamed_addr constant [21 x i8] c"omap5_padconf_global\00", align 1
@DSI_VC_SOURCE_L4 = dso_local local_unnamed_addr global i32 0, align 4
@DSI_QUIRK_GNQ = dso_local local_unnamed_addr global i32 0, align 4
@DSI_GNQ = dso_local local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [42 x i8] c"Failed to populate DSI child devices: %d\0A\00", align 1
@.str.11 = private unnamed_addr constant [21 x i8] c"Invalid DSI DT data\0A\00", align 1
@dsi_component_ops = dso_local global i32 0, align 4
@dsi_te_timeout = dso_local local_unnamed_addr global i32 0, align 4
@jiffies = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dsi_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dsi_probe(ptr noundef %0) #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%3 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 120, i32 noundef %2) #3
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%7 = sub nsw i32 0, %6
br label %195
8: ; preds = %1
%9 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 19
store ptr %0, ptr %9, align 8, !tbaa !9
%10 = tail call i32 @dev_set_drvdata(ptr noundef %0, ptr noundef nonnull %3) #3
%11 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 18
%12 = tail call i32 @spin_lock_init(ptr noundef nonnull %11) #3
%13 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 17
%14 = tail call i32 @spin_lock_init(ptr noundef nonnull %13) #3
%15 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 16
store i64 0, ptr %15, align 8, !tbaa !14
%16 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 13
%17 = tail call i32 @mutex_init(ptr noundef nonnull %16) #3
%18 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 12
%19 = tail call i32 @sema_init(ptr noundef nonnull %18, i32 noundef 1) #3
%20 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 11
%21 = load i32, ptr @dsi_framedone_timeout_work_callback, align 4, !tbaa !5
%22 = tail call i32 @INIT_DEFERRABLE_WORK(ptr noundef nonnull %20, i32 noundef %21) #3
%23 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !5
%24 = tail call ptr @platform_get_resource_byname(ptr noundef %0, i32 noundef %23, ptr noundef nonnull @.str) #3
%25 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %24) #3
%26 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 9
store ptr %25, ptr %26, align 8, !tbaa !15
%27 = tail call i64 @IS_ERR(ptr noundef %25) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %8
%30 = load ptr, ptr %26, align 8, !tbaa !15
%31 = tail call i32 @PTR_ERR(ptr noundef %30) #3
br label %195
32: ; preds = %8
%33 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !5
%34 = tail call ptr @platform_get_resource_byname(ptr noundef %0, i32 noundef %33, ptr noundef nonnull @.str.1) #3
%35 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %34) #3
%36 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 8
store ptr %35, ptr %36, align 8, !tbaa !16
%37 = tail call i64 @IS_ERR(ptr noundef %35) #3
%38 = icmp eq i64 %37, 0
br i1 %38, label %42, label %39
39: ; preds = %32
%40 = load ptr, ptr %36, align 8, !tbaa !16
%41 = tail call i32 @PTR_ERR(ptr noundef %40) #3
br label %195
42: ; preds = %32
%43 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !5
%44 = tail call ptr @platform_get_resource_byname(ptr noundef %0, i32 noundef %43, ptr noundef nonnull @.str.2) #3
%45 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %44) #3
%46 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 7
store ptr %45, ptr %46, align 8, !tbaa !17
%47 = tail call i64 @IS_ERR(ptr noundef %45) #3
%48 = icmp eq i64 %47, 0
br i1 %48, label %52, label %49
49: ; preds = %42
%50 = load ptr, ptr %46, align 8, !tbaa !17
%51 = tail call i32 @PTR_ERR(ptr noundef %50) #3
br label %195
52: ; preds = %42
%53 = tail call i64 @platform_get_irq(ptr noundef %0, i32 noundef 0) #3
store i64 %53, ptr %3, align 8, !tbaa !18
%54 = icmp slt i64 %53, 0
br i1 %54, label %55, label %59
55: ; preds = %52
%56 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.3) #3
%57 = load i32, ptr @ENODEV, align 4, !tbaa !5
%58 = sub nsw i32 0, %57
br label %195
59: ; preds = %52
%60 = load i32, ptr @omap_dsi_irq_handler, align 4, !tbaa !5
%61 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !5
%62 = tail call i32 @dev_name(ptr noundef %0) #3
%63 = tail call i32 @devm_request_irq(ptr noundef %0, i64 noundef %53, i32 noundef %60, i32 noundef %61, i32 noundef %62, ptr noundef nonnull %3) #3
%64 = icmp slt i32 %63, 0
br i1 %64, label %65, label %67
65: ; preds = %59
%66 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.4) #3
br label %195
67: ; preds = %59
%68 = tail call ptr @devm_regulator_get(ptr noundef %0, ptr noundef nonnull @.str.5) #3
%69 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 6
store ptr %68, ptr %69, align 8, !tbaa !19
%70 = tail call i64 @IS_ERR(ptr noundef %68) #3
%71 = icmp eq i64 %70, 0
br i1 %71, label %83, label %72
72: ; preds = %67
%73 = load ptr, ptr %69, align 8, !tbaa !19
%74 = tail call i32 @PTR_ERR(ptr noundef %73) #3
%75 = load i32, ptr @EPROBE_DEFER, align 4, !tbaa !5
%76 = sub nsw i32 0, %75
%77 = icmp eq i32 %74, %76
br i1 %77, label %80, label %78
78: ; preds = %72
%79 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.6) #3
br label %80
80: ; preds = %78, %72
%81 = load ptr, ptr %69, align 8, !tbaa !19
%82 = tail call i32 @PTR_ERR(ptr noundef %81) #3
br label %195
83: ; preds = %67
%84 = load i32, ptr @dsi_soc_devices, align 4, !tbaa !5
%85 = tail call ptr @soc_device_match(i32 noundef %84) #3
%86 = icmp eq ptr %85, null
br i1 %86, label %87, label %91
87: ; preds = %83
%88 = load i32, ptr @dsi_of_match, align 4, !tbaa !5
%89 = load i32, ptr %0, align 4, !tbaa !20
%90 = tail call ptr @of_match_node(i32 noundef %88, i32 noundef %89) #3
br label %91
91: ; preds = %83, %87
%92 = phi ptr [ %90, %87 ], [ %85, %83 ]
%93 = load ptr, ptr %92, align 8, !tbaa !22
%94 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 2
store ptr %93, ptr %94, align 8
%95 = getelementptr inbounds %struct.TYPE_6__, ptr %93, i64 0, i32 2
%96 = load ptr, ptr %95, align 8, !tbaa !23
%97 = load i64, ptr %96, align 8, !tbaa !25
%98 = icmp eq i64 %97, 0
br i1 %98, label %109, label %99
99: ; preds = %91
%100 = load i64, ptr %24, align 8, !tbaa !27
br label %101
101: ; preds = %99, %105
%102 = phi i64 [ %97, %99 ], [ %107, %105 ]
%103 = phi ptr [ %96, %99 ], [ %106, %105 ]
%104 = icmp eq i64 %102, %100
br i1 %104, label %113, label %105
105: ; preds = %101
%106 = getelementptr inbounds %struct.dsi_module_id_data, ptr %103, i64 1
%107 = load i64, ptr %106, align 8, !tbaa !25
%108 = icmp eq i64 %107, 0
br i1 %108, label %109, label %101, !llvm.loop !29
109: ; preds = %105, %91
%110 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.7) #3
%111 = load i32, ptr @ENODEV, align 4, !tbaa !5
%112 = sub nsw i32 0, %111
br label %195
113: ; preds = %101
%114 = getelementptr inbounds %struct.dsi_module_id_data, ptr %103, i64 0, i32 1
%115 = load i32, ptr %114, align 8, !tbaa !31
%116 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 5
store i32 %115, ptr %116, align 4, !tbaa !32
%117 = load i64, ptr %93, align 8, !tbaa !33
%118 = load i64, ptr @DSI_MODEL_OMAP4, align 8, !tbaa !34
%119 = icmp eq i64 %117, %118
%120 = load i64, ptr @DSI_MODEL_OMAP5, align 8
%121 = icmp eq i64 %117, %120
%122 = select i1 %119, i1 true, i1 %121
br i1 %122, label %123, label %134
123: ; preds = %113
%124 = select i1 %119, ptr @.str.8, ptr @.str.9
%125 = tail call ptr @of_find_node_by_name(ptr noundef null, ptr noundef nonnull %124) #3
%126 = icmp eq ptr %125, null
br i1 %126, label %127, label %130
127: ; preds = %123
%128 = load i32, ptr @ENODEV, align 4, !tbaa !5
%129 = sub nsw i32 0, %128
br label %195
130: ; preds = %123
%131 = tail call i32 @syscon_node_to_regmap(ptr noundef nonnull %125) #3
%132 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 4
store i32 %131, ptr %132, align 8, !tbaa !35
%133 = tail call i32 @of_node_put(ptr noundef nonnull %125) #3
br label %134
134: ; preds = %130, %113
%135 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 3
%136 = load ptr, ptr %135, align 8, !tbaa !36
%137 = tail call i32 @ARRAY_SIZE(ptr noundef %136) #3
%138 = icmp eq i32 %137, 0
br i1 %138, label %149, label %139
139: ; preds = %134, %139
%140 = phi i64 [ %145, %139 ], [ 0, %134 ]
%141 = load i32, ptr @DSI_VC_SOURCE_L4, align 4, !tbaa !5
%142 = load ptr, ptr %135, align 8, !tbaa !36
%143 = getelementptr inbounds %struct.TYPE_8__, ptr %142, i64 %140, i32 2
store i32 %141, ptr %143, align 8, !tbaa !37
%144 = getelementptr inbounds %struct.TYPE_8__, ptr %142, i64 %140
%145 = add nuw nsw i64 %140, 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %144, i8 0, i64 16, i1 false)
%146 = tail call i32 @ARRAY_SIZE(ptr noundef %142) #3
%147 = zext i32 %146 to i64
%148 = icmp ult i64 %145, %147
br i1 %148, label %139, label %149, !llvm.loop !39
149: ; preds = %139, %134
%150 = tail call i32 @dsi_get_clocks(ptr noundef nonnull %3) #3
%151 = icmp eq i32 %150, 0
br i1 %151, label %152, label %195
152: ; preds = %149
%153 = tail call i32 @pm_runtime_enable(ptr noundef %0) #3
%154 = load ptr, ptr %94, align 8, !tbaa !40
%155 = getelementptr inbounds %struct.TYPE_6__, ptr %154, i64 0, i32 1
%156 = load i32, ptr %155, align 8, !tbaa !41
%157 = load i32, ptr @DSI_QUIRK_GNQ, align 4, !tbaa !5
%158 = and i32 %157, %156
%159 = icmp eq i32 %158, 0
br i1 %159, label %167, label %160
160: ; preds = %152
%161 = tail call i32 @dsi_runtime_get(ptr noundef nonnull %3) #3
%162 = load i32, ptr @DSI_GNQ, align 4, !tbaa !5
%163 = tail call i32 @REG_GET(ptr noundef nonnull %3, i32 noundef %162, i32 noundef 11, i32 noundef 9) #3
%164 = add nsw i32 %163, 1
%165 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 1
store i32 %164, ptr %165, align 8, !tbaa !42
%166 = tail call i32 @dsi_runtime_put(ptr noundef nonnull %3) #3
br label %169
167: ; preds = %152
%168 = getelementptr inbounds %struct.dsi_data, ptr %3, i64 0, i32 1
store i32 3, ptr %168, align 8, !tbaa !42
br label %169
169: ; preds = %167, %160
%170 = load i32, ptr %0, align 4, !tbaa !20
%171 = tail call i32 @of_platform_populate(i32 noundef %170, ptr noundef null, ptr noundef null, ptr noundef nonnull %0) #3
%172 = icmp eq i32 %171, 0
br i1 %172, label %175, label %173
173: ; preds = %169
%174 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.10, i32 noundef %171) #3
br label %192
175: ; preds = %169
%176 = tail call i32 @dsi_init_output(ptr noundef nonnull %3) #3
%177 = icmp eq i32 %176, 0
br i1 %177, label %178, label %189
178: ; preds = %175
%179 = tail call i32 @dsi_probe_of(ptr noundef nonnull %3) #3
%180 = icmp eq i32 %179, 0
br i1 %180, label %183, label %181
181: ; preds = %178
%182 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.11) #3
br label %186
183: ; preds = %178
%184 = tail call i32 @component_add(ptr noundef nonnull %0, ptr noundef nonnull @dsi_component_ops) #3
%185 = icmp eq i32 %184, 0
br i1 %185, label %195, label %186
186: ; preds = %183, %181
%187 = phi i32 [ %179, %181 ], [ %184, %183 ]
%188 = tail call i32 @dsi_uninit_output(ptr noundef nonnull %3) #3
br label %189
189: ; preds = %175, %186
%190 = phi i32 [ %176, %175 ], [ %187, %186 ]
%191 = tail call i32 @of_platform_depopulate(ptr noundef nonnull %0) #3
br label %192
192: ; preds = %189, %173
%193 = phi i32 [ %171, %173 ], [ %190, %189 ]
%194 = tail call i32 @pm_runtime_disable(ptr noundef nonnull %0) #3
br label %195
195: ; preds = %127, %183, %149, %192, %109, %80, %65, %55, %49, %39, %29, %5
%196 = phi i32 [ %31, %29 ], [ %41, %39 ], [ %51, %49 ], [ %58, %55 ], [ %63, %65 ], [ %82, %80 ], [ %112, %109 ], [ %193, %192 ], [ %7, %5 ], [ %150, %149 ], [ 0, %183 ], [ %129, %127 ]
ret i32 %196
}
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @sema_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @INIT_DEFERRABLE_WORK(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @platform_get_resource_byname(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i64 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DSSERR(ptr noundef, ...) local_unnamed_addr #1
declare i32 @devm_request_irq(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
declare ptr @devm_regulator_get(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @soc_device_match(i32 noundef) local_unnamed_addr #1
declare ptr @of_match_node(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @of_find_node_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @syscon_node_to_regmap(ptr noundef) local_unnamed_addr #1
declare i32 @of_node_put(ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @dsi_get_clocks(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_enable(ptr noundef) local_unnamed_addr #1
declare i32 @dsi_runtime_get(ptr noundef) local_unnamed_addr #1
declare i32 @REG_GET(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dsi_runtime_put(ptr noundef) local_unnamed_addr #1
declare i32 @of_platform_populate(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dsi_init_output(ptr noundef) local_unnamed_addr #1
declare i32 @dsi_probe_of(ptr noundef) local_unnamed_addr #1
declare i32 @component_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dsi_uninit_output(ptr noundef) local_unnamed_addr #1
declare i32 @of_platform_depopulate(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 112}
!10 = !{!"dsi_data", !11, i64 0, !6, i64 8, !12, i64 16, !12, i64 24, !6, i64 32, !6, i64 36, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !13, i64 88, !6, i64 92, !11, i64 96, !6, i64 104, !6, i64 108, !12, i64 112}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"TYPE_5__", !6, i64 0}
!14 = !{!10, !11, i64 96}
!15 = !{!10, !12, i64 64}
!16 = !{!10, !12, i64 56}
!17 = !{!10, !12, i64 48}
!18 = !{!10, !11, i64 0}
!19 = !{!10, !12, i64 40}
!20 = !{!21, !6, i64 0}
!21 = !{!"device", !6, i64 0}
!22 = !{!12, !12, i64 0}
!23 = !{!24, !12, i64 16}
!24 = !{!"TYPE_6__", !11, i64 0, !6, i64 8, !12, i64 16}
!25 = !{!26, !11, i64 0}
!26 = !{!"dsi_module_id_data", !11, i64 0, !6, i64 8}
!27 = !{!28, !11, i64 0}
!28 = !{!"resource", !11, i64 0}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
!31 = !{!26, !6, i64 8}
!32 = !{!10, !6, i64 36}
!33 = !{!24, !11, i64 0}
!34 = !{!11, !11, i64 0}
!35 = !{!10, !6, i64 32}
!36 = !{!10, !12, i64 24}
!37 = !{!38, !6, i64 16}
!38 = !{!"TYPE_8__", !11, i64 0, !12, i64 8, !6, i64 16}
!39 = distinct !{!39, !30}
!40 = !{!10, !12, i64 16}
!41 = !{!24, !6, i64 8}
!42 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dsi.c_dsi_probe.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dsi.c_dsi_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_8__ = type { i64, ptr, i32 }
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@dsi_framedone_timeout_work_callback = common local_unnamed_addr global i32 0, align 4
@IORESOURCE_MEM = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"proto\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"phy\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"pll\00", align 1
@.str.3 = private unnamed_addr constant [25 x i8] c"platform_get_irq failed\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@omap_dsi_irq_handler = common local_unnamed_addr global i32 0, align 4
@IRQF_SHARED = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [20 x i8] c"request_irq failed\0A\00", align 1
@.str.5 = private unnamed_addr constant [4 x i8] c"vdd\00", align 1
@EPROBE_DEFER = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [29 x i8] c"can't get DSI VDD regulator\0A\00", align 1
@dsi_soc_devices = common local_unnamed_addr global i32 0, align 4
@dsi_of_match = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [24 x i8] c"unsupported DSI module\0A\00", align 1
@DSI_MODEL_OMAP4 = common local_unnamed_addr global i64 0, align 8
@DSI_MODEL_OMAP5 = common local_unnamed_addr global i64 0, align 8
@.str.8 = private unnamed_addr constant [21 x i8] c"omap4_padconf_global\00", align 1
@.str.9 = private unnamed_addr constant [21 x i8] c"omap5_padconf_global\00", align 1
@DSI_VC_SOURCE_L4 = common local_unnamed_addr global i32 0, align 4
@DSI_QUIRK_GNQ = common local_unnamed_addr global i32 0, align 4
@DSI_GNQ = common local_unnamed_addr global i32 0, align 4
@.str.10 = private unnamed_addr constant [42 x i8] c"Failed to populate DSI child devices: %d\0A\00", align 1
@.str.11 = private unnamed_addr constant [21 x i8] c"Invalid DSI DT data\0A\00", align 1
@dsi_component_ops = common global i32 0, align 4
@dsi_te_timeout = common local_unnamed_addr global i32 0, align 4
@jiffies = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dsi_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dsi_probe(ptr noundef %0) #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%3 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 120, i32 noundef %2) #3
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%7 = sub nsw i32 0, %6
br label %195
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %3, i64 112
store ptr %0, ptr %9, align 8, !tbaa !10
%10 = tail call i32 @dev_set_drvdata(ptr noundef %0, ptr noundef nonnull %3) #3
%11 = getelementptr inbounds i8, ptr %3, i64 108
%12 = tail call i32 @spin_lock_init(ptr noundef nonnull %11) #3
%13 = getelementptr inbounds i8, ptr %3, i64 104
%14 = tail call i32 @spin_lock_init(ptr noundef nonnull %13) #3
%15 = getelementptr inbounds i8, ptr %3, i64 96
store i64 0, ptr %15, align 8, !tbaa !15
%16 = getelementptr inbounds i8, ptr %3, i64 84
%17 = tail call i32 @mutex_init(ptr noundef nonnull %16) #3
%18 = getelementptr inbounds i8, ptr %3, i64 80
%19 = tail call i32 @sema_init(ptr noundef nonnull %18, i32 noundef 1) #3
%20 = getelementptr inbounds i8, ptr %3, i64 76
%21 = load i32, ptr @dsi_framedone_timeout_work_callback, align 4, !tbaa !6
%22 = tail call i32 @INIT_DEFERRABLE_WORK(ptr noundef nonnull %20, i32 noundef %21) #3
%23 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !6
%24 = tail call ptr @platform_get_resource_byname(ptr noundef %0, i32 noundef %23, ptr noundef nonnull @.str) #3
%25 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %24) #3
%26 = getelementptr inbounds i8, ptr %3, i64 64
store ptr %25, ptr %26, align 8, !tbaa !16
%27 = tail call i64 @IS_ERR(ptr noundef %25) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %8
%30 = load ptr, ptr %26, align 8, !tbaa !16
%31 = tail call i32 @PTR_ERR(ptr noundef %30) #3
br label %195
32: ; preds = %8
%33 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !6
%34 = tail call ptr @platform_get_resource_byname(ptr noundef %0, i32 noundef %33, ptr noundef nonnull @.str.1) #3
%35 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %34) #3
%36 = getelementptr inbounds i8, ptr %3, i64 56
store ptr %35, ptr %36, align 8, !tbaa !17
%37 = tail call i64 @IS_ERR(ptr noundef %35) #3
%38 = icmp eq i64 %37, 0
br i1 %38, label %42, label %39
39: ; preds = %32
%40 = load ptr, ptr %36, align 8, !tbaa !17
%41 = tail call i32 @PTR_ERR(ptr noundef %40) #3
br label %195
42: ; preds = %32
%43 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !6
%44 = tail call ptr @platform_get_resource_byname(ptr noundef %0, i32 noundef %43, ptr noundef nonnull @.str.2) #3
%45 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %44) #3
%46 = getelementptr inbounds i8, ptr %3, i64 48
store ptr %45, ptr %46, align 8, !tbaa !18
%47 = tail call i64 @IS_ERR(ptr noundef %45) #3
%48 = icmp eq i64 %47, 0
br i1 %48, label %52, label %49
49: ; preds = %42
%50 = load ptr, ptr %46, align 8, !tbaa !18
%51 = tail call i32 @PTR_ERR(ptr noundef %50) #3
br label %195
52: ; preds = %42
%53 = tail call i64 @platform_get_irq(ptr noundef %0, i32 noundef 0) #3
store i64 %53, ptr %3, align 8, !tbaa !19
%54 = icmp slt i64 %53, 0
br i1 %54, label %55, label %59
55: ; preds = %52
%56 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.3) #3
%57 = load i32, ptr @ENODEV, align 4, !tbaa !6
%58 = sub nsw i32 0, %57
br label %195
59: ; preds = %52
%60 = load i32, ptr @omap_dsi_irq_handler, align 4, !tbaa !6
%61 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !6
%62 = tail call i32 @dev_name(ptr noundef %0) #3
%63 = tail call i32 @devm_request_irq(ptr noundef %0, i64 noundef %53, i32 noundef %60, i32 noundef %61, i32 noundef %62, ptr noundef nonnull %3) #3
%64 = icmp slt i32 %63, 0
br i1 %64, label %65, label %67
65: ; preds = %59
%66 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.4) #3
br label %195
67: ; preds = %59
%68 = tail call ptr @devm_regulator_get(ptr noundef %0, ptr noundef nonnull @.str.5) #3
%69 = getelementptr inbounds i8, ptr %3, i64 40
store ptr %68, ptr %69, align 8, !tbaa !20
%70 = tail call i64 @IS_ERR(ptr noundef %68) #3
%71 = icmp eq i64 %70, 0
br i1 %71, label %83, label %72
72: ; preds = %67
%73 = load ptr, ptr %69, align 8, !tbaa !20
%74 = tail call i32 @PTR_ERR(ptr noundef %73) #3
%75 = load i32, ptr @EPROBE_DEFER, align 4, !tbaa !6
%76 = sub nsw i32 0, %75
%77 = icmp eq i32 %74, %76
br i1 %77, label %80, label %78
78: ; preds = %72
%79 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.6) #3
br label %80
80: ; preds = %78, %72
%81 = load ptr, ptr %69, align 8, !tbaa !20
%82 = tail call i32 @PTR_ERR(ptr noundef %81) #3
br label %195
83: ; preds = %67
%84 = load i32, ptr @dsi_soc_devices, align 4, !tbaa !6
%85 = tail call ptr @soc_device_match(i32 noundef %84) #3
%86 = icmp eq ptr %85, null
br i1 %86, label %87, label %91
87: ; preds = %83
%88 = load i32, ptr @dsi_of_match, align 4, !tbaa !6
%89 = load i32, ptr %0, align 4, !tbaa !21
%90 = tail call ptr @of_match_node(i32 noundef %88, i32 noundef %89) #3
br label %91
91: ; preds = %83, %87
%92 = phi ptr [ %90, %87 ], [ %85, %83 ]
%93 = load ptr, ptr %92, align 8, !tbaa !23
%94 = getelementptr inbounds i8, ptr %3, i64 16
store ptr %93, ptr %94, align 8
%95 = getelementptr inbounds i8, ptr %93, i64 16
%96 = load ptr, ptr %95, align 8, !tbaa !24
%97 = load i64, ptr %96, align 8, !tbaa !26
%98 = icmp eq i64 %97, 0
br i1 %98, label %109, label %99
99: ; preds = %91
%100 = load i64, ptr %24, align 8, !tbaa !28
br label %101
101: ; preds = %99, %105
%102 = phi i64 [ %97, %99 ], [ %107, %105 ]
%103 = phi ptr [ %96, %99 ], [ %106, %105 ]
%104 = icmp eq i64 %102, %100
br i1 %104, label %113, label %105
105: ; preds = %101
%106 = getelementptr inbounds i8, ptr %103, i64 16
%107 = load i64, ptr %106, align 8, !tbaa !26
%108 = icmp eq i64 %107, 0
br i1 %108, label %109, label %101, !llvm.loop !30
109: ; preds = %105, %91
%110 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.7) #3
%111 = load i32, ptr @ENODEV, align 4, !tbaa !6
%112 = sub nsw i32 0, %111
br label %195
113: ; preds = %101
%114 = getelementptr inbounds i8, ptr %103, i64 8
%115 = load i32, ptr %114, align 8, !tbaa !32
%116 = getelementptr inbounds i8, ptr %3, i64 36
store i32 %115, ptr %116, align 4, !tbaa !33
%117 = load i64, ptr %93, align 8, !tbaa !34
%118 = load i64, ptr @DSI_MODEL_OMAP4, align 8, !tbaa !35
%119 = icmp eq i64 %117, %118
%120 = load i64, ptr @DSI_MODEL_OMAP5, align 8
%121 = icmp eq i64 %117, %120
%122 = select i1 %119, i1 true, i1 %121
br i1 %122, label %123, label %134
123: ; preds = %113
%124 = select i1 %119, ptr @.str.8, ptr @.str.9
%125 = tail call ptr @of_find_node_by_name(ptr noundef null, ptr noundef nonnull %124) #3
%126 = icmp eq ptr %125, null
br i1 %126, label %127, label %130
127: ; preds = %123
%128 = load i32, ptr @ENODEV, align 4, !tbaa !6
%129 = sub nsw i32 0, %128
br label %195
130: ; preds = %123
%131 = tail call i32 @syscon_node_to_regmap(ptr noundef nonnull %125) #3
%132 = getelementptr inbounds i8, ptr %3, i64 32
store i32 %131, ptr %132, align 8, !tbaa !36
%133 = tail call i32 @of_node_put(ptr noundef nonnull %125) #3
br label %134
134: ; preds = %130, %113
%135 = getelementptr inbounds i8, ptr %3, i64 24
%136 = load ptr, ptr %135, align 8, !tbaa !37
%137 = tail call i32 @ARRAY_SIZE(ptr noundef %136) #3
%138 = icmp eq i32 %137, 0
br i1 %138, label %149, label %139
139: ; preds = %134, %139
%140 = phi i64 [ %145, %139 ], [ 0, %134 ]
%141 = load i32, ptr @DSI_VC_SOURCE_L4, align 4, !tbaa !6
%142 = load ptr, ptr %135, align 8, !tbaa !37
%143 = getelementptr inbounds %struct.TYPE_8__, ptr %142, i64 %140, i32 2
store i32 %141, ptr %143, align 8, !tbaa !38
%144 = getelementptr inbounds %struct.TYPE_8__, ptr %142, i64 %140
%145 = add nuw nsw i64 %140, 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %144, i8 0, i64 16, i1 false)
%146 = tail call i32 @ARRAY_SIZE(ptr noundef %142) #3
%147 = zext i32 %146 to i64
%148 = icmp ult i64 %145, %147
br i1 %148, label %139, label %149, !llvm.loop !40
149: ; preds = %139, %134
%150 = tail call i32 @dsi_get_clocks(ptr noundef nonnull %3) #3
%151 = icmp eq i32 %150, 0
br i1 %151, label %152, label %195
152: ; preds = %149
%153 = tail call i32 @pm_runtime_enable(ptr noundef %0) #3
%154 = load ptr, ptr %94, align 8, !tbaa !41
%155 = getelementptr inbounds i8, ptr %154, i64 8
%156 = load i32, ptr %155, align 8, !tbaa !42
%157 = load i32, ptr @DSI_QUIRK_GNQ, align 4, !tbaa !6
%158 = and i32 %157, %156
%159 = icmp eq i32 %158, 0
br i1 %159, label %167, label %160
160: ; preds = %152
%161 = tail call i32 @dsi_runtime_get(ptr noundef nonnull %3) #3
%162 = load i32, ptr @DSI_GNQ, align 4, !tbaa !6
%163 = tail call i32 @REG_GET(ptr noundef nonnull %3, i32 noundef %162, i32 noundef 11, i32 noundef 9) #3
%164 = add nsw i32 %163, 1
%165 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %164, ptr %165, align 8, !tbaa !43
%166 = tail call i32 @dsi_runtime_put(ptr noundef nonnull %3) #3
br label %169
167: ; preds = %152
%168 = getelementptr inbounds i8, ptr %3, i64 8
store i32 3, ptr %168, align 8, !tbaa !43
br label %169
169: ; preds = %167, %160
%170 = load i32, ptr %0, align 4, !tbaa !21
%171 = tail call i32 @of_platform_populate(i32 noundef %170, ptr noundef null, ptr noundef null, ptr noundef nonnull %0) #3
%172 = icmp eq i32 %171, 0
br i1 %172, label %175, label %173
173: ; preds = %169
%174 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.10, i32 noundef %171) #3
br label %192
175: ; preds = %169
%176 = tail call i32 @dsi_init_output(ptr noundef nonnull %3) #3
%177 = icmp eq i32 %176, 0
br i1 %177, label %178, label %189
178: ; preds = %175
%179 = tail call i32 @dsi_probe_of(ptr noundef nonnull %3) #3
%180 = icmp eq i32 %179, 0
br i1 %180, label %183, label %181
181: ; preds = %178
%182 = tail call i32 (ptr, ...) @DSSERR(ptr noundef nonnull @.str.11) #3
br label %186
183: ; preds = %178
%184 = tail call i32 @component_add(ptr noundef nonnull %0, ptr noundef nonnull @dsi_component_ops) #3
%185 = icmp eq i32 %184, 0
br i1 %185, label %195, label %186
186: ; preds = %183, %181
%187 = phi i32 [ %179, %181 ], [ %184, %183 ]
%188 = tail call i32 @dsi_uninit_output(ptr noundef nonnull %3) #3
br label %189
189: ; preds = %175, %186
%190 = phi i32 [ %176, %175 ], [ %187, %186 ]
%191 = tail call i32 @of_platform_depopulate(ptr noundef nonnull %0) #3
br label %192
192: ; preds = %189, %173
%193 = phi i32 [ %171, %173 ], [ %190, %189 ]
%194 = tail call i32 @pm_runtime_disable(ptr noundef nonnull %0) #3
br label %195
195: ; preds = %127, %183, %149, %192, %109, %80, %65, %55, %49, %39, %29, %5
%196 = phi i32 [ %31, %29 ], [ %41, %39 ], [ %51, %49 ], [ %58, %55 ], [ %63, %65 ], [ %82, %80 ], [ %112, %109 ], [ %193, %192 ], [ %7, %5 ], [ %150, %149 ], [ 0, %183 ], [ %129, %127 ]
ret i32 %196
}
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @sema_init(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @INIT_DEFERRABLE_WORK(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @platform_get_resource_byname(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i64 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DSSERR(ptr noundef, ...) local_unnamed_addr #1
declare i32 @devm_request_irq(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
declare ptr @devm_regulator_get(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @soc_device_match(i32 noundef) local_unnamed_addr #1
declare ptr @of_match_node(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @of_find_node_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @syscon_node_to_regmap(ptr noundef) local_unnamed_addr #1
declare i32 @of_node_put(ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @dsi_get_clocks(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_enable(ptr noundef) local_unnamed_addr #1
declare i32 @dsi_runtime_get(ptr noundef) local_unnamed_addr #1
declare i32 @REG_GET(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dsi_runtime_put(ptr noundef) local_unnamed_addr #1
declare i32 @of_platform_populate(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dsi_init_output(ptr noundef) local_unnamed_addr #1
declare i32 @dsi_probe_of(ptr noundef) local_unnamed_addr #1
declare i32 @component_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dsi_uninit_output(ptr noundef) local_unnamed_addr #1
declare i32 @of_platform_depopulate(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_disable(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 112}
!11 = !{!"dsi_data", !12, i64 0, !7, i64 8, !13, i64 16, !13, i64 24, !7, i64 32, !7, i64 36, !13, i64 40, !13, i64 48, !13, i64 56, !13, i64 64, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !14, i64 88, !7, i64 92, !12, i64 96, !7, i64 104, !7, i64 108, !13, i64 112}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_5__", !7, i64 0}
!15 = !{!11, !12, i64 96}
!16 = !{!11, !13, i64 64}
!17 = !{!11, !13, i64 56}
!18 = !{!11, !13, i64 48}
!19 = !{!11, !12, i64 0}
!20 = !{!11, !13, i64 40}
!21 = !{!22, !7, i64 0}
!22 = !{!"device", !7, i64 0}
!23 = !{!13, !13, i64 0}
!24 = !{!25, !13, i64 16}
!25 = !{!"TYPE_6__", !12, i64 0, !7, i64 8, !13, i64 16}
!26 = !{!27, !12, i64 0}
!27 = !{!"dsi_module_id_data", !12, i64 0, !7, i64 8}
!28 = !{!29, !12, i64 0}
!29 = !{!"resource", !12, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!27, !7, i64 8}
!33 = !{!11, !7, i64 36}
!34 = !{!25, !12, i64 0}
!35 = !{!12, !12, i64 0}
!36 = !{!11, !7, i64 32}
!37 = !{!11, !13, i64 24}
!38 = !{!39, !7, i64 16}
!39 = !{!"TYPE_8__", !12, i64 0, !13, i64 8, !7, i64 16}
!40 = distinct !{!40, !31}
!41 = !{!11, !13, i64 16}
!42 = !{!25, !7, i64 8}
!43 = !{!11, !7, i64 8}
| linux_drivers_gpu_drm_omapdrm_dss_extr_dsi.c_dsi_probe |
; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_init.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [19 x i8] c"no devices found!\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [31 x i8] c"cannot create OTG controller!\0A\00", align 1
@.str.2 = private unnamed_addr constant [31 x i8] c"cannot create SPH controller!\0A\00", align 1
@OXU_CHIPIRQEN_SET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @oxu_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @oxu_init(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%7 = tail call i32 @oxu_configuration(ptr noundef %0, ptr noundef %3) #2
%8 = tail call i32 @oxu_verify_id(ptr noundef %0, ptr noundef %3) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #2
%12 = load i32, ptr @ENODEV, align 4, !tbaa !5
%13 = sub nsw i32 0, %12
br label %42
14: ; preds = %5
%15 = tail call ptr @oxu_create(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef 1) #2
%16 = tail call i64 @IS_ERR(ptr noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %14
%19 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1) #2
%20 = tail call i32 @PTR_ERR(ptr noundef %15) #2
br label %42
21: ; preds = %14
%22 = load ptr, ptr %6, align 8, !tbaa !9
store ptr %15, ptr %22, align 8, !tbaa !12
%23 = tail call ptr @oxu_create(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef 0) #2
%24 = tail call i64 @IS_ERR(ptr noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %35, label %26
26: ; preds = %21
%27 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.2) #2
%28 = tail call i32 @PTR_ERR(ptr noundef %23) #2
%29 = load ptr, ptr %6, align 8, !tbaa !9
%30 = load ptr, ptr %29, align 8, !tbaa !12
%31 = tail call i32 @usb_remove_hcd(ptr noundef %30) #2
%32 = load ptr, ptr %6, align 8, !tbaa !9
%33 = load ptr, ptr %32, align 8, !tbaa !12
%34 = tail call i32 @usb_put_hcd(ptr noundef %33) #2
br label %42
35: ; preds = %21
%36 = load ptr, ptr %6, align 8, !tbaa !9
%37 = getelementptr inbounds ptr, ptr %36, i64 1
store ptr %23, ptr %37, align 8, !tbaa !12
%38 = load i32, ptr @OXU_CHIPIRQEN_SET, align 4, !tbaa !5
%39 = tail call i32 @oxu_readl(ptr noundef %3, i32 noundef %38) #2
%40 = or i32 %39, 3
%41 = tail call i32 @oxu_writel(ptr noundef %3, i32 noundef %38, i32 noundef %40) #2
br label %42
42: ; preds = %18, %26, %35, %10
%43 = phi i32 [ %13, %10 ], [ 0, %35 ], [ %20, %18 ], [ %28, %26 ]
ret i32 %43
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @oxu_configuration(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @oxu_verify_id(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @oxu_create(ptr noundef, i64 noundef, i64 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @oxu_writel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @oxu_readl(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usb_remove_hcd(ptr noundef) local_unnamed_addr #1
declare i32 @usb_put_hcd(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"oxu_info", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_init.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [19 x i8] c"no devices found!\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [31 x i8] c"cannot create OTG controller!\0A\00", align 1
@.str.2 = private unnamed_addr constant [31 x i8] c"cannot create SPH controller!\0A\00", align 1
@OXU_CHIPIRQEN_SET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @oxu_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @oxu_init(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%7 = tail call i32 @oxu_configuration(ptr noundef %0, ptr noundef %3) #2
%8 = tail call i32 @oxu_verify_id(ptr noundef %0, ptr noundef %3) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %5
%11 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str) #2
%12 = load i32, ptr @ENODEV, align 4, !tbaa !6
%13 = sub nsw i32 0, %12
br label %42
14: ; preds = %5
%15 = tail call ptr @oxu_create(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef 1) #2
%16 = tail call i64 @IS_ERR(ptr noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %14
%19 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1) #2
%20 = tail call i32 @PTR_ERR(ptr noundef %15) #2
br label %42
21: ; preds = %14
%22 = load ptr, ptr %6, align 8, !tbaa !10
store ptr %15, ptr %22, align 8, !tbaa !13
%23 = tail call ptr @oxu_create(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef 0) #2
%24 = tail call i64 @IS_ERR(ptr noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %35, label %26
26: ; preds = %21
%27 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.2) #2
%28 = tail call i32 @PTR_ERR(ptr noundef %23) #2
%29 = load ptr, ptr %6, align 8, !tbaa !10
%30 = load ptr, ptr %29, align 8, !tbaa !13
%31 = tail call i32 @usb_remove_hcd(ptr noundef %30) #2
%32 = load ptr, ptr %6, align 8, !tbaa !10
%33 = load ptr, ptr %32, align 8, !tbaa !13
%34 = tail call i32 @usb_put_hcd(ptr noundef %33) #2
br label %42
35: ; preds = %21
%36 = load ptr, ptr %6, align 8, !tbaa !10
%37 = getelementptr inbounds i8, ptr %36, i64 8
store ptr %23, ptr %37, align 8, !tbaa !13
%38 = load i32, ptr @OXU_CHIPIRQEN_SET, align 4, !tbaa !6
%39 = tail call i32 @oxu_readl(ptr noundef %3, i32 noundef %38) #2
%40 = or i32 %39, 3
%41 = tail call i32 @oxu_writel(ptr noundef %3, i32 noundef %38, i32 noundef %40) #2
br label %42
42: ; preds = %18, %26, %35, %10
%43 = phi i32 [ %13, %10 ], [ 0, %35 ], [ %20, %18 ], [ %28, %26 ]
ret i32 %43
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @oxu_configuration(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @oxu_verify_id(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @oxu_create(ptr noundef, i64 noundef, i64 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @oxu_writel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @oxu_readl(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @usb_remove_hcd(ptr noundef) local_unnamed_addr #1
declare i32 @usb_put_hcd(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"oxu_info", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_drivers_usb_host_extr_oxu210hp-hcd.c_oxu_init |
; ModuleID = 'AnghaBench/postgres/src/backend/access/gin/extr_ginxlog.c_ginRedoDeletePage.c'
source_filename = "AnghaBench/postgres/src/backend/access/gin/extr_ginxlog.c_ginRedoDeletePage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, i32, i32 }
%struct.TYPE_9__ = type { i32, i32 }
@BLK_NEEDS_REDO = dso_local local_unnamed_addr global i64 0, align 8
@GIN_DELETED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ginRedoDeletePage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ginRedoDeletePage(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = tail call i64 @XLogRecGetData(ptr noundef nonnull %0) #3
%7 = inttoptr i64 %6 to ptr
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%8 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %0, i32 noundef 2, ptr noundef nonnull %4) #3
%9 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !10
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %1
%12 = load i32, ptr %4, align 4, !tbaa !12
%13 = call i32 @BufferGetPage(i32 noundef %12) #3
%14 = call i32 @GinPageIsData(i32 noundef %13) #3
%15 = call i32 @Assert(i32 noundef %14) #3
%16 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 0, i32 2
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = call ptr @GinPageGetOpaque(i32 noundef %13) #3
%19 = getelementptr inbounds %struct.TYPE_9__, ptr %18, i64 0, i32 1
store i32 %17, ptr %19, align 4, !tbaa !15
%20 = call i32 @PageSetLSN(i32 noundef %13, i32 noundef %5) #3
%21 = load i32, ptr %4, align 4, !tbaa !12
%22 = call i32 @MarkBufferDirty(i32 noundef %21) #3
br label %23
23: ; preds = %11, %1
%24 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %0, i32 noundef 0, ptr noundef nonnull %2) #3
%25 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !10
%26 = icmp eq i64 %24, %25
br i1 %26, label %27, label %40
27: ; preds = %23
%28 = load i32, ptr %2, align 4, !tbaa !12
%29 = call i32 @BufferGetPage(i32 noundef %28) #3
%30 = call i32 @GinPageIsData(i32 noundef %29) #3
%31 = call i32 @Assert(i32 noundef %30) #3
%32 = load i32, ptr @GIN_DELETED, align 4, !tbaa !12
%33 = call ptr @GinPageGetOpaque(i32 noundef %29) #3
store i32 %32, ptr %33, align 4, !tbaa !17
%34 = getelementptr inbounds %struct.TYPE_7__, ptr %7, i64 0, i32 1
%35 = load i32, ptr %34, align 4, !tbaa !18
%36 = call i32 @GinPageSetDeleteXid(i32 noundef %29, i32 noundef %35) #3
%37 = call i32 @PageSetLSN(i32 noundef %29, i32 noundef %5) #3
%38 = load i32, ptr %2, align 4, !tbaa !12
%39 = call i32 @MarkBufferDirty(i32 noundef %38) #3
br label %40
40: ; preds = %27, %23
%41 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull %3) #3
%42 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !10
%43 = icmp eq i64 %41, %42
br i1 %43, label %44, label %58
44: ; preds = %40
%45 = load i32, ptr %3, align 4, !tbaa !12
%46 = call i32 @BufferGetPage(i32 noundef %45) #3
%47 = call i32 @GinPageIsData(i32 noundef %46) #3
%48 = call i32 @Assert(i32 noundef %47) #3
%49 = call i32 @GinPageIsLeaf(i32 noundef %46) #3
%50 = icmp eq i32 %49, 0
%51 = zext i1 %50 to i32
%52 = call i32 @Assert(i32 noundef %51) #3
%53 = load i32, ptr %7, align 4, !tbaa !19
%54 = call i32 @GinPageDeletePostingItem(i32 noundef %46, i32 noundef %53) #3
%55 = call i32 @PageSetLSN(i32 noundef %46, i32 noundef %5) #3
%56 = load i32, ptr %3, align 4, !tbaa !12
%57 = call i32 @MarkBufferDirty(i32 noundef %56) #3
br label %58
58: ; preds = %44, %40
%59 = load i32, ptr %4, align 4, !tbaa !12
%60 = call i64 @BufferIsValid(i32 noundef %59) #3
%61 = icmp eq i64 %60, 0
br i1 %61, label %65, label %62
62: ; preds = %58
%63 = load i32, ptr %4, align 4, !tbaa !12
%64 = call i32 @UnlockReleaseBuffer(i32 noundef %63) #3
br label %65
65: ; preds = %62, %58
%66 = load i32, ptr %3, align 4, !tbaa !12
%67 = call i64 @BufferIsValid(i32 noundef %66) #3
%68 = icmp eq i64 %67, 0
br i1 %68, label %72, label %69
69: ; preds = %65
%70 = load i32, ptr %3, align 4, !tbaa !12
%71 = call i32 @UnlockReleaseBuffer(i32 noundef %70) #3
br label %72
72: ; preds = %69, %65
%73 = load i32, ptr %2, align 4, !tbaa !12
%74 = call i64 @BufferIsValid(i32 noundef %73) #3
%75 = icmp eq i64 %74, 0
br i1 %75, label %79, label %76
76: ; preds = %72
%77 = load i32, ptr %2, align 4, !tbaa !12
%78 = call i32 @UnlockReleaseBuffer(i32 noundef %77) #3
br label %79
79: ; preds = %76, %72
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @XLogRecGetData(ptr noundef) local_unnamed_addr #2
declare i64 @XLogReadBufferForRedo(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BufferGetPage(i32 noundef) local_unnamed_addr #2
declare i32 @Assert(i32 noundef) local_unnamed_addr #2
declare i32 @GinPageIsData(i32 noundef) local_unnamed_addr #2
declare ptr @GinPageGetOpaque(i32 noundef) local_unnamed_addr #2
declare i32 @PageSetLSN(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MarkBufferDirty(i32 noundef) local_unnamed_addr #2
declare i32 @GinPageSetDeleteXid(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GinPageIsLeaf(i32 noundef) local_unnamed_addr #2
declare i32 @GinPageDeletePostingItem(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @BufferIsValid(i32 noundef) local_unnamed_addr #2
declare i32 @UnlockReleaseBuffer(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_8__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"TYPE_7__", !7, i64 0, !7, i64 4, !7, i64 8}
!15 = !{!16, !7, i64 4}
!16 = !{!"TYPE_9__", !7, i64 0, !7, i64 4}
!17 = !{!16, !7, i64 0}
!18 = !{!14, !7, i64 4}
!19 = !{!14, !7, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/access/gin/extr_ginxlog.c_ginRedoDeletePage.c'
source_filename = "AnghaBench/postgres/src/backend/access/gin/extr_ginxlog.c_ginRedoDeletePage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BLK_NEEDS_REDO = common local_unnamed_addr global i64 0, align 8
@GIN_DELETED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ginRedoDeletePage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ginRedoDeletePage(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = tail call i64 @XLogRecGetData(ptr noundef nonnull %0) #3
%7 = inttoptr i64 %6 to ptr
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%8 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %0, i32 noundef 2, ptr noundef nonnull %4) #3
%9 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !11
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %1
%12 = load i32, ptr %4, align 4, !tbaa !13
%13 = call i32 @BufferGetPage(i32 noundef %12) #3
%14 = call i32 @GinPageIsData(i32 noundef %13) #3
%15 = call i32 @Assert(i32 noundef %14) #3
%16 = getelementptr inbounds i8, ptr %7, i64 8
%17 = load i32, ptr %16, align 4, !tbaa !14
%18 = call ptr @GinPageGetOpaque(i32 noundef %13) #3
%19 = getelementptr inbounds i8, ptr %18, i64 4
store i32 %17, ptr %19, align 4, !tbaa !16
%20 = call i32 @PageSetLSN(i32 noundef %13, i32 noundef %5) #3
%21 = load i32, ptr %4, align 4, !tbaa !13
%22 = call i32 @MarkBufferDirty(i32 noundef %21) #3
br label %23
23: ; preds = %11, %1
%24 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %0, i32 noundef 0, ptr noundef nonnull %2) #3
%25 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !11
%26 = icmp eq i64 %24, %25
br i1 %26, label %27, label %40
27: ; preds = %23
%28 = load i32, ptr %2, align 4, !tbaa !13
%29 = call i32 @BufferGetPage(i32 noundef %28) #3
%30 = call i32 @GinPageIsData(i32 noundef %29) #3
%31 = call i32 @Assert(i32 noundef %30) #3
%32 = load i32, ptr @GIN_DELETED, align 4, !tbaa !13
%33 = call ptr @GinPageGetOpaque(i32 noundef %29) #3
store i32 %32, ptr %33, align 4, !tbaa !18
%34 = getelementptr inbounds i8, ptr %7, i64 4
%35 = load i32, ptr %34, align 4, !tbaa !19
%36 = call i32 @GinPageSetDeleteXid(i32 noundef %29, i32 noundef %35) #3
%37 = call i32 @PageSetLSN(i32 noundef %29, i32 noundef %5) #3
%38 = load i32, ptr %2, align 4, !tbaa !13
%39 = call i32 @MarkBufferDirty(i32 noundef %38) #3
br label %40
40: ; preds = %27, %23
%41 = call i64 @XLogReadBufferForRedo(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull %3) #3
%42 = load i64, ptr @BLK_NEEDS_REDO, align 8, !tbaa !11
%43 = icmp eq i64 %41, %42
br i1 %43, label %44, label %58
44: ; preds = %40
%45 = load i32, ptr %3, align 4, !tbaa !13
%46 = call i32 @BufferGetPage(i32 noundef %45) #3
%47 = call i32 @GinPageIsData(i32 noundef %46) #3
%48 = call i32 @Assert(i32 noundef %47) #3
%49 = call i32 @GinPageIsLeaf(i32 noundef %46) #3
%50 = icmp eq i32 %49, 0
%51 = zext i1 %50 to i32
%52 = call i32 @Assert(i32 noundef %51) #3
%53 = load i32, ptr %7, align 4, !tbaa !20
%54 = call i32 @GinPageDeletePostingItem(i32 noundef %46, i32 noundef %53) #3
%55 = call i32 @PageSetLSN(i32 noundef %46, i32 noundef %5) #3
%56 = load i32, ptr %3, align 4, !tbaa !13
%57 = call i32 @MarkBufferDirty(i32 noundef %56) #3
br label %58
58: ; preds = %44, %40
%59 = load i32, ptr %4, align 4, !tbaa !13
%60 = call i64 @BufferIsValid(i32 noundef %59) #3
%61 = icmp eq i64 %60, 0
br i1 %61, label %65, label %62
62: ; preds = %58
%63 = load i32, ptr %4, align 4, !tbaa !13
%64 = call i32 @UnlockReleaseBuffer(i32 noundef %63) #3
br label %65
65: ; preds = %62, %58
%66 = load i32, ptr %3, align 4, !tbaa !13
%67 = call i64 @BufferIsValid(i32 noundef %66) #3
%68 = icmp eq i64 %67, 0
br i1 %68, label %72, label %69
69: ; preds = %65
%70 = load i32, ptr %3, align 4, !tbaa !13
%71 = call i32 @UnlockReleaseBuffer(i32 noundef %70) #3
br label %72
72: ; preds = %69, %65
%73 = load i32, ptr %2, align 4, !tbaa !13
%74 = call i64 @BufferIsValid(i32 noundef %73) #3
%75 = icmp eq i64 %74, 0
br i1 %75, label %79, label %76
76: ; preds = %72
%77 = load i32, ptr %2, align 4, !tbaa !13
%78 = call i32 @UnlockReleaseBuffer(i32 noundef %77) #3
br label %79
79: ; preds = %76, %72
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @XLogRecGetData(ptr noundef) local_unnamed_addr #2
declare i64 @XLogReadBufferForRedo(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BufferGetPage(i32 noundef) local_unnamed_addr #2
declare i32 @Assert(i32 noundef) local_unnamed_addr #2
declare i32 @GinPageIsData(i32 noundef) local_unnamed_addr #2
declare ptr @GinPageGetOpaque(i32 noundef) local_unnamed_addr #2
declare i32 @PageSetLSN(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MarkBufferDirty(i32 noundef) local_unnamed_addr #2
declare i32 @GinPageSetDeleteXid(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GinPageIsLeaf(i32 noundef) local_unnamed_addr #2
declare i32 @GinPageDeletePostingItem(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @BufferIsValid(i32 noundef) local_unnamed_addr #2
declare i32 @UnlockReleaseBuffer(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 8}
!15 = !{!"TYPE_7__", !8, i64 0, !8, i64 4, !8, i64 8}
!16 = !{!17, !8, i64 4}
!17 = !{!"TYPE_9__", !8, i64 0, !8, i64 4}
!18 = !{!17, !8, i64 0}
!19 = !{!15, !8, i64 4}
!20 = !{!15, !8, i64 0}
| postgres_src_backend_access_gin_extr_ginxlog.c_ginRedoDeletePage |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4(i32 noundef %0) #0 {
%2 = load i32, ptr @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__SHIFT, align 4, !tbaa !5
%3 = shl i32 %0, %2
%4 = load i32, ptr @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__MASK, align 4, !tbaa !5
%5 = and i32 %3, %4
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx.xml.h_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__SHIFT = common local_unnamed_addr global i32 0, align 4
@A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4(i32 noundef %0) #0 {
%2 = load i32, ptr @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__SHIFT, align 4, !tbaa !6
%3 = shl i32 %0, %2
%4 = load i32, ptr @A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4__MASK, align 4, !tbaa !6
%5 = and i32 %3, %4
ret i32 %5
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_msm_adreno_extr_a6xx.xml.h_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0_BYTEL4 |
; ModuleID = 'AnghaBench/linux/sound/firewire/tascam/extr_tascam-transaction.c_calculate_message_bytes.c'
source_filename = "AnghaBench/linux/sound/firewire/tascam/extr_tascam-transaction.c_calculate_message_bytes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @calculate_message_bytes], section "llvm.metadata"
@switch.table.calculate_message_bytes = private unnamed_addr constant [7 x i32] [i32 3, i32 3, i32 3, i32 3, i32 2, i32 2, i32 3], align 4
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @calculate_message_bytes(i32 noundef %0) #0 {
switch i32 %0, label %5 [
i32 246, label %17
i32 248, label %17
i32 250, label %17
i32 251, label %17
i32 252, label %17
i32 254, label %17
i32 255, label %17
i32 241, label %2
i32 243, label %2
i32 242, label %3
i32 240, label %4
i32 247, label %9
i32 244, label %9
i32 245, label %9
i32 249, label %9
i32 253, label %9
]
2: ; preds = %1, %1
br label %17
3: ; preds = %1
br label %17
4: ; preds = %1
br label %17
5: ; preds = %1
%6 = and i32 %0, 240
%7 = add nsw i32 %6, -128
%8 = icmp ult i32 %7, 112
br i1 %8, label %12, label %9
9: ; preds = %5, %1, %1, %1, %1, %1
%10 = load i32, ptr @EINVAL, align 4, !tbaa !5
%11 = sub nsw i32 0, %10
br label %17
12: ; preds = %5
%13 = lshr exact i32 %7, 4
%14 = zext nneg i32 %13 to i64
%15 = getelementptr inbounds [7 x i32], ptr @switch.table.calculate_message_bytes, i64 0, i64 %14
%16 = load i32, ptr %15, align 4
br label %17
17: ; preds = %12, %1, %1, %1, %1, %1, %1, %1, %9, %4, %3, %2
%18 = phi i32 [ %11, %9 ], [ 0, %4 ], [ 3, %3 ], [ 2, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ %16, %12 ]
ret i32 %18
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/sound/firewire/tascam/extr_tascam-transaction.c_calculate_message_bytes.c'
source_filename = "AnghaBench/linux/sound/firewire/tascam/extr_tascam-transaction.c_calculate_message_bytes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @calculate_message_bytes], section "llvm.metadata"
@switch.table.calculate_message_bytes = private unnamed_addr constant [7 x i32] [i32 3, i32 3, i32 3, i32 3, i32 2, i32 2, i32 3], align 4
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @calculate_message_bytes(i32 noundef %0) #0 {
switch i32 %0, label %5 [
i32 246, label %17
i32 248, label %17
i32 250, label %17
i32 251, label %17
i32 252, label %17
i32 254, label %17
i32 255, label %17
i32 241, label %2
i32 243, label %2
i32 242, label %3
i32 240, label %4
i32 247, label %9
i32 244, label %9
i32 245, label %9
i32 249, label %9
i32 253, label %9
]
2: ; preds = %1, %1
br label %17
3: ; preds = %1
br label %17
4: ; preds = %1
br label %17
5: ; preds = %1
%6 = and i32 %0, 240
%7 = add nsw i32 %6, -128
%8 = icmp ult i32 %7, 112
br i1 %8, label %12, label %9
9: ; preds = %5, %1, %1, %1, %1, %1
%10 = load i32, ptr @EINVAL, align 4, !tbaa !6
%11 = sub nsw i32 0, %10
br label %17
12: ; preds = %5
%13 = lshr exact i32 %7, 4
%14 = zext nneg i32 %13 to i64
%15 = getelementptr inbounds [7 x i32], ptr @switch.table.calculate_message_bytes, i64 0, i64 %14
%16 = load i32, ptr %15, align 4
br label %17
17: ; preds = %12, %1, %1, %1, %1, %1, %1, %1, %9, %4, %3, %2
%18 = phi i32 [ %11, %9 ], [ 0, %4 ], [ 3, %3 ], [ 2, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ %16, %12 ]
ret i32 %18
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_sound_firewire_tascam_extr_tascam-transaction.c_calculate_message_bytes |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mm/extr_cache-xsc3l2.c_xsc3_l2_clean_range.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mm/extr_cache-xsc3l2.c_xsc3_l2_clean_range.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CACHE_LINE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xsc3_l2_clean_range], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xsc3_l2_clean_range(i64 noundef %0, i64 noundef %1) #0 {
%3 = tail call i32 @l2_map_save_flags(i64 noundef undef) #2
%4 = load i32, ptr @CACHE_LINE_SIZE, align 4, !tbaa !5
%5 = sub i32 0, %4
%6 = sext i32 %5 to i64
%7 = and i64 %6, %0
%8 = icmp ult i64 %7, %1
br i1 %8, label %9, label %18
9: ; preds = %2, %9
%10 = phi i64 [ %12, %9 ], [ -1, %2 ]
%11 = phi i64 [ %16, %9 ], [ %7, %2 ]
%12 = tail call i64 @l2_map_va(i64 noundef %11, i64 noundef %10, i64 noundef undef) #2
%13 = tail call i32 @xsc3_l2_clean_mva(i64 noundef %12) #2
%14 = load i32, ptr @CACHE_LINE_SIZE, align 4, !tbaa !5
%15 = sext i32 %14 to i64
%16 = add i64 %11, %15
%17 = icmp ult i64 %16, %1
br i1 %17, label %9, label %18, !llvm.loop !9
18: ; preds = %9, %2
%19 = tail call i32 @l2_map_restore_flags(i64 noundef undef) #2
%20 = tail call i32 (...) @dsb() #2
ret void
}
declare i32 @l2_map_save_flags(i64 noundef) local_unnamed_addr #1
declare i64 @l2_map_va(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @xsc3_l2_clean_mva(i64 noundef) local_unnamed_addr #1
declare i32 @l2_map_restore_flags(i64 noundef) local_unnamed_addr #1
declare i32 @dsb(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mm/extr_cache-xsc3l2.c_xsc3_l2_clean_range.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mm/extr_cache-xsc3l2.c_xsc3_l2_clean_range.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CACHE_LINE_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xsc3_l2_clean_range], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xsc3_l2_clean_range(i64 noundef %0, i64 noundef %1) #0 {
%3 = tail call i32 @l2_map_save_flags(i64 noundef undef) #2
%4 = load i32, ptr @CACHE_LINE_SIZE, align 4, !tbaa !6
%5 = sub i32 0, %4
%6 = sext i32 %5 to i64
%7 = and i64 %6, %0
%8 = icmp ult i64 %7, %1
br i1 %8, label %9, label %18
9: ; preds = %2, %9
%10 = phi i64 [ %12, %9 ], [ -1, %2 ]
%11 = phi i64 [ %16, %9 ], [ %7, %2 ]
%12 = tail call i64 @l2_map_va(i64 noundef %11, i64 noundef %10, i64 noundef undef) #2
%13 = tail call i32 @xsc3_l2_clean_mva(i64 noundef %12) #2
%14 = load i32, ptr @CACHE_LINE_SIZE, align 4, !tbaa !6
%15 = sext i32 %14 to i64
%16 = add i64 %11, %15
%17 = icmp ult i64 %16, %1
br i1 %17, label %9, label %18, !llvm.loop !10
18: ; preds = %9, %2
%19 = tail call i32 @l2_map_restore_flags(i64 noundef undef) #2
%20 = tail call i32 @dsb() #2
ret void
}
declare i32 @l2_map_save_flags(i64 noundef) local_unnamed_addr #1
declare i64 @l2_map_va(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @xsc3_l2_clean_mva(i64 noundef) local_unnamed_addr #1
declare i32 @l2_map_restore_flags(i64 noundef) local_unnamed_addr #1
declare i32 @dsb(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_arch_arm_mm_extr_cache-xsc3l2.c_xsc3_l2_clean_range |
; ModuleID = 'AnghaBench/linux/drivers/cpuidle/extr_cpuidle-exynos.c_exynos_cpuidle_probe.c'
source_filename = "AnghaBench/linux/drivers/cpuidle/extr_cpuidle-exynos.c_exynos_cpuidle_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CONFIG_SMP = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"samsung,exynos4210\00", align 1
@.str.1 = private unnamed_addr constant [19 x i8] c"samsung,exynos3250\00", align 1
@exynos_cpuidle_pdata = dso_local local_unnamed_addr global i64 0, align 8
@exynos_coupled_idle_driver = dso_local global i32 0, align 4
@cpu_possible_mask = dso_local local_unnamed_addr global ptr null, align 8
@exynos_enter_aftr = dso_local local_unnamed_addr global ptr null, align 8
@exynos_idle_driver = dso_local global i32 0, align 4
@.str.2 = private unnamed_addr constant [35 x i8] c"failed to register cpuidle driver\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @exynos_cpuidle_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @exynos_cpuidle_probe(ptr noundef %0) #0 {
%2 = load i32, ptr @CONFIG_SMP, align 4, !tbaa !5
%3 = tail call i64 @IS_ENABLED(i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %1
%6 = tail call i64 @of_machine_is_compatible(ptr noundef nonnull @.str) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = tail call i64 @of_machine_is_compatible(ptr noundef nonnull @.str.1) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %8, %5
%12 = load i64, ptr %0, align 8, !tbaa !9
store i64 %12, ptr @exynos_cpuidle_pdata, align 8, !tbaa !13
%13 = load ptr, ptr @cpu_possible_mask, align 8, !tbaa !14
%14 = tail call i32 @cpuidle_register(ptr noundef nonnull @exynos_coupled_idle_driver, ptr noundef %13) #2
br label %19
15: ; preds = %8, %1
%16 = load i64, ptr %0, align 8, !tbaa !9
%17 = inttoptr i64 %16 to ptr
store ptr %17, ptr @exynos_enter_aftr, align 8, !tbaa !14
%18 = tail call i32 @cpuidle_register(ptr noundef nonnull @exynos_idle_driver, ptr noundef null) #2
br label %19
19: ; preds = %15, %11
%20 = phi i32 [ %14, %11 ], [ %18, %15 ]
%21 = icmp eq i32 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %19
%23 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.2) #2
br label %24
24: ; preds = %19, %22
ret i32 %20
}
declare i64 @IS_ENABLED(i32 noundef) local_unnamed_addr #1
declare i64 @of_machine_is_compatible(ptr noundef) local_unnamed_addr #1
declare i32 @cpuidle_register(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"platform_device", !11, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/cpuidle/extr_cpuidle-exynos.c_exynos_cpuidle_probe.c'
source_filename = "AnghaBench/linux/drivers/cpuidle/extr_cpuidle-exynos.c_exynos_cpuidle_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CONFIG_SMP = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"samsung,exynos4210\00", align 1
@.str.1 = private unnamed_addr constant [19 x i8] c"samsung,exynos3250\00", align 1
@exynos_cpuidle_pdata = common local_unnamed_addr global i64 0, align 8
@exynos_coupled_idle_driver = common global i32 0, align 4
@cpu_possible_mask = common local_unnamed_addr global ptr null, align 8
@exynos_enter_aftr = common local_unnamed_addr global ptr null, align 8
@exynos_idle_driver = common global i32 0, align 4
@.str.2 = private unnamed_addr constant [35 x i8] c"failed to register cpuidle driver\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @exynos_cpuidle_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @exynos_cpuidle_probe(ptr noundef %0) #0 {
%2 = load i32, ptr @CONFIG_SMP, align 4, !tbaa !6
%3 = tail call i64 @IS_ENABLED(i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %1
%6 = tail call i64 @of_machine_is_compatible(ptr noundef nonnull @.str) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = tail call i64 @of_machine_is_compatible(ptr noundef nonnull @.str.1) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %8, %5
%12 = load i64, ptr %0, align 8, !tbaa !10
store i64 %12, ptr @exynos_cpuidle_pdata, align 8, !tbaa !14
%13 = load ptr, ptr @cpu_possible_mask, align 8, !tbaa !15
%14 = tail call i32 @cpuidle_register(ptr noundef nonnull @exynos_coupled_idle_driver, ptr noundef %13) #2
br label %19
15: ; preds = %8, %1
%16 = load i64, ptr %0, align 8, !tbaa !10
%17 = inttoptr i64 %16 to ptr
store ptr %17, ptr @exynos_enter_aftr, align 8, !tbaa !15
%18 = tail call i32 @cpuidle_register(ptr noundef nonnull @exynos_idle_driver, ptr noundef null) #2
br label %19
19: ; preds = %15, %11
%20 = phi i32 [ %14, %11 ], [ %18, %15 ]
%21 = icmp eq i32 %20, 0
br i1 %21, label %24, label %22
22: ; preds = %19
%23 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.2) #2
br label %24
24: ; preds = %19, %22
ret i32 %20
}
declare i64 @IS_ENABLED(i32 noundef) local_unnamed_addr #1
declare i64 @of_machine_is_compatible(ptr noundef) local_unnamed_addr #1
declare i32 @cpuidle_register(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"platform_device", !12, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
| linux_drivers_cpuidle_extr_cpuidle-exynos.c_exynos_cpuidle_probe |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv6/netfilter/extr_ip6t_rt.c_segsleft_match.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv6/netfilter/extr_ip6t_rt.c_segsleft_match.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [42 x i8] c"rt segsleft_match:%c 0x%x <= 0x%x <= 0x%x\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c" result %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"PASS\00", align 1
@.str.3 = private unnamed_addr constant [7 x i8] c"FAILED\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @segsleft_match], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal noundef i32 @segsleft_match(i64 noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3) #0 {
%5 = icmp eq i32 %3, 0
%6 = select i1 %5, i32 32, i32 33
%7 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str, i32 noundef %6, i64 noundef %0, i64 noundef %2, i64 noundef %1) #2
%8 = icmp sge i64 %2, %0
%9 = icmp sle i64 %2, %1
%10 = and i1 %8, %9
%11 = zext i1 %10 to i32
%12 = xor i32 %11, %3
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, ptr @.str.3, ptr @.str.2
%15 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str.1, ptr noundef nonnull %14) #2
ret i32 %12
}
declare i32 @pr_debug(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv6/netfilter/extr_ip6t_rt.c_segsleft_match.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv6/netfilter/extr_ip6t_rt.c_segsleft_match.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [42 x i8] c"rt segsleft_match:%c 0x%x <= 0x%x <= 0x%x\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c" result %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"PASS\00", align 1
@.str.3 = private unnamed_addr constant [7 x i8] c"FAILED\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @segsleft_match], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal noundef i32 @segsleft_match(i64 noundef %0, i64 noundef %1, i64 noundef %2, i32 noundef %3) #0 {
%5 = icmp eq i32 %3, 0
%6 = select i1 %5, i32 32, i32 33
%7 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str, i32 noundef %6, i64 noundef %0, i64 noundef %2, i64 noundef %1) #2
%8 = icmp sge i64 %2, %0
%9 = icmp sle i64 %2, %1
%10 = and i1 %8, %9
%11 = zext i1 %10 to i32
%12 = xor i32 %11, %3
%13 = icmp eq i32 %11, %3
%14 = select i1 %13, ptr @.str.3, ptr @.str.2
%15 = tail call i32 (ptr, ...) @pr_debug(ptr noundef nonnull @.str.1, ptr noundef nonnull %14) #2
ret i32 %12
}
declare i32 @pr_debug(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_ipv6_netfilter_extr_ip6t_rt.c_segsleft_match |
; ModuleID = 'AnghaBench/freebsd/contrib/sqlite3/extr_sqlite3.c_unixTempFileDir.c'
source_filename = "AnghaBench/freebsd/contrib/sqlite3/extr_sqlite3.c_unixTempFileDir.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.stat = type { i32 }
@unixTempFileDir.azDirs.0 = internal unnamed_addr global ptr null, align 16
@unixTempFileDir.azDirs.1 = internal unnamed_addr global ptr null, align 16
@.str = private unnamed_addr constant [9 x i8] c"/var/tmp\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"/usr/tmp\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"/tmp\00", align 1
@.str.3 = private unnamed_addr constant [2 x i8] c".\00", align 1
@sqlite3_temp_directory = dso_local local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [14 x i8] c"SQLITE_TMPDIR\00", align 1
@.str.5 = private unnamed_addr constant [7 x i8] c"TMPDIR\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @unixTempFileDir], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @unixTempFileDir() #0 {
%1 = alloca %struct.stat, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
%2 = load ptr, ptr @sqlite3_temp_directory, align 8, !tbaa !5
%3 = load ptr, ptr @unixTempFileDir.azDirs.0, align 16, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call ptr @getenv(ptr noundef nonnull @.str.4)
store ptr %6, ptr @unixTempFileDir.azDirs.0, align 16, !tbaa !5
br label %7
7: ; preds = %5, %0
%8 = load ptr, ptr @unixTempFileDir.azDirs.1, align 16, !tbaa !5
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = tail call ptr @getenv(ptr noundef nonnull @.str.5)
store ptr %11, ptr @unixTempFileDir.azDirs.1, align 16, !tbaa !5
br label %12
12: ; preds = %10, %7
%13 = icmp eq ptr %2, null
br i1 %13, label %24, label %14
14: ; preds = %12
%15 = call i64 @osStat(ptr noundef nonnull %2, ptr noundef nonnull %1) #4
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %24
17: ; preds = %14
%18 = load i32, ptr %1, align 4, !tbaa !9
%19 = call i64 @S_ISDIR(i32 noundef %18) #4
%20 = icmp eq i64 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %17
%22 = call i64 @osAccess(ptr noundef nonnull %2, i32 noundef 3) #4
%23 = icmp eq i64 %22, 0
br i1 %23, label %91, label %24
24: ; preds = %21, %17, %14, %12
%25 = load ptr, ptr @unixTempFileDir.azDirs.0, align 16, !tbaa !5
%26 = icmp eq ptr %25, null
br i1 %26, label %37, label %27
27: ; preds = %24
%28 = call i64 @osStat(ptr noundef nonnull %25, ptr noundef nonnull %1) #4
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %37
30: ; preds = %27
%31 = load i32, ptr %1, align 4, !tbaa !9
%32 = call i64 @S_ISDIR(i32 noundef %31) #4
%33 = icmp eq i64 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %30
%35 = call i64 @osAccess(ptr noundef nonnull %25, i32 noundef 3) #4
%36 = icmp eq i64 %35, 0
br i1 %36, label %91, label %37
37: ; preds = %34, %30, %27, %24
%38 = load ptr, ptr @unixTempFileDir.azDirs.1, align 16, !tbaa !5
%39 = icmp eq ptr %38, null
br i1 %39, label %50, label %40
40: ; preds = %37
%41 = call i64 @osStat(ptr noundef nonnull %38, ptr noundef nonnull %1) #4
%42 = icmp eq i64 %41, 0
br i1 %42, label %43, label %50
43: ; preds = %40
%44 = load i32, ptr %1, align 4, !tbaa !9
%45 = call i64 @S_ISDIR(i32 noundef %44) #4
%46 = icmp eq i64 %45, 0
br i1 %46, label %50, label %47
47: ; preds = %43
%48 = call i64 @osAccess(ptr noundef nonnull %38, i32 noundef 3) #4
%49 = icmp eq i64 %48, 0
br i1 %49, label %91, label %50
50: ; preds = %37, %40, %43, %47
%51 = call i64 @osStat(ptr noundef nonnull @.str, ptr noundef nonnull %1) #4
%52 = icmp eq i64 %51, 0
br i1 %52, label %53, label %60
53: ; preds = %50
%54 = load i32, ptr %1, align 4, !tbaa !9
%55 = call i64 @S_ISDIR(i32 noundef %54) #4
%56 = icmp eq i64 %55, 0
br i1 %56, label %60, label %57
57: ; preds = %53
%58 = call i64 @osAccess(ptr noundef nonnull @.str, i32 noundef 3) #4
%59 = icmp eq i64 %58, 0
br i1 %59, label %91, label %60
60: ; preds = %50, %53, %57
%61 = call i64 @osStat(ptr noundef nonnull @.str.1, ptr noundef nonnull %1) #4
%62 = icmp eq i64 %61, 0
br i1 %62, label %63, label %70
63: ; preds = %60
%64 = load i32, ptr %1, align 4, !tbaa !9
%65 = call i64 @S_ISDIR(i32 noundef %64) #4
%66 = icmp eq i64 %65, 0
br i1 %66, label %70, label %67
67: ; preds = %63
%68 = call i64 @osAccess(ptr noundef nonnull @.str.1, i32 noundef 3) #4
%69 = icmp eq i64 %68, 0
br i1 %69, label %91, label %70
70: ; preds = %60, %63, %67
%71 = call i64 @osStat(ptr noundef nonnull @.str.2, ptr noundef nonnull %1) #4
%72 = icmp eq i64 %71, 0
br i1 %72, label %73, label %80
73: ; preds = %70
%74 = load i32, ptr %1, align 4, !tbaa !9
%75 = call i64 @S_ISDIR(i32 noundef %74) #4
%76 = icmp eq i64 %75, 0
br i1 %76, label %80, label %77
77: ; preds = %73
%78 = call i64 @osAccess(ptr noundef nonnull @.str.2, i32 noundef 3) #4
%79 = icmp eq i64 %78, 0
br i1 %79, label %91, label %80
80: ; preds = %70, %73, %77
%81 = call i64 @osStat(ptr noundef nonnull @.str.3, ptr noundef nonnull %1) #4
%82 = icmp eq i64 %81, 0
br i1 %82, label %83, label %90
83: ; preds = %80
%84 = load i32, ptr %1, align 4, !tbaa !9
%85 = call i64 @S_ISDIR(i32 noundef %84) #4
%86 = icmp eq i64 %85, 0
br i1 %86, label %90, label %87
87: ; preds = %83
%88 = call i64 @osAccess(ptr noundef nonnull @.str.3, i32 noundef 3) #4
%89 = icmp eq i64 %88, 0
br i1 %89, label %91, label %90
90: ; preds = %87, %83, %80
br label %91
91: ; preds = %90, %87, %77, %67, %57, %47, %34, %21
%92 = phi ptr [ %2, %21 ], [ %25, %34 ], [ %38, %47 ], [ @.str, %57 ], [ @.str.1, %67 ], [ @.str.2, %77 ], [ @.str.3, %87 ], [ null, %90 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
ret ptr %92
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind memory(read)
declare noundef ptr @getenv(ptr nocapture noundef) local_unnamed_addr #2
declare i64 @osStat(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i64 @S_ISDIR(i32 noundef) local_unnamed_addr #3
declare i64 @osAccess(ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"stat", !11, i64 0}
!11 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/sqlite3/extr_sqlite3.c_unixTempFileDir.c'
source_filename = "AnghaBench/freebsd/contrib/sqlite3/extr_sqlite3.c_unixTempFileDir.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.stat = type { i32 }
@unixTempFileDir.azDirs.0 = internal unnamed_addr global ptr null, align 8
@unixTempFileDir.azDirs.1 = internal unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [9 x i8] c"/var/tmp\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"/usr/tmp\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"/tmp\00", align 1
@.str.3 = private unnamed_addr constant [2 x i8] c".\00", align 1
@sqlite3_temp_directory = common local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [14 x i8] c"SQLITE_TMPDIR\00", align 1
@.str.5 = private unnamed_addr constant [7 x i8] c"TMPDIR\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @unixTempFileDir], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @unixTempFileDir() #0 {
%1 = alloca %struct.stat, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
%2 = load ptr, ptr @sqlite3_temp_directory, align 8, !tbaa !6
%3 = load ptr, ptr @unixTempFileDir.azDirs.0, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call ptr @getenv(ptr noundef nonnull @.str.4)
store ptr %6, ptr @unixTempFileDir.azDirs.0, align 8, !tbaa !6
br label %7
7: ; preds = %5, %0
%8 = load ptr, ptr @unixTempFileDir.azDirs.1, align 8, !tbaa !6
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = tail call ptr @getenv(ptr noundef nonnull @.str.5)
store ptr %11, ptr @unixTempFileDir.azDirs.1, align 8, !tbaa !6
br label %12
12: ; preds = %10, %7
%13 = icmp eq ptr %2, null
br i1 %13, label %24, label %14
14: ; preds = %12
%15 = call i64 @osStat(ptr noundef nonnull %2, ptr noundef nonnull %1) #4
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %24
17: ; preds = %14
%18 = load i32, ptr %1, align 4, !tbaa !10
%19 = call i64 @S_ISDIR(i32 noundef %18) #4
%20 = icmp eq i64 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %17
%22 = call i64 @osAccess(ptr noundef nonnull %2, i32 noundef 3) #4
%23 = icmp eq i64 %22, 0
br i1 %23, label %91, label %24
24: ; preds = %21, %17, %14, %12
%25 = load ptr, ptr @unixTempFileDir.azDirs.0, align 8, !tbaa !6
%26 = icmp eq ptr %25, null
br i1 %26, label %37, label %27
27: ; preds = %24
%28 = call i64 @osStat(ptr noundef nonnull %25, ptr noundef nonnull %1) #4
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %37
30: ; preds = %27
%31 = load i32, ptr %1, align 4, !tbaa !10
%32 = call i64 @S_ISDIR(i32 noundef %31) #4
%33 = icmp eq i64 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %30
%35 = call i64 @osAccess(ptr noundef nonnull %25, i32 noundef 3) #4
%36 = icmp eq i64 %35, 0
br i1 %36, label %91, label %37
37: ; preds = %34, %30, %27, %24
%38 = load ptr, ptr @unixTempFileDir.azDirs.1, align 8, !tbaa !6
%39 = icmp eq ptr %38, null
br i1 %39, label %50, label %40
40: ; preds = %37
%41 = call i64 @osStat(ptr noundef nonnull %38, ptr noundef nonnull %1) #4
%42 = icmp eq i64 %41, 0
br i1 %42, label %43, label %50
43: ; preds = %40
%44 = load i32, ptr %1, align 4, !tbaa !10
%45 = call i64 @S_ISDIR(i32 noundef %44) #4
%46 = icmp eq i64 %45, 0
br i1 %46, label %50, label %47
47: ; preds = %43
%48 = call i64 @osAccess(ptr noundef nonnull %38, i32 noundef 3) #4
%49 = icmp eq i64 %48, 0
br i1 %49, label %91, label %50
50: ; preds = %37, %40, %43, %47
%51 = call i64 @osStat(ptr noundef nonnull @.str, ptr noundef nonnull %1) #4
%52 = icmp eq i64 %51, 0
br i1 %52, label %53, label %60
53: ; preds = %50
%54 = load i32, ptr %1, align 4, !tbaa !10
%55 = call i64 @S_ISDIR(i32 noundef %54) #4
%56 = icmp eq i64 %55, 0
br i1 %56, label %60, label %57
57: ; preds = %53
%58 = call i64 @osAccess(ptr noundef nonnull @.str, i32 noundef 3) #4
%59 = icmp eq i64 %58, 0
br i1 %59, label %91, label %60
60: ; preds = %50, %53, %57
%61 = call i64 @osStat(ptr noundef nonnull @.str.1, ptr noundef nonnull %1) #4
%62 = icmp eq i64 %61, 0
br i1 %62, label %63, label %70
63: ; preds = %60
%64 = load i32, ptr %1, align 4, !tbaa !10
%65 = call i64 @S_ISDIR(i32 noundef %64) #4
%66 = icmp eq i64 %65, 0
br i1 %66, label %70, label %67
67: ; preds = %63
%68 = call i64 @osAccess(ptr noundef nonnull @.str.1, i32 noundef 3) #4
%69 = icmp eq i64 %68, 0
br i1 %69, label %91, label %70
70: ; preds = %60, %63, %67
%71 = call i64 @osStat(ptr noundef nonnull @.str.2, ptr noundef nonnull %1) #4
%72 = icmp eq i64 %71, 0
br i1 %72, label %73, label %80
73: ; preds = %70
%74 = load i32, ptr %1, align 4, !tbaa !10
%75 = call i64 @S_ISDIR(i32 noundef %74) #4
%76 = icmp eq i64 %75, 0
br i1 %76, label %80, label %77
77: ; preds = %73
%78 = call i64 @osAccess(ptr noundef nonnull @.str.2, i32 noundef 3) #4
%79 = icmp eq i64 %78, 0
br i1 %79, label %91, label %80
80: ; preds = %70, %73, %77
%81 = call i64 @osStat(ptr noundef nonnull @.str.3, ptr noundef nonnull %1) #4
%82 = icmp eq i64 %81, 0
br i1 %82, label %83, label %90
83: ; preds = %80
%84 = load i32, ptr %1, align 4, !tbaa !10
%85 = call i64 @S_ISDIR(i32 noundef %84) #4
%86 = icmp eq i64 %85, 0
br i1 %86, label %90, label %87
87: ; preds = %83
%88 = call i64 @osAccess(ptr noundef nonnull @.str.3, i32 noundef 3) #4
%89 = icmp eq i64 %88, 0
br i1 %89, label %91, label %90
90: ; preds = %87, %83, %80
br label %91
91: ; preds = %90, %87, %77, %67, %57, %47, %34, %21
%92 = phi ptr [ %2, %21 ], [ %25, %34 ], [ %38, %47 ], [ @.str, %57 ], [ @.str.1, %67 ], [ @.str.2, %77 ], [ @.str.3, %87 ], [ null, %90 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
ret ptr %92
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nofree nounwind memory(read)
declare noundef ptr @getenv(ptr nocapture noundef) local_unnamed_addr #2
declare i64 @osStat(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i64 @S_ISDIR(i32 noundef) local_unnamed_addr #3
declare i64 @osAccess(ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind memory(read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"stat", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| freebsd_contrib_sqlite3_extr_sqlite3.c_unixTempFileDir |
; ModuleID = 'AnghaBench/lab/q3map2/common/extr_cmdlib.c_Q_stricmp.c'
source_filename = "AnghaBench/lab/q3map2/common/extr_cmdlib.c_Q_stricmp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @Q_stricmp(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @Q_strncasecmp(ptr noundef %0, ptr noundef %1, i32 noundef 99999) #2
ret i32 %3
}
declare i32 @Q_strncasecmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/lab/q3map2/common/extr_cmdlib.c_Q_stricmp.c'
source_filename = "AnghaBench/lab/q3map2/common/extr_cmdlib.c_Q_stricmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @Q_stricmp(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @Q_strncasecmp(ptr noundef %0, ptr noundef %1, i32 noundef 99999) #2
ret i32 %3
}
declare i32 @Q_strncasecmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| lab_q3map2_common_extr_cmdlib.c_Q_stricmp |
; ModuleID = 'AnghaBench/php-src/sapi/fpm/fpm/extr_fpm_arrays.h_fpm_array_item_remove.c'
source_filename = "AnghaBench/php-src/sapi/fpm/fpm/extr_fpm_arrays.h_fpm_array_item_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fpm_array_s = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @fpm_array_item_remove], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal noundef i32 @fpm_array_item_remove(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = add nsw i32 %3, -1
%5 = icmp ugt i32 %4, %1
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = tail call ptr @fpm_array_item(ptr noundef nonnull %0, i32 noundef %4) #2
%8 = tail call ptr @fpm_array_item(ptr noundef nonnull %0, i32 noundef %1) #2
%9 = getelementptr inbounds %struct.fpm_array_s, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = tail call i32 @memcpy(ptr noundef %8, ptr noundef %7, i32 noundef %10) #2
%12 = load i32, ptr %0, align 4, !tbaa !5
%13 = add nsw i32 %12, -1
br label %14
14: ; preds = %6, %2
%15 = phi i32 [ %13, %6 ], [ %4, %2 ]
%16 = phi i32 [ %1, %6 ], [ -1, %2 ]
store i32 %15, ptr %0, align 4, !tbaa !5
ret i32 %16
}
declare ptr @fpm_array_item(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"fpm_array_s", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/php-src/sapi/fpm/fpm/extr_fpm_arrays.h_fpm_array_item_remove.c'
source_filename = "AnghaBench/php-src/sapi/fpm/fpm/extr_fpm_arrays.h_fpm_array_item_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @fpm_array_item_remove], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal noundef i32 @fpm_array_item_remove(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = add nsw i32 %3, -1
%5 = icmp ugt i32 %4, %1
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = tail call ptr @fpm_array_item(ptr noundef nonnull %0, i32 noundef %4) #2
%8 = tail call ptr @fpm_array_item(ptr noundef nonnull %0, i32 noundef %1) #2
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !11
%11 = tail call i32 @memcpy(ptr noundef %8, ptr noundef %7, i32 noundef %10) #2
%12 = load i32, ptr %0, align 4, !tbaa !6
%13 = add nsw i32 %12, -1
br label %14
14: ; preds = %6, %2
%15 = phi i32 [ %13, %6 ], [ %4, %2 ]
%16 = phi i32 [ %1, %6 ], [ -1, %2 ]
store i32 %15, ptr %0, align 4, !tbaa !6
ret i32 %16
}
declare ptr @fpm_array_item(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"fpm_array_s", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| php-src_sapi_fpm_fpm_extr_fpm_arrays.h_fpm_array_item_remove |
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-at91-usart.c_at91_usart_spi_probe.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-at91-usart.c_at91_usart_spi_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.spi_controller = type { i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, %struct.TYPE_10__ }
%struct.TYPE_10__ = type { i32 }
%struct.at91_usart_spi = type { i32, i32, i32, i32, i32, i32, ptr, ptr, ptr }
@IORESOURCE_MEM = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"usart\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@SPI_CPOL = dso_local local_unnamed_addr global i32 0, align 4
@SPI_CPHA = dso_local local_unnamed_addr global i32 0, align 4
@SPI_LOOP = dso_local local_unnamed_addr global i32 0, align 4
@SPI_CS_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_setup = dso_local local_unnamed_addr global i32 0, align 4
@SPI_MASTER_MUST_RX = dso_local local_unnamed_addr global i32 0, align 4
@SPI_MASTER_MUST_TX = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_transfer_one = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_prepare_message = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_unprepare_message = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_can_dma = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_cleanup = dso_local local_unnamed_addr global i32 0, align 4
@US_MIN_CLK_DIV = dso_local local_unnamed_addr global i32 0, align 4
@US_MAX_CLK_DIV = dso_local local_unnamed_addr global i32 0, align 4
@at91_usart_spi_interrupt = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [56 x i8] c"AT91 USART SPI Controller version 0x%x at %pa (irq %d)\0A\00", align 1
@VERSION = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @at91_usart_spi_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @at91_usart_spi_probe(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @to_platform_device(ptr noundef %2) #2
%4 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !11
%5 = tail call ptr @platform_get_resource(i32 noundef %3, i32 noundef %4, i32 noundef 0) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, ptr @EINVAL, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %116
10: ; preds = %1
%11 = load ptr, ptr %0, align 8, !tbaa !5
%12 = tail call i32 @to_platform_device(ptr noundef %11) #2
%13 = tail call i32 @platform_get_irq(i32 noundef %12, i32 noundef 0) #2
%14 = icmp slt i32 %13, 0
br i1 %14, label %116, label %15
15: ; preds = %10
%16 = load ptr, ptr %0, align 8, !tbaa !5
%17 = tail call ptr @devm_clk_get(ptr noundef %16, ptr noundef nonnull @.str) #2
%18 = tail call i64 @IS_ERR(ptr noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %15
%21 = tail call i32 @PTR_ERR(ptr noundef %17) #2
br label %116
22: ; preds = %15
%23 = load i32, ptr @ENOMEM, align 4, !tbaa !11
%24 = sub nsw i32 0, %23
%25 = tail call ptr @spi_alloc_master(ptr noundef nonnull %0, i32 noundef 48) #2
%26 = icmp eq ptr %25, null
br i1 %26, label %113, label %27
27: ; preds = %22
%28 = tail call i32 @at91_usart_gpio_setup(ptr noundef nonnull %0) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %113
30: ; preds = %27
%31 = load i32, ptr @SPI_CPOL, align 4, !tbaa !11
%32 = load i32, ptr @SPI_CPHA, align 4, !tbaa !11
%33 = or i32 %32, %31
%34 = load i32, ptr @SPI_LOOP, align 4, !tbaa !11
%35 = or i32 %33, %34
%36 = load i32, ptr @SPI_CS_HIGH, align 4, !tbaa !11
%37 = or i32 %35, %36
store i32 %37, ptr %25, align 8, !tbaa !13
%38 = load ptr, ptr %0, align 8, !tbaa !5
%39 = load i32, ptr %38, align 4, !tbaa !16
%40 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 11
store i32 %39, ptr %40, align 4, !tbaa !18
%41 = tail call i32 @SPI_BPW_MASK(i32 noundef 8) #2
%42 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 10
store i32 %41, ptr %42, align 8, !tbaa !19
%43 = load i32, ptr @at91_usart_spi_setup, align 4, !tbaa !11
%44 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 9
store i32 %43, ptr %44, align 4, !tbaa !20
%45 = load i32, ptr @SPI_MASTER_MUST_RX, align 4, !tbaa !11
%46 = load i32, ptr @SPI_MASTER_MUST_TX, align 4, !tbaa !11
%47 = or i32 %46, %45
%48 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 1
store i32 %47, ptr %48, align 4, !tbaa !21
%49 = load i32, ptr @at91_usart_spi_transfer_one, align 4, !tbaa !11
%50 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 8
store i32 %49, ptr %50, align 8, !tbaa !22
%51 = load i32, ptr @at91_usart_spi_prepare_message, align 4, !tbaa !11
%52 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 7
store i32 %51, ptr %52, align 4, !tbaa !23
%53 = load i32, ptr @at91_usart_spi_unprepare_message, align 4, !tbaa !11
%54 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 6
store i32 %53, ptr %54, align 8, !tbaa !24
%55 = load i32, ptr @at91_usart_spi_can_dma, align 4, !tbaa !11
%56 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 5
store i32 %55, ptr %56, align 4, !tbaa !25
%57 = load i32, ptr @at91_usart_spi_cleanup, align 4, !tbaa !11
%58 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 4
store i32 %57, ptr %58, align 8, !tbaa !26
%59 = tail call i32 @clk_get_rate(ptr noundef %17) #2
%60 = load i32, ptr @US_MIN_CLK_DIV, align 4, !tbaa !11
%61 = tail call ptr @DIV_ROUND_UP(i32 noundef %59, i32 noundef %60) #2
%62 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 3
store ptr %61, ptr %62, align 8, !tbaa !27
%63 = tail call i32 @clk_get_rate(ptr noundef %17) #2
%64 = load i32, ptr @US_MAX_CLK_DIV, align 4, !tbaa !11
%65 = tail call ptr @DIV_ROUND_UP(i32 noundef %63, i32 noundef %64) #2
%66 = getelementptr inbounds %struct.spi_controller, ptr %25, i64 0, i32 2
store ptr %65, ptr %66, align 8, !tbaa !28
%67 = tail call i32 @platform_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %25) #2
%68 = tail call ptr @spi_master_get_devdata(ptr noundef nonnull %25) #2
%69 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 8
store ptr %0, ptr %69, align 8, !tbaa !29
%70 = tail call ptr @devm_ioremap_resource(ptr noundef nonnull %0, ptr noundef nonnull %5) #2
%71 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 7
store ptr %70, ptr %71, align 8, !tbaa !31
%72 = tail call i64 @IS_ERR(ptr noundef %70) #2
%73 = icmp eq i64 %72, 0
br i1 %73, label %77, label %74
74: ; preds = %30
%75 = load ptr, ptr %71, align 8, !tbaa !31
%76 = tail call i32 @PTR_ERR(ptr noundef %75) #2
br label %113
77: ; preds = %30
store i32 %13, ptr %68, align 8, !tbaa !32
%78 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 6
store ptr %17, ptr %78, align 8, !tbaa !33
%79 = load i32, ptr @at91_usart_spi_interrupt, align 4, !tbaa !11
%80 = tail call i32 @dev_name(ptr noundef nonnull %0) #2
%81 = tail call i32 @devm_request_irq(ptr noundef nonnull %0, i32 noundef %13, i32 noundef %79, i32 noundef 0, i32 noundef %80, ptr noundef nonnull %25) #2
%82 = icmp eq i32 %81, 0
br i1 %82, label %83, label %113
83: ; preds = %77
%84 = tail call i32 @clk_prepare_enable(ptr noundef %17) #2
%85 = icmp eq i32 %84, 0
br i1 %85, label %86, label %113
86: ; preds = %83
%87 = tail call i32 @clk_get_rate(ptr noundef %17) #2
%88 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 5
store i32 %87, ptr %88, align 4, !tbaa !34
%89 = tail call i32 @at91_usart_spi_init(ptr noundef nonnull %68) #2
%90 = load i32, ptr %5, align 4, !tbaa !35
%91 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 4
store i32 %90, ptr %91, align 8, !tbaa !37
%92 = load ptr, ptr %0, align 8, !tbaa !5
%93 = tail call i32 @to_platform_device(ptr noundef %92) #2
%94 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 3
store i32 %93, ptr %94, align 4, !tbaa !38
%95 = tail call i32 @at91_usart_spi_configure_dma(ptr noundef nonnull %25, ptr noundef nonnull %68) #2
%96 = icmp eq i32 %95, 0
br i1 %96, label %97, label %110
97: ; preds = %86
%98 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 2
%99 = tail call i32 @spin_lock_init(ptr noundef nonnull %98) #2
%100 = getelementptr inbounds %struct.at91_usart_spi, ptr %68, i64 0, i32 1
%101 = tail call i32 @init_completion(ptr noundef nonnull %100) #2
%102 = tail call i32 @devm_spi_register_master(ptr noundef nonnull %0, ptr noundef nonnull %25) #2
%103 = icmp eq i32 %102, 0
br i1 %103, label %104, label %108
104: ; preds = %97
%105 = load i32, ptr @VERSION, align 4, !tbaa !11
%106 = tail call i32 @at91_usart_spi_readl(ptr noundef nonnull %68, i32 noundef %105) #2
%107 = tail call i32 @dev_info(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %106, ptr noundef nonnull %5, i32 noundef %13) #2
br label %116
108: ; preds = %97
%109 = tail call i32 @at91_usart_spi_release_dma(ptr noundef nonnull %25) #2
br label %110
110: ; preds = %86, %108
%111 = phi i32 [ %95, %86 ], [ %102, %108 ]
%112 = tail call i32 @clk_disable_unprepare(ptr noundef %17) #2
br label %113
113: ; preds = %83, %77, %27, %22, %110, %74
%114 = phi i32 [ %28, %27 ], [ %76, %74 ], [ %81, %77 ], [ %84, %83 ], [ %111, %110 ], [ %24, %22 ]
%115 = tail call i32 @spi_master_put(ptr noundef %25) #2
br label %116
116: ; preds = %10, %113, %104, %20, %7
%117 = phi i32 [ %21, %20 ], [ %114, %113 ], [ 0, %104 ], [ %9, %7 ], [ %13, %10 ]
ret i32 %117
}
declare ptr @platform_get_resource(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @to_platform_device(ptr noundef) local_unnamed_addr #1
declare i32 @platform_get_irq(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @devm_clk_get(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare ptr @spi_alloc_master(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @at91_usart_gpio_setup(ptr noundef) local_unnamed_addr #1
declare i32 @SPI_BPW_MASK(i32 noundef) local_unnamed_addr #1
declare ptr @DIV_ROUND_UP(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clk_get_rate(ptr noundef) local_unnamed_addr #1
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @spi_master_get_devdata(ptr noundef) local_unnamed_addr #1
declare ptr @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @devm_request_irq(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(ptr noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_init(ptr noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_configure_dma(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
declare i32 @init_completion(ptr noundef) local_unnamed_addr #1
declare i32 @devm_spi_register_master(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_readl(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_release_dma(ptr noundef) local_unnamed_addr #1
declare i32 @clk_disable_unprepare(ptr noundef) local_unnamed_addr #1
declare i32 @spi_master_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"platform_device", !7, i64 0}
!7 = !{!"TYPE_12__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"spi_controller", !12, i64 0, !12, i64 4, !8, i64 8, !8, i64 16, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !15, i64 52}
!15 = !{!"TYPE_10__", !12, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"TYPE_11__", !12, i64 0}
!18 = !{!14, !12, i64 52}
!19 = !{!14, !12, i64 48}
!20 = !{!14, !12, i64 44}
!21 = !{!14, !12, i64 4}
!22 = !{!14, !12, i64 40}
!23 = !{!14, !12, i64 36}
!24 = !{!14, !12, i64 32}
!25 = !{!14, !12, i64 28}
!26 = !{!14, !12, i64 24}
!27 = !{!14, !8, i64 16}
!28 = !{!14, !8, i64 8}
!29 = !{!30, !8, i64 40}
!30 = !{!"at91_usart_spi", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !8, i64 24, !8, i64 32, !8, i64 40}
!31 = !{!30, !8, i64 32}
!32 = !{!30, !12, i64 0}
!33 = !{!30, !8, i64 24}
!34 = !{!30, !12, i64 20}
!35 = !{!36, !12, i64 0}
!36 = !{!"resource", !12, i64 0}
!37 = !{!30, !12, i64 16}
!38 = !{!30, !12, i64 12}
| ; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-at91-usart.c_at91_usart_spi_probe.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-at91-usart.c_at91_usart_spi_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IORESOURCE_MEM = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"usart\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@SPI_CPOL = common local_unnamed_addr global i32 0, align 4
@SPI_CPHA = common local_unnamed_addr global i32 0, align 4
@SPI_LOOP = common local_unnamed_addr global i32 0, align 4
@SPI_CS_HIGH = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_setup = common local_unnamed_addr global i32 0, align 4
@SPI_MASTER_MUST_RX = common local_unnamed_addr global i32 0, align 4
@SPI_MASTER_MUST_TX = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_transfer_one = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_prepare_message = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_unprepare_message = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_can_dma = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_cleanup = common local_unnamed_addr global i32 0, align 4
@US_MIN_CLK_DIV = common local_unnamed_addr global i32 0, align 4
@US_MAX_CLK_DIV = common local_unnamed_addr global i32 0, align 4
@at91_usart_spi_interrupt = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [56 x i8] c"AT91 USART SPI Controller version 0x%x at %pa (irq %d)\0A\00", align 1
@VERSION = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @at91_usart_spi_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @at91_usart_spi_probe(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @to_platform_device(ptr noundef %2) #2
%4 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !12
%5 = tail call ptr @platform_get_resource(i32 noundef %3, i32 noundef %4, i32 noundef 0) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, ptr @EINVAL, align 4, !tbaa !12
%9 = sub nsw i32 0, %8
br label %116
10: ; preds = %1
%11 = load ptr, ptr %0, align 8, !tbaa !6
%12 = tail call i32 @to_platform_device(ptr noundef %11) #2
%13 = tail call i32 @platform_get_irq(i32 noundef %12, i32 noundef 0) #2
%14 = icmp slt i32 %13, 0
br i1 %14, label %116, label %15
15: ; preds = %10
%16 = load ptr, ptr %0, align 8, !tbaa !6
%17 = tail call ptr @devm_clk_get(ptr noundef %16, ptr noundef nonnull @.str) #2
%18 = tail call i64 @IS_ERR(ptr noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %22, label %20
20: ; preds = %15
%21 = tail call i32 @PTR_ERR(ptr noundef %17) #2
br label %116
22: ; preds = %15
%23 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%24 = sub nsw i32 0, %23
%25 = tail call ptr @spi_alloc_master(ptr noundef nonnull %0, i32 noundef 48) #2
%26 = icmp eq ptr %25, null
br i1 %26, label %113, label %27
27: ; preds = %22
%28 = tail call i32 @at91_usart_gpio_setup(ptr noundef nonnull %0) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %113
30: ; preds = %27
%31 = load i32, ptr @SPI_CPOL, align 4, !tbaa !12
%32 = load i32, ptr @SPI_CPHA, align 4, !tbaa !12
%33 = or i32 %32, %31
%34 = load i32, ptr @SPI_LOOP, align 4, !tbaa !12
%35 = or i32 %33, %34
%36 = load i32, ptr @SPI_CS_HIGH, align 4, !tbaa !12
%37 = or i32 %35, %36
store i32 %37, ptr %25, align 8, !tbaa !14
%38 = load ptr, ptr %0, align 8, !tbaa !6
%39 = load i32, ptr %38, align 4, !tbaa !17
%40 = getelementptr inbounds i8, ptr %25, i64 52
store i32 %39, ptr %40, align 4, !tbaa !19
%41 = tail call i32 @SPI_BPW_MASK(i32 noundef 8) #2
%42 = getelementptr inbounds i8, ptr %25, i64 48
store i32 %41, ptr %42, align 8, !tbaa !20
%43 = load i32, ptr @at91_usart_spi_setup, align 4, !tbaa !12
%44 = getelementptr inbounds i8, ptr %25, i64 44
store i32 %43, ptr %44, align 4, !tbaa !21
%45 = load i32, ptr @SPI_MASTER_MUST_RX, align 4, !tbaa !12
%46 = load i32, ptr @SPI_MASTER_MUST_TX, align 4, !tbaa !12
%47 = or i32 %46, %45
%48 = getelementptr inbounds i8, ptr %25, i64 4
store i32 %47, ptr %48, align 4, !tbaa !22
%49 = load i32, ptr @at91_usart_spi_transfer_one, align 4, !tbaa !12
%50 = getelementptr inbounds i8, ptr %25, i64 40
store i32 %49, ptr %50, align 8, !tbaa !23
%51 = load i32, ptr @at91_usart_spi_prepare_message, align 4, !tbaa !12
%52 = getelementptr inbounds i8, ptr %25, i64 36
store i32 %51, ptr %52, align 4, !tbaa !24
%53 = load i32, ptr @at91_usart_spi_unprepare_message, align 4, !tbaa !12
%54 = getelementptr inbounds i8, ptr %25, i64 32
store i32 %53, ptr %54, align 8, !tbaa !25
%55 = load i32, ptr @at91_usart_spi_can_dma, align 4, !tbaa !12
%56 = getelementptr inbounds i8, ptr %25, i64 28
store i32 %55, ptr %56, align 4, !tbaa !26
%57 = load i32, ptr @at91_usart_spi_cleanup, align 4, !tbaa !12
%58 = getelementptr inbounds i8, ptr %25, i64 24
store i32 %57, ptr %58, align 8, !tbaa !27
%59 = tail call i32 @clk_get_rate(ptr noundef %17) #2
%60 = load i32, ptr @US_MIN_CLK_DIV, align 4, !tbaa !12
%61 = tail call ptr @DIV_ROUND_UP(i32 noundef %59, i32 noundef %60) #2
%62 = getelementptr inbounds i8, ptr %25, i64 16
store ptr %61, ptr %62, align 8, !tbaa !28
%63 = tail call i32 @clk_get_rate(ptr noundef %17) #2
%64 = load i32, ptr @US_MAX_CLK_DIV, align 4, !tbaa !12
%65 = tail call ptr @DIV_ROUND_UP(i32 noundef %63, i32 noundef %64) #2
%66 = getelementptr inbounds i8, ptr %25, i64 8
store ptr %65, ptr %66, align 8, !tbaa !29
%67 = tail call i32 @platform_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %25) #2
%68 = tail call ptr @spi_master_get_devdata(ptr noundef nonnull %25) #2
%69 = getelementptr inbounds i8, ptr %68, i64 40
store ptr %0, ptr %69, align 8, !tbaa !30
%70 = tail call ptr @devm_ioremap_resource(ptr noundef nonnull %0, ptr noundef nonnull %5) #2
%71 = getelementptr inbounds i8, ptr %68, i64 32
store ptr %70, ptr %71, align 8, !tbaa !32
%72 = tail call i64 @IS_ERR(ptr noundef %70) #2
%73 = icmp eq i64 %72, 0
br i1 %73, label %77, label %74
74: ; preds = %30
%75 = load ptr, ptr %71, align 8, !tbaa !32
%76 = tail call i32 @PTR_ERR(ptr noundef %75) #2
br label %113
77: ; preds = %30
store i32 %13, ptr %68, align 8, !tbaa !33
%78 = getelementptr inbounds i8, ptr %68, i64 24
store ptr %17, ptr %78, align 8, !tbaa !34
%79 = load i32, ptr @at91_usart_spi_interrupt, align 4, !tbaa !12
%80 = tail call i32 @dev_name(ptr noundef nonnull %0) #2
%81 = tail call i32 @devm_request_irq(ptr noundef nonnull %0, i32 noundef %13, i32 noundef %79, i32 noundef 0, i32 noundef %80, ptr noundef nonnull %25) #2
%82 = icmp eq i32 %81, 0
br i1 %82, label %83, label %113
83: ; preds = %77
%84 = tail call i32 @clk_prepare_enable(ptr noundef %17) #2
%85 = icmp eq i32 %84, 0
br i1 %85, label %86, label %113
86: ; preds = %83
%87 = tail call i32 @clk_get_rate(ptr noundef %17) #2
%88 = getelementptr inbounds i8, ptr %68, i64 20
store i32 %87, ptr %88, align 4, !tbaa !35
%89 = tail call i32 @at91_usart_spi_init(ptr noundef nonnull %68) #2
%90 = load i32, ptr %5, align 4, !tbaa !36
%91 = getelementptr inbounds i8, ptr %68, i64 16
store i32 %90, ptr %91, align 8, !tbaa !38
%92 = load ptr, ptr %0, align 8, !tbaa !6
%93 = tail call i32 @to_platform_device(ptr noundef %92) #2
%94 = getelementptr inbounds i8, ptr %68, i64 12
store i32 %93, ptr %94, align 4, !tbaa !39
%95 = tail call i32 @at91_usart_spi_configure_dma(ptr noundef nonnull %25, ptr noundef nonnull %68) #2
%96 = icmp eq i32 %95, 0
br i1 %96, label %97, label %110
97: ; preds = %86
%98 = getelementptr inbounds i8, ptr %68, i64 8
%99 = tail call i32 @spin_lock_init(ptr noundef nonnull %98) #2
%100 = getelementptr inbounds i8, ptr %68, i64 4
%101 = tail call i32 @init_completion(ptr noundef nonnull %100) #2
%102 = tail call i32 @devm_spi_register_master(ptr noundef nonnull %0, ptr noundef nonnull %25) #2
%103 = icmp eq i32 %102, 0
br i1 %103, label %104, label %108
104: ; preds = %97
%105 = load i32, ptr @VERSION, align 4, !tbaa !12
%106 = tail call i32 @at91_usart_spi_readl(ptr noundef nonnull %68, i32 noundef %105) #2
%107 = tail call i32 @dev_info(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %106, ptr noundef nonnull %5, i32 noundef %13) #2
br label %116
108: ; preds = %97
%109 = tail call i32 @at91_usart_spi_release_dma(ptr noundef nonnull %25) #2
br label %110
110: ; preds = %86, %108
%111 = phi i32 [ %95, %86 ], [ %102, %108 ]
%112 = tail call i32 @clk_disable_unprepare(ptr noundef %17) #2
br label %113
113: ; preds = %83, %77, %27, %22, %110, %74
%114 = phi i32 [ %28, %27 ], [ %76, %74 ], [ %81, %77 ], [ %84, %83 ], [ %111, %110 ], [ %24, %22 ]
%115 = tail call i32 @spi_master_put(ptr noundef %25) #2
br label %116
116: ; preds = %10, %113, %104, %20, %7
%117 = phi i32 [ %21, %20 ], [ %114, %113 ], [ 0, %104 ], [ %9, %7 ], [ %13, %10 ]
ret i32 %117
}
declare ptr @platform_get_resource(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @to_platform_device(ptr noundef) local_unnamed_addr #1
declare i32 @platform_get_irq(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @devm_clk_get(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare ptr @spi_alloc_master(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @at91_usart_gpio_setup(ptr noundef) local_unnamed_addr #1
declare i32 @SPI_BPW_MASK(i32 noundef) local_unnamed_addr #1
declare ptr @DIV_ROUND_UP(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clk_get_rate(ptr noundef) local_unnamed_addr #1
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @spi_master_get_devdata(ptr noundef) local_unnamed_addr #1
declare ptr @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @devm_request_irq(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @clk_prepare_enable(ptr noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_init(ptr noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_configure_dma(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
declare i32 @init_completion(ptr noundef) local_unnamed_addr #1
declare i32 @devm_spi_register_master(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_readl(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @at91_usart_spi_release_dma(ptr noundef) local_unnamed_addr #1
declare i32 @clk_disable_unprepare(ptr noundef) local_unnamed_addr #1
declare i32 @spi_master_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"platform_device", !8, i64 0}
!8 = !{!"TYPE_12__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"spi_controller", !13, i64 0, !13, i64 4, !9, i64 8, !9, i64 16, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !13, i64 48, !16, i64 52}
!16 = !{!"TYPE_10__", !13, i64 0}
!17 = !{!18, !13, i64 0}
!18 = !{!"TYPE_11__", !13, i64 0}
!19 = !{!15, !13, i64 52}
!20 = !{!15, !13, i64 48}
!21 = !{!15, !13, i64 44}
!22 = !{!15, !13, i64 4}
!23 = !{!15, !13, i64 40}
!24 = !{!15, !13, i64 36}
!25 = !{!15, !13, i64 32}
!26 = !{!15, !13, i64 28}
!27 = !{!15, !13, i64 24}
!28 = !{!15, !9, i64 16}
!29 = !{!15, !9, i64 8}
!30 = !{!31, !9, i64 40}
!31 = !{!"at91_usart_spi", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !9, i64 24, !9, i64 32, !9, i64 40}
!32 = !{!31, !9, i64 32}
!33 = !{!31, !13, i64 0}
!34 = !{!31, !9, i64 24}
!35 = !{!31, !13, i64 20}
!36 = !{!37, !13, i64 0}
!37 = !{!"resource", !13, i64 0}
!38 = !{!31, !13, i64 16}
!39 = !{!31, !13, i64 12}
| linux_drivers_spi_extr_spi-at91-usart.c_at91_usart_spi_probe |
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_axp20x_battery.c_axp20x_battery_prop_writeable.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_axp20x_battery.c_axp20x_battery_prop_writeable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN = dso_local local_unnamed_addr global i32 0, align 4
@POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN = dso_local local_unnamed_addr global i32 0, align 4
@POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT = dso_local local_unnamed_addr global i32 0, align 4
@POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @axp20x_battery_prop_writeable], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @axp20x_battery_prop_writeable(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, align 4, !tbaa !5
%4 = icmp eq i32 %3, %1
%5 = load i32, ptr @POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, align 4
%6 = icmp eq i32 %5, %1
%7 = select i1 %4, i1 true, i1 %6
%8 = load i32, ptr @POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, align 4
%9 = icmp eq i32 %8, %1
%10 = select i1 %7, i1 true, i1 %9
%11 = load i32, ptr @POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, align 4
%12 = icmp eq i32 %11, %1
%13 = select i1 %10, i1 true, i1 %12
%14 = zext i1 %13 to i32
ret i32 %14
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_axp20x_battery.c_axp20x_battery_prop_writeable.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_axp20x_battery.c_axp20x_battery_prop_writeable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN = common local_unnamed_addr global i32 0, align 4
@POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN = common local_unnamed_addr global i32 0, align 4
@POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT = common local_unnamed_addr global i32 0, align 4
@POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @axp20x_battery_prop_writeable], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @axp20x_battery_prop_writeable(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, align 4, !tbaa !6
%4 = icmp eq i32 %3, %1
%5 = load i32, ptr @POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, align 4
%6 = icmp eq i32 %5, %1
%7 = select i1 %4, i1 true, i1 %6
%8 = load i32, ptr @POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, align 4
%9 = icmp eq i32 %8, %1
%10 = select i1 %7, i1 true, i1 %9
%11 = load i32, ptr @POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, align 4
%12 = icmp eq i32 %11, %1
%13 = select i1 %10, i1 true, i1 %12
%14 = zext i1 %13 to i32
ret i32 %14
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_power_supply_extr_axp20x_battery.c_axp20x_battery_prop_writeable |
; ModuleID = 'AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy.c_mcc_crypto_check_perm.c'
source_filename = "AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy.c_mcc_crypto_check_perm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @mcc_crypto_check_perm(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mcc_default_check_perm(ptr noundef %0) #2
%3 = icmp sgt i32 %2, 0
%4 = select i1 %3, i32 2, i32 %2
ret i32 %4
}
declare i32 @mcc_default_check_perm(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy.c_mcc_crypto_check_perm.c'
source_filename = "AnghaBench/kphp-kdb/mc-proxy/extr_mc-proxy.c_mcc_crypto_check_perm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483648, 3) i32 @mcc_crypto_check_perm(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mcc_default_check_perm(ptr noundef %0) #2
%3 = icmp sgt i32 %2, 0
%4 = select i1 %3, i32 2, i32 %2
ret i32 %4
}
declare i32 @mcc_default_check_perm(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| kphp-kdb_mc-proxy_extr_mc-proxy.c_mcc_crypto_check_perm |
; ModuleID = 'AnghaBench/fastsocket/kernel/crypto/extr_rng.c_rngapi_reset.c'
source_filename = "AnghaBench/fastsocket/kernel/crypto/extr_rng.c_rngapi_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rngapi_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rngapi_reset(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp eq ptr %1, null
%5 = icmp ne i32 %2, 0
%6 = and i1 %4, %5
br i1 %6, label %7, label %16
7: ; preds = %3
%8 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%9 = tail call ptr @kmalloc(i32 noundef %2, i32 noundef %8) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%13 = sub nsw i32 0, %12
br label %23
14: ; preds = %7
%15 = tail call i32 @get_random_bytes(ptr noundef nonnull %9, i32 noundef %2) #2
br label %16
16: ; preds = %14, %3
%17 = phi ptr [ %9, %14 ], [ %1, %3 ]
%18 = phi ptr [ %9, %14 ], [ null, %3 ]
%19 = tail call ptr @crypto_rng_alg(ptr noundef %0) #2
%20 = load ptr, ptr %19, align 8, !tbaa !9
%21 = tail call i32 %20(ptr noundef %0, ptr noundef %17, i32 noundef %2) #2
%22 = tail call i32 @kfree(ptr noundef %18) #2
br label %23
23: ; preds = %16, %11
%24 = phi i32 [ %21, %16 ], [ %13, %11 ]
ret i32 %24
}
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @get_random_bytes(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @crypto_rng_alg(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/crypto/extr_rng.c_rngapi_reset.c'
source_filename = "AnghaBench/fastsocket/kernel/crypto/extr_rng.c_rngapi_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rngapi_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rngapi_reset(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = icmp eq ptr %1, null
%5 = icmp ne i32 %2, 0
%6 = and i1 %4, %5
br i1 %6, label %7, label %16
7: ; preds = %3
%8 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%9 = tail call ptr @kmalloc(i32 noundef %2, i32 noundef %8) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%13 = sub nsw i32 0, %12
br label %23
14: ; preds = %7
%15 = tail call i32 @get_random_bytes(ptr noundef nonnull %9, i32 noundef %2) #2
br label %16
16: ; preds = %14, %3
%17 = phi ptr [ %9, %14 ], [ %1, %3 ]
%18 = phi ptr [ %9, %14 ], [ null, %3 ]
%19 = tail call ptr @crypto_rng_alg(ptr noundef %0) #2
%20 = load ptr, ptr %19, align 8, !tbaa !10
%21 = tail call i32 %20(ptr noundef %0, ptr noundef %17, i32 noundef %2) #2
%22 = tail call i32 @kfree(ptr noundef %18) #2
br label %23
23: ; preds = %16, %11
%24 = phi i32 [ %21, %16 ], [ %13, %11 ]
ret i32 %24
}
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @get_random_bytes(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @crypto_rng_alg(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
| fastsocket_kernel_crypto_extr_rng.c_rngapi_reset |
; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_jsonfuncs.c_alen_array_element_start.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_jsonfuncs.c_alen_array_element_start.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @alen_array_element_start], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @alen_array_element_start(ptr nocapture noundef %0, i32 %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr %0, align 8, !tbaa !13
%9 = add nsw i32 %8, 1
store i32 %9, ptr %0, align 8, !tbaa !13
br label %10
10: ; preds = %7, %2
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0}
!13 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_jsonfuncs.c_alen_array_element_start.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_jsonfuncs.c_alen_array_element_start.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @alen_array_element_start], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @alen_array_element_start(ptr nocapture noundef %0, i32 %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !12
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, ptr %0, align 8, !tbaa !14
%9 = add nsw i32 %8, 1
store i32 %9, ptr %0, align 8, !tbaa !14
br label %10
10: ; preds = %7, %2
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_3__", !8, i64 0}
!14 = !{!7, !8, i64 0}
| postgres_src_backend_utils_adt_extr_jsonfuncs.c_alen_array_element_start |
; ModuleID = 'AnghaBench/ccv/bin/extr_swtcreate.c_decode_range.c'
source_filename = "AnghaBench/ccv/bin/extr_swtcreate.c_decode_range.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr, ptr, ptr }
@.str = private unnamed_addr constant [2 x i8] c"x\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"X\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c",\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @decode_range], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @decode_range(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
store i32 0, ptr %1, align 8, !tbaa !5
%3 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str) #3
%4 = icmp eq i64 %3, 0
br i1 %4, label %24, label %5
5: ; preds = %2
%6 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str.1) #3
%7 = icmp eq i64 %6, 0
br i1 %7, label %24, label %8
8: ; preds = %5
%9 = tail call ptr @strtok(ptr noundef %0, ptr noundef nonnull @.str.2)
%10 = icmp eq ptr %9, null
br i1 %10, label %24, label %11
11: ; preds = %8
%12 = tail call ptr @strtod(ptr noundef nonnull %9, i32 noundef 0) #3
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 3
store ptr %12, ptr %13, align 8, !tbaa !11
%14 = tail call ptr @strtok(ptr noundef null, ptr noundef nonnull @.str.2)
%15 = icmp eq ptr %14, null
br i1 %15, label %24, label %16
16: ; preds = %11
%17 = tail call ptr @strtod(ptr noundef nonnull %14, i32 noundef 0) #3
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
store ptr %17, ptr %18, align 8, !tbaa !12
%19 = tail call ptr @strtok(ptr noundef null, ptr noundef nonnull @.str.2)
%20 = icmp eq ptr %19, null
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = tail call ptr @strtod(ptr noundef nonnull %19, i32 noundef 0) #3
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
store ptr %22, ptr %23, align 8, !tbaa !13
store i32 1, ptr %1, align 8, !tbaa !5
br label %24
24: ; preds = %8, %16, %21, %11, %5, %2
ret void
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn
declare ptr @strtok(ptr noundef, ptr nocapture noundef readonly) local_unnamed_addr #2
declare ptr @strtod(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 24}
!12 = !{!6, !10, i64 16}
!13 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/ccv/bin/extr_swtcreate.c_decode_range.c'
source_filename = "AnghaBench/ccv/bin/extr_swtcreate.c_decode_range.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [2 x i8] c"x\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"X\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c",\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @decode_range], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @decode_range(ptr noundef %0, ptr nocapture noundef writeonly %1) #0 {
store i32 0, ptr %1, align 8, !tbaa !6
%3 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str) #3
%4 = icmp eq i64 %3, 0
br i1 %4, label %24, label %5
5: ; preds = %2
%6 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str.1) #3
%7 = icmp eq i64 %6, 0
br i1 %7, label %24, label %8
8: ; preds = %5
%9 = tail call ptr @strtok(ptr noundef %0, ptr noundef nonnull @.str.2)
%10 = icmp eq ptr %9, null
br i1 %10, label %24, label %11
11: ; preds = %8
%12 = tail call ptr @strtod(ptr noundef nonnull %9, i32 noundef 0) #3
%13 = getelementptr inbounds i8, ptr %1, i64 24
store ptr %12, ptr %13, align 8, !tbaa !12
%14 = tail call ptr @strtok(ptr noundef null, ptr noundef nonnull @.str.2)
%15 = icmp eq ptr %14, null
br i1 %15, label %24, label %16
16: ; preds = %11
%17 = tail call ptr @strtod(ptr noundef nonnull %14, i32 noundef 0) #3
%18 = getelementptr inbounds i8, ptr %1, i64 16
store ptr %17, ptr %18, align 8, !tbaa !13
%19 = tail call ptr @strtok(ptr noundef null, ptr noundef nonnull @.str.2)
%20 = icmp eq ptr %19, null
br i1 %20, label %24, label %21
21: ; preds = %16
%22 = tail call ptr @strtod(ptr noundef nonnull %19, i32 noundef 0) #3
%23 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %22, ptr %23, align 8, !tbaa !14
store i32 1, ptr %1, align 8, !tbaa !6
br label %24
24: ; preds = %8, %16, %21, %11, %5, %2
ret void
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn
declare ptr @strtok(ptr noundef, ptr nocapture noundef readonly) local_unnamed_addr #2
declare ptr @strtod(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 24}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !11, i64 8}
| ccv_bin_extr_swtcreate.c_decode_range |
; ModuleID = 'AnghaBench/linux/drivers/net/wan/extr_cosa.c_cosa_dma_able.c'
source_filename = "AnghaBench/linux/drivers/net/wan/extr_cosa.c_cosa_dma_able.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cosa_dma_able.count = internal unnamed_addr global i32 0, align 4
@MAX_DMA_ADDRESS = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [36 x i8] c"%s: packet spanning a 64k boundary\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @cosa_dma_able], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @cosa_dma_able(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = ptrtoint ptr %1 to i64
%5 = sext i32 %2 to i64
%6 = add i64 %5, %4
%7 = load i64, ptr @MAX_DMA_ADDRESS, align 8, !tbaa !5
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %3
%10 = xor i64 %6, %4
%11 = and i64 %10, 65536
%12 = icmp eq i64 %11, 0
br i1 %12, label %20, label %13
13: ; preds = %9
%14 = load i32, ptr @cosa_dma_able.count, align 4, !tbaa !9
%15 = add nsw i32 %14, 1
store i32 %15, ptr @cosa_dma_able.count, align 4, !tbaa !9
%16 = icmp slt i32 %14, 5
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, ptr %0, align 4, !tbaa !11
%19 = tail call i32 @pr_info(ptr noundef nonnull @.str, i32 noundef %18) #2
br label %20
20: ; preds = %9, %13, %17, %3
%21 = phi i32 [ 0, %3 ], [ 0, %17 ], [ 0, %13 ], [ 1, %9 ]
ret i32 %21
}
declare i32 @pr_info(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"channel_data", !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wan/extr_cosa.c_cosa_dma_able.c'
source_filename = "AnghaBench/linux/drivers/net/wan/extr_cosa.c_cosa_dma_able.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cosa_dma_able.count = internal unnamed_addr global i32 0, align 4
@MAX_DMA_ADDRESS = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [36 x i8] c"%s: packet spanning a 64k boundary\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @cosa_dma_able], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @cosa_dma_able(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = ptrtoint ptr %1 to i64
%5 = sext i32 %2 to i64
%6 = add i64 %5, %4
%7 = load i64, ptr @MAX_DMA_ADDRESS, align 8, !tbaa !6
%8 = icmp ult i64 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %3
%10 = xor i64 %6, %4
%11 = and i64 %10, 65536
%12 = icmp eq i64 %11, 0
br i1 %12, label %20, label %13
13: ; preds = %9
%14 = load i32, ptr @cosa_dma_able.count, align 4, !tbaa !10
%15 = add nsw i32 %14, 1
store i32 %15, ptr @cosa_dma_able.count, align 4, !tbaa !10
%16 = icmp slt i32 %14, 5
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, ptr %0, align 4, !tbaa !12
%19 = tail call i32 @pr_info(ptr noundef nonnull @.str, i32 noundef %18) #2
br label %20
20: ; preds = %9, %13, %17, %3
%21 = phi i32 [ 0, %3 ], [ 0, %17 ], [ 0, %13 ], [ 1, %9 ]
ret i32 %21
}
declare i32 @pr_info(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"channel_data", !11, i64 0}
| linux_drivers_net_wan_extr_cosa.c_cosa_dma_able |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine.h_intel_engine_context_out.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine.h_intel_engine_context_out.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64, i64, i32, ptr, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_engine_context_out], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @intel_engine_context_out(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = tail call i64 @READ_ONCE(i64 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2
%7 = tail call i32 @write_seqlock_irqsave(ptr noundef nonnull %6, i64 noundef undef) #2
%8 = load i64, ptr %0, align 8, !tbaa !5
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %32
10: ; preds = %5
%11 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%12 = load i64, ptr %11, align 8, !tbaa !13
%13 = icmp eq i64 %12, 0
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = add nsw i64 %12, -1
store i64 %15, ptr %11, align 8, !tbaa !13
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %32
17: ; preds = %14
%18 = tail call i32 (...) @ktime_get() #2
%19 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 5
%20 = load i32, ptr %19, align 4, !tbaa !14
%21 = tail call i32 @ktime_sub(i32 noundef %18, i32 noundef %20) #2
br label %27
22: ; preds = %10
%23 = tail call i32 (...) @ktime_get() #2
%24 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 4
%25 = load i32, ptr %24, align 8, !tbaa !15
%26 = tail call i32 @ktime_sub(i32 noundef %23, i32 noundef %25) #2
br label %27
27: ; preds = %22, %17
%28 = phi i32 [ %21, %17 ], [ %26, %22 ]
%29 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 3
%30 = load ptr, ptr %29, align 8, !tbaa !16
%31 = tail call ptr @ktime_add(ptr noundef %30, i32 noundef %28) #2
store ptr %31, ptr %29, align 8, !tbaa !16
br label %32
32: ; preds = %27, %14, %5
%33 = tail call i32 @write_sequnlock_irqrestore(ptr noundef nonnull %6, i64 noundef undef) #2
br label %34
34: ; preds = %1, %32
ret void
}
declare i64 @READ_ONCE(i64 noundef) local_unnamed_addr #1
declare i32 @write_seqlock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ktime_sub(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ktime_get(...) local_unnamed_addr #1
declare ptr @ktime_add(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @write_sequnlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"intel_engine_cs", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 8, !11, i64 16, !12, i64 24, !11, i64 32, !11, i64 36}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!6, !8, i64 8}
!14 = !{!6, !11, i64 36}
!15 = !{!6, !11, i64 32}
!16 = !{!6, !12, i64 24}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine.h_intel_engine_context_out.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/extr_intel_engine.h_intel_engine_context_out.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @intel_engine_context_out], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @intel_engine_context_out(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = tail call i64 @READ_ONCE(i64 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = tail call i32 @write_seqlock_irqsave(ptr noundef nonnull %6, i64 noundef undef) #2
%8 = load i64, ptr %0, align 8, !tbaa !6
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %32
10: ; preds = %5
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i64, ptr %11, align 8, !tbaa !14
%13 = icmp eq i64 %12, 0
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = add nsw i64 %12, -1
store i64 %15, ptr %11, align 8, !tbaa !14
%16 = icmp eq i64 %15, 0
br i1 %16, label %17, label %32
17: ; preds = %14
%18 = tail call i32 @ktime_get() #2
%19 = getelementptr inbounds i8, ptr %0, i64 36
%20 = load i32, ptr %19, align 4, !tbaa !15
%21 = tail call i32 @ktime_sub(i32 noundef %18, i32 noundef %20) #2
br label %27
22: ; preds = %10
%23 = tail call i32 @ktime_get() #2
%24 = getelementptr inbounds i8, ptr %0, i64 32
%25 = load i32, ptr %24, align 8, !tbaa !16
%26 = tail call i32 @ktime_sub(i32 noundef %23, i32 noundef %25) #2
br label %27
27: ; preds = %22, %17
%28 = phi i32 [ %21, %17 ], [ %26, %22 ]
%29 = getelementptr inbounds i8, ptr %0, i64 24
%30 = load ptr, ptr %29, align 8, !tbaa !17
%31 = tail call ptr @ktime_add(ptr noundef %30, i32 noundef %28) #2
store ptr %31, ptr %29, align 8, !tbaa !17
br label %32
32: ; preds = %27, %14, %5
%33 = tail call i32 @write_sequnlock_irqrestore(ptr noundef nonnull %6, i64 noundef undef) #2
br label %34
34: ; preds = %1, %32
ret void
}
declare i64 @READ_ONCE(i64 noundef) local_unnamed_addr #1
declare i32 @write_seqlock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ktime_sub(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ktime_get(...) local_unnamed_addr #1
declare ptr @ktime_add(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @write_sequnlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"intel_engine_cs", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 8, !12, i64 16, !13, i64 24, !12, i64 32, !12, i64 36}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!7, !9, i64 8}
!15 = !{!7, !12, i64 36}
!16 = !{!7, !12, i64 32}
!17 = !{!7, !13, i64 24}
| linux_drivers_gpu_drm_i915_gt_extr_intel_engine.h_intel_engine_context_out |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/matrox/extr_i2c-matroxfb.c_matroxfb_read_gpio.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/matrox/extr_i2c-matroxfb.c_matroxfb_read_gpio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DAC_XGENIODATA = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @matroxfb_read_gpio], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @matroxfb_read_gpio(ptr noundef %0) #0 {
%2 = tail call i32 @matroxfb_DAC_lock_irqsave(i64 noundef undef) #2
%3 = load i32, ptr @DAC_XGENIODATA, align 4, !tbaa !5
%4 = tail call i32 @matroxfb_DAC_in(ptr noundef %0, i32 noundef %3) #2
%5 = tail call i32 @matroxfb_DAC_unlock_irqrestore(i64 noundef undef) #2
ret i32 %4
}
declare i32 @matroxfb_DAC_lock_irqsave(i64 noundef) local_unnamed_addr #1
declare i32 @matroxfb_DAC_in(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @matroxfb_DAC_unlock_irqrestore(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/matrox/extr_i2c-matroxfb.c_matroxfb_read_gpio.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/matrox/extr_i2c-matroxfb.c_matroxfb_read_gpio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DAC_XGENIODATA = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @matroxfb_read_gpio], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @matroxfb_read_gpio(ptr noundef %0) #0 {
%2 = tail call i32 @matroxfb_DAC_lock_irqsave(i64 noundef undef) #2
%3 = load i32, ptr @DAC_XGENIODATA, align 4, !tbaa !6
%4 = tail call i32 @matroxfb_DAC_in(ptr noundef %0, i32 noundef %3) #2
%5 = tail call i32 @matroxfb_DAC_unlock_irqrestore(i64 noundef undef) #2
ret i32 %4
}
declare i32 @matroxfb_DAC_lock_irqsave(i64 noundef) local_unnamed_addr #1
declare i32 @matroxfb_DAC_in(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @matroxfb_DAC_unlock_irqrestore(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_video_matrox_extr_i2c-matroxfb.c_matroxfb_read_gpio |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_uar.c_mthca_uar_alloc.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_uar.c_mthca_uar_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mthca_dev = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
%struct.mthca_uar = type { i32, i32 }
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @mthca_uar_alloc(ptr noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.mthca_dev, ptr %0, i64 0, i32 1
%4 = tail call i32 @mthca_alloc(ptr noundef nonnull %3) #2
store i32 %4, ptr %1, align 4, !tbaa !5
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !10
%8 = sub nsw i32 0, %7
br label %17
9: ; preds = %2
%10 = load i32, ptr %0, align 4, !tbaa !11
%11 = tail call i32 @pci_resource_start(i32 noundef %10, i32 noundef 2) #2
%12 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !10
%13 = ashr i32 %11, %12
%14 = load i32, ptr %1, align 4, !tbaa !5
%15 = add nsw i32 %13, %14
%16 = getelementptr inbounds %struct.mthca_uar, ptr %1, i64 0, i32 1
store i32 %15, ptr %16, align 4, !tbaa !14
br label %17
17: ; preds = %9, %6
%18 = phi i32 [ %8, %6 ], [ 0, %9 ]
ret i32 %18
}
declare i32 @mthca_alloc(ptr noundef) local_unnamed_addr #1
declare i32 @pci_resource_start(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mthca_uar", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"mthca_dev", !7, i64 0, !13, i64 4}
!13 = !{!"TYPE_2__", !7, i64 0}
!14 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_uar.c_mthca_uar_alloc.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/mthca/extr_mthca_uar.c_mthca_uar_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@PAGE_SHIFT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @mthca_uar_alloc(ptr noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = tail call i32 @mthca_alloc(ptr noundef nonnull %3) #2
store i32 %4, ptr %1, align 4, !tbaa !6
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !11
%8 = sub nsw i32 0, %7
br label %17
9: ; preds = %2
%10 = load i32, ptr %0, align 4, !tbaa !12
%11 = tail call i32 @pci_resource_start(i32 noundef %10, i32 noundef 2) #2
%12 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !11
%13 = ashr i32 %11, %12
%14 = load i32, ptr %1, align 4, !tbaa !6
%15 = add nsw i32 %13, %14
%16 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %15, ptr %16, align 4, !tbaa !15
br label %17
17: ; preds = %9, %6
%18 = phi i32 [ %8, %6 ], [ 0, %9 ]
ret i32 %18
}
declare i32 @mthca_alloc(ptr noundef) local_unnamed_addr #1
declare i32 @pci_resource_start(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mthca_uar", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"mthca_dev", !8, i64 0, !14, i64 4}
!14 = !{!"TYPE_2__", !8, i64 0}
!15 = !{!7, !8, i64 4}
| fastsocket_kernel_drivers_infiniband_hw_mthca_extr_mthca_uar.c_mthca_uar_alloc |
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_uda1380.c_uda1380_write_reg_cache.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_uda1380.c_uda1380_write_reg_cache.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@UDA1380_CACHEREGNUM = dso_local local_unnamed_addr global i32 0, align 4
@uda1380_cache_dirty = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uda1380_write_reg_cache], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @uda1380_write_reg_cache(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load i32, ptr @UDA1380_CACHEREGNUM, align 4, !tbaa !10
%7 = icmp sgt i32 %6, %1
br i1 %7, label %8, label %21
8: ; preds = %3
%9 = icmp sgt i32 %1, 15
br i1 %9, label %10, label %18
10: ; preds = %8
%11 = zext nneg i32 %1 to i64
%12 = getelementptr inbounds i32, ptr %5, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !10
%14 = icmp eq i32 %13, %2
br i1 %14, label %18, label %15
15: ; preds = %10
%16 = add nsw i32 %1, -16
%17 = tail call i32 @set_bit(i32 noundef %16, ptr noundef nonnull @uda1380_cache_dirty) #2
br label %18
18: ; preds = %15, %10, %8
%19 = sext i32 %1 to i64
%20 = getelementptr inbounds i32, ptr %5, i64 %19
store i32 %2, ptr %20, align 4, !tbaa !10
br label %21
21: ; preds = %3, %18
ret void
}
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"uda1380_priv", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_uda1380.c_uda1380_write_reg_cache.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_uda1380.c_uda1380_write_reg_cache.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UDA1380_CACHEREGNUM = common local_unnamed_addr global i32 0, align 4
@uda1380_cache_dirty = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uda1380_write_reg_cache], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @uda1380_write_reg_cache(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load i32, ptr @UDA1380_CACHEREGNUM, align 4, !tbaa !11
%7 = icmp sgt i32 %6, %1
br i1 %7, label %8, label %21
8: ; preds = %3
%9 = icmp sgt i32 %1, 15
br i1 %9, label %10, label %18
10: ; preds = %8
%11 = zext nneg i32 %1 to i64
%12 = getelementptr inbounds i32, ptr %5, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !11
%14 = icmp eq i32 %13, %2
br i1 %14, label %18, label %15
15: ; preds = %10
%16 = add nsw i32 %1, -16
%17 = tail call i32 @set_bit(i32 noundef %16, ptr noundef nonnull @uda1380_cache_dirty) #2
br label %18
18: ; preds = %15, %10, %8
%19 = sext i32 %1 to i64
%20 = getelementptr inbounds i32, ptr %5, i64 %19
store i32 %2, ptr %20, align 4, !tbaa !11
br label %21
21: ; preds = %3, %18
ret void
}
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"uda1380_priv", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| linux_sound_soc_codecs_extr_uda1380.c_uda1380_write_reg_cache |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/dma/extr_iop-adma.c_iop_adma_tasklet.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/dma/extr_iop-adma.c_iop_adma_tasklet.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SINGLE_DEPTH_NESTING = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @iop_adma_tasklet], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @iop_adma_tasklet(i64 noundef %0) #0 {
%2 = inttoptr i64 %0 to ptr
%3 = load i32, ptr @SINGLE_DEPTH_NESTING, align 4, !tbaa !5
%4 = tail call i32 @spin_lock_nested(ptr noundef %2, i32 noundef %3) #2
%5 = tail call i32 @__iop_adma_slot_cleanup(ptr noundef %2) #2
%6 = tail call i32 @spin_unlock(ptr noundef %2) #2
ret void
}
declare i32 @spin_lock_nested(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__iop_adma_slot_cleanup(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/dma/extr_iop-adma.c_iop_adma_tasklet.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/dma/extr_iop-adma.c_iop_adma_tasklet.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SINGLE_DEPTH_NESTING = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @iop_adma_tasklet], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @iop_adma_tasklet(i64 noundef %0) #0 {
%2 = inttoptr i64 %0 to ptr
%3 = load i32, ptr @SINGLE_DEPTH_NESTING, align 4, !tbaa !6
%4 = tail call i32 @spin_lock_nested(ptr noundef %2, i32 noundef %3) #2
%5 = tail call i32 @__iop_adma_slot_cleanup(ptr noundef %2) #2
%6 = tail call i32 @spin_unlock(ptr noundef %2) #2
ret void
}
declare i32 @spin_lock_nested(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__iop_adma_slot_cleanup(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_dma_extr_iop-adma.c_iop_adma_tasklet |
; ModuleID = 'AnghaBench/linux/net/tipc/extr_bearer.h_tipc_loopback_trace.c'
source_filename = "AnghaBench/linux/net/tipc/extr_bearer.h_tipc_loopback_trace.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @tipc_loopback_trace], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @tipc_loopback_trace(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @dev_nit_active(i32 noundef %3) #2
%5 = tail call i64 @unlikely(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @tipc_clone_to_loopback(ptr noundef nonnull %0, ptr noundef %1) #2
br label %9
9: ; preds = %7, %2
ret void
}
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @dev_nit_active(i32 noundef) local_unnamed_addr #1
declare i32 @tipc_clone_to_loopback(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"net", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/net/tipc/extr_bearer.h_tipc_loopback_trace.c'
source_filename = "AnghaBench/linux/net/tipc/extr_bearer.h_tipc_loopback_trace.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tipc_loopback_trace], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @tipc_loopback_trace(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @dev_nit_active(i32 noundef %3) #2
%5 = tail call i64 @unlikely(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @tipc_clone_to_loopback(ptr noundef nonnull %0, ptr noundef %1) #2
br label %9
9: ; preds = %7, %2
ret void
}
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @dev_nit_active(i32 noundef) local_unnamed_addr #1
declare i32 @tipc_clone_to_loopback(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"net", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_net_tipc_extr_bearer.h_tipc_loopback_trace |
; ModuleID = 'AnghaBench/linux/fs/f2fs/extr_segment.c_f2fs_update_meta_page.c'
source_filename = "AnghaBench/linux/fs/f2fs/extr_segment.c_f2fs_update_meta_page.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @f2fs_update_meta_page(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @f2fs_grab_meta_page(ptr noundef %0, i32 noundef %2) #2
%5 = tail call i32 @page_address(ptr noundef %4) #2
%6 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !5
%7 = tail call i32 @memcpy(i32 noundef %5, ptr noundef %1, i32 noundef %6) #2
%8 = tail call i32 @set_page_dirty(ptr noundef %4) #2
%9 = tail call i32 @f2fs_put_page(ptr noundef %4, i32 noundef 1) #2
ret void
}
declare ptr @f2fs_grab_meta_page(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @page_address(ptr noundef) local_unnamed_addr #1
declare i32 @set_page_dirty(ptr noundef) local_unnamed_addr #1
declare i32 @f2fs_put_page(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/f2fs/extr_segment.c_f2fs_update_meta_page.c'
source_filename = "AnghaBench/linux/fs/f2fs/extr_segment.c_f2fs_update_meta_page.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @f2fs_update_meta_page(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @f2fs_grab_meta_page(ptr noundef %0, i32 noundef %2) #2
%5 = tail call i32 @page_address(ptr noundef %4) #2
%6 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%7 = tail call i32 @memcpy(i32 noundef %5, ptr noundef %1, i32 noundef %6) #2
%8 = tail call i32 @set_page_dirty(ptr noundef %4) #2
%9 = tail call i32 @f2fs_put_page(ptr noundef %4, i32 noundef 1) #2
ret void
}
declare ptr @f2fs_grab_meta_page(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @page_address(ptr noundef) local_unnamed_addr #1
declare i32 @set_page_dirty(ptr noundef) local_unnamed_addr #1
declare i32 @f2fs_put_page(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_fs_f2fs_extr_segment.c_f2fs_update_meta_page |
; ModuleID = 'AnghaBench/freebsd/contrib/libxo/libxo/extr_libxo.c_xo_buf_find_last_number.c'
source_filename = "AnghaBench/freebsd/contrib/libxo/libxo/extr_libxo.c_xo_buf_find_last_number.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @xo_buf_find_last_number], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xo_buf_find_last_number(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i8, ptr %3, i64 %4
br label %6
6: ; preds = %10, %2
%7 = phi ptr [ %5, %2 ], [ %8, %10 ]
%8 = getelementptr inbounds i8, ptr %7, i64 -1
%9 = icmp ult ptr %8, %3
br i1 %9, label %32, label %10
10: ; preds = %6
%11 = load i8, ptr %8, align 1, !tbaa !10
%12 = sext i8 %11 to i32
%13 = tail call i64 @isdigit(i32 noundef %12) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %6, label %15, !llvm.loop !11
15: ; preds = %10, %23
%16 = phi ptr [ %30, %23 ], [ %8, %10 ]
%17 = phi i32 [ %28, %23 ], [ 0, %10 ]
%18 = phi i32 [ %29, %23 ], [ 1, %10 ]
%19 = load i8, ptr %16, align 1, !tbaa !10
%20 = sext i8 %19 to i32
%21 = tail call i64 @isdigit(i32 noundef %20) #2
%22 = icmp eq i64 %21, 0
br i1 %22, label %32, label %23
23: ; preds = %15
%24 = load i8, ptr %16, align 1, !tbaa !10
%25 = sext i8 %24 to i32
%26 = add nsw i32 %25, -48
%27 = mul nsw i32 %26, %18
%28 = add nsw i32 %27, %17
%29 = mul nsw i32 %18, 10
%30 = getelementptr inbounds i8, ptr %16, i64 -1
%31 = icmp ult ptr %30, %3
br i1 %31, label %32, label %15, !llvm.loop !13
32: ; preds = %6, %23, %15
%33 = phi i32 [ %17, %15 ], [ %28, %23 ], [ 0, %6 ]
ret i32 %33
}
declare i64 @isdigit(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libxo/libxo/extr_libxo.c_xo_buf_find_last_number.c'
source_filename = "AnghaBench/freebsd/contrib/libxo/libxo/extr_libxo.c_xo_buf_find_last_number.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @xo_buf_find_last_number], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @xo_buf_find_last_number(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i8, ptr %3, i64 %4
br label %6
6: ; preds = %10, %2
%7 = phi ptr [ %5, %2 ], [ %8, %10 ]
%8 = getelementptr inbounds i8, ptr %7, i64 -1
%9 = icmp ult ptr %8, %3
br i1 %9, label %32, label %10
10: ; preds = %6
%11 = load i8, ptr %8, align 1, !tbaa !11
%12 = sext i8 %11 to i32
%13 = tail call i64 @isdigit(i32 noundef %12) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %6, label %15, !llvm.loop !12
15: ; preds = %10, %23
%16 = phi ptr [ %30, %23 ], [ %8, %10 ]
%17 = phi i32 [ %28, %23 ], [ 0, %10 ]
%18 = phi i32 [ %29, %23 ], [ 1, %10 ]
%19 = load i8, ptr %16, align 1, !tbaa !11
%20 = sext i8 %19 to i32
%21 = tail call i64 @isdigit(i32 noundef %20) #2
%22 = icmp eq i64 %21, 0
br i1 %22, label %32, label %23
23: ; preds = %15
%24 = load i8, ptr %16, align 1, !tbaa !11
%25 = sext i8 %24 to i32
%26 = add nsw i32 %25, -48
%27 = mul nsw i32 %26, %18
%28 = add nsw i32 %27, %17
%29 = mul nuw nsw i32 %18, 10
%30 = getelementptr inbounds i8, ptr %16, i64 -1
%31 = icmp ult ptr %30, %3
br i1 %31, label %32, label %15, !llvm.loop !14
32: ; preds = %6, %23, %15
%33 = phi i32 [ %17, %15 ], [ %28, %23 ], [ 0, %6 ]
ret i32 %33
}
declare i64 @isdigit(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!9, !9, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
| freebsd_contrib_libxo_libxo_extr_libxo.c_xo_buf_find_last_number |
; ModuleID = 'AnghaBench/freebsd/contrib/libpcap/extr_pcap-sita.c_dump_unit_table.c'
source_filename = "AnghaBench/freebsd/contrib/libpcap/extr_pcap-sita.c_dump_unit_table.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, i32, ptr }
%struct.TYPE_3__ = type { ptr, ptr, ptr }
@.str = private unnamed_addr constant [13 x i8] c"%c:%c %s %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"fd\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"IP Address\00", align 1
@MAX_CHASSIS = dso_local local_unnamed_addr global i32 0, align 4
@MAX_GEOSLOT = dso_local local_unnamed_addr global i32 0, align 4
@units = dso_local local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [14 x i8] c"%d:%d %2d %s\0A\00", align 1
@.str.4 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.5 = private unnamed_addr constant [20 x i8] c" %12s -> %12s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @dump_unit_table], section "llvm.metadata"
; Function Attrs: nofree nounwind uwtable
define internal void @dump_unit_table() #0 {
%1 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef 67, i32 noundef 83, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2)
%2 = load i32, ptr @MAX_CHASSIS, align 4, !tbaa !5
%3 = icmp slt i32 %2, 0
br i1 %3, label %60, label %4
4: ; preds = %0
%5 = load i32, ptr @MAX_GEOSLOT, align 4, !tbaa !5
br label %6
6: ; preds = %4, %54
%7 = phi i32 [ %2, %4 ], [ %55, %54 ]
%8 = phi i32 [ %5, %4 ], [ %56, %54 ]
%9 = phi i64 [ 0, %4 ], [ %57, %54 ]
%10 = icmp slt i32 %8, 0
br i1 %10, label %54, label %11
11: ; preds = %6
%12 = trunc i64 %9 to i32
br label %13
13: ; preds = %11, %47
%14 = phi i64 [ 0, %11 ], [ %48, %47 ]
%15 = load ptr, ptr @units, align 8, !tbaa !9
%16 = getelementptr inbounds ptr, ptr %15, i64 %9
%17 = load ptr, ptr %16, align 8, !tbaa !9
%18 = getelementptr inbounds %struct.TYPE_4__, ptr %17, i64 %14
%19 = load ptr, ptr %18, align 8, !tbaa !11
%20 = icmp eq ptr %19, null
br i1 %20, label %29, label %21
21: ; preds = %13
%22 = getelementptr inbounds %struct.TYPE_4__, ptr %17, i64 %14, i32 1
%23 = load i32, ptr %22, align 8, !tbaa !13
%24 = trunc i64 %14 to i32
%25 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %12, i32 noundef %24, i32 noundef %23, ptr noundef nonnull %19)
%26 = load ptr, ptr @units, align 8, !tbaa !9
%27 = getelementptr inbounds ptr, ptr %26, i64 %9
%28 = load ptr, ptr %27, align 8, !tbaa !9
br label %29
29: ; preds = %21, %13
%30 = phi ptr [ %28, %21 ], [ %17, %13 ]
%31 = getelementptr inbounds %struct.TYPE_4__, ptr %30, i64 %14, i32 2
%32 = load ptr, ptr %31, align 8, !tbaa !14
%33 = icmp eq ptr %32, null
br i1 %33, label %47, label %34
34: ; preds = %29, %34
%35 = phi ptr [ %44, %34 ], [ %32, %29 ]
%36 = load ptr, ptr %35, align 8, !tbaa !15
%37 = icmp eq ptr %36, null
%38 = select i1 %37, ptr @.str.4, ptr %36
%39 = getelementptr inbounds %struct.TYPE_3__, ptr %35, i64 0, i32 1
%40 = load ptr, ptr %39, align 8, !tbaa !17
%41 = icmp eq ptr %40, null
%42 = select i1 %41, ptr @.str.4, ptr %40
%43 = getelementptr inbounds %struct.TYPE_3__, ptr %35, i64 0, i32 2
%44 = load ptr, ptr %43, align 8, !tbaa !18
%45 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, ptr noundef nonnull %42, ptr noundef nonnull %38)
%46 = icmp eq ptr %44, null
br i1 %46, label %47, label %34, !llvm.loop !19
47: ; preds = %34, %29
%48 = add nuw nsw i64 %14, 1
%49 = load i32, ptr @MAX_GEOSLOT, align 4, !tbaa !5
%50 = sext i32 %49 to i64
%51 = icmp slt i64 %14, %50
br i1 %51, label %13, label %52, !llvm.loop !21
52: ; preds = %47
%53 = load i32, ptr @MAX_CHASSIS, align 4, !tbaa !5
br label %54
54: ; preds = %52, %6
%55 = phi i32 [ %53, %52 ], [ %7, %6 ]
%56 = phi i32 [ %49, %52 ], [ %8, %6 ]
%57 = add nuw nsw i64 %9, 1
%58 = sext i32 %55 to i64
%59 = icmp slt i64 %9, %58
br i1 %59, label %6, label %60, !llvm.loop !22
60: ; preds = %54, %0
ret void
}
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1
attributes #0 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_4__", !10, i64 0, !6, i64 8, !10, i64 16}
!13 = !{!12, !6, i64 8}
!14 = !{!12, !10, i64 16}
!15 = !{!16, !10, i64 0}
!16 = !{!"TYPE_3__", !10, i64 0, !10, i64 8, !10, i64 16}
!17 = !{!16, !10, i64 8}
!18 = !{!16, !10, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = distinct !{!22, !20}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libpcap/extr_pcap-sita.c_dump_unit_table.c'
source_filename = "AnghaBench/freebsd/contrib/libpcap/extr_pcap-sita.c_dump_unit_table.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { ptr, i32, ptr }
@.str = private unnamed_addr constant [13 x i8] c"%c:%c %s %s\0A\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"fd\00", align 1
@.str.2 = private unnamed_addr constant [11 x i8] c"IP Address\00", align 1
@MAX_CHASSIS = common local_unnamed_addr global i32 0, align 4
@MAX_GEOSLOT = common local_unnamed_addr global i32 0, align 4
@units = common local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [14 x i8] c"%d:%d %2d %s\0A\00", align 1
@.str.4 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.5 = private unnamed_addr constant [20 x i8] c" %12s -> %12s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @dump_unit_table], section "llvm.metadata"
; Function Attrs: nofree nounwind ssp uwtable(sync)
define internal void @dump_unit_table() #0 {
%1 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef 67, i32 noundef 83, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2)
%2 = load i32, ptr @MAX_CHASSIS, align 4, !tbaa !6
%3 = icmp slt i32 %2, 0
br i1 %3, label %60, label %4
4: ; preds = %0
%5 = load i32, ptr @MAX_GEOSLOT, align 4, !tbaa !6
br label %6
6: ; preds = %4, %54
%7 = phi i32 [ %2, %4 ], [ %55, %54 ]
%8 = phi i32 [ %5, %4 ], [ %56, %54 ]
%9 = phi i64 [ 0, %4 ], [ %57, %54 ]
%10 = icmp slt i32 %8, 0
br i1 %10, label %54, label %11
11: ; preds = %6
%12 = trunc nuw nsw i64 %9 to i32
br label %13
13: ; preds = %11, %47
%14 = phi i64 [ 0, %11 ], [ %48, %47 ]
%15 = load ptr, ptr @units, align 8, !tbaa !10
%16 = getelementptr inbounds ptr, ptr %15, i64 %9
%17 = load ptr, ptr %16, align 8, !tbaa !10
%18 = getelementptr inbounds %struct.TYPE_4__, ptr %17, i64 %14
%19 = load ptr, ptr %18, align 8, !tbaa !12
%20 = icmp eq ptr %19, null
br i1 %20, label %29, label %21
21: ; preds = %13
%22 = getelementptr inbounds i8, ptr %18, i64 8
%23 = load i32, ptr %22, align 8, !tbaa !14
%24 = trunc nuw nsw i64 %14 to i32
%25 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %12, i32 noundef %24, i32 noundef %23, ptr noundef nonnull %19)
%26 = load ptr, ptr @units, align 8, !tbaa !10
%27 = getelementptr inbounds ptr, ptr %26, i64 %9
%28 = load ptr, ptr %27, align 8, !tbaa !10
br label %29
29: ; preds = %21, %13
%30 = phi ptr [ %28, %21 ], [ %17, %13 ]
%31 = getelementptr inbounds %struct.TYPE_4__, ptr %30, i64 %14, i32 2
%32 = load ptr, ptr %31, align 8, !tbaa !15
%33 = icmp eq ptr %32, null
br i1 %33, label %47, label %34
34: ; preds = %29, %34
%35 = phi ptr [ %44, %34 ], [ %32, %29 ]
%36 = load ptr, ptr %35, align 8, !tbaa !16
%37 = icmp eq ptr %36, null
%38 = select i1 %37, ptr @.str.4, ptr %36
%39 = getelementptr inbounds i8, ptr %35, i64 8
%40 = load ptr, ptr %39, align 8, !tbaa !18
%41 = icmp eq ptr %40, null
%42 = select i1 %41, ptr @.str.4, ptr %40
%43 = getelementptr inbounds i8, ptr %35, i64 16
%44 = load ptr, ptr %43, align 8, !tbaa !19
%45 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, ptr noundef nonnull %42, ptr noundef nonnull %38)
%46 = icmp eq ptr %44, null
br i1 %46, label %47, label %34, !llvm.loop !20
47: ; preds = %34, %29
%48 = add nuw nsw i64 %14, 1
%49 = load i32, ptr @MAX_GEOSLOT, align 4, !tbaa !6
%50 = sext i32 %49 to i64
%51 = icmp slt i64 %14, %50
br i1 %51, label %13, label %52, !llvm.loop !22
52: ; preds = %47
%53 = load i32, ptr @MAX_CHASSIS, align 4, !tbaa !6
br label %54
54: ; preds = %52, %6
%55 = phi i32 [ %53, %52 ], [ %7, %6 ]
%56 = phi i32 [ %49, %52 ], [ %8, %6 ]
%57 = add nuw nsw i64 %9, 1
%58 = sext i32 %55 to i64
%59 = icmp slt i64 %9, %58
br i1 %59, label %6, label %60, !llvm.loop !23
60: ; preds = %54, %0
ret void
}
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1
attributes #0 = { nofree nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_4__", !11, i64 0, !7, i64 8, !11, i64 16}
!14 = !{!13, !7, i64 8}
!15 = !{!13, !11, i64 16}
!16 = !{!17, !11, i64 0}
!17 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !11, i64 16}
!18 = !{!17, !11, i64 8}
!19 = !{!17, !11, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}
!23 = distinct !{!23, !21}
| freebsd_contrib_libpcap_extr_pcap-sita.c_dump_unit_table |
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_ucast_ftree.c_port_group_compare_load_down.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_ucast_ftree.c_port_group_compare_load_down.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @port_group_compare_load_down], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @port_group_compare_load_down(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca ptr, align 8
store ptr %0, ptr %3, align 8, !tbaa !5
store ptr %1, ptr %4, align 8, !tbaa !5
%5 = load i32, ptr %0, align 4, !tbaa !9
%6 = load i32, ptr %1, align 4, !tbaa !9
%7 = sub nsw i32 %5, %6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %21, label %9
9: ; preds = %2
%10 = icmp slt i32 %7, 0
br i1 %10, label %21, label %11
11: ; preds = %9
%12 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = tail call i32 @find_lowest_loaded_group_on_sw(i32 noundef %13) #2
%15 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = tail call i32 @find_lowest_loaded_group_on_sw(i32 noundef %16) #2
%18 = icmp sgt i32 %14, %17
br i1 %18, label %21, label %19
19: ; preds = %11
%20 = call i32 @compare_port_groups_by_remote_switch_index(ptr noundef nonnull %3, ptr noundef nonnull %4) #2
br label %21
21: ; preds = %9, %2, %11, %19
%22 = phi i32 [ %20, %19 ], [ 1, %11 ], [ 1, %2 ], [ -1, %9 ]
ret i32 %22
}
declare i32 @find_lowest_loaded_group_on_sw(i32 noundef) local_unnamed_addr #1
declare i32 @compare_port_groups_by_remote_switch_index(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_8__", !11, i64 0, !12, i64 4}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_7__", !11, i64 0}
!13 = !{!10, !11, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_ucast_ftree.c_port_group_compare_load_down.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/opensm/opensm/extr_osm_ucast_ftree.c_port_group_compare_load_down.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @port_group_compare_load_down], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @port_group_compare_load_down(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
%4 = alloca ptr, align 8
store ptr %0, ptr %3, align 8, !tbaa !6
store ptr %1, ptr %4, align 8, !tbaa !6
%5 = load i32, ptr %0, align 4, !tbaa !10
%6 = load i32, ptr %1, align 4, !tbaa !10
%7 = sub nsw i32 %5, %6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %21, label %9
9: ; preds = %2
%10 = icmp slt i32 %7, 0
br i1 %10, label %21, label %11
11: ; preds = %9
%12 = getelementptr inbounds i8, ptr %0, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = tail call i32 @find_lowest_loaded_group_on_sw(i32 noundef %13) #2
%15 = getelementptr inbounds i8, ptr %1, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = tail call i32 @find_lowest_loaded_group_on_sw(i32 noundef %16) #2
%18 = icmp sgt i32 %14, %17
br i1 %18, label %21, label %19
19: ; preds = %11
%20 = call i32 @compare_port_groups_by_remote_switch_index(ptr noundef nonnull %3, ptr noundef nonnull %4) #2
br label %21
21: ; preds = %9, %2, %11, %19
%22 = phi i32 [ %20, %19 ], [ 1, %11 ], [ 1, %2 ], [ -1, %9 ]
ret i32 %22
}
declare i32 @find_lowest_loaded_group_on_sw(i32 noundef) local_unnamed_addr #1
declare i32 @compare_port_groups_by_remote_switch_index(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0, !13, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_7__", !12, i64 0}
!14 = !{!11, !12, i64 4}
| freebsd_contrib_ofed_opensm_opensm_extr_osm_ucast_ftree.c_port_group_compare_load_down |
; ModuleID = 'AnghaBench/reactos/dll/win32/msxml3/extr_mxwriter.c_MXWriter_create.c'
source_filename = "AnghaBench/reactos/dll/win32/msxml3/extr_mxwriter.c_MXWriter_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_17__ = type { i32, %struct.TYPE_16__, i32, ptr, ptr, i32, i32, ptr, ptr, ptr, i64, ptr, ptr, ptr, ptr, i32, %struct.TYPE_15__, %struct.TYPE_26__, %struct.TYPE_25__, %struct.TYPE_24__, %struct.TYPE_23__, %struct.TYPE_22__, %struct.TYPE_21__, %struct.TYPE_20__, %struct.TYPE_19__, %struct.TYPE_18__ }
%struct.TYPE_16__ = type { ptr }
%struct.TYPE_15__ = type { ptr }
%struct.TYPE_26__ = type { ptr }
%struct.TYPE_25__ = type { ptr }
%struct.TYPE_24__ = type { ptr }
%struct.TYPE_23__ = type { ptr }
%struct.TYPE_22__ = type { ptr }
%struct.TYPE_21__ = type { ptr }
%struct.TYPE_20__ = type { ptr }
%struct.TYPE_19__ = type { ptr }
%struct.TYPE_18__ = type { ptr }
@MXWriter_create.version10W = internal constant [4 x i8] c"1.0\00", align 1
@.str = private unnamed_addr constant [6 x i8] c"(%p)\0A\00", align 1
@E_OUTOFMEMORY = dso_local local_unnamed_addr global i64 0, align 8
@MXWriterVtbl = dso_local global i32 0, align 4
@SAXContentHandlerVtbl = dso_local global i32 0, align 4
@SAXLexicalHandlerVtbl = dso_local global i32 0, align 4
@SAXDeclHandlerVtbl = dso_local global i32 0, align 4
@SAXDTDHandlerVtbl = dso_local global i32 0, align 4
@SAXErrorHandlerVtbl = dso_local global i32 0, align 4
@VBSAXDeclHandlerVtbl = dso_local global i32 0, align 4
@VBSAXLexicalHandlerVtbl = dso_local global i32 0, align 4
@VBSAXContentHandlerVtbl = dso_local global i32 0, align 4
@VBSAXDTDHandlerVtbl = dso_local global i32 0, align 4
@VBSAXErrorHandlerVtbl = dso_local global i32 0, align 4
@VARIANT_TRUE = dso_local local_unnamed_addr global ptr null, align 8
@MXWriter_BOM = dso_local local_unnamed_addr global i64 0, align 8
@VARIANT_FALSE = dso_local local_unnamed_addr global ptr null, align 8
@MXWriter_DisableEscaping = dso_local local_unnamed_addr global i64 0, align 8
@MXWriter_Indent = dso_local local_unnamed_addr global i64 0, align 8
@MXWriter_OmitXmlDecl = dso_local local_unnamed_addr global i64 0, align 8
@MXWriter_Standalone = dso_local local_unnamed_addr global i64 0, align 8
@FALSE = dso_local local_unnamed_addr global ptr null, align 8
@utf16W = dso_local local_unnamed_addr global ptr null, align 8
@XmlEncoding_UTF16 = dso_local local_unnamed_addr global i32 0, align 4
@S_OK = dso_local local_unnamed_addr global i64 0, align 8
@mxwriter_dispex = dso_local global i32 0, align 4
@.str.1 = private unnamed_addr constant [20 x i8] c"returning iface %p\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i64 @MXWriter_create(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %1) #2
%4 = tail call ptr @heap_alloc(i32 noundef 200) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = load i64, ptr @E_OUTOFMEMORY, align 8, !tbaa !5
br label %71
8: ; preds = %2
%9 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 1
store ptr @MXWriterVtbl, ptr %9, align 8, !tbaa !9
%10 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 25
store ptr @SAXContentHandlerVtbl, ptr %10, align 8, !tbaa !24
%11 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 24
store ptr @SAXLexicalHandlerVtbl, ptr %11, align 8, !tbaa !25
%12 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 23
store ptr @SAXDeclHandlerVtbl, ptr %12, align 8, !tbaa !26
%13 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 22
store ptr @SAXDTDHandlerVtbl, ptr %13, align 8, !tbaa !27
%14 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 21
store ptr @SAXErrorHandlerVtbl, ptr %14, align 8, !tbaa !28
%15 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 20
store ptr @VBSAXDeclHandlerVtbl, ptr %15, align 8, !tbaa !29
%16 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 19
store ptr @VBSAXLexicalHandlerVtbl, ptr %16, align 8, !tbaa !30
%17 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 18
store ptr @VBSAXContentHandlerVtbl, ptr %17, align 8, !tbaa !31
%18 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 17
store ptr @VBSAXDTDHandlerVtbl, ptr %18, align 8, !tbaa !32
%19 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 16
store ptr @VBSAXErrorHandlerVtbl, ptr %19, align 8, !tbaa !33
store i32 1, ptr %4, align 8, !tbaa !34
%20 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 15
store i32 %0, ptr %20, align 8, !tbaa !35
%21 = load ptr, ptr @VARIANT_TRUE, align 8, !tbaa !36
%22 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 14
%23 = load ptr, ptr %22, align 8, !tbaa !37
%24 = load i64, ptr @MXWriter_BOM, align 8, !tbaa !5
%25 = getelementptr inbounds ptr, ptr %23, i64 %24
store ptr %21, ptr %25, align 8, !tbaa !36
%26 = load ptr, ptr @VARIANT_FALSE, align 8, !tbaa !36
%27 = load ptr, ptr %22, align 8, !tbaa !37
%28 = load i64, ptr @MXWriter_DisableEscaping, align 8, !tbaa !5
%29 = getelementptr inbounds ptr, ptr %27, i64 %28
store ptr %26, ptr %29, align 8, !tbaa !36
%30 = load ptr, ptr %22, align 8, !tbaa !37
%31 = load i64, ptr @MXWriter_Indent, align 8, !tbaa !5
%32 = getelementptr inbounds ptr, ptr %30, i64 %31
store ptr %26, ptr %32, align 8, !tbaa !36
%33 = load ptr, ptr @VARIANT_FALSE, align 8, !tbaa !36
%34 = load ptr, ptr %22, align 8, !tbaa !37
%35 = load i64, ptr @MXWriter_OmitXmlDecl, align 8, !tbaa !5
%36 = getelementptr inbounds ptr, ptr %34, i64 %35
store ptr %33, ptr %36, align 8, !tbaa !36
%37 = load ptr, ptr %22, align 8, !tbaa !37
%38 = load i64, ptr @MXWriter_Standalone, align 8, !tbaa !5
%39 = getelementptr inbounds ptr, ptr %37, i64 %38
store ptr %33, ptr %39, align 8, !tbaa !36
%40 = load ptr, ptr @FALSE, align 8, !tbaa !36
%41 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 13
store ptr %40, ptr %41, align 8, !tbaa !38
%42 = load ptr, ptr @utf16W, align 8, !tbaa !36
%43 = tail call ptr @SysAllocString(ptr noundef %42) #2
%44 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 4
store ptr %43, ptr %44, align 8, !tbaa !39
%45 = tail call ptr @SysAllocString(ptr noundef nonnull @MXWriter_create.version10W) #2
%46 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 3
store ptr %45, ptr %46, align 8, !tbaa !40
%47 = load i32, ptr @XmlEncoding_UTF16, align 4, !tbaa !41
%48 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 6
store i32 %47, ptr %48, align 4, !tbaa !42
%49 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 12
store ptr null, ptr %49, align 8, !tbaa !43
%50 = load ptr, ptr @FALSE, align 8, !tbaa !36
%51 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 11
store ptr %50, ptr %51, align 8, !tbaa !44
%52 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 10
store i64 0, ptr %52, align 8, !tbaa !45
%53 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 9
store ptr %50, ptr %53, align 8, !tbaa !46
%54 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 8
store ptr %50, ptr %54, align 8, !tbaa !47
%55 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 7
store ptr null, ptr %55, align 8, !tbaa !48
%56 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 5
%57 = tail call i64 @init_output_buffer(i32 noundef %47, ptr noundef nonnull %56) #2
%58 = load i64, ptr @S_OK, align 8, !tbaa !5
%59 = icmp eq i64 %57, %58
br i1 %59, label %66, label %60
60: ; preds = %8
%61 = load ptr, ptr %44, align 8, !tbaa !39
%62 = tail call i32 @SysFreeString(ptr noundef %61) #2
%63 = load ptr, ptr %46, align 8, !tbaa !40
%64 = tail call i32 @SysFreeString(ptr noundef %63) #2
%65 = tail call i32 @heap_free(ptr noundef nonnull %4) #2
br label %71
66: ; preds = %8
%67 = getelementptr inbounds %struct.TYPE_17__, ptr %4, i64 0, i32 2
%68 = tail call i32 @init_dispex(ptr noundef nonnull %67, ptr noundef nonnull %9, ptr noundef nonnull @mxwriter_dispex) #2
store ptr %9, ptr %1, align 8, !tbaa !36
%69 = tail call i32 @TRACE(ptr noundef nonnull @.str.1, ptr noundef nonnull %9) #2
%70 = load i64, ptr @S_OK, align 8, !tbaa !5
br label %71
71: ; preds = %66, %60, %6
%72 = phi i64 [ %57, %60 ], [ %70, %66 ], [ %7, %6 ]
ret i64 %72
}
declare i32 @TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @heap_alloc(i32 noundef) local_unnamed_addr #1
declare ptr @SysAllocString(ptr noundef) local_unnamed_addr #1
declare i64 @init_output_buffer(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @SysFreeString(ptr noundef) local_unnamed_addr #1
declare i32 @heap_free(ptr noundef) local_unnamed_addr #1
declare i32 @init_dispex(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 8}
!10 = !{!"TYPE_17__", !11, i64 0, !12, i64 8, !11, i64 16, !13, i64 24, !13, i64 32, !11, i64 40, !11, i64 44, !13, i64 48, !13, i64 56, !13, i64 64, !6, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !11, i64 112, !14, i64 120, !15, i64 128, !16, i64 136, !17, i64 144, !18, i64 152, !19, i64 160, !20, i64 168, !21, i64 176, !22, i64 184, !23, i64 192}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_16__", !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"TYPE_15__", !13, i64 0}
!15 = !{!"TYPE_26__", !13, i64 0}
!16 = !{!"TYPE_25__", !13, i64 0}
!17 = !{!"TYPE_24__", !13, i64 0}
!18 = !{!"TYPE_23__", !13, i64 0}
!19 = !{!"TYPE_22__", !13, i64 0}
!20 = !{!"TYPE_21__", !13, i64 0}
!21 = !{!"TYPE_20__", !13, i64 0}
!22 = !{!"TYPE_19__", !13, i64 0}
!23 = !{!"TYPE_18__", !13, i64 0}
!24 = !{!10, !13, i64 192}
!25 = !{!10, !13, i64 184}
!26 = !{!10, !13, i64 176}
!27 = !{!10, !13, i64 168}
!28 = !{!10, !13, i64 160}
!29 = !{!10, !13, i64 152}
!30 = !{!10, !13, i64 144}
!31 = !{!10, !13, i64 136}
!32 = !{!10, !13, i64 128}
!33 = !{!10, !13, i64 120}
!34 = !{!10, !11, i64 0}
!35 = !{!10, !11, i64 112}
!36 = !{!13, !13, i64 0}
!37 = !{!10, !13, i64 104}
!38 = !{!10, !13, i64 96}
!39 = !{!10, !13, i64 32}
!40 = !{!10, !13, i64 24}
!41 = !{!11, !11, i64 0}
!42 = !{!10, !11, i64 44}
!43 = !{!10, !13, i64 88}
!44 = !{!10, !13, i64 80}
!45 = !{!10, !6, i64 72}
!46 = !{!10, !13, i64 64}
!47 = !{!10, !13, i64 56}
!48 = !{!10, !13, i64 48}
| ; ModuleID = 'AnghaBench/reactos/dll/win32/msxml3/extr_mxwriter.c_MXWriter_create.c'
source_filename = "AnghaBench/reactos/dll/win32/msxml3/extr_mxwriter.c_MXWriter_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MXWriter_create.version10W = internal constant [4 x i8] c"1.0\00", align 1
@.str = private unnamed_addr constant [6 x i8] c"(%p)\0A\00", align 1
@E_OUTOFMEMORY = common local_unnamed_addr global i64 0, align 8
@MXWriterVtbl = common global i32 0, align 4
@SAXContentHandlerVtbl = common global i32 0, align 4
@SAXLexicalHandlerVtbl = common global i32 0, align 4
@SAXDeclHandlerVtbl = common global i32 0, align 4
@SAXDTDHandlerVtbl = common global i32 0, align 4
@SAXErrorHandlerVtbl = common global i32 0, align 4
@VBSAXDeclHandlerVtbl = common global i32 0, align 4
@VBSAXLexicalHandlerVtbl = common global i32 0, align 4
@VBSAXContentHandlerVtbl = common global i32 0, align 4
@VBSAXDTDHandlerVtbl = common global i32 0, align 4
@VBSAXErrorHandlerVtbl = common global i32 0, align 4
@VARIANT_TRUE = common local_unnamed_addr global ptr null, align 8
@MXWriter_BOM = common local_unnamed_addr global i64 0, align 8
@VARIANT_FALSE = common local_unnamed_addr global ptr null, align 8
@MXWriter_DisableEscaping = common local_unnamed_addr global i64 0, align 8
@MXWriter_Indent = common local_unnamed_addr global i64 0, align 8
@MXWriter_OmitXmlDecl = common local_unnamed_addr global i64 0, align 8
@MXWriter_Standalone = common local_unnamed_addr global i64 0, align 8
@FALSE = common local_unnamed_addr global ptr null, align 8
@utf16W = common local_unnamed_addr global ptr null, align 8
@XmlEncoding_UTF16 = common local_unnamed_addr global i32 0, align 4
@S_OK = common local_unnamed_addr global i64 0, align 8
@mxwriter_dispex = common global i32 0, align 4
@.str.1 = private unnamed_addr constant [20 x i8] c"returning iface %p\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @MXWriter_create(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %1) #2
%4 = tail call ptr @heap_alloc(i32 noundef 200) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = load i64, ptr @E_OUTOFMEMORY, align 8, !tbaa !6
br label %71
8: ; preds = %2
%9 = getelementptr inbounds i8, ptr %4, i64 8
store ptr @MXWriterVtbl, ptr %9, align 8, !tbaa !10
%10 = getelementptr inbounds i8, ptr %4, i64 192
store ptr @SAXContentHandlerVtbl, ptr %10, align 8, !tbaa !25
%11 = getelementptr inbounds i8, ptr %4, i64 184
store ptr @SAXLexicalHandlerVtbl, ptr %11, align 8, !tbaa !26
%12 = getelementptr inbounds i8, ptr %4, i64 176
store ptr @SAXDeclHandlerVtbl, ptr %12, align 8, !tbaa !27
%13 = getelementptr inbounds i8, ptr %4, i64 168
store ptr @SAXDTDHandlerVtbl, ptr %13, align 8, !tbaa !28
%14 = getelementptr inbounds i8, ptr %4, i64 160
store ptr @SAXErrorHandlerVtbl, ptr %14, align 8, !tbaa !29
%15 = getelementptr inbounds i8, ptr %4, i64 152
store ptr @VBSAXDeclHandlerVtbl, ptr %15, align 8, !tbaa !30
%16 = getelementptr inbounds i8, ptr %4, i64 144
store ptr @VBSAXLexicalHandlerVtbl, ptr %16, align 8, !tbaa !31
%17 = getelementptr inbounds i8, ptr %4, i64 136
store ptr @VBSAXContentHandlerVtbl, ptr %17, align 8, !tbaa !32
%18 = getelementptr inbounds i8, ptr %4, i64 128
store ptr @VBSAXDTDHandlerVtbl, ptr %18, align 8, !tbaa !33
%19 = getelementptr inbounds i8, ptr %4, i64 120
store ptr @VBSAXErrorHandlerVtbl, ptr %19, align 8, !tbaa !34
store i32 1, ptr %4, align 8, !tbaa !35
%20 = getelementptr inbounds i8, ptr %4, i64 112
store i32 %0, ptr %20, align 8, !tbaa !36
%21 = load ptr, ptr @VARIANT_TRUE, align 8, !tbaa !37
%22 = getelementptr inbounds i8, ptr %4, i64 104
%23 = load ptr, ptr %22, align 8, !tbaa !38
%24 = load i64, ptr @MXWriter_BOM, align 8, !tbaa !6
%25 = getelementptr inbounds ptr, ptr %23, i64 %24
store ptr %21, ptr %25, align 8, !tbaa !37
%26 = load ptr, ptr @VARIANT_FALSE, align 8, !tbaa !37
%27 = load ptr, ptr %22, align 8, !tbaa !38
%28 = load i64, ptr @MXWriter_DisableEscaping, align 8, !tbaa !6
%29 = getelementptr inbounds ptr, ptr %27, i64 %28
store ptr %26, ptr %29, align 8, !tbaa !37
%30 = load ptr, ptr %22, align 8, !tbaa !38
%31 = load i64, ptr @MXWriter_Indent, align 8, !tbaa !6
%32 = getelementptr inbounds ptr, ptr %30, i64 %31
store ptr %26, ptr %32, align 8, !tbaa !37
%33 = load ptr, ptr @VARIANT_FALSE, align 8, !tbaa !37
%34 = load ptr, ptr %22, align 8, !tbaa !38
%35 = load i64, ptr @MXWriter_OmitXmlDecl, align 8, !tbaa !6
%36 = getelementptr inbounds ptr, ptr %34, i64 %35
store ptr %33, ptr %36, align 8, !tbaa !37
%37 = load ptr, ptr %22, align 8, !tbaa !38
%38 = load i64, ptr @MXWriter_Standalone, align 8, !tbaa !6
%39 = getelementptr inbounds ptr, ptr %37, i64 %38
store ptr %33, ptr %39, align 8, !tbaa !37
%40 = load ptr, ptr @FALSE, align 8, !tbaa !37
%41 = getelementptr inbounds i8, ptr %4, i64 96
store ptr %40, ptr %41, align 8, !tbaa !39
%42 = load ptr, ptr @utf16W, align 8, !tbaa !37
%43 = tail call ptr @SysAllocString(ptr noundef %42) #2
%44 = getelementptr inbounds i8, ptr %4, i64 32
store ptr %43, ptr %44, align 8, !tbaa !40
%45 = tail call ptr @SysAllocString(ptr noundef nonnull @MXWriter_create.version10W) #2
%46 = getelementptr inbounds i8, ptr %4, i64 24
store ptr %45, ptr %46, align 8, !tbaa !41
%47 = load i32, ptr @XmlEncoding_UTF16, align 4, !tbaa !42
%48 = getelementptr inbounds i8, ptr %4, i64 44
store i32 %47, ptr %48, align 4, !tbaa !43
%49 = getelementptr inbounds i8, ptr %4, i64 88
store ptr null, ptr %49, align 8, !tbaa !44
%50 = load ptr, ptr @FALSE, align 8, !tbaa !37
%51 = getelementptr inbounds i8, ptr %4, i64 80
store ptr %50, ptr %51, align 8, !tbaa !45
%52 = getelementptr inbounds i8, ptr %4, i64 72
store i64 0, ptr %52, align 8, !tbaa !46
%53 = getelementptr inbounds i8, ptr %4, i64 64
store ptr %50, ptr %53, align 8, !tbaa !47
%54 = getelementptr inbounds i8, ptr %4, i64 56
store ptr %50, ptr %54, align 8, !tbaa !48
%55 = getelementptr inbounds i8, ptr %4, i64 48
store ptr null, ptr %55, align 8, !tbaa !49
%56 = getelementptr inbounds i8, ptr %4, i64 40
%57 = tail call i64 @init_output_buffer(i32 noundef %47, ptr noundef nonnull %56) #2
%58 = load i64, ptr @S_OK, align 8, !tbaa !6
%59 = icmp eq i64 %57, %58
br i1 %59, label %66, label %60
60: ; preds = %8
%61 = load ptr, ptr %44, align 8, !tbaa !40
%62 = tail call i32 @SysFreeString(ptr noundef %61) #2
%63 = load ptr, ptr %46, align 8, !tbaa !41
%64 = tail call i32 @SysFreeString(ptr noundef %63) #2
%65 = tail call i32 @heap_free(ptr noundef nonnull %4) #2
br label %71
66: ; preds = %8
%67 = getelementptr inbounds i8, ptr %4, i64 16
%68 = tail call i32 @init_dispex(ptr noundef nonnull %67, ptr noundef nonnull %9, ptr noundef nonnull @mxwriter_dispex) #2
store ptr %9, ptr %1, align 8, !tbaa !37
%69 = tail call i32 @TRACE(ptr noundef nonnull @.str.1, ptr noundef nonnull %9) #2
%70 = load i64, ptr @S_OK, align 8, !tbaa !6
br label %71
71: ; preds = %66, %60, %6
%72 = phi i64 [ %57, %60 ], [ %70, %66 ], [ %7, %6 ]
ret i64 %72
}
declare i32 @TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @heap_alloc(i32 noundef) local_unnamed_addr #1
declare ptr @SysAllocString(ptr noundef) local_unnamed_addr #1
declare i64 @init_output_buffer(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @SysFreeString(ptr noundef) local_unnamed_addr #1
declare i32 @heap_free(ptr noundef) local_unnamed_addr #1
declare i32 @init_dispex(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 8}
!11 = !{!"TYPE_17__", !12, i64 0, !13, i64 8, !12, i64 16, !14, i64 24, !14, i64 32, !12, i64 40, !12, i64 44, !14, i64 48, !14, i64 56, !14, i64 64, !7, i64 72, !14, i64 80, !14, i64 88, !14, i64 96, !14, i64 104, !12, i64 112, !15, i64 120, !16, i64 128, !17, i64 136, !18, i64 144, !19, i64 152, !20, i64 160, !21, i64 168, !22, i64 176, !23, i64 184, !24, i64 192}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_16__", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"TYPE_15__", !14, i64 0}
!16 = !{!"TYPE_26__", !14, i64 0}
!17 = !{!"TYPE_25__", !14, i64 0}
!18 = !{!"TYPE_24__", !14, i64 0}
!19 = !{!"TYPE_23__", !14, i64 0}
!20 = !{!"TYPE_22__", !14, i64 0}
!21 = !{!"TYPE_21__", !14, i64 0}
!22 = !{!"TYPE_20__", !14, i64 0}
!23 = !{!"TYPE_19__", !14, i64 0}
!24 = !{!"TYPE_18__", !14, i64 0}
!25 = !{!11, !14, i64 192}
!26 = !{!11, !14, i64 184}
!27 = !{!11, !14, i64 176}
!28 = !{!11, !14, i64 168}
!29 = !{!11, !14, i64 160}
!30 = !{!11, !14, i64 152}
!31 = !{!11, !14, i64 144}
!32 = !{!11, !14, i64 136}
!33 = !{!11, !14, i64 128}
!34 = !{!11, !14, i64 120}
!35 = !{!11, !12, i64 0}
!36 = !{!11, !12, i64 112}
!37 = !{!14, !14, i64 0}
!38 = !{!11, !14, i64 104}
!39 = !{!11, !14, i64 96}
!40 = !{!11, !14, i64 32}
!41 = !{!11, !14, i64 24}
!42 = !{!12, !12, i64 0}
!43 = !{!11, !12, i64 44}
!44 = !{!11, !14, i64 88}
!45 = !{!11, !14, i64 80}
!46 = !{!11, !7, i64 72}
!47 = !{!11, !14, i64 64}
!48 = !{!11, !14, i64 56}
!49 = !{!11, !14, i64 48}
| reactos_dll_win32_msxml3_extr_mxwriter.c_MXWriter_create |
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/ui/browsers/extr_annotate.c_annotate_browser__set_jumps_percent_color.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/ui/browsers/extr_annotate.c_annotate_browser__set_jumps_percent_color.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @annotate_browser__set_jumps_percent_color], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @annotate_browser__set_jumps_percent_color(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @annotate_browser__jumps_percent_color(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2
%5 = tail call i32 @ui_browser__set_color(ptr noundef %0, i32 noundef %4) #2
ret i32 %5
}
declare i32 @annotate_browser__jumps_percent_color(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ui_browser__set_color(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/ui/browsers/extr_annotate.c_annotate_browser__set_jumps_percent_color.c'
source_filename = "AnghaBench/fastsocket/kernel/tools/perf/ui/browsers/extr_annotate.c_annotate_browser__set_jumps_percent_color.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @annotate_browser__set_jumps_percent_color], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @annotate_browser__set_jumps_percent_color(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @annotate_browser__jumps_percent_color(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2
%5 = tail call i32 @ui_browser__set_color(ptr noundef %0, i32 noundef %4) #2
ret i32 %5
}
declare i32 @annotate_browser__jumps_percent_color(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ui_browser__set_color(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_tools_perf_ui_browsers_extr_annotate.c_annotate_browser__set_jumps_percent_color |
; ModuleID = 'AnghaBench/freebsd/sys/dev/sound/isa/extr_gusc.c_gusc_alloc_resource.c'
source_filename = "AnghaBench/freebsd/sys/dev/sound/isa/extr_gusc.c_gusc_alloc_resource.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i32, ptr, ptr, ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @gusc_alloc_resource], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @gusc_alloc_resource(i32 noundef %0, i32 %1, i32 noundef %2, ptr nocapture noundef readonly %3, i32 %4, i32 %5, i32 %6, i32 %7) #0 {
%9 = tail call ptr @device_get_softc(i32 noundef %0) #2
switch i32 %2, label %40 [
i32 129, label %10
i32 128, label %14
i32 130, label %17
]
10: ; preds = %8
%11 = load ptr, ptr %9, align 8, !tbaa !5
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 5
%13 = load ptr, ptr %12, align 8, !tbaa !11
br label %22
14: ; preds = %8
%15 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 1
%16 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 4
br label %22
17: ; preds = %8
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 2
%19 = load ptr, ptr %18, align 8, !tbaa !12
%20 = getelementptr inbounds %struct.TYPE_3__, ptr %9, i64 0, i32 3
%21 = load ptr, ptr %20, align 8, !tbaa !13
br label %22
22: ; preds = %17, %14, %10
%23 = phi ptr [ %19, %17 ], [ %15, %14 ], [ %11, %10 ]
%24 = phi i32 [ 1, %17 ], [ 0, %14 ], [ 2, %10 ]
%25 = phi i32 [ 1, %17 ], [ 2, %14 ], [ 2, %10 ]
%26 = phi ptr [ %21, %17 ], [ %16, %14 ], [ %13, %10 ]
%27 = load i32, ptr %3, align 4, !tbaa !14
%28 = icmp sgt i32 %27, %24
br i1 %28, label %40, label %29
29: ; preds = %22
%30 = sext i32 %27 to i64
%31 = getelementptr inbounds i32, ptr %23, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !14
%33 = icmp eq i32 %32, %25
br i1 %33, label %40, label %34
34: ; preds = %29
%35 = add nsw i32 %32, 1
store i32 %35, ptr %31, align 4, !tbaa !14
%36 = load i32, ptr %3, align 4, !tbaa !14
%37 = sext i32 %36 to i64
%38 = getelementptr inbounds ptr, ptr %26, i64 %37
%39 = load ptr, ptr %38, align 8, !tbaa !15
br label %40
40: ; preds = %22, %29, %8, %34
%41 = phi ptr [ %39, %34 ], [ null, %8 ], [ null, %29 ], [ null, %22 ]
ret ptr %41
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 40}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 24}
!14 = !{!10, !10, i64 0}
!15 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/sound/isa/extr_gusc.c_gusc_alloc_resource.c'
source_filename = "AnghaBench/freebsd/sys/dev/sound/isa/extr_gusc.c_gusc_alloc_resource.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @gusc_alloc_resource], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @gusc_alloc_resource(i32 noundef %0, i32 %1, i32 noundef %2, ptr nocapture noundef readonly %3, i32 %4, i32 %5, i32 %6, i32 %7) #0 {
%9 = tail call ptr @device_get_softc(i32 noundef %0) #2
switch i32 %2, label %40 [
i32 129, label %10
i32 128, label %14
i32 130, label %17
]
10: ; preds = %8
%11 = load ptr, ptr %9, align 8, !tbaa !6
%12 = getelementptr inbounds i8, ptr %9, i64 40
%13 = load ptr, ptr %12, align 8, !tbaa !12
br label %22
14: ; preds = %8
%15 = getelementptr inbounds i8, ptr %9, i64 8
%16 = getelementptr inbounds i8, ptr %9, i64 32
br label %22
17: ; preds = %8
%18 = getelementptr inbounds i8, ptr %9, i64 16
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = getelementptr inbounds i8, ptr %9, i64 24
%21 = load ptr, ptr %20, align 8, !tbaa !14
br label %22
22: ; preds = %17, %14, %10
%23 = phi ptr [ %19, %17 ], [ %15, %14 ], [ %11, %10 ]
%24 = phi i32 [ 1, %17 ], [ 0, %14 ], [ 2, %10 ]
%25 = phi i32 [ 1, %17 ], [ 2, %14 ], [ 2, %10 ]
%26 = phi ptr [ %21, %17 ], [ %16, %14 ], [ %13, %10 ]
%27 = load i32, ptr %3, align 4, !tbaa !15
%28 = icmp sgt i32 %27, %24
br i1 %28, label %40, label %29
29: ; preds = %22
%30 = sext i32 %27 to i64
%31 = getelementptr inbounds i32, ptr %23, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !15
%33 = icmp eq i32 %32, %25
br i1 %33, label %40, label %34
34: ; preds = %29
%35 = add nsw i32 %32, 1
store i32 %35, ptr %31, align 4, !tbaa !15
%36 = load i32, ptr %3, align 4, !tbaa !15
%37 = sext i32 %36 to i64
%38 = getelementptr inbounds ptr, ptr %26, i64 %37
%39 = load ptr, ptr %38, align 8, !tbaa !16
br label %40
40: ; preds = %22, %29, %8, %34
%41 = phi ptr [ %39, %34 ], [ null, %8 ], [ null, %29 ], [ null, %22 ]
ret ptr %41
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !8, i64 40}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 40}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !8, i64 24}
!15 = !{!11, !11, i64 0}
!16 = !{!8, !8, i64 0}
| freebsd_sys_dev_sound_isa_extr_gusc.c_gusc_alloc_resource |
; ModuleID = 'AnghaBench/linux/drivers/pinctrl/uniphier/extr_pinctrl-uniphier-pxs2.c_uniphier_pxs2_pinctrl_probe.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/uniphier/extr_pinctrl-uniphier-pxs2.c_uniphier_pxs2_pinctrl_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@uniphier_pxs2_pindata = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uniphier_pxs2_pinctrl_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @uniphier_pxs2_pinctrl_probe(ptr noundef %0) #0 {
%2 = tail call i32 @uniphier_pinctrl_probe(ptr noundef %0, ptr noundef nonnull @uniphier_pxs2_pindata) #2
ret i32 %2
}
declare i32 @uniphier_pinctrl_probe(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/pinctrl/uniphier/extr_pinctrl-uniphier-pxs2.c_uniphier_pxs2_pinctrl_probe.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/uniphier/extr_pinctrl-uniphier-pxs2.c_uniphier_pxs2_pinctrl_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@uniphier_pxs2_pindata = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uniphier_pxs2_pinctrl_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @uniphier_pxs2_pinctrl_probe(ptr noundef %0) #0 {
%2 = tail call i32 @uniphier_pinctrl_probe(ptr noundef %0, ptr noundef nonnull @uniphier_pxs2_pindata) #2
ret i32 %2
}
declare i32 @uniphier_pinctrl_probe(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_pinctrl_uniphier_extr_pinctrl-uniphier-pxs2.c_uniphier_pxs2_pinctrl_probe |
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_power_supply.h_power_supply_remove_triggers.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_power_supply.h_power_supply_remove_triggers.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @power_supply_remove_triggers], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @power_supply_remove_triggers(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_power_supply.h_power_supply_remove_triggers.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_power_supply.h_power_supply_remove_triggers.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @power_supply_remove_triggers], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @power_supply_remove_triggers(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_power_supply_extr_power_supply.h_power_supply_remove_triggers |
; ModuleID = 'AnghaBench/esp-idf/components/esp32s2beta/extr_brownout.c_rtc_brownout_isr_handler.c'
source_filename = "AnghaBench/esp-idf/components/esp32s2beta/extr_brownout.c_rtc_brownout_isr_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RTC_CNTL_INT_CLR_REG = dso_local local_unnamed_addr global i32 0, align 4
@RTC_CNTL_BROWN_OUT_INT_CLR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"\0D\0ABrownout detector was triggered\0D\0A\0D\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtc_brownout_isr_handler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rtc_brownout_isr_handler(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @RTC_CNTL_INT_CLR_REG, align 4, !tbaa !5
%3 = load i32, ptr @RTC_CNTL_BROWN_OUT_INT_CLR, align 4, !tbaa !5
%4 = tail call i32 @REG_WRITE(i32 noundef %2, i32 noundef %3) #2
%5 = tail call i32 (...) @xPortGetCoreID() #2
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @esp_cpu_stall(i32 noundef %7) #2
%9 = tail call i32 @ets_printf(ptr noundef nonnull @.str) #2
%10 = tail call i32 (...) @esp_restart_noos() #2
ret void
}
declare i32 @REG_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @esp_cpu_stall(i32 noundef) local_unnamed_addr #1
declare i32 @xPortGetCoreID(...) local_unnamed_addr #1
declare i32 @ets_printf(ptr noundef) local_unnamed_addr #1
declare i32 @esp_restart_noos(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/esp-idf/components/esp32s2beta/extr_brownout.c_rtc_brownout_isr_handler.c'
source_filename = "AnghaBench/esp-idf/components/esp32s2beta/extr_brownout.c_rtc_brownout_isr_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RTC_CNTL_INT_CLR_REG = common local_unnamed_addr global i32 0, align 4
@RTC_CNTL_BROWN_OUT_INT_CLR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"\0D\0ABrownout detector was triggered\0D\0A\0D\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @rtc_brownout_isr_handler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rtc_brownout_isr_handler(ptr nocapture readnone %0) #0 {
%2 = load i32, ptr @RTC_CNTL_INT_CLR_REG, align 4, !tbaa !6
%3 = load i32, ptr @RTC_CNTL_BROWN_OUT_INT_CLR, align 4, !tbaa !6
%4 = tail call i32 @REG_WRITE(i32 noundef %2, i32 noundef %3) #2
%5 = tail call i32 @xPortGetCoreID() #2
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @esp_cpu_stall(i32 noundef %7) #2
%9 = tail call i32 @ets_printf(ptr noundef nonnull @.str) #2
%10 = tail call i32 @esp_restart_noos() #2
ret void
}
declare i32 @REG_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @esp_cpu_stall(i32 noundef) local_unnamed_addr #1
declare i32 @xPortGetCoreID(...) local_unnamed_addr #1
declare i32 @ets_printf(ptr noundef) local_unnamed_addr #1
declare i32 @esp_restart_noos(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| esp-idf_components_esp32s2beta_extr_brownout.c_rtc_brownout_isr_handler |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_nvme-scsi.c_nvme_trans_standard_inquiry_page.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_nvme-scsi.c_nvme_trans_standard_inquiry_page.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nvme_ns = type { i32, ptr }
%struct.nvme_dev = type { ptr, ptr, ptr }
@SNTI_TRANSLATION_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@STANDARD_INQUIRY_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@VERSION_SPC_4 = dso_local local_unnamed_addr global i32 0, align 4
@ADDITIONAL_STD_INQ_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"NVMe \00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @nvme_trans_standard_inquiry_page], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nvme_trans_standard_inquiry_page(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca i32, align 4
%6 = getelementptr inbounds %struct.nvme_ns, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%8 = getelementptr inbounds %struct.nvme_dev, ptr %7, i64 0, i32 2
%9 = load ptr, ptr %8, align 8, !tbaa !11
%10 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13
%11 = call ptr @dma_alloc_coherent(ptr noundef %9, i32 noundef 8, ptr noundef nonnull %5, i32 noundef %10) #3
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %16
13: ; preds = %4
%14 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%15 = sub nsw i32 0, %14
br label %54
16: ; preds = %4
%17 = load i32, ptr %0, align 8, !tbaa !14
%18 = load i32, ptr %5, align 4, !tbaa !13
%19 = call i32 @nvme_identify(ptr noundef nonnull %7, i32 noundef %17, i32 noundef 0, i32 noundef %18) #3
%20 = call i32 @nvme_trans_status_code(ptr noundef %1, i32 noundef %19) #3
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %49
22: ; preds = %16
%23 = icmp eq i32 %19, 0
br i1 %23, label %24, label %49
24: ; preds = %22
%25 = load i64, ptr %11, align 8, !tbaa !15
%26 = icmp ne i64 %25, 0
%27 = zext i1 %26 to i32
%28 = load i32, ptr @STANDARD_INQUIRY_LENGTH, align 4, !tbaa !13
%29 = call i32 @memset(ptr noundef %2, i32 noundef 0, i32 noundef %28) #3
%30 = load i32, ptr @VERSION_SPC_4, align 4, !tbaa !13
%31 = getelementptr inbounds i32, ptr %2, i64 2
store i32 %30, ptr %31, align 4, !tbaa !13
%32 = getelementptr inbounds i32, ptr %2, i64 3
store i32 2, ptr %32, align 4, !tbaa !13
%33 = load i32, ptr @ADDITIONAL_STD_INQ_LENGTH, align 4, !tbaa !13
%34 = getelementptr inbounds i32, ptr %2, i64 4
store i32 %33, ptr %34, align 4, !tbaa !13
%35 = getelementptr inbounds i32, ptr %2, i64 5
store i32 %27, ptr %35, align 4, !tbaa !13
%36 = getelementptr inbounds i32, ptr %2, i64 7
store i32 2, ptr %36, align 4, !tbaa !13
%37 = getelementptr inbounds i32, ptr %2, i64 8
%38 = call i32 @strncpy(ptr noundef nonnull %37, ptr noundef nonnull @.str, i32 noundef 8) #3
%39 = getelementptr inbounds i32, ptr %2, i64 16
%40 = load ptr, ptr %7, align 8, !tbaa !18
%41 = call i32 @strncpy(ptr noundef nonnull %39, ptr noundef %40, i32 noundef 16) #3
%42 = getelementptr inbounds i32, ptr %2, i64 32
%43 = getelementptr inbounds %struct.nvme_dev, ptr %7, i64 0, i32 1
%44 = load ptr, ptr %43, align 8, !tbaa !19
%45 = call i32 @strncpy(ptr noundef nonnull %42, ptr noundef %44, i32 noundef 4) #3
%46 = load i32, ptr @STANDARD_INQUIRY_LENGTH, align 4, !tbaa !13
%47 = call i32 @min(i32 noundef %3, i32 noundef %46) #3
%48 = call i32 @nvme_trans_copy_to_user(ptr noundef %1, ptr noundef %2, i32 noundef %47) #3
br label %49
49: ; preds = %22, %16, %24
%50 = phi i32 [ %20, %16 ], [ %48, %24 ], [ %19, %22 ]
%51 = load ptr, ptr %8, align 8, !tbaa !11
%52 = load i32, ptr %5, align 4, !tbaa !13
%53 = call i32 @dma_free_coherent(ptr noundef %51, i32 noundef 8, ptr noundef nonnull %11, i32 noundef %52) #3
br label %54
54: ; preds = %49, %13
%55 = phi i32 [ %15, %13 ], [ %50, %49 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %55
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_identify(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_trans_status_code(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_trans_copy_to_user(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dma_free_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"nvme_ns", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"nvme_dev", !10, i64 0, !10, i64 8, !10, i64 16}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"nvme_id_ns", !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!12, !10, i64 0}
!19 = !{!12, !10, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_nvme-scsi.c_nvme_trans_standard_inquiry_page.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_nvme-scsi.c_nvme_trans_standard_inquiry_page.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNTI_TRANSLATION_SUCCESS = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@STANDARD_INQUIRY_LENGTH = common local_unnamed_addr global i32 0, align 4
@VERSION_SPC_4 = common local_unnamed_addr global i32 0, align 4
@ADDITIONAL_STD_INQ_LENGTH = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"NVMe \00", align 1
@llvm.used = appending global [1 x ptr] [ptr @nvme_trans_standard_inquiry_page], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nvme_trans_standard_inquiry_page(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca i32, align 4
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%8 = getelementptr inbounds i8, ptr %7, i64 16
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !14
%11 = call ptr @dma_alloc_coherent(ptr noundef %9, i32 noundef 8, ptr noundef nonnull %5, i32 noundef %10) #3
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %16
13: ; preds = %4
%14 = load i32, ptr @ENOMEM, align 4, !tbaa !14
%15 = sub nsw i32 0, %14
br label %54
16: ; preds = %4
%17 = load i32, ptr %0, align 8, !tbaa !15
%18 = load i32, ptr %5, align 4, !tbaa !14
%19 = call i32 @nvme_identify(ptr noundef nonnull %7, i32 noundef %17, i32 noundef 0, i32 noundef %18) #3
%20 = call i32 @nvme_trans_status_code(ptr noundef %1, i32 noundef %19) #3
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %49
22: ; preds = %16
%23 = icmp eq i32 %19, 0
br i1 %23, label %24, label %49
24: ; preds = %22
%25 = load i64, ptr %11, align 8, !tbaa !16
%26 = icmp ne i64 %25, 0
%27 = zext i1 %26 to i32
%28 = load i32, ptr @STANDARD_INQUIRY_LENGTH, align 4, !tbaa !14
%29 = call i32 @memset(ptr noundef %2, i32 noundef 0, i32 noundef %28) #3
%30 = load i32, ptr @VERSION_SPC_4, align 4, !tbaa !14
%31 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %30, ptr %31, align 4, !tbaa !14
%32 = getelementptr inbounds i8, ptr %2, i64 12
store i32 2, ptr %32, align 4, !tbaa !14
%33 = load i32, ptr @ADDITIONAL_STD_INQ_LENGTH, align 4, !tbaa !14
%34 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %33, ptr %34, align 4, !tbaa !14
%35 = getelementptr inbounds i8, ptr %2, i64 20
store i32 %27, ptr %35, align 4, !tbaa !14
%36 = getelementptr inbounds i8, ptr %2, i64 28
store i32 2, ptr %36, align 4, !tbaa !14
%37 = getelementptr inbounds i8, ptr %2, i64 32
%38 = call i32 @strncpy(ptr noundef nonnull %37, ptr noundef nonnull @.str, i32 noundef 8) #3
%39 = getelementptr inbounds i8, ptr %2, i64 64
%40 = load ptr, ptr %7, align 8, !tbaa !19
%41 = call i32 @strncpy(ptr noundef nonnull %39, ptr noundef %40, i32 noundef 16) #3
%42 = getelementptr inbounds i8, ptr %2, i64 128
%43 = getelementptr inbounds i8, ptr %7, i64 8
%44 = load ptr, ptr %43, align 8, !tbaa !20
%45 = call i32 @strncpy(ptr noundef nonnull %42, ptr noundef %44, i32 noundef 4) #3
%46 = load i32, ptr @STANDARD_INQUIRY_LENGTH, align 4, !tbaa !14
%47 = call i32 @min(i32 noundef %3, i32 noundef %46) #3
%48 = call i32 @nvme_trans_copy_to_user(ptr noundef %1, ptr noundef %2, i32 noundef %47) #3
br label %49
49: ; preds = %22, %16, %24
%50 = phi i32 [ %20, %16 ], [ %48, %24 ], [ %19, %22 ]
%51 = load ptr, ptr %8, align 8, !tbaa !12
%52 = load i32, ptr %5, align 4, !tbaa !14
%53 = call i32 @dma_free_coherent(ptr noundef %51, i32 noundef 8, ptr noundef nonnull %11, i32 noundef %52) #3
br label %54
54: ; preds = %49, %13
%55 = phi i32 [ %15, %13 ], [ %50, %49 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %55
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_identify(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_trans_status_code(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_trans_copy_to_user(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dma_free_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"nvme_ns", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 16}
!13 = !{!"nvme_dev", !11, i64 0, !11, i64 8, !11, i64 16}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !18, i64 0}
!17 = !{!"nvme_id_ns", !18, i64 0}
!18 = !{!"long", !9, i64 0}
!19 = !{!13, !11, i64 0}
!20 = !{!13, !11, i64 8}
| fastsocket_kernel_drivers_block_extr_nvme-scsi.c_nvme_trans_standard_inquiry_page |
; ModuleID = 'AnghaBench/linux/drivers/isdn/hardware/mISDN/extr_mISDNisar.c_setup_pump.c'
source_filename = "AnghaBench/linux/drivers/isdn/hardware/mISDN/extr_mISDNisar.c_setup_pump.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.isar_ch = type { i32, %struct.TYPE_2__, i32, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i32 }
@ISAR_HIS_PUMPCFG = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_BYPASS = dso_local local_unnamed_addr global i32 0, align 4
@FLG_DTMFSEND = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_DTMF_TRANS = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_DTMF = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_DATAMODEM = dso_local local_unnamed_addr global i32 0, align 4
@FLG_ORIGIN = dso_local local_unnamed_addr global i32 0, align 4
@PCTRL_ORIG = dso_local local_unnamed_addr global i32 0, align 4
@PV32P6_CTN = dso_local local_unnamed_addr global i32 0, align 4
@PV32P6_ATN = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V23R = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V22A = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V22B = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V22C = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_V21 = dso_local local_unnamed_addr global i32 0, align 4
@PV32P2_BEL = dso_local local_unnamed_addr global i32 0, align 4
@PV32P3_AMOD = dso_local local_unnamed_addr global i32 0, align 4
@PV32P3_V32B = dso_local local_unnamed_addr global i32 0, align 4
@PV32P3_V23B = dso_local local_unnamed_addr global i32 0, align 4
@PV32P4_UT144 = dso_local local_unnamed_addr global i32 0, align 4
@PV32P5_UT144 = dso_local local_unnamed_addr global i32 0, align 4
@PMOD_FAX = dso_local local_unnamed_addr global i32 0, align 4
@PFAXP2_CTN = dso_local local_unnamed_addr global i32 0, align 4
@PFAXP2_ATN = dso_local local_unnamed_addr global i32 0, align 4
@STFAX_NULL = dso_local local_unnamed_addr global i32 0, align 4
@FLG_FTI_RUN = dso_local local_unnamed_addr global i32 0, align 4
@ISAR_HIS_PSTREQ = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @setup_pump], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @setup_pump(ptr noundef %0) #0 {
%2 = alloca [6 x i32], align 16
%3 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 5
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @SET_DPS(i32 noundef %4) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%6 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !11
switch i32 %7, label %89 [
i32 128, label %8
i32 130, label %8
i32 133, label %8
i32 132, label %14
i32 131, label %27
i32 129, label %66
]
8: ; preds = %1, %1, %1
%9 = load i32, ptr %0, align 4, !tbaa !12
%10 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !13
%11 = or i32 %10, %5
%12 = load i32, ptr @PMOD_BYPASS, align 4, !tbaa !13
%13 = tail call i32 @send_mbox(i32 noundef %9, i32 noundef %11, i32 noundef %12, i32 noundef 0, ptr noundef null) #3
br label %89
14: ; preds = %1
%15 = load i32, ptr @FLG_DTMFSEND, align 4, !tbaa !13
%16 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 1, i32 1
%17 = tail call i32 @test_bit(i32 noundef %15, ptr noundef nonnull %16) #3
%18 = icmp eq i32 %17, 0
%19 = select i1 %18, i32 40, i32 5
store i32 %19, ptr %2, align 16, !tbaa !13
%20 = load i32, ptr %0, align 4, !tbaa !12
%21 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !13
%22 = or i32 %21, %5
%23 = load i32, ptr @PMOD_DTMF, align 4
%24 = load i32, ptr @PMOD_DTMF_TRANS, align 4
%25 = select i1 %18, i32 %23, i32 %24
%26 = call i32 @send_mbox(i32 noundef %20, i32 noundef %22, i32 noundef %25, i32 noundef 1, ptr noundef nonnull %2) #3
br label %27
27: ; preds = %14, %1
%28 = load i32, ptr @PMOD_DATAMODEM, align 4, !tbaa !13
%29 = load i32, ptr @FLG_ORIGIN, align 4, !tbaa !13
%30 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 1, i32 1
%31 = call i32 @test_bit(i32 noundef %29, ptr noundef nonnull %30) #3
%32 = icmp eq i32 %31, 0
%33 = load i32, ptr @PCTRL_ORIG, align 4
%34 = select i1 %32, i32 0, i32 %33
%35 = or i32 %28, %34
%36 = load i32, ptr @PV32P6_ATN, align 4
%37 = load i32, ptr @PV32P6_CTN, align 4
%38 = select i1 %32, i32 %36, i32 %37
%39 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 5
store i32 %38, ptr %39, align 4
store i32 6, ptr %2, align 16, !tbaa !13
%40 = load i32, ptr @PV32P2_V23R, align 4, !tbaa !13
%41 = load i32, ptr @PV32P2_V22A, align 4, !tbaa !13
%42 = or i32 %41, %40
%43 = load i32, ptr @PV32P2_V22B, align 4, !tbaa !13
%44 = or i32 %42, %43
%45 = load i32, ptr @PV32P2_V22C, align 4, !tbaa !13
%46 = or i32 %44, %45
%47 = load i32, ptr @PV32P2_V21, align 4, !tbaa !13
%48 = or i32 %46, %47
%49 = load i32, ptr @PV32P2_BEL, align 4, !tbaa !13
%50 = or i32 %48, %49
%51 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 1
store i32 %50, ptr %51, align 4, !tbaa !13
%52 = load i32, ptr @PV32P3_AMOD, align 4, !tbaa !13
%53 = load i32, ptr @PV32P3_V32B, align 4, !tbaa !13
%54 = or i32 %53, %52
%55 = load i32, ptr @PV32P3_V23B, align 4, !tbaa !13
%56 = or i32 %54, %55
%57 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 2
store i32 %56, ptr %57, align 8, !tbaa !13
%58 = load i32, ptr @PV32P4_UT144, align 4, !tbaa !13
%59 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 3
store i32 %58, ptr %59, align 4, !tbaa !13
%60 = load i32, ptr @PV32P5_UT144, align 4, !tbaa !13
%61 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 4
store i32 %60, ptr %61, align 16, !tbaa !13
%62 = load i32, ptr %0, align 4, !tbaa !12
%63 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !13
%64 = or i32 %63, %5
%65 = call i32 @send_mbox(i32 noundef %62, i32 noundef %64, i32 noundef %35, i32 noundef 6, ptr noundef nonnull %2) #3
br label %89
66: ; preds = %1
%67 = load i32, ptr @PMOD_FAX, align 4, !tbaa !13
%68 = load i32, ptr @FLG_ORIGIN, align 4, !tbaa !13
%69 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 1, i32 1
%70 = tail call i32 @test_bit(i32 noundef %68, ptr noundef nonnull %69) #3
%71 = icmp eq i32 %70, 0
%72 = load i32, ptr @PCTRL_ORIG, align 4
%73 = select i1 %71, i32 0, i32 %72
%74 = or i32 %67, %73
%75 = load i32, ptr @PFAXP2_ATN, align 4
%76 = load i32, ptr @PFAXP2_CTN, align 4
%77 = select i1 %71, i32 %75, i32 %76
%78 = getelementptr inbounds [6 x i32], ptr %2, i64 0, i64 1
store i32 %77, ptr %78, align 4
store i32 6, ptr %2, align 16, !tbaa !13
%79 = load i32, ptr %0, align 4, !tbaa !12
%80 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !13
%81 = or i32 %80, %5
%82 = call i32 @send_mbox(i32 noundef %79, i32 noundef %81, i32 noundef %74, i32 noundef 2, ptr noundef nonnull %2) #3
%83 = load i32, ptr @STFAX_NULL, align 4, !tbaa !13
%84 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 4
store i32 %83, ptr %84, align 4, !tbaa !14
%85 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 3
store i32 0, ptr %85, align 4, !tbaa !15
%86 = getelementptr inbounds %struct.isar_ch, ptr %0, i64 0, i32 2
store i32 0, ptr %86, align 4, !tbaa !16
%87 = load i32, ptr @FLG_FTI_RUN, align 4, !tbaa !13
%88 = call i32 @test_and_set_bit(i32 noundef %87, ptr noundef nonnull %69) #3
br label %89
89: ; preds = %1, %66, %27, %8
%90 = call i32 @udelay(i32 noundef 1000) #3
%91 = load i32, ptr %0, align 4, !tbaa !12
%92 = load i32, ptr @ISAR_HIS_PSTREQ, align 4, !tbaa !13
%93 = or i32 %92, %5
%94 = call i32 @send_mbox(i32 noundef %91, i32 noundef %93, i32 noundef 0, i32 noundef 0, ptr noundef null) #3
%95 = call i32 @udelay(i32 noundef 1000) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SET_DPS(i32 noundef) local_unnamed_addr #2
declare i32 @send_mbox(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_and_set_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @udelay(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"isar_ch", !7, i64 0, !10, i64 4, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0, !7, i64 4}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 20}
!15 = !{!6, !7, i64 16}
!16 = !{!6, !7, i64 12}
| ; ModuleID = 'AnghaBench/linux/drivers/isdn/hardware/mISDN/extr_mISDNisar.c_setup_pump.c'
source_filename = "AnghaBench/linux/drivers/isdn/hardware/mISDN/extr_mISDNisar.c_setup_pump.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ISAR_HIS_PUMPCFG = common local_unnamed_addr global i32 0, align 4
@PMOD_BYPASS = common local_unnamed_addr global i32 0, align 4
@FLG_DTMFSEND = common local_unnamed_addr global i32 0, align 4
@PMOD_DTMF_TRANS = common local_unnamed_addr global i32 0, align 4
@PMOD_DTMF = common local_unnamed_addr global i32 0, align 4
@PMOD_DATAMODEM = common local_unnamed_addr global i32 0, align 4
@FLG_ORIGIN = common local_unnamed_addr global i32 0, align 4
@PCTRL_ORIG = common local_unnamed_addr global i32 0, align 4
@PV32P6_CTN = common local_unnamed_addr global i32 0, align 4
@PV32P6_ATN = common local_unnamed_addr global i32 0, align 4
@PV32P2_V23R = common local_unnamed_addr global i32 0, align 4
@PV32P2_V22A = common local_unnamed_addr global i32 0, align 4
@PV32P2_V22B = common local_unnamed_addr global i32 0, align 4
@PV32P2_V22C = common local_unnamed_addr global i32 0, align 4
@PV32P2_V21 = common local_unnamed_addr global i32 0, align 4
@PV32P2_BEL = common local_unnamed_addr global i32 0, align 4
@PV32P3_AMOD = common local_unnamed_addr global i32 0, align 4
@PV32P3_V32B = common local_unnamed_addr global i32 0, align 4
@PV32P3_V23B = common local_unnamed_addr global i32 0, align 4
@PV32P4_UT144 = common local_unnamed_addr global i32 0, align 4
@PV32P5_UT144 = common local_unnamed_addr global i32 0, align 4
@PMOD_FAX = common local_unnamed_addr global i32 0, align 4
@PFAXP2_CTN = common local_unnamed_addr global i32 0, align 4
@PFAXP2_ATN = common local_unnamed_addr global i32 0, align 4
@STFAX_NULL = common local_unnamed_addr global i32 0, align 4
@FLG_FTI_RUN = common local_unnamed_addr global i32 0, align 4
@ISAR_HIS_PSTREQ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @setup_pump], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @setup_pump(ptr noundef %0) #0 {
%2 = alloca [6 x i32], align 4
%3 = getelementptr inbounds i8, ptr %0, i64 24
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @SET_DPS(i32 noundef %4) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !12
switch i32 %7, label %88 [
i32 128, label %8
i32 130, label %8
i32 133, label %8
i32 132, label %14
i32 131, label %27
i32 129, label %66
]
8: ; preds = %1, %1, %1
%9 = load i32, ptr %0, align 4, !tbaa !13
%10 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !14
%11 = or i32 %10, %5
%12 = load i32, ptr @PMOD_BYPASS, align 4, !tbaa !14
%13 = tail call i32 @send_mbox(i32 noundef %9, i32 noundef %11, i32 noundef %12, i32 noundef 0, ptr noundef null) #3
br label %88
14: ; preds = %1
%15 = load i32, ptr @FLG_DTMFSEND, align 4, !tbaa !14
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = tail call i32 @test_bit(i32 noundef %15, ptr noundef nonnull %16) #3
%18 = icmp eq i32 %17, 0
%19 = select i1 %18, i32 40, i32 5
store i32 %19, ptr %2, align 4, !tbaa !14
%20 = load i32, ptr %0, align 4, !tbaa !13
%21 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !14
%22 = or i32 %21, %5
%23 = load i32, ptr @PMOD_DTMF, align 4
%24 = load i32, ptr @PMOD_DTMF_TRANS, align 4
%25 = select i1 %18, i32 %23, i32 %24
%26 = call i32 @send_mbox(i32 noundef %20, i32 noundef %22, i32 noundef %25, i32 noundef 1, ptr noundef nonnull %2) #3
br label %27
27: ; preds = %14, %1
%28 = load i32, ptr @PMOD_DATAMODEM, align 4, !tbaa !14
%29 = load i32, ptr @FLG_ORIGIN, align 4, !tbaa !14
%30 = getelementptr inbounds i8, ptr %0, i64 8
%31 = call i32 @test_bit(i32 noundef %29, ptr noundef nonnull %30) #3
%32 = icmp eq i32 %31, 0
%33 = load i32, ptr @PCTRL_ORIG, align 4
%34 = select i1 %32, i32 0, i32 %33
%35 = or i32 %28, %34
%36 = load i32, ptr @PV32P6_ATN, align 4
%37 = load i32, ptr @PV32P6_CTN, align 4
%38 = select i1 %32, i32 %36, i32 %37
%39 = getelementptr inbounds i8, ptr %2, i64 20
store i32 %38, ptr %39, align 4
store i32 6, ptr %2, align 4, !tbaa !14
%40 = load i32, ptr @PV32P2_V23R, align 4, !tbaa !14
%41 = load i32, ptr @PV32P2_V22A, align 4, !tbaa !14
%42 = or i32 %41, %40
%43 = load i32, ptr @PV32P2_V22B, align 4, !tbaa !14
%44 = or i32 %42, %43
%45 = load i32, ptr @PV32P2_V22C, align 4, !tbaa !14
%46 = or i32 %44, %45
%47 = load i32, ptr @PV32P2_V21, align 4, !tbaa !14
%48 = or i32 %46, %47
%49 = load i32, ptr @PV32P2_BEL, align 4, !tbaa !14
%50 = or i32 %48, %49
%51 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %50, ptr %51, align 4, !tbaa !14
%52 = load i32, ptr @PV32P3_AMOD, align 4, !tbaa !14
%53 = load i32, ptr @PV32P3_V32B, align 4, !tbaa !14
%54 = or i32 %53, %52
%55 = load i32, ptr @PV32P3_V23B, align 4, !tbaa !14
%56 = or i32 %54, %55
%57 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %56, ptr %57, align 4, !tbaa !14
%58 = load i32, ptr @PV32P4_UT144, align 4, !tbaa !14
%59 = getelementptr inbounds i8, ptr %2, i64 12
store i32 %58, ptr %59, align 4, !tbaa !14
%60 = load i32, ptr @PV32P5_UT144, align 4, !tbaa !14
%61 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %60, ptr %61, align 4, !tbaa !14
%62 = load i32, ptr %0, align 4, !tbaa !13
%63 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !14
%64 = or i32 %63, %5
%65 = call i32 @send_mbox(i32 noundef %62, i32 noundef %64, i32 noundef %35, i32 noundef 6, ptr noundef nonnull %2) #3
br label %88
66: ; preds = %1
%67 = load i32, ptr @PMOD_FAX, align 4, !tbaa !14
%68 = load i32, ptr @FLG_ORIGIN, align 4, !tbaa !14
%69 = getelementptr inbounds i8, ptr %0, i64 8
%70 = tail call i32 @test_bit(i32 noundef %68, ptr noundef nonnull %69) #3
%71 = icmp eq i32 %70, 0
%72 = load i32, ptr @PCTRL_ORIG, align 4
%73 = select i1 %71, i32 0, i32 %72
%74 = or i32 %67, %73
%75 = load i32, ptr @PFAXP2_ATN, align 4
%76 = load i32, ptr @PFAXP2_CTN, align 4
%77 = select i1 %71, i32 %75, i32 %76
%78 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %77, ptr %78, align 4
store i32 6, ptr %2, align 4, !tbaa !14
%79 = load i32, ptr %0, align 4, !tbaa !13
%80 = load i32, ptr @ISAR_HIS_PUMPCFG, align 4, !tbaa !14
%81 = or i32 %80, %5
%82 = call i32 @send_mbox(i32 noundef %79, i32 noundef %81, i32 noundef %74, i32 noundef 2, ptr noundef nonnull %2) #3
%83 = load i32, ptr @STFAX_NULL, align 4, !tbaa !14
%84 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %83, ptr %84, align 4, !tbaa !15
%85 = getelementptr inbounds i8, ptr %0, i64 12
store <2 x i32> zeroinitializer, ptr %85, align 4, !tbaa !14
%86 = load i32, ptr @FLG_FTI_RUN, align 4, !tbaa !14
%87 = call i32 @test_and_set_bit(i32 noundef %86, ptr noundef nonnull %69) #3
br label %88
88: ; preds = %1, %66, %27, %8
%89 = call i32 @udelay(i32 noundef 1000) #3
%90 = load i32, ptr %0, align 4, !tbaa !13
%91 = load i32, ptr @ISAR_HIS_PSTREQ, align 4, !tbaa !14
%92 = or i32 %91, %5
%93 = call i32 @send_mbox(i32 noundef %90, i32 noundef %92, i32 noundef 0, i32 noundef 0, ptr noundef null) #3
%94 = call i32 @udelay(i32 noundef 1000) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SET_DPS(i32 noundef) local_unnamed_addr #2
declare i32 @send_mbox(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_and_set_bit(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @udelay(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 24}
!7 = !{!"isar_ch", !8, i64 0, !11, i64 4, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 20}
| linux_drivers_isdn_hardware_mISDN_extr_mISDNisar.c_setup_pump |
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_denali.c_denali_disable_irq.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_denali.c_denali_disable_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.denali_controller = type { i32, i64 }
@GLOBAL_INT_ENABLE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @denali_disable_irq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @denali_disable_irq(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %15
4: ; preds = %1
%5 = getelementptr inbounds %struct.denali_controller, ptr %0, i64 0, i32 1
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ 0, %4 ], [ %12, %6 ]
%8 = load i64, ptr %5, align 8, !tbaa !11
%9 = tail call i64 @INTR_EN(i32 noundef %7) #2
%10 = add nsw i64 %9, %8
%11 = tail call i32 @iowrite32(i32 noundef 0, i64 noundef %10) #2
%12 = add nuw nsw i32 %7, 1
%13 = load i32, ptr %0, align 8, !tbaa !5
%14 = icmp slt i32 %12, %13
br i1 %14, label %6, label %15, !llvm.loop !12
15: ; preds = %6, %1
%16 = getelementptr inbounds %struct.denali_controller, ptr %0, i64 0, i32 1
%17 = load i64, ptr %16, align 8, !tbaa !11
%18 = load i64, ptr @GLOBAL_INT_ENABLE, align 8, !tbaa !14
%19 = add nsw i64 %18, %17
%20 = tail call i32 @iowrite32(i32 noundef 0, i64 noundef %19) #2
ret void
}
declare i32 @iowrite32(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @INTR_EN(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"denali_controller", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_denali.c_denali_disable_irq.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_denali.c_denali_disable_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GLOBAL_INT_ENABLE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @denali_disable_irq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @denali_disable_irq(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %15
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ 0, %4 ], [ %12, %6 ]
%8 = load i64, ptr %5, align 8, !tbaa !12
%9 = tail call i64 @INTR_EN(i32 noundef %7) #2
%10 = add nsw i64 %9, %8
%11 = tail call i32 @iowrite32(i32 noundef 0, i64 noundef %10) #2
%12 = add nuw nsw i32 %7, 1
%13 = load i32, ptr %0, align 8, !tbaa !6
%14 = icmp slt i32 %12, %13
br i1 %14, label %6, label %15, !llvm.loop !13
15: ; preds = %6, %1
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = load i64, ptr %16, align 8, !tbaa !12
%18 = load i64, ptr @GLOBAL_INT_ENABLE, align 8, !tbaa !15
%19 = add nsw i64 %18, %17
%20 = tail call i32 @iowrite32(i32 noundef 0, i64 noundef %19) #2
ret void
}
declare i32 @iowrite32(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @INTR_EN(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"denali_controller", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!11, !11, i64 0}
| linux_drivers_mtd_nand_raw_extr_denali.c_denali_disable_irq |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/platform/common/extr_menu_pico.c_load_progress_cb.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/platform/common/extr_menu_pico.c_load_progress_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_menuscreen_w = dso_local local_unnamed_addr global i32 0, align 4
@g_menuscreen_ptr = dso_local local_unnamed_addr global i64 0, align 8
@me_sfont_h = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @load_progress_cb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @load_progress_cb(i32 noundef %0) #0 {
%2 = load i32, ptr @g_menuscreen_w, align 4, !tbaa !5
%3 = tail call i32 @menu_draw_begin(i32 noundef 0, i32 noundef 1) #3
%4 = load i32, ptr @me_sfont_h, align 4, !tbaa !5
%5 = icmp sgt i32 %4, 2
br i1 %5, label %6, label %28
6: ; preds = %1
%7 = add nsw i32 %4, -2
%8 = load i64, ptr @g_menuscreen_ptr, align 8, !tbaa !9
%9 = inttoptr i64 %8 to ptr
%10 = load i32, ptr @g_menuscreen_w, align 4, !tbaa !5
%11 = shl i32 %10, 1
%12 = mul i32 %11, %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i16, ptr %9, i64 %13
%15 = mul nsw i32 %2, %0
%16 = sdiv i32 %15, 100
%17 = tail call i32 @llvm.smin.i32(i32 %16, i32 %2)
%18 = shl nsw i32 %17, 1
br label %19
19: ; preds = %6, %19
%20 = phi ptr [ %14, %6 ], [ %26, %19 ]
%21 = phi i32 [ %7, %6 ], [ %23, %19 ]
%22 = tail call i32 @memset(ptr noundef %20, i32 noundef 255, i32 noundef %18) #3
%23 = add nsw i32 %21, -1
%24 = load i32, ptr @g_menuscreen_w, align 4, !tbaa !5
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i16, ptr %20, i64 %25
%27 = icmp ugt i32 %21, 1
br i1 %27, label %19, label %28, !llvm.loop !11
28: ; preds = %19, %1
%29 = tail call i32 (...) @menu_draw_end() #3
ret void
}
declare i32 @menu_draw_begin(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @menu_draw_end(...) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/platform/common/extr_menu_pico.c_load_progress_cb.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/platform/common/extr_menu_pico.c_load_progress_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@g_menuscreen_w = common local_unnamed_addr global i32 0, align 4
@g_menuscreen_ptr = common local_unnamed_addr global i64 0, align 8
@me_sfont_h = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @load_progress_cb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @load_progress_cb(i32 noundef %0) #0 {
%2 = load i32, ptr @g_menuscreen_w, align 4, !tbaa !6
%3 = tail call i32 @menu_draw_begin(i32 noundef 0, i32 noundef 1) #3
%4 = load i32, ptr @me_sfont_h, align 4, !tbaa !6
%5 = icmp sgt i32 %4, 2
br i1 %5, label %6, label %28
6: ; preds = %1
%7 = add nsw i32 %4, -2
%8 = load i64, ptr @g_menuscreen_ptr, align 8, !tbaa !10
%9 = inttoptr i64 %8 to ptr
%10 = load i32, ptr @g_menuscreen_w, align 4, !tbaa !6
%11 = shl i32 %10, 1
%12 = mul i32 %11, %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i16, ptr %9, i64 %13
%15 = mul nsw i32 %2, %0
%16 = sdiv i32 %15, 100
%17 = tail call i32 @llvm.smin.i32(i32 %16, i32 %2)
%18 = shl nsw i32 %17, 1
br label %19
19: ; preds = %6, %19
%20 = phi ptr [ %14, %6 ], [ %26, %19 ]
%21 = phi i32 [ %7, %6 ], [ %23, %19 ]
%22 = tail call i32 @memset(ptr noundef %20, i32 noundef 255, i32 noundef %18) #3
%23 = add nsw i32 %21, -1
%24 = load i32, ptr @g_menuscreen_w, align 4, !tbaa !6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i16, ptr %20, i64 %25
%27 = icmp ugt i32 %21, 1
br i1 %27, label %19, label %28, !llvm.loop !12
28: ; preds = %19, %1
%29 = tail call i32 @menu_draw_end() #3
ret void
}
declare i32 @menu_draw_begin(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @menu_draw_end(...) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| Provenance_Cores_PicoDrive_platform_common_extr_menu_pico.c_load_progress_cb |
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-ui.c_on_warning.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-ui.c_on_warning.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"GLUT warning: \00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @on_warning], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @on_warning(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @stderr, align 4, !tbaa !5
%4 = tail call i32 @fprintf(i32 noundef %3, ptr noundef nonnull @.str) #2
%5 = load i32, ptr @stderr, align 4, !tbaa !5
%6 = tail call i32 @vfprintf(i32 noundef %5, ptr noundef %0, i32 noundef %1) #2
%7 = load i32, ptr @stderr, align 4, !tbaa !5
%8 = tail call i32 @fprintf(i32 noundef %7, ptr noundef nonnull @.str.1) #2
ret void
}
declare i32 @fprintf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vfprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-ui.c_on_warning.c'
source_filename = "AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-ui.c_on_warning.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"GLUT warning: \00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @on_warning], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @on_warning(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @stderr, align 4, !tbaa !6
%4 = tail call i32 @fprintf(i32 noundef %3, ptr noundef nonnull @.str) #2
%5 = load i32, ptr @stderr, align 4, !tbaa !6
%6 = tail call i32 @vfprintf(i32 noundef %5, ptr noundef %0, i32 noundef %1) #2
%7 = load i32, ptr @stderr, align 4, !tbaa !6
%8 = tail call i32 @fprintf(i32 noundef %7, ptr noundef nonnull @.str.1) #2
ret void
}
declare i32 @fprintf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vfprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| sumatrapdf_mupdf_platform_gl_extr_gl-ui.c_on_warning |
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_avcodec_audio_decoder.c_avcodec_port_flush.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_avcodec_audio_decoder.c_avcodec_port_flush.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i64, ptr }
%struct.TYPE_10__ = type { ptr, ptr }
@MMAL_PORT_TYPE_OUTPUT = dso_local local_unnamed_addr global i64 0, align 8
@MMAL_PORT_TYPE_INPUT = dso_local local_unnamed_addr global i64 0, align 8
@MMAL_EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@MMAL_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @avcodec_port_flush], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @avcodec_port_flush(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load ptr, ptr %4, align 8, !tbaa !13
%6 = load i64, ptr %0, align 8, !tbaa !15
%7 = load i64, ptr @MMAL_PORT_TYPE_OUTPUT, align 8, !tbaa !16
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = getelementptr inbounds %struct.TYPE_10__, ptr %5, i64 0, i32 1
br label %14
11: ; preds = %1
%12 = load i64, ptr @MMAL_PORT_TYPE_INPUT, align 8, !tbaa !16
%13 = icmp eq i64 %6, %12
br i1 %13, label %14, label %24
14: ; preds = %11, %9
%15 = phi ptr [ %10, %9 ], [ %5, %11 ]
%16 = load ptr, ptr %15, align 8, !tbaa !17
%17 = tail call ptr @mmal_queue_get(ptr noundef %16) #2
%18 = icmp eq ptr %17, null
br i1 %18, label %24, label %19
19: ; preds = %14, %19
%20 = phi ptr [ %22, %19 ], [ %17, %14 ]
%21 = tail call i32 @mmal_port_buffer_header_callback(ptr noundef nonnull %0, ptr noundef nonnull %20) #2
%22 = tail call ptr @mmal_queue_get(ptr noundef %16) #2
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %19, !llvm.loop !18
24: ; preds = %19, %14, %11
%25 = phi ptr [ @MMAL_EINVAL, %11 ], [ @MMAL_SUCCESS, %14 ], [ @MMAL_SUCCESS, %19 ]
%26 = load i32, ptr %25, align 4, !tbaa !20
ret i32 %26
}
declare ptr @mmal_queue_get(ptr noundef) local_unnamed_addr #1
declare i32 @mmal_port_buffer_header_callback(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_9__", !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_7__", !10, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!10, !10, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!21, !21, i64 0}
!21 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_avcodec_audio_decoder.c_avcodec_port_flush.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_avcodec_audio_decoder.c_avcodec_port_flush.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MMAL_PORT_TYPE_OUTPUT = common local_unnamed_addr global i64 0, align 8
@MMAL_PORT_TYPE_INPUT = common local_unnamed_addr global i64 0, align 8
@MMAL_EINVAL = common local_unnamed_addr global i32 0, align 4
@MMAL_SUCCESS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @avcodec_port_flush], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @avcodec_port_flush(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !12
%5 = load ptr, ptr %4, align 8, !tbaa !14
%6 = load i64, ptr %0, align 8, !tbaa !16
%7 = load i64, ptr @MMAL_PORT_TYPE_OUTPUT, align 8, !tbaa !17
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = getelementptr inbounds i8, ptr %5, i64 8
br label %14
11: ; preds = %1
%12 = load i64, ptr @MMAL_PORT_TYPE_INPUT, align 8, !tbaa !17
%13 = icmp eq i64 %6, %12
br i1 %13, label %14, label %24
14: ; preds = %11, %9
%15 = phi ptr [ %10, %9 ], [ %5, %11 ]
%16 = load ptr, ptr %15, align 8, !tbaa !18
%17 = tail call ptr @mmal_queue_get(ptr noundef %16) #2
%18 = icmp eq ptr %17, null
br i1 %18, label %24, label %19
19: ; preds = %14, %19
%20 = phi ptr [ %22, %19 ], [ %17, %14 ]
%21 = tail call i32 @mmal_port_buffer_header_callback(ptr noundef nonnull %0, ptr noundef nonnull %20) #2
%22 = tail call ptr @mmal_queue_get(ptr noundef %16) #2
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %19, !llvm.loop !19
24: ; preds = %19, %14, %11
%25 = phi ptr [ @MMAL_EINVAL, %11 ], [ @MMAL_SUCCESS, %14 ], [ @MMAL_SUCCESS, %19 ]
%26 = load i32, ptr %25, align 4, !tbaa !21
ret i32 %26
}
declare ptr @mmal_queue_get(ptr noundef) local_unnamed_addr #1
declare i32 @mmal_port_buffer_header_callback(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_9__", !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_7__", !11, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!11, !11, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!22, !22, i64 0}
!22 = !{!"int", !9, i64 0}
| RetroArch_gfx_include_userland_interface_mmal_components_extr_avcodec_audio_decoder.c_avcodec_port_flush |
; ModuleID = 'AnghaBench/freebsd/sys/arm/mv/extr_mv_common.c_mv_win_cesa_attr_armv5.c'
source_filename = "AnghaBench/freebsd/sys/arm/mv/extr_mv_common.c_mv_win_cesa_attr_armv5.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mv_win_cesa_attr_armv5], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mv_win_cesa_attr_armv5(i32 noundef %0) #0 {
%2 = tail call i32 @MV_WIN_CESA_ATTR(i32 noundef %0) #2
ret i32 %2
}
declare i32 @MV_WIN_CESA_ATTR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/mv/extr_mv_common.c_mv_win_cesa_attr_armv5.c'
source_filename = "AnghaBench/freebsd/sys/arm/mv/extr_mv_common.c_mv_win_cesa_attr_armv5.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mv_win_cesa_attr_armv5], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mv_win_cesa_attr_armv5(i32 noundef %0) #0 {
%2 = tail call i32 @MV_WIN_CESA_ATTR(i32 noundef %0) #2
ret i32 %2
}
declare i32 @MV_WIN_CESA_ATTR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_arm_mv_extr_mv_common.c_mv_win_cesa_attr_armv5 |
; ModuleID = 'AnghaBench/linux/net/core/extr_sock.c_sock_kzfree_s.c'
source_filename = "AnghaBench/linux/net/core/extr_sock.c_sock_kzfree_s.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @sock_kzfree_s(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @__sock_kfree_s(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef 1) #2
ret void
}
declare i32 @__sock_kfree_s(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/net/core/extr_sock.c_sock_kzfree_s.c'
source_filename = "AnghaBench/linux/net/core/extr_sock.c_sock_kzfree_s.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @sock_kzfree_s(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @__sock_kfree_s(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef 1) #2
ret void
}
declare i32 @__sock_kfree_s(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_core_extr_sock.c_sock_kzfree_s |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_main.c_ath9k_ps_wakeup.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_main.c_ath9k_ps_wakeup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ath_softc = type { i32, i32, ptr }
%struct.ath_common = type { i32, i32, i32 }
@ATH9K_PM_AWAKE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ath9k_ps_wakeup(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.ath_softc, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call ptr @ath9k_hw_common(ptr noundef %3) #2
%5 = getelementptr inbounds %struct.ath_softc, ptr %0, i64 0, i32 1
%6 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
%7 = load i32, ptr %0, align 8, !tbaa !11
%8 = add nsw i32 %7, 1
store i32 %8, ptr %0, align 8, !tbaa !11
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %25
10: ; preds = %1
%11 = load ptr, ptr %2, align 8, !tbaa !5
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = load i32, ptr @ATH9K_PM_AWAKE, align 4, !tbaa !14
%14 = tail call i32 @ath9k_hw_setpower(ptr noundef nonnull %11, i32 noundef %13) #2
%15 = load i32, ptr @ATH9K_PM_AWAKE, align 4, !tbaa !14
%16 = icmp eq i32 %12, %15
br i1 %16, label %25, label %17
17: ; preds = %10
%18 = tail call i32 @spin_lock(ptr noundef %4) #2
%19 = tail call i32 @ath_hw_cycle_counters_update(ptr noundef %4) #2
%20 = getelementptr inbounds %struct.ath_common, ptr %4, i64 0, i32 2
%21 = tail call i32 @memset(ptr noundef nonnull %20, i32 noundef 0, i32 noundef 4) #2
%22 = getelementptr inbounds %struct.ath_common, ptr %4, i64 0, i32 1
%23 = tail call i32 @memset(ptr noundef nonnull %22, i32 noundef 0, i32 noundef 4) #2
%24 = tail call i32 @spin_unlock(ptr noundef %4) #2
br label %25
25: ; preds = %10, %17, %1
%26 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
ret void
}
declare ptr @ath9k_hw_common(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ath9k_hw_setpower(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @ath_hw_cycle_counters_update(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"ath_softc", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0}
!14 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_main.c_ath9k_ps_wakeup.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_main.c_ath9k_ps_wakeup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATH9K_PM_AWAKE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ath9k_ps_wakeup(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call ptr @ath9k_hw_common(ptr noundef %3) #2
%5 = getelementptr inbounds i8, ptr %0, i64 4
%6 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
%7 = load i32, ptr %0, align 8, !tbaa !12
%8 = add nsw i32 %7, 1
store i32 %8, ptr %0, align 8, !tbaa !12
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %25
10: ; preds = %1
%11 = load ptr, ptr %2, align 8, !tbaa !6
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = load i32, ptr @ATH9K_PM_AWAKE, align 4, !tbaa !15
%14 = tail call i32 @ath9k_hw_setpower(ptr noundef nonnull %11, i32 noundef %13) #2
%15 = load i32, ptr @ATH9K_PM_AWAKE, align 4, !tbaa !15
%16 = icmp eq i32 %12, %15
br i1 %16, label %25, label %17
17: ; preds = %10
%18 = tail call i32 @spin_lock(ptr noundef %4) #2
%19 = tail call i32 @ath_hw_cycle_counters_update(ptr noundef %4) #2
%20 = getelementptr inbounds i8, ptr %4, i64 8
%21 = tail call i32 @memset(ptr noundef nonnull %20, i32 noundef 0, i32 noundef 4) #2
%22 = getelementptr inbounds i8, ptr %4, i64 4
%23 = tail call i32 @memset(ptr noundef nonnull %22, i32 noundef 0, i32 noundef 4) #2
%24 = tail call i32 @spin_unlock(ptr noundef %4) #2
br label %25
25: ; preds = %10, %17, %1
%26 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
ret void
}
declare ptr @ath9k_hw_common(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ath9k_hw_setpower(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @ath_hw_cycle_counters_update(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"ath_softc", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_3__", !8, i64 0}
!15 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_net_wireless_ath_ath9k_extr_main.c_ath9k_ps_wakeup |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/wined3d/extr_wined3d_private.h_wined3d_from_cs.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/wined3d/extr_wined3d_private.h_wined3d_from_cs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wined3d_cs = type { i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @wined3d_from_cs], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @wined3d_from_cs(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.wined3d_cs, ptr %0, i64 0, i32 1
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = load i64, ptr %0, align 8, !tbaa !10
%7 = tail call i64 (...) @GetCurrentThreadId() #2
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 noundef %9) #2
br label %11
11: ; preds = %5, %1
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @GetCurrentThreadId(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"wined3d_cs", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/wined3d/extr_wined3d_private.h_wined3d_from_cs.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/wined3d/extr_wined3d_private.h_wined3d_from_cs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wined3d_from_cs], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @wined3d_from_cs(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = load i64, ptr %0, align 8, !tbaa !11
%7 = tail call i64 @GetCurrentThreadId() #2
%8 = icmp eq i64 %6, %7
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 noundef %9) #2
br label %11
11: ; preds = %5, %1
ret void
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @GetCurrentThreadId(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"wined3d_cs", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| reactos_dll_directx_wine_wined3d_extr_wined3d_private.h_wined3d_from_cs |
; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/m5602/extr_m5602_po1030.c_po1030_set_hvflip.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/m5602/extr_m5602_po1030.c_po1030_set_hvflip.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sd = type { ptr, ptr }
@D_CONF = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"Set hvflip %d %d\0A\00", align 1
@PO1030_CONTROL2 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @po1030_set_hvflip], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @po1030_set_hvflip(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @D_CONF, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.sd, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !9
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = load ptr, ptr %0, align 8, !tbaa !14
%8 = load i32, ptr %7, align 4, !tbaa !15
%9 = tail call i32 @gspca_dbg(ptr noundef nonnull %0, i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %6, i32 noundef %8) #3
%10 = load i32, ptr @PO1030_CONTROL2, align 4, !tbaa !5
%11 = call i32 @m5602_read_sensor(ptr noundef nonnull %0, i32 noundef %10, ptr noundef nonnull %2, i32 noundef 1) #3
%12 = icmp slt i32 %11, 0
br i1 %12, label %26, label %13
13: ; preds = %1
%14 = load i32, ptr %2, align 4, !tbaa !5
%15 = and i32 %14, 63
%16 = load ptr, ptr %4, align 8, !tbaa !9
%17 = load i32, ptr %16, align 4, !tbaa !12
%18 = shl i32 %17, 7
%19 = or disjoint i32 %18, %15
%20 = load ptr, ptr %0, align 8, !tbaa !14
%21 = load i32, ptr %20, align 4, !tbaa !15
%22 = shl i32 %21, 6
%23 = or i32 %22, %19
store i32 %23, ptr %2, align 4, !tbaa !5
%24 = load i32, ptr @PO1030_CONTROL2, align 4, !tbaa !5
%25 = call i32 @m5602_write_sensor(ptr noundef nonnull %0, i32 noundef %24, ptr noundef nonnull %2, i32 noundef 1) #3
br label %26
26: ; preds = %1, %13
%27 = phi i32 [ %25, %13 ], [ %11, %1 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @gspca_dbg(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @m5602_read_sensor(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @m5602_write_sensor(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"sd", !11, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_3__", !6, i64 0}
!14 = !{!10, !11, i64 0}
!15 = !{!16, !6, i64 0}
!16 = !{!"TYPE_4__", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/m5602/extr_m5602_po1030.c_po1030_set_hvflip.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/m5602/extr_m5602_po1030.c_po1030_set_hvflip.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@D_CONF = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [18 x i8] c"Set hvflip %d %d\0A\00", align 1
@PO1030_CONTROL2 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @po1030_set_hvflip], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @po1030_set_hvflip(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @D_CONF, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = load i32, ptr %5, align 4, !tbaa !13
%7 = load ptr, ptr %0, align 8, !tbaa !15
%8 = load i32, ptr %7, align 4, !tbaa !16
%9 = tail call i32 @gspca_dbg(ptr noundef nonnull %0, i32 noundef %3, ptr noundef nonnull @.str, i32 noundef %6, i32 noundef %8) #3
%10 = load i32, ptr @PO1030_CONTROL2, align 4, !tbaa !6
%11 = call i32 @m5602_read_sensor(ptr noundef nonnull %0, i32 noundef %10, ptr noundef nonnull %2, i32 noundef 1) #3
%12 = icmp slt i32 %11, 0
br i1 %12, label %26, label %13
13: ; preds = %1
%14 = load i32, ptr %2, align 4, !tbaa !6
%15 = and i32 %14, 63
%16 = load ptr, ptr %4, align 8, !tbaa !10
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = shl i32 %17, 7
%19 = or disjoint i32 %18, %15
%20 = load ptr, ptr %0, align 8, !tbaa !15
%21 = load i32, ptr %20, align 4, !tbaa !16
%22 = shl i32 %21, 6
%23 = or i32 %22, %19
store i32 %23, ptr %2, align 4, !tbaa !6
%24 = load i32, ptr @PO1030_CONTROL2, align 4, !tbaa !6
%25 = call i32 @m5602_write_sensor(ptr noundef nonnull %0, i32 noundef %24, ptr noundef nonnull %2, i32 noundef 1) #3
br label %26
26: ; preds = %1, %13
%27 = phi i32 [ %25, %13 ], [ %11, %1 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %27
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @gspca_dbg(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @m5602_read_sensor(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @m5602_write_sensor(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"sd", !12, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_3__", !7, i64 0}
!15 = !{!11, !12, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_4__", !7, i64 0}
| linux_drivers_media_usb_gspca_m5602_extr_m5602_po1030.c_po1030_set_hvflip |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/validator/extr_val_kcache.c_key_cache_get_mem.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/validator/extr_val_kcache.c_key_cache_get_mem.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i64 @key_cache_get_mem(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i64 @slabhash_get_mem(i32 noundef %2) #2
%4 = add i64 %3, 4
ret i64 %4
}
declare i64 @slabhash_get_mem(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"key_cache", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/validator/extr_val_kcache.c_key_cache_get_mem.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/validator/extr_val_kcache.c_key_cache_get_mem.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @key_cache_get_mem(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i64 @slabhash_get_mem(i32 noundef %2) #2
%4 = add i64 %3, 4
ret i64 %4
}
declare i64 @slabhash_get_mem(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"key_cache", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_unbound_validator_extr_val_kcache.c_key_cache_get_mem |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.c_a6xx_gmu_power_config.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.c_a6xx_gmu_power_config.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@REG_A6XX_GMU_SYS_BUS_CONFIG = dso_local local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST = dso_local local_unnamed_addr global i32 0, align 4
@GMU_PWR_COL_HYST = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_RPMH_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @a6xx_gmu_power_config], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @a6xx_gmu_power_config(ptr noundef %0) #0 {
%2 = load i32, ptr @REG_A6XX_GMU_SYS_BUS_CONFIG, align 4, !tbaa !5
%3 = tail call i32 @gmu_write(ptr noundef %0, i32 noundef %2, i32 noundef 1) #2
%4 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, align 4, !tbaa !5
%5 = tail call i32 @gmu_write(ptr noundef %0, i32 noundef %4, i32 noundef 163841024) #2
%6 = load i32, ptr %0, align 4, !tbaa !9
switch i32 %6, label %25 [
i32 129, label %7
i32 128, label %16
]
7: ; preds = %1
%8 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST, align 4, !tbaa !5
%9 = load i32, ptr @GMU_PWR_COL_HYST, align 4, !tbaa !5
%10 = tail call i32 @gmu_write(ptr noundef nonnull %0, i32 noundef %8, i32 noundef %9) #2
%11 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, align 4, !tbaa !5
%12 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE, align 4, !tbaa !5
%13 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE, align 4, !tbaa !5
%14 = or i32 %13, %12
%15 = tail call i32 @gmu_rmw(ptr noundef nonnull %0, i32 noundef %11, i32 noundef 0, i32 noundef %14) #2
br label %16
16: ; preds = %1, %7
%17 = load i32, ptr @REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST, align 4, !tbaa !5
%18 = load i32, ptr @GMU_PWR_COL_HYST, align 4, !tbaa !5
%19 = tail call i32 @gmu_write(ptr noundef nonnull %0, i32 noundef %17, i32 noundef %18) #2
%20 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, align 4, !tbaa !5
%21 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE, align 4, !tbaa !5
%22 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE, align 4, !tbaa !5
%23 = or i32 %22, %21
%24 = tail call i32 @gmu_rmw(ptr noundef nonnull %0, i32 noundef %20, i32 noundef 0, i32 noundef %23) #2
br label %25
25: ; preds = %16, %1
%26 = load i32, ptr @REG_A6XX_GMU_RPMH_CTRL, align 4, !tbaa !5
%27 = load i32, ptr @A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE, align 4, !tbaa !5
%28 = load i32, ptr @A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE, align 4, !tbaa !5
%29 = or i32 %28, %27
%30 = load i32, ptr @A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE, align 4, !tbaa !5
%31 = or i32 %29, %30
%32 = load i32, ptr @A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE, align 4, !tbaa !5
%33 = or i32 %31, %32
%34 = load i32, ptr @A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE, align 4, !tbaa !5
%35 = or i32 %33, %34
%36 = load i32, ptr @A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE, align 4, !tbaa !5
%37 = or i32 %35, %36
%38 = tail call i32 @gmu_rmw(ptr noundef nonnull %0, i32 noundef %26, i32 noundef 0, i32 noundef %37) #2
ret void
}
declare i32 @gmu_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gmu_rmw(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"a6xx_gmu", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.c_a6xx_gmu_power_config.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a6xx_gmu.c_a6xx_gmu_power_config.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REG_A6XX_GMU_SYS_BUS_CONFIG = common local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL = common local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST = common local_unnamed_addr global i32 0, align 4
@GMU_PWR_COL_HYST = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE = common local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE = common local_unnamed_addr global i32 0, align 4
@REG_A6XX_GMU_RPMH_CTRL = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE = common local_unnamed_addr global i32 0, align 4
@A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @a6xx_gmu_power_config], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @a6xx_gmu_power_config(ptr noundef %0) #0 {
%2 = load i32, ptr @REG_A6XX_GMU_SYS_BUS_CONFIG, align 4, !tbaa !6
%3 = tail call i32 @gmu_write(ptr noundef %0, i32 noundef %2, i32 noundef 1) #2
%4 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, align 4, !tbaa !6
%5 = tail call i32 @gmu_write(ptr noundef %0, i32 noundef %4, i32 noundef 163841024) #2
%6 = load i32, ptr %0, align 4, !tbaa !10
switch i32 %6, label %25 [
i32 129, label %7
i32 128, label %16
]
7: ; preds = %1
%8 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST, align 4, !tbaa !6
%9 = load i32, ptr @GMU_PWR_COL_HYST, align 4, !tbaa !6
%10 = tail call i32 @gmu_write(ptr noundef nonnull %0, i32 noundef %8, i32 noundef %9) #2
%11 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, align 4, !tbaa !6
%12 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE, align 4, !tbaa !6
%13 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE, align 4, !tbaa !6
%14 = or i32 %13, %12
%15 = tail call i32 @gmu_rmw(ptr noundef nonnull %0, i32 noundef %11, i32 noundef 0, i32 noundef %14) #2
br label %16
16: ; preds = %1, %7
%17 = load i32, ptr @REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST, align 4, !tbaa !6
%18 = load i32, ptr @GMU_PWR_COL_HYST, align 4, !tbaa !6
%19 = tail call i32 @gmu_write(ptr noundef nonnull %0, i32 noundef %17, i32 noundef %18) #2
%20 = load i32, ptr @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, align 4, !tbaa !6
%21 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE, align 4, !tbaa !6
%22 = load i32, ptr @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE, align 4, !tbaa !6
%23 = or i32 %22, %21
%24 = tail call i32 @gmu_rmw(ptr noundef nonnull %0, i32 noundef %20, i32 noundef 0, i32 noundef %23) #2
br label %25
25: ; preds = %16, %1
%26 = load i32, ptr @REG_A6XX_GMU_RPMH_CTRL, align 4, !tbaa !6
%27 = load i32, ptr @A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE, align 4, !tbaa !6
%28 = load i32, ptr @A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE, align 4, !tbaa !6
%29 = or i32 %28, %27
%30 = load i32, ptr @A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE, align 4, !tbaa !6
%31 = or i32 %29, %30
%32 = load i32, ptr @A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE, align 4, !tbaa !6
%33 = or i32 %31, %32
%34 = load i32, ptr @A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE, align 4, !tbaa !6
%35 = or i32 %33, %34
%36 = load i32, ptr @A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE, align 4, !tbaa !6
%37 = or i32 %35, %36
%38 = tail call i32 @gmu_rmw(ptr noundef nonnull %0, i32 noundef %26, i32 noundef 0, i32 noundef %37) #2
ret void
}
declare i32 @gmu_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gmu_rmw(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"a6xx_gmu", !7, i64 0}
| linux_drivers_gpu_drm_msm_adreno_extr_a6xx_gmu.c_a6xx_gmu_power_config |
; ModuleID = 'AnghaBench/kphp-kdb/targ/extr_targ-data.c_do_set_country_city.c'
source_filename = "AnghaBench/kphp-kdb/targ/extr_targ-data.c_do_set_country_city.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lev_univcity = type { i32, i32 }
@LEV_TARG_UNIVCITY = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @do_set_country_city(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp ugt i32 %1, 255
%5 = icmp slt i32 %2, 0
%6 = or i1 %4, %5
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = tail call i32 @get_user(i32 noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %7
%11 = load i32, ptr @LEV_TARG_UNIVCITY, align 4, !tbaa !5
%12 = tail call ptr @alloc_log_event(i32 noundef %11, i32 noundef 16, i32 noundef %0) #2
store i32 %1, ptr %12, align 4, !tbaa !9
%13 = getelementptr inbounds %struct.lev_univcity, ptr %12, i64 0, i32 1
store i32 %2, ptr %13, align 4, !tbaa !11
%14 = tail call i32 @set_country_city(ptr noundef nonnull %12) #2
br label %15
15: ; preds = %3, %7, %10
%16 = phi i32 [ 1, %10 ], [ 0, %7 ], [ 0, %3 ]
ret i32 %16
}
declare i32 @get_user(i32 noundef) local_unnamed_addr #1
declare ptr @alloc_log_event(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_country_city(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"lev_univcity", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/kphp-kdb/targ/extr_targ-data.c_do_set_country_city.c'
source_filename = "AnghaBench/kphp-kdb/targ/extr_targ-data.c_do_set_country_city.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LEV_TARG_UNIVCITY = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @do_set_country_city(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp ugt i32 %1, 255
%5 = icmp slt i32 %2, 0
%6 = or i1 %4, %5
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = tail call i32 @get_user(i32 noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %7
%11 = load i32, ptr @LEV_TARG_UNIVCITY, align 4, !tbaa !6
%12 = tail call ptr @alloc_log_event(i32 noundef %11, i32 noundef 16, i32 noundef %0) #2
store i32 %1, ptr %12, align 4, !tbaa !10
%13 = getelementptr inbounds i8, ptr %12, i64 4
store i32 %2, ptr %13, align 4, !tbaa !12
%14 = tail call i32 @set_country_city(ptr noundef nonnull %12) #2
br label %15
15: ; preds = %3, %7, %10
%16 = phi i32 [ 1, %10 ], [ 0, %7 ], [ 0, %3 ]
ret i32 %16
}
declare i32 @get_user(i32 noundef) local_unnamed_addr #1
declare ptr @alloc_log_event(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_country_city(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"lev_univcity", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
| kphp-kdb_targ_extr_targ-data.c_do_set_country_city |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_floppy.c_invalidate_drive.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_floppy.c_invalidate_drive.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@fake_change = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @invalidate_drive], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @invalidate_drive(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr %2, align 8, !tbaa !10
%4 = tail call i32 @set_bit(i64 noundef %3, ptr noundef nonnull @fake_change) #2
%5 = tail call i32 (...) @process_fd_request() #2
%6 = tail call i32 @check_disk_change(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @set_bit(i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @process_fd_request(...) local_unnamed_addr #1
declare i32 @check_disk_change(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"block_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/extr_floppy.c_invalidate_drive.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/extr_floppy.c_invalidate_drive.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fake_change = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @invalidate_drive], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @invalidate_drive(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr %2, align 8, !tbaa !11
%4 = tail call i32 @set_bit(i64 noundef %3, ptr noundef nonnull @fake_change) #2
%5 = tail call i32 @process_fd_request() #2
%6 = tail call i32 @check_disk_change(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @set_bit(i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @process_fd_request(...) local_unnamed_addr #1
declare i32 @check_disk_change(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"block_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
| fastsocket_kernel_drivers_block_extr_floppy.c_invalidate_drive |
; ModuleID = 'AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_mqtt_msg_subscribe_init.c'
source_filename = "AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_mqtt_msg_subscribe_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @mqtt_msg_subscribe_init(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = tail call i32 @init_message(ptr noundef %0) #2
%4 = tail call i32 @append_message_id(ptr noundef %0, i32 noundef 0) #2
store i32 %4, ptr %1, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call ptr @fail_message(ptr noundef %0) #2
br label %8
8: ; preds = %2, %6
%9 = phi ptr [ %7, %6 ], [ %0, %2 ]
ret ptr %9
}
declare i32 @init_message(ptr noundef) local_unnamed_addr #1
declare i32 @append_message_id(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @fail_message(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_mqtt_msg_subscribe_init.c'
source_filename = "AnghaBench/nodemcu-firmware/app/mqtt/extr_mqtt_msg.c_mqtt_msg_subscribe_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @mqtt_msg_subscribe_init(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = tail call i32 @init_message(ptr noundef %0) #2
%4 = tail call i32 @append_message_id(ptr noundef %0, i32 noundef 0) #2
store i32 %4, ptr %1, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call ptr @fail_message(ptr noundef %0) #2
br label %8
8: ; preds = %2, %6
%9 = phi ptr [ %7, %6 ], [ %0, %2 ]
ret ptr %9
}
declare i32 @init_message(ptr noundef) local_unnamed_addr #1
declare i32 @append_message_id(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @fail_message(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| nodemcu-firmware_app_mqtt_extr_mqtt_msg.c_mqtt_msg_subscribe_init |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_cfgloopmanip.c_duplicate_subloops.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_cfgloopmanip.c_duplicate_subloops.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.loop = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @duplicate_subloops], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @duplicate_subloops(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.loop, ptr %1, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %3, %7
%8 = phi ptr [ %10, %7 ], [ %5, %3 ]
%9 = tail call ptr @duplicate_loop(ptr noundef %0, ptr noundef nonnull %8, ptr noundef %2) #2
tail call void @duplicate_subloops(ptr noundef %0, ptr noundef nonnull %8, ptr noundef %9)
%10 = load ptr, ptr %8, align 8, !tbaa !5
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %7, !llvm.loop !9
12: ; preds = %7, %3
ret void
}
declare ptr @duplicate_loop(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_cfgloopmanip.c_duplicate_subloops.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_cfgloopmanip.c_duplicate_subloops.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @duplicate_subloops], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @duplicate_subloops(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %12, label %7
7: ; preds = %3, %7
%8 = phi ptr [ %10, %7 ], [ %5, %3 ]
%9 = tail call ptr @duplicate_loop(ptr noundef %0, ptr noundef nonnull %8, ptr noundef %2) #2
tail call void @duplicate_subloops(ptr noundef %0, ptr noundef nonnull %8, ptr noundef %9)
%10 = load ptr, ptr %8, align 8, !tbaa !6
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %7, !llvm.loop !10
12: ; preds = %7, %3
ret void
}
declare ptr @duplicate_loop(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_gcc_extr_cfgloopmanip.c_duplicate_subloops |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_mac_link_sfp_x550em.c'
source_filename = "AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_mac_link_sfp_x550em.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ixgbe_hw = type { %struct.TYPE_6__, %struct.TYPE_4__ }
%struct.TYPE_6__ = type { i32, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { ptr }
%struct.TYPE_4__ = type { i32 }
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_ERR_SFP_NOT_PRESENT = dso_local local_unnamed_addr global i64 0, align 8
@IXGBE_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@IXGBE_CS4227_LINE_SPARE24_LSB = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_CS4227_EDC_MODE_CX1 = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_CS4227_EDC_MODE_SR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @ixgbe_setup_mac_link_sfp_x550em(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load i32, ptr @FALSE, align 4, !tbaa !5
store i32 %5, ptr %4, align 4, !tbaa !5
%6 = tail call i32 @UNREFERENCED_1PARAMETER(i32 noundef %2) #3
%7 = call i64 @ixgbe_supported_sfp_modules_X550em(ptr noundef %0, ptr noundef nonnull %4) #3
%8 = load i64, ptr @IXGBE_ERR_SFP_NOT_PRESENT, align 8, !tbaa !9
%9 = icmp eq i64 %7, %8
%10 = load i64, ptr @IXGBE_SUCCESS, align 8, !tbaa !9
br i1 %9, label %31, label %11
11: ; preds = %3
%12 = icmp eq i64 %7, %10
br i1 %12, label %13, label %31
13: ; preds = %11
%14 = call i32 @ixgbe_setup_kr_speed_x550em(ptr noundef %0, i32 noundef %1) #3
%15 = load i32, ptr @IXGBE_CS4227_LINE_SPARE24_LSB, align 4, !tbaa !5
%16 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 1
%17 = load i32, ptr %16, align 8, !tbaa !11
%18 = shl i32 %17, 12
%19 = add nsw i32 %18, %15
%20 = load i32, ptr %4, align 4, !tbaa !5
%21 = icmp eq i32 %20, 0
%22 = load i32, ptr @IXGBE_CS4227_EDC_MODE_SR, align 4
%23 = load i32, ptr @IXGBE_CS4227_EDC_MODE_CX1, align 4
%24 = select i1 %21, i32 %22, i32 %23
%25 = shl i32 %24, 1
%26 = or disjoint i32 %25, 1
%27 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !17
%29 = load i32, ptr %0, align 8, !tbaa !18
%30 = call i64 %28(ptr noundef nonnull %0, i32 noundef %29, i32 noundef %19, i32 noundef %26) #3
br label %31
31: ; preds = %3, %11, %13
%32 = phi i64 [ %30, %13 ], [ %7, %11 ], [ %10, %3 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i64 %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @UNREFERENCED_1PARAMETER(i32 noundef) local_unnamed_addr #2
declare i64 @ixgbe_supported_sfp_modules_X550em(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ixgbe_setup_kr_speed_x550em(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 16}
!12 = !{!"ixgbe_hw", !13, i64 0, !16, i64 16}
!13 = !{!"TYPE_6__", !6, i64 0, !14, i64 8}
!14 = !{!"TYPE_5__", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!"TYPE_4__", !6, i64 0}
!17 = !{!12, !15, i64 8}
!18 = !{!12, !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_mac_link_sfp_x550em.c'
source_filename = "AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_mac_link_sfp_x550em.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALSE = common local_unnamed_addr global i32 0, align 4
@IXGBE_ERR_SFP_NOT_PRESENT = common local_unnamed_addr global i64 0, align 8
@IXGBE_SUCCESS = common local_unnamed_addr global i64 0, align 8
@IXGBE_CS4227_LINE_SPARE24_LSB = common local_unnamed_addr global i32 0, align 4
@IXGBE_CS4227_EDC_MODE_CX1 = common local_unnamed_addr global i32 0, align 4
@IXGBE_CS4227_EDC_MODE_SR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @ixgbe_setup_mac_link_sfp_x550em(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = load i32, ptr @FALSE, align 4, !tbaa !6
store i32 %5, ptr %4, align 4, !tbaa !6
%6 = tail call i32 @UNREFERENCED_1PARAMETER(i32 noundef %2) #3
%7 = call i64 @ixgbe_supported_sfp_modules_X550em(ptr noundef %0, ptr noundef nonnull %4) #3
%8 = load i64, ptr @IXGBE_ERR_SFP_NOT_PRESENT, align 8, !tbaa !10
%9 = icmp eq i64 %7, %8
%10 = load i64, ptr @IXGBE_SUCCESS, align 8, !tbaa !10
br i1 %9, label %31, label %11
11: ; preds = %3
%12 = icmp eq i64 %7, %10
br i1 %12, label %13, label %31
13: ; preds = %11
%14 = call i32 @ixgbe_setup_kr_speed_x550em(ptr noundef %0, i32 noundef %1) #3
%15 = load i32, ptr @IXGBE_CS4227_LINE_SPARE24_LSB, align 4, !tbaa !6
%16 = getelementptr inbounds i8, ptr %0, i64 16
%17 = load i32, ptr %16, align 8, !tbaa !12
%18 = shl i32 %17, 12
%19 = add nsw i32 %18, %15
%20 = load i32, ptr %4, align 4, !tbaa !6
%21 = icmp eq i32 %20, 0
%22 = load i32, ptr @IXGBE_CS4227_EDC_MODE_SR, align 4
%23 = load i32, ptr @IXGBE_CS4227_EDC_MODE_CX1, align 4
%24 = select i1 %21, i32 %22, i32 %23
%25 = shl i32 %24, 1
%26 = or disjoint i32 %25, 1
%27 = getelementptr inbounds i8, ptr %0, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !18
%29 = load i32, ptr %0, align 8, !tbaa !19
%30 = call i64 %28(ptr noundef nonnull %0, i32 noundef %29, i32 noundef %19, i32 noundef %26) #3
br label %31
31: ; preds = %3, %11, %13
%32 = phi i64 [ %30, %13 ], [ %7, %11 ], [ %10, %3 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i64 %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @UNREFERENCED_1PARAMETER(i32 noundef) local_unnamed_addr #2
declare i64 @ixgbe_supported_sfp_modules_X550em(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ixgbe_setup_kr_speed_x550em(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 16}
!13 = !{!"ixgbe_hw", !14, i64 0, !17, i64 16}
!14 = !{!"TYPE_6__", !7, i64 0, !15, i64 8}
!15 = !{!"TYPE_5__", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!"TYPE_4__", !7, i64 0}
!18 = !{!13, !16, i64 8}
!19 = !{!13, !7, i64 0}
| freebsd_sys_dev_ixgbe_extr_ixgbe_x550.c_ixgbe_setup_mac_link_sfp_x550em |
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_frame.c'
source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_frame.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_23__ = type { i32, i32 }
%struct.TYPE_21__ = type { i32, ptr, ptr, i32, i64, i32, ptr, i32, i32, i64, ptr, i64, i32, i64, i32, i32, i64, ptr, i64 }
%struct.TYPE_22__ = type { i32, i32, i32, i32, i32, i64, i64, i64, i32, %struct.TYPE_20__, i64, i32 }
%struct.TYPE_20__ = type { i32, i32, i32, i32 }
@gl1_video_bits = dso_local local_unnamed_addr global i32 0, align 4
@GL_COLOR_BUFFER_BIT = dso_local local_unnamed_addr global i32 0, align 4
@GL_BLEND = dso_local local_unnamed_addr global i32 0, align 4
@GL_SRC_ALPHA = dso_local local_unnamed_addr global i32 0, align 4
@GL_ONE_MINUS_SRC_ALPHA = dso_local local_unnamed_addr global i32 0, align 4
@gl1_video_width = dso_local local_unnamed_addr global i32 0, align 4
@gl1_video_height = dso_local local_unnamed_addr global i32 0, align 4
@gl1_video_pitch = dso_local local_unnamed_addr global i32 0, align 4
@gl1_video_buf = dso_local local_unnamed_addr global ptr null, align 8
@gl1_menu_frame = dso_local local_unnamed_addr global i64 0, align 8
@gl1_menu_width = dso_local local_unnamed_addr global i32 0, align 4
@gl1_menu_height = dso_local local_unnamed_addr global i32 0, align 4
@gl1_menu_pitch = dso_local local_unnamed_addr global i32 0, align 4
@gl1_menu_bits = dso_local local_unnamed_addr global i32 0, align 4
@gl1_menu_size_changed = dso_local local_unnamed_addr global i32 0, align 4
@gl1_menu_video_buf = dso_local local_unnamed_addr global ptr null, align 8
@GL_RGBA = dso_local local_unnamed_addr global i32 0, align 4
@GL_UNSIGNED_BYTE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gl1_gfx_frame], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @gl1_gfx_frame(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 %4, i32 noundef %5, ptr noundef %6, ptr noundef %7) #0 {
%9 = alloca %struct.TYPE_23__, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
%10 = load i32, ptr @gl1_video_bits, align 4, !tbaa !5
%11 = tail call i32 @gl1_context_bind_hw_render(ptr noundef %0, i32 noundef 0) #3
store i32 0, ptr %7, align 8, !tbaa !9
%12 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 18
store i64 0, ptr %12, align 8, !tbaa !13
%13 = icmp ne ptr %1, null
%14 = icmp ne i32 %2, 0
%15 = and i1 %13, %14
%16 = icmp ne i32 %3, 0
%17 = and i1 %15, %16
br i1 %17, label %18, label %257
18: ; preds = %8
%19 = load i32, ptr %0, align 8, !tbaa !14
%20 = icmp eq i32 %19, 0
br i1 %20, label %32, label %21
21: ; preds = %18
store i32 0, ptr %0, align 8, !tbaa !14
%22 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 17
%23 = load ptr, ptr %22, align 8, !tbaa !17
%24 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 5
%25 = load i32, ptr %24, align 8, !tbaa !18
%26 = tail call i32 %23(i32 noundef %25, i32 noundef 0, i32 noundef 0) #3
%27 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 15
%28 = load i32, ptr %27, align 4, !tbaa !19
%29 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 14
%30 = load i32, ptr %29, align 8, !tbaa !20
%31 = tail call i32 @gl1_gfx_set_viewport(ptr noundef nonnull %0, ptr noundef nonnull %7, i32 noundef %28, i32 noundef %30, i32 noundef 0, i32 noundef 1) #3
br label %32
32: ; preds = %21, %18
%33 = tail call i32 @glClearColor(float noundef 0.000000e+00, float noundef 0.000000e+00, float noundef 0.000000e+00, float noundef 1.000000e+00) #3
%34 = load i32, ptr @GL_COLOR_BUFFER_BIT, align 4, !tbaa !5
%35 = tail call i32 @glClear(i32 noundef %34) #3
%36 = load i32, ptr @GL_BLEND, align 4, !tbaa !5
%37 = tail call i32 @glEnable(i32 noundef %36) #3
%38 = load i32, ptr @GL_SRC_ALPHA, align 4, !tbaa !5
%39 = load i32, ptr @GL_ONE_MINUS_SRC_ALPHA, align 4, !tbaa !5
%40 = tail call i32 @glBlendFunc(i32 noundef %38, i32 noundef %39) #3
%41 = load i32, ptr @gl1_video_width, align 4, !tbaa !5
%42 = icmp eq i32 %41, %2
%43 = load i32, ptr @gl1_video_height, align 4
%44 = icmp eq i32 %43, %3
%45 = select i1 %42, i1 %44, i1 false
%46 = load i32, ptr @gl1_video_pitch, align 4
%47 = icmp eq i32 %46, %5
%48 = select i1 %45, i1 %47, i1 false
br i1 %48, label %68, label %49
49: ; preds = %32
%50 = icmp ugt i32 %2, 4
%51 = icmp ugt i32 %3, 4
%52 = and i1 %50, %51
br i1 %52, label %53, label %68
53: ; preds = %49
store i32 %2, ptr @gl1_video_width, align 4, !tbaa !5
store i32 %3, ptr @gl1_video_height, align 4, !tbaa !5
store i32 %5, ptr @gl1_video_pitch, align 4, !tbaa !5
%54 = tail call i32 @get_pot(i32 noundef %2) #3
%55 = tail call i32 @get_pot(i32 noundef %3) #3
%56 = load ptr, ptr @gl1_video_buf, align 8, !tbaa !21
%57 = icmp eq ptr %56, null
br i1 %57, label %60, label %58
58: ; preds = %53
%59 = tail call i32 @free(ptr noundef nonnull %56) #3
br label %60
60: ; preds = %58, %53
%61 = shl i32 %54, 2
%62 = mul i32 %61, %55
%63 = tail call i64 @malloc(i32 noundef %62) #3
%64 = inttoptr i64 %63 to ptr
store ptr %64, ptr @gl1_video_buf, align 8, !tbaa !21
%65 = load i32, ptr @gl1_video_width, align 4, !tbaa !5
%66 = load i32, ptr @gl1_video_height, align 4, !tbaa !5
%67 = load i32, ptr @gl1_video_pitch, align 4, !tbaa !5
br label %68
68: ; preds = %32, %49, %60
%69 = phi i32 [ %5, %32 ], [ %46, %49 ], [ %67, %60 ]
%70 = phi i32 [ %3, %32 ], [ %43, %49 ], [ %66, %60 ]
%71 = phi i32 [ %2, %32 ], [ %41, %49 ], [ %65, %60 ]
%72 = tail call i32 @get_pot(i32 noundef %71) #3
%73 = tail call i32 @get_pot(i32 noundef %70) #3
%74 = icmp eq i32 %2, 4
%75 = icmp eq i32 %3, 4
%76 = and i1 %74, %75
%77 = icmp ugt i32 %71, 4
%78 = and i1 %76, %77
%79 = icmp ult i32 %70, 5
%80 = xor i1 %78, true
%81 = select i1 %80, i1 true, i1 %79
%82 = load ptr, ptr @gl1_video_buf, align 8
%83 = icmp ne ptr %82, null
%84 = select i1 %81, i1 %83, i1 false
br i1 %84, label %85, label %110
85: ; preds = %68
switch i32 %10, label %108 [
i32 32, label %86
i32 16, label %105
]
86: ; preds = %85
%87 = icmp eq i32 %70, 0
br i1 %87, label %108, label %88
88: ; preds = %86
%89 = shl i32 %72, 2
%90 = shl i32 %71, 2
%91 = zext i32 %70 to i64
br label %92
92: ; preds = %88, %92
%93 = phi i64 [ 0, %88 ], [ %103, %92 ]
%94 = load ptr, ptr @gl1_video_buf, align 8, !tbaa !21
%95 = trunc i64 %93 to i32
%96 = mul i32 %89, %95
%97 = zext i32 %96 to i64
%98 = getelementptr inbounds i8, ptr %94, i64 %97
%99 = mul i32 %69, %95
%100 = zext i32 %99 to i64
%101 = getelementptr inbounds i8, ptr %1, i64 %100
%102 = tail call i32 @memcpy(ptr noundef %98, ptr noundef nonnull %101, i32 noundef %90) #3
%103 = add nuw nsw i64 %93, 1
%104 = icmp eq i64 %103, %91
br i1 %104, label %108, label %92, !llvm.loop !22
105: ; preds = %85
%106 = shl i32 %72, 2
%107 = tail call i32 @conv_rgb565_argb8888(ptr noundef nonnull %82, ptr noundef nonnull %1, i32 noundef %71, i32 noundef %70, i32 noundef %106, i32 noundef %69) #3
br label %108
108: ; preds = %92, %86, %85, %105
%109 = load ptr, ptr @gl1_video_buf, align 8, !tbaa !21
br label %110
110: ; preds = %108, %68
%111 = phi ptr [ %109, %108 ], [ null, %68 ]
%112 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 1
%113 = load i32, ptr %112, align 4, !tbaa !24
%114 = icmp eq i32 %113, %71
br i1 %114, label %115, label %119
115: ; preds = %110
%116 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 2
%117 = load i32, ptr %116, align 8, !tbaa !25
%118 = icmp eq i32 %117, %70
br i1 %118, label %121, label %119
119: ; preds = %115, %110
store i32 %71, ptr %112, align 4, !tbaa !24
%120 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 2
store i32 %70, ptr %120, align 8, !tbaa !25
br label %121
121: ; preds = %119, %115
%122 = call i32 @video_context_driver_get_video_size(ptr noundef nonnull %9) #3
%123 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 3
%124 = load <2 x i32>, ptr %9, align 8, !tbaa !5
store <2 x i32> %124, ptr %123, align 4, !tbaa !5
%125 = icmp ne ptr %111, null
%126 = select i1 %81, i1 %125, i1 false
br i1 %126, label %127, label %131
127: ; preds = %121
%128 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 11
%129 = load i32, ptr %128, align 8, !tbaa !26
%130 = call i32 @draw_tex(ptr noundef nonnull %0, i32 noundef %72, i32 noundef %73, i32 noundef %71, i32 noundef %70, i32 noundef %129, ptr noundef nonnull %111) #3
br label %131
131: ; preds = %127, %121
%132 = load i64, ptr @gl1_menu_frame, align 8, !tbaa !27
%133 = icmp eq i64 %132, 0
br i1 %133, label %195, label %134
134: ; preds = %131
%135 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 16
%136 = load i64, ptr %135, align 8, !tbaa !28
%137 = icmp eq i64 %136, 0
br i1 %137, label %195, label %138
138: ; preds = %134
%139 = load i32, ptr @gl1_menu_width, align 4, !tbaa !5
%140 = load i32, ptr @gl1_menu_height, align 4, !tbaa !5
%141 = load i32, ptr @gl1_menu_pitch, align 4, !tbaa !5
%142 = load i32, ptr @gl1_menu_bits, align 4, !tbaa !5
%143 = call i32 @get_pot(i32 noundef %139) #3
%144 = call i32 @get_pot(i32 noundef %140) #3
%145 = load i32, ptr @gl1_menu_size_changed, align 4, !tbaa !5
%146 = icmp eq i32 %145, 0
br i1 %146, label %152, label %147
147: ; preds = %138
store i32 0, ptr @gl1_menu_size_changed, align 4, !tbaa !5
%148 = load ptr, ptr @gl1_menu_video_buf, align 8, !tbaa !21
%149 = icmp eq ptr %148, null
br i1 %149, label %155, label %150
150: ; preds = %147
%151 = call i32 @free(ptr noundef nonnull %148) #3
store ptr null, ptr @gl1_menu_video_buf, align 8, !tbaa !21
br label %155
152: ; preds = %138
%153 = load ptr, ptr @gl1_menu_video_buf, align 8
%154 = icmp eq ptr %153, null
br i1 %154, label %155, label %160
155: ; preds = %150, %147, %152
%156 = shl i32 %143, 2
%157 = mul i32 %156, %144
%158 = call i64 @malloc(i32 noundef %157) #3
%159 = inttoptr i64 %158 to ptr
store ptr %159, ptr @gl1_menu_video_buf, align 8, !tbaa !21
br label %160
160: ; preds = %155, %152
%161 = phi ptr [ %159, %155 ], [ %153, %152 ]
%162 = icmp eq i32 %142, 16
%163 = icmp ne ptr %161, null
%164 = select i1 %162, i1 %163, i1 false
br i1 %164, label %165, label %195
165: ; preds = %160
%166 = load i64, ptr @gl1_menu_frame, align 8, !tbaa !27
%167 = shl i32 %143, 2
%168 = call i32 @conv_rgba4444_argb8888(ptr noundef nonnull %161, i64 noundef %166, i32 noundef %139, i32 noundef %140, i32 noundef %167, i32 noundef %141) #3
%169 = load ptr, ptr @gl1_menu_video_buf, align 8, !tbaa !21
%170 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 10
%171 = load i64, ptr %170, align 8, !tbaa !29
%172 = icmp eq i64 %171, 0
br i1 %172, label %191, label %173
173: ; preds = %165
%174 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 15
%175 = load i32, ptr %174, align 4, !tbaa !19
%176 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 14
%177 = load i32, ptr %176, align 8, !tbaa !20
%178 = call i32 @glViewport(i32 noundef 0, i32 noundef 0, i32 noundef %175, i32 noundef %177) #3
%179 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 8
%180 = load i32, ptr %179, align 8, !tbaa !30
%181 = call i32 @draw_tex(ptr noundef nonnull %0, i32 noundef %143, i32 noundef %144, i32 noundef %139, i32 noundef %140, i32 noundef %180, ptr noundef %169) #3
%182 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 9
%183 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 9, i32 3
%184 = load i32, ptr %183, align 4, !tbaa !31
%185 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 9, i32 2
%186 = load i32, ptr %185, align 4, !tbaa !32
%187 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 9, i32 1
%188 = load i32, ptr %187, align 4, !tbaa !33
%189 = load i32, ptr %182, align 4, !tbaa !34
%190 = call i32 @glViewport(i32 noundef %184, i32 noundef %186, i32 noundef %188, i32 noundef %189) #3
br label %195
191: ; preds = %165
%192 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 8
%193 = load i32, ptr %192, align 8, !tbaa !30
%194 = call i32 @draw_tex(ptr noundef nonnull %0, i32 noundef %143, i32 noundef %144, i32 noundef %139, i32 noundef %140, i32 noundef %193, ptr noundef %169) #3
br label %195
195: ; preds = %160, %191, %173, %134, %131
%196 = icmp eq ptr %6, null
br i1 %196, label %199, label %197
197: ; preds = %195
%198 = call i32 @font_driver_render_msg(ptr noundef nonnull %7, ptr noundef null, ptr noundef nonnull %6, ptr noundef null) #3
br label %199
199: ; preds = %197, %195
%200 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 10
%201 = load ptr, ptr %200, align 8, !tbaa !35
%202 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 5
%203 = load i32, ptr %202, align 8, !tbaa !18
%204 = call i32 %201(i32 noundef %203, ptr noundef nonnull %7) #3
%205 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 6
%206 = load i64, ptr %205, align 8, !tbaa !36
%207 = icmp eq i64 %206, 0
br i1 %207, label %212, label %208
208: ; preds = %199
%209 = load i32, ptr @GL_RGBA, align 4, !tbaa !5
%210 = load i32, ptr @GL_UNSIGNED_BYTE, align 4, !tbaa !5
%211 = call i32 @gl1_readback(ptr noundef nonnull %0, i32 noundef 4, i32 noundef %209, i32 noundef %210, i64 noundef %206) #3
br label %212
212: ; preds = %208, %199
%213 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 9
%214 = load i64, ptr %213, align 8, !tbaa !37
%215 = icmp eq i64 %214, 0
br i1 %215, label %235, label %216
216: ; preds = %212
%217 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 3
%218 = load i32, ptr %217, align 8, !tbaa !38
%219 = icmp eq i32 %218, 0
br i1 %219, label %220, label %235
220: ; preds = %216
%221 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 8
%222 = load i32, ptr %221, align 4, !tbaa !39
%223 = icmp eq i32 %222, 0
br i1 %223, label %224, label %235
224: ; preds = %220
%225 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 7
%226 = load i32, ptr %225, align 8, !tbaa !40
%227 = icmp eq i32 %226, 0
br i1 %227, label %228, label %235
228: ; preds = %224
%229 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 6
%230 = load ptr, ptr %229, align 8, !tbaa !41
%231 = load i32, ptr %202, align 8, !tbaa !18
%232 = call i32 %230(i32 noundef %231, ptr noundef nonnull %7) #3
%233 = load i32, ptr @GL_COLOR_BUFFER_BIT, align 4, !tbaa !5
%234 = call i32 @glClear(i32 noundef %233) #3
br label %235
235: ; preds = %228, %224, %220, %216, %212
%236 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 6
%237 = load ptr, ptr %236, align 8, !tbaa !41
%238 = load i32, ptr %202, align 8, !tbaa !18
%239 = call i32 %237(i32 noundef %238, ptr noundef nonnull %7) #3
%240 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 4
%241 = load i64, ptr %240, align 8, !tbaa !42
%242 = icmp eq i64 %241, 0
br i1 %242, label %255, label %243
243: ; preds = %235
%244 = getelementptr inbounds %struct.TYPE_21__, ptr %7, i64 0, i32 3
%245 = load i32, ptr %244, align 8, !tbaa !38
%246 = icmp eq i32 %245, 0
br i1 %246, label %247, label %255
247: ; preds = %243
%248 = getelementptr inbounds %struct.TYPE_22__, ptr %0, i64 0, i32 5
%249 = load i64, ptr %248, align 8, !tbaa !43
%250 = icmp eq i64 %249, 0
br i1 %250, label %251, label %255
251: ; preds = %247
%252 = load i32, ptr @GL_COLOR_BUFFER_BIT, align 4, !tbaa !5
%253 = call i32 @glClear(i32 noundef %252) #3
%254 = call i32 (...) @glFinish() #3
br label %255
255: ; preds = %251, %247, %243, %235
%256 = call i32 @gl1_context_bind_hw_render(ptr noundef nonnull %0, i32 noundef 1) #3
br label %257
257: ; preds = %8, %255
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @gl1_context_bind_hw_render(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @gl1_gfx_set_viewport(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @glClearColor(float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #2
declare i32 @glClear(i32 noundef) local_unnamed_addr #2
declare i32 @glEnable(i32 noundef) local_unnamed_addr #2
declare i32 @glBlendFunc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_pot(i32 noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef) local_unnamed_addr #2
declare i64 @malloc(i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @conv_rgb565_argb8888(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @video_context_driver_get_video_size(ptr noundef) local_unnamed_addr #2
declare i32 @draw_tex(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @conv_rgba4444_argb8888(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @glViewport(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @font_driver_render_msg(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @gl1_readback(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @glFinish(...) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_21__", !6, i64 0, !11, i64 8, !11, i64 16, !6, i64 24, !12, i64 32, !6, i64 40, !11, i64 48, !6, i64 56, !6, i64 60, !12, i64 64, !11, i64 72, !12, i64 80, !6, i64 88, !12, i64 96, !6, i64 104, !6, i64 108, !12, i64 112, !11, i64 120, !12, i64 128}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !12, i64 128}
!14 = !{!15, !6, i64 0}
!15 = !{!"TYPE_22__", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !6, i64 48, !16, i64 52, !12, i64 72, !6, i64 80}
!16 = !{!"TYPE_20__", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!17 = !{!10, !11, i64 120}
!18 = !{!10, !6, i64 40}
!19 = !{!10, !6, i64 108}
!20 = !{!10, !6, i64 104}
!21 = !{!11, !11, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!15, !6, i64 4}
!25 = !{!15, !6, i64 8}
!26 = !{!15, !6, i64 80}
!27 = !{!12, !12, i64 0}
!28 = !{!10, !12, i64 112}
!29 = !{!15, !12, i64 72}
!30 = !{!15, !6, i64 48}
!31 = !{!15, !6, i64 64}
!32 = !{!15, !6, i64 60}
!33 = !{!15, !6, i64 56}
!34 = !{!15, !6, i64 52}
!35 = !{!10, !11, i64 72}
!36 = !{!15, !12, i64 32}
!37 = !{!10, !12, i64 64}
!38 = !{!10, !6, i64 24}
!39 = !{!10, !6, i64 60}
!40 = !{!10, !6, i64 56}
!41 = !{!10, !11, i64 48}
!42 = !{!10, !12, i64 32}
!43 = !{!15, !12, i64 24}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_frame.c'
source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_frame.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_23__ = type { i32, i32 }
@gl1_video_bits = common local_unnamed_addr global i32 0, align 4
@GL_COLOR_BUFFER_BIT = common local_unnamed_addr global i32 0, align 4
@GL_BLEND = common local_unnamed_addr global i32 0, align 4
@GL_SRC_ALPHA = common local_unnamed_addr global i32 0, align 4
@GL_ONE_MINUS_SRC_ALPHA = common local_unnamed_addr global i32 0, align 4
@gl1_video_width = common local_unnamed_addr global i32 0, align 4
@gl1_video_height = common local_unnamed_addr global i32 0, align 4
@gl1_video_pitch = common local_unnamed_addr global i32 0, align 4
@gl1_video_buf = common local_unnamed_addr global ptr null, align 8
@gl1_menu_frame = common local_unnamed_addr global i64 0, align 8
@gl1_menu_width = common local_unnamed_addr global i32 0, align 4
@gl1_menu_height = common local_unnamed_addr global i32 0, align 4
@gl1_menu_pitch = common local_unnamed_addr global i32 0, align 4
@gl1_menu_bits = common local_unnamed_addr global i32 0, align 4
@gl1_menu_size_changed = common local_unnamed_addr global i32 0, align 4
@gl1_menu_video_buf = common local_unnamed_addr global ptr null, align 8
@GL_RGBA = common local_unnamed_addr global i32 0, align 4
@GL_UNSIGNED_BYTE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gl1_gfx_frame], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @gl1_gfx_frame(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 %4, i32 noundef %5, ptr noundef %6, ptr noundef %7) #0 {
%9 = alloca %struct.TYPE_23__, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3
%10 = load i32, ptr @gl1_video_bits, align 4, !tbaa !6
%11 = tail call i32 @gl1_context_bind_hw_render(ptr noundef %0, i32 noundef 0) #3
store i32 0, ptr %7, align 8, !tbaa !10
%12 = getelementptr inbounds i8, ptr %7, i64 128
store i64 0, ptr %12, align 8, !tbaa !14
%13 = icmp ne ptr %1, null
%14 = icmp ne i32 %2, 0
%15 = and i1 %13, %14
%16 = icmp ne i32 %3, 0
%17 = and i1 %15, %16
br i1 %17, label %18, label %256
18: ; preds = %8
%19 = load i32, ptr %0, align 8, !tbaa !15
%20 = icmp eq i32 %19, 0
br i1 %20, label %32, label %21
21: ; preds = %18
store i32 0, ptr %0, align 8, !tbaa !15
%22 = getelementptr inbounds i8, ptr %7, i64 120
%23 = load ptr, ptr %22, align 8, !tbaa !18
%24 = getelementptr inbounds i8, ptr %7, i64 40
%25 = load i32, ptr %24, align 8, !tbaa !19
%26 = tail call i32 %23(i32 noundef %25, i32 noundef 0, i32 noundef 0) #3
%27 = getelementptr inbounds i8, ptr %7, i64 108
%28 = load i32, ptr %27, align 4, !tbaa !20
%29 = getelementptr inbounds i8, ptr %7, i64 104
%30 = load i32, ptr %29, align 8, !tbaa !21
%31 = tail call i32 @gl1_gfx_set_viewport(ptr noundef nonnull %0, ptr noundef nonnull %7, i32 noundef %28, i32 noundef %30, i32 noundef 0, i32 noundef 1) #3
br label %32
32: ; preds = %21, %18
%33 = tail call i32 @glClearColor(float noundef 0.000000e+00, float noundef 0.000000e+00, float noundef 0.000000e+00, float noundef 1.000000e+00) #3
%34 = load i32, ptr @GL_COLOR_BUFFER_BIT, align 4, !tbaa !6
%35 = tail call i32 @glClear(i32 noundef %34) #3
%36 = load i32, ptr @GL_BLEND, align 4, !tbaa !6
%37 = tail call i32 @glEnable(i32 noundef %36) #3
%38 = load i32, ptr @GL_SRC_ALPHA, align 4, !tbaa !6
%39 = load i32, ptr @GL_ONE_MINUS_SRC_ALPHA, align 4, !tbaa !6
%40 = tail call i32 @glBlendFunc(i32 noundef %38, i32 noundef %39) #3
%41 = load i32, ptr @gl1_video_width, align 4, !tbaa !6
%42 = icmp eq i32 %41, %2
%43 = load i32, ptr @gl1_video_height, align 4
%44 = icmp eq i32 %43, %3
%45 = select i1 %42, i1 %44, i1 false
%46 = load i32, ptr @gl1_video_pitch, align 4
%47 = icmp eq i32 %46, %5
%48 = select i1 %45, i1 %47, i1 false
br i1 %48, label %68, label %49
49: ; preds = %32
%50 = icmp ugt i32 %2, 4
%51 = icmp ugt i32 %3, 4
%52 = and i1 %50, %51
br i1 %52, label %53, label %68
53: ; preds = %49
store i32 %2, ptr @gl1_video_width, align 4, !tbaa !6
store i32 %3, ptr @gl1_video_height, align 4, !tbaa !6
store i32 %5, ptr @gl1_video_pitch, align 4, !tbaa !6
%54 = tail call i32 @get_pot(i32 noundef %2) #3
%55 = tail call i32 @get_pot(i32 noundef %3) #3
%56 = load ptr, ptr @gl1_video_buf, align 8, !tbaa !22
%57 = icmp eq ptr %56, null
br i1 %57, label %60, label %58
58: ; preds = %53
%59 = tail call i32 @free(ptr noundef nonnull %56) #3
br label %60
60: ; preds = %58, %53
%61 = shl i32 %54, 2
%62 = mul i32 %61, %55
%63 = tail call i64 @malloc(i32 noundef %62) #3
%64 = inttoptr i64 %63 to ptr
store ptr %64, ptr @gl1_video_buf, align 8, !tbaa !22
%65 = load i32, ptr @gl1_video_width, align 4, !tbaa !6
%66 = load i32, ptr @gl1_video_height, align 4, !tbaa !6
%67 = load i32, ptr @gl1_video_pitch, align 4, !tbaa !6
br label %68
68: ; preds = %32, %49, %60
%69 = phi i32 [ %5, %32 ], [ %46, %49 ], [ %67, %60 ]
%70 = phi i32 [ %3, %32 ], [ %43, %49 ], [ %66, %60 ]
%71 = phi i32 [ %2, %32 ], [ %41, %49 ], [ %65, %60 ]
%72 = tail call i32 @get_pot(i32 noundef %71) #3
%73 = tail call i32 @get_pot(i32 noundef %70) #3
%74 = icmp ne i32 %2, 4
%75 = icmp ne i32 %3, 4
%76 = or i1 %74, %75
%77 = icmp ult i32 %71, 5
%78 = or i1 %76, %77
%79 = icmp ult i32 %70, 5
%80 = select i1 %78, i1 true, i1 %79
%81 = load ptr, ptr @gl1_video_buf, align 8
%82 = icmp ne ptr %81, null
%83 = select i1 %80, i1 %82, i1 false
br i1 %83, label %84, label %109
84: ; preds = %68
switch i32 %10, label %107 [
i32 32, label %85
i32 16, label %104
]
85: ; preds = %84
%86 = icmp eq i32 %70, 0
br i1 %86, label %107, label %87
87: ; preds = %85
%88 = shl i32 %72, 2
%89 = shl i32 %71, 2
%90 = zext i32 %70 to i64
br label %91
91: ; preds = %87, %91
%92 = phi i64 [ 0, %87 ], [ %102, %91 ]
%93 = load ptr, ptr @gl1_video_buf, align 8, !tbaa !22
%94 = trunc nuw i64 %92 to i32
%95 = mul i32 %88, %94
%96 = zext i32 %95 to i64
%97 = getelementptr inbounds i8, ptr %93, i64 %96
%98 = mul i32 %69, %94
%99 = zext i32 %98 to i64
%100 = getelementptr inbounds i8, ptr %1, i64 %99
%101 = tail call i32 @memcpy(ptr noundef %97, ptr noundef nonnull %100, i32 noundef %89) #3
%102 = add nuw nsw i64 %92, 1
%103 = icmp eq i64 %102, %90
br i1 %103, label %107, label %91, !llvm.loop !23
104: ; preds = %84
%105 = shl i32 %72, 2
%106 = tail call i32 @conv_rgb565_argb8888(ptr noundef nonnull %81, ptr noundef nonnull %1, i32 noundef %71, i32 noundef %70, i32 noundef %105, i32 noundef %69) #3
br label %107
107: ; preds = %91, %85, %84, %104
%108 = load ptr, ptr @gl1_video_buf, align 8, !tbaa !22
br label %109
109: ; preds = %107, %68
%110 = phi ptr [ %108, %107 ], [ null, %68 ]
%111 = getelementptr inbounds i8, ptr %0, i64 4
%112 = load i32, ptr %111, align 4, !tbaa !25
%113 = icmp eq i32 %112, %71
br i1 %113, label %114, label %118
114: ; preds = %109
%115 = getelementptr inbounds i8, ptr %0, i64 8
%116 = load i32, ptr %115, align 8, !tbaa !26
%117 = icmp eq i32 %116, %70
br i1 %117, label %120, label %118
118: ; preds = %114, %109
store i32 %71, ptr %111, align 4, !tbaa !25
%119 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %70, ptr %119, align 8, !tbaa !26
br label %120
120: ; preds = %118, %114
%121 = call i32 @video_context_driver_get_video_size(ptr noundef nonnull %9) #3
%122 = getelementptr inbounds i8, ptr %0, i64 12
%123 = load <2 x i32>, ptr %9, align 8, !tbaa !6
store <2 x i32> %123, ptr %122, align 4, !tbaa !6
%124 = icmp ne ptr %110, null
%125 = select i1 %80, i1 %124, i1 false
br i1 %125, label %126, label %130
126: ; preds = %120
%127 = getelementptr inbounds i8, ptr %0, i64 80
%128 = load i32, ptr %127, align 8, !tbaa !27
%129 = call i32 @draw_tex(ptr noundef nonnull %0, i32 noundef %72, i32 noundef %73, i32 noundef %71, i32 noundef %70, i32 noundef %128, ptr noundef nonnull %110) #3
br label %130
130: ; preds = %126, %120
%131 = load i64, ptr @gl1_menu_frame, align 8, !tbaa !28
%132 = icmp eq i64 %131, 0
br i1 %132, label %194, label %133
133: ; preds = %130
%134 = getelementptr inbounds i8, ptr %7, i64 112
%135 = load i64, ptr %134, align 8, !tbaa !29
%136 = icmp eq i64 %135, 0
br i1 %136, label %194, label %137
137: ; preds = %133
%138 = load i32, ptr @gl1_menu_width, align 4, !tbaa !6
%139 = load i32, ptr @gl1_menu_height, align 4, !tbaa !6
%140 = load i32, ptr @gl1_menu_pitch, align 4, !tbaa !6
%141 = load i32, ptr @gl1_menu_bits, align 4, !tbaa !6
%142 = call i32 @get_pot(i32 noundef %138) #3
%143 = call i32 @get_pot(i32 noundef %139) #3
%144 = load i32, ptr @gl1_menu_size_changed, align 4, !tbaa !6
%145 = icmp eq i32 %144, 0
br i1 %145, label %151, label %146
146: ; preds = %137
store i32 0, ptr @gl1_menu_size_changed, align 4, !tbaa !6
%147 = load ptr, ptr @gl1_menu_video_buf, align 8, !tbaa !22
%148 = icmp eq ptr %147, null
br i1 %148, label %154, label %149
149: ; preds = %146
%150 = call i32 @free(ptr noundef nonnull %147) #3
store ptr null, ptr @gl1_menu_video_buf, align 8, !tbaa !22
br label %154
151: ; preds = %137
%152 = load ptr, ptr @gl1_menu_video_buf, align 8
%153 = icmp eq ptr %152, null
br i1 %153, label %154, label %159
154: ; preds = %149, %146, %151
%155 = shl i32 %142, 2
%156 = mul i32 %155, %143
%157 = call i64 @malloc(i32 noundef %156) #3
%158 = inttoptr i64 %157 to ptr
store ptr %158, ptr @gl1_menu_video_buf, align 8, !tbaa !22
br label %159
159: ; preds = %154, %151
%160 = phi ptr [ %158, %154 ], [ %152, %151 ]
%161 = icmp eq i32 %141, 16
%162 = icmp ne ptr %160, null
%163 = select i1 %161, i1 %162, i1 false
br i1 %163, label %164, label %194
164: ; preds = %159
%165 = load i64, ptr @gl1_menu_frame, align 8, !tbaa !28
%166 = shl i32 %142, 2
%167 = call i32 @conv_rgba4444_argb8888(ptr noundef nonnull %160, i64 noundef %165, i32 noundef %138, i32 noundef %139, i32 noundef %166, i32 noundef %140) #3
%168 = load ptr, ptr @gl1_menu_video_buf, align 8, !tbaa !22
%169 = getelementptr inbounds i8, ptr %0, i64 72
%170 = load i64, ptr %169, align 8, !tbaa !30
%171 = icmp eq i64 %170, 0
br i1 %171, label %190, label %172
172: ; preds = %164
%173 = getelementptr inbounds i8, ptr %7, i64 108
%174 = load i32, ptr %173, align 4, !tbaa !20
%175 = getelementptr inbounds i8, ptr %7, i64 104
%176 = load i32, ptr %175, align 8, !tbaa !21
%177 = call i32 @glViewport(i32 noundef 0, i32 noundef 0, i32 noundef %174, i32 noundef %176) #3
%178 = getelementptr inbounds i8, ptr %0, i64 48
%179 = load i32, ptr %178, align 8, !tbaa !31
%180 = call i32 @draw_tex(ptr noundef nonnull %0, i32 noundef %142, i32 noundef %143, i32 noundef %138, i32 noundef %139, i32 noundef %179, ptr noundef %168) #3
%181 = getelementptr inbounds i8, ptr %0, i64 52
%182 = getelementptr inbounds i8, ptr %0, i64 64
%183 = load i32, ptr %182, align 4, !tbaa !32
%184 = getelementptr inbounds i8, ptr %0, i64 60
%185 = load i32, ptr %184, align 4, !tbaa !33
%186 = getelementptr inbounds i8, ptr %0, i64 56
%187 = load i32, ptr %186, align 4, !tbaa !34
%188 = load i32, ptr %181, align 4, !tbaa !35
%189 = call i32 @glViewport(i32 noundef %183, i32 noundef %185, i32 noundef %187, i32 noundef %188) #3
br label %194
190: ; preds = %164
%191 = getelementptr inbounds i8, ptr %0, i64 48
%192 = load i32, ptr %191, align 8, !tbaa !31
%193 = call i32 @draw_tex(ptr noundef nonnull %0, i32 noundef %142, i32 noundef %143, i32 noundef %138, i32 noundef %139, i32 noundef %192, ptr noundef %168) #3
br label %194
194: ; preds = %159, %190, %172, %133, %130
%195 = icmp eq ptr %6, null
br i1 %195, label %198, label %196
196: ; preds = %194
%197 = call i32 @font_driver_render_msg(ptr noundef nonnull %7, ptr noundef null, ptr noundef nonnull %6, ptr noundef null) #3
br label %198
198: ; preds = %196, %194
%199 = getelementptr inbounds i8, ptr %7, i64 72
%200 = load ptr, ptr %199, align 8, !tbaa !36
%201 = getelementptr inbounds i8, ptr %7, i64 40
%202 = load i32, ptr %201, align 8, !tbaa !19
%203 = call i32 %200(i32 noundef %202, ptr noundef nonnull %7) #3
%204 = getelementptr inbounds i8, ptr %0, i64 32
%205 = load i64, ptr %204, align 8, !tbaa !37
%206 = icmp eq i64 %205, 0
br i1 %206, label %211, label %207
207: ; preds = %198
%208 = load i32, ptr @GL_RGBA, align 4, !tbaa !6
%209 = load i32, ptr @GL_UNSIGNED_BYTE, align 4, !tbaa !6
%210 = call i32 @gl1_readback(ptr noundef nonnull %0, i32 noundef 4, i32 noundef %208, i32 noundef %209, i64 noundef %205) #3
br label %211
211: ; preds = %207, %198
%212 = getelementptr inbounds i8, ptr %7, i64 64
%213 = load i64, ptr %212, align 8, !tbaa !38
%214 = icmp eq i64 %213, 0
br i1 %214, label %234, label %215
215: ; preds = %211
%216 = getelementptr inbounds i8, ptr %7, i64 24
%217 = load i32, ptr %216, align 8, !tbaa !39
%218 = icmp eq i32 %217, 0
br i1 %218, label %219, label %234
219: ; preds = %215
%220 = getelementptr inbounds i8, ptr %7, i64 60
%221 = load i32, ptr %220, align 4, !tbaa !40
%222 = icmp eq i32 %221, 0
br i1 %222, label %223, label %234
223: ; preds = %219
%224 = getelementptr inbounds i8, ptr %7, i64 56
%225 = load i32, ptr %224, align 8, !tbaa !41
%226 = icmp eq i32 %225, 0
br i1 %226, label %227, label %234
227: ; preds = %223
%228 = getelementptr inbounds i8, ptr %7, i64 48
%229 = load ptr, ptr %228, align 8, !tbaa !42
%230 = load i32, ptr %201, align 8, !tbaa !19
%231 = call i32 %229(i32 noundef %230, ptr noundef nonnull %7) #3
%232 = load i32, ptr @GL_COLOR_BUFFER_BIT, align 4, !tbaa !6
%233 = call i32 @glClear(i32 noundef %232) #3
br label %234
234: ; preds = %227, %223, %219, %215, %211
%235 = getelementptr inbounds i8, ptr %7, i64 48
%236 = load ptr, ptr %235, align 8, !tbaa !42
%237 = load i32, ptr %201, align 8, !tbaa !19
%238 = call i32 %236(i32 noundef %237, ptr noundef nonnull %7) #3
%239 = getelementptr inbounds i8, ptr %7, i64 32
%240 = load i64, ptr %239, align 8, !tbaa !43
%241 = icmp eq i64 %240, 0
br i1 %241, label %254, label %242
242: ; preds = %234
%243 = getelementptr inbounds i8, ptr %7, i64 24
%244 = load i32, ptr %243, align 8, !tbaa !39
%245 = icmp eq i32 %244, 0
br i1 %245, label %246, label %254
246: ; preds = %242
%247 = getelementptr inbounds i8, ptr %0, i64 24
%248 = load i64, ptr %247, align 8, !tbaa !44
%249 = icmp eq i64 %248, 0
br i1 %249, label %250, label %254
250: ; preds = %246
%251 = load i32, ptr @GL_COLOR_BUFFER_BIT, align 4, !tbaa !6
%252 = call i32 @glClear(i32 noundef %251) #3
%253 = call i32 @glFinish() #3
br label %254
254: ; preds = %250, %246, %242, %234
%255 = call i32 @gl1_context_bind_hw_render(ptr noundef nonnull %0, i32 noundef 1) #3
br label %256
256: ; preds = %8, %254
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @gl1_context_bind_hw_render(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @gl1_gfx_set_viewport(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @glClearColor(float noundef, float noundef, float noundef, float noundef) local_unnamed_addr #2
declare i32 @glClear(i32 noundef) local_unnamed_addr #2
declare i32 @glEnable(i32 noundef) local_unnamed_addr #2
declare i32 @glBlendFunc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_pot(i32 noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef) local_unnamed_addr #2
declare i64 @malloc(i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @conv_rgb565_argb8888(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @video_context_driver_get_video_size(ptr noundef) local_unnamed_addr #2
declare i32 @draw_tex(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @conv_rgba4444_argb8888(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @glViewport(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @font_driver_render_msg(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @gl1_readback(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @glFinish(...) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_21__", !7, i64 0, !12, i64 8, !12, i64 16, !7, i64 24, !13, i64 32, !7, i64 40, !12, i64 48, !7, i64 56, !7, i64 60, !13, i64 64, !12, i64 72, !13, i64 80, !7, i64 88, !13, i64 96, !7, i64 104, !7, i64 108, !13, i64 112, !12, i64 120, !13, i64 128}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !13, i64 128}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_22__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !7, i64 48, !17, i64 52, !13, i64 72, !7, i64 80}
!17 = !{!"TYPE_20__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!18 = !{!11, !12, i64 120}
!19 = !{!11, !7, i64 40}
!20 = !{!11, !7, i64 108}
!21 = !{!11, !7, i64 104}
!22 = !{!12, !12, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!16, !7, i64 4}
!26 = !{!16, !7, i64 8}
!27 = !{!16, !7, i64 80}
!28 = !{!13, !13, i64 0}
!29 = !{!11, !13, i64 112}
!30 = !{!16, !13, i64 72}
!31 = !{!16, !7, i64 48}
!32 = !{!16, !7, i64 64}
!33 = !{!16, !7, i64 60}
!34 = !{!16, !7, i64 56}
!35 = !{!16, !7, i64 52}
!36 = !{!11, !12, i64 72}
!37 = !{!16, !13, i64 32}
!38 = !{!11, !13, i64 64}
!39 = !{!11, !7, i64 24}
!40 = !{!11, !7, i64 60}
!41 = !{!11, !7, i64 56}
!42 = !{!11, !12, i64 48}
!43 = !{!11, !13, i64 32}
!44 = !{!16, !13, i64 24}
| RetroArch_gfx_drivers_extr_gl1.c_gl1_gfx_frame |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/fuse/extr_inode.c_sanitize_global_limit.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/fuse/extr_inode.c_sanitize_global_limit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@num_physpages = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sanitize_global_limit], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @sanitize_global_limit(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i32, ptr @num_physpages, align 4, !tbaa !5
%6 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !5
%7 = shl i32 %5, %6
%8 = ashr i32 %7, 15
store i32 %8, ptr %0, align 4, !tbaa !5
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ %8, %4 ], [ %2, %1 ]
%11 = icmp ugt i32 %10, 65535
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 65535, ptr %0, align 4, !tbaa !5
br label %13
13: ; preds = %12, %9
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/fuse/extr_inode.c_sanitize_global_limit.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/fuse/extr_inode.c_sanitize_global_limit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@num_physpages = common local_unnamed_addr global i32 0, align 4
@PAGE_SHIFT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sanitize_global_limit], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @sanitize_global_limit(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i32, ptr @num_physpages, align 4, !tbaa !6
%6 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !6
%7 = shl i32 %5, %6
%8 = ashr i32 %7, 15
store i32 %8, ptr %0, align 4, !tbaa !6
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ %8, %4 ], [ %2, %1 ]
%11 = icmp ugt i32 %10, 65535
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 65535, ptr %0, align 4, !tbaa !6
br label %13
13: ; preds = %12, %9
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_fs_fuse_extr_inode.c_sanitize_global_limit |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_std.c_tape_std_assign.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_std.c_tape_std_assign.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.timer_list = type { i64, i64, i32 }
%struct.tape_request = type { i64, i32, i32 }
@TO_ASSIGN = dso_local local_unnamed_addr global i32 0, align 4
@ASSIGN = dso_local local_unnamed_addr global i32 0, align 4
@NOP = dso_local local_unnamed_addr global i32 0, align 4
@tape_std_assign_timeout = dso_local local_unnamed_addr global i32 0, align 4
@jiffies = dso_local local_unnamed_addr global i64 0, align 8
@HZ = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"%08x: assign failed - device might be busy\0A\00", align 1
@.str.1 = private unnamed_addr constant [21 x i8] c"%08x: Tape assigned\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @tape_std_assign(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.timer_list, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%3 = tail call ptr @tape_alloc_request(i32 noundef 2, i32 noundef 11) #3
%4 = tail call i64 @IS_ERR(ptr noundef %3) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @PTR_ERR(ptr noundef %3) #3
br label %38
8: ; preds = %1
%9 = load i32, ptr @TO_ASSIGN, align 4, !tbaa !5
%10 = getelementptr inbounds %struct.tape_request, ptr %3, i64 0, i32 2
store i32 %9, ptr %10, align 4, !tbaa !9
%11 = load i64, ptr %3, align 8, !tbaa !12
%12 = load i32, ptr @ASSIGN, align 4, !tbaa !5
%13 = getelementptr inbounds %struct.tape_request, ptr %3, i64 0, i32 1
%14 = load i32, ptr %13, align 8, !tbaa !13
%15 = tail call i32 @tape_ccw_cc(i64 noundef %11, i32 noundef %12, i32 noundef 11, i32 noundef %14) #3
%16 = load i64, ptr %3, align 8, !tbaa !12
%17 = add nsw i64 %16, 1
%18 = load i32, ptr @NOP, align 4, !tbaa !5
%19 = tail call i32 @tape_ccw_end(i64 noundef %17, i32 noundef %18, i32 noundef 0, ptr noundef null) #3
%20 = call i32 @init_timer_on_stack(ptr noundef nonnull %2) #3
%21 = load i32, ptr @tape_std_assign_timeout, align 4, !tbaa !5
%22 = getelementptr inbounds %struct.timer_list, ptr %2, i64 0, i32 2
store i32 %21, ptr %22, align 8, !tbaa !14
%23 = ptrtoint ptr %3 to i64
store i64 %23, ptr %2, align 8, !tbaa !16
%24 = load i64, ptr @jiffies, align 8, !tbaa !17
%25 = load i32, ptr @HZ, align 4, !tbaa !5
%26 = shl nsw i32 %25, 1
%27 = sext i32 %26 to i64
%28 = add nsw i64 %24, %27
%29 = getelementptr inbounds %struct.timer_list, ptr %2, i64 0, i32 1
store i64 %28, ptr %29, align 8, !tbaa !18
%30 = call i32 @add_timer(ptr noundef nonnull %2) #3
%31 = call i32 @tape_do_io_interruptible(ptr noundef %0, ptr noundef nonnull %3) #3
%32 = call i32 @del_timer(ptr noundef nonnull %2) #3
%33 = icmp eq i32 %31, 0
%34 = load i32, ptr %0, align 4, !tbaa !19
%35 = select i1 %33, ptr @.str.1, ptr @.str
%36 = call i32 @DBF_EVENT(i32 noundef 3, ptr noundef nonnull %35, i32 noundef %34) #3
%37 = call i32 @tape_free_request(ptr noundef nonnull %3) #3
br label %38
38: ; preds = %8, %6
%39 = phi i32 [ %7, %6 ], [ %31, %8 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @tape_alloc_request(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @tape_ccw_cc(i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tape_ccw_end(i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @init_timer_on_stack(ptr noundef) local_unnamed_addr #2
declare i32 @add_timer(ptr noundef) local_unnamed_addr #2
declare i32 @tape_do_io_interruptible(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @del_timer(ptr noundef) local_unnamed_addr #2
declare i32 @DBF_EVENT(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tape_free_request(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"tape_request", !11, i64 0, !6, i64 8, !6, i64 12}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!10, !6, i64 8}
!14 = !{!15, !6, i64 16}
!15 = !{!"timer_list", !11, i64 0, !11, i64 8, !6, i64 16}
!16 = !{!15, !11, i64 0}
!17 = !{!11, !11, i64 0}
!18 = !{!15, !11, i64 8}
!19 = !{!20, !6, i64 0}
!20 = !{!"tape_device", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_std.c_tape_std_assign.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_std.c_tape_std_assign.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.timer_list = type { i64, i64, i32 }
@TO_ASSIGN = common local_unnamed_addr global i32 0, align 4
@ASSIGN = common local_unnamed_addr global i32 0, align 4
@NOP = common local_unnamed_addr global i32 0, align 4
@tape_std_assign_timeout = common local_unnamed_addr global i32 0, align 4
@jiffies = common local_unnamed_addr global i64 0, align 8
@HZ = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"%08x: assign failed - device might be busy\0A\00", align 1
@.str.1 = private unnamed_addr constant [21 x i8] c"%08x: Tape assigned\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @tape_std_assign(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.timer_list, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #3
%3 = tail call ptr @tape_alloc_request(i32 noundef 2, i32 noundef 11) #3
%4 = tail call i64 @IS_ERR(ptr noundef %3) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @PTR_ERR(ptr noundef %3) #3
br label %38
8: ; preds = %1
%9 = load i32, ptr @TO_ASSIGN, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %3, i64 12
store i32 %9, ptr %10, align 4, !tbaa !10
%11 = load i64, ptr %3, align 8, !tbaa !13
%12 = load i32, ptr @ASSIGN, align 4, !tbaa !6
%13 = getelementptr inbounds i8, ptr %3, i64 8
%14 = load i32, ptr %13, align 8, !tbaa !14
%15 = tail call i32 @tape_ccw_cc(i64 noundef %11, i32 noundef %12, i32 noundef 11, i32 noundef %14) #3
%16 = load i64, ptr %3, align 8, !tbaa !13
%17 = add nsw i64 %16, 1
%18 = load i32, ptr @NOP, align 4, !tbaa !6
%19 = tail call i32 @tape_ccw_end(i64 noundef %17, i32 noundef %18, i32 noundef 0, ptr noundef null) #3
%20 = call i32 @init_timer_on_stack(ptr noundef nonnull %2) #3
%21 = load i32, ptr @tape_std_assign_timeout, align 4, !tbaa !6
%22 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %21, ptr %22, align 8, !tbaa !15
%23 = ptrtoint ptr %3 to i64
store i64 %23, ptr %2, align 8, !tbaa !17
%24 = load i64, ptr @jiffies, align 8, !tbaa !18
%25 = load i32, ptr @HZ, align 4, !tbaa !6
%26 = shl nsw i32 %25, 1
%27 = sext i32 %26 to i64
%28 = add nsw i64 %24, %27
%29 = getelementptr inbounds i8, ptr %2, i64 8
store i64 %28, ptr %29, align 8, !tbaa !19
%30 = call i32 @add_timer(ptr noundef nonnull %2) #3
%31 = call i32 @tape_do_io_interruptible(ptr noundef %0, ptr noundef nonnull %3) #3
%32 = call i32 @del_timer(ptr noundef nonnull %2) #3
%33 = icmp eq i32 %31, 0
%34 = load i32, ptr %0, align 4, !tbaa !20
%35 = select i1 %33, ptr @.str.1, ptr @.str
%36 = call i32 @DBF_EVENT(i32 noundef 3, ptr noundef nonnull %35, i32 noundef %34) #3
%37 = call i32 @tape_free_request(ptr noundef nonnull %3) #3
br label %38
38: ; preds = %8, %6
%39 = phi i32 [ %7, %6 ], [ %31, %8 ]
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @tape_alloc_request(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @tape_ccw_cc(i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tape_ccw_end(i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @init_timer_on_stack(ptr noundef) local_unnamed_addr #2
declare i32 @add_timer(ptr noundef) local_unnamed_addr #2
declare i32 @tape_do_io_interruptible(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @del_timer(ptr noundef) local_unnamed_addr #2
declare i32 @DBF_EVENT(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @tape_free_request(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 12}
!11 = !{!"tape_request", !12, i64 0, !7, i64 8, !7, i64 12}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 0}
!14 = !{!11, !7, i64 8}
!15 = !{!16, !7, i64 16}
!16 = !{!"timer_list", !12, i64 0, !12, i64 8, !7, i64 16}
!17 = !{!16, !12, i64 0}
!18 = !{!12, !12, i64 0}
!19 = !{!16, !12, i64 8}
!20 = !{!21, !7, i64 0}
!21 = !{!"tape_device", !7, i64 0}
| fastsocket_kernel_drivers_s390_char_extr_tape_std.c_tape_std_assign |
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_focus.c'
source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_focus.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @gl1_gfx_focus], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @gl1_gfx_focus(ptr nocapture readnone %0) #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_focus.c'
source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_gl1.c_gl1_gfx_focus.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @gl1_gfx_focus], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @gl1_gfx_focus(ptr nocapture readnone %0) #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| RetroArch_gfx_drivers_extr_gl1.c_gl1_gfx_focus |
; ModuleID = 'AnghaBench/linux/arch/hexagon/kernel/extr_stacktrace.c_save_stack_trace.c'
source_filename = "AnghaBench/linux/arch/hexagon/kernel/extr_stacktrace.c_save_stack_trace.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.stack_trace = type { i32, i64, i64, ptr }
%struct.stackframe = type { i64, i32 }
@current = dso_local local_unnamed_addr global i32 0, align 4
@THREAD_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@current_frame_pointer = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @save_stack_trace(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr @current, align 4, !tbaa !12
%4 = tail call i64 @task_stack_page(i32 noundef %3) #2
%5 = load i64, ptr @THREAD_SIZE, align 8, !tbaa !13
%6 = add i64 %4, -16
%7 = add i64 %6, %5
%8 = load i64, ptr @current_frame_pointer, align 8, !tbaa !13
%9 = icmp uge i64 %8, %4
%10 = icmp ule i64 %8, %7
%11 = select i1 %9, i1 %10, i1 false
br i1 %11, label %12, label %39
12: ; preds = %1
%13 = getelementptr inbounds %struct.stack_trace, ptr %0, i64 0, i32 3
%14 = getelementptr inbounds %struct.stack_trace, ptr %0, i64 0, i32 1
%15 = getelementptr inbounds %struct.stack_trace, ptr %0, i64 0, i32 2
br label %16
16: ; preds = %12, %32
%17 = phi i64 [ %8, %12 ], [ %35, %32 ]
%18 = phi i32 [ %2, %12 ], [ %33, %32 ]
%19 = inttoptr i64 %17 to ptr
%20 = icmp eq i32 %18, 0
br i1 %20, label %23, label %21
21: ; preds = %16
%22 = add nsw i32 %18, -1
br label %32
23: ; preds = %16
%24 = getelementptr inbounds %struct.stackframe, ptr %19, i64 0, i32 1
%25 = load i32, ptr %24, align 8, !tbaa !14
%26 = load ptr, ptr %13, align 8, !tbaa !16
%27 = load i64, ptr %14, align 8, !tbaa !17
%28 = add nsw i64 %27, 1
store i64 %28, ptr %14, align 8, !tbaa !17
%29 = getelementptr inbounds i32, ptr %26, i64 %27
store i32 %25, ptr %29, align 4, !tbaa !12
%30 = load i64, ptr %15, align 8, !tbaa !18
%31 = icmp slt i64 %28, %30
br i1 %31, label %32, label %39
32: ; preds = %23, %21
%33 = phi i32 [ %22, %21 ], [ 0, %23 ]
%34 = add i64 %17, 16
%35 = load i64, ptr %19, align 8, !tbaa !13
%36 = icmp uge i64 %35, %34
%37 = icmp ule i64 %35, %7
%38 = select i1 %36, i1 %37, i1 false
br i1 %38, label %16, label %39, !llvm.loop !19
39: ; preds = %32, %23, %1
ret void
}
declare i64 @task_stack_page(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"stack_trace", !7, i64 0, !10, i64 8, !10, i64 16, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}
!14 = !{!15, !7, i64 8}
!15 = !{!"stackframe", !10, i64 0, !7, i64 8}
!16 = !{!6, !11, i64 24}
!17 = !{!6, !10, i64 8}
!18 = !{!6, !10, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/arch/hexagon/kernel/extr_stacktrace.c_save_stack_trace.c'
source_filename = "AnghaBench/linux/arch/hexagon/kernel/extr_stacktrace.c_save_stack_trace.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global i32 0, align 4
@THREAD_SIZE = common local_unnamed_addr global i64 0, align 8
@current_frame_pointer = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @save_stack_trace(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @current, align 4, !tbaa !13
%4 = tail call i64 @task_stack_page(i32 noundef %3) #2
%5 = load i64, ptr @THREAD_SIZE, align 8, !tbaa !14
%6 = add i64 %4, -16
%7 = add i64 %6, %5
%8 = load i64, ptr @current_frame_pointer, align 8, !tbaa !14
%9 = icmp uge i64 %8, %4
%10 = icmp ule i64 %8, %7
%11 = select i1 %9, i1 %10, i1 false
br i1 %11, label %12, label %39
12: ; preds = %1
%13 = getelementptr inbounds i8, ptr %0, i64 24
%14 = getelementptr inbounds i8, ptr %0, i64 8
%15 = getelementptr inbounds i8, ptr %0, i64 16
br label %16
16: ; preds = %12, %32
%17 = phi i64 [ %8, %12 ], [ %35, %32 ]
%18 = phi i32 [ %2, %12 ], [ %33, %32 ]
%19 = inttoptr i64 %17 to ptr
%20 = icmp eq i32 %18, 0
br i1 %20, label %23, label %21
21: ; preds = %16
%22 = add nsw i32 %18, -1
br label %32
23: ; preds = %16
%24 = getelementptr inbounds i8, ptr %19, i64 8
%25 = load i32, ptr %24, align 8, !tbaa !15
%26 = load ptr, ptr %13, align 8, !tbaa !17
%27 = load i64, ptr %14, align 8, !tbaa !18
%28 = add nsw i64 %27, 1
store i64 %28, ptr %14, align 8, !tbaa !18
%29 = getelementptr inbounds i32, ptr %26, i64 %27
store i32 %25, ptr %29, align 4, !tbaa !13
%30 = load i64, ptr %15, align 8, !tbaa !19
%31 = icmp slt i64 %28, %30
br i1 %31, label %32, label %39
32: ; preds = %23, %21
%33 = phi i32 [ %22, %21 ], [ 0, %23 ]
%34 = add i64 %17, 16
%35 = load i64, ptr %19, align 8, !tbaa !14
%36 = icmp uge i64 %35, %34
%37 = icmp ule i64 %35, %7
%38 = select i1 %36, i1 %37, i1 false
br i1 %38, label %16, label %39, !llvm.loop !20
39: ; preds = %32, %23, %1
ret void
}
declare i64 @task_stack_page(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"stack_trace", !8, i64 0, !11, i64 8, !11, i64 16, !12, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !8, i64 8}
!16 = !{!"stackframe", !11, i64 0, !8, i64 8}
!17 = !{!7, !12, i64 24}
!18 = !{!7, !11, i64 8}
!19 = !{!7, !11, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| linux_arch_hexagon_kernel_extr_stacktrace.c_save_stack_trace |
; ModuleID = 'AnghaBench/reactos/drivers/bus/acpi/acpica/namespace/extr_nsnames.c_AcpiNsGetExternalPathname.c'
source_filename = "AnghaBench/reactos/drivers/bus/acpi/acpica/namespace/extr_nsnames.c_AcpiNsGetExternalPathname.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NsGetExternalPathname = dso_local local_unnamed_addr global i32 0, align 4
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noalias ptr @AcpiNsGetExternalPathname(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @NsGetExternalPathname, align 4, !tbaa !5
%3 = tail call i32 @ACPI_FUNCTION_TRACE_PTR(i32 noundef %2, ptr noundef %0) #2
%4 = load i32, ptr @FALSE, align 4, !tbaa !5
%5 = tail call ptr @AcpiNsGetNormalizedPathname(ptr noundef %0, i32 noundef %4) #2
%6 = tail call i32 @return_PTR(ptr noundef %5) #2
ret ptr undef
}
declare i32 @ACPI_FUNCTION_TRACE_PTR(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @AcpiNsGetNormalizedPathname(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @return_PTR(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/reactos/drivers/bus/acpi/acpica/namespace/extr_nsnames.c_AcpiNsGetExternalPathname.c'
source_filename = "AnghaBench/reactos/drivers/bus/acpi/acpica/namespace/extr_nsnames.c_AcpiNsGetExternalPathname.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NsGetExternalPathname = common local_unnamed_addr global i32 0, align 4
@FALSE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noalias ptr @AcpiNsGetExternalPathname(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @NsGetExternalPathname, align 4, !tbaa !6
%3 = tail call i32 @ACPI_FUNCTION_TRACE_PTR(i32 noundef %2, ptr noundef %0) #2
%4 = load i32, ptr @FALSE, align 4, !tbaa !6
%5 = tail call ptr @AcpiNsGetNormalizedPathname(ptr noundef %0, i32 noundef %4) #2
%6 = tail call i32 @return_PTR(ptr noundef %5) #2
ret ptr undef
}
declare i32 @ACPI_FUNCTION_TRACE_PTR(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @AcpiNsGetNormalizedPathname(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @return_PTR(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| reactos_drivers_bus_acpi_acpica_namespace_extr_nsnames.c_AcpiNsGetExternalPathname |
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/hal/extr_HalBtc8723b2Ant.c_EXhalbtc8723b2ant_ConnectNotify.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/hal/extr_HalBtc8723b2Ant.c_EXhalbtc8723b2ant_ConnectNotify.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BTC_ASSOCIATE_START = dso_local local_unnamed_addr global i64 0, align 8
@BTC_MSG_INTERFACE = dso_local local_unnamed_addr global i32 0, align 4
@INTF_NOTIFY = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"[BTCoex], CONNECT START notify\0A\00", align 1
@BTC_ASSOCIATE_FINISH = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [33 x i8] c"[BTCoex], CONNECT FINISH notify\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @EXhalbtc8723b2ant_ConnectNotify(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr @BTC_ASSOCIATE_START, align 8, !tbaa !5
%4 = icmp eq i64 %3, %1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load i64, ptr @BTC_ASSOCIATE_FINISH, align 8, !tbaa !5
%7 = icmp eq i64 %6, %1
br i1 %7, label %8, label %13
8: ; preds = %5, %2
%9 = phi ptr [ @.str, %2 ], [ @.str.1, %5 ]
%10 = load i32, ptr @BTC_MSG_INTERFACE, align 4, !tbaa !9
%11 = load i32, ptr @INTF_NOTIFY, align 4, !tbaa !9
%12 = tail call i32 @BTC_PRINT(i32 noundef %10, i32 noundef %11, ptr noundef nonnull %9) #2
br label %13
13: ; preds = %8, %5
ret void
}
declare i32 @BTC_PRINT(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/hal/extr_HalBtc8723b2Ant.c_EXhalbtc8723b2ant_ConnectNotify.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/hal/extr_HalBtc8723b2Ant.c_EXhalbtc8723b2ant_ConnectNotify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BTC_ASSOCIATE_START = common local_unnamed_addr global i64 0, align 8
@BTC_MSG_INTERFACE = common local_unnamed_addr global i32 0, align 4
@INTF_NOTIFY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"[BTCoex], CONNECT START notify\0A\00", align 1
@BTC_ASSOCIATE_FINISH = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [33 x i8] c"[BTCoex], CONNECT FINISH notify\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @EXhalbtc8723b2ant_ConnectNotify(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr @BTC_ASSOCIATE_START, align 8, !tbaa !6
%4 = icmp eq i64 %3, %1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load i64, ptr @BTC_ASSOCIATE_FINISH, align 8, !tbaa !6
%7 = icmp eq i64 %6, %1
br i1 %7, label %8, label %13
8: ; preds = %5, %2
%9 = phi ptr [ @.str, %2 ], [ @.str.1, %5 ]
%10 = load i32, ptr @BTC_MSG_INTERFACE, align 4, !tbaa !10
%11 = load i32, ptr @INTF_NOTIFY, align 4, !tbaa !10
%12 = tail call i32 @BTC_PRINT(i32 noundef %10, i32 noundef %11, ptr noundef nonnull %9) #2
br label %13
13: ; preds = %8, %5
ret void
}
declare i32 @BTC_PRINT(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| linux_drivers_staging_rtl8723bs_hal_extr_HalBtc8723b2Ant.c_EXhalbtc8723b2ant_ConnectNotify |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/mlx4/extr_cmd.c_mlx4_cmd_event.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/mlx4/extr_cmd.c_mlx4_cmd_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64, ptr }
%struct.mlx4_cmd_context = type { i64, i32, i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @mlx4_cmd_event(ptr noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @mlx4_priv(ptr noundef %0) #2
%6 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load i64, ptr %5, align 8, !tbaa !12
%9 = and i64 %8, %1
%10 = getelementptr inbounds %struct.mlx4_cmd_context, ptr %7, i64 %9
%11 = load i64, ptr %10, align 8, !tbaa !13
%12 = icmp eq i64 %11, %1
br i1 %12, label %13, label %20
13: ; preds = %4
%14 = getelementptr inbounds %struct.mlx4_cmd_context, ptr %7, i64 %9, i32 4
store i32 %2, ptr %14, align 4, !tbaa !16
%15 = tail call i32 @mlx4_status_to_errno(i32 noundef %2) #2
%16 = getelementptr inbounds %struct.mlx4_cmd_context, ptr %7, i64 %9, i32 3
store i32 %15, ptr %16, align 8, !tbaa !17
%17 = getelementptr inbounds %struct.mlx4_cmd_context, ptr %7, i64 %9, i32 2
store i32 %3, ptr %17, align 4, !tbaa !18
%18 = getelementptr inbounds %struct.mlx4_cmd_context, ptr %7, i64 %9, i32 1
%19 = tail call i32 @complete(ptr noundef nonnull %18) #2
br label %20
20: ; preds = %4, %13
ret void
}
declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1
declare i32 @mlx4_status_to_errno(i32 noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"mlx4_priv", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"mlx4_cmd_context", !8, i64 0, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20}
!15 = !{!"int", !9, i64 0}
!16 = !{!14, !15, i64 20}
!17 = !{!14, !15, i64 16}
!18 = !{!14, !15, i64 12}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/mlx4/extr_cmd.c_mlx4_cmd_event.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/mlx4/extr_cmd.c_mlx4_cmd_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.mlx4_cmd_context = type { i64, i32, i32, i32, i32 }
; Function Attrs: nounwind ssp uwtable(sync)
define void @mlx4_cmd_event(ptr noundef %0, i64 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @mlx4_priv(ptr noundef %0) #2
%6 = getelementptr inbounds i8, ptr %5, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load i64, ptr %5, align 8, !tbaa !13
%9 = and i64 %8, %1
%10 = getelementptr inbounds %struct.mlx4_cmd_context, ptr %7, i64 %9
%11 = load i64, ptr %10, align 8, !tbaa !14
%12 = icmp eq i64 %11, %1
br i1 %12, label %13, label %20
13: ; preds = %4
%14 = getelementptr inbounds i8, ptr %10, i64 20
store i32 %2, ptr %14, align 4, !tbaa !17
%15 = tail call i32 @mlx4_status_to_errno(i32 noundef %2) #2
%16 = getelementptr inbounds i8, ptr %10, i64 16
store i32 %15, ptr %16, align 8, !tbaa !18
%17 = getelementptr inbounds i8, ptr %10, i64 12
store i32 %3, ptr %17, align 4, !tbaa !19
%18 = getelementptr inbounds i8, ptr %10, i64 8
%19 = tail call i32 @complete(ptr noundef nonnull %18) #2
br label %20
20: ; preds = %4, %13
ret void
}
declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1
declare i32 @mlx4_status_to_errno(i32 noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"mlx4_priv", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !12, i64 8}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !9, i64 0}
!14 = !{!15, !9, i64 0}
!15 = !{!"mlx4_cmd_context", !9, i64 0, !16, i64 8, !16, i64 12, !16, i64 16, !16, i64 20}
!16 = !{!"int", !10, i64 0}
!17 = !{!15, !16, i64 20}
!18 = !{!15, !16, i64 16}
!19 = !{!15, !16, i64 12}
| fastsocket_kernel_drivers_net_mlx4_extr_cmd.c_mlx4_cmd_event |
; ModuleID = 'AnghaBench/linux/samples/bpf/extr_xdp_redirect_cpu_user.c_usage.c'
source_filename = "AnghaBench/linux/samples/bpf/extr_xdp_redirect_cpu_user.c_usage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr, ptr, i32 }
@.str = private unnamed_addr constant [20 x i8] c"\0ADOCUMENTATION:\0A%s\0A\00", align 1
@__doc__ = dso_local local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [32 x i8] c" Usage: %s (options-see-below)\0A\00", align 1
@long_options = dso_local local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [9 x i8] c" --%-12s\00", align 1
@.str.5 = private unnamed_addr constant [26 x i8] c" flag (internal value:%d)\00", align 1
@.str.6 = private unnamed_addr constant [19 x i8] c" short-option: -%c\00", align 1
@str = private unnamed_addr constant [18 x i8] c" Listing options:\00", align 1
@str.8 = private unnamed_addr constant [38 x i8] c"\0A Programs to be used for --progname:\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @usage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @usage(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @__doc__, align 8, !tbaa !5
%4 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef %3)
%5 = tail call i32 @putchar(i32 10)
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, ptr noundef %6)
%8 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str)
%9 = load ptr, ptr @long_options, align 8, !tbaa !5
%10 = load ptr, ptr %9, align 8, !tbaa !9
%11 = icmp eq ptr %10, null
br i1 %11, label %34, label %12
12: ; preds = %2, %27
%13 = phi i64 [ %29, %27 ], [ 0, %2 ]
%14 = phi ptr [ %32, %27 ], [ %10, %2 ]
%15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, ptr noundef nonnull %14)
%16 = load ptr, ptr @long_options, align 8, !tbaa !5
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %13, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !12
%19 = icmp eq ptr %18, null
br i1 %19, label %23, label %20
20: ; preds = %12
%21 = load i32, ptr %18, align 4, !tbaa !13
%22 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %21)
br label %27
23: ; preds = %12
%24 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %13, i32 2
%25 = load i32, ptr %24, align 8, !tbaa !14
%26 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, i32 noundef %25)
br label %27
27: ; preds = %23, %20
%28 = tail call i32 @putchar(i32 10)
%29 = add nuw i64 %13, 1
%30 = load ptr, ptr @long_options, align 8, !tbaa !5
%31 = getelementptr inbounds %struct.TYPE_2__, ptr %30, i64 %29
%32 = load ptr, ptr %31, align 8, !tbaa !9
%33 = icmp eq ptr %32, null
br i1 %33, label %34, label %12, !llvm.loop !15
34: ; preds = %27, %2
%35 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.8)
%36 = tail call i32 @print_avail_progs(ptr noundef %1) #4
%37 = tail call i32 @putchar(i32 10)
ret void
}
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1
declare i32 @print_avail_progs(ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @putchar(i32 noundef) local_unnamed_addr #3
; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0, !6, i64 8, !11, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !11, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/samples/bpf/extr_xdp_redirect_cpu_user.c_usage.c'
source_filename = "AnghaBench/linux/samples/bpf/extr_xdp_redirect_cpu_user.c_usage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr, ptr, i32 }
@.str = private unnamed_addr constant [20 x i8] c"\0ADOCUMENTATION:\0A%s\0A\00", align 1
@__doc__ = common local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [32 x i8] c" Usage: %s (options-see-below)\0A\00", align 1
@long_options = common local_unnamed_addr global ptr null, align 8
@.str.4 = private unnamed_addr constant [9 x i8] c" --%-12s\00", align 1
@.str.5 = private unnamed_addr constant [26 x i8] c" flag (internal value:%d)\00", align 1
@.str.6 = private unnamed_addr constant [19 x i8] c" short-option: -%c\00", align 1
@str = private unnamed_addr constant [18 x i8] c" Listing options:\00", align 1
@str.8 = private unnamed_addr constant [38 x i8] c"\0A Programs to be used for --progname:\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @usage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @usage(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @__doc__, align 8, !tbaa !6
%4 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef %3)
%5 = tail call i32 @putchar(i32 10)
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, ptr noundef %6)
%8 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str)
%9 = load ptr, ptr @long_options, align 8, !tbaa !6
%10 = load ptr, ptr %9, align 8, !tbaa !10
%11 = icmp eq ptr %10, null
br i1 %11, label %35, label %12
12: ; preds = %2, %28
%13 = phi i64 [ %30, %28 ], [ 0, %2 ]
%14 = phi ptr [ %33, %28 ], [ %10, %2 ]
%15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, ptr noundef nonnull %14)
%16 = load ptr, ptr @long_options, align 8, !tbaa !6
%17 = getelementptr inbounds %struct.TYPE_2__, ptr %16, i64 %13
%18 = getelementptr inbounds i8, ptr %17, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = icmp eq ptr %19, null
br i1 %20, label %24, label %21
21: ; preds = %12
%22 = load i32, ptr %19, align 4, !tbaa !14
%23 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %22)
br label %28
24: ; preds = %12
%25 = getelementptr inbounds i8, ptr %17, i64 16
%26 = load i32, ptr %25, align 8, !tbaa !15
%27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6, i32 noundef %26)
br label %28
28: ; preds = %24, %21
%29 = tail call i32 @putchar(i32 10)
%30 = add nuw nsw i64 %13, 1
%31 = load ptr, ptr @long_options, align 8, !tbaa !6
%32 = getelementptr inbounds %struct.TYPE_2__, ptr %31, i64 %30
%33 = load ptr, ptr %32, align 8, !tbaa !10
%34 = icmp eq ptr %33, null
br i1 %34, label %35, label %12, !llvm.loop !16
35: ; preds = %28, %2
%36 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.8)
%37 = tail call i32 @print_avail_progs(ptr noundef %1) #4
%38 = tail call i32 @putchar(i32 10)
ret void
}
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1
declare i32 @print_avail_progs(ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @putchar(i32 noundef) local_unnamed_addr #3
; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0, !7, i64 8, !12, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!11, !12, i64 16}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| linux_samples_bpf_extr_xdp_redirect_cpu_user.c_usage |
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_sshbuf-misc.c_sshbuf_dup_string.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_sshbuf-misc.c_sshbuf_dup_string.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SIZE_MAX = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @sshbuf_dup_string(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @sshbuf_ptr(ptr noundef %0) #3
%3 = tail call i64 @sshbuf_len(ptr noundef %0) #3
%4 = icmp eq ptr %2, null
%5 = load i64, ptr @SIZE_MAX, align 8
%6 = icmp ugt i64 %3, %5
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %30, label %8
8: ; preds = %1
%9 = icmp eq i64 %3, 0
br i1 %9, label %19, label %10
10: ; preds = %8
%11 = tail call ptr @memchr(ptr noundef nonnull %2, i8 noundef signext 0, i64 noundef %3) #3
%12 = icmp eq ptr %11, null
br i1 %12, label %19, label %13
13: ; preds = %10
%14 = getelementptr inbounds i32, ptr %2, i64 %3
%15 = getelementptr inbounds i32, ptr %14, i64 -1
%16 = icmp eq ptr %11, %15
br i1 %16, label %17, label %30
17: ; preds = %13
%18 = add i64 %3, -1
br label %19
19: ; preds = %17, %10, %8
%20 = phi i64 [ %18, %17 ], [ %3, %10 ], [ 0, %8 ]
%21 = add i64 %20, 1
%22 = tail call ptr @malloc(i64 noundef %21)
%23 = icmp eq ptr %22, null
br i1 %23, label %30, label %24
24: ; preds = %19
%25 = icmp eq i64 %20, 0
br i1 %25, label %28, label %26
26: ; preds = %24
%27 = tail call i32 @memcpy(ptr noundef nonnull %22, ptr noundef nonnull %2, i64 noundef %20) #3
br label %28
28: ; preds = %26, %24
%29 = getelementptr inbounds i8, ptr %22, i64 %20
store i8 0, ptr %29, align 1, !tbaa !5
br label %30
30: ; preds = %19, %13, %1, %28
%31 = phi ptr [ %22, %28 ], [ null, %1 ], [ null, %13 ], [ null, %19 ]
ret ptr %31
}
declare ptr @sshbuf_ptr(ptr noundef) local_unnamed_addr #1
declare i64 @sshbuf_len(ptr noundef) local_unnamed_addr #1
declare ptr @memchr(ptr noundef, i8 noundef signext, i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_sshbuf-misc.c_sshbuf_dup_string.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_sshbuf-misc.c_sshbuf_dup_string.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SIZE_MAX = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @sshbuf_dup_string(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @sshbuf_ptr(ptr noundef %0) #3
%3 = tail call i64 @sshbuf_len(ptr noundef %0) #3
%4 = icmp eq ptr %2, null
%5 = load i64, ptr @SIZE_MAX, align 8
%6 = icmp ugt i64 %3, %5
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %30, label %8
8: ; preds = %1
%9 = icmp eq i64 %3, 0
br i1 %9, label %19, label %10
10: ; preds = %8
%11 = tail call ptr @memchr(ptr noundef nonnull %2, i8 noundef signext 0, i64 noundef %3) #3
%12 = icmp eq ptr %11, null
br i1 %12, label %19, label %13
13: ; preds = %10
%14 = getelementptr inbounds i32, ptr %2, i64 %3
%15 = getelementptr inbounds i8, ptr %14, i64 -4
%16 = icmp eq ptr %11, %15
br i1 %16, label %17, label %30
17: ; preds = %13
%18 = add i64 %3, -1
br label %19
19: ; preds = %17, %10, %8
%20 = phi i64 [ %18, %17 ], [ %3, %10 ], [ 0, %8 ]
%21 = add i64 %20, 1
%22 = tail call ptr @malloc(i64 noundef %21)
%23 = icmp eq ptr %22, null
br i1 %23, label %30, label %24
24: ; preds = %19
%25 = icmp eq i64 %20, 0
br i1 %25, label %28, label %26
26: ; preds = %24
%27 = tail call i32 @memcpy(ptr noundef nonnull %22, ptr noundef nonnull %2, i64 noundef %20) #3
br label %28
28: ; preds = %26, %24
%29 = getelementptr inbounds i8, ptr %22, i64 %20
store i8 0, ptr %29, align 1, !tbaa !6
br label %30
30: ; preds = %19, %13, %1, %28
%31 = phi ptr [ %22, %28 ], [ null, %1 ], [ null, %13 ], [ null, %19 ]
ret ptr %31
}
declare ptr @sshbuf_ptr(ptr noundef) local_unnamed_addr #1
declare i64 @sshbuf_len(ptr noundef) local_unnamed_addr #1
declare ptr @memchr(ptr noundef, i8 noundef signext, i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssh_extr_sshbuf-misc.c_sshbuf_dup_string |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_htc_mbox.c_htc_wait_for_ctrl_msg.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_htc_mbox.c_htc_wait_for_ctrl_msg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.htc_packet = type { i64, i64, i64, i32, i32, ptr, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64, i64 }
%struct.htc_frame_hdr = type { i64, i32 }
@HTC_TARGET_RESPONSE_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@ATH6KL_DBG_HTC = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [34 x i8] c"htc rx wait ctrl look_ahead 0x%X\0A\00", align 1
@ENDPOINT_0 = dso_local local_unnamed_addr global i64 0, align 8
@HTC_HDR_LENGTH = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [71 x i8] c"htc_wait_for_ctrl_msg, ath6kl_htc_rx_process_hdr failed (status = %d)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @htc_wait_for_ctrl_msg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @htc_wait_for_ctrl_msg(ptr noundef %0) #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = load i32, ptr @HTC_TARGET_RESPONSE_TIMEOUT, align 4, !tbaa !10
%5 = call i64 @ath6kl_hif_poll_mboxmsg_rx(i32 noundef %3, ptr noundef nonnull %2, i32 noundef %4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %49
7: ; preds = %1
%8 = load i32, ptr @ATH6KL_DBG_HTC, align 4, !tbaa !10
%9 = load i64, ptr %2, align 8, !tbaa !11
%10 = call i32 @ath6kl_dbg(i32 noundef %8, ptr noundef nonnull @.str, i64 noundef %9) #3
%11 = load i64, ptr %2, align 8, !tbaa !13
%12 = load i64, ptr @ENDPOINT_0, align 8, !tbaa !11
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %49
14: ; preds = %7
%15 = call ptr @htc_get_control_buf(ptr noundef nonnull %0, i32 noundef 0) #3
%16 = icmp eq ptr %15, null
br i1 %16, label %49, label %17
17: ; preds = %14
%18 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 6
%19 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 6, i32 0, i32 1
store i64 0, ptr %19, align 8, !tbaa !15
%20 = load i64, ptr %2, align 8, !tbaa !11
store i64 %20, ptr %18, align 8, !tbaa !20
%21 = getelementptr inbounds %struct.htc_frame_hdr, ptr %2, i64 0, i32 1
%22 = load i32, ptr %21, align 8, !tbaa !21
%23 = call i64 @le16_to_cpu(i32 noundef %22) #3
%24 = load i64, ptr @HTC_HDR_LENGTH, align 8, !tbaa !11
%25 = add nsw i64 %24, %23
store i64 %25, ptr %15, align 8, !tbaa !22
%26 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 1
%27 = load i64, ptr %26, align 8, !tbaa !23
%28 = icmp sgt i64 %25, %27
br i1 %28, label %46, label %29
29: ; preds = %17
%30 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 5
store ptr null, ptr %30, align 8, !tbaa !24
%31 = call i64 @ath6kl_htc_rx_packet(ptr noundef nonnull %0, ptr noundef nonnull %15, i64 noundef %25) #3
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %46
33: ; preds = %29
%34 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 2
%35 = load i64, ptr %34, align 8, !tbaa !25
%36 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 4
%37 = load i32, ptr %36, align 4, !tbaa !26
%38 = getelementptr inbounds %struct.htc_packet, ptr %15, i64 0, i32 3
%39 = load i32, ptr %38, align 8, !tbaa !27
%40 = load i64, ptr %15, align 8, !tbaa !22
%41 = call i32 @trace_ath6kl_htc_rx(i64 noundef %35, i32 noundef %37, i32 noundef %39, i64 noundef %40) #3
%42 = call i64 @ath6kl_htc_rx_process_hdr(ptr noundef nonnull %0, ptr noundef nonnull %15, ptr noundef null, ptr noundef null) #3
store i64 %42, ptr %34, align 8, !tbaa !25
%43 = icmp eq i64 %42, 0
br i1 %43, label %49, label %44
44: ; preds = %33
%45 = call i32 @ath6kl_err(ptr noundef nonnull @.str.1, i64 noundef %42) #3
br label %46
46: ; preds = %44, %17, %29
%47 = call i32 @htc_rxpkt_reset(ptr noundef nonnull %15) #3
%48 = call i32 @reclaim_rx_ctrl_buf(ptr noundef nonnull %0, ptr noundef nonnull %15) #3
br label %49
49: ; preds = %33, %14, %7, %1, %46
%50 = phi ptr [ null, %46 ], [ null, %1 ], [ null, %7 ], [ null, %14 ], [ %15, %33 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret ptr %50
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @ath6kl_hif_poll_mboxmsg_rx(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_dbg(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare ptr @htc_get_control_buf(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i64 @ath6kl_htc_rx_packet(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @trace_ath6kl_htc_rx(i64 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ath6kl_htc_rx_process_hdr(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ath6kl_err(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @htc_rxpkt_reset(ptr noundef) local_unnamed_addr #2
declare i32 @reclaim_rx_ctrl_buf(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"htc_target", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"htc_frame_hdr", !12, i64 0, !7, i64 8}
!15 = !{!16, !12, i64 48}
!16 = !{!"htc_packet", !12, i64 0, !12, i64 8, !12, i64 16, !7, i64 24, !7, i64 28, !17, i64 32, !18, i64 40}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!"TYPE_4__", !19, i64 0}
!19 = !{!"TYPE_3__", !12, i64 0, !12, i64 8}
!20 = !{!16, !12, i64 40}
!21 = !{!14, !7, i64 8}
!22 = !{!16, !12, i64 0}
!23 = !{!16, !12, i64 8}
!24 = !{!16, !17, i64 32}
!25 = !{!16, !12, i64 16}
!26 = !{!16, !7, i64 28}
!27 = !{!16, !7, i64 24}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_htc_mbox.c_htc_wait_for_ctrl_msg.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath6kl/extr_htc_mbox.c_htc_wait_for_ctrl_msg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HTC_TARGET_RESPONSE_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@ATH6KL_DBG_HTC = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [34 x i8] c"htc rx wait ctrl look_ahead 0x%X\0A\00", align 1
@ENDPOINT_0 = common local_unnamed_addr global i64 0, align 8
@HTC_HDR_LENGTH = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [71 x i8] c"htc_wait_for_ctrl_msg, ath6kl_htc_rx_process_hdr failed (status = %d)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @htc_wait_for_ctrl_msg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @htc_wait_for_ctrl_msg(ptr noundef %0) #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr @HTC_TARGET_RESPONSE_TIMEOUT, align 4, !tbaa !11
%5 = call i64 @ath6kl_hif_poll_mboxmsg_rx(i32 noundef %3, ptr noundef nonnull %2, i32 noundef %4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %49
7: ; preds = %1
%8 = load i32, ptr @ATH6KL_DBG_HTC, align 4, !tbaa !11
%9 = load i64, ptr %2, align 8, !tbaa !12
%10 = call i32 @ath6kl_dbg(i32 noundef %8, ptr noundef nonnull @.str, i64 noundef %9) #3
%11 = load i64, ptr %2, align 8, !tbaa !14
%12 = load i64, ptr @ENDPOINT_0, align 8, !tbaa !12
%13 = icmp eq i64 %11, %12
br i1 %13, label %14, label %49
14: ; preds = %7
%15 = call ptr @htc_get_control_buf(ptr noundef nonnull %0, i32 noundef 0) #3
%16 = icmp eq ptr %15, null
br i1 %16, label %49, label %17
17: ; preds = %14
%18 = getelementptr inbounds i8, ptr %15, i64 40
%19 = getelementptr inbounds i8, ptr %15, i64 48
store i64 0, ptr %19, align 8, !tbaa !16
%20 = load i64, ptr %2, align 8, !tbaa !12
store i64 %20, ptr %18, align 8, !tbaa !21
%21 = getelementptr inbounds i8, ptr %2, i64 8
%22 = load i32, ptr %21, align 8, !tbaa !22
%23 = call i64 @le16_to_cpu(i32 noundef %22) #3
%24 = load i64, ptr @HTC_HDR_LENGTH, align 8, !tbaa !12
%25 = add nsw i64 %24, %23
store i64 %25, ptr %15, align 8, !tbaa !23
%26 = getelementptr inbounds i8, ptr %15, i64 8
%27 = load i64, ptr %26, align 8, !tbaa !24
%28 = icmp sgt i64 %25, %27
br i1 %28, label %46, label %29
29: ; preds = %17
%30 = getelementptr inbounds i8, ptr %15, i64 32
store ptr null, ptr %30, align 8, !tbaa !25
%31 = call i64 @ath6kl_htc_rx_packet(ptr noundef nonnull %0, ptr noundef nonnull %15, i64 noundef %25) #3
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %46
33: ; preds = %29
%34 = getelementptr inbounds i8, ptr %15, i64 16
%35 = load i64, ptr %34, align 8, !tbaa !26
%36 = getelementptr inbounds i8, ptr %15, i64 28
%37 = load i32, ptr %36, align 4, !tbaa !27
%38 = getelementptr inbounds i8, ptr %15, i64 24
%39 = load i32, ptr %38, align 8, !tbaa !28
%40 = load i64, ptr %15, align 8, !tbaa !23
%41 = call i32 @trace_ath6kl_htc_rx(i64 noundef %35, i32 noundef %37, i32 noundef %39, i64 noundef %40) #3
%42 = call i64 @ath6kl_htc_rx_process_hdr(ptr noundef nonnull %0, ptr noundef nonnull %15, ptr noundef null, ptr noundef null) #3
store i64 %42, ptr %34, align 8, !tbaa !26
%43 = icmp eq i64 %42, 0
br i1 %43, label %49, label %44
44: ; preds = %33
%45 = call i32 @ath6kl_err(ptr noundef nonnull @.str.1, i64 noundef %42) #3
br label %46
46: ; preds = %44, %17, %29
%47 = call i32 @htc_rxpkt_reset(ptr noundef nonnull %15) #3
%48 = call i32 @reclaim_rx_ctrl_buf(ptr noundef nonnull %0, ptr noundef nonnull %15) #3
br label %49
49: ; preds = %33, %14, %7, %1, %46
%50 = phi ptr [ null, %46 ], [ null, %1 ], [ null, %7 ], [ null, %14 ], [ %15, %33 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret ptr %50
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @ath6kl_hif_poll_mboxmsg_rx(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ath6kl_dbg(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare ptr @htc_get_control_buf(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i64 @ath6kl_htc_rx_packet(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @trace_ath6kl_htc_rx(i64 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ath6kl_htc_rx_process_hdr(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ath6kl_err(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @htc_rxpkt_reset(ptr noundef) local_unnamed_addr #2
declare i32 @reclaim_rx_ctrl_buf(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"htc_target", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"htc_frame_hdr", !13, i64 0, !8, i64 8}
!16 = !{!17, !13, i64 48}
!17 = !{!"htc_packet", !13, i64 0, !13, i64 8, !13, i64 16, !8, i64 24, !8, i64 28, !18, i64 32, !19, i64 40}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!"TYPE_4__", !20, i64 0}
!20 = !{!"TYPE_3__", !13, i64 0, !13, i64 8}
!21 = !{!17, !13, i64 40}
!22 = !{!15, !8, i64 8}
!23 = !{!17, !13, i64 0}
!24 = !{!17, !13, i64 8}
!25 = !{!17, !18, i64 32}
!26 = !{!17, !13, i64 16}
!27 = !{!17, !8, i64 28}
!28 = !{!17, !8, i64 24}
| linux_drivers_net_wireless_ath_ath6kl_extr_htc_mbox.c_htc_wait_for_ctrl_msg |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_scsi.c_zfcp_adapter_scsi_register.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_scsi.c_zfcp_adapter_scsi_register.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32 }
%struct.ccw_dev_id = type { i32 }
%struct.zfcp_adapter = type { ptr, ptr }
%struct.TYPE_7__ = type { i32, i32, i32, ptr, i32, i32, i64 }
@zfcp_data = dso_local global %struct.TYPE_6__ zeroinitializer, align 4
@.str = private unnamed_addr constant [55 x i8] c"Registering the FCP device with the SCSI stack failed\0A\00", align 1
@EIO = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @zfcp_adapter_scsi_register(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.ccw_dev_id, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %35
5: ; preds = %1
%6 = getelementptr inbounds %struct.zfcp_adapter, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = call i32 @ccw_device_get_id(ptr noundef %7, ptr noundef nonnull %2) #3
%9 = call ptr @scsi_host_alloc(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_6__, ptr @zfcp_data, i64 0, i32 1), i32 noundef 8) #3
store ptr %9, ptr %0, align 8, !tbaa !5
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = load ptr, ptr %6, align 8, !tbaa !10
%13 = call i32 @dev_err(ptr noundef %12, ptr noundef nonnull @.str) #3
%14 = load i32, ptr @EIO, align 4, !tbaa !11
%15 = sub nsw i32 0, %14
br label %35
16: ; preds = %5
store i32 1, ptr %9, align 8, !tbaa !13
%17 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 1
store i32 1, ptr %17, align 4, !tbaa !16
%18 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 6
store i64 0, ptr %18, align 8, !tbaa !17
%19 = load i32, ptr %2, align 4, !tbaa !18
%20 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 5
store i32 %19, ptr %20, align 4, !tbaa !20
%21 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 2
store i32 16, ptr %21, align 8, !tbaa !21
%22 = load i32, ptr @zfcp_data, align 4, !tbaa !22
%23 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 4
store i32 %22, ptr %23, align 8, !tbaa !24
%24 = ptrtoint ptr %0 to i64
%25 = getelementptr inbounds %struct.TYPE_7__, ptr %9, i64 0, i32 3
%26 = load ptr, ptr %25, align 8, !tbaa !25
store i64 %24, ptr %26, align 8, !tbaa !26
%27 = load ptr, ptr %6, align 8, !tbaa !10
%28 = call i64 @scsi_add_host(ptr noundef nonnull %9, ptr noundef %27) #3
%29 = icmp eq i64 %28, 0
br i1 %29, label %35, label %30
30: ; preds = %16
%31 = load ptr, ptr %0, align 8, !tbaa !5
%32 = call i32 @scsi_host_put(ptr noundef %31) #3
%33 = load i32, ptr @EIO, align 4, !tbaa !11
%34 = sub nsw i32 0, %33
br label %35
35: ; preds = %16, %1, %30, %11
%36 = phi i32 [ %34, %30 ], [ %15, %11 ], [ 0, %1 ], [ 0, %16 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %36
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ccw_device_get_id(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @scsi_host_alloc(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @scsi_add_host(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @scsi_host_put(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"zfcp_adapter", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_7__", !12, i64 0, !12, i64 4, !12, i64 8, !7, i64 16, !12, i64 24, !12, i64 28, !15, i64 32}
!15 = !{!"long", !8, i64 0}
!16 = !{!14, !12, i64 4}
!17 = !{!14, !15, i64 32}
!18 = !{!19, !12, i64 0}
!19 = !{!"ccw_dev_id", !12, i64 0}
!20 = !{!14, !12, i64 28}
!21 = !{!14, !12, i64 8}
!22 = !{!23, !12, i64 0}
!23 = !{!"TYPE_6__", !12, i64 0, !12, i64 4}
!24 = !{!14, !12, i64 24}
!25 = !{!14, !7, i64 16}
!26 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_scsi.c_zfcp_adapter_scsi_register.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/scsi/extr_zfcp_scsi.c_zfcp_adapter_scsi_register.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i32, i32 }
%struct.ccw_dev_id = type { i32 }
@zfcp_data = common global %struct.TYPE_6__ zeroinitializer, align 4
@.str = private unnamed_addr constant [55 x i8] c"Registering the FCP device with the SCSI stack failed\0A\00", align 1
@EIO = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @zfcp_adapter_scsi_register(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.ccw_dev_id, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %34
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = call i32 @ccw_device_get_id(ptr noundef %7, ptr noundef nonnull %2) #3
%9 = call ptr @scsi_host_alloc(ptr noundef nonnull getelementptr inbounds (i8, ptr @zfcp_data, i64 4), i32 noundef 8) #3
store ptr %9, ptr %0, align 8, !tbaa !6
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = load ptr, ptr %6, align 8, !tbaa !11
%13 = call i32 @dev_err(ptr noundef %12, ptr noundef nonnull @.str) #3
%14 = load i32, ptr @EIO, align 4, !tbaa !12
%15 = sub nsw i32 0, %14
br label %34
16: ; preds = %5
store <2 x i32> <i32 1, i32 1>, ptr %9, align 8, !tbaa !12
%17 = getelementptr inbounds i8, ptr %9, i64 32
store i64 0, ptr %17, align 8, !tbaa !14
%18 = load i32, ptr %2, align 4, !tbaa !17
%19 = getelementptr inbounds i8, ptr %9, i64 28
store i32 %18, ptr %19, align 4, !tbaa !19
%20 = getelementptr inbounds i8, ptr %9, i64 8
store i32 16, ptr %20, align 8, !tbaa !20
%21 = load i32, ptr @zfcp_data, align 4, !tbaa !21
%22 = getelementptr inbounds i8, ptr %9, i64 24
store i32 %21, ptr %22, align 8, !tbaa !23
%23 = ptrtoint ptr %0 to i64
%24 = getelementptr inbounds i8, ptr %9, i64 16
%25 = load ptr, ptr %24, align 8, !tbaa !24
store i64 %23, ptr %25, align 8, !tbaa !25
%26 = load ptr, ptr %6, align 8, !tbaa !11
%27 = call i64 @scsi_add_host(ptr noundef nonnull %9, ptr noundef %26) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %34, label %29
29: ; preds = %16
%30 = load ptr, ptr %0, align 8, !tbaa !6
%31 = call i32 @scsi_host_put(ptr noundef %30) #3
%32 = load i32, ptr @EIO, align 4, !tbaa !12
%33 = sub nsw i32 0, %32
br label %34
34: ; preds = %16, %1, %29, %11
%35 = phi i32 [ %33, %29 ], [ %15, %11 ], [ 0, %1 ], [ 0, %16 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ccw_device_get_id(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @scsi_host_alloc(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @scsi_add_host(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @scsi_host_put(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"zfcp_adapter", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !16, i64 32}
!15 = !{!"TYPE_7__", !13, i64 0, !13, i64 4, !13, i64 8, !8, i64 16, !13, i64 24, !13, i64 28, !16, i64 32}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !13, i64 0}
!18 = !{!"ccw_dev_id", !13, i64 0}
!19 = !{!15, !13, i64 28}
!20 = !{!15, !13, i64 8}
!21 = !{!22, !13, i64 0}
!22 = !{!"TYPE_6__", !13, i64 0, !13, i64 4}
!23 = !{!15, !13, i64 24}
!24 = !{!15, !8, i64 16}
!25 = !{!16, !16, i64 0}
| fastsocket_kernel_drivers_s390_scsi_extr_zfcp_scsi.c_zfcp_adapter_scsi_register |
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/libmlx4/extr_cq.c_mlx4_start_poll.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/libmlx4/extr_cq.c_mlx4_start_poll.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlx4_start_poll], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mlx4_start_poll(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @_mlx4_start_poll(ptr noundef %0, ptr noundef %1, i32 noundef 0) #2
ret i32 %3
}
declare i32 @_mlx4_start_poll(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ofed/libmlx4/extr_cq.c_mlx4_start_poll.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/libmlx4/extr_cq.c_mlx4_start_poll.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mlx4_start_poll], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mlx4_start_poll(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @_mlx4_start_poll(ptr noundef %0, ptr noundef %1, i32 noundef 0) #2
ret i32 %3
}
declare i32 @_mlx4_start_poll(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_ofed_libmlx4_extr_cq.c_mlx4_start_poll |
; ModuleID = 'AnghaBench/freebsd/sbin/routed/extr_trace.c_trace_if.c'
source_filename = "AnghaBench/freebsd/sbin/routed/extr_trace.c_trace_if.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.interface = type { ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@TRACEACTIONS = dso_local local_unnamed_addr global i32 0, align 4
@ftrace = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [21 x i8] c"%-3s interface %-4s \00", align 1
@.str.1 = private unnamed_addr constant [15 x i8] c"%-15s-->%-15s \00", align 1
@IFF_POINTOPOINT = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [11 x i8] c"metric=%d \00", align 1
@.str.3 = private unnamed_addr constant [17 x i8] c"adj_inmetric=%u \00", align 1
@.str.4 = private unnamed_addr constant [18 x i8] c"adj_outmetric=%u \00", align 1
@.str.5 = private unnamed_addr constant [17 x i8] c"fake_default=%u \00", align 1
@if_bits = dso_local local_unnamed_addr global i32 0, align 4
@is_bits = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @trace_if(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr @TRACEACTIONS, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
%5 = load ptr, ptr @ftrace, align 8
%6 = icmp eq ptr %5, null
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %76, label %8
8: ; preds = %2
%9 = tail call i32 (...) @lastlog() #4
%10 = load ptr, ptr @ftrace, align 8, !tbaa !9
%11 = load ptr, ptr %1, align 8, !tbaa !11
%12 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %10, ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %11)
%13 = load ptr, ptr @ftrace, align 8, !tbaa !9
%14 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 10
%15 = load i32, ptr %14, align 4, !tbaa !13
%16 = tail call ptr @naddr_ntoa(i32 noundef %15) #4
%17 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 1
%18 = load i32, ptr %17, align 8, !tbaa !14
%19 = load i32, ptr @IFF_POINTOPOINT, align 4, !tbaa !5
%20 = and i32 %19, %18
%21 = icmp eq i32 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %8
%23 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 9
%24 = load i32, ptr %23, align 8, !tbaa !15
br label %29
25: ; preds = %8
%26 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 8
%27 = load i32, ptr %26, align 4, !tbaa !16
%28 = tail call i32 @htonl(i32 noundef %27)
br label %29
29: ; preds = %25, %22
%30 = phi i32 [ %24, %22 ], [ %28, %25 ]
%31 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 7
%32 = load i32, ptr %31, align 8, !tbaa !17
%33 = tail call ptr @addrname(i32 noundef %30, i32 noundef %32, i32 noundef 1) #4
%34 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %13, ptr noundef nonnull @.str.1, ptr noundef %16, ptr noundef %33)
%35 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 2
%36 = load i32, ptr %35, align 4, !tbaa !18
%37 = icmp eq i32 %36, 0
br i1 %37, label %41, label %38
38: ; preds = %29
%39 = load ptr, ptr @ftrace, align 8, !tbaa !9
%40 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %39, ptr noundef nonnull @.str.2, i32 noundef %36)
br label %41
41: ; preds = %38, %29
%42 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 3
%43 = load i32, ptr %42, align 8, !tbaa !19
%44 = icmp eq i32 %43, 0
br i1 %44, label %48, label %45
45: ; preds = %41
%46 = load ptr, ptr @ftrace, align 8, !tbaa !9
%47 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %46, ptr noundef nonnull @.str.3, i32 noundef %43)
br label %48
48: ; preds = %45, %41
%49 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 4
%50 = load i32, ptr %49, align 4, !tbaa !20
%51 = icmp eq i32 %50, 0
br i1 %51, label %55, label %52
52: ; preds = %48
%53 = load ptr, ptr @ftrace, align 8, !tbaa !9
%54 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %53, ptr noundef nonnull @.str.4, i32 noundef %50)
br label %55
55: ; preds = %52, %48
%56 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 5
%57 = load i32, ptr %56, align 8, !tbaa !21
%58 = tail call i32 @IS_RIP_OUT_OFF(i32 noundef %57) #4
%59 = icmp eq i32 %58, 0
br i1 %59, label %60, label %67
60: ; preds = %55
%61 = getelementptr inbounds %struct.interface, ptr %1, i64 0, i32 6
%62 = load i32, ptr %61, align 4, !tbaa !22
%63 = icmp eq i32 %62, 0
br i1 %63, label %67, label %64
64: ; preds = %60
%65 = load ptr, ptr @ftrace, align 8, !tbaa !9
%66 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %65, ptr noundef nonnull @.str.5, i32 noundef %62)
br label %67
67: ; preds = %64, %60, %55
%68 = load i32, ptr @if_bits, align 4, !tbaa !5
%69 = load i32, ptr %17, align 8, !tbaa !14
%70 = tail call i32 @trace_bits(i32 noundef %68, i32 noundef %69, i32 noundef 0) #4
%71 = load i32, ptr @is_bits, align 4, !tbaa !5
%72 = load i32, ptr %56, align 8, !tbaa !21
%73 = tail call i32 @trace_bits(i32 noundef %71, i32 noundef %72, i32 noundef 0) #4
%74 = load ptr, ptr @ftrace, align 8, !tbaa !9
%75 = tail call i32 @fputc(i8 noundef signext 10, ptr noundef %74) #4
br label %76
76: ; preds = %2, %67
ret void
}
declare i32 @lastlog(...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare ptr @naddr_ntoa(i32 noundef) local_unnamed_addr #1
declare ptr @addrname(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @IS_RIP_OUT_OFF(i32 noundef) local_unnamed_addr #1
declare i32 @trace_bits(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fputc(i8 noundef signext, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nosync nounwind memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"interface", !10, i64 0, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44}
!13 = !{!12, !6, i64 44}
!14 = !{!12, !6, i64 8}
!15 = !{!12, !6, i64 40}
!16 = !{!12, !6, i64 36}
!17 = !{!12, !6, i64 32}
!18 = !{!12, !6, i64 12}
!19 = !{!12, !6, i64 16}
!20 = !{!12, !6, i64 20}
!21 = !{!12, !6, i64 24}
!22 = !{!12, !6, i64 28}
| ; ModuleID = 'AnghaBench/freebsd/sbin/routed/extr_trace.c_trace_if.c'
source_filename = "AnghaBench/freebsd/sbin/routed/extr_trace.c_trace_if.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TRACEACTIONS = common local_unnamed_addr global i32 0, align 4
@ftrace = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [21 x i8] c"%-3s interface %-4s \00", align 1
@.str.1 = private unnamed_addr constant [15 x i8] c"%-15s-->%-15s \00", align 1
@IFF_POINTOPOINT = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [11 x i8] c"metric=%d \00", align 1
@.str.3 = private unnamed_addr constant [17 x i8] c"adj_inmetric=%u \00", align 1
@.str.4 = private unnamed_addr constant [18 x i8] c"adj_outmetric=%u \00", align 1
@.str.5 = private unnamed_addr constant [17 x i8] c"fake_default=%u \00", align 1
@if_bits = common local_unnamed_addr global i32 0, align 4
@is_bits = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @trace_if(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr @TRACEACTIONS, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
%5 = load ptr, ptr @ftrace, align 8
%6 = icmp eq ptr %5, null
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %76, label %8
8: ; preds = %2
%9 = tail call i32 @lastlog() #4
%10 = load ptr, ptr @ftrace, align 8, !tbaa !10
%11 = load ptr, ptr %1, align 8, !tbaa !12
%12 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %10, ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %11)
%13 = load ptr, ptr @ftrace, align 8, !tbaa !10
%14 = getelementptr inbounds i8, ptr %1, i64 44
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = tail call ptr @naddr_ntoa(i32 noundef %15) #4
%17 = getelementptr inbounds i8, ptr %1, i64 8
%18 = load i32, ptr %17, align 8, !tbaa !15
%19 = load i32, ptr @IFF_POINTOPOINT, align 4, !tbaa !6
%20 = and i32 %19, %18
%21 = icmp eq i32 %20, 0
br i1 %21, label %25, label %22
22: ; preds = %8
%23 = getelementptr inbounds i8, ptr %1, i64 40
%24 = load i32, ptr %23, align 8, !tbaa !16
br label %29
25: ; preds = %8
%26 = getelementptr inbounds i8, ptr %1, i64 36
%27 = load i32, ptr %26, align 4, !tbaa !17
%28 = tail call i32 @htonl(i32 noundef %27)
br label %29
29: ; preds = %25, %22
%30 = phi i32 [ %24, %22 ], [ %28, %25 ]
%31 = getelementptr inbounds i8, ptr %1, i64 32
%32 = load i32, ptr %31, align 8, !tbaa !18
%33 = tail call ptr @addrname(i32 noundef %30, i32 noundef %32, i32 noundef 1) #4
%34 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %13, ptr noundef nonnull @.str.1, ptr noundef %16, ptr noundef %33)
%35 = getelementptr inbounds i8, ptr %1, i64 12
%36 = load i32, ptr %35, align 4, !tbaa !19
%37 = icmp eq i32 %36, 0
br i1 %37, label %41, label %38
38: ; preds = %29
%39 = load ptr, ptr @ftrace, align 8, !tbaa !10
%40 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %39, ptr noundef nonnull @.str.2, i32 noundef %36)
br label %41
41: ; preds = %38, %29
%42 = getelementptr inbounds i8, ptr %1, i64 16
%43 = load i32, ptr %42, align 8, !tbaa !20
%44 = icmp eq i32 %43, 0
br i1 %44, label %48, label %45
45: ; preds = %41
%46 = load ptr, ptr @ftrace, align 8, !tbaa !10
%47 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %46, ptr noundef nonnull @.str.3, i32 noundef %43)
br label %48
48: ; preds = %45, %41
%49 = getelementptr inbounds i8, ptr %1, i64 20
%50 = load i32, ptr %49, align 4, !tbaa !21
%51 = icmp eq i32 %50, 0
br i1 %51, label %55, label %52
52: ; preds = %48
%53 = load ptr, ptr @ftrace, align 8, !tbaa !10
%54 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %53, ptr noundef nonnull @.str.4, i32 noundef %50)
br label %55
55: ; preds = %52, %48
%56 = getelementptr inbounds i8, ptr %1, i64 24
%57 = load i32, ptr %56, align 8, !tbaa !22
%58 = tail call i32 @IS_RIP_OUT_OFF(i32 noundef %57) #4
%59 = icmp eq i32 %58, 0
br i1 %59, label %60, label %67
60: ; preds = %55
%61 = getelementptr inbounds i8, ptr %1, i64 28
%62 = load i32, ptr %61, align 4, !tbaa !23
%63 = icmp eq i32 %62, 0
br i1 %63, label %67, label %64
64: ; preds = %60
%65 = load ptr, ptr @ftrace, align 8, !tbaa !10
%66 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %65, ptr noundef nonnull @.str.5, i32 noundef %62)
br label %67
67: ; preds = %64, %60, %55
%68 = load i32, ptr @if_bits, align 4, !tbaa !6
%69 = load i32, ptr %17, align 8, !tbaa !15
%70 = tail call i32 @trace_bits(i32 noundef %68, i32 noundef %69, i32 noundef 0) #4
%71 = load i32, ptr @is_bits, align 4, !tbaa !6
%72 = load i32, ptr %56, align 8, !tbaa !22
%73 = tail call i32 @trace_bits(i32 noundef %71, i32 noundef %72, i32 noundef 0) #4
%74 = load ptr, ptr @ftrace, align 8, !tbaa !10
%75 = tail call i32 @fputc(i8 noundef signext 10, ptr noundef %74) #4
br label %76
76: ; preds = %2, %67
ret void
}
declare i32 @lastlog(...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
declare ptr @naddr_ntoa(i32 noundef) local_unnamed_addr #1
declare ptr @addrname(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @IS_RIP_OUT_OFF(i32 noundef) local_unnamed_addr #1
declare i32 @trace_bits(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fputc(i8 noundef signext, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nosync nounwind memory(none) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"interface", !11, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44}
!14 = !{!13, !7, i64 44}
!15 = !{!13, !7, i64 8}
!16 = !{!13, !7, i64 40}
!17 = !{!13, !7, i64 36}
!18 = !{!13, !7, i64 32}
!19 = !{!13, !7, i64 12}
!20 = !{!13, !7, i64 16}
!21 = !{!13, !7, i64 20}
!22 = !{!13, !7, i64 24}
!23 = !{!13, !7, i64 28}
| freebsd_sbin_routed_extr_trace.c_trace_if |
; ModuleID = 'AnghaBench/goaccess/src/extr_tcabdb.c_ht_insert_hostname.c'
source_filename = "AnghaBench/goaccess/src/extr_tcabdb.c_ht_insert_hostname.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ht_hostnames = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @ht_insert_hostname(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @ht_hostnames, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @ins_ss32(ptr noundef nonnull %3, ptr noundef %0, ptr noundef %1) #2
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ -1, %2 ]
ret i32 %8
}
declare i32 @ins_ss32(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/goaccess/src/extr_tcabdb.c_ht_insert_hostname.c'
source_filename = "AnghaBench/goaccess/src/extr_tcabdb.c_ht_insert_hostname.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ht_hostnames = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ht_insert_hostname(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr @ht_hostnames, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @ins_ss32(ptr noundef nonnull %3, ptr noundef %0, ptr noundef %1) #2
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ -1, %2 ]
ret i32 %8
}
declare i32 @ins_ss32(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| goaccess_src_extr_tcabdb.c_ht_insert_hostname |
; ModuleID = 'AnghaBench/poco/SevenZip/src/extr_Ppmd7.c_Ppmd7_Construct.c'
source_filename = "AnghaBench/poco/SevenZip/src/extr_Ppmd7.c_Ppmd7_Construct.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, ptr, ptr, ptr, ptr, i64 }
@PPMD_NUM_INDEXES = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @Ppmd7_Construct(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 5
store i64 0, ptr %2, align 8, !tbaa !5
%3 = load i32, ptr @PPMD_NUM_INDEXES, align 4, !tbaa !11
%4 = icmp eq i32 %3, 0
br i1 %4, label %65, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 4
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%8 = zext i32 %3 to i64
br label %9
9: ; preds = %5, %57
%10 = phi i64 [ 0, %5 ], [ %63, %57 ]
%11 = phi i32 [ 0, %5 ], [ %58, %57 ]
%12 = icmp ugt i64 %10, 11
%13 = trunc i64 %10 to i32
%14 = lshr i32 %13, 2
%15 = add nuw nsw i32 %14, 1
%16 = select i1 %12, i32 4, i32 %15
%17 = inttoptr i64 %10 to ptr
%18 = and i32 %16, 3
%19 = icmp eq i32 %18, 0
br i1 %19, label %31, label %20
20: ; preds = %9, %20
%21 = phi i32 [ %25, %20 ], [ %11, %9 ]
%22 = phi i32 [ %28, %20 ], [ %16, %9 ]
%23 = phi i32 [ %29, %20 ], [ 0, %9 ]
%24 = load ptr, ptr %6, align 8, !tbaa !13
%25 = add i32 %21, 1
%26 = zext i32 %21 to i64
%27 = getelementptr inbounds ptr, ptr %24, i64 %26
store ptr %17, ptr %27, align 8, !tbaa !14
%28 = add i32 %22, -1
%29 = add i32 %23, 1
%30 = icmp eq i32 %29, %18
br i1 %30, label %31, label %20, !llvm.loop !15
31: ; preds = %20, %9
%32 = phi i32 [ undef, %9 ], [ %25, %20 ]
%33 = phi i32 [ %11, %9 ], [ %25, %20 ]
%34 = phi i32 [ %16, %9 ], [ %28, %20 ]
%35 = icmp ult i32 %16, 4
br i1 %35, label %57, label %36
36: ; preds = %31, %36
%37 = phi i32 [ %52, %36 ], [ %33, %31 ]
%38 = phi i32 [ %55, %36 ], [ %34, %31 ]
%39 = load ptr, ptr %6, align 8, !tbaa !13
%40 = add i32 %37, 1
%41 = zext i32 %37 to i64
%42 = getelementptr inbounds ptr, ptr %39, i64 %41
store ptr %17, ptr %42, align 8, !tbaa !14
%43 = load ptr, ptr %6, align 8, !tbaa !13
%44 = add i32 %37, 2
%45 = zext i32 %40 to i64
%46 = getelementptr inbounds ptr, ptr %43, i64 %45
store ptr %17, ptr %46, align 8, !tbaa !14
%47 = load ptr, ptr %6, align 8, !tbaa !13
%48 = add i32 %37, 3
%49 = zext i32 %44 to i64
%50 = getelementptr inbounds ptr, ptr %47, i64 %49
store ptr %17, ptr %50, align 8, !tbaa !14
%51 = load ptr, ptr %6, align 8, !tbaa !13
%52 = add i32 %37, 4
%53 = zext i32 %48 to i64
%54 = getelementptr inbounds ptr, ptr %51, i64 %53
store ptr %17, ptr %54, align 8, !tbaa !14
%55 = add i32 %38, -4
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %36, !llvm.loop !17
57: ; preds = %36, %31
%58 = phi i32 [ %32, %31 ], [ %52, %36 ]
%59 = zext i32 %58 to i64
%60 = inttoptr i64 %59 to ptr
%61 = load ptr, ptr %7, align 8, !tbaa !19
%62 = getelementptr inbounds ptr, ptr %61, i64 %10
store ptr %60, ptr %62, align 8, !tbaa !14
%63 = add nuw nsw i64 %10, 1
%64 = icmp eq i64 %63, %8
br i1 %64, label %65, label %9, !llvm.loop !20
65: ; preds = %57, %1
%66 = load ptr, ptr %0, align 8, !tbaa !21
store i32 0, ptr %66, align 4, !tbaa !11
%67 = getelementptr inbounds i32, ptr %66, i64 1
store i32 2, ptr %67, align 4, !tbaa !11
%68 = getelementptr inbounds i32, ptr %66, i64 2
%69 = tail call i32 @memset(ptr noundef nonnull %68, i32 noundef 4, i32 noundef 9) #2
%70 = load ptr, ptr %0, align 8, !tbaa !21
%71 = getelementptr inbounds i32, ptr %70, i64 11
%72 = tail call i32 @memset(ptr noundef nonnull %71, i32 noundef 6, i32 noundef 245) #2
%73 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%74 = load ptr, ptr %73, align 8, !tbaa !22
store ptr null, ptr %74, align 8, !tbaa !14
%75 = load ptr, ptr %73, align 8, !tbaa !22
%76 = getelementptr inbounds ptr, ptr %75, i64 1
store ptr inttoptr (i64 1 to ptr), ptr %76, align 8, !tbaa !14
%77 = load ptr, ptr %73, align 8, !tbaa !22
%78 = getelementptr inbounds ptr, ptr %77, i64 2
store ptr inttoptr (i64 2 to ptr), ptr %78, align 8, !tbaa !14
br label %79
79: ; preds = %89, %65
%80 = phi i64 [ 3, %65 ], [ %106, %89 ]
%81 = phi i32 [ 3, %65 ], [ %105, %89 ]
%82 = phi i32 [ 1, %65 ], [ %103, %89 ]
%83 = zext i32 %81 to i64
%84 = inttoptr i64 %83 to ptr
%85 = load ptr, ptr %73, align 8, !tbaa !22
%86 = getelementptr inbounds ptr, ptr %85, i64 %80
store ptr %84, ptr %86, align 8, !tbaa !14
%87 = add nuw nsw i64 %80, 1
%88 = icmp eq i64 %87, 256
br i1 %88, label %107, label %89, !llvm.loop !23
89: ; preds = %79
%90 = add i32 %82, -1
%91 = icmp eq i32 %90, 0
%92 = zext i1 %91 to i32
%93 = add i32 %81, %92
%94 = add i32 %81, -1
%95 = select i1 %91, i32 %94, i32 %90
%96 = zext i32 %93 to i64
%97 = inttoptr i64 %96 to ptr
%98 = load ptr, ptr %73, align 8, !tbaa !22
%99 = getelementptr inbounds ptr, ptr %98, i64 %87
store ptr %97, ptr %99, align 8, !tbaa !14
%100 = add i32 %95, -1
%101 = icmp eq i32 %100, 0
%102 = add i32 %93, -1
%103 = select i1 %101, i32 %102, i32 %100
%104 = zext i1 %101 to i32
%105 = add i32 %93, %104
%106 = add nuw nsw i64 %80, 2
br label %79
107: ; preds = %79
%108 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%109 = load ptr, ptr %108, align 8, !tbaa !24
%110 = tail call i32 @memset(ptr noundef %109, i32 noundef 0, i32 noundef 64) #2
%111 = load ptr, ptr %108, align 8, !tbaa !24
%112 = getelementptr inbounds i32, ptr %111, i64 64
%113 = tail call i32 @memset(ptr noundef nonnull %112, i32 noundef 8, i32 noundef 192) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 40}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !10, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !7, i64 32}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.unroll.disable"}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!6, !7, i64 24}
!20 = distinct !{!20, !18}
!21 = !{!6, !7, i64 0}
!22 = !{!6, !7, i64 16}
!23 = distinct !{!23, !18}
!24 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/poco/SevenZip/src/extr_Ppmd7.c_Ppmd7_Construct.c'
source_filename = "AnghaBench/poco/SevenZip/src/extr_Ppmd7.c_Ppmd7_Construct.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PPMD_NUM_INDEXES = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @Ppmd7_Construct(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 40
store i64 0, ptr %2, align 8, !tbaa !6
%3 = load i32, ptr @PPMD_NUM_INDEXES, align 4, !tbaa !12
%4 = icmp eq i32 %3, 0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 32
%7 = getelementptr inbounds i8, ptr %0, i64 24
%8 = zext i32 %3 to i64
br label %9
9: ; preds = %5, %27
%10 = phi i64 [ 0, %5 ], [ %32, %27 ]
%11 = phi i32 [ 0, %5 ], [ %22, %27 ]
%12 = icmp ugt i64 %10, 11
%13 = trunc nuw i64 %10 to i32
%14 = lshr i32 %13, 2
%15 = add nuw nsw i32 %14, 1
%16 = select i1 %12, i32 4, i32 %15
%17 = inttoptr i64 %10 to ptr
br label %18
18: ; preds = %18, %9
%19 = phi i32 [ %11, %9 ], [ %22, %18 ]
%20 = phi i32 [ %16, %9 ], [ %25, %18 ]
%21 = load ptr, ptr %6, align 8, !tbaa !14
%22 = add i32 %19, 1
%23 = zext i32 %19 to i64
%24 = getelementptr inbounds ptr, ptr %21, i64 %23
store ptr %17, ptr %24, align 8, !tbaa !15
%25 = add i32 %20, -1
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %18, !llvm.loop !16
27: ; preds = %18
%28 = zext i32 %22 to i64
%29 = inttoptr i64 %28 to ptr
%30 = load ptr, ptr %7, align 8, !tbaa !18
%31 = getelementptr inbounds ptr, ptr %30, i64 %10
store ptr %29, ptr %31, align 8, !tbaa !15
%32 = add nuw nsw i64 %10, 1
%33 = icmp eq i64 %32, %8
br i1 %33, label %34, label %9, !llvm.loop !19
34: ; preds = %27, %1
%35 = load ptr, ptr %0, align 8, !tbaa !20
store <2 x i32> <i32 0, i32 2>, ptr %35, align 4, !tbaa !12
%36 = getelementptr inbounds i8, ptr %35, i64 8
%37 = tail call i32 @memset(ptr noundef nonnull %36, i32 noundef 4, i32 noundef 9) #2
%38 = load ptr, ptr %0, align 8, !tbaa !20
%39 = getelementptr inbounds i8, ptr %38, i64 44
%40 = tail call i32 @memset(ptr noundef nonnull %39, i32 noundef 6, i32 noundef 245) #2
%41 = getelementptr inbounds i8, ptr %0, i64 16
%42 = load ptr, ptr %41, align 8, !tbaa !21
store ptr null, ptr %42, align 8, !tbaa !15
%43 = load ptr, ptr %41, align 8, !tbaa !21
%44 = getelementptr inbounds i8, ptr %43, i64 8
store ptr inttoptr (i64 1 to ptr), ptr %44, align 8, !tbaa !15
%45 = load ptr, ptr %41, align 8, !tbaa !21
%46 = getelementptr inbounds i8, ptr %45, i64 16
store ptr inttoptr (i64 2 to ptr), ptr %46, align 8, !tbaa !15
br label %47
47: ; preds = %34, %47
%48 = phi i64 [ 3, %34 ], [ %61, %47 ]
%49 = phi i32 [ 3, %34 ], [ %60, %47 ]
%50 = phi i32 [ 1, %34 ], [ %58, %47 ]
%51 = zext i32 %49 to i64
%52 = inttoptr i64 %51 to ptr
%53 = load ptr, ptr %41, align 8, !tbaa !21
%54 = getelementptr inbounds ptr, ptr %53, i64 %48
store ptr %52, ptr %54, align 8, !tbaa !15
%55 = add i32 %50, -1
%56 = icmp eq i32 %55, 0
%57 = add i32 %49, -1
%58 = select i1 %56, i32 %57, i32 %55
%59 = zext i1 %56 to i32
%60 = add i32 %49, %59
%61 = add nuw nsw i64 %48, 1
%62 = icmp eq i64 %61, 256
br i1 %62, label %63, label %47, !llvm.loop !22
63: ; preds = %47
%64 = getelementptr inbounds i8, ptr %0, i64 8
%65 = load ptr, ptr %64, align 8, !tbaa !23
%66 = tail call i32 @memset(ptr noundef %65, i32 noundef 0, i32 noundef 64) #2
%67 = load ptr, ptr %64, align 8, !tbaa !23
%68 = getelementptr inbounds i8, ptr %67, i64 256
%69 = tail call i32 @memset(ptr noundef nonnull %68, i32 noundef 8, i32 noundef 192) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 40}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !11, i64 40}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !8, i64 32}
!15 = !{!8, !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!7, !8, i64 24}
!19 = distinct !{!19, !17}
!20 = !{!7, !8, i64 0}
!21 = !{!7, !8, i64 16}
!22 = distinct !{!22, !17}
!23 = !{!7, !8, i64 8}
| poco_SevenZip_src_extr_Ppmd7.c_Ppmd7_Construct |
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