IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_rankings.c_UI_RankingsMenu.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_rankings.c_UI_RankingsMenu.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@s_rankings = dso_local global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind uwtable
define dso_local void @UI_RankingsMenu() local_unnamed_addr #0 {
%1 = tail call i32 (...) @Rankings_MenuInit() #2
%2 = tail call i32 @UI_PushMenu(ptr noundef nonnull @s_rankings) #2
ret void
}
declare i32 @Rankings_MenuInit(...) local_unnamed_addr #1
declare i32 @UI_PushMenu(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_rankings.c_UI_RankingsMenu.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_rankings.c_UI_RankingsMenu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@s_rankings = common global %struct.TYPE_2__ zeroinitializer, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @UI_RankingsMenu() local_unnamed_addr #0 {
%1 = tail call i32 @Rankings_MenuInit() #2
%2 = tail call i32 @UI_PushMenu(ptr noundef nonnull @s_rankings) #2
ret void
}
declare i32 @Rankings_MenuInit(...) local_unnamed_addr #1
declare i32 @UI_PushMenu(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Quake-III-Arena_code_q3_ui_extr_ui_rankings.c_UI_RankingsMenu |
; ModuleID = 'AnghaBench/linux/drivers/staging/media/allegro-dvt/extr_allegro-core.c_allegro_get_firmware_info.c'
source_filename = "AnghaBench/linux/drivers/staging/media/allegro-dvt/extr_allegro-core.c_allegro_get_firmware_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fw_info = type { i32, i32 }
@supported_firmware = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @allegro_get_firmware_info], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @allegro_get_firmware_info(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i32, ptr %1, align 4, !tbaa !5
%5 = load i32, ptr %2, align 4, !tbaa !5
%6 = load ptr, ptr @supported_firmware, align 8, !tbaa !10
%7 = tail call i32 @ARRAY_SIZE(ptr noundef %6) #2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %26
9: ; preds = %3, %19
%10 = phi i64 [ %20, %19 ], [ 0, %3 ]
%11 = load ptr, ptr @supported_firmware, align 8, !tbaa !10
%12 = getelementptr inbounds %struct.fw_info, ptr %11, i64 %10
%13 = load i32, ptr %12, align 4, !tbaa !12
%14 = icmp eq i32 %13, %4
br i1 %14, label %15, label %19
15: ; preds = %9
%16 = getelementptr inbounds %struct.fw_info, ptr %11, i64 %10, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !14
%18 = icmp eq i32 %17, %5
br i1 %18, label %24, label %19
19: ; preds = %9, %15
%20 = add nuw nsw i64 %10, 1
%21 = tail call i32 @ARRAY_SIZE(ptr noundef nonnull %11) #2
%22 = sext i32 %21 to i64
%23 = icmp slt i64 %20, %22
br i1 %23, label %9, label %26, !llvm.loop !15
24: ; preds = %15
%25 = getelementptr inbounds %struct.fw_info, ptr %11, i64 %10
br label %26
26: ; preds = %19, %24, %3
%27 = phi ptr [ null, %3 ], [ %25, %24 ], [ null, %19 ]
ret ptr %27
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"firmware", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"fw_info", !7, i64 0, !7, i64 4}
!14 = !{!13, !7, i64 4}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/media/allegro-dvt/extr_allegro-core.c_allegro_get_firmware_info.c'
source_filename = "AnghaBench/linux/drivers/staging/media/allegro-dvt/extr_allegro-core.c_allegro_get_firmware_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.fw_info = type { i32, i32 }
@supported_firmware = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @allegro_get_firmware_info], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @allegro_get_firmware_info(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) #0 {
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = load i32, ptr %2, align 4, !tbaa !6
%6 = load ptr, ptr @supported_firmware, align 8, !tbaa !11
%7 = tail call i32 @ARRAY_SIZE(ptr noundef %6) #2
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %3, %19
%10 = phi i64 [ %20, %19 ], [ 0, %3 ]
%11 = load ptr, ptr @supported_firmware, align 8, !tbaa !11
%12 = getelementptr inbounds %struct.fw_info, ptr %11, i64 %10
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = icmp eq i32 %13, %4
br i1 %14, label %15, label %19
15: ; preds = %9
%16 = getelementptr inbounds i8, ptr %12, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !15
%18 = icmp eq i32 %17, %5
br i1 %18, label %24, label %19
19: ; preds = %9, %15
%20 = add nuw nsw i64 %10, 1
%21 = tail call i32 @ARRAY_SIZE(ptr noundef nonnull %11) #2
%22 = sext i32 %21 to i64
%23 = icmp slt i64 %20, %22
br i1 %23, label %9, label %24, !llvm.loop !16
24: ; preds = %15, %19, %3
%25 = phi ptr [ null, %3 ], [ null, %19 ], [ %12, %15 ]
ret ptr %25
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"firmware", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"fw_info", !8, i64 0, !8, i64 4}
!15 = !{!14, !8, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| linux_drivers_staging_media_allegro-dvt_extr_allegro-core.c_allegro_get_firmware_info |
; ModuleID = 'AnghaBench/linux/sound/pci/cs46xx/extr_dsp_spos.c_cs46xx_dsp_disable_spdif_hw.c'
source_filename = "AnghaBench/linux/sound/pci/cs46xx/extr_dsp_spos.c_cs46xx_dsp_disable_spdif_hw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BA0_ASER_FADDR = dso_local local_unnamed_addr global i32 0, align 4
@SP_SPDOUT_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@SP_SPDOUT_CSUV = dso_local local_unnamed_addr global i32 0, align 4
@SP_SPDIN_FIFOPTR = dso_local local_unnamed_addr global i32 0, align 4
@DSP_SPDIF_STATUS_HW_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cs46xx_dsp_disable_spdif_hw], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cs46xx_dsp_disable_spdif_hw(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr @BA0_ASER_FADDR, align 4, !tbaa !10
%4 = tail call i32 @snd_cs46xx_pokeBA0(ptr noundef nonnull %0, i32 noundef %3, i32 noundef 0) #2
%5 = load i32, ptr @SP_SPDOUT_CONTROL, align 4, !tbaa !10
%6 = tail call i32 @cs46xx_poke_via_dsp(ptr noundef nonnull %0, i32 noundef %5, i32 noundef 0) #2
%7 = load i32, ptr @SP_SPDOUT_CSUV, align 4, !tbaa !10
%8 = tail call i32 @cs46xx_poke_via_dsp(ptr noundef nonnull %0, i32 noundef %7, i32 noundef 0) #2
%9 = load i32, ptr @SP_SPDIN_FIFOPTR, align 4, !tbaa !10
%10 = tail call i32 @cs46xx_poke_via_dsp(ptr noundef nonnull %0, i32 noundef %9, i32 noundef 0) #2
%11 = load i32, ptr @DSP_SPDIF_STATUS_HW_ENABLED, align 4, !tbaa !10
%12 = xor i32 %11, -1
%13 = load i32, ptr %2, align 4, !tbaa !12
%14 = and i32 %13, %12
store i32 %14, ptr %2, align 4, !tbaa !12
ret void
}
declare i32 @snd_cs46xx_pokeBA0(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cs46xx_poke_via_dsp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_cs46xx", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"dsp_spos_instance", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/pci/cs46xx/extr_dsp_spos.c_cs46xx_dsp_disable_spdif_hw.c'
source_filename = "AnghaBench/linux/sound/pci/cs46xx/extr_dsp_spos.c_cs46xx_dsp_disable_spdif_hw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BA0_ASER_FADDR = common local_unnamed_addr global i32 0, align 4
@SP_SPDOUT_CONTROL = common local_unnamed_addr global i32 0, align 4
@SP_SPDOUT_CSUV = common local_unnamed_addr global i32 0, align 4
@SP_SPDIN_FIFOPTR = common local_unnamed_addr global i32 0, align 4
@DSP_SPDIF_STATUS_HW_ENABLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cs46xx_dsp_disable_spdif_hw], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cs46xx_dsp_disable_spdif_hw(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @BA0_ASER_FADDR, align 4, !tbaa !11
%4 = tail call i32 @snd_cs46xx_pokeBA0(ptr noundef nonnull %0, i32 noundef %3, i32 noundef 0) #2
%5 = load i32, ptr @SP_SPDOUT_CONTROL, align 4, !tbaa !11
%6 = tail call i32 @cs46xx_poke_via_dsp(ptr noundef nonnull %0, i32 noundef %5, i32 noundef 0) #2
%7 = load i32, ptr @SP_SPDOUT_CSUV, align 4, !tbaa !11
%8 = tail call i32 @cs46xx_poke_via_dsp(ptr noundef nonnull %0, i32 noundef %7, i32 noundef 0) #2
%9 = load i32, ptr @SP_SPDIN_FIFOPTR, align 4, !tbaa !11
%10 = tail call i32 @cs46xx_poke_via_dsp(ptr noundef nonnull %0, i32 noundef %9, i32 noundef 0) #2
%11 = load i32, ptr @DSP_SPDIF_STATUS_HW_ENABLED, align 4, !tbaa !11
%12 = xor i32 %11, -1
%13 = load i32, ptr %2, align 4, !tbaa !13
%14 = and i32 %13, %12
store i32 %14, ptr %2, align 4, !tbaa !13
ret void
}
declare i32 @snd_cs46xx_pokeBA0(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cs46xx_poke_via_dsp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_cs46xx", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"dsp_spos_instance", !12, i64 0}
| linux_sound_pci_cs46xx_extr_dsp_spos.c_cs46xx_dsp_disable_spdif_hw |
; ModuleID = 'AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68000_lsl_s_16.c'
source_filename = "AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68000_lsl_s_16.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@M68K_INS_LSL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @d68000_lsl_s_16], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @d68000_lsl_s_16(ptr noundef %0) #0 {
%2 = load i32, ptr @M68K_INS_LSL, align 4, !tbaa !5
%3 = tail call i32 @build_3bit_d(ptr noundef %0, i32 noundef %2, i32 noundef 2) #2
ret void
}
declare i32 @build_3bit_d(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68000_lsl_s_16.c'
source_filename = "AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68000_lsl_s_16.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@M68K_INS_LSL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @d68000_lsl_s_16], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @d68000_lsl_s_16(ptr noundef %0) #0 {
%2 = load i32, ptr @M68K_INS_LSL, align 4, !tbaa !6
%3 = tail call i32 @build_3bit_d(ptr noundef %0, i32 noundef %2, i32 noundef 2) #2
ret void
}
declare i32 @build_3bit_d(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| capstone_arch_M68K_extr_M68KDisassembler.c_d68000_lsl_s_16 |
; ModuleID = 'AnghaBench/libgit2/src/extr_buffer.c_git_buf_init.c'
source_filename = "AnghaBench/libgit2/src/extr_buffer.c_git_buf_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i64, i64 }
@git_buf__initbuf = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @git_buf_init(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
%4 = load i32, ptr @git_buf__initbuf, align 4, !tbaa !5
store i32 %4, ptr %0, align 8, !tbaa !9
%5 = tail call i32 @ENSURE_SIZE(ptr noundef nonnull %0, i64 noundef %1) #3
ret i32 0
}
declare i32 @ENSURE_SIZE(ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/libgit2/src/extr_buffer.c_git_buf_init.c'
source_filename = "AnghaBench/libgit2/src/extr_buffer.c_git_buf_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@git_buf__initbuf = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @git_buf_init(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %3, i8 0, i64 16, i1 false)
%4 = load i32, ptr @git_buf__initbuf, align 4, !tbaa !6
store i32 %4, ptr %0, align 8, !tbaa !10
%5 = tail call i32 @ENSURE_SIZE(ptr noundef nonnull %0, i64 noundef %1) #3
ret i32 0
}
declare i32 @ENSURE_SIZE(ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"long", !8, i64 0}
| libgit2_src_extr_buffer.c_git_buf_init |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_dib8000.c_dib8000_read_snr.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_dib8000.c_dib8000_read_snr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dib8000_read_snr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @dib8000_read_snr(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = tail call i32 @dib8000_read_word(ptr noundef %3, i32 noundef 542) #2
%5 = lshr i32 %4, 6
%6 = and i32 %5, 255
%7 = and i32 %4, 63
%8 = tail call i32 @dib8000_read_word(ptr noundef %3, i32 noundef 543) #2
%9 = lshr i32 %8, 6
%10 = and i32 %9, 255
%11 = and i32 %8, 63
%12 = and i32 %4, 32
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, i32 0, i32 -64
%15 = or disjoint i32 %14, %7
%16 = and i32 %8, 32
%17 = icmp eq i32 %16, 0
%18 = select i1 %17, i32 0, i32 -64
%19 = or disjoint i32 %18, %11
%20 = icmp eq i32 %10, 0
%21 = tail call i32 @intlog10(i32 noundef 2) #2
br i1 %20, label %27, label %22
22: ; preds = %2
%23 = mul i32 %21, %19
%24 = tail call i32 @intlog10(i32 noundef %10) #2
%25 = add i32 %23, %24
%26 = mul i32 %25, 10
br label %31
27: ; preds = %2
%28 = mul nsw i32 %19, 10
%29 = mul i32 %28, %21
%30 = add nsw i32 %29, -100
br label %31
31: ; preds = %27, %22
%32 = phi i32 [ %26, %22 ], [ %30, %27 ]
%33 = icmp eq i32 %6, 0
%34 = tail call i32 @intlog10(i32 noundef 2) #2
br i1 %33, label %40, label %35
35: ; preds = %31
%36 = mul i32 %34, %15
%37 = tail call i32 @intlog10(i32 noundef %6) #2
%38 = add i32 %36, %37
%39 = mul i32 %38, -10
br label %44
40: ; preds = %31
%41 = mul nsw i32 %15, -10
%42 = mul i32 %41, %34
%43 = add i32 %42, 100
br label %44
44: ; preds = %40, %35
%45 = phi i32 [ %39, %35 ], [ %43, %40 ]
%46 = add i32 %45, %32
%47 = sdiv i32 %46, 1677721
store i32 %47, ptr %1, align 4, !tbaa !10
ret i32 0
}
declare i32 @dib8000_read_word(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @intlog10(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dvb_frontend", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_dib8000.c_dib8000_read_snr.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/frontends/extr_dib8000.c_dib8000_read_snr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dib8000_read_snr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @dib8000_read_snr(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = tail call i32 @dib8000_read_word(ptr noundef %3, i32 noundef 542) #2
%5 = lshr i32 %4, 6
%6 = and i32 %5, 255
%7 = and i32 %4, 63
%8 = tail call i32 @dib8000_read_word(ptr noundef %3, i32 noundef 543) #2
%9 = lshr i32 %8, 6
%10 = and i32 %9, 255
%11 = and i32 %8, 63
%12 = and i32 %4, 32
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, i32 0, i32 -64
%15 = or disjoint i32 %14, %7
%16 = and i32 %8, 32
%17 = icmp eq i32 %16, 0
%18 = select i1 %17, i32 0, i32 -64
%19 = or disjoint i32 %18, %11
%20 = icmp eq i32 %10, 0
%21 = tail call i32 @intlog10(i32 noundef 2) #2
br i1 %20, label %27, label %22
22: ; preds = %2
%23 = mul i32 %21, %19
%24 = tail call i32 @intlog10(i32 noundef %10) #2
%25 = add i32 %23, %24
%26 = mul i32 %25, 10
br label %31
27: ; preds = %2
%28 = mul nsw i32 %19, 10
%29 = mul i32 %28, %21
%30 = add nsw i32 %29, -100
br label %31
31: ; preds = %27, %22
%32 = phi i32 [ %26, %22 ], [ %30, %27 ]
%33 = icmp eq i32 %6, 0
%34 = tail call i32 @intlog10(i32 noundef 2) #2
br i1 %33, label %40, label %35
35: ; preds = %31
%36 = mul i32 %34, %15
%37 = tail call i32 @intlog10(i32 noundef %6) #2
%38 = add i32 %36, %37
%39 = mul i32 %38, -10
br label %44
40: ; preds = %31
%41 = mul nsw i32 %15, -10
%42 = mul i32 %41, %34
%43 = add i32 %42, 100
br label %44
44: ; preds = %40, %35
%45 = phi i32 [ %39, %35 ], [ %43, %40 ]
%46 = add i32 %45, %32
%47 = sdiv i32 %46, 1677721
store i32 %47, ptr %1, align 4, !tbaa !11
ret i32 0
}
declare i32 @dib8000_read_word(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @intlog10(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dvb_frontend", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| fastsocket_kernel_drivers_media_dvb_frontends_extr_dib8000.c_dib8000_read_snr |
; ModuleID = 'AnghaBench/fastsocket/kernel/security/keys/extr_keyring.c_keyring_describe.c'
source_filename = "AnghaBench/fastsocket/kernel/security/keys/extr_keyring.c_keyring_describe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.key = type { ptr, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
%struct.keyring_list = type { i32, i32 }
@.str = private unnamed_addr constant [7 x i8] c"[anon]\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c": %u/%u\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c": empty\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @keyring_describe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @keyring_describe(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
%5 = select i1 %4, ptr @.str, ptr %3
%6 = tail call i32 @seq_puts(ptr noundef %1, ptr noundef nonnull %5) #2
%7 = tail call i64 @key_is_instantiated(ptr noundef nonnull %0) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %24, label %9
9: ; preds = %2
%10 = tail call i32 (...) @rcu_read_lock() #2
%11 = getelementptr inbounds %struct.key, ptr %0, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !12
%13 = tail call ptr @rcu_dereference(i32 noundef %12) #2
%14 = icmp eq ptr %13, null
br i1 %14, label %20, label %15
15: ; preds = %9
%16 = getelementptr inbounds %struct.keyring_list, ptr %13, i64 0, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = load i32, ptr %13, align 4, !tbaa !15
%19 = tail call i32 @seq_printf(ptr noundef %1, ptr noundef nonnull @.str.1, i32 noundef %17, i32 noundef %18) #2
br label %22
20: ; preds = %9
%21 = tail call i32 @seq_puts(ptr noundef %1, ptr noundef nonnull @.str.2) #2
br label %22
22: ; preds = %20, %15
%23 = tail call i32 (...) @rcu_read_unlock() #2
br label %24
24: ; preds = %22, %2
ret void
}
declare i32 @seq_puts(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @key_is_instantiated(ptr noundef) local_unnamed_addr #1
declare i32 @rcu_read_lock(...) local_unnamed_addr #1
declare ptr @rcu_dereference(i32 noundef) local_unnamed_addr #1
declare i32 @seq_printf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcu_read_unlock(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"key", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !11, i64 8}
!13 = !{!14, !11, i64 4}
!14 = !{!"keyring_list", !11, i64 0, !11, i64 4}
!15 = !{!14, !11, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/security/keys/extr_keyring.c_keyring_describe.c'
source_filename = "AnghaBench/fastsocket/kernel/security/keys/extr_keyring.c_keyring_describe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [7 x i8] c"[anon]\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c": %u/%u\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c": empty\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @keyring_describe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @keyring_describe(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
%5 = select i1 %4, ptr @.str, ptr %3
%6 = tail call i32 @seq_puts(ptr noundef %1, ptr noundef nonnull %5) #2
%7 = tail call i64 @key_is_instantiated(ptr noundef nonnull %0) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %24, label %9
9: ; preds = %2
%10 = tail call i32 @rcu_read_lock() #2
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !13
%13 = tail call ptr @rcu_dereference(i32 noundef %12) #2
%14 = icmp eq ptr %13, null
br i1 %14, label %20, label %15
15: ; preds = %9
%16 = getelementptr inbounds i8, ptr %13, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !14
%18 = load i32, ptr %13, align 4, !tbaa !16
%19 = tail call i32 @seq_printf(ptr noundef %1, ptr noundef nonnull @.str.1, i32 noundef %17, i32 noundef %18) #2
br label %22
20: ; preds = %9
%21 = tail call i32 @seq_puts(ptr noundef %1, ptr noundef nonnull @.str.2) #2
br label %22
22: ; preds = %20, %15
%23 = tail call i32 @rcu_read_unlock() #2
br label %24
24: ; preds = %22, %2
ret void
}
declare i32 @seq_puts(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @key_is_instantiated(ptr noundef) local_unnamed_addr #1
declare i32 @rcu_read_lock(...) local_unnamed_addr #1
declare ptr @rcu_dereference(i32 noundef) local_unnamed_addr #1
declare i32 @seq_printf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rcu_read_unlock(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"key", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !12, i64 8}
!14 = !{!15, !12, i64 4}
!15 = !{!"keyring_list", !12, i64 0, !12, i64 4}
!16 = !{!15, !12, i64 0}
| fastsocket_kernel_security_keys_extr_keyring.c_keyring_describe |
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_kempld-core.c_kempld_probe.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_kempld-core.c_kempld_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.kempld_device_data = type { i32, ptr, i32, i64, i64, i64 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@IORESOURCE_IO = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @kempld_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @kempld_probe(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_platdata(ptr noundef %0) #2
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%4 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 48, i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %35
9: ; preds = %1
%10 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !5
%11 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %10, i32 noundef 0) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, ptr @EINVAL, align 4, !tbaa !5
%15 = sub nsw i32 0, %14
br label %35
16: ; preds = %9
%17 = load i32, ptr %11, align 4, !tbaa !9
%18 = tail call i32 @resource_size(ptr noundef nonnull %11) #2
%19 = tail call i64 @devm_ioport_map(ptr noundef %0, i32 noundef %17, i32 noundef %18) #2
%20 = getelementptr inbounds %struct.kempld_device_data, ptr %4, i64 0, i32 3
store i64 %19, ptr %20, align 8, !tbaa !11
%21 = icmp eq i64 %19, 0
br i1 %21, label %22, label %25
22: ; preds = %16
%23 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%24 = sub nsw i32 0, %23
br label %35
25: ; preds = %16
%26 = getelementptr inbounds %struct.kempld_device_data, ptr %4, i64 0, i32 5
store i64 %19, ptr %26, align 8, !tbaa !15
%27 = add nsw i64 %19, 1
%28 = getelementptr inbounds %struct.kempld_device_data, ptr %4, i64 0, i32 4
store i64 %27, ptr %28, align 8, !tbaa !16
%29 = load i32, ptr %2, align 4, !tbaa !17
%30 = getelementptr inbounds %struct.kempld_device_data, ptr %4, i64 0, i32 2
store i32 %29, ptr %30, align 8, !tbaa !19
%31 = getelementptr inbounds %struct.kempld_device_data, ptr %4, i64 0, i32 1
store ptr %0, ptr %31, align 8, !tbaa !20
%32 = tail call i32 @mutex_init(ptr noundef nonnull %4) #2
%33 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef nonnull %4) #2
%34 = tail call i32 @kempld_detect_device(ptr noundef nonnull %4) #2
br label %35
35: ; preds = %25, %22, %13, %6
%36 = phi i32 [ %34, %25 ], [ %24, %22 ], [ %15, %13 ], [ %8, %6 ]
ret i32 %36
}
declare ptr @dev_get_platdata(ptr noundef) local_unnamed_addr #1
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @devm_ioport_map(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @resource_size(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kempld_detect_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"resource", !6, i64 0}
!11 = !{!12, !14, i64 24}
!12 = !{!"kempld_device_data", !6, i64 0, !13, i64 8, !6, i64 16, !14, i64 24, !14, i64 32, !14, i64 40}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!12, !14, i64 40}
!16 = !{!12, !14, i64 32}
!17 = !{!18, !6, i64 0}
!18 = !{!"kempld_platform_data", !6, i64 0}
!19 = !{!12, !6, i64 16}
!20 = !{!12, !13, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_kempld-core.c_kempld_probe.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_kempld-core.c_kempld_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@IORESOURCE_IO = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @kempld_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @kempld_probe(ptr noundef %0) #0 {
%2 = tail call ptr @dev_get_platdata(ptr noundef %0) #2
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%4 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 48, i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %35
9: ; preds = %1
%10 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !6
%11 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %10, i32 noundef 0) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, ptr @EINVAL, align 4, !tbaa !6
%15 = sub nsw i32 0, %14
br label %35
16: ; preds = %9
%17 = load i32, ptr %11, align 4, !tbaa !10
%18 = tail call i32 @resource_size(ptr noundef nonnull %11) #2
%19 = tail call i64 @devm_ioport_map(ptr noundef %0, i32 noundef %17, i32 noundef %18) #2
%20 = getelementptr inbounds i8, ptr %4, i64 24
store i64 %19, ptr %20, align 8, !tbaa !12
%21 = icmp eq i64 %19, 0
br i1 %21, label %22, label %25
22: ; preds = %16
%23 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%24 = sub nsw i32 0, %23
br label %35
25: ; preds = %16
%26 = getelementptr inbounds i8, ptr %4, i64 40
store i64 %19, ptr %26, align 8, !tbaa !16
%27 = add nsw i64 %19, 1
%28 = getelementptr inbounds i8, ptr %4, i64 32
store i64 %27, ptr %28, align 8, !tbaa !17
%29 = load i32, ptr %2, align 4, !tbaa !18
%30 = getelementptr inbounds i8, ptr %4, i64 16
store i32 %29, ptr %30, align 8, !tbaa !20
%31 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %0, ptr %31, align 8, !tbaa !21
%32 = tail call i32 @mutex_init(ptr noundef nonnull %4) #2
%33 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef nonnull %4) #2
%34 = tail call i32 @kempld_detect_device(ptr noundef nonnull %4) #2
br label %35
35: ; preds = %25, %22, %13, %6
%36 = phi i32 [ %34, %25 ], [ %24, %22 ], [ %15, %13 ], [ %8, %6 ]
ret i32 %36
}
declare ptr @dev_get_platdata(ptr noundef) local_unnamed_addr #1
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @devm_ioport_map(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @resource_size(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #1
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kempld_detect_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"resource", !7, i64 0}
!12 = !{!13, !15, i64 24}
!13 = !{!"kempld_device_data", !7, i64 0, !14, i64 8, !7, i64 16, !15, i64 24, !15, i64 32, !15, i64 40}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!13, !15, i64 40}
!17 = !{!13, !15, i64 32}
!18 = !{!19, !7, i64 0}
!19 = !{!"kempld_platform_data", !7, i64 0}
!20 = !{!13, !7, i64 16}
!21 = !{!13, !14, i64 8}
| linux_drivers_mfd_extr_kempld-core.c_kempld_probe |
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_max8907.c_max8907_power_off.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_max8907.c_max8907_power_off.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@max8907_pm_off = dso_local local_unnamed_addr global ptr null, align 8
@MAX8907_REG_RESET_CNFG = dso_local local_unnamed_addr global i32 0, align 4
@MAX8907_MASK_POWER_OFF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @max8907_power_off], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @max8907_power_off() #0 {
%1 = load ptr, ptr @max8907_pm_off, align 8, !tbaa !5
%2 = load i32, ptr %1, align 4, !tbaa !9
%3 = load i32, ptr @MAX8907_REG_RESET_CNFG, align 4, !tbaa !12
%4 = load i32, ptr @MAX8907_MASK_POWER_OFF, align 4, !tbaa !12
%5 = tail call i32 @regmap_update_bits(i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %4) #2
ret void
}
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_max8907.c_max8907_power_off.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_max8907.c_max8907_power_off.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@max8907_pm_off = common local_unnamed_addr global ptr null, align 8
@MAX8907_REG_RESET_CNFG = common local_unnamed_addr global i32 0, align 4
@MAX8907_MASK_POWER_OFF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @max8907_power_off], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @max8907_power_off() #0 {
%1 = load ptr, ptr @max8907_pm_off, align 8, !tbaa !6
%2 = load i32, ptr %1, align 4, !tbaa !10
%3 = load i32, ptr @MAX8907_REG_RESET_CNFG, align 4, !tbaa !13
%4 = load i32, ptr @MAX8907_MASK_POWER_OFF, align 4, !tbaa !13
%5 = tail call i32 @regmap_update_bits(i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %4) #2
ret void
}
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_drivers_mfd_extr_max8907.c_max8907_power_off |
; ModuleID = 'AnghaBench/freebsd/sys/x86/cpufreq/extr_p4tcc.c_p4tcc_probe.c'
source_filename = "AnghaBench/freebsd/sys/x86/cpufreq/extr_p4tcc.c_p4tcc_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [6 x i8] c"p4tcc\00", align 1
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [30 x i8] c"CPU Frequency Thermal Control\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @p4tcc_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @p4tcc_probe(i32 noundef %0) #0 {
%2 = tail call i64 @resource_disabled(ptr noundef nonnull @.str, i32 noundef 0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %8
6: ; preds = %1
%7 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str.1) #2
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ 0, %6 ]
ret i32 %9
}
declare i64 @resource_disabled(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/x86/cpufreq/extr_p4tcc.c_p4tcc_probe.c'
source_filename = "AnghaBench/freebsd/sys/x86/cpufreq/extr_p4tcc.c_p4tcc_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c"p4tcc\00", align 1
@ENXIO = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [30 x i8] c"CPU Frequency Thermal Control\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @p4tcc_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @p4tcc_probe(i32 noundef %0) #0 {
%2 = tail call i64 @resource_disabled(ptr noundef nonnull @.str, i32 noundef 0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %8
6: ; preds = %1
%7 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str.1) #2
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ 0, %6 ]
ret i32 %9
}
declare i64 @resource_disabled(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_x86_cpufreq_extr_p4tcc.c_p4tcc_probe |
; ModuleID = 'AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdImageCompare.c'
source_filename = "AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdImageCompare.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_10__ = type { i64, i64, i64, i32, i32, i64 }
@GD_CMP_INTERLACE = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_TRANSPARENT = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_TRUECOLOR = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_SIZE_X = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_IMAGE = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_SIZE_Y = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_NUM_COLORS = dso_local local_unnamed_addr global i32 0, align 4
@GD_CMP_COLOR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @gdImageCompare(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = icmp eq i64 %3, %4
%6 = load i32, ptr @GD_CMP_INTERLACE, align 4
%7 = select i1 %5, i32 0, i32 %6
%8 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !11
%12 = icmp eq i64 %9, %11
%13 = load i32, ptr @GD_CMP_TRANSPARENT, align 4
%14 = select i1 %12, i32 0, i32 %13
%15 = or i32 %14, %7
%16 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 2
%17 = load i64, ptr %16, align 8, !tbaa !12
%18 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 2
%19 = load i64, ptr %18, align 8, !tbaa !12
%20 = icmp eq i64 %17, %19
%21 = load i32, ptr @GD_CMP_TRUECOLOR, align 4
%22 = select i1 %20, i32 0, i32 %21
%23 = or i32 %15, %22
%24 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 3
%25 = load i32, ptr %24, align 8, !tbaa !13
%26 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 3
%27 = load i32, ptr %26, align 8, !tbaa !13
%28 = icmp eq i32 %25, %27
br i1 %28, label %35, label %29
29: ; preds = %2
%30 = load i32, ptr @GD_CMP_SIZE_X, align 4, !tbaa !14
%31 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !14
%32 = add nsw i32 %31, %30
%33 = or i32 %32, %23
%34 = tail call i32 @llvm.smin.i32(i32 %27, i32 %25)
br label %35
35: ; preds = %29, %2
%36 = phi i32 [ %23, %2 ], [ %33, %29 ]
%37 = phi i32 [ %25, %2 ], [ %34, %29 ]
%38 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 4
%39 = load i32, ptr %38, align 4, !tbaa !15
%40 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 4
%41 = load i32, ptr %40, align 4, !tbaa !15
%42 = icmp eq i32 %39, %41
br i1 %42, label %49, label %43
43: ; preds = %35
%44 = load i32, ptr @GD_CMP_SIZE_Y, align 4, !tbaa !14
%45 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !14
%46 = add nsw i32 %45, %44
%47 = or i32 %46, %36
%48 = tail call i32 @llvm.smin.i32(i32 %41, i32 %39)
br label %49
49: ; preds = %43, %35
%50 = phi i32 [ %36, %35 ], [ %47, %43 ]
%51 = phi i32 [ %39, %35 ], [ %48, %43 ]
%52 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 5
%53 = load i64, ptr %52, align 8, !tbaa !16
%54 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 5
%55 = load i64, ptr %54, align 8, !tbaa !16
%56 = icmp eq i64 %53, %55
%57 = load i32, ptr @GD_CMP_NUM_COLORS, align 4
%58 = select i1 %56, i32 0, i32 %57
%59 = or i32 %58, %50
%60 = icmp sgt i32 %51, 0
br i1 %60, label %61, label %121
61: ; preds = %49
%62 = icmp sgt i32 %37, 0
br label %63
63: ; preds = %113, %61
%64 = phi i32 [ %59, %61 ], [ %114, %113 ]
%65 = phi i32 [ 0, %61 ], [ %118, %113 ]
br i1 %62, label %69, label %113
66: ; preds = %104
%67 = add nuw nsw i32 %70, 1
%68 = icmp eq i32 %67, %37
br i1 %68, label %113, label %69, !llvm.loop !17
69: ; preds = %63, %66
%70 = phi i32 [ %67, %66 ], [ 0, %63 ]
%71 = load i64, ptr %16, align 8, !tbaa !12
%72 = icmp eq i64 %71, 0
br i1 %72, label %75, label %73
73: ; preds = %69
%74 = tail call i32 @gdImageTrueColorPixel(ptr noundef nonnull %0, i32 noundef %70, i32 noundef %65) #3
br label %77
75: ; preds = %69
%76 = tail call i32 @gdImagePalettePixel(ptr noundef nonnull %0, i32 noundef %70, i32 noundef %65) #3
br label %77
77: ; preds = %75, %73
%78 = phi i32 [ %74, %73 ], [ %76, %75 ]
%79 = load i64, ptr %18, align 8, !tbaa !12
%80 = icmp eq i64 %79, 0
br i1 %80, label %83, label %81
81: ; preds = %77
%82 = tail call i32 @gdImageTrueColorPixel(ptr noundef nonnull %1, i32 noundef %70, i32 noundef %65) #3
br label %85
83: ; preds = %77
%84 = tail call i32 @gdImagePalettePixel(ptr noundef nonnull %1, i32 noundef %70, i32 noundef %65) #3
br label %85
85: ; preds = %83, %81
%86 = phi i32 [ %82, %81 ], [ %84, %83 ]
%87 = tail call i64 @gdImageRed(ptr noundef nonnull %0, i32 noundef %78) #3
%88 = tail call i64 @gdImageRed(ptr noundef nonnull %1, i32 noundef %86) #3
%89 = icmp eq i64 %87, %88
br i1 %89, label %95, label %90
90: ; preds = %85
%91 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !14
%92 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !14
%93 = add nsw i32 %92, %91
%94 = or i32 %93, %64
br label %113
95: ; preds = %85
%96 = tail call i64 @gdImageGreen(ptr noundef nonnull %0, i32 noundef %78) #3
%97 = tail call i64 @gdImageGreen(ptr noundef nonnull %1, i32 noundef %86) #3
%98 = icmp eq i64 %96, %97
br i1 %98, label %104, label %99
99: ; preds = %95
%100 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !14
%101 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !14
%102 = add nsw i32 %101, %100
%103 = or i32 %102, %64
br label %113
104: ; preds = %95
%105 = tail call i64 @gdImageBlue(ptr noundef nonnull %0, i32 noundef %78) #3
%106 = tail call i64 @gdImageBlue(ptr noundef nonnull %1, i32 noundef %86) #3
%107 = icmp eq i64 %105, %106
br i1 %107, label %66, label %108
108: ; preds = %104
%109 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !14
%110 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !14
%111 = add nsw i32 %110, %109
%112 = or i32 %111, %64
br label %113
113: ; preds = %66, %63, %108, %99, %90
%114 = phi i32 [ %94, %90 ], [ %103, %99 ], [ %112, %108 ], [ %64, %63 ], [ %64, %66 ]
%115 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !14
%116 = and i32 %115, %114
%117 = icmp ne i32 %116, 0
%118 = add nuw nsw i32 %65, 1
%119 = icmp eq i32 %118, %51
%120 = select i1 %117, i1 true, i1 %119
br i1 %120, label %121, label %63, !llvm.loop !19
121: ; preds = %113, %49
%122 = phi i32 [ %59, %49 ], [ %114, %113 ]
ret i32 %122
}
declare i32 @gdImageTrueColorPixel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gdImagePalettePixel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gdImageRed(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gdImageGreen(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gdImageBlue(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_10__", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !10, i64 28, !7, i64 32}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !10, i64 24}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !10, i64 28}
!16 = !{!6, !7, i64 32}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
| ; ModuleID = 'AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdImageCompare.c'
source_filename = "AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdImageCompare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GD_CMP_INTERLACE = common local_unnamed_addr global i32 0, align 4
@GD_CMP_TRANSPARENT = common local_unnamed_addr global i32 0, align 4
@GD_CMP_TRUECOLOR = common local_unnamed_addr global i32 0, align 4
@GD_CMP_SIZE_X = common local_unnamed_addr global i32 0, align 4
@GD_CMP_IMAGE = common local_unnamed_addr global i32 0, align 4
@GD_CMP_SIZE_Y = common local_unnamed_addr global i32 0, align 4
@GD_CMP_NUM_COLORS = common local_unnamed_addr global i32 0, align 4
@GD_CMP_COLOR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @gdImageCompare(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = icmp eq i64 %3, %4
%6 = load i32, ptr @GD_CMP_INTERLACE, align 4
%7 = select i1 %5, i32 0, i32 %6
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !12
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !12
%12 = icmp eq i64 %9, %11
%13 = load i32, ptr @GD_CMP_TRANSPARENT, align 4
%14 = select i1 %12, i32 0, i32 %13
%15 = or i32 %14, %7
%16 = getelementptr inbounds i8, ptr %0, i64 16
%17 = load i64, ptr %16, align 8, !tbaa !13
%18 = getelementptr inbounds i8, ptr %1, i64 16
%19 = load i64, ptr %18, align 8, !tbaa !13
%20 = icmp eq i64 %17, %19
%21 = load i32, ptr @GD_CMP_TRUECOLOR, align 4
%22 = select i1 %20, i32 0, i32 %21
%23 = or i32 %15, %22
%24 = getelementptr inbounds i8, ptr %0, i64 24
%25 = load i32, ptr %24, align 8, !tbaa !14
%26 = getelementptr inbounds i8, ptr %1, i64 24
%27 = load i32, ptr %26, align 8, !tbaa !14
%28 = icmp eq i32 %25, %27
br i1 %28, label %35, label %29
29: ; preds = %2
%30 = load i32, ptr @GD_CMP_SIZE_X, align 4, !tbaa !15
%31 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !15
%32 = add nsw i32 %31, %30
%33 = or i32 %32, %23
%34 = tail call i32 @llvm.smin.i32(i32 %27, i32 %25)
br label %35
35: ; preds = %29, %2
%36 = phi i32 [ %23, %2 ], [ %33, %29 ]
%37 = phi i32 [ %25, %2 ], [ %34, %29 ]
%38 = getelementptr inbounds i8, ptr %0, i64 28
%39 = load i32, ptr %38, align 4, !tbaa !16
%40 = getelementptr inbounds i8, ptr %1, i64 28
%41 = load i32, ptr %40, align 4, !tbaa !16
%42 = icmp eq i32 %39, %41
br i1 %42, label %49, label %43
43: ; preds = %35
%44 = load i32, ptr @GD_CMP_SIZE_Y, align 4, !tbaa !15
%45 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !15
%46 = add nsw i32 %45, %44
%47 = or i32 %46, %36
%48 = tail call i32 @llvm.smin.i32(i32 %41, i32 %39)
br label %49
49: ; preds = %43, %35
%50 = phi i32 [ %36, %35 ], [ %47, %43 ]
%51 = phi i32 [ %39, %35 ], [ %48, %43 ]
%52 = getelementptr inbounds i8, ptr %0, i64 32
%53 = load i64, ptr %52, align 8, !tbaa !17
%54 = getelementptr inbounds i8, ptr %1, i64 32
%55 = load i64, ptr %54, align 8, !tbaa !17
%56 = icmp eq i64 %53, %55
%57 = load i32, ptr @GD_CMP_NUM_COLORS, align 4
%58 = select i1 %56, i32 0, i32 %57
%59 = or i32 %58, %50
%60 = icmp sgt i32 %51, 0
br i1 %60, label %61, label %121
61: ; preds = %49
%62 = icmp sgt i32 %37, 0
br label %63
63: ; preds = %113, %61
%64 = phi i32 [ %59, %61 ], [ %114, %113 ]
%65 = phi i32 [ 0, %61 ], [ %118, %113 ]
br i1 %62, label %69, label %113
66: ; preds = %104
%67 = add nuw nsw i32 %70, 1
%68 = icmp eq i32 %67, %37
br i1 %68, label %113, label %69, !llvm.loop !18
69: ; preds = %63, %66
%70 = phi i32 [ %67, %66 ], [ 0, %63 ]
%71 = load i64, ptr %16, align 8, !tbaa !13
%72 = icmp eq i64 %71, 0
br i1 %72, label %75, label %73
73: ; preds = %69
%74 = tail call i32 @gdImageTrueColorPixel(ptr noundef nonnull %0, i32 noundef %70, i32 noundef %65) #3
br label %77
75: ; preds = %69
%76 = tail call i32 @gdImagePalettePixel(ptr noundef nonnull %0, i32 noundef %70, i32 noundef %65) #3
br label %77
77: ; preds = %75, %73
%78 = phi i32 [ %74, %73 ], [ %76, %75 ]
%79 = load i64, ptr %18, align 8, !tbaa !13
%80 = icmp eq i64 %79, 0
br i1 %80, label %83, label %81
81: ; preds = %77
%82 = tail call i32 @gdImageTrueColorPixel(ptr noundef nonnull %1, i32 noundef %70, i32 noundef %65) #3
br label %85
83: ; preds = %77
%84 = tail call i32 @gdImagePalettePixel(ptr noundef nonnull %1, i32 noundef %70, i32 noundef %65) #3
br label %85
85: ; preds = %83, %81
%86 = phi i32 [ %82, %81 ], [ %84, %83 ]
%87 = tail call i64 @gdImageRed(ptr noundef nonnull %0, i32 noundef %78) #3
%88 = tail call i64 @gdImageRed(ptr noundef nonnull %1, i32 noundef %86) #3
%89 = icmp eq i64 %87, %88
br i1 %89, label %95, label %90
90: ; preds = %85
%91 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !15
%92 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !15
%93 = add nsw i32 %92, %91
%94 = or i32 %93, %64
br label %113
95: ; preds = %85
%96 = tail call i64 @gdImageGreen(ptr noundef nonnull %0, i32 noundef %78) #3
%97 = tail call i64 @gdImageGreen(ptr noundef nonnull %1, i32 noundef %86) #3
%98 = icmp eq i64 %96, %97
br i1 %98, label %104, label %99
99: ; preds = %95
%100 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !15
%101 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !15
%102 = add nsw i32 %101, %100
%103 = or i32 %102, %64
br label %113
104: ; preds = %95
%105 = tail call i64 @gdImageBlue(ptr noundef nonnull %0, i32 noundef %78) #3
%106 = tail call i64 @gdImageBlue(ptr noundef nonnull %1, i32 noundef %86) #3
%107 = icmp eq i64 %105, %106
br i1 %107, label %66, label %108
108: ; preds = %104
%109 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !15
%110 = load i32, ptr @GD_CMP_IMAGE, align 4, !tbaa !15
%111 = add nsw i32 %110, %109
%112 = or i32 %111, %64
br label %113
113: ; preds = %66, %63, %108, %99, %90
%114 = phi i32 [ %94, %90 ], [ %103, %99 ], [ %112, %108 ], [ %64, %63 ], [ %64, %66 ]
%115 = load i32, ptr @GD_CMP_COLOR, align 4, !tbaa !15
%116 = and i32 %115, %114
%117 = icmp ne i32 %116, 0
%118 = add nuw nsw i32 %65, 1
%119 = icmp eq i32 %118, %51
%120 = select i1 %117, i1 true, i1 %119
br i1 %120, label %121, label %63, !llvm.loop !20
121: ; preds = %113, %49
%122 = phi i32 [ %59, %49 ], [ %114, %113 ]
ret i32 %122
}
declare i32 @gdImageTrueColorPixel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gdImagePalettePixel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gdImageRed(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gdImageGreen(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @gdImageBlue(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_10__", !8, i64 0, !8, i64 8, !8, i64 16, !11, i64 24, !11, i64 28, !8, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !11, i64 24}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !11, i64 28}
!17 = !{!7, !8, i64 32}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
| php-src_ext_gd_libgd_extr_gd.c_gdImageCompare |
; ModuleID = 'AnghaBench/exploitdb/exploits/linux/dos/extr_22273.c_main.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/dos/extr_22273.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [10 x i8] c"/dev/null\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"w\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c"%10240s\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.4 = private unnamed_addr constant [16 x i8] c"gzprintf -> %d\0A\00", align 1
@.str.5 = private unnamed_addr constant [20 x i8] c"gzclose -> %d [%d]\0A\00", align 1
@errno = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
%1 = tail call i32 @gzopen(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1) #4
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @perror(ptr noundef nonnull @.str) #4
%5 = tail call i32 @exit(i32 noundef 1) #5
unreachable
6: ; preds = %0
%7 = tail call i32 @gzprintf(i32 noundef %1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #4
%8 = tail call i32 (ptr, i32, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %7)
%9 = tail call i32 @gzclose(i32 noundef %1) #4
%10 = load i32, ptr @errno, align 4, !tbaa !5
%11 = tail call i32 (ptr, i32, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %9, i32 noundef %10)
%12 = tail call i32 @exit(i32 noundef 0) #5
unreachable
}
declare i32 @gzopen(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @perror(ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
declare i32 @gzprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, i32 noundef, ...) local_unnamed_addr #3
declare i32 @gzclose(i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/linux/dos/extr_22273.c_main.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/dos/extr_22273.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [10 x i8] c"/dev/null\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"w\00", align 1
@.str.2 = private unnamed_addr constant [8 x i8] c"%10240s\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.4 = private unnamed_addr constant [16 x i8] c"gzprintf -> %d\0A\00", align 1
@.str.5 = private unnamed_addr constant [20 x i8] c"gzclose -> %d [%d]\0A\00", align 1
@errno = common local_unnamed_addr global i32 0, align 4
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define noundef i32 @main() local_unnamed_addr #0 {
%1 = tail call i32 @gzopen(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1) #4
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = tail call i32 @perror(ptr noundef nonnull @.str) #4
%5 = tail call i32 @exit(i32 noundef 1) #5
unreachable
6: ; preds = %0
%7 = tail call i32 @gzprintf(i32 noundef %1, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #4
%8 = tail call i32 (ptr, i32, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %7)
%9 = tail call i32 @gzclose(i32 noundef %1) #4
%10 = load i32, ptr @errno, align 4, !tbaa !6
%11 = tail call i32 (ptr, i32, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5, i32 noundef %9, i32 noundef %10)
%12 = tail call i32 @exit(i32 noundef 0) #5
unreachable
}
declare i32 @gzopen(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @perror(ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
declare i32 @gzprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, i32 noundef, ...) local_unnamed_addr #3
declare i32 @gzclose(i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| exploitdb_exploits_linux_dos_extr_22273.c_main |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/core/extr_cm_msgs.h_cm_req_set_primary_packet_rate.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/core/extr_cm_msgs.h_cm_req_set_primary_packet_rate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cm_req_set_primary_packet_rate], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @cm_req_set_primary_packet_rate(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @be32_to_cpu(i32 noundef %3) #2
%5 = and i32 %4, -64
%6 = and i32 %1, 63
%7 = or disjoint i32 %5, %6
%8 = tail call i32 @cpu_to_be32(i32 noundef %7) #2
store i32 %8, ptr %0, align 4, !tbaa !5
ret void
}
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cm_req_msg", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/core/extr_cm_msgs.h_cm_req_set_primary_packet_rate.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/core/extr_cm_msgs.h_cm_req_set_primary_packet_rate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cm_req_set_primary_packet_rate], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @cm_req_set_primary_packet_rate(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @be32_to_cpu(i32 noundef %3) #2
%5 = and i32 %4, -64
%6 = and i32 %1, 63
%7 = or disjoint i32 %5, %6
%8 = tail call i32 @cpu_to_be32(i32 noundef %7) #2
store i32 %8, ptr %0, align 4, !tbaa !6
ret void
}
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cm_req_msg", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_infiniband_core_extr_cm_msgs.h_cm_req_set_primary_packet_rate |
; ModuleID = 'AnghaBench/linux/fs/romfs/extr_super.c_romfs_i_init_once.c'
source_filename = "AnghaBench/linux/fs/romfs/extr_super.c_romfs_i_init_once.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @romfs_i_init_once], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @romfs_i_init_once(ptr noundef %0) #0 {
%2 = tail call i32 @inode_init_once(ptr noundef %0) #2
ret void
}
declare i32 @inode_init_once(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/fs/romfs/extr_super.c_romfs_i_init_once.c'
source_filename = "AnghaBench/linux/fs/romfs/extr_super.c_romfs_i_init_once.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @romfs_i_init_once], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @romfs_i_init_once(ptr noundef %0) #0 {
%2 = tail call i32 @inode_init_once(ptr noundef %0) #2
ret void
}
declare i32 @inode_init_once(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_fs_romfs_extr_super.c_romfs_i_init_once |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_xtalk.c_vortex_XtalkHw_init.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_xtalk.c_vortex_XtalkHw_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @vortex_XtalkHw_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vortex_XtalkHw_init(ptr noundef %0) #0 {
%2 = tail call i32 @vortex_XtalkHw_ZeroState(ptr noundef %0) #2
ret void
}
declare i32 @vortex_XtalkHw_ZeroState(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_xtalk.c_vortex_XtalkHw_init.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_xtalk.c_vortex_XtalkHw_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vortex_XtalkHw_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vortex_XtalkHw_init(ptr noundef %0) #0 {
%2 = tail call i32 @vortex_XtalkHw_ZeroState(ptr noundef %0) #2
ret void
}
declare i32 @vortex_XtalkHw_ZeroState(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_sound_pci_au88x0_extr_au88x0_xtalk.c_vortex_XtalkHw_init |
; ModuleID = 'AnghaBench/darwin-xnu/san/extr_kasan-arm64.c_kasan_map_shadow_internal.c'
source_filename = "AnghaBench/darwin-xnu/san/extr_kasan-arm64.c_kasan_map_shadow_internal.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ARM_PGMASK = dso_local local_unnamed_addr global i32 0, align 4
@KASAN_SHADOW_MIN = dso_local local_unnamed_addr global i64 0, align 8
@KASAN_SHADOW_MAX = dso_local local_unnamed_addr global i64 0, align 8
@cpu_tte = dso_local local_unnamed_addr global ptr null, align 8
@ARM_TT_L1_INDEX_MASK = dso_local local_unnamed_addr global i64 0, align 8
@ARM_TT_L1_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@ARM_TTE_VALID = dso_local local_unnamed_addr global i32 0, align 4
@ARM_TTE_TYPE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@ARM_TTE_TYPE_TABLE = dso_local local_unnamed_addr global i32 0, align 4
@ARM_TTE_TABLE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@ARM_TT_L2_INDEX_MASK = dso_local local_unnamed_addr global i64 0, align 8
@ARM_TT_L2_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@ARM_TT_L3_INDEX_MASK = dso_local local_unnamed_addr global i64 0, align 8
@ARM_TT_L3_SHIFT = dso_local local_unnamed_addr global i64 0, align 8
@ARM_PTE_TYPE_VALID = dso_local local_unnamed_addr global i32 0, align 4
@ARM_PTE_APMASK = dso_local local_unnamed_addr global i32 0, align 4
@AP_RONA = dso_local local_unnamed_addr global i32 0, align 4
@zero_page_phys = dso_local local_unnamed_addr global i64 0, align 8
@AP_RWNA = dso_local local_unnamed_addr global i32 0, align 4
@ARM_PTE_AF = dso_local local_unnamed_addr global i32 0, align 4
@SH_OUTER_MEMORY = dso_local local_unnamed_addr global i32 0, align 4
@CACHE_ATTRINDX_DEFAULT = dso_local local_unnamed_addr global i32 0, align 4
@ARM_PTE_NX = dso_local local_unnamed_addr global i32 0, align 4
@ARM_PTE_PNX = dso_local local_unnamed_addr global i32 0, align 4
@ARM_PGBYTES = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @kasan_map_shadow_internal], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @kasan_map_shadow_internal(i64 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = add i32 %1, 7
%6 = and i32 %5, -8
%7 = tail call i32 @SHADOW_FOR_ADDRESS(i64 noundef %0) #2
%8 = load i32, ptr @ARM_PGMASK, align 4, !tbaa !5
%9 = tail call i64 @vm_map_trunc_page(i32 noundef %7, i32 noundef %8) #2
%10 = sext i32 %6 to i64
%11 = add nsw i64 %10, %0
%12 = tail call i32 @SHADOW_FOR_ADDRESS(i64 noundef %11) #2
%13 = load i32, ptr @ARM_PGMASK, align 4, !tbaa !5
%14 = tail call i64 @vm_map_round_page(i32 noundef %12, i32 noundef %13) #2
%15 = load i64, ptr @KASAN_SHADOW_MIN, align 8, !tbaa !9
%16 = icmp sge i64 %9, %15
%17 = load i64, ptr @KASAN_SHADOW_MAX, align 8
%18 = icmp sle i64 %14, %17
%19 = select i1 %16, i1 %18, i1 false
%20 = zext i1 %19 to i32
%21 = tail call i32 @assert(i32 noundef %20) #2
%22 = tail call i32 @assert(i32 noundef 1) #2
%23 = icmp slt i64 %9, %14
br i1 %23, label %24, label %142
24: ; preds = %4
%25 = icmp eq i32 %3, 0
%26 = icmp ne i32 %2, 0
%27 = icmp eq i32 %2, 0
br label %28
28: ; preds = %24, %138
%29 = phi i64 [ %9, %24 ], [ %140, %138 ]
%30 = load ptr, ptr @cpu_tte, align 8, !tbaa !11
%31 = load i64, ptr @ARM_TT_L1_INDEX_MASK, align 8, !tbaa !9
%32 = and i64 %31, %29
%33 = load i64, ptr @ARM_TT_L1_SHIFT, align 8, !tbaa !9
%34 = ashr i64 %32, %33
%35 = getelementptr inbounds i32, ptr %30, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !5
%37 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !5
%38 = and i32 %37, %36
%39 = icmp eq i32 %38, 0
br i1 %39, label %48, label %40
40: ; preds = %28
%41 = load i32, ptr @ARM_TTE_TYPE_MASK, align 4, !tbaa !5
%42 = and i32 %41, %36
%43 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !5
%44 = icmp eq i32 %42, %43
%45 = zext i1 %44 to i32
%46 = tail call i32 @assert(i32 noundef %45) #2
%47 = load i32, ptr %35, align 4, !tbaa !5
br label %57
48: ; preds = %28
%49 = tail call i64 (...) @alloc_zero_page() #2
%50 = trunc i64 %49 to i32
%51 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !5
%52 = and i32 %51, %50
%53 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !5
%54 = or i32 %52, %53
%55 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !5
%56 = or i32 %54, %55
store i32 %56, ptr %35, align 4, !tbaa !5
br label %57
57: ; preds = %48, %40
%58 = phi i32 [ %56, %48 ], [ %47, %40 ]
%59 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !5
%60 = and i32 %59, %58
%61 = tail call i64 @phystokv(i32 noundef %60) #2
%62 = inttoptr i64 %61 to ptr
%63 = load i64, ptr @ARM_TT_L2_INDEX_MASK, align 8, !tbaa !9
%64 = and i64 %63, %29
%65 = load i64, ptr @ARM_TT_L2_SHIFT, align 8, !tbaa !9
%66 = ashr i64 %64, %65
%67 = getelementptr inbounds i32, ptr %62, i64 %66
%68 = load i32, ptr %67, align 4, !tbaa !5
%69 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !5
%70 = and i32 %69, %68
%71 = icmp eq i32 %70, 0
br i1 %71, label %80, label %72
72: ; preds = %57
%73 = load i32, ptr @ARM_TTE_TYPE_MASK, align 4, !tbaa !5
%74 = and i32 %73, %68
%75 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !5
%76 = icmp eq i32 %74, %75
%77 = zext i1 %76 to i32
%78 = tail call i32 @assert(i32 noundef %77) #2
%79 = load i32, ptr %67, align 4, !tbaa !5
br label %89
80: ; preds = %57
%81 = tail call i64 (...) @alloc_zero_page() #2
%82 = trunc i64 %81 to i32
%83 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !5
%84 = and i32 %83, %82
%85 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !5
%86 = or i32 %84, %85
%87 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !5
%88 = or i32 %86, %87
store i32 %88, ptr %67, align 4, !tbaa !5
br label %89
89: ; preds = %80, %72
%90 = phi i32 [ %88, %80 ], [ %79, %72 ]
%91 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !5
%92 = and i32 %91, %90
%93 = tail call i64 @phystokv(i32 noundef %92) #2
br i1 %25, label %138, label %94
94: ; preds = %89
%95 = inttoptr i64 %93 to ptr
%96 = load i64, ptr @ARM_TT_L3_INDEX_MASK, align 8, !tbaa !9
%97 = and i64 %96, %29
%98 = load i64, ptr @ARM_TT_L3_SHIFT, align 8, !tbaa !9
%99 = ashr i64 %97, %98
%100 = getelementptr inbounds i32, ptr %95, i64 %99
%101 = load i32, ptr %100, align 4, !tbaa !5
%102 = load i32, ptr @ARM_PTE_TYPE_VALID, align 4, !tbaa !5
%103 = and i32 %102, %101
%104 = icmp eq i32 %103, 0
br i1 %104, label %112, label %105
105: ; preds = %94
%106 = load i32, ptr @ARM_PTE_APMASK, align 4, !tbaa !5
%107 = and i32 %106, %101
%108 = load i32, ptr @AP_RONA, align 4, !tbaa !5
%109 = tail call i32 @ARM_PTE_AP(i32 noundef %108) #2
%110 = icmp ne i32 %107, %109
%111 = or i1 %26, %110
br i1 %111, label %138, label %115
112: ; preds = %94
br i1 %27, label %115, label %113
113: ; preds = %112
%114 = load i64, ptr @zero_page_phys, align 8, !tbaa !9
br label %117
115: ; preds = %105, %112
%116 = tail call i64 (...) @alloc_zero_page() #2
br label %117
117: ; preds = %115, %113
%118 = phi i64 [ %116, %115 ], [ %114, %113 ]
%119 = phi ptr [ @AP_RWNA, %115 ], [ @AP_RONA, %113 ]
%120 = trunc i64 %118 to i32
%121 = load i32, ptr %119, align 4, !tbaa !5
%122 = tail call i32 @ARM_PTE_AP(i32 noundef %121) #2
%123 = or i32 %122, %120
%124 = load i32, ptr @ARM_PTE_TYPE_VALID, align 4, !tbaa !5
%125 = load i32, ptr @ARM_PTE_AF, align 4, !tbaa !5
%126 = load i32, ptr @SH_OUTER_MEMORY, align 4, !tbaa !5
%127 = tail call i32 @ARM_PTE_SH(i32 noundef %126) #2
%128 = load i32, ptr @CACHE_ATTRINDX_DEFAULT, align 4, !tbaa !5
%129 = tail call i32 @ARM_PTE_ATTRINDX(i32 noundef %128) #2
%130 = load i32, ptr @ARM_PTE_NX, align 4, !tbaa !5
%131 = load i32, ptr @ARM_PTE_PNX, align 4, !tbaa !5
%132 = or i32 %124, %123
%133 = or i32 %132, %125
%134 = or i32 %133, %127
%135 = or i32 %134, %129
%136 = or i32 %135, %130
%137 = or i32 %136, %131
store i32 %137, ptr %100, align 4, !tbaa !5
br label %138
138: ; preds = %117, %105, %89
%139 = load i64, ptr @ARM_PGBYTES, align 8, !tbaa !9
%140 = add nsw i64 %139, %29
%141 = icmp slt i64 %140, %14
br i1 %141, label %28, label %142, !llvm.loop !13
142: ; preds = %138, %4
%143 = tail call i32 (...) @flush_mmu_tlb() #2
ret void
}
declare i64 @vm_map_trunc_page(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SHADOW_FOR_ADDRESS(i64 noundef) local_unnamed_addr #1
declare i64 @vm_map_round_page(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @alloc_zero_page(...) local_unnamed_addr #1
declare i64 @phystokv(i32 noundef) local_unnamed_addr #1
declare i32 @ARM_PTE_AP(i32 noundef) local_unnamed_addr #1
declare i32 @ARM_PTE_SH(i32 noundef) local_unnamed_addr #1
declare i32 @ARM_PTE_ATTRINDX(i32 noundef) local_unnamed_addr #1
declare i32 @flush_mmu_tlb(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/darwin-xnu/san/extr_kasan-arm64.c_kasan_map_shadow_internal.c'
source_filename = "AnghaBench/darwin-xnu/san/extr_kasan-arm64.c_kasan_map_shadow_internal.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ARM_PGMASK = common local_unnamed_addr global i32 0, align 4
@KASAN_SHADOW_MIN = common local_unnamed_addr global i64 0, align 8
@KASAN_SHADOW_MAX = common local_unnamed_addr global i64 0, align 8
@cpu_tte = common local_unnamed_addr global ptr null, align 8
@ARM_TT_L1_INDEX_MASK = common local_unnamed_addr global i64 0, align 8
@ARM_TT_L1_SHIFT = common local_unnamed_addr global i64 0, align 8
@ARM_TTE_VALID = common local_unnamed_addr global i32 0, align 4
@ARM_TTE_TYPE_MASK = common local_unnamed_addr global i32 0, align 4
@ARM_TTE_TYPE_TABLE = common local_unnamed_addr global i32 0, align 4
@ARM_TTE_TABLE_MASK = common local_unnamed_addr global i32 0, align 4
@ARM_TT_L2_INDEX_MASK = common local_unnamed_addr global i64 0, align 8
@ARM_TT_L2_SHIFT = common local_unnamed_addr global i64 0, align 8
@ARM_TT_L3_INDEX_MASK = common local_unnamed_addr global i64 0, align 8
@ARM_TT_L3_SHIFT = common local_unnamed_addr global i64 0, align 8
@ARM_PTE_TYPE_VALID = common local_unnamed_addr global i32 0, align 4
@ARM_PTE_APMASK = common local_unnamed_addr global i32 0, align 4
@AP_RONA = common local_unnamed_addr global i32 0, align 4
@zero_page_phys = common local_unnamed_addr global i64 0, align 8
@AP_RWNA = common local_unnamed_addr global i32 0, align 4
@ARM_PTE_AF = common local_unnamed_addr global i32 0, align 4
@SH_OUTER_MEMORY = common local_unnamed_addr global i32 0, align 4
@CACHE_ATTRINDX_DEFAULT = common local_unnamed_addr global i32 0, align 4
@ARM_PTE_NX = common local_unnamed_addr global i32 0, align 4
@ARM_PTE_PNX = common local_unnamed_addr global i32 0, align 4
@ARM_PGBYTES = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @kasan_map_shadow_internal], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @kasan_map_shadow_internal(i64 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = add i32 %1, 7
%6 = and i32 %5, -8
%7 = tail call i32 @SHADOW_FOR_ADDRESS(i64 noundef %0) #2
%8 = load i32, ptr @ARM_PGMASK, align 4, !tbaa !6
%9 = tail call i64 @vm_map_trunc_page(i32 noundef %7, i32 noundef %8) #2
%10 = sext i32 %6 to i64
%11 = add nsw i64 %10, %0
%12 = tail call i32 @SHADOW_FOR_ADDRESS(i64 noundef %11) #2
%13 = load i32, ptr @ARM_PGMASK, align 4, !tbaa !6
%14 = tail call i64 @vm_map_round_page(i32 noundef %12, i32 noundef %13) #2
%15 = load i64, ptr @KASAN_SHADOW_MIN, align 8, !tbaa !10
%16 = icmp sge i64 %9, %15
%17 = load i64, ptr @KASAN_SHADOW_MAX, align 8
%18 = icmp sle i64 %14, %17
%19 = select i1 %16, i1 %18, i1 false
%20 = zext i1 %19 to i32
%21 = tail call i32 @assert(i32 noundef %20) #2
%22 = tail call i32 @assert(i32 noundef 1) #2
%23 = icmp slt i64 %9, %14
br i1 %23, label %24, label %142
24: ; preds = %4
%25 = icmp eq i32 %3, 0
%26 = icmp ne i32 %2, 0
%27 = icmp eq i32 %2, 0
br label %28
28: ; preds = %24, %138
%29 = phi i64 [ %9, %24 ], [ %140, %138 ]
%30 = load ptr, ptr @cpu_tte, align 8, !tbaa !12
%31 = load i64, ptr @ARM_TT_L1_INDEX_MASK, align 8, !tbaa !10
%32 = and i64 %31, %29
%33 = load i64, ptr @ARM_TT_L1_SHIFT, align 8, !tbaa !10
%34 = ashr i64 %32, %33
%35 = getelementptr inbounds i32, ptr %30, i64 %34
%36 = load i32, ptr %35, align 4, !tbaa !6
%37 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !6
%38 = and i32 %37, %36
%39 = icmp eq i32 %38, 0
br i1 %39, label %48, label %40
40: ; preds = %28
%41 = load i32, ptr @ARM_TTE_TYPE_MASK, align 4, !tbaa !6
%42 = and i32 %41, %36
%43 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !6
%44 = icmp eq i32 %42, %43
%45 = zext i1 %44 to i32
%46 = tail call i32 @assert(i32 noundef %45) #2
%47 = load i32, ptr %35, align 4, !tbaa !6
br label %57
48: ; preds = %28
%49 = tail call i64 @alloc_zero_page() #2
%50 = trunc i64 %49 to i32
%51 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !6
%52 = and i32 %51, %50
%53 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !6
%54 = or i32 %52, %53
%55 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !6
%56 = or i32 %54, %55
store i32 %56, ptr %35, align 4, !tbaa !6
br label %57
57: ; preds = %48, %40
%58 = phi i32 [ %56, %48 ], [ %47, %40 ]
%59 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !6
%60 = and i32 %59, %58
%61 = tail call i64 @phystokv(i32 noundef %60) #2
%62 = inttoptr i64 %61 to ptr
%63 = load i64, ptr @ARM_TT_L2_INDEX_MASK, align 8, !tbaa !10
%64 = and i64 %63, %29
%65 = load i64, ptr @ARM_TT_L2_SHIFT, align 8, !tbaa !10
%66 = ashr i64 %64, %65
%67 = getelementptr inbounds i32, ptr %62, i64 %66
%68 = load i32, ptr %67, align 4, !tbaa !6
%69 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !6
%70 = and i32 %69, %68
%71 = icmp eq i32 %70, 0
br i1 %71, label %80, label %72
72: ; preds = %57
%73 = load i32, ptr @ARM_TTE_TYPE_MASK, align 4, !tbaa !6
%74 = and i32 %73, %68
%75 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !6
%76 = icmp eq i32 %74, %75
%77 = zext i1 %76 to i32
%78 = tail call i32 @assert(i32 noundef %77) #2
%79 = load i32, ptr %67, align 4, !tbaa !6
br label %89
80: ; preds = %57
%81 = tail call i64 @alloc_zero_page() #2
%82 = trunc i64 %81 to i32
%83 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !6
%84 = and i32 %83, %82
%85 = load i32, ptr @ARM_TTE_VALID, align 4, !tbaa !6
%86 = or i32 %84, %85
%87 = load i32, ptr @ARM_TTE_TYPE_TABLE, align 4, !tbaa !6
%88 = or i32 %86, %87
store i32 %88, ptr %67, align 4, !tbaa !6
br label %89
89: ; preds = %80, %72
%90 = phi i32 [ %88, %80 ], [ %79, %72 ]
%91 = load i32, ptr @ARM_TTE_TABLE_MASK, align 4, !tbaa !6
%92 = and i32 %91, %90
%93 = tail call i64 @phystokv(i32 noundef %92) #2
br i1 %25, label %138, label %94
94: ; preds = %89
%95 = inttoptr i64 %93 to ptr
%96 = load i64, ptr @ARM_TT_L3_INDEX_MASK, align 8, !tbaa !10
%97 = and i64 %96, %29
%98 = load i64, ptr @ARM_TT_L3_SHIFT, align 8, !tbaa !10
%99 = ashr i64 %97, %98
%100 = getelementptr inbounds i32, ptr %95, i64 %99
%101 = load i32, ptr %100, align 4, !tbaa !6
%102 = load i32, ptr @ARM_PTE_TYPE_VALID, align 4, !tbaa !6
%103 = and i32 %102, %101
%104 = icmp eq i32 %103, 0
br i1 %104, label %112, label %105
105: ; preds = %94
%106 = load i32, ptr @ARM_PTE_APMASK, align 4, !tbaa !6
%107 = and i32 %106, %101
%108 = load i32, ptr @AP_RONA, align 4, !tbaa !6
%109 = tail call i32 @ARM_PTE_AP(i32 noundef %108) #2
%110 = icmp ne i32 %107, %109
%111 = or i1 %26, %110
br i1 %111, label %138, label %115
112: ; preds = %94
br i1 %27, label %115, label %113
113: ; preds = %112
%114 = load i64, ptr @zero_page_phys, align 8, !tbaa !10
br label %117
115: ; preds = %105, %112
%116 = tail call i64 @alloc_zero_page() #2
br label %117
117: ; preds = %115, %113
%118 = phi i64 [ %116, %115 ], [ %114, %113 ]
%119 = phi ptr [ @AP_RWNA, %115 ], [ @AP_RONA, %113 ]
%120 = trunc i64 %118 to i32
%121 = load i32, ptr %119, align 4, !tbaa !6
%122 = tail call i32 @ARM_PTE_AP(i32 noundef %121) #2
%123 = or i32 %122, %120
%124 = load i32, ptr @ARM_PTE_TYPE_VALID, align 4, !tbaa !6
%125 = load i32, ptr @ARM_PTE_AF, align 4, !tbaa !6
%126 = load i32, ptr @SH_OUTER_MEMORY, align 4, !tbaa !6
%127 = tail call i32 @ARM_PTE_SH(i32 noundef %126) #2
%128 = load i32, ptr @CACHE_ATTRINDX_DEFAULT, align 4, !tbaa !6
%129 = tail call i32 @ARM_PTE_ATTRINDX(i32 noundef %128) #2
%130 = load i32, ptr @ARM_PTE_NX, align 4, !tbaa !6
%131 = load i32, ptr @ARM_PTE_PNX, align 4, !tbaa !6
%132 = or i32 %124, %123
%133 = or i32 %132, %125
%134 = or i32 %133, %127
%135 = or i32 %134, %129
%136 = or i32 %135, %130
%137 = or i32 %136, %131
store i32 %137, ptr %100, align 4, !tbaa !6
br label %138
138: ; preds = %117, %105, %89
%139 = load i64, ptr @ARM_PGBYTES, align 8, !tbaa !10
%140 = add nsw i64 %139, %29
%141 = icmp slt i64 %140, %14
br i1 %141, label %28, label %142, !llvm.loop !14
142: ; preds = %138, %4
%143 = tail call i32 @flush_mmu_tlb() #2
ret void
}
declare i64 @vm_map_trunc_page(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SHADOW_FOR_ADDRESS(i64 noundef) local_unnamed_addr #1
declare i64 @vm_map_round_page(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i64 @alloc_zero_page(...) local_unnamed_addr #1
declare i64 @phystokv(i32 noundef) local_unnamed_addr #1
declare i32 @ARM_PTE_AP(i32 noundef) local_unnamed_addr #1
declare i32 @ARM_PTE_SH(i32 noundef) local_unnamed_addr #1
declare i32 @ARM_PTE_ATTRINDX(i32 noundef) local_unnamed_addr #1
declare i32 @flush_mmu_tlb(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| darwin-xnu_san_extr_kasan-arm64.c_kasan_map_shadow_internal |
; ModuleID = 'AnghaBench/TDengine/deps/iconv/extr_cp853.h_cp853_mbtowc.c'
source_filename = "AnghaBench/TDengine/deps/iconv/extr_cp853.h_cp853_mbtowc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cp853_2uni = dso_local local_unnamed_addr global ptr null, align 8
@RET_ILSEQ = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cp853_mbtowc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i32 @cp853_mbtowc(i32 %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef readonly %2, i32 %3) #0 {
%5 = load i8, ptr %2, align 1, !tbaa !5
%6 = icmp sgt i8 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = zext nneg i8 %5 to i64
store i64 %8, ptr %1, align 8, !tbaa !8
br label %21
9: ; preds = %4
%10 = load ptr, ptr @cp853_2uni, align 8, !tbaa !10
%11 = and i8 %5, 127
%12 = zext nneg i8 %11 to i64
%13 = getelementptr inbounds i16, ptr %10, i64 %12
%14 = load i16, ptr %13, align 2, !tbaa !12
%15 = icmp eq i16 %14, -3
br i1 %15, label %18, label %16
16: ; preds = %9
%17 = zext i16 %14 to i64
store i64 %17, ptr %1, align 8, !tbaa !8
br label %18
18: ; preds = %9, %16
%19 = load i32, ptr @RET_ILSEQ, align 4
%20 = select i1 %15, i32 %19, i32 1
br label %21
21: ; preds = %18, %7
%22 = phi i32 [ 1, %7 ], [ %20, %18 ]
ret i32 %22
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !6, i64 0}
| ; ModuleID = 'AnghaBench/TDengine/deps/iconv/extr_cp853.h_cp853_mbtowc.c'
source_filename = "AnghaBench/TDengine/deps/iconv/extr_cp853.h_cp853_mbtowc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cp853_2uni = common local_unnamed_addr global ptr null, align 8
@RET_ILSEQ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cp853_mbtowc], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal i32 @cp853_mbtowc(i32 %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef readonly %2, i32 %3) #0 {
%5 = load i8, ptr %2, align 1, !tbaa !6
%6 = icmp sgt i8 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = zext nneg i8 %5 to i64
store i64 %8, ptr %1, align 8, !tbaa !9
br label %21
9: ; preds = %4
%10 = load ptr, ptr @cp853_2uni, align 8, !tbaa !11
%11 = and i8 %5, 127
%12 = zext nneg i8 %11 to i64
%13 = getelementptr inbounds i16, ptr %10, i64 %12
%14 = load i16, ptr %13, align 2, !tbaa !13
%15 = icmp eq i16 %14, -3
br i1 %15, label %18, label %16
16: ; preds = %9
%17 = zext i16 %14 to i64
store i64 %17, ptr %1, align 8, !tbaa !9
br label %18
18: ; preds = %9, %16
%19 = load i32, ptr @RET_ILSEQ, align 4
%20 = select i1 %15, i32 %19, i32 1
br label %21
21: ; preds = %18, %7
%22 = phi i32 [ 1, %7 ], [ %20, %18 ]
ret i32 %22
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
| TDengine_deps_iconv_extr_cp853.h_cp853_mbtowc |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_traps_64.c_do_div0_tl1.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_traps_64.c_do_div0_tl1.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pt_regs = type { i32 }
@.str = private unnamed_addr constant [20 x i8] c"TL1: DIV0 Exception\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @do_div0_tl1(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.pt_regs, ptr %0, i64 1
%3 = tail call i32 @dump_tl1_traplog(ptr noundef nonnull %2) #2
%4 = tail call i32 @die_if_kernel(ptr noundef nonnull @.str, ptr noundef %0) #2
ret void
}
declare i32 @dump_tl1_traplog(ptr noundef) local_unnamed_addr #1
declare i32 @die_if_kernel(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_traps_64.c_do_div0_tl1.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/sparc/kernel/extr_traps_64.c_do_div0_tl1.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [20 x i8] c"TL1: DIV0 Exception\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @do_div0_tl1(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = tail call i32 @dump_tl1_traplog(ptr noundef nonnull %2) #2
%4 = tail call i32 @die_if_kernel(ptr noundef nonnull @.str, ptr noundef %0) #2
ret void
}
declare i32 @dump_tl1_traplog(ptr noundef) local_unnamed_addr #1
declare i32 @die_if_kernel(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_sparc_kernel_extr_traps_64.c_do_div0_tl1 |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_consolecmds.c_CG_StartOrbit_f.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_consolecmds.c_CG_StartOrbit_f.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64 }
@MAX_TOKEN_CHARS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"developer\00", align 1
@cg_cameraOrbit = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@.str.1 = private unnamed_addr constant [15 x i8] c"cg_cameraOrbit\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c"0\00", align 1
@.str.3 = private unnamed_addr constant [15 x i8] c"cg_thirdPerson\00", align 1
@.str.4 = private unnamed_addr constant [2 x i8] c"5\00", align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"1\00", align 1
@.str.6 = private unnamed_addr constant [20 x i8] c"cg_thirdPersonAngle\00", align 1
@.str.7 = private unnamed_addr constant [20 x i8] c"cg_thirdPersonRange\00", align 1
@.str.8 = private unnamed_addr constant [4 x i8] c"100\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @CG_StartOrbit_f], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @CG_StartOrbit_f() #0 {
%1 = load i32, ptr @MAX_TOKEN_CHARS, align 4, !tbaa !5
%2 = zext i32 %1 to i64
%3 = alloca i8, i64 %2, align 16
%4 = call i32 @trap_Cvar_VariableStringBuffer(ptr noundef nonnull @.str, ptr noundef nonnull %3, i32 noundef %1) #3
%5 = call i32 @atoi(ptr nocapture noundef nonnull %3)
%6 = icmp eq i32 %5, 0
br i1 %6, label %18, label %7
7: ; preds = %0
%8 = load i64, ptr @cg_cameraOrbit, align 8, !tbaa !9
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #3
%12 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.2) #3
br label %18
13: ; preds = %7
%14 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.4) #3
%15 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.5) #3
%16 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.2) #3
%17 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.8) #3
br label %18
18: ; preds = %10, %13, %0
ret void
}
declare i32 @trap_Cvar_VariableStringBuffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare i32 @atoi(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @trap_Cvar_Set(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_consolecmds.c_CG_StartOrbit_f.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_consolecmds.c_CG_StartOrbit_f.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64 }
@MAX_TOKEN_CHARS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"developer\00", align 1
@cg_cameraOrbit = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@.str.1 = private unnamed_addr constant [15 x i8] c"cg_cameraOrbit\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c"0\00", align 1
@.str.3 = private unnamed_addr constant [15 x i8] c"cg_thirdPerson\00", align 1
@.str.4 = private unnamed_addr constant [2 x i8] c"5\00", align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"1\00", align 1
@.str.6 = private unnamed_addr constant [20 x i8] c"cg_thirdPersonAngle\00", align 1
@.str.7 = private unnamed_addr constant [20 x i8] c"cg_thirdPersonRange\00", align 1
@.str.8 = private unnamed_addr constant [4 x i8] c"100\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @CG_StartOrbit_f], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @CG_StartOrbit_f() #0 {
%1 = load i32, ptr @MAX_TOKEN_CHARS, align 4, !tbaa !6
%2 = zext i32 %1 to i64
%3 = alloca i8, i64 %2, align 1
%4 = call i32 @trap_Cvar_VariableStringBuffer(ptr noundef nonnull @.str, ptr noundef nonnull %3, i32 noundef %1) #3
%5 = call i32 @atoi(ptr nocapture noundef nonnull %3)
%6 = icmp eq i32 %5, 0
br i1 %6, label %18, label %7
7: ; preds = %0
%8 = load i64, ptr @cg_cameraOrbit, align 8, !tbaa !10
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #3
%12 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.2) #3
br label %18
13: ; preds = %7
%14 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.4) #3
%15 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.5) #3
%16 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.2) #3
%17 = call i32 @trap_Cvar_Set(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.8) #3
br label %18
18: ; preds = %10, %13, %0
ret void
}
declare i32 @trap_Cvar_VariableStringBuffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare i32 @atoi(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @trap_Cvar_Set(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
| Quake-III-Arena_code_cgame_extr_cg_consolecmds.c_CG_StartOrbit_f |
; ModuleID = 'AnghaBench/linux/drivers/ata/extr_libata-scsi.c_ata_get_xlat_func.c'
source_filename = "AnghaBench/linux/drivers/ata/extr_libata-scsi.c_ata_get_xlat_func.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ata_scsi_rw_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_write_same_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_flush_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_verify_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_pass_thru = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_var_len_cdb_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_mode_select_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_zbc_in_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_zbc_out_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ATA_DFLAG_TRUSTED = dso_local local_unnamed_addr global i32 0, align 4
@ata_scsi_security_inout_xlat = dso_local local_unnamed_addr global ptr null, align 8
@ata_scsi_start_stop_xlat = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ata_get_xlat_func], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal ptr @ata_get_xlat_func(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %33 [
i32 141, label %3
i32 143, label %3
i32 142, label %3
i32 131, label %3
i32 133, label %3
i32 132, label %3
i32 130, label %5
i32 137, label %7
i32 135, label %12
i32 134, label %12
i32 147, label %14
i32 146, label %14
i32 136, label %16
i32 145, label %18
i32 144, label %18
i32 129, label %20
i32 128, label %22
i32 140, label %24
i32 139, label %24
i32 138, label %31
]
3: ; preds = %2, %2, %2, %2, %2, %2
%4 = load ptr, ptr @ata_scsi_rw_xlat, align 8, !tbaa !5
br label %33
5: ; preds = %2
%6 = load ptr, ptr @ata_scsi_write_same_xlat, align 8, !tbaa !5
br label %33
7: ; preds = %2
%8 = tail call i32 @ata_try_flush_cache(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
%10 = load ptr, ptr @ata_scsi_flush_xlat, align 8
%11 = select i1 %9, ptr null, ptr %10
br label %33
12: ; preds = %2, %2
%13 = load ptr, ptr @ata_scsi_verify_xlat, align 8, !tbaa !5
br label %33
14: ; preds = %2, %2
%15 = load ptr, ptr @ata_scsi_pass_thru, align 8, !tbaa !5
br label %33
16: ; preds = %2
%17 = load ptr, ptr @ata_scsi_var_len_cdb_xlat, align 8, !tbaa !5
br label %33
18: ; preds = %2, %2
%19 = load ptr, ptr @ata_scsi_mode_select_xlat, align 8, !tbaa !5
br label %33
20: ; preds = %2
%21 = load ptr, ptr @ata_scsi_zbc_in_xlat, align 8, !tbaa !5
br label %33
22: ; preds = %2
%23 = load ptr, ptr @ata_scsi_zbc_out_xlat, align 8, !tbaa !5
br label %33
24: ; preds = %2, %2
%25 = load i32, ptr %0, align 4, !tbaa !9
%26 = load i32, ptr @ATA_DFLAG_TRUSTED, align 4, !tbaa !12
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
%29 = load ptr, ptr @ata_scsi_security_inout_xlat, align 8
%30 = select i1 %28, ptr null, ptr %29
br label %33
31: ; preds = %2
%32 = load ptr, ptr @ata_scsi_start_stop_xlat, align 8, !tbaa !5
br label %33
33: ; preds = %24, %7, %2, %31, %22, %20, %18, %16, %14, %12, %5, %3
%34 = phi ptr [ %32, %31 ], [ %23, %22 ], [ %21, %20 ], [ %19, %18 ], [ %17, %16 ], [ %15, %14 ], [ %13, %12 ], [ %6, %5 ], [ %4, %3 ], [ null, %2 ], [ %11, %7 ], [ %30, %24 ]
ret ptr %34
}
declare i32 @ata_try_flush_cache(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ata_device", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/ata/extr_libata-scsi.c_ata_get_xlat_func.c'
source_filename = "AnghaBench/linux/drivers/ata/extr_libata-scsi.c_ata_get_xlat_func.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ata_scsi_rw_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_write_same_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_flush_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_verify_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_pass_thru = common local_unnamed_addr global ptr null, align 8
@ata_scsi_var_len_cdb_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_mode_select_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_zbc_in_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_zbc_out_xlat = common local_unnamed_addr global ptr null, align 8
@ATA_DFLAG_TRUSTED = common local_unnamed_addr global i32 0, align 4
@ata_scsi_security_inout_xlat = common local_unnamed_addr global ptr null, align 8
@ata_scsi_start_stop_xlat = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @ata_get_xlat_func], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal ptr @ata_get_xlat_func(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %33 [
i32 141, label %3
i32 143, label %3
i32 142, label %3
i32 131, label %3
i32 133, label %3
i32 132, label %3
i32 130, label %5
i32 137, label %7
i32 135, label %12
i32 134, label %12
i32 147, label %14
i32 146, label %14
i32 136, label %16
i32 145, label %18
i32 144, label %18
i32 129, label %20
i32 128, label %22
i32 140, label %24
i32 139, label %24
i32 138, label %31
]
3: ; preds = %2, %2, %2, %2, %2, %2
%4 = load ptr, ptr @ata_scsi_rw_xlat, align 8, !tbaa !6
br label %33
5: ; preds = %2
%6 = load ptr, ptr @ata_scsi_write_same_xlat, align 8, !tbaa !6
br label %33
7: ; preds = %2
%8 = tail call i32 @ata_try_flush_cache(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
%10 = load ptr, ptr @ata_scsi_flush_xlat, align 8
%11 = select i1 %9, ptr null, ptr %10
br label %33
12: ; preds = %2, %2
%13 = load ptr, ptr @ata_scsi_verify_xlat, align 8, !tbaa !6
br label %33
14: ; preds = %2, %2
%15 = load ptr, ptr @ata_scsi_pass_thru, align 8, !tbaa !6
br label %33
16: ; preds = %2
%17 = load ptr, ptr @ata_scsi_var_len_cdb_xlat, align 8, !tbaa !6
br label %33
18: ; preds = %2, %2
%19 = load ptr, ptr @ata_scsi_mode_select_xlat, align 8, !tbaa !6
br label %33
20: ; preds = %2
%21 = load ptr, ptr @ata_scsi_zbc_in_xlat, align 8, !tbaa !6
br label %33
22: ; preds = %2
%23 = load ptr, ptr @ata_scsi_zbc_out_xlat, align 8, !tbaa !6
br label %33
24: ; preds = %2, %2
%25 = load i32, ptr %0, align 4, !tbaa !10
%26 = load i32, ptr @ATA_DFLAG_TRUSTED, align 4, !tbaa !13
%27 = and i32 %26, %25
%28 = icmp eq i32 %27, 0
%29 = load ptr, ptr @ata_scsi_security_inout_xlat, align 8
%30 = select i1 %28, ptr null, ptr %29
br label %33
31: ; preds = %2
%32 = load ptr, ptr @ata_scsi_start_stop_xlat, align 8, !tbaa !6
br label %33
33: ; preds = %24, %7, %2, %31, %22, %20, %18, %16, %14, %12, %5, %3
%34 = phi ptr [ %32, %31 ], [ %23, %22 ], [ %21, %20 ], [ %19, %18 ], [ %17, %16 ], [ %15, %14 ], [ %13, %12 ], [ %6, %5 ], [ %4, %3 ], [ null, %2 ], [ %11, %7 ], [ %30, %24 ]
ret ptr %34
}
declare i32 @ata_try_flush_cache(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"ata_device", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_drivers_ata_extr_libata-scsi.c_ata_get_xlat_func |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/platform/x86/extr_sony-laptop.c_sony_laptop_report_input_event.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/platform/x86/extr_sony-laptop.c_sony_laptop_report_input_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32, ptr, ptr }
%struct.sony_laptop_keypress = type { ptr, i32, ptr }
@sony_laptop_input = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@SONYPI_EVENT_FNKEY_RELEASED = dso_local local_unnamed_addr global i32 0, align 4
@SONYPI_EVENT_ANYBUTTON_RELEASED = dso_local local_unnamed_addr global i32 0, align 4
@REL_WHEEL = dso_local local_unnamed_addr global i32 0, align 4
@BTN_MIDDLE = dso_local local_unnamed_addr global i32 0, align 4
@sony_laptop_input_index = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [53 x i8] c"sony_laptop_report_input_event, event not known: %d\0A\00", align 1
@sony_laptop_input_keycode_map = dso_local local_unnamed_addr global ptr null, align 8
@KEY_UNKNOWN = dso_local local_unnamed_addr global i32 0, align 4
@EV_MSC = dso_local local_unnamed_addr global i32 0, align 4
@MSC_SCAN = dso_local local_unnamed_addr global i32 0, align 4
@sony_laptop_release_key_work = dso_local global i32 0, align 4
@.str.1 = private unnamed_addr constant [26 x i8] c"unknown input event %.2x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @sony_laptop_report_input_event], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sony_laptop_report_input_event(i32 noundef %0) #0 {
%2 = alloca %struct.sony_laptop_keypress, align 8
%3 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @sony_laptop_input, i64 0, i32 3), align 8, !tbaa !5
%4 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @sony_laptop_input, i64 0, i32 2), align 8, !tbaa !11
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %2, i8 0, i64 24, i1 false)
%5 = load i32, ptr @SONYPI_EVENT_FNKEY_RELEASED, align 4, !tbaa !12
%6 = icmp eq i32 %5, %0
%7 = load i32, ptr @SONYPI_EVENT_ANYBUTTON_RELEASED, align 4
%8 = icmp eq i32 %7, %0
%9 = select i1 %6, i1 true, i1 %8
br i1 %9, label %61, label %10
10: ; preds = %1
switch i32 %0, label %22 [
i32 129, label %11
i32 128, label %11
i32 132, label %15
i32 131, label %15
i32 130, label %19
]
11: ; preds = %10, %10
%12 = load i32, ptr @REL_WHEEL, align 4, !tbaa !12
%13 = tail call i32 @input_report_rel(ptr noundef %3, i32 noundef %12, i32 noundef 1) #4
%14 = tail call i32 @input_sync(ptr noundef %3) #4
br label %61
15: ; preds = %10, %10
%16 = load i32, ptr @REL_WHEEL, align 4, !tbaa !12
%17 = tail call i32 @input_report_rel(ptr noundef %3, i32 noundef %16, i32 noundef -1) #4
%18 = tail call i32 @input_sync(ptr noundef %3) #4
br label %61
19: ; preds = %10
%20 = load i32, ptr @BTN_MIDDLE, align 4, !tbaa !12
%21 = getelementptr inbounds %struct.sony_laptop_keypress, ptr %2, i64 0, i32 1
store i32 %20, ptr %21, align 8, !tbaa !13
br label %42
22: ; preds = %10
%23 = load ptr, ptr @sony_laptop_input_index, align 8, !tbaa !15
%24 = tail call i32 @ARRAY_SIZE(ptr noundef %23) #4
%25 = icmp sgt i32 %24, %0
br i1 %25, label %28, label %26
26: ; preds = %22
%27 = tail call i32 @dprintk(ptr noundef nonnull @.str, i32 noundef %0) #4
br label %59
28: ; preds = %22
%29 = load ptr, ptr @sony_laptop_input_index, align 8, !tbaa !15
%30 = sext i32 %0 to i64
%31 = getelementptr inbounds i32, ptr %29, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !12
%33 = icmp eq i32 %32, -1
br i1 %33, label %59, label %34
34: ; preds = %28
%35 = load ptr, ptr @sony_laptop_input_keycode_map, align 8, !tbaa !15
%36 = sext i32 %32 to i64
%37 = getelementptr inbounds i32, ptr %35, i64 %36
%38 = load i32, ptr %37, align 4, !tbaa !12
%39 = getelementptr inbounds %struct.sony_laptop_keypress, ptr %2, i64 0, i32 1
store i32 %38, ptr %39, align 8, !tbaa !13
%40 = load i32, ptr @KEY_UNKNOWN, align 4, !tbaa !12
%41 = icmp eq i32 %38, %40
br i1 %41, label %59, label %42
42: ; preds = %34, %19
%43 = phi ptr [ %3, %19 ], [ %4, %34 ]
%44 = phi i32 [ %20, %19 ], [ %38, %34 ]
store ptr %43, ptr %2, align 8, !tbaa !16
%45 = icmp eq ptr %43, null
br i1 %45, label %59, label %46
46: ; preds = %42
%47 = tail call i32 @input_report_key(ptr noundef nonnull %43, i32 noundef %44, i32 noundef 1) #4
%48 = load i32, ptr @EV_MSC, align 4, !tbaa !12
%49 = load i32, ptr @MSC_SCAN, align 4, !tbaa !12
%50 = tail call i32 @input_event(ptr noundef nonnull %43, i32 noundef %48, i32 noundef %49, i32 noundef %0) #4
%51 = tail call i32 @input_sync(ptr noundef nonnull %43) #4
%52 = load i32, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @sony_laptop_input, i64 0, i32 1), align 4, !tbaa !17
%53 = call i32 @kfifo_put(i32 noundef %52, ptr noundef nonnull %2, i32 noundef 24) #4
%54 = call i32 @work_pending(ptr noundef nonnull @sony_laptop_release_key_work) #4
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %61
56: ; preds = %46
%57 = load i32, ptr @sony_laptop_input, align 8, !tbaa !18
%58 = call i32 @queue_work(i32 noundef %57, ptr noundef nonnull @sony_laptop_release_key_work) #4
br label %61
59: ; preds = %28, %34, %26, %42
%60 = tail call i32 @dprintk(ptr noundef nonnull @.str.1, i32 noundef %0) #4
br label %61
61: ; preds = %59, %56, %46, %1, %15, %11
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @input_report_rel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @input_sync(ptr noundef) local_unnamed_addr #3
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3
declare i32 @dprintk(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @input_report_key(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @input_event(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @kfifo_put(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @work_pending(ptr noundef) local_unnamed_addr #3
declare i32 @queue_work(i32 noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"sony_laptop_keypress", !10, i64 0, !7, i64 8, !10, i64 16}
!15 = !{!10, !10, i64 0}
!16 = !{!14, !10, i64 0}
!17 = !{!6, !7, i64 4}
!18 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/platform/x86/extr_sony-laptop.c_sony_laptop_report_input_event.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/platform/x86/extr_sony-laptop.c_sony_laptop_report_input_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32, ptr, ptr }
%struct.sony_laptop_keypress = type { ptr, i32, ptr }
@sony_laptop_input = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@SONYPI_EVENT_FNKEY_RELEASED = common local_unnamed_addr global i32 0, align 4
@SONYPI_EVENT_ANYBUTTON_RELEASED = common local_unnamed_addr global i32 0, align 4
@REL_WHEEL = common local_unnamed_addr global i32 0, align 4
@BTN_MIDDLE = common local_unnamed_addr global i32 0, align 4
@sony_laptop_input_index = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [53 x i8] c"sony_laptop_report_input_event, event not known: %d\0A\00", align 1
@sony_laptop_input_keycode_map = common local_unnamed_addr global ptr null, align 8
@KEY_UNKNOWN = common local_unnamed_addr global i32 0, align 4
@EV_MSC = common local_unnamed_addr global i32 0, align 4
@MSC_SCAN = common local_unnamed_addr global i32 0, align 4
@sony_laptop_release_key_work = common global i32 0, align 4
@.str.1 = private unnamed_addr constant [26 x i8] c"unknown input event %.2x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @sony_laptop_report_input_event], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sony_laptop_report_input_event(i32 noundef %0) #0 {
%2 = alloca %struct.sony_laptop_keypress, align 8
%3 = load ptr, ptr getelementptr inbounds (i8, ptr @sony_laptop_input, i64 16), align 8, !tbaa !6
%4 = load ptr, ptr getelementptr inbounds (i8, ptr @sony_laptop_input, i64 8), align 8, !tbaa !12
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %2, i8 0, i64 24, i1 false)
%5 = load i32, ptr @SONYPI_EVENT_FNKEY_RELEASED, align 4, !tbaa !13
%6 = icmp eq i32 %5, %0
%7 = load i32, ptr @SONYPI_EVENT_ANYBUTTON_RELEASED, align 4
%8 = icmp eq i32 %7, %0
%9 = select i1 %6, i1 true, i1 %8
br i1 %9, label %61, label %10
10: ; preds = %1
switch i32 %0, label %22 [
i32 129, label %11
i32 128, label %11
i32 132, label %15
i32 131, label %15
i32 130, label %19
]
11: ; preds = %10, %10
%12 = load i32, ptr @REL_WHEEL, align 4, !tbaa !13
%13 = tail call i32 @input_report_rel(ptr noundef %3, i32 noundef %12, i32 noundef 1) #4
%14 = tail call i32 @input_sync(ptr noundef %3) #4
br label %61
15: ; preds = %10, %10
%16 = load i32, ptr @REL_WHEEL, align 4, !tbaa !13
%17 = tail call i32 @input_report_rel(ptr noundef %3, i32 noundef %16, i32 noundef -1) #4
%18 = tail call i32 @input_sync(ptr noundef %3) #4
br label %61
19: ; preds = %10
%20 = load i32, ptr @BTN_MIDDLE, align 4, !tbaa !13
%21 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %20, ptr %21, align 8, !tbaa !14
br label %42
22: ; preds = %10
%23 = load ptr, ptr @sony_laptop_input_index, align 8, !tbaa !16
%24 = tail call i32 @ARRAY_SIZE(ptr noundef %23) #4
%25 = icmp sgt i32 %24, %0
br i1 %25, label %28, label %26
26: ; preds = %22
%27 = tail call i32 @dprintk(ptr noundef nonnull @.str, i32 noundef %0) #4
br label %59
28: ; preds = %22
%29 = load ptr, ptr @sony_laptop_input_index, align 8, !tbaa !16
%30 = sext i32 %0 to i64
%31 = getelementptr inbounds i32, ptr %29, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !13
%33 = icmp eq i32 %32, -1
br i1 %33, label %59, label %34
34: ; preds = %28
%35 = load ptr, ptr @sony_laptop_input_keycode_map, align 8, !tbaa !16
%36 = sext i32 %32 to i64
%37 = getelementptr inbounds i32, ptr %35, i64 %36
%38 = load i32, ptr %37, align 4, !tbaa !13
%39 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %38, ptr %39, align 8, !tbaa !14
%40 = load i32, ptr @KEY_UNKNOWN, align 4, !tbaa !13
%41 = icmp eq i32 %38, %40
br i1 %41, label %59, label %42
42: ; preds = %34, %19
%43 = phi ptr [ %3, %19 ], [ %4, %34 ]
%44 = phi i32 [ %20, %19 ], [ %38, %34 ]
store ptr %43, ptr %2, align 8, !tbaa !17
%45 = icmp eq ptr %43, null
br i1 %45, label %59, label %46
46: ; preds = %42
%47 = tail call i32 @input_report_key(ptr noundef nonnull %43, i32 noundef %44, i32 noundef 1) #4
%48 = load i32, ptr @EV_MSC, align 4, !tbaa !13
%49 = load i32, ptr @MSC_SCAN, align 4, !tbaa !13
%50 = tail call i32 @input_event(ptr noundef nonnull %43, i32 noundef %48, i32 noundef %49, i32 noundef %0) #4
%51 = tail call i32 @input_sync(ptr noundef nonnull %43) #4
%52 = load i32, ptr getelementptr inbounds (i8, ptr @sony_laptop_input, i64 4), align 4, !tbaa !18
%53 = call i32 @kfifo_put(i32 noundef %52, ptr noundef nonnull %2, i32 noundef 24) #4
%54 = call i32 @work_pending(ptr noundef nonnull @sony_laptop_release_key_work) #4
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %61
56: ; preds = %46
%57 = load i32, ptr @sony_laptop_input, align 8, !tbaa !19
%58 = call i32 @queue_work(i32 noundef %57, ptr noundef nonnull @sony_laptop_release_key_work) #4
br label %61
59: ; preds = %28, %34, %26, %42
%60 = tail call i32 @dprintk(ptr noundef nonnull @.str.1, i32 noundef %0) #4
br label %61
61: ; preds = %59, %56, %46, %1, %15, %11
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @input_report_rel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @input_sync(ptr noundef) local_unnamed_addr #3
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3
declare i32 @dprintk(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @input_report_key(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @input_event(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @kfifo_put(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @work_pending(ptr noundef) local_unnamed_addr #3
declare i32 @queue_work(i32 noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 8}
!15 = !{!"sony_laptop_keypress", !11, i64 0, !8, i64 8, !11, i64 16}
!16 = !{!11, !11, i64 0}
!17 = !{!15, !11, i64 0}
!18 = !{!7, !8, i64 4}
!19 = !{!7, !8, i64 0}
| fastsocket_kernel_drivers_platform_x86_extr_sony-laptop.c_sony_laptop_report_input_event |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_init_link_config.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_init_link_config.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_dp = type { ptr, ptr, i32, i32 }
@DP_LINK_CONFIGURATION_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@DP_SET_ANSI_8B10B = dso_local local_unnamed_addr global i32 0, align 4
@DP_DPCD_REV = dso_local local_unnamed_addr global i64 0, align 8
@DP_MAX_LANE_COUNT = dso_local local_unnamed_addr global i64 0, align 8
@DP_ENHANCED_FRAME_CAP = dso_local local_unnamed_addr global i32 0, align 4
@DP_LANE_COUNT_ENHANCED_FRAME_EN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @intel_dp_init_link_config(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr @DP_LINK_CONFIGURATION_SIZE, align 4, !tbaa !11
%5 = tail call i32 @memset(ptr noundef %3, i32 noundef 0, i32 noundef %4) #2
%6 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 3
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = load ptr, ptr %2, align 8, !tbaa !5
store i32 %7, ptr %8, align 4, !tbaa !11
%9 = getelementptr inbounds %struct.intel_dp, ptr %0, i64 0, i32 2
%10 = load i32, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds i32, ptr %8, i64 1
store i32 %10, ptr %11, align 4, !tbaa !11
%12 = load i32, ptr @DP_SET_ANSI_8B10B, align 4, !tbaa !11
%13 = getelementptr inbounds i32, ptr %8, i64 8
store i32 %12, ptr %13, align 4, !tbaa !11
%14 = load ptr, ptr %0, align 8, !tbaa !14
%15 = load i64, ptr @DP_DPCD_REV, align 8, !tbaa !15
%16 = getelementptr inbounds i32, ptr %14, i64 %15
%17 = load i32, ptr %16, align 4, !tbaa !11
%18 = icmp sgt i32 %17, 16
br i1 %18, label %19, label %29
19: ; preds = %1
%20 = load i64, ptr @DP_MAX_LANE_COUNT, align 8, !tbaa !15
%21 = getelementptr inbounds i32, ptr %14, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !11
%23 = load i32, ptr @DP_ENHANCED_FRAME_CAP, align 4, !tbaa !11
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %19
%27 = load i32, ptr @DP_LANE_COUNT_ENHANCED_FRAME_EN, align 4, !tbaa !11
%28 = or i32 %27, %10
store i32 %28, ptr %11, align 4, !tbaa !11
br label %29
29: ; preds = %26, %19, %1
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"intel_dp", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 20}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 20}
!13 = !{!6, !10, i64 16}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_init_link_config.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_init_link_config.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DP_LINK_CONFIGURATION_SIZE = common local_unnamed_addr global i32 0, align 4
@DP_SET_ANSI_8B10B = common local_unnamed_addr global i32 0, align 4
@DP_DPCD_REV = common local_unnamed_addr global i64 0, align 8
@DP_MAX_LANE_COUNT = common local_unnamed_addr global i64 0, align 8
@DP_ENHANCED_FRAME_CAP = common local_unnamed_addr global i32 0, align 4
@DP_LANE_COUNT_ENHANCED_FRAME_EN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @intel_dp_init_link_config(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr @DP_LINK_CONFIGURATION_SIZE, align 4, !tbaa !12
%5 = tail call i32 @memset(ptr noundef %3, i32 noundef 0, i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %0, i64 20
%7 = load i32, ptr %6, align 4, !tbaa !13
%8 = load ptr, ptr %2, align 8, !tbaa !6
store i32 %7, ptr %8, align 4, !tbaa !12
%9 = getelementptr inbounds i8, ptr %0, i64 16
%10 = load i32, ptr %9, align 8, !tbaa !14
%11 = getelementptr inbounds i8, ptr %8, i64 4
store i32 %10, ptr %11, align 4, !tbaa !12
%12 = load i32, ptr @DP_SET_ANSI_8B10B, align 4, !tbaa !12
%13 = getelementptr inbounds i8, ptr %8, i64 32
store i32 %12, ptr %13, align 4, !tbaa !12
%14 = load ptr, ptr %0, align 8, !tbaa !15
%15 = load i64, ptr @DP_DPCD_REV, align 8, !tbaa !16
%16 = getelementptr inbounds i32, ptr %14, i64 %15
%17 = load i32, ptr %16, align 4, !tbaa !12
%18 = icmp sgt i32 %17, 16
br i1 %18, label %19, label %29
19: ; preds = %1
%20 = load i64, ptr @DP_MAX_LANE_COUNT, align 8, !tbaa !16
%21 = getelementptr inbounds i32, ptr %14, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !12
%23 = load i32, ptr @DP_ENHANCED_FRAME_CAP, align 4, !tbaa !12
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %19
%27 = load i32, ptr @DP_LANE_COUNT_ENHANCED_FRAME_EN, align 4, !tbaa !12
%28 = or i32 %27, %10
store i32 %28, ptr %11, align 4, !tbaa !12
br label %29
29: ; preds = %26, %19, %1
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"intel_dp", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 20}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 20}
!14 = !{!7, !11, i64 16}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !9, i64 0}
| fastsocket_kernel_drivers_gpu_drm_i915_extr_intel_dp.c_intel_dp_init_link_config |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_lm85.c_ZONE_TO_REG.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_lm85.c_ZONE_TO_REG.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@lm85_zone_map = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ZONE_TO_REG], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @ZONE_TO_REG(i32 noundef %0) #0 {
%2 = load ptr, ptr @lm85_zone_map, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !9
%4 = icmp eq i32 %3, %0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = getelementptr inbounds i32, ptr %2, i64 1
%7 = load i32, ptr %6, align 4, !tbaa !9
%8 = icmp eq i32 %7, %0
br i1 %8, label %34, label %9
9: ; preds = %5
%10 = getelementptr inbounds i32, ptr %2, i64 2
%11 = load i32, ptr %10, align 4, !tbaa !9
%12 = icmp eq i32 %11, %0
br i1 %12, label %34, label %13
13: ; preds = %9
%14 = getelementptr inbounds i32, ptr %2, i64 3
%15 = load i32, ptr %14, align 4, !tbaa !9
%16 = icmp eq i32 %15, %0
br i1 %16, label %34, label %17
17: ; preds = %13
%18 = getelementptr inbounds i32, ptr %2, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !9
%20 = icmp eq i32 %19, %0
br i1 %20, label %34, label %21
21: ; preds = %17
%22 = getelementptr inbounds i32, ptr %2, i64 5
%23 = load i32, ptr %22, align 4, !tbaa !9
%24 = icmp eq i32 %23, %0
br i1 %24, label %34, label %25
25: ; preds = %21
%26 = getelementptr inbounds i32, ptr %2, i64 6
%27 = load i32, ptr %26, align 4, !tbaa !9
%28 = icmp eq i32 %27, %0
br i1 %28, label %34, label %29
29: ; preds = %25
%30 = getelementptr inbounds i32, ptr %2, i64 7
%31 = load i32, ptr %30, align 4, !tbaa !9
%32 = icmp eq i32 %31, %0
%33 = select i1 %32, i32 224, i32 96
br label %34
34: ; preds = %29, %25, %21, %17, %13, %9, %5, %1
%35 = phi i32 [ 0, %1 ], [ 32, %5 ], [ 64, %9 ], [ 96, %13 ], [ 128, %17 ], [ 160, %21 ], [ 192, %25 ], [ %33, %29 ]
ret i32 %35
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_lm85.c_ZONE_TO_REG.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_lm85.c_ZONE_TO_REG.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@lm85_zone_map = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @ZONE_TO_REG], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, -31) i32 @ZONE_TO_REG(i32 noundef %0) #0 {
%2 = load ptr, ptr @lm85_zone_map, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = icmp eq i32 %3, %0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %2, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = icmp eq i32 %7, %0
br i1 %8, label %34, label %9
9: ; preds = %5
%10 = getelementptr inbounds i8, ptr %2, i64 8
%11 = load i32, ptr %10, align 4, !tbaa !10
%12 = icmp eq i32 %11, %0
br i1 %12, label %34, label %13
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %2, i64 12
%15 = load i32, ptr %14, align 4, !tbaa !10
%16 = icmp eq i32 %15, %0
br i1 %16, label %34, label %17
17: ; preds = %13
%18 = getelementptr inbounds i8, ptr %2, i64 16
%19 = load i32, ptr %18, align 4, !tbaa !10
%20 = icmp eq i32 %19, %0
br i1 %20, label %34, label %21
21: ; preds = %17
%22 = getelementptr inbounds i8, ptr %2, i64 20
%23 = load i32, ptr %22, align 4, !tbaa !10
%24 = icmp eq i32 %23, %0
br i1 %24, label %34, label %25
25: ; preds = %21
%26 = getelementptr inbounds i8, ptr %2, i64 24
%27 = load i32, ptr %26, align 4, !tbaa !10
%28 = icmp eq i32 %27, %0
br i1 %28, label %34, label %29
29: ; preds = %25
%30 = getelementptr inbounds i8, ptr %2, i64 28
%31 = load i32, ptr %30, align 4, !tbaa !10
%32 = icmp eq i32 %31, %0
%33 = select i1 %32, i32 224, i32 96
br label %34
34: ; preds = %29, %25, %21, %17, %13, %9, %5, %1
%35 = phi i32 [ 0, %1 ], [ 32, %5 ], [ 64, %9 ], [ 96, %13 ], [ 128, %17 ], [ 160, %21 ], [ 192, %25 ], [ %33, %29 ]
ret i32 %35
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| fastsocket_kernel_drivers_hwmon_extr_lm85.c_ZONE_TO_REG |
; ModuleID = 'AnghaBench/linux/kernel/locking/extr_locktorture.c_lock_torture_stats.c'
source_filename = "AnghaBench/linux/kernel/locking/extr_locktorture.c_lock_torture_stats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [32 x i8] c"lock_torture_stats task started\00", align 1
@stat_interval = dso_local local_unnamed_addr global i32 0, align 4
@HZ = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"lock_torture_stats\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @lock_torture_stats], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @lock_torture_stats(ptr nocapture readnone %0) #0 {
%2 = tail call i32 @VERBOSE_TOROUT_STRING(ptr noundef nonnull @.str) #2
br label %3
3: ; preds = %3, %1
%4 = load i32, ptr @stat_interval, align 4, !tbaa !5
%5 = load i32, ptr @HZ, align 4, !tbaa !5
%6 = mul nsw i32 %5, %4
%7 = tail call i32 @schedule_timeout_interruptible(i32 noundef %6) #2
%8 = tail call i32 (...) @lock_torture_stats_print() #2
%9 = tail call i32 @torture_shutdown_absorb(ptr noundef nonnull @.str.1) #2
%10 = tail call i32 (...) @torture_must_stop() #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %3, label %12, !llvm.loop !9
12: ; preds = %3
%13 = tail call i32 @torture_kthread_stopping(ptr noundef nonnull @.str.1) #2
ret i32 0
}
declare i32 @VERBOSE_TOROUT_STRING(ptr noundef) local_unnamed_addr #1
declare i32 @schedule_timeout_interruptible(i32 noundef) local_unnamed_addr #1
declare i32 @lock_torture_stats_print(...) local_unnamed_addr #1
declare i32 @torture_shutdown_absorb(ptr noundef) local_unnamed_addr #1
declare i32 @torture_must_stop(...) local_unnamed_addr #1
declare i32 @torture_kthread_stopping(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/kernel/locking/extr_locktorture.c_lock_torture_stats.c'
source_filename = "AnghaBench/linux/kernel/locking/extr_locktorture.c_lock_torture_stats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [32 x i8] c"lock_torture_stats task started\00", align 1
@stat_interval = common local_unnamed_addr global i32 0, align 4
@HZ = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [19 x i8] c"lock_torture_stats\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @lock_torture_stats], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @lock_torture_stats(ptr nocapture readnone %0) #0 {
%2 = tail call i32 @VERBOSE_TOROUT_STRING(ptr noundef nonnull @.str) #2
br label %3
3: ; preds = %3, %1
%4 = load i32, ptr @stat_interval, align 4, !tbaa !6
%5 = load i32, ptr @HZ, align 4, !tbaa !6
%6 = mul nsw i32 %5, %4
%7 = tail call i32 @schedule_timeout_interruptible(i32 noundef %6) #2
%8 = tail call i32 @lock_torture_stats_print() #2
%9 = tail call i32 @torture_shutdown_absorb(ptr noundef nonnull @.str.1) #2
%10 = tail call i32 @torture_must_stop() #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %3, label %12, !llvm.loop !10
12: ; preds = %3
%13 = tail call i32 @torture_kthread_stopping(ptr noundef nonnull @.str.1) #2
ret i32 0
}
declare i32 @VERBOSE_TOROUT_STRING(ptr noundef) local_unnamed_addr #1
declare i32 @schedule_timeout_interruptible(i32 noundef) local_unnamed_addr #1
declare i32 @lock_torture_stats_print(...) local_unnamed_addr #1
declare i32 @torture_shutdown_absorb(ptr noundef) local_unnamed_addr #1
declare i32 @torture_must_stop(...) local_unnamed_addr #1
declare i32 @torture_kthread_stopping(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| linux_kernel_locking_extr_locktorture.c_lock_torture_stats |
; ModuleID = 'AnghaBench/linux/fs/dlm/extr_config.c_get_space.c'
source_filename = "AnghaBench/linux/fs/dlm/extr_config.c_get_space.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@space_list = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_space], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @get_space(ptr noundef %0) #0 {
%2 = load ptr, ptr @space_list, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !9
%6 = tail call i32 @mutex_lock(ptr noundef %5) #2
%7 = load ptr, ptr @space_list, align 8, !tbaa !5
%8 = tail call ptr @config_group_find_item(ptr noundef %7, ptr noundef %0) #2
%9 = load ptr, ptr @space_list, align 8, !tbaa !5
%10 = load ptr, ptr %9, align 8, !tbaa !9
%11 = tail call i32 @mutex_unlock(ptr noundef %10) #2
%12 = tail call ptr @config_item_to_space(ptr noundef %8) #2
br label %13
13: ; preds = %1, %4
%14 = phi ptr [ %12, %4 ], [ null, %1 ]
ret ptr %14
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare ptr @config_group_find_item(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare ptr @config_item_to_space(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_5__", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/dlm/extr_config.c_get_space.c'
source_filename = "AnghaBench/linux/fs/dlm/extr_config.c_get_space.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@space_list = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @get_space], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @get_space(ptr noundef %0) #0 {
%2 = load ptr, ptr @space_list, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !10
%6 = tail call i32 @mutex_lock(ptr noundef %5) #2
%7 = load ptr, ptr @space_list, align 8, !tbaa !6
%8 = tail call ptr @config_group_find_item(ptr noundef %7, ptr noundef %0) #2
%9 = load ptr, ptr @space_list, align 8, !tbaa !6
%10 = load ptr, ptr %9, align 8, !tbaa !10
%11 = tail call i32 @mutex_unlock(ptr noundef %10) #2
%12 = tail call ptr @config_item_to_space(ptr noundef %8) #2
br label %13
13: ; preds = %1, %4
%14 = phi ptr [ %12, %4 ], [ null, %1 ]
ret ptr %14
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare ptr @config_group_find_item(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
declare ptr @config_item_to_space(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0}
| linux_fs_dlm_extr_config.c_get_space |
; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_ips.c_ips_map_status.c'
source_filename = "AnghaBench/linux/drivers/scsi/extr_ips.c_ips_map_status.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_19__ = type { i32 }
%struct.TYPE_17__ = type { i32, i64, ptr, %struct.TYPE_16__, %struct.TYPE_15__, i64, i32 }
%struct.TYPE_16__ = type { ptr, i32 }
%struct.TYPE_15__ = type { %struct.TYPE_14__ }
%struct.TYPE_14__ = type { i32 }
%struct.TYPE_21__ = type { i32, i32, ptr, ptr }
%struct.TYPE_13__ = type { i32, i32, i32 }
@.str = private unnamed_addr constant [15 x i8] c"ips_map_status\00", align 1
@.str.1 = private unnamed_addr constant [81 x i8] c"(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x\00", align 1
@ips_name = dso_local local_unnamed_addr global i32 0, align 4
@DID_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@IPS_GSC_STATUS_MASK = dso_local local_unnamed_addr global i32 0, align 4
@DID_TIME_OUT = dso_local local_unnamed_addr global i32 0, align 4
@DID_NO_CONNECT = dso_local local_unnamed_addr global i32 0, align 4
@IPS_CMD_EXTENDED_DCDB = dso_local local_unnamed_addr global i32 0, align 4
@IPS_CMD_EXTENDED_DCDB_SG = dso_local local_unnamed_addr global i32 0, align 4
@DID_OK = dso_local local_unnamed_addr global i32 0, align 4
@INQUIRY = dso_local local_unnamed_addr global i32 0, align 4
@TYPE_DISK = dso_local local_unnamed_addr global i32 0, align 4
@DID_RESET = dso_local local_unnamed_addr global i32 0, align 4
@SCSI_SENSE_BUFFERSIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ips_map_status], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ips_map_status(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture readnone %2) #0 {
%4 = alloca %struct.TYPE_19__, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = tail call i32 @METHOD_TRACE(ptr noundef nonnull @.str, i32 noundef 1) #3
%6 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 5
%7 = load i64, ptr %6, align 8, !tbaa !5
%8 = icmp eq i64 %7, 0
br i1 %8, label %40, label %9
9: ; preds = %3
%10 = load i32, ptr @ips_name, align 4, !tbaa !15
%11 = load i32, ptr %0, align 4, !tbaa !16
%12 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 2
%13 = load ptr, ptr %12, align 8, !tbaa !18
%14 = getelementptr inbounds %struct.TYPE_21__, ptr %13, i64 0, i32 3
%15 = load ptr, ptr %14, align 8, !tbaa !19
%16 = getelementptr inbounds %struct.TYPE_13__, ptr %15, i64 0, i32 2
%17 = load i32, ptr %16, align 4, !tbaa !21
%18 = getelementptr inbounds %struct.TYPE_13__, ptr %15, i64 0, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !23
%20 = load i32, ptr %15, align 4, !tbaa !24
%21 = load i32, ptr %1, align 8, !tbaa !25
%22 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 1
%23 = load i64, ptr %22, align 8, !tbaa !26
%24 = icmp eq i64 %23, 138
br i1 %24, label %25, label %35
25: ; preds = %9
%26 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 3
%27 = load ptr, ptr %26, align 8, !tbaa !27
%28 = getelementptr inbounds i32, ptr %27, i64 2
%29 = load i32, ptr %28, align 4, !tbaa !15
%30 = and i32 %29, 15
%31 = getelementptr inbounds i32, ptr %27, i64 12
%32 = load i32, ptr %31, align 4, !tbaa !15
%33 = getelementptr inbounds i32, ptr %27, i64 13
%34 = load i32, ptr %33, align 4, !tbaa !15
br label %35
35: ; preds = %9, %25
%36 = phi i32 [ %32, %25 ], [ 0, %9 ]
%37 = phi i32 [ %30, %25 ], [ 0, %9 ]
%38 = phi i32 [ %34, %25 ], [ 0, %9 ]
%39 = tail call i32 @DEBUG_VAR(i32 noundef 2, ptr noundef nonnull @.str.1, i32 noundef %10, i32 noundef %11, i32 noundef %17, i32 noundef %19, i32 noundef %20, i32 noundef %21, i64 noundef %23, i32 noundef %37, i32 noundef %36, i32 noundef %38) #3
br label %40
40: ; preds = %35, %3
%41 = load i32, ptr @DID_ERROR, align 4, !tbaa !15
%42 = load i32, ptr %1, align 8, !tbaa !25
%43 = load i32, ptr @IPS_GSC_STATUS_MASK, align 4, !tbaa !15
%44 = and i32 %43, %42
switch i32 %44, label %103 [
i32 139, label %45
i32 128, label %47
]
45: ; preds = %40
%46 = load i32, ptr @DID_TIME_OUT, align 4, !tbaa !15
br label %103
47: ; preds = %40
%48 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 1
%49 = load i64, ptr %48, align 8, !tbaa !26
switch i64 %49, label %103 [
i64 133, label %50
i64 135, label %55
i64 134, label %81
i64 136, label %86
i64 137, label %86
i64 138, label %88
]
50: ; preds = %47
%51 = load i64, ptr %6, align 8, !tbaa !5
%52 = icmp eq i64 %51, 0
%53 = load i32, ptr @DID_NO_CONNECT, align 4
%54 = select i1 %52, i32 %41, i32 %53
br label %103
55: ; preds = %47
%56 = load i64, ptr %6, align 8, !tbaa !5
%57 = icmp eq i64 %56, 0
br i1 %57, label %103, label %58
58: ; preds = %55
%59 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 3, i32 1
%60 = load i32, ptr %59, align 8, !tbaa !15
%61 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 6
%62 = load i32, ptr %61, align 8, !tbaa !28
%63 = icmp slt i32 %60, %62
br i1 %63, label %64, label %103
64: ; preds = %58
%65 = load i32, ptr @DID_OK, align 4, !tbaa !15
%66 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 2
%67 = load ptr, ptr %66, align 8, !tbaa !18
%68 = getelementptr inbounds %struct.TYPE_21__, ptr %67, i64 0, i32 2
%69 = load ptr, ptr %68, align 8, !tbaa !29
%70 = load i32, ptr %69, align 4, !tbaa !15
%71 = load i32, ptr @INQUIRY, align 4, !tbaa !15
%72 = icmp eq i32 %70, %71
br i1 %72, label %73, label %103
73: ; preds = %64
%74 = call i32 @ips_scmd_buf_read(ptr noundef nonnull %67, ptr noundef nonnull %4, i32 noundef 4) #3
%75 = load i32, ptr %4, align 4, !tbaa !30
%76 = and i32 %75, 31
%77 = load i32, ptr @TYPE_DISK, align 4, !tbaa !15
%78 = icmp eq i32 %76, %77
%79 = load i32, ptr @DID_TIME_OUT, align 4
%80 = select i1 %78, i32 %79, i32 %65
br label %103
81: ; preds = %47
%82 = load i64, ptr %6, align 8, !tbaa !5
%83 = icmp eq i64 %82, 0
%84 = load i32, ptr @DID_OK, align 4
%85 = select i1 %83, i32 %41, i32 %84
br label %103
86: ; preds = %47, %47
%87 = load i32, ptr @DID_RESET, align 4, !tbaa !15
br label %103
88: ; preds = %47
%89 = load i64, ptr %6, align 8, !tbaa !5
%90 = icmp eq i64 %89, 0
br i1 %90, label %100, label %91
91: ; preds = %88
%92 = load i32, ptr @SCSI_SENSE_BUFFERSIZE, align 4, !tbaa !15
%93 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 2
%94 = load ptr, ptr %93, align 8, !tbaa !18
%95 = getelementptr inbounds %struct.TYPE_21__, ptr %94, i64 0, i32 1
%96 = load i32, ptr %95, align 4, !tbaa !32
%97 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 3
%98 = load ptr, ptr %97, align 8, !tbaa !33
%99 = tail call i32 @memcpy(i32 noundef %96, ptr noundef %98, i32 noundef %92) #3
br label %100
100: ; preds = %91, %88
%101 = phi i32 [ 0, %88 ], [ 2, %91 ]
%102 = load i32, ptr @DID_OK, align 4, !tbaa !15
br label %103
103: ; preds = %55, %58, %81, %73, %50, %47, %86, %100, %64, %40, %45
%104 = phi i32 [ %41, %40 ], [ %102, %100 ], [ %87, %86 ], [ %65, %64 ], [ %46, %45 ], [ %54, %50 ], [ %80, %73 ], [ %85, %81 ], [ %41, %47 ], [ %41, %58 ], [ %41, %55 ]
%105 = phi i32 [ 0, %40 ], [ %101, %100 ], [ 0, %86 ], [ 0, %64 ], [ 0, %45 ], [ 0, %50 ], [ 0, %73 ], [ 0, %81 ], [ 0, %47 ], [ 0, %58 ], [ 0, %55 ]
%106 = shl i32 %104, 16
%107 = or i32 %105, %106
%108 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 2
%109 = load ptr, ptr %108, align 8, !tbaa !18
store i32 %107, ptr %109, align 8, !tbaa !34
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @METHOD_TRACE(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DEBUG_VAR(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ips_scmd_buf_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 48}
!6 = !{!"TYPE_17__", !7, i64 0, !10, i64 8, !11, i64 16, !12, i64 24, !13, i64 40, !10, i64 48, !7, i64 56}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"TYPE_16__", !11, i64 0, !7, i64 8}
!13 = !{!"TYPE_15__", !14, i64 0}
!14 = !{!"TYPE_14__", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_18__", !7, i64 0}
!18 = !{!6, !11, i64 16}
!19 = !{!20, !11, i64 16}
!20 = !{!"TYPE_21__", !7, i64 0, !7, i64 4, !11, i64 8, !11, i64 16}
!21 = !{!22, !7, i64 8}
!22 = !{!"TYPE_13__", !7, i64 0, !7, i64 4, !7, i64 8}
!23 = !{!22, !7, i64 4}
!24 = !{!22, !7, i64 0}
!25 = !{!6, !7, i64 0}
!26 = !{!6, !10, i64 8}
!27 = !{!6, !11, i64 24}
!28 = !{!6, !7, i64 56}
!29 = !{!20, !11, i64 8}
!30 = !{!31, !7, i64 0}
!31 = !{!"TYPE_19__", !7, i64 0}
!32 = !{!20, !7, i64 4}
!33 = !{!11, !11, i64 0}
!34 = !{!20, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_ips.c_ips_map_status.c'
source_filename = "AnghaBench/linux/drivers/scsi/extr_ips.c_ips_map_status.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_19__ = type { i32 }
@.str = private unnamed_addr constant [15 x i8] c"ips_map_status\00", align 1
@.str.1 = private unnamed_addr constant [81 x i8] c"(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x\00", align 1
@ips_name = common local_unnamed_addr global i32 0, align 4
@DID_ERROR = common local_unnamed_addr global i32 0, align 4
@IPS_GSC_STATUS_MASK = common local_unnamed_addr global i32 0, align 4
@DID_TIME_OUT = common local_unnamed_addr global i32 0, align 4
@DID_NO_CONNECT = common local_unnamed_addr global i32 0, align 4
@IPS_CMD_EXTENDED_DCDB = common local_unnamed_addr global i32 0, align 4
@IPS_CMD_EXTENDED_DCDB_SG = common local_unnamed_addr global i32 0, align 4
@DID_OK = common local_unnamed_addr global i32 0, align 4
@INQUIRY = common local_unnamed_addr global i32 0, align 4
@TYPE_DISK = common local_unnamed_addr global i32 0, align 4
@DID_RESET = common local_unnamed_addr global i32 0, align 4
@SCSI_SENSE_BUFFERSIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ips_map_status], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ips_map_status(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture readnone %2) #0 {
%4 = alloca %struct.TYPE_19__, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = tail call i32 @METHOD_TRACE(ptr noundef nonnull @.str, i32 noundef 1) #3
%6 = getelementptr inbounds i8, ptr %1, i64 48
%7 = load i64, ptr %6, align 8, !tbaa !6
%8 = icmp eq i64 %7, 0
br i1 %8, label %40, label %9
9: ; preds = %3
%10 = load i32, ptr @ips_name, align 4, !tbaa !16
%11 = load i32, ptr %0, align 4, !tbaa !17
%12 = getelementptr inbounds i8, ptr %1, i64 16
%13 = load ptr, ptr %12, align 8, !tbaa !19
%14 = getelementptr inbounds i8, ptr %13, i64 16
%15 = load ptr, ptr %14, align 8, !tbaa !20
%16 = getelementptr inbounds i8, ptr %15, i64 8
%17 = load i32, ptr %16, align 4, !tbaa !22
%18 = getelementptr inbounds i8, ptr %15, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !24
%20 = load i32, ptr %15, align 4, !tbaa !25
%21 = load i32, ptr %1, align 8, !tbaa !26
%22 = getelementptr inbounds i8, ptr %1, i64 8
%23 = load i64, ptr %22, align 8, !tbaa !27
%24 = icmp eq i64 %23, 138
br i1 %24, label %25, label %35
25: ; preds = %9
%26 = getelementptr inbounds i8, ptr %1, i64 24
%27 = load ptr, ptr %26, align 8, !tbaa !28
%28 = getelementptr inbounds i8, ptr %27, i64 8
%29 = load i32, ptr %28, align 4, !tbaa !16
%30 = and i32 %29, 15
%31 = getelementptr inbounds i8, ptr %27, i64 48
%32 = load i32, ptr %31, align 4, !tbaa !16
%33 = getelementptr inbounds i8, ptr %27, i64 52
%34 = load i32, ptr %33, align 4, !tbaa !16
br label %35
35: ; preds = %9, %25
%36 = phi i32 [ %32, %25 ], [ 0, %9 ]
%37 = phi i32 [ %30, %25 ], [ 0, %9 ]
%38 = phi i32 [ %34, %25 ], [ 0, %9 ]
%39 = tail call i32 @DEBUG_VAR(i32 noundef 2, ptr noundef nonnull @.str.1, i32 noundef %10, i32 noundef %11, i32 noundef %17, i32 noundef %19, i32 noundef %20, i32 noundef %21, i64 noundef %23, i32 noundef %37, i32 noundef %36, i32 noundef %38) #3
br label %40
40: ; preds = %35, %3
%41 = load i32, ptr @DID_ERROR, align 4, !tbaa !16
%42 = load i32, ptr %1, align 8, !tbaa !26
%43 = load i32, ptr @IPS_GSC_STATUS_MASK, align 4, !tbaa !16
%44 = and i32 %43, %42
switch i32 %44, label %103 [
i32 139, label %45
i32 128, label %47
]
45: ; preds = %40
%46 = load i32, ptr @DID_TIME_OUT, align 4, !tbaa !16
br label %103
47: ; preds = %40
%48 = getelementptr inbounds i8, ptr %1, i64 8
%49 = load i64, ptr %48, align 8, !tbaa !27
switch i64 %49, label %103 [
i64 133, label %50
i64 135, label %55
i64 134, label %81
i64 136, label %86
i64 137, label %86
i64 138, label %88
]
50: ; preds = %47
%51 = load i64, ptr %6, align 8, !tbaa !6
%52 = icmp eq i64 %51, 0
%53 = load i32, ptr @DID_NO_CONNECT, align 4
%54 = select i1 %52, i32 %41, i32 %53
br label %103
55: ; preds = %47
%56 = load i64, ptr %6, align 8, !tbaa !6
%57 = icmp eq i64 %56, 0
br i1 %57, label %103, label %58
58: ; preds = %55
%59 = getelementptr inbounds i8, ptr %1, i64 32
%60 = load i32, ptr %59, align 8, !tbaa !16
%61 = getelementptr inbounds i8, ptr %1, i64 56
%62 = load i32, ptr %61, align 8, !tbaa !29
%63 = icmp slt i32 %60, %62
br i1 %63, label %64, label %103
64: ; preds = %58
%65 = load i32, ptr @DID_OK, align 4, !tbaa !16
%66 = getelementptr inbounds i8, ptr %1, i64 16
%67 = load ptr, ptr %66, align 8, !tbaa !19
%68 = getelementptr inbounds i8, ptr %67, i64 8
%69 = load ptr, ptr %68, align 8, !tbaa !30
%70 = load i32, ptr %69, align 4, !tbaa !16
%71 = load i32, ptr @INQUIRY, align 4, !tbaa !16
%72 = icmp eq i32 %70, %71
br i1 %72, label %73, label %103
73: ; preds = %64
%74 = call i32 @ips_scmd_buf_read(ptr noundef nonnull %67, ptr noundef nonnull %4, i32 noundef 4) #3
%75 = load i32, ptr %4, align 4, !tbaa !31
%76 = and i32 %75, 31
%77 = load i32, ptr @TYPE_DISK, align 4, !tbaa !16
%78 = icmp eq i32 %76, %77
%79 = load i32, ptr @DID_TIME_OUT, align 4
%80 = select i1 %78, i32 %79, i32 %65
br label %103
81: ; preds = %47
%82 = load i64, ptr %6, align 8, !tbaa !6
%83 = icmp eq i64 %82, 0
%84 = load i32, ptr @DID_OK, align 4
%85 = select i1 %83, i32 %41, i32 %84
br label %103
86: ; preds = %47, %47
%87 = load i32, ptr @DID_RESET, align 4, !tbaa !16
br label %103
88: ; preds = %47
%89 = load i64, ptr %6, align 8, !tbaa !6
%90 = icmp eq i64 %89, 0
br i1 %90, label %100, label %91
91: ; preds = %88
%92 = load i32, ptr @SCSI_SENSE_BUFFERSIZE, align 4, !tbaa !16
%93 = getelementptr inbounds i8, ptr %1, i64 16
%94 = load ptr, ptr %93, align 8, !tbaa !19
%95 = getelementptr inbounds i8, ptr %94, i64 4
%96 = load i32, ptr %95, align 4, !tbaa !33
%97 = getelementptr inbounds i8, ptr %1, i64 24
%98 = load ptr, ptr %97, align 8, !tbaa !34
%99 = tail call i32 @memcpy(i32 noundef %96, ptr noundef %98, i32 noundef %92) #3
br label %100
100: ; preds = %91, %88
%101 = phi i32 [ 0, %88 ], [ 2, %91 ]
%102 = load i32, ptr @DID_OK, align 4, !tbaa !16
br label %103
103: ; preds = %55, %58, %81, %73, %50, %47, %86, %100, %64, %40, %45
%104 = phi i32 [ %41, %40 ], [ %102, %100 ], [ %87, %86 ], [ %65, %64 ], [ %46, %45 ], [ %54, %50 ], [ %80, %73 ], [ %85, %81 ], [ %41, %47 ], [ %41, %58 ], [ %41, %55 ]
%105 = phi i32 [ 0, %40 ], [ %101, %100 ], [ 0, %86 ], [ 0, %64 ], [ 0, %45 ], [ 0, %50 ], [ 0, %73 ], [ 0, %81 ], [ 0, %47 ], [ 0, %58 ], [ 0, %55 ]
%106 = shl i32 %104, 16
%107 = or i32 %105, %106
%108 = getelementptr inbounds i8, ptr %1, i64 16
%109 = load ptr, ptr %108, align 8, !tbaa !19
store i32 %107, ptr %109, align 8, !tbaa !35
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @METHOD_TRACE(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DEBUG_VAR(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ips_scmd_buf_read(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 48}
!7 = !{!"TYPE_17__", !8, i64 0, !11, i64 8, !12, i64 16, !13, i64 24, !14, i64 40, !11, i64 48, !8, i64 56}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_16__", !12, i64 0, !8, i64 8}
!14 = !{!"TYPE_15__", !15, i64 0}
!15 = !{!"TYPE_14__", !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"TYPE_18__", !8, i64 0}
!19 = !{!7, !12, i64 16}
!20 = !{!21, !12, i64 16}
!21 = !{!"TYPE_21__", !8, i64 0, !8, i64 4, !12, i64 8, !12, i64 16}
!22 = !{!23, !8, i64 8}
!23 = !{!"TYPE_13__", !8, i64 0, !8, i64 4, !8, i64 8}
!24 = !{!23, !8, i64 4}
!25 = !{!23, !8, i64 0}
!26 = !{!7, !8, i64 0}
!27 = !{!7, !11, i64 8}
!28 = !{!7, !12, i64 24}
!29 = !{!7, !8, i64 56}
!30 = !{!21, !12, i64 8}
!31 = !{!32, !8, i64 0}
!32 = !{!"TYPE_19__", !8, i64 0}
!33 = !{!21, !8, i64 4}
!34 = !{!12, !12, i64 0}
!35 = !{!21, !8, i64 0}
| linux_drivers_scsi_extr_ips.c_ips_map_status |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/host/extr_pci-quirks.c_usb_amd_quirk_pll_disable.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/host/extr_pci-quirks.c_usb_amd_quirk_pll_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @usb_amd_quirk_pll_disable() local_unnamed_addr #0 {
%1 = tail call i32 @usb_amd_quirk_pll(i32 noundef 1) #2
ret void
}
declare i32 @usb_amd_quirk_pll(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/host/extr_pci-quirks.c_usb_amd_quirk_pll_disable.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/host/extr_pci-quirks.c_usb_amd_quirk_pll_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @usb_amd_quirk_pll_disable() local_unnamed_addr #0 {
%1 = tail call i32 @usb_amd_quirk_pll(i32 noundef 1) #2
ret void
}
declare i32 @usb_amd_quirk_pll(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_usb_host_extr_pci-quirks.c_usb_amd_quirk_pll_disable |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/d3dx9_36/extr_d3dx9_private.h_is_top_level_parameter.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/d3dx9_36/extr_d3dx9_private.h_is_top_level_parameter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @is_top_level_parameter], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @is_top_level_parameter(ptr noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"d3dx_parameter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/d3dx9_36/extr_d3dx9_private.h_is_top_level_parameter.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/d3dx9_36/extr_d3dx9_private.h_is_top_level_parameter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @is_top_level_parameter], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @is_top_level_parameter(ptr noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, %0
%4 = zext i1 %3 to i32
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"d3dx_parameter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| reactos_dll_directx_wine_d3dx9_36_extr_d3dx9_private.h_is_top_level_parameter |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_MITE_CHSR.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_MITE_CHSR.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @MITE_CHSR], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @MITE_CHSR(i32 noundef %0) #0 {
%2 = tail call i32 @CHAN_OFFSET(i32 noundef %0) #2
%3 = add nsw i32 %2, 60
ret i32 %3
}
declare i32 @CHAN_OFFSET(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_MITE_CHSR.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_MITE_CHSR.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @MITE_CHSR], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 -2147483588, -2147483648) i32 @MITE_CHSR(i32 noundef %0) #0 {
%2 = tail call i32 @CHAN_OFFSET(i32 noundef %0) #2
%3 = add nsw i32 %2, 60
ret i32 %3
}
declare i32 @CHAN_OFFSET(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_staging_comedi_drivers_extr_mite.h_MITE_CHSR |
; ModuleID = 'AnghaBench/reactos/base/applications/mstsc/extr_win32.c_str_to_uni.c'
source_filename = "AnghaBench/reactos/base/applications/mstsc/extr_win32.c_str_to_uni.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @str_to_uni], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @str_to_uni(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 {
%3 = tail call i32 @strlen(ptr noundef %1) #2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %80
5: ; preds = %2
%6 = ptrtoint ptr %0 to i64
%7 = ptrtoint ptr %1 to i64
%8 = zext nneg i32 %3 to i64
%9 = icmp ult i32 %3, 8
%10 = sub i64 %6, %7
%11 = icmp ult i64 %10, 32
%12 = or i1 %9, %11
br i1 %12, label %44, label %13
13: ; preds = %5
%14 = icmp ult i32 %3, 32
br i1 %14, label %32, label %15
15: ; preds = %13
%16 = and i64 %8, 2147483616
br label %17
17: ; preds = %17, %15
%18 = phi i64 [ 0, %15 ], [ %25, %17 ]
%19 = getelementptr inbounds i8, ptr %1, i64 %18
%20 = getelementptr inbounds i8, ptr %19, i64 16
%21 = load <16 x i8>, ptr %19, align 1, !tbaa !5
%22 = load <16 x i8>, ptr %20, align 1, !tbaa !5
%23 = getelementptr inbounds i8, ptr %0, i64 %18
%24 = getelementptr inbounds i8, ptr %23, i64 16
store <16 x i8> %21, ptr %23, align 1, !tbaa !5
store <16 x i8> %22, ptr %24, align 1, !tbaa !5
%25 = add nuw i64 %18, 32
%26 = icmp eq i64 %25, %16
br i1 %26, label %27, label %17, !llvm.loop !8
27: ; preds = %17
%28 = icmp eq i64 %16, %8
br i1 %28, label %80, label %29
29: ; preds = %27
%30 = and i64 %8, 24
%31 = icmp eq i64 %30, 0
br i1 %31, label %44, label %32
32: ; preds = %13, %29
%33 = phi i64 [ %16, %29 ], [ 0, %13 ]
%34 = and i64 %8, 2147483640
br label %35
35: ; preds = %35, %32
%36 = phi i64 [ %33, %32 ], [ %40, %35 ]
%37 = getelementptr inbounds i8, ptr %1, i64 %36
%38 = load <8 x i8>, ptr %37, align 1, !tbaa !5
%39 = getelementptr inbounds i8, ptr %0, i64 %36
store <8 x i8> %38, ptr %39, align 1, !tbaa !5
%40 = add nuw i64 %36, 8
%41 = icmp eq i64 %40, %34
br i1 %41, label %42, label %35, !llvm.loop !12
42: ; preds = %35
%43 = icmp eq i64 %34, %8
br i1 %43, label %80, label %44
44: ; preds = %5, %29, %42
%45 = phi i64 [ 0, %5 ], [ %16, %29 ], [ %34, %42 ]
%46 = and i64 %8, 3
%47 = icmp eq i64 %46, 0
br i1 %47, label %57, label %48
48: ; preds = %44, %48
%49 = phi i64 [ %54, %48 ], [ %45, %44 ]
%50 = phi i64 [ %55, %48 ], [ 0, %44 ]
%51 = getelementptr inbounds i8, ptr %1, i64 %49
%52 = load i8, ptr %51, align 1, !tbaa !5
%53 = getelementptr inbounds i8, ptr %0, i64 %49
store i8 %52, ptr %53, align 1, !tbaa !5
%54 = add nuw nsw i64 %49, 1
%55 = add i64 %50, 1
%56 = icmp eq i64 %55, %46
br i1 %56, label %57, label %48, !llvm.loop !13
57: ; preds = %48, %44
%58 = phi i64 [ %45, %44 ], [ %54, %48 ]
%59 = sub nsw i64 %45, %8
%60 = icmp ugt i64 %59, -4
br i1 %60, label %80, label %61
61: ; preds = %57, %61
%62 = phi i64 [ %78, %61 ], [ %58, %57 ]
%63 = getelementptr inbounds i8, ptr %1, i64 %62
%64 = load i8, ptr %63, align 1, !tbaa !5
%65 = getelementptr inbounds i8, ptr %0, i64 %62
store i8 %64, ptr %65, align 1, !tbaa !5
%66 = add nuw nsw i64 %62, 1
%67 = getelementptr inbounds i8, ptr %1, i64 %66
%68 = load i8, ptr %67, align 1, !tbaa !5
%69 = getelementptr inbounds i8, ptr %0, i64 %66
store i8 %68, ptr %69, align 1, !tbaa !5
%70 = add nuw nsw i64 %62, 2
%71 = getelementptr inbounds i8, ptr %1, i64 %70
%72 = load i8, ptr %71, align 1, !tbaa !5
%73 = getelementptr inbounds i8, ptr %0, i64 %70
store i8 %72, ptr %73, align 1, !tbaa !5
%74 = add nuw nsw i64 %62, 3
%75 = getelementptr inbounds i8, ptr %1, i64 %74
%76 = load i8, ptr %75, align 1, !tbaa !5
%77 = getelementptr inbounds i8, ptr %0, i64 %74
store i8 %76, ptr %77, align 1, !tbaa !5
%78 = add nuw nsw i64 %62, 4
%79 = icmp eq i64 %78, %8
br i1 %79, label %80, label %61, !llvm.loop !15
80: ; preds = %57, %61, %27, %42, %2
%81 = sext i32 %3 to i64
%82 = getelementptr inbounds i8, ptr %0, i64 %81
store i8 0, ptr %82, align 1, !tbaa !5
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9, !10, !11}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!"llvm.loop.isvectorized", i32 1}
!11 = !{!"llvm.loop.unroll.runtime.disable"}
!12 = distinct !{!12, !9, !10, !11}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.unroll.disable"}
!15 = distinct !{!15, !9, !10}
| ; ModuleID = 'AnghaBench/reactos/base/applications/mstsc/extr_win32.c_str_to_uni.c'
source_filename = "AnghaBench/reactos/base/applications/mstsc/extr_win32.c_str_to_uni.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @str_to_uni], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @str_to_uni(ptr nocapture noundef writeonly %0, ptr noundef %1) #0 {
%3 = tail call i32 @strlen(ptr noundef %1) #2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %59
5: ; preds = %2
%6 = ptrtoint ptr %0 to i64
%7 = ptrtoint ptr %1 to i64
%8 = zext nneg i32 %3 to i64
%9 = icmp ult i32 %3, 8
%10 = sub i64 %6, %7
%11 = icmp ult i64 %10, 64
%12 = or i1 %9, %11
br i1 %12, label %50, label %13
13: ; preds = %5
%14 = icmp ult i32 %3, 64
br i1 %14, label %38, label %15
15: ; preds = %13
%16 = and i64 %8, 2147483584
br label %17
17: ; preds = %17, %15
%18 = phi i64 [ 0, %15 ], [ %31, %17 ]
%19 = getelementptr inbounds i8, ptr %1, i64 %18
%20 = getelementptr inbounds i8, ptr %19, i64 16
%21 = getelementptr inbounds i8, ptr %19, i64 32
%22 = getelementptr inbounds i8, ptr %19, i64 48
%23 = load <16 x i8>, ptr %19, align 1, !tbaa !6
%24 = load <16 x i8>, ptr %20, align 1, !tbaa !6
%25 = load <16 x i8>, ptr %21, align 1, !tbaa !6
%26 = load <16 x i8>, ptr %22, align 1, !tbaa !6
%27 = getelementptr inbounds i8, ptr %0, i64 %18
%28 = getelementptr inbounds i8, ptr %27, i64 16
%29 = getelementptr inbounds i8, ptr %27, i64 32
%30 = getelementptr inbounds i8, ptr %27, i64 48
store <16 x i8> %23, ptr %27, align 1, !tbaa !6
store <16 x i8> %24, ptr %28, align 1, !tbaa !6
store <16 x i8> %25, ptr %29, align 1, !tbaa !6
store <16 x i8> %26, ptr %30, align 1, !tbaa !6
%31 = add nuw i64 %18, 64
%32 = icmp eq i64 %31, %16
br i1 %32, label %33, label %17, !llvm.loop !9
33: ; preds = %17
%34 = icmp eq i64 %16, %8
br i1 %34, label %59, label %35
35: ; preds = %33
%36 = and i64 %8, 56
%37 = icmp eq i64 %36, 0
br i1 %37, label %50, label %38
38: ; preds = %13, %35
%39 = phi i64 [ %16, %35 ], [ 0, %13 ]
%40 = and i64 %8, 2147483640
br label %41
41: ; preds = %41, %38
%42 = phi i64 [ %39, %38 ], [ %46, %41 ]
%43 = getelementptr inbounds i8, ptr %1, i64 %42
%44 = load <8 x i8>, ptr %43, align 1, !tbaa !6
%45 = getelementptr inbounds i8, ptr %0, i64 %42
store <8 x i8> %44, ptr %45, align 1, !tbaa !6
%46 = add nuw i64 %42, 8
%47 = icmp eq i64 %46, %40
br i1 %47, label %48, label %41, !llvm.loop !13
48: ; preds = %41
%49 = icmp eq i64 %40, %8
br i1 %49, label %59, label %50
50: ; preds = %48, %5, %35
%51 = phi i64 [ 0, %5 ], [ %16, %35 ], [ %40, %48 ]
br label %52
52: ; preds = %50, %52
%53 = phi i64 [ %57, %52 ], [ %51, %50 ]
%54 = getelementptr inbounds i8, ptr %1, i64 %53
%55 = load i8, ptr %54, align 1, !tbaa !6
%56 = getelementptr inbounds i8, ptr %0, i64 %53
store i8 %55, ptr %56, align 1, !tbaa !6
%57 = add nuw nsw i64 %53, 1
%58 = icmp eq i64 %57, %8
br i1 %58, label %59, label %52, !llvm.loop !14
59: ; preds = %52, %33, %48, %2
%60 = sext i32 %3 to i64
%61 = getelementptr inbounds i8, ptr %0, i64 %60
store i8 0, ptr %61, align 1, !tbaa !6
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !11, !12}
!14 = distinct !{!14, !10, !11}
| reactos_base_applications_mstsc_extr_win32.c_str_to_uni |
; ModuleID = 'AnghaBench/freebsd/sys/dev/hyperv/netvsc/extr_if_hn.c_hn_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/hyperv/netvsc/extr_if_hn.c_hn_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hn_softc = type { i32, i32, i64, i64, i64, i64, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.TYPE_9__, i32, i32, ptr, ptr, i32, ptr, i32, i32, i32, ptr, i32, i32, i32, i32, i32 }
%struct.TYPE_9__ = type { ptr, i32 }
%struct.ifnet = type { i64, i64, i64, i32, i32, i32, i32, i64, i32, i32, i32, %struct.TYPE_11__, i32, i32, i32, i32, ptr }
%struct.TYPE_11__ = type { i32 }
@ETHER_ADDR_LEN = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [5 x i8] c"hnvf\00", align 1
@hn_xpnt_vf = dso_local local_unnamed_addr global i64 0, align 8
@hn_xpnt_vf_accbpf = dso_local local_unnamed_addr global i64 0, align 8
@HN_XVFFLAG_ACCBPF = dso_local local_unnamed_addr global i32 0, align 4
@hn_tx_agg_size = dso_local local_unnamed_addr global i32 0, align 4
@hn_tx_agg_pkts = dso_local local_unnamed_addr global i32 0, align 4
@hn_tx_taskq_mode = dso_local local_unnamed_addr global i64 0, align 8
@HN_TX_TASKQ_M_INDEP = dso_local local_unnamed_addr global i64 0, align 8
@hn_tx_taskq_cnt = dso_local local_unnamed_addr global i32 0, align 4
@M_DEVBUF = dso_local local_unnamed_addr global i32 0, align 4
@M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [6 x i8] c"hn_tx\00", align 1
@taskqueue_thread_enqueue = dso_local local_unnamed_addr global i32 0, align 4
@PI_NET = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [8 x i8] c"%s tx%d\00", align 1
@HN_TX_TASKQ_M_GLOBAL = dso_local local_unnamed_addr global i64 0, align 8
@hn_tx_taskque = dso_local local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [8 x i8] c"hn_mgmt\00", align 1
@.str.4 = private unnamed_addr constant [8 x i8] c"%s mgmt\00", align 1
@hn_link_taskfunc = dso_local local_unnamed_addr global i32 0, align 4
@hn_netchg_init_taskfunc = dso_local local_unnamed_addr global i32 0, align 4
@hn_netchg_status_taskfunc = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [6 x i8] c"hn_vf\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c"%s vf\00", align 1
@hn_xpnt_vf_init_taskfunc = dso_local local_unnamed_addr global i32 0, align 4
@IFT_ETHER = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifmedia_upd = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifmedia_sts = dso_local local_unnamed_addr global i32 0, align 4
@hn_chan_cnt = dso_local local_unnamed_addr global i32 0, align 4
@mp_ncpus = dso_local local_unnamed_addr global i32 0, align 4
@HN_RING_CNT_DEF_MAX = dso_local local_unnamed_addr global i32 0, align 4
@hn_tx_ring_cnt = dso_local local_unnamed_addr global i32 0, align 4
@hn_cpu_index = dso_local global i32 0, align 4
@HN_XACT_REQ_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HN_XACT_RESP_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@ETHERMTU = dso_local local_unnamed_addr global i64 0, align 8
@bootverbose = dso_local local_unnamed_addr global i64 0, align 8
@.str.7 = private unnamed_addr constant [14 x i8] c"RNDIS mtu %u\0A\00", align 1
@OID_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [12 x i8] c"nvs_version\00", align 1
@CTLFLAG_RD = dso_local local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [12 x i8] c"NVS version\00", align 1
@.str.10 = private unnamed_addr constant [13 x i8] c"ndis_version\00", align 1
@CTLTYPE_STRING = dso_local local_unnamed_addr global i32 0, align 4
@CTLFLAG_MPSAFE = dso_local local_unnamed_addr global i32 0, align 4
@hn_ndis_version_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [2 x i8] c"A\00", align 1
@.str.12 = private unnamed_addr constant [13 x i8] c"NDIS version\00", align 1
@.str.13 = private unnamed_addr constant [5 x i8] c"caps\00", align 1
@hn_caps_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.14 = private unnamed_addr constant [13 x i8] c"capabilities\00", align 1
@.str.15 = private unnamed_addr constant [9 x i8] c"hwassist\00", align 1
@hn_hwassist_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.16 = private unnamed_addr constant [8 x i8] c"tso_max\00", align 1
@.str.17 = private unnamed_addr constant [13 x i8] c"max TSO size\00", align 1
@.str.18 = private unnamed_addr constant [14 x i8] c"tso_maxsegcnt\00", align 1
@.str.19 = private unnamed_addr constant [22 x i8] c"max # of TSO segments\00", align 1
@.str.20 = private unnamed_addr constant [13 x i8] c"tso_maxsegsz\00", align 1
@.str.21 = private unnamed_addr constant [24 x i8] c"max size of TSO segment\00", align 1
@.str.22 = private unnamed_addr constant [9 x i8] c"rxfilter\00", align 1
@hn_rxfilter_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.23 = private unnamed_addr constant [9 x i8] c"rss_hash\00", align 1
@hn_rss_hash_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.24 = private unnamed_addr constant [9 x i8] c"RSS hash\00", align 1
@.str.25 = private unnamed_addr constant [12 x i8] c"rss_hashcap\00", align 1
@hn_rss_hcap_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.26 = private unnamed_addr constant [22 x i8] c"RSS hash capabilities\00", align 1
@.str.27 = private unnamed_addr constant [10 x i8] c"mbuf_hash\00", align 1
@hn_rss_mbuf_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.28 = private unnamed_addr constant [19 x i8] c"RSS hash for mbufs\00", align 1
@.str.29 = private unnamed_addr constant [13 x i8] c"rss_ind_size\00", align 1
@.str.30 = private unnamed_addr constant [25 x i8] c"RSS indirect entry count\00", align 1
@.str.31 = private unnamed_addr constant [8 x i8] c"rss_key\00", align 1
@CTLTYPE_OPAQUE = dso_local local_unnamed_addr global i32 0, align 4
@CTLFLAG_RW = dso_local local_unnamed_addr global i32 0, align 4
@hn_rss_key_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.32 = private unnamed_addr constant [3 x i8] c"IU\00", align 1
@.str.33 = private unnamed_addr constant [8 x i8] c"RSS key\00", align 1
@.str.34 = private unnamed_addr constant [8 x i8] c"rss_ind\00", align 1
@hn_rss_ind_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.35 = private unnamed_addr constant [19 x i8] c"RSS indirect table\00", align 1
@.str.36 = private unnamed_addr constant [15 x i8] c"rndis_agg_size\00", align 1
@.str.37 = private unnamed_addr constant [57 x i8] c"RNDIS offered packet transmission aggregation size limit\00", align 1
@.str.38 = private unnamed_addr constant [15 x i8] c"rndis_agg_pkts\00", align 1
@.str.39 = private unnamed_addr constant [58 x i8] c"RNDIS offered packet transmission aggregation count limit\00", align 1
@.str.40 = private unnamed_addr constant [16 x i8] c"rndis_agg_align\00", align 1
@.str.41 = private unnamed_addr constant [48 x i8] c"RNDIS packet transmission aggregation alignment\00", align 1
@.str.42 = private unnamed_addr constant [9 x i8] c"agg_size\00", align 1
@CTLTYPE_INT = dso_local local_unnamed_addr global i32 0, align 4
@hn_txagg_size_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.43 = private unnamed_addr constant [2 x i8] c"I\00", align 1
@.str.44 = private unnamed_addr constant [63 x i8] c"Packet transmission aggregation size, 0 -- disable, -1 -- auto\00", align 1
@.str.45 = private unnamed_addr constant [9 x i8] c"agg_pkts\00", align 1
@hn_txagg_pkts_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.46 = private unnamed_addr constant [66 x i8] c"Packet transmission aggregation packets, 0 -- disable, -1 -- auto\00", align 1
@.str.47 = private unnamed_addr constant [8 x i8] c"polling\00", align 1
@CTLTYPE_UINT = dso_local local_unnamed_addr global i32 0, align 4
@hn_polling_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.48 = private unnamed_addr constant [52 x i8] c"Polling frequency: [100,1000000], 0 disable polling\00", align 1
@.str.49 = private unnamed_addr constant [3 x i8] c"vf\00", align 1
@hn_vf_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.50 = private unnamed_addr constant [24 x i8] c"Virtual Function's name\00", align 1
@.str.51 = private unnamed_addr constant [5 x i8] c"rxvf\00", align 1
@hn_rxvf_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.52 = private unnamed_addr constant [34 x i8] c"activated Virtual Function's name\00", align 1
@.str.53 = private unnamed_addr constant [16 x i8] c"vf_xpnt_enabled\00", align 1
@hn_xpnt_vf_enabled_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.54 = private unnamed_addr constant [23 x i8] c"Transparent VF enabled\00", align 1
@.str.55 = private unnamed_addr constant [15 x i8] c"vf_xpnt_accbpf\00", align 1
@hn_xpnt_vf_accbpf_sysctl = dso_local local_unnamed_addr global i32 0, align 4
@.str.56 = private unnamed_addr constant [32 x i8] c"Accurate BPF for transparent VF\00", align 1
@IFM_ETHER = dso_local local_unnamed_addr global i32 0, align 4
@IFM_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@IFF_BROADCAST = dso_local local_unnamed_addr global i32 0, align 4
@IFF_SIMPLEX = dso_local local_unnamed_addr global i32 0, align 4
@IFF_MULTICAST = dso_local local_unnamed_addr global i32 0, align 4
@hn_ioctl = dso_local local_unnamed_addr global i32 0, align 4
@hn_init = dso_local local_unnamed_addr global i32 0, align 4
@hn_transmit = dso_local local_unnamed_addr global i32 0, align 4
@hn_xmit_qflush = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_LRO = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_LINKSTATE = dso_local local_unnamed_addr global i32 0, align 4
@HN_CAP_VLAN = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_VLAN_HWTAGGING = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_VLAN_MTU = dso_local local_unnamed_addr global i32 0, align 4
@HN_CSUM_IP_MASK = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@HN_CSUM_IP6_MASK = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM_IPV6 = dso_local local_unnamed_addr global i32 0, align 4
@HN_CAP_TSO4 = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TSO4 = dso_local local_unnamed_addr global i32 0, align 4
@CSUM_IP_TSO = dso_local local_unnamed_addr global i32 0, align 4
@HN_CAP_TSO6 = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TSO6 = dso_local local_unnamed_addr global i32 0, align 4
@CSUM_IP6_TSO = dso_local local_unnamed_addr global i32 0, align 4
@hn_tso_maxlen = dso_local local_unnamed_addr global i32 0, align 4
@HN_TX_DATA_SEGCNT_MAX = dso_local local_unnamed_addr global i64 0, align 8
@PAGE_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@.str.57 = private unnamed_addr constant [24 x i8] c"TSO segcnt %u segsz %u\0A\00", align 1
@.str.58 = private unnamed_addr constant [20 x i8] c"fixup mtu %u -> %u\0A\00", align 1
@ifnet_event = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifnet_event = dso_local local_unnamed_addr global i32 0, align 4
@EVENTHANDLER_PRI_ANY = dso_local local_unnamed_addr global i32 0, align 4
@ifaddr_event = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifaddr_event = dso_local local_unnamed_addr global i32 0, align 4
@ifnet_link_event = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifnet_lnkevent = dso_local local_unnamed_addr global i32 0, align 4
@ether_ifattach_event = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifnet_attevent = dso_local local_unnamed_addr global i32 0, align 4
@ifnet_departure_event = dso_local local_unnamed_addr global i32 0, align 4
@hn_ifnet_detevent = dso_local local_unnamed_addr global i32 0, align 4
@HN_FLAG_SYNTH_ATTACHED = dso_local local_unnamed_addr global i32 0, align 4
@HN_LRO_LENLIM_MULTIRX_DEF = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM_IPV6 = dso_local local_unnamed_addr global i32 0, align 4
@hn_start = dso_local local_unnamed_addr global i32 0, align 4
@hn_use_if_start = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @hn_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hn_attach(i32 noundef %0) #0 {
%2 = alloca i64, align 8
%3 = tail call ptr @device_get_softc(i32 noundef %0) #4
%4 = load i32, ptr @ETHER_ADDR_LEN, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca i32, i64 %5, align 16
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
%7 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 31
store i32 %0, ptr %7, align 8, !tbaa !9
%8 = tail call i32 @vmbus_get_channel(i32 noundef %0) #4
%9 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 18
store i32 %8, ptr %9, align 4, !tbaa !14
%10 = tail call i32 @HN_LOCK_INIT(ptr noundef %3) #4
%11 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 30
%12 = tail call i32 @rm_init(ptr noundef nonnull %11, ptr noundef nonnull @.str) #4
%13 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !15
%14 = icmp ne i64 %13, 0
%15 = load i64, ptr @hn_xpnt_vf_accbpf, align 8
%16 = icmp ne i64 %15, 0
%17 = select i1 %14, i1 %16, i1 false
br i1 %17, label %18, label %23
18: ; preds = %1
%19 = load i32, ptr @HN_XVFFLAG_ACCBPF, align 4, !tbaa !5
%20 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 29
%21 = load i32, ptr %20, align 8, !tbaa !16
%22 = or i32 %21, %19
store i32 %22, ptr %20, align 8, !tbaa !16
br label %23
23: ; preds = %18, %1
%24 = load i32, ptr @hn_tx_agg_size, align 4, !tbaa !5
%25 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 28
store i32 %24, ptr %25, align 4, !tbaa !17
%26 = load i32, ptr @hn_tx_agg_pkts, align 4, !tbaa !5
%27 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 27
store i32 %26, ptr %27, align 8, !tbaa !18
%28 = load i64, ptr @hn_tx_taskq_mode, align 8, !tbaa !15
%29 = load i64, ptr @HN_TX_TASKQ_M_INDEP, align 8, !tbaa !15
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %59
31: ; preds = %23
%32 = load i32, ptr @hn_tx_taskq_cnt, align 4, !tbaa !5
%33 = shl i32 %32, 3
%34 = load i32, ptr @M_DEVBUF, align 4, !tbaa !5
%35 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%36 = tail call ptr @malloc(i32 noundef %33, i32 noundef %34, i32 noundef %35) #4
%37 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 26
store ptr %36, ptr %37, align 8, !tbaa !19
%38 = load i32, ptr @hn_tx_taskq_cnt, align 4, !tbaa !5
%39 = icmp sgt i32 %38, 0
br i1 %39, label %40, label %65
40: ; preds = %31, %40
%41 = phi i64 [ %55, %40 ], [ 0, %31 ]
%42 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%43 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !5
%44 = load ptr, ptr %37, align 8, !tbaa !19
%45 = getelementptr inbounds ptr, ptr %44, i64 %41
%46 = tail call ptr @taskqueue_create(ptr noundef nonnull @.str.1, i32 noundef %42, i32 noundef %43, ptr noundef %45) #4
%47 = load ptr, ptr %37, align 8, !tbaa !19
%48 = getelementptr inbounds ptr, ptr %47, i64 %41
store ptr %46, ptr %48, align 8, !tbaa !20
%49 = load ptr, ptr %37, align 8, !tbaa !19
%50 = getelementptr inbounds ptr, ptr %49, i64 %41
%51 = load i32, ptr @PI_NET, align 4, !tbaa !5
%52 = tail call i32 @device_get_nameunit(i32 noundef %0) #4
%53 = trunc i64 %41 to i32
%54 = tail call i32 (ptr, i32, i32, ptr, i32, ...) @taskqueue_start_threads(ptr noundef %50, i32 noundef 1, i32 noundef %51, ptr noundef nonnull @.str.2, i32 noundef %52, i32 noundef %53) #4
%55 = add nuw nsw i64 %41, 1
%56 = load i32, ptr @hn_tx_taskq_cnt, align 4, !tbaa !5
%57 = sext i32 %56 to i64
%58 = icmp slt i64 %55, %57
br i1 %58, label %40, label %65, !llvm.loop !21
59: ; preds = %23
%60 = load i64, ptr @HN_TX_TASKQ_M_GLOBAL, align 8, !tbaa !15
%61 = icmp eq i64 %28, %60
br i1 %61, label %62, label %65
62: ; preds = %59
%63 = load ptr, ptr @hn_tx_taskque, align 8, !tbaa !20
%64 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 26
store ptr %63, ptr %64, align 8, !tbaa !19
br label %65
65: ; preds = %40, %31, %59, %62
%66 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%67 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !5
%68 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 13
%69 = tail call ptr @taskqueue_create(ptr noundef nonnull @.str.3, i32 noundef %66, i32 noundef %67, ptr noundef nonnull %68) #4
store ptr %69, ptr %68, align 8, !tbaa !23
%70 = load i32, ptr @PI_NET, align 4, !tbaa !5
%71 = tail call i32 @device_get_nameunit(i32 noundef %0) #4
%72 = tail call i32 (ptr, i32, i32, ptr, i32, ...) @taskqueue_start_threads(ptr noundef nonnull %68, i32 noundef 1, i32 noundef %70, ptr noundef nonnull @.str.4, i32 noundef %71) #4
%73 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 25
%74 = load i32, ptr @hn_link_taskfunc, align 4, !tbaa !5
%75 = tail call i32 @TASK_INIT(ptr noundef nonnull %73, i32 noundef 0, i32 noundef %74, ptr noundef nonnull %3) #4
%76 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 24
%77 = load i32, ptr @hn_netchg_init_taskfunc, align 4, !tbaa !5
%78 = tail call i32 @TASK_INIT(ptr noundef nonnull %76, i32 noundef 0, i32 noundef %77, ptr noundef nonnull %3) #4
%79 = load ptr, ptr %68, align 8, !tbaa !23
%80 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 23
%81 = load i32, ptr @hn_netchg_status_taskfunc, align 4, !tbaa !5
%82 = tail call i32 @TIMEOUT_TASK_INIT(ptr noundef %79, ptr noundef nonnull %80, i32 noundef 0, i32 noundef %81, ptr noundef nonnull %3) #4
%83 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !15
%84 = icmp eq i64 %83, 0
br i1 %84, label %97, label %85
85: ; preds = %65
%86 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%87 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !5
%88 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 22
%89 = tail call ptr @taskqueue_create(ptr noundef nonnull @.str.5, i32 noundef %86, i32 noundef %87, ptr noundef nonnull %88) #4
store ptr %89, ptr %88, align 8, !tbaa !24
%90 = load i32, ptr @PI_NET, align 4, !tbaa !5
%91 = tail call i32 @device_get_nameunit(i32 noundef %0) #4
%92 = tail call i32 (ptr, i32, i32, ptr, i32, ...) @taskqueue_start_threads(ptr noundef nonnull %88, i32 noundef 1, i32 noundef %90, ptr noundef nonnull @.str.6, i32 noundef %91) #4
%93 = load ptr, ptr %88, align 8, !tbaa !24
%94 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 21
%95 = load i32, ptr @hn_xpnt_vf_init_taskfunc, align 4, !tbaa !5
%96 = tail call i32 @TIMEOUT_TASK_INIT(ptr noundef %93, ptr noundef nonnull %94, i32 noundef 0, i32 noundef %95, ptr noundef nonnull %3) #4
br label %97
97: ; preds = %85, %65
%98 = load i32, ptr @IFT_ETHER, align 4, !tbaa !5
%99 = tail call ptr @if_alloc(i32 noundef %98) #4
%100 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 20
store ptr %99, ptr %100, align 8, !tbaa !25
%101 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 16
store ptr %3, ptr %101, align 8, !tbaa !26
%102 = tail call i32 @device_get_name(i32 noundef %0) #4
%103 = tail call i32 @device_get_unit(i32 noundef %0) #4
%104 = tail call i32 @if_initname(ptr noundef %99, i32 noundef %102, i32 noundef %103) #4
%105 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 16
%106 = load i32, ptr @hn_ifmedia_upd, align 4, !tbaa !5
%107 = load i32, ptr @hn_ifmedia_sts, align 4, !tbaa !5
%108 = tail call i32 @ifmedia_init(ptr noundef nonnull %105, i32 noundef 0, i32 noundef %106, i32 noundef %107) #4
%109 = load i32, ptr @hn_chan_cnt, align 4, !tbaa !5
%110 = icmp slt i32 %109, 1
%111 = load i32, ptr @mp_ncpus, align 4, !tbaa !5
br i1 %110, label %112, label %115
112: ; preds = %97
%113 = load i32, ptr @HN_RING_CNT_DEF_MAX, align 4, !tbaa !5
%114 = tail call i32 @llvm.smin.i32(i32 %111, i32 %113)
br label %117
115: ; preds = %97
%116 = tail call i32 @llvm.smin.i32(i32 %109, i32 %111)
br label %117
117: ; preds = %115, %112
%118 = phi i32 [ %114, %112 ], [ %116, %115 ]
%119 = load i32, ptr @hn_tx_ring_cnt, align 4, !tbaa !5
%120 = icmp slt i32 %119, 1
%121 = tail call i32 @llvm.smin.i32(i32 %119, i32 %118)
%122 = select i1 %120, i32 %118, i32 %121
%123 = tail call i32 @atomic_fetchadd_int(ptr noundef nonnull @hn_cpu_index, i32 noundef %118) #4
%124 = load i32, ptr @mp_ncpus, align 4, !tbaa !5
%125 = srem i32 %123, %124
store i32 %125, ptr %3, align 8, !tbaa !29
%126 = tail call i32 @hn_create_tx_data(ptr noundef nonnull %3, i32 noundef %122) #4
%127 = icmp eq i32 %126, 0
br i1 %127, label %128, label %500
128: ; preds = %117
%129 = tail call i32 @hn_create_rx_data(ptr noundef nonnull %3, i32 noundef %118) #4
%130 = icmp eq i32 %129, 0
br i1 %130, label %131, label %500
131: ; preds = %128
%132 = tail call i32 @bus_get_dma_tag(i32 noundef %0) #4
%133 = load i32, ptr @HN_XACT_REQ_SIZE, align 4, !tbaa !5
%134 = load i32, ptr @HN_XACT_RESP_SIZE, align 4, !tbaa !5
%135 = tail call ptr @vmbus_xact_ctx_create(i32 noundef %132, i32 noundef %133, i32 noundef %134, i32 noundef 0) #4
%136 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 19
store ptr %135, ptr %136, align 8, !tbaa !30
%137 = icmp eq ptr %135, null
br i1 %137, label %138, label %140
138: ; preds = %131
%139 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %500
140: ; preds = %131
%141 = load i32, ptr %9, align 4, !tbaa !14
%142 = tail call i32 @vmbus_chan_set_orphan(i32 noundef %141, ptr noundef nonnull %135) #4
%143 = load i32, ptr %9, align 4, !tbaa !14
%144 = tail call i64 @vmbus_chan_is_revoked(i32 noundef %143) #4
%145 = icmp eq i64 %144, 0
br i1 %145, label %148, label %146
146: ; preds = %140
%147 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %500
148: ; preds = %140
%149 = load i64, ptr @ETHERMTU, align 8, !tbaa !15
%150 = tail call i32 @hn_synth_attach(ptr noundef nonnull %3, i64 noundef %149) #4
%151 = icmp eq i32 %150, 0
br i1 %151, label %152, label %500
152: ; preds = %148
%153 = call i32 @hn_rndis_get_eaddr(ptr noundef nonnull %3, ptr noundef nonnull %6) #4
%154 = icmp eq i32 %153, 0
br i1 %154, label %155, label %500
155: ; preds = %152
%156 = call i32 @hn_rndis_get_mtu(ptr noundef nonnull %3, ptr noundef nonnull %2) #4
%157 = icmp eq i32 %156, 0
br i1 %157, label %160, label %158
158: ; preds = %155
%159 = load i64, ptr @ETHERMTU, align 8, !tbaa !15
store i64 %159, ptr %2, align 8, !tbaa !15
br label %166
160: ; preds = %155
%161 = load i64, ptr @bootverbose, align 8, !tbaa !15
%162 = icmp eq i64 %161, 0
br i1 %162, label %166, label %163
163: ; preds = %160
%164 = load i64, ptr %2, align 8, !tbaa !15
%165 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.7, i64 noundef %164) #4
br label %166
166: ; preds = %160, %163, %158
%167 = call i32 @hn_fixup_tx_data(ptr noundef nonnull %3) #4
%168 = call i32 @hn_fixup_rx_data(ptr noundef nonnull %3) #4
%169 = call ptr @device_get_sysctl_ctx(i32 noundef %0) #4
%170 = call i32 @device_get_sysctl_tree(i32 noundef %0) #4
%171 = call ptr @SYSCTL_CHILDREN(i32 noundef %170) #4
%172 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%173 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%174 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 2
%175 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %172, ptr noundef nonnull @.str.8, i32 noundef %173, ptr noundef nonnull %174, i32 noundef 0, ptr noundef nonnull @.str.9) #4
%176 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%177 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%178 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%179 = or i32 %178, %177
%180 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%181 = or i32 %179, %180
%182 = load i32, ptr @hn_ndis_version_sysctl, align 4, !tbaa !5
%183 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %176, ptr noundef nonnull @.str.10, i32 noundef %181, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %182, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.12) #4
%184 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%185 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%186 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%187 = or i32 %186, %185
%188 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%189 = or i32 %187, %188
%190 = load i32, ptr @hn_caps_sysctl, align 4, !tbaa !5
%191 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %184, ptr noundef nonnull @.str.13, i32 noundef %189, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %190, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.14) #4
%192 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%193 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%194 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%195 = or i32 %194, %193
%196 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%197 = or i32 %195, %196
%198 = load i32, ptr @hn_hwassist_sysctl, align 4, !tbaa !5
%199 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %192, ptr noundef nonnull @.str.15, i32 noundef %197, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %198, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.15) #4
%200 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%201 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%202 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %200, ptr noundef nonnull @.str.16, i32 noundef %201, ptr noundef nonnull %99, i32 noundef 0, ptr noundef nonnull @.str.17) #4
%203 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%204 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%205 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 1
%206 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %203, ptr noundef nonnull @.str.18, i32 noundef %204, ptr noundef nonnull %205, i32 noundef 0, ptr noundef nonnull @.str.19) #4
%207 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%208 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%209 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 2
%210 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %207, ptr noundef nonnull @.str.20, i32 noundef %208, ptr noundef nonnull %209, i32 noundef 0, ptr noundef nonnull @.str.21) #4
%211 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%212 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%213 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%214 = or i32 %213, %212
%215 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%216 = or i32 %214, %215
%217 = load i32, ptr @hn_rxfilter_sysctl, align 4, !tbaa !5
%218 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %211, ptr noundef nonnull @.str.22, i32 noundef %216, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %217, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.22) #4
%219 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%220 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%221 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%222 = or i32 %221, %220
%223 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%224 = or i32 %222, %223
%225 = load i32, ptr @hn_rss_hash_sysctl, align 4, !tbaa !5
%226 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %219, ptr noundef nonnull @.str.23, i32 noundef %224, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %225, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.24) #4
%227 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%228 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%229 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%230 = or i32 %229, %228
%231 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%232 = or i32 %230, %231
%233 = load i32, ptr @hn_rss_hcap_sysctl, align 4, !tbaa !5
%234 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %227, ptr noundef nonnull @.str.25, i32 noundef %232, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %233, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.26) #4
%235 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%236 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%237 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%238 = or i32 %237, %236
%239 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%240 = or i32 %238, %239
%241 = load i32, ptr @hn_rss_mbuf_sysctl, align 4, !tbaa !5
%242 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %235, ptr noundef nonnull @.str.27, i32 noundef %240, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %241, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.28) #4
%243 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%244 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%245 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 17
%246 = call i32 @SYSCTL_ADD_INT(ptr noundef %169, ptr noundef %171, i32 noundef %243, ptr noundef nonnull @.str.29, i32 noundef %244, ptr noundef nonnull %245, i32 noundef 0, ptr noundef nonnull @.str.30) #4
%247 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%248 = load i32, ptr @CTLTYPE_OPAQUE, align 4, !tbaa !5
%249 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%250 = or i32 %249, %248
%251 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%252 = or i32 %250, %251
%253 = load i32, ptr @hn_rss_key_sysctl, align 4, !tbaa !5
%254 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %247, ptr noundef nonnull @.str.31, i32 noundef %252, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %253, ptr noundef nonnull @.str.32, ptr noundef nonnull @.str.33) #4
%255 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%256 = load i32, ptr @CTLTYPE_OPAQUE, align 4, !tbaa !5
%257 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%258 = or i32 %257, %256
%259 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%260 = or i32 %258, %259
%261 = load i32, ptr @hn_rss_ind_sysctl, align 4, !tbaa !5
%262 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %255, ptr noundef nonnull @.str.34, i32 noundef %260, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %261, ptr noundef nonnull @.str.32, ptr noundef nonnull @.str.35) #4
%263 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%264 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%265 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 3
%266 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %263, ptr noundef nonnull @.str.36, i32 noundef %264, ptr noundef nonnull %265, i32 noundef 0, ptr noundef nonnull @.str.37) #4
%267 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%268 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%269 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 4
%270 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %267, ptr noundef nonnull @.str.38, i32 noundef %268, ptr noundef nonnull %269, i32 noundef 0, ptr noundef nonnull @.str.39) #4
%271 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%272 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%273 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 5
%274 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %271, ptr noundef nonnull @.str.40, i32 noundef %272, ptr noundef nonnull %273, i32 noundef 0, ptr noundef nonnull @.str.41) #4
%275 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%276 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%277 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%278 = or i32 %277, %276
%279 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%280 = or i32 %278, %279
%281 = load i32, ptr @hn_txagg_size_sysctl, align 4, !tbaa !5
%282 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %275, ptr noundef nonnull @.str.42, i32 noundef %280, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %281, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.44) #4
%283 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%284 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%285 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%286 = or i32 %285, %284
%287 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%288 = or i32 %286, %287
%289 = load i32, ptr @hn_txagg_pkts_sysctl, align 4, !tbaa !5
%290 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %283, ptr noundef nonnull @.str.45, i32 noundef %288, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %289, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.46) #4
%291 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%292 = load i32, ptr @CTLTYPE_UINT, align 4, !tbaa !5
%293 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%294 = or i32 %293, %292
%295 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%296 = or i32 %294, %295
%297 = load i32, ptr @hn_polling_sysctl, align 4, !tbaa !5
%298 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %291, ptr noundef nonnull @.str.47, i32 noundef %296, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %297, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.48) #4
%299 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%300 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%301 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%302 = or i32 %301, %300
%303 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%304 = or i32 %302, %303
%305 = load i32, ptr @hn_vf_sysctl, align 4, !tbaa !5
%306 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %299, ptr noundef nonnull @.str.49, i32 noundef %304, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %305, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.50) #4
%307 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !15
%308 = icmp eq i64 %307, 0
%309 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%310 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !5
%311 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
br i1 %308, label %312, label %318
312: ; preds = %166
%313 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !5
%314 = or i32 %310, %313
%315 = or i32 %314, %311
%316 = load i32, ptr @hn_rxvf_sysctl, align 4, !tbaa !5
%317 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %309, ptr noundef nonnull @.str.51, i32 noundef %315, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %316, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.52) #4
br label %332
318: ; preds = %166
%319 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%320 = or i32 %310, %319
%321 = or i32 %320, %311
%322 = load i32, ptr @hn_xpnt_vf_enabled_sysctl, align 4, !tbaa !5
%323 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %309, ptr noundef nonnull @.str.53, i32 noundef %321, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %322, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.54) #4
%324 = load i32, ptr @OID_AUTO, align 4, !tbaa !5
%325 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !5
%326 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !5
%327 = or i32 %326, %325
%328 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !5
%329 = or i32 %327, %328
%330 = load i32, ptr @hn_xpnt_vf_accbpf_sysctl, align 4, !tbaa !5
%331 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %324, ptr noundef nonnull @.str.55, i32 noundef %329, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %330, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.56) #4
br label %332
332: ; preds = %318, %312
%333 = load i32, ptr @IFM_ETHER, align 4, !tbaa !5
%334 = load i32, ptr @IFM_AUTO, align 4, !tbaa !5
%335 = or i32 %334, %333
%336 = call i32 @ifmedia_add(ptr noundef nonnull %105, i32 noundef %335, i32 noundef 0, ptr noundef null) #4
%337 = load i32, ptr @IFM_ETHER, align 4, !tbaa !5
%338 = load i32, ptr @IFM_AUTO, align 4, !tbaa !5
%339 = or i32 %338, %337
%340 = call i32 @ifmedia_set(ptr noundef nonnull %105, i32 noundef %339) #4
%341 = load ptr, ptr %105, align 8, !tbaa !31
%342 = load i32, ptr %341, align 4, !tbaa !32
%343 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 16, i32 1
store i32 %342, ptr %343, align 8, !tbaa !34
%344 = call i32 @IF_Gbps(i32 noundef 10) #4
%345 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 15
store i32 %344, ptr %345, align 4, !tbaa !35
%346 = load i32, ptr @IFF_BROADCAST, align 4, !tbaa !5
%347 = load i32, ptr @IFF_SIMPLEX, align 4, !tbaa !5
%348 = or i32 %347, %346
%349 = load i32, ptr @IFF_MULTICAST, align 4, !tbaa !5
%350 = or i32 %348, %349
%351 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 3
store i32 %350, ptr %351, align 8, !tbaa !36
%352 = load i32, ptr @hn_ioctl, align 4, !tbaa !5
%353 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 14
store i32 %352, ptr %353, align 8, !tbaa !37
%354 = load i32, ptr @hn_init, align 4, !tbaa !5
%355 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 13
store i32 %354, ptr %355, align 4, !tbaa !38
%356 = load i32, ptr @hn_transmit, align 4, !tbaa !5
%357 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 10
store i32 %356, ptr %357, align 8, !tbaa !39
%358 = load i32, ptr @hn_xmit_qflush, align 4, !tbaa !5
%359 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 9
store i32 %358, ptr %359, align 4, !tbaa !40
%360 = load i32, ptr @IFCAP_RXCSUM, align 4, !tbaa !5
%361 = load i32, ptr @IFCAP_LRO, align 4, !tbaa !5
%362 = or i32 %361, %360
%363 = load i32, ptr @IFCAP_LINKSTATE, align 4, !tbaa !5
%364 = or i32 %362, %363
%365 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 4
%366 = load i32, ptr %365, align 4, !tbaa !41
%367 = or i32 %364, %366
store i32 %367, ptr %365, align 4, !tbaa !41
%368 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 6
%369 = load i32, ptr %368, align 8, !tbaa !42
%370 = load i32, ptr @HN_CAP_VLAN, align 4, !tbaa !5
%371 = and i32 %370, %369
%372 = icmp eq i32 %371, 0
br i1 %372, label %378, label %373
373: ; preds = %332
%374 = load i32, ptr @IFCAP_VLAN_HWTAGGING, align 4, !tbaa !5
%375 = load i32, ptr @IFCAP_VLAN_MTU, align 4, !tbaa !5
%376 = or i32 %374, %375
%377 = or i32 %376, %367
store i32 %377, ptr %365, align 4, !tbaa !41
br label %378
378: ; preds = %373, %332
%379 = phi i32 [ %377, %373 ], [ %367, %332 ]
%380 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 15
%381 = load ptr, ptr %380, align 8, !tbaa !43
%382 = load i32, ptr %381, align 4, !tbaa !44
%383 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 5
%384 = load i32, ptr @HN_CSUM_IP_MASK, align 4, !tbaa !5
%385 = and i32 %384, %382
%386 = icmp eq i32 %385, 0
br i1 %386, label %390, label %387
387: ; preds = %378
%388 = load i32, ptr @IFCAP_TXCSUM, align 4, !tbaa !5
%389 = or i32 %379, %388
store i32 %389, ptr %365, align 4, !tbaa !41
br label %390
390: ; preds = %387, %378
%391 = phi i32 [ %389, %387 ], [ %379, %378 ]
%392 = load i32, ptr @HN_CSUM_IP6_MASK, align 4, !tbaa !5
%393 = and i32 %392, %382
%394 = icmp eq i32 %393, 0
br i1 %394, label %398, label %395
395: ; preds = %390
%396 = load i32, ptr @IFCAP_TXCSUM_IPV6, align 4, !tbaa !5
%397 = or i32 %391, %396
store i32 %397, ptr %365, align 4, !tbaa !41
br label %398
398: ; preds = %395, %390
%399 = phi i32 [ %397, %395 ], [ %391, %390 ]
%400 = load i32, ptr @HN_CAP_TSO4, align 4, !tbaa !5
%401 = and i32 %400, %369
%402 = icmp eq i32 %401, 0
br i1 %402, label %408, label %403
403: ; preds = %398
%404 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !5
%405 = or i32 %399, %404
store i32 %405, ptr %365, align 4, !tbaa !41
%406 = load i32, ptr @CSUM_IP_TSO, align 4, !tbaa !5
%407 = or i32 %406, %382
br label %408
408: ; preds = %403, %398
%409 = phi i32 [ %407, %403 ], [ %382, %398 ]
%410 = phi i32 [ %405, %403 ], [ %399, %398 ]
%411 = load i32, ptr @HN_CAP_TSO6, align 4, !tbaa !5
%412 = and i32 %411, %369
%413 = icmp eq i32 %412, 0
%414 = load i32, ptr @IFCAP_TSO6, align 4, !tbaa !5
%415 = load i32, ptr @CSUM_IP6_TSO, align 4, !tbaa !5
br i1 %413, label %419, label %416
416: ; preds = %408
%417 = or i32 %410, %414
store i32 %417, ptr %365, align 4, !tbaa !41
%418 = or i32 %409, %415
br label %419
419: ; preds = %416, %408
%420 = phi i32 [ %418, %416 ], [ %409, %408 ]
%421 = phi i32 [ %417, %416 ], [ %410, %408 ]
%422 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 6
%423 = load i32, ptr @IFCAP_TXCSUM_IPV6, align 4, !tbaa !5
%424 = or i32 %414, %423
%425 = xor i32 %424, -1
%426 = and i32 %421, %425
store i32 %426, ptr %422, align 4, !tbaa !46
%427 = or i32 %415, %392
%428 = xor i32 %427, -1
%429 = and i32 %420, %428
store i32 %429, ptr %383, align 8, !tbaa !47
%430 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !5
%431 = or i32 %430, %414
%432 = and i32 %431, %421
%433 = icmp eq i32 %432, 0
br i1 %433, label %442, label %434
434: ; preds = %419
%435 = call i32 @HN_LOCK(ptr noundef nonnull %3) #4
%436 = load i32, ptr @hn_tso_maxlen, align 4, !tbaa !5
%437 = load i64, ptr @ETHERMTU, align 8, !tbaa !15
%438 = call i32 @hn_set_tso_maxsize(ptr noundef nonnull %3, i32 noundef %436, i64 noundef %437) #4
%439 = call i32 @HN_UNLOCK(ptr noundef nonnull %3) #4
%440 = load i64, ptr @HN_TX_DATA_SEGCNT_MAX, align 8, !tbaa !15
store i64 %440, ptr %205, align 8, !tbaa !48
%441 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !15
store i64 %441, ptr %209, align 8, !tbaa !49
br label %442
442: ; preds = %434, %419
%443 = call i32 @ether_ifattach(ptr noundef nonnull %99, ptr noundef nonnull %6) #4
%444 = load i32, ptr %365, align 4, !tbaa !41
%445 = load i32, ptr @IFCAP_TSO6, align 4, !tbaa !5
%446 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !5
%447 = or i32 %446, %445
%448 = and i32 %447, %444
%449 = icmp ne i32 %448, 0
%450 = load i64, ptr @bootverbose, align 8
%451 = icmp ne i64 %450, 0
%452 = select i1 %449, i1 %451, i1 false
br i1 %452, label %453, label %457
453: ; preds = %442
%454 = load i64, ptr %205, align 8, !tbaa !48
%455 = load i64, ptr %209, align 8, !tbaa !49
%456 = call i32 @if_printf(ptr noundef nonnull %99, ptr noundef nonnull @.str.57, i64 noundef %454, i64 noundef %455) #4
br label %457
457: ; preds = %453, %442
%458 = load i64, ptr %2, align 8, !tbaa !15
%459 = load i64, ptr @ETHERMTU, align 8, !tbaa !15
%460 = icmp slt i64 %458, %459
br i1 %460, label %461, label %466
461: ; preds = %457
%462 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 7
%463 = load i64, ptr %462, align 8, !tbaa !50
%464 = call i32 @if_printf(ptr noundef nonnull %99, ptr noundef nonnull @.str.58, i64 noundef %463, i64 noundef %458) #4
%465 = load i64, ptr %2, align 8, !tbaa !15
store i64 %465, ptr %462, align 8, !tbaa !50
br label %466
466: ; preds = %461, %457
%467 = getelementptr inbounds %struct.ifnet, ptr %99, i64 0, i32 8
store i32 4, ptr %467, align 8, !tbaa !51
%468 = load ptr, ptr %68, align 8, !tbaa !23
%469 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 14
store ptr %468, ptr %469, align 8, !tbaa !52
%470 = call i32 @hn_update_link_status(ptr noundef nonnull %3) #4
%471 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !15
%472 = icmp eq i64 %471, 0
%473 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !5
br i1 %472, label %474, label %484
474: ; preds = %466
%475 = load i32, ptr @ifnet_event, align 4, !tbaa !5
%476 = load i32, ptr @hn_ifnet_event, align 4, !tbaa !5
%477 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %475, i32 noundef %476, ptr noundef nonnull %3, i32 noundef %473) #4
%478 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 12
store ptr %477, ptr %478, align 8, !tbaa !53
%479 = load i32, ptr @ifaddr_event, align 4, !tbaa !5
%480 = load i32, ptr @hn_ifaddr_event, align 4, !tbaa !5
%481 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !5
%482 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %479, i32 noundef %480, ptr noundef nonnull %3, i32 noundef %481) #4
%483 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 11
store ptr %482, ptr %483, align 8, !tbaa !54
br label %489
484: ; preds = %466
%485 = load i32, ptr @ifnet_link_event, align 4, !tbaa !5
%486 = load i32, ptr @hn_ifnet_lnkevent, align 4, !tbaa !5
%487 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %485, i32 noundef %486, ptr noundef nonnull %3, i32 noundef %473) #4
%488 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 10
store ptr %487, ptr %488, align 8, !tbaa !55
br label %489
489: ; preds = %484, %474
%490 = load i32, ptr @ether_ifattach_event, align 4, !tbaa !5
%491 = load i32, ptr @hn_ifnet_attevent, align 4, !tbaa !5
%492 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !5
%493 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %490, i32 noundef %491, ptr noundef nonnull %3, i32 noundef %492) #4
%494 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 9
store ptr %493, ptr %494, align 8, !tbaa !56
%495 = load i32, ptr @ifnet_departure_event, align 4, !tbaa !5
%496 = load i32, ptr @hn_ifnet_detevent, align 4, !tbaa !5
%497 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !5
%498 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %495, i32 noundef %496, ptr noundef nonnull %3, i32 noundef %497) #4
%499 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 8
store ptr %498, ptr %499, align 8, !tbaa !57
br label %511
500: ; preds = %152, %148, %128, %117, %146, %138
%501 = phi i32 [ %126, %117 ], [ %129, %128 ], [ %139, %138 ], [ %147, %146 ], [ %150, %148 ], [ %153, %152 ]
%502 = getelementptr inbounds %struct.hn_softc, ptr %3, i64 0, i32 7
%503 = load i32, ptr %502, align 4, !tbaa !58
%504 = load i32, ptr @HN_FLAG_SYNTH_ATTACHED, align 4, !tbaa !5
%505 = and i32 %504, %503
%506 = icmp eq i32 %505, 0
br i1 %506, label %509, label %507
507: ; preds = %500
%508 = call i32 @hn_synth_detach(ptr noundef nonnull %3) #4
br label %509
509: ; preds = %507, %500
%510 = call i32 @hn_detach(i32 noundef %0) #4
br label %511
511: ; preds = %509, %489
%512 = phi i32 [ %501, %509 ], [ 0, %489 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret i32 %512
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare i32 @vmbus_get_channel(i32 noundef) local_unnamed_addr #2
declare i32 @HN_LOCK_INIT(ptr noundef) local_unnamed_addr #2
declare i32 @rm_init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @taskqueue_create(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @taskqueue_start_threads(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @TASK_INIT(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @TIMEOUT_TASK_INIT(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @if_alloc(i32 noundef) local_unnamed_addr #2
declare i32 @if_initname(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_get_name(i32 noundef) local_unnamed_addr #2
declare i32 @device_get_unit(i32 noundef) local_unnamed_addr #2
declare i32 @ifmedia_init(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @atomic_fetchadd_int(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hn_create_tx_data(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hn_create_rx_data(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @vmbus_xact_ctx_create(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bus_get_dma_tag(i32 noundef) local_unnamed_addr #2
declare i32 @vmbus_chan_set_orphan(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @vmbus_chan_is_revoked(i32 noundef) local_unnamed_addr #2
declare i32 @hn_synth_attach(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @hn_rndis_get_eaddr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hn_rndis_get_mtu(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @hn_fixup_tx_data(ptr noundef) local_unnamed_addr #2
declare i32 @hn_fixup_rx_data(ptr noundef) local_unnamed_addr #2
declare ptr @device_get_sysctl_ctx(i32 noundef) local_unnamed_addr #2
declare ptr @SYSCTL_CHILDREN(i32 noundef) local_unnamed_addr #2
declare i32 @device_get_sysctl_tree(i32 noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_UINT(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_PROC(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_INT(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ifmedia_add(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ifmedia_set(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @IF_Gbps(i32 noundef) local_unnamed_addr #2
declare i32 @HN_LOCK(ptr noundef) local_unnamed_addr #2
declare i32 @hn_set_tso_maxsize(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @HN_UNLOCK(ptr noundef) local_unnamed_addr #2
declare i32 @ether_ifattach(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @if_printf(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @hn_update_link_status(ptr noundef) local_unnamed_addr #2
declare ptr @EVENTHANDLER_REGISTER(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hn_synth_detach(ptr noundef) local_unnamed_addr #2
declare i32 @hn_detach(i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 208}
!10 = !{!"hn_softc", !6, i64 0, !6, i64 4, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !6, i64 40, !6, i64 44, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !13, i64 112, !6, i64 128, !6, i64 132, !12, i64 136, !12, i64 144, !6, i64 152, !12, i64 160, !6, i64 168, !6, i64 172, !6, i64 176, !12, i64 184, !6, i64 192, !6, i64 196, !6, i64 200, !6, i64 204, !6, i64 208}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"TYPE_9__", !12, i64 0, !6, i64 8}
!14 = !{!10, !6, i64 132}
!15 = !{!11, !11, i64 0}
!16 = !{!10, !6, i64 200}
!17 = !{!10, !6, i64 196}
!18 = !{!10, !6, i64 192}
!19 = !{!10, !12, i64 184}
!20 = !{!12, !12, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!10, !12, i64 88}
!24 = !{!10, !12, i64 160}
!25 = !{!10, !12, i64 144}
!26 = !{!27, !12, i64 80}
!27 = !{!"ifnet", !11, i64 0, !11, i64 8, !11, i64 16, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !11, i64 40, !6, i64 48, !6, i64 52, !6, i64 56, !28, i64 60, !6, i64 64, !6, i64 68, !6, i64 72, !6, i64 76, !12, i64 80}
!28 = !{!"TYPE_11__", !6, i64 0}
!29 = !{!10, !6, i64 0}
!30 = !{!10, !12, i64 136}
!31 = !{!10, !12, i64 112}
!32 = !{!33, !6, i64 0}
!33 = !{!"TYPE_8__", !6, i64 0}
!34 = !{!10, !6, i64 120}
!35 = !{!27, !6, i64 76}
!36 = !{!27, !6, i64 24}
!37 = !{!27, !6, i64 72}
!38 = !{!27, !6, i64 68}
!39 = !{!27, !6, i64 56}
!40 = !{!27, !6, i64 52}
!41 = !{!27, !6, i64 28}
!42 = !{!10, !6, i64 40}
!43 = !{!10, !12, i64 104}
!44 = !{!45, !6, i64 0}
!45 = !{!"TYPE_10__", !6, i64 0}
!46 = !{!27, !6, i64 36}
!47 = !{!27, !6, i64 32}
!48 = !{!27, !11, i64 8}
!49 = !{!27, !11, i64 16}
!50 = !{!27, !11, i64 40}
!51 = !{!27, !6, i64 48}
!52 = !{!10, !12, i64 96}
!53 = !{!10, !12, i64 80}
!54 = !{!10, !12, i64 72}
!55 = !{!10, !12, i64 64}
!56 = !{!10, !12, i64 56}
!57 = !{!10, !12, i64 48}
!58 = !{!10, !6, i64 44}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/hyperv/netvsc/extr_if_hn.c_hn_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/hyperv/netvsc/extr_if_hn.c_hn_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETHER_ADDR_LEN = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [5 x i8] c"hnvf\00", align 1
@hn_xpnt_vf = common local_unnamed_addr global i64 0, align 8
@hn_xpnt_vf_accbpf = common local_unnamed_addr global i64 0, align 8
@HN_XVFFLAG_ACCBPF = common local_unnamed_addr global i32 0, align 4
@hn_tx_agg_size = common local_unnamed_addr global i32 0, align 4
@hn_tx_agg_pkts = common local_unnamed_addr global i32 0, align 4
@hn_tx_taskq_mode = common local_unnamed_addr global i64 0, align 8
@HN_TX_TASKQ_M_INDEP = common local_unnamed_addr global i64 0, align 8
@hn_tx_taskq_cnt = common local_unnamed_addr global i32 0, align 4
@M_DEVBUF = common local_unnamed_addr global i32 0, align 4
@M_WAITOK = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [6 x i8] c"hn_tx\00", align 1
@taskqueue_thread_enqueue = common local_unnamed_addr global i32 0, align 4
@PI_NET = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [8 x i8] c"%s tx%d\00", align 1
@HN_TX_TASKQ_M_GLOBAL = common local_unnamed_addr global i64 0, align 8
@hn_tx_taskque = common local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [8 x i8] c"hn_mgmt\00", align 1
@.str.4 = private unnamed_addr constant [8 x i8] c"%s mgmt\00", align 1
@hn_link_taskfunc = common local_unnamed_addr global i32 0, align 4
@hn_netchg_init_taskfunc = common local_unnamed_addr global i32 0, align 4
@hn_netchg_status_taskfunc = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [6 x i8] c"hn_vf\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c"%s vf\00", align 1
@hn_xpnt_vf_init_taskfunc = common local_unnamed_addr global i32 0, align 4
@IFT_ETHER = common local_unnamed_addr global i32 0, align 4
@hn_ifmedia_upd = common local_unnamed_addr global i32 0, align 4
@hn_ifmedia_sts = common local_unnamed_addr global i32 0, align 4
@hn_chan_cnt = common local_unnamed_addr global i32 0, align 4
@mp_ncpus = common local_unnamed_addr global i32 0, align 4
@HN_RING_CNT_DEF_MAX = common local_unnamed_addr global i32 0, align 4
@hn_tx_ring_cnt = common local_unnamed_addr global i32 0, align 4
@hn_cpu_index = common global i32 0, align 4
@HN_XACT_REQ_SIZE = common local_unnamed_addr global i32 0, align 4
@HN_XACT_RESP_SIZE = common local_unnamed_addr global i32 0, align 4
@ENXIO = common local_unnamed_addr global i32 0, align 4
@ETHERMTU = common local_unnamed_addr global i64 0, align 8
@bootverbose = common local_unnamed_addr global i64 0, align 8
@.str.7 = private unnamed_addr constant [14 x i8] c"RNDIS mtu %u\0A\00", align 1
@OID_AUTO = common local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [12 x i8] c"nvs_version\00", align 1
@CTLFLAG_RD = common local_unnamed_addr global i32 0, align 4
@.str.9 = private unnamed_addr constant [12 x i8] c"NVS version\00", align 1
@.str.10 = private unnamed_addr constant [13 x i8] c"ndis_version\00", align 1
@CTLTYPE_STRING = common local_unnamed_addr global i32 0, align 4
@CTLFLAG_MPSAFE = common local_unnamed_addr global i32 0, align 4
@hn_ndis_version_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.11 = private unnamed_addr constant [2 x i8] c"A\00", align 1
@.str.12 = private unnamed_addr constant [13 x i8] c"NDIS version\00", align 1
@.str.13 = private unnamed_addr constant [5 x i8] c"caps\00", align 1
@hn_caps_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.14 = private unnamed_addr constant [13 x i8] c"capabilities\00", align 1
@.str.15 = private unnamed_addr constant [9 x i8] c"hwassist\00", align 1
@hn_hwassist_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.16 = private unnamed_addr constant [8 x i8] c"tso_max\00", align 1
@.str.17 = private unnamed_addr constant [13 x i8] c"max TSO size\00", align 1
@.str.18 = private unnamed_addr constant [14 x i8] c"tso_maxsegcnt\00", align 1
@.str.19 = private unnamed_addr constant [22 x i8] c"max # of TSO segments\00", align 1
@.str.20 = private unnamed_addr constant [13 x i8] c"tso_maxsegsz\00", align 1
@.str.21 = private unnamed_addr constant [24 x i8] c"max size of TSO segment\00", align 1
@.str.22 = private unnamed_addr constant [9 x i8] c"rxfilter\00", align 1
@hn_rxfilter_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.23 = private unnamed_addr constant [9 x i8] c"rss_hash\00", align 1
@hn_rss_hash_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.24 = private unnamed_addr constant [9 x i8] c"RSS hash\00", align 1
@.str.25 = private unnamed_addr constant [12 x i8] c"rss_hashcap\00", align 1
@hn_rss_hcap_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.26 = private unnamed_addr constant [22 x i8] c"RSS hash capabilities\00", align 1
@.str.27 = private unnamed_addr constant [10 x i8] c"mbuf_hash\00", align 1
@hn_rss_mbuf_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.28 = private unnamed_addr constant [19 x i8] c"RSS hash for mbufs\00", align 1
@.str.29 = private unnamed_addr constant [13 x i8] c"rss_ind_size\00", align 1
@.str.30 = private unnamed_addr constant [25 x i8] c"RSS indirect entry count\00", align 1
@.str.31 = private unnamed_addr constant [8 x i8] c"rss_key\00", align 1
@CTLTYPE_OPAQUE = common local_unnamed_addr global i32 0, align 4
@CTLFLAG_RW = common local_unnamed_addr global i32 0, align 4
@hn_rss_key_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.32 = private unnamed_addr constant [3 x i8] c"IU\00", align 1
@.str.33 = private unnamed_addr constant [8 x i8] c"RSS key\00", align 1
@.str.34 = private unnamed_addr constant [8 x i8] c"rss_ind\00", align 1
@hn_rss_ind_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.35 = private unnamed_addr constant [19 x i8] c"RSS indirect table\00", align 1
@.str.36 = private unnamed_addr constant [15 x i8] c"rndis_agg_size\00", align 1
@.str.37 = private unnamed_addr constant [57 x i8] c"RNDIS offered packet transmission aggregation size limit\00", align 1
@.str.38 = private unnamed_addr constant [15 x i8] c"rndis_agg_pkts\00", align 1
@.str.39 = private unnamed_addr constant [58 x i8] c"RNDIS offered packet transmission aggregation count limit\00", align 1
@.str.40 = private unnamed_addr constant [16 x i8] c"rndis_agg_align\00", align 1
@.str.41 = private unnamed_addr constant [48 x i8] c"RNDIS packet transmission aggregation alignment\00", align 1
@.str.42 = private unnamed_addr constant [9 x i8] c"agg_size\00", align 1
@CTLTYPE_INT = common local_unnamed_addr global i32 0, align 4
@hn_txagg_size_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.43 = private unnamed_addr constant [2 x i8] c"I\00", align 1
@.str.44 = private unnamed_addr constant [63 x i8] c"Packet transmission aggregation size, 0 -- disable, -1 -- auto\00", align 1
@.str.45 = private unnamed_addr constant [9 x i8] c"agg_pkts\00", align 1
@hn_txagg_pkts_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.46 = private unnamed_addr constant [66 x i8] c"Packet transmission aggregation packets, 0 -- disable, -1 -- auto\00", align 1
@.str.47 = private unnamed_addr constant [8 x i8] c"polling\00", align 1
@CTLTYPE_UINT = common local_unnamed_addr global i32 0, align 4
@hn_polling_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.48 = private unnamed_addr constant [52 x i8] c"Polling frequency: [100,1000000], 0 disable polling\00", align 1
@.str.49 = private unnamed_addr constant [3 x i8] c"vf\00", align 1
@hn_vf_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.50 = private unnamed_addr constant [24 x i8] c"Virtual Function's name\00", align 1
@.str.51 = private unnamed_addr constant [5 x i8] c"rxvf\00", align 1
@hn_rxvf_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.52 = private unnamed_addr constant [34 x i8] c"activated Virtual Function's name\00", align 1
@.str.53 = private unnamed_addr constant [16 x i8] c"vf_xpnt_enabled\00", align 1
@hn_xpnt_vf_enabled_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.54 = private unnamed_addr constant [23 x i8] c"Transparent VF enabled\00", align 1
@.str.55 = private unnamed_addr constant [15 x i8] c"vf_xpnt_accbpf\00", align 1
@hn_xpnt_vf_accbpf_sysctl = common local_unnamed_addr global i32 0, align 4
@.str.56 = private unnamed_addr constant [32 x i8] c"Accurate BPF for transparent VF\00", align 1
@IFM_ETHER = common local_unnamed_addr global i32 0, align 4
@IFM_AUTO = common local_unnamed_addr global i32 0, align 4
@IFF_BROADCAST = common local_unnamed_addr global i32 0, align 4
@IFF_SIMPLEX = common local_unnamed_addr global i32 0, align 4
@IFF_MULTICAST = common local_unnamed_addr global i32 0, align 4
@hn_ioctl = common local_unnamed_addr global i32 0, align 4
@hn_init = common local_unnamed_addr global i32 0, align 4
@hn_transmit = common local_unnamed_addr global i32 0, align 4
@hn_xmit_qflush = common local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM = common local_unnamed_addr global i32 0, align 4
@IFCAP_LRO = common local_unnamed_addr global i32 0, align 4
@IFCAP_LINKSTATE = common local_unnamed_addr global i32 0, align 4
@HN_CAP_VLAN = common local_unnamed_addr global i32 0, align 4
@IFCAP_VLAN_HWTAGGING = common local_unnamed_addr global i32 0, align 4
@IFCAP_VLAN_MTU = common local_unnamed_addr global i32 0, align 4
@HN_CSUM_IP_MASK = common local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM = common local_unnamed_addr global i32 0, align 4
@HN_CSUM_IP6_MASK = common local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM_IPV6 = common local_unnamed_addr global i32 0, align 4
@HN_CAP_TSO4 = common local_unnamed_addr global i32 0, align 4
@IFCAP_TSO4 = common local_unnamed_addr global i32 0, align 4
@CSUM_IP_TSO = common local_unnamed_addr global i32 0, align 4
@HN_CAP_TSO6 = common local_unnamed_addr global i32 0, align 4
@IFCAP_TSO6 = common local_unnamed_addr global i32 0, align 4
@CSUM_IP6_TSO = common local_unnamed_addr global i32 0, align 4
@hn_tso_maxlen = common local_unnamed_addr global i32 0, align 4
@HN_TX_DATA_SEGCNT_MAX = common local_unnamed_addr global i64 0, align 8
@PAGE_SIZE = common local_unnamed_addr global i64 0, align 8
@.str.57 = private unnamed_addr constant [24 x i8] c"TSO segcnt %u segsz %u\0A\00", align 1
@.str.58 = private unnamed_addr constant [20 x i8] c"fixup mtu %u -> %u\0A\00", align 1
@ifnet_event = common local_unnamed_addr global i32 0, align 4
@hn_ifnet_event = common local_unnamed_addr global i32 0, align 4
@EVENTHANDLER_PRI_ANY = common local_unnamed_addr global i32 0, align 4
@ifaddr_event = common local_unnamed_addr global i32 0, align 4
@hn_ifaddr_event = common local_unnamed_addr global i32 0, align 4
@ifnet_link_event = common local_unnamed_addr global i32 0, align 4
@hn_ifnet_lnkevent = common local_unnamed_addr global i32 0, align 4
@ether_ifattach_event = common local_unnamed_addr global i32 0, align 4
@hn_ifnet_attevent = common local_unnamed_addr global i32 0, align 4
@ifnet_departure_event = common local_unnamed_addr global i32 0, align 4
@hn_ifnet_detevent = common local_unnamed_addr global i32 0, align 4
@HN_FLAG_SYNTH_ATTACHED = common local_unnamed_addr global i32 0, align 4
@HN_LRO_LENLIM_MULTIRX_DEF = common local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM_IPV6 = common local_unnamed_addr global i32 0, align 4
@hn_start = common local_unnamed_addr global i32 0, align 4
@hn_use_if_start = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @hn_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hn_attach(i32 noundef %0) #0 {
%2 = alloca i64, align 8
%3 = tail call ptr @device_get_softc(i32 noundef %0) #4
%4 = load i32, ptr @ETHER_ADDR_LEN, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i32, i64 %5, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
%7 = getelementptr inbounds i8, ptr %3, i64 208
store i32 %0, ptr %7, align 8, !tbaa !10
%8 = tail call i32 @vmbus_get_channel(i32 noundef %0) #4
%9 = getelementptr inbounds i8, ptr %3, i64 132
store i32 %8, ptr %9, align 4, !tbaa !15
%10 = tail call i32 @HN_LOCK_INIT(ptr noundef %3) #4
%11 = getelementptr inbounds i8, ptr %3, i64 204
%12 = tail call i32 @rm_init(ptr noundef nonnull %11, ptr noundef nonnull @.str) #4
%13 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !16
%14 = icmp ne i64 %13, 0
%15 = load i64, ptr @hn_xpnt_vf_accbpf, align 8
%16 = icmp ne i64 %15, 0
%17 = select i1 %14, i1 %16, i1 false
br i1 %17, label %18, label %23
18: ; preds = %1
%19 = load i32, ptr @HN_XVFFLAG_ACCBPF, align 4, !tbaa !6
%20 = getelementptr inbounds i8, ptr %3, i64 200
%21 = load i32, ptr %20, align 8, !tbaa !17
%22 = or i32 %21, %19
store i32 %22, ptr %20, align 8, !tbaa !17
br label %23
23: ; preds = %18, %1
%24 = load i32, ptr @hn_tx_agg_size, align 4, !tbaa !6
%25 = getelementptr inbounds i8, ptr %3, i64 196
store i32 %24, ptr %25, align 4, !tbaa !18
%26 = load i32, ptr @hn_tx_agg_pkts, align 4, !tbaa !6
%27 = getelementptr inbounds i8, ptr %3, i64 192
store i32 %26, ptr %27, align 8, !tbaa !19
%28 = load i64, ptr @hn_tx_taskq_mode, align 8, !tbaa !16
%29 = load i64, ptr @HN_TX_TASKQ_M_INDEP, align 8, !tbaa !16
%30 = icmp eq i64 %28, %29
br i1 %30, label %31, label %59
31: ; preds = %23
%32 = load i32, ptr @hn_tx_taskq_cnt, align 4, !tbaa !6
%33 = shl i32 %32, 3
%34 = load i32, ptr @M_DEVBUF, align 4, !tbaa !6
%35 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%36 = tail call ptr @malloc(i32 noundef %33, i32 noundef %34, i32 noundef %35) #4
%37 = getelementptr inbounds i8, ptr %3, i64 184
store ptr %36, ptr %37, align 8, !tbaa !20
%38 = load i32, ptr @hn_tx_taskq_cnt, align 4, !tbaa !6
%39 = icmp sgt i32 %38, 0
br i1 %39, label %40, label %65
40: ; preds = %31, %40
%41 = phi i64 [ %55, %40 ], [ 0, %31 ]
%42 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%43 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !6
%44 = load ptr, ptr %37, align 8, !tbaa !20
%45 = getelementptr inbounds ptr, ptr %44, i64 %41
%46 = tail call ptr @taskqueue_create(ptr noundef nonnull @.str.1, i32 noundef %42, i32 noundef %43, ptr noundef %45) #4
%47 = load ptr, ptr %37, align 8, !tbaa !20
%48 = getelementptr inbounds ptr, ptr %47, i64 %41
store ptr %46, ptr %48, align 8, !tbaa !21
%49 = load ptr, ptr %37, align 8, !tbaa !20
%50 = getelementptr inbounds ptr, ptr %49, i64 %41
%51 = load i32, ptr @PI_NET, align 4, !tbaa !6
%52 = tail call i32 @device_get_nameunit(i32 noundef %0) #4
%53 = trunc nuw nsw i64 %41 to i32
%54 = tail call i32 (ptr, i32, i32, ptr, i32, ...) @taskqueue_start_threads(ptr noundef %50, i32 noundef 1, i32 noundef %51, ptr noundef nonnull @.str.2, i32 noundef %52, i32 noundef %53) #4
%55 = add nuw nsw i64 %41, 1
%56 = load i32, ptr @hn_tx_taskq_cnt, align 4, !tbaa !6
%57 = sext i32 %56 to i64
%58 = icmp slt i64 %55, %57
br i1 %58, label %40, label %65, !llvm.loop !22
59: ; preds = %23
%60 = load i64, ptr @HN_TX_TASKQ_M_GLOBAL, align 8, !tbaa !16
%61 = icmp eq i64 %28, %60
br i1 %61, label %62, label %65
62: ; preds = %59
%63 = load ptr, ptr @hn_tx_taskque, align 8, !tbaa !21
%64 = getelementptr inbounds i8, ptr %3, i64 184
store ptr %63, ptr %64, align 8, !tbaa !20
br label %65
65: ; preds = %40, %31, %59, %62
%66 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%67 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !6
%68 = getelementptr inbounds i8, ptr %3, i64 88
%69 = tail call ptr @taskqueue_create(ptr noundef nonnull @.str.3, i32 noundef %66, i32 noundef %67, ptr noundef nonnull %68) #4
store ptr %69, ptr %68, align 8, !tbaa !24
%70 = load i32, ptr @PI_NET, align 4, !tbaa !6
%71 = tail call i32 @device_get_nameunit(i32 noundef %0) #4
%72 = tail call i32 (ptr, i32, i32, ptr, i32, ...) @taskqueue_start_threads(ptr noundef nonnull %68, i32 noundef 1, i32 noundef %70, ptr noundef nonnull @.str.4, i32 noundef %71) #4
%73 = getelementptr inbounds i8, ptr %3, i64 176
%74 = load i32, ptr @hn_link_taskfunc, align 4, !tbaa !6
%75 = tail call i32 @TASK_INIT(ptr noundef nonnull %73, i32 noundef 0, i32 noundef %74, ptr noundef nonnull %3) #4
%76 = getelementptr inbounds i8, ptr %3, i64 172
%77 = load i32, ptr @hn_netchg_init_taskfunc, align 4, !tbaa !6
%78 = tail call i32 @TASK_INIT(ptr noundef nonnull %76, i32 noundef 0, i32 noundef %77, ptr noundef nonnull %3) #4
%79 = load ptr, ptr %68, align 8, !tbaa !24
%80 = getelementptr inbounds i8, ptr %3, i64 168
%81 = load i32, ptr @hn_netchg_status_taskfunc, align 4, !tbaa !6
%82 = tail call i32 @TIMEOUT_TASK_INIT(ptr noundef %79, ptr noundef nonnull %80, i32 noundef 0, i32 noundef %81, ptr noundef nonnull %3) #4
%83 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !16
%84 = icmp eq i64 %83, 0
br i1 %84, label %97, label %85
85: ; preds = %65
%86 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%87 = load i32, ptr @taskqueue_thread_enqueue, align 4, !tbaa !6
%88 = getelementptr inbounds i8, ptr %3, i64 160
%89 = tail call ptr @taskqueue_create(ptr noundef nonnull @.str.5, i32 noundef %86, i32 noundef %87, ptr noundef nonnull %88) #4
store ptr %89, ptr %88, align 8, !tbaa !25
%90 = load i32, ptr @PI_NET, align 4, !tbaa !6
%91 = tail call i32 @device_get_nameunit(i32 noundef %0) #4
%92 = tail call i32 (ptr, i32, i32, ptr, i32, ...) @taskqueue_start_threads(ptr noundef nonnull %88, i32 noundef 1, i32 noundef %90, ptr noundef nonnull @.str.6, i32 noundef %91) #4
%93 = load ptr, ptr %88, align 8, !tbaa !25
%94 = getelementptr inbounds i8, ptr %3, i64 152
%95 = load i32, ptr @hn_xpnt_vf_init_taskfunc, align 4, !tbaa !6
%96 = tail call i32 @TIMEOUT_TASK_INIT(ptr noundef %93, ptr noundef nonnull %94, i32 noundef 0, i32 noundef %95, ptr noundef nonnull %3) #4
br label %97
97: ; preds = %85, %65
%98 = load i32, ptr @IFT_ETHER, align 4, !tbaa !6
%99 = tail call ptr @if_alloc(i32 noundef %98) #4
%100 = getelementptr inbounds i8, ptr %3, i64 144
store ptr %99, ptr %100, align 8, !tbaa !26
%101 = getelementptr inbounds i8, ptr %99, i64 80
store ptr %3, ptr %101, align 8, !tbaa !27
%102 = tail call i32 @device_get_name(i32 noundef %0) #4
%103 = tail call i32 @device_get_unit(i32 noundef %0) #4
%104 = tail call i32 @if_initname(ptr noundef %99, i32 noundef %102, i32 noundef %103) #4
%105 = getelementptr inbounds i8, ptr %3, i64 112
%106 = load i32, ptr @hn_ifmedia_upd, align 4, !tbaa !6
%107 = load i32, ptr @hn_ifmedia_sts, align 4, !tbaa !6
%108 = tail call i32 @ifmedia_init(ptr noundef nonnull %105, i32 noundef 0, i32 noundef %106, i32 noundef %107) #4
%109 = load i32, ptr @hn_chan_cnt, align 4, !tbaa !6
%110 = icmp slt i32 %109, 1
%111 = load i32, ptr @mp_ncpus, align 4, !tbaa !6
br i1 %110, label %112, label %115
112: ; preds = %97
%113 = load i32, ptr @HN_RING_CNT_DEF_MAX, align 4, !tbaa !6
%114 = tail call i32 @llvm.smin.i32(i32 %111, i32 %113)
br label %117
115: ; preds = %97
%116 = tail call i32 @llvm.smin.i32(i32 %109, i32 %111)
br label %117
117: ; preds = %115, %112
%118 = phi i32 [ %114, %112 ], [ %116, %115 ]
%119 = load i32, ptr @hn_tx_ring_cnt, align 4, !tbaa !6
%120 = icmp slt i32 %119, 1
%121 = tail call i32 @llvm.smin.i32(i32 %119, i32 %118)
%122 = select i1 %120, i32 %118, i32 %121
%123 = tail call i32 @atomic_fetchadd_int(ptr noundef nonnull @hn_cpu_index, i32 noundef %118) #4
%124 = load i32, ptr @mp_ncpus, align 4, !tbaa !6
%125 = srem i32 %123, %124
store i32 %125, ptr %3, align 8, !tbaa !30
%126 = tail call i32 @hn_create_tx_data(ptr noundef nonnull %3, i32 noundef %122) #4
%127 = icmp eq i32 %126, 0
br i1 %127, label %128, label %501
128: ; preds = %117
%129 = tail call i32 @hn_create_rx_data(ptr noundef nonnull %3, i32 noundef %118) #4
%130 = icmp eq i32 %129, 0
br i1 %130, label %131, label %501
131: ; preds = %128
%132 = tail call i32 @bus_get_dma_tag(i32 noundef %0) #4
%133 = load i32, ptr @HN_XACT_REQ_SIZE, align 4, !tbaa !6
%134 = load i32, ptr @HN_XACT_RESP_SIZE, align 4, !tbaa !6
%135 = tail call ptr @vmbus_xact_ctx_create(i32 noundef %132, i32 noundef %133, i32 noundef %134, i32 noundef 0) #4
%136 = getelementptr inbounds i8, ptr %3, i64 136
store ptr %135, ptr %136, align 8, !tbaa !31
%137 = icmp eq ptr %135, null
br i1 %137, label %138, label %140
138: ; preds = %131
%139 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %501
140: ; preds = %131
%141 = load i32, ptr %9, align 4, !tbaa !15
%142 = tail call i32 @vmbus_chan_set_orphan(i32 noundef %141, ptr noundef nonnull %135) #4
%143 = load i32, ptr %9, align 4, !tbaa !15
%144 = tail call i64 @vmbus_chan_is_revoked(i32 noundef %143) #4
%145 = icmp eq i64 %144, 0
br i1 %145, label %148, label %146
146: ; preds = %140
%147 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %501
148: ; preds = %140
%149 = load i64, ptr @ETHERMTU, align 8, !tbaa !16
%150 = tail call i32 @hn_synth_attach(ptr noundef nonnull %3, i64 noundef %149) #4
%151 = icmp eq i32 %150, 0
br i1 %151, label %152, label %501
152: ; preds = %148
%153 = call i32 @hn_rndis_get_eaddr(ptr noundef nonnull %3, ptr noundef nonnull %6) #4
%154 = icmp eq i32 %153, 0
br i1 %154, label %155, label %501
155: ; preds = %152
%156 = call i32 @hn_rndis_get_mtu(ptr noundef nonnull %3, ptr noundef nonnull %2) #4
%157 = icmp eq i32 %156, 0
br i1 %157, label %160, label %158
158: ; preds = %155
%159 = load i64, ptr @ETHERMTU, align 8, !tbaa !16
store i64 %159, ptr %2, align 8, !tbaa !16
br label %166
160: ; preds = %155
%161 = load i64, ptr @bootverbose, align 8, !tbaa !16
%162 = icmp eq i64 %161, 0
br i1 %162, label %166, label %163
163: ; preds = %160
%164 = load i64, ptr %2, align 8, !tbaa !16
%165 = call i32 @device_printf(i32 noundef %0, ptr noundef nonnull @.str.7, i64 noundef %164) #4
br label %166
166: ; preds = %160, %163, %158
%167 = call i32 @hn_fixup_tx_data(ptr noundef nonnull %3) #4
%168 = call i32 @hn_fixup_rx_data(ptr noundef nonnull %3) #4
%169 = call ptr @device_get_sysctl_ctx(i32 noundef %0) #4
%170 = call i32 @device_get_sysctl_tree(i32 noundef %0) #4
%171 = call ptr @SYSCTL_CHILDREN(i32 noundef %170) #4
%172 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%173 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%174 = getelementptr inbounds i8, ptr %3, i64 8
%175 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %172, ptr noundef nonnull @.str.8, i32 noundef %173, ptr noundef nonnull %174, i32 noundef 0, ptr noundef nonnull @.str.9) #4
%176 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%177 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%178 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%179 = or i32 %178, %177
%180 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%181 = or i32 %179, %180
%182 = load i32, ptr @hn_ndis_version_sysctl, align 4, !tbaa !6
%183 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %176, ptr noundef nonnull @.str.10, i32 noundef %181, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %182, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.12) #4
%184 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%185 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%186 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%187 = or i32 %186, %185
%188 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%189 = or i32 %187, %188
%190 = load i32, ptr @hn_caps_sysctl, align 4, !tbaa !6
%191 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %184, ptr noundef nonnull @.str.13, i32 noundef %189, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %190, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.14) #4
%192 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%193 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%194 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%195 = or i32 %194, %193
%196 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%197 = or i32 %195, %196
%198 = load i32, ptr @hn_hwassist_sysctl, align 4, !tbaa !6
%199 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %192, ptr noundef nonnull @.str.15, i32 noundef %197, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %198, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.15) #4
%200 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%201 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%202 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %200, ptr noundef nonnull @.str.16, i32 noundef %201, ptr noundef nonnull %99, i32 noundef 0, ptr noundef nonnull @.str.17) #4
%203 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%204 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%205 = getelementptr inbounds i8, ptr %99, i64 8
%206 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %203, ptr noundef nonnull @.str.18, i32 noundef %204, ptr noundef nonnull %205, i32 noundef 0, ptr noundef nonnull @.str.19) #4
%207 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%208 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%209 = getelementptr inbounds i8, ptr %99, i64 16
%210 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %207, ptr noundef nonnull @.str.20, i32 noundef %208, ptr noundef nonnull %209, i32 noundef 0, ptr noundef nonnull @.str.21) #4
%211 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%212 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%213 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%214 = or i32 %213, %212
%215 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%216 = or i32 %214, %215
%217 = load i32, ptr @hn_rxfilter_sysctl, align 4, !tbaa !6
%218 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %211, ptr noundef nonnull @.str.22, i32 noundef %216, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %217, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.22) #4
%219 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%220 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%221 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%222 = or i32 %221, %220
%223 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%224 = or i32 %222, %223
%225 = load i32, ptr @hn_rss_hash_sysctl, align 4, !tbaa !6
%226 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %219, ptr noundef nonnull @.str.23, i32 noundef %224, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %225, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.24) #4
%227 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%228 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%229 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%230 = or i32 %229, %228
%231 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%232 = or i32 %230, %231
%233 = load i32, ptr @hn_rss_hcap_sysctl, align 4, !tbaa !6
%234 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %227, ptr noundef nonnull @.str.25, i32 noundef %232, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %233, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.26) #4
%235 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%236 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%237 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%238 = or i32 %237, %236
%239 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%240 = or i32 %238, %239
%241 = load i32, ptr @hn_rss_mbuf_sysctl, align 4, !tbaa !6
%242 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %235, ptr noundef nonnull @.str.27, i32 noundef %240, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %241, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.28) #4
%243 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%244 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%245 = getelementptr inbounds i8, ptr %3, i64 128
%246 = call i32 @SYSCTL_ADD_INT(ptr noundef %169, ptr noundef %171, i32 noundef %243, ptr noundef nonnull @.str.29, i32 noundef %244, ptr noundef nonnull %245, i32 noundef 0, ptr noundef nonnull @.str.30) #4
%247 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%248 = load i32, ptr @CTLTYPE_OPAQUE, align 4, !tbaa !6
%249 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%250 = or i32 %249, %248
%251 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%252 = or i32 %250, %251
%253 = load i32, ptr @hn_rss_key_sysctl, align 4, !tbaa !6
%254 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %247, ptr noundef nonnull @.str.31, i32 noundef %252, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %253, ptr noundef nonnull @.str.32, ptr noundef nonnull @.str.33) #4
%255 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%256 = load i32, ptr @CTLTYPE_OPAQUE, align 4, !tbaa !6
%257 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%258 = or i32 %257, %256
%259 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%260 = or i32 %258, %259
%261 = load i32, ptr @hn_rss_ind_sysctl, align 4, !tbaa !6
%262 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %255, ptr noundef nonnull @.str.34, i32 noundef %260, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %261, ptr noundef nonnull @.str.32, ptr noundef nonnull @.str.35) #4
%263 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%264 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%265 = getelementptr inbounds i8, ptr %3, i64 16
%266 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %263, ptr noundef nonnull @.str.36, i32 noundef %264, ptr noundef nonnull %265, i32 noundef 0, ptr noundef nonnull @.str.37) #4
%267 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%268 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%269 = getelementptr inbounds i8, ptr %3, i64 24
%270 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %267, ptr noundef nonnull @.str.38, i32 noundef %268, ptr noundef nonnull %269, i32 noundef 0, ptr noundef nonnull @.str.39) #4
%271 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%272 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%273 = getelementptr inbounds i8, ptr %3, i64 32
%274 = call i32 @SYSCTL_ADD_UINT(ptr noundef %169, ptr noundef %171, i32 noundef %271, ptr noundef nonnull @.str.40, i32 noundef %272, ptr noundef nonnull %273, i32 noundef 0, ptr noundef nonnull @.str.41) #4
%275 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%276 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%277 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%278 = or i32 %277, %276
%279 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%280 = or i32 %278, %279
%281 = load i32, ptr @hn_txagg_size_sysctl, align 4, !tbaa !6
%282 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %275, ptr noundef nonnull @.str.42, i32 noundef %280, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %281, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.44) #4
%283 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%284 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%285 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%286 = or i32 %285, %284
%287 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%288 = or i32 %286, %287
%289 = load i32, ptr @hn_txagg_pkts_sysctl, align 4, !tbaa !6
%290 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %283, ptr noundef nonnull @.str.45, i32 noundef %288, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %289, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.46) #4
%291 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%292 = load i32, ptr @CTLTYPE_UINT, align 4, !tbaa !6
%293 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%294 = or i32 %293, %292
%295 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%296 = or i32 %294, %295
%297 = load i32, ptr @hn_polling_sysctl, align 4, !tbaa !6
%298 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %291, ptr noundef nonnull @.str.47, i32 noundef %296, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %297, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.48) #4
%299 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%300 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%301 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%302 = or i32 %301, %300
%303 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%304 = or i32 %302, %303
%305 = load i32, ptr @hn_vf_sysctl, align 4, !tbaa !6
%306 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %299, ptr noundef nonnull @.str.49, i32 noundef %304, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %305, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.50) #4
%307 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !16
%308 = icmp eq i64 %307, 0
%309 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%310 = load i32, ptr @CTLFLAG_RD, align 4, !tbaa !6
%311 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
br i1 %308, label %312, label %318
312: ; preds = %166
%313 = load i32, ptr @CTLTYPE_STRING, align 4, !tbaa !6
%314 = or i32 %310, %313
%315 = or i32 %314, %311
%316 = load i32, ptr @hn_rxvf_sysctl, align 4, !tbaa !6
%317 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %309, ptr noundef nonnull @.str.51, i32 noundef %315, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %316, ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.52) #4
br label %332
318: ; preds = %166
%319 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%320 = or i32 %310, %319
%321 = or i32 %320, %311
%322 = load i32, ptr @hn_xpnt_vf_enabled_sysctl, align 4, !tbaa !6
%323 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %309, ptr noundef nonnull @.str.53, i32 noundef %321, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %322, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.54) #4
%324 = load i32, ptr @OID_AUTO, align 4, !tbaa !6
%325 = load i32, ptr @CTLTYPE_INT, align 4, !tbaa !6
%326 = load i32, ptr @CTLFLAG_RW, align 4, !tbaa !6
%327 = or i32 %326, %325
%328 = load i32, ptr @CTLFLAG_MPSAFE, align 4, !tbaa !6
%329 = or i32 %327, %328
%330 = load i32, ptr @hn_xpnt_vf_accbpf_sysctl, align 4, !tbaa !6
%331 = call i32 @SYSCTL_ADD_PROC(ptr noundef %169, ptr noundef %171, i32 noundef %324, ptr noundef nonnull @.str.55, i32 noundef %329, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %330, ptr noundef nonnull @.str.43, ptr noundef nonnull @.str.56) #4
br label %332
332: ; preds = %318, %312
%333 = load i32, ptr @IFM_ETHER, align 4, !tbaa !6
%334 = load i32, ptr @IFM_AUTO, align 4, !tbaa !6
%335 = or i32 %334, %333
%336 = call i32 @ifmedia_add(ptr noundef nonnull %105, i32 noundef %335, i32 noundef 0, ptr noundef null) #4
%337 = load i32, ptr @IFM_ETHER, align 4, !tbaa !6
%338 = load i32, ptr @IFM_AUTO, align 4, !tbaa !6
%339 = or i32 %338, %337
%340 = call i32 @ifmedia_set(ptr noundef nonnull %105, i32 noundef %339) #4
%341 = load ptr, ptr %105, align 8, !tbaa !32
%342 = load i32, ptr %341, align 4, !tbaa !33
%343 = getelementptr inbounds i8, ptr %3, i64 120
store i32 %342, ptr %343, align 8, !tbaa !35
%344 = call i32 @IF_Gbps(i32 noundef 10) #4
%345 = getelementptr inbounds i8, ptr %99, i64 76
store i32 %344, ptr %345, align 4, !tbaa !36
%346 = load i32, ptr @IFF_BROADCAST, align 4, !tbaa !6
%347 = load i32, ptr @IFF_SIMPLEX, align 4, !tbaa !6
%348 = or i32 %347, %346
%349 = load i32, ptr @IFF_MULTICAST, align 4, !tbaa !6
%350 = or i32 %348, %349
%351 = getelementptr inbounds i8, ptr %99, i64 24
store i32 %350, ptr %351, align 8, !tbaa !37
%352 = load i32, ptr @hn_ioctl, align 4, !tbaa !6
%353 = getelementptr inbounds i8, ptr %99, i64 72
store i32 %352, ptr %353, align 8, !tbaa !38
%354 = load i32, ptr @hn_init, align 4, !tbaa !6
%355 = getelementptr inbounds i8, ptr %99, i64 68
store i32 %354, ptr %355, align 4, !tbaa !39
%356 = load i32, ptr @hn_transmit, align 4, !tbaa !6
%357 = getelementptr inbounds i8, ptr %99, i64 56
store i32 %356, ptr %357, align 8, !tbaa !40
%358 = load i32, ptr @hn_xmit_qflush, align 4, !tbaa !6
%359 = getelementptr inbounds i8, ptr %99, i64 52
store i32 %358, ptr %359, align 4, !tbaa !41
%360 = load i32, ptr @IFCAP_RXCSUM, align 4, !tbaa !6
%361 = load i32, ptr @IFCAP_LRO, align 4, !tbaa !6
%362 = or i32 %361, %360
%363 = load i32, ptr @IFCAP_LINKSTATE, align 4, !tbaa !6
%364 = or i32 %362, %363
%365 = getelementptr inbounds i8, ptr %99, i64 28
%366 = load i32, ptr %365, align 4, !tbaa !42
%367 = or i32 %364, %366
store i32 %367, ptr %365, align 4, !tbaa !42
%368 = getelementptr inbounds i8, ptr %3, i64 40
%369 = load i32, ptr %368, align 8, !tbaa !43
%370 = load i32, ptr @HN_CAP_VLAN, align 4, !tbaa !6
%371 = and i32 %370, %369
%372 = icmp eq i32 %371, 0
br i1 %372, label %378, label %373
373: ; preds = %332
%374 = load i32, ptr @IFCAP_VLAN_HWTAGGING, align 4, !tbaa !6
%375 = load i32, ptr @IFCAP_VLAN_MTU, align 4, !tbaa !6
%376 = or i32 %374, %375
%377 = or i32 %376, %367
store i32 %377, ptr %365, align 4, !tbaa !42
br label %378
378: ; preds = %373, %332
%379 = phi i32 [ %377, %373 ], [ %367, %332 ]
%380 = getelementptr inbounds i8, ptr %3, i64 104
%381 = load ptr, ptr %380, align 8, !tbaa !44
%382 = load i32, ptr %381, align 4, !tbaa !45
%383 = getelementptr inbounds i8, ptr %99, i64 32
%384 = load i32, ptr @HN_CSUM_IP_MASK, align 4, !tbaa !6
%385 = and i32 %384, %382
%386 = icmp eq i32 %385, 0
br i1 %386, label %390, label %387
387: ; preds = %378
%388 = load i32, ptr @IFCAP_TXCSUM, align 4, !tbaa !6
%389 = or i32 %379, %388
store i32 %389, ptr %365, align 4, !tbaa !42
br label %390
390: ; preds = %387, %378
%391 = phi i32 [ %389, %387 ], [ %379, %378 ]
%392 = load i32, ptr @HN_CSUM_IP6_MASK, align 4, !tbaa !6
%393 = and i32 %392, %382
%394 = icmp eq i32 %393, 0
br i1 %394, label %398, label %395
395: ; preds = %390
%396 = load i32, ptr @IFCAP_TXCSUM_IPV6, align 4, !tbaa !6
%397 = or i32 %391, %396
store i32 %397, ptr %365, align 4, !tbaa !42
br label %398
398: ; preds = %395, %390
%399 = phi i32 [ %397, %395 ], [ %391, %390 ]
%400 = load i32, ptr @HN_CAP_TSO4, align 4, !tbaa !6
%401 = and i32 %400, %369
%402 = icmp eq i32 %401, 0
br i1 %402, label %408, label %403
403: ; preds = %398
%404 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !6
%405 = or i32 %399, %404
store i32 %405, ptr %365, align 4, !tbaa !42
%406 = load i32, ptr @CSUM_IP_TSO, align 4, !tbaa !6
%407 = or i32 %406, %382
br label %408
408: ; preds = %403, %398
%409 = phi i32 [ %407, %403 ], [ %382, %398 ]
%410 = phi i32 [ %405, %403 ], [ %399, %398 ]
%411 = load i32, ptr @HN_CAP_TSO6, align 4, !tbaa !6
%412 = and i32 %411, %369
%413 = icmp eq i32 %412, 0
%414 = load i32, ptr @IFCAP_TSO6, align 4, !tbaa !6
%415 = load i32, ptr @CSUM_IP6_TSO, align 4, !tbaa !6
br i1 %413, label %419, label %416
416: ; preds = %408
%417 = or i32 %410, %414
store i32 %417, ptr %365, align 4, !tbaa !42
%418 = or i32 %409, %415
br label %419
419: ; preds = %416, %408
%420 = phi i32 [ %418, %416 ], [ %409, %408 ]
%421 = phi i32 [ %417, %416 ], [ %410, %408 ]
%422 = getelementptr inbounds i8, ptr %99, i64 36
%423 = load i32, ptr @IFCAP_TXCSUM_IPV6, align 4, !tbaa !6
%424 = or i32 %414, %423
%425 = xor i32 %424, -1
%426 = and i32 %421, %425
store i32 %426, ptr %422, align 4, !tbaa !47
%427 = or i32 %415, %392
%428 = xor i32 %427, -1
%429 = and i32 %420, %428
store i32 %429, ptr %383, align 8, !tbaa !48
%430 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !6
%431 = or i32 %430, %414
%432 = and i32 %431, %421
%433 = icmp eq i32 %432, 0
br i1 %433, label %442, label %434
434: ; preds = %419
%435 = call i32 @HN_LOCK(ptr noundef nonnull %3) #4
%436 = load i32, ptr @hn_tso_maxlen, align 4, !tbaa !6
%437 = load i64, ptr @ETHERMTU, align 8, !tbaa !16
%438 = call i32 @hn_set_tso_maxsize(ptr noundef nonnull %3, i32 noundef %436, i64 noundef %437) #4
%439 = call i32 @HN_UNLOCK(ptr noundef nonnull %3) #4
%440 = load i64, ptr @HN_TX_DATA_SEGCNT_MAX, align 8, !tbaa !16
store i64 %440, ptr %205, align 8, !tbaa !49
%441 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !16
store i64 %441, ptr %209, align 8, !tbaa !50
br label %442
442: ; preds = %434, %419
%443 = call i32 @ether_ifattach(ptr noundef nonnull %99, ptr noundef nonnull %6) #4
%444 = load i32, ptr %365, align 4, !tbaa !42
%445 = load i32, ptr @IFCAP_TSO6, align 4, !tbaa !6
%446 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !6
%447 = or i32 %446, %445
%448 = and i32 %447, %444
%449 = icmp ne i32 %448, 0
%450 = load i64, ptr @bootverbose, align 8
%451 = icmp ne i64 %450, 0
%452 = select i1 %449, i1 %451, i1 false
br i1 %452, label %453, label %457
453: ; preds = %442
%454 = load i64, ptr %205, align 8, !tbaa !49
%455 = load i64, ptr %209, align 8, !tbaa !50
%456 = call i32 @if_printf(ptr noundef nonnull %99, ptr noundef nonnull @.str.57, i64 noundef %454, i64 noundef %455) #4
br label %457
457: ; preds = %453, %442
%458 = load i64, ptr %2, align 8, !tbaa !16
%459 = load i64, ptr @ETHERMTU, align 8, !tbaa !16
%460 = icmp slt i64 %458, %459
br i1 %460, label %461, label %466
461: ; preds = %457
%462 = getelementptr inbounds i8, ptr %99, i64 40
%463 = load i64, ptr %462, align 8, !tbaa !51
%464 = call i32 @if_printf(ptr noundef nonnull %99, ptr noundef nonnull @.str.58, i64 noundef %463, i64 noundef %458) #4
%465 = load i64, ptr %2, align 8, !tbaa !16
store i64 %465, ptr %462, align 8, !tbaa !51
br label %466
466: ; preds = %461, %457
%467 = getelementptr inbounds i8, ptr %99, i64 48
store i32 4, ptr %467, align 8, !tbaa !52
%468 = load ptr, ptr %68, align 8, !tbaa !24
%469 = getelementptr inbounds i8, ptr %3, i64 96
store ptr %468, ptr %469, align 8, !tbaa !53
%470 = call i32 @hn_update_link_status(ptr noundef nonnull %3) #4
%471 = load i64, ptr @hn_xpnt_vf, align 8, !tbaa !16
%472 = icmp eq i64 %471, 0
%473 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !6
br i1 %472, label %474, label %483
474: ; preds = %466
%475 = load i32, ptr @ifnet_event, align 4, !tbaa !6
%476 = load i32, ptr @hn_ifnet_event, align 4, !tbaa !6
%477 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %475, i32 noundef %476, ptr noundef nonnull %3, i32 noundef %473) #4
%478 = getelementptr inbounds i8, ptr %3, i64 80
store ptr %477, ptr %478, align 8, !tbaa !54
%479 = load i32, ptr @ifaddr_event, align 4, !tbaa !6
%480 = load i32, ptr @hn_ifaddr_event, align 4, !tbaa !6
%481 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !6
%482 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %479, i32 noundef %480, ptr noundef nonnull %3, i32 noundef %481) #4
br label %487
483: ; preds = %466
%484 = load i32, ptr @ifnet_link_event, align 4, !tbaa !6
%485 = load i32, ptr @hn_ifnet_lnkevent, align 4, !tbaa !6
%486 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %484, i32 noundef %485, ptr noundef nonnull %3, i32 noundef %473) #4
br label %487
487: ; preds = %483, %474
%488 = phi i64 [ 64, %483 ], [ 72, %474 ]
%489 = phi ptr [ %486, %483 ], [ %482, %474 ]
%490 = getelementptr inbounds i8, ptr %3, i64 %488
store ptr %489, ptr %490, align 8, !tbaa !21
%491 = load i32, ptr @ether_ifattach_event, align 4, !tbaa !6
%492 = load i32, ptr @hn_ifnet_attevent, align 4, !tbaa !6
%493 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !6
%494 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %491, i32 noundef %492, ptr noundef nonnull %3, i32 noundef %493) #4
%495 = getelementptr inbounds i8, ptr %3, i64 56
store ptr %494, ptr %495, align 8, !tbaa !55
%496 = load i32, ptr @ifnet_departure_event, align 4, !tbaa !6
%497 = load i32, ptr @hn_ifnet_detevent, align 4, !tbaa !6
%498 = load i32, ptr @EVENTHANDLER_PRI_ANY, align 4, !tbaa !6
%499 = call ptr @EVENTHANDLER_REGISTER(i32 noundef %496, i32 noundef %497, ptr noundef nonnull %3, i32 noundef %498) #4
%500 = getelementptr inbounds i8, ptr %3, i64 48
store ptr %499, ptr %500, align 8, !tbaa !56
br label %512
501: ; preds = %152, %148, %128, %117, %146, %138
%502 = phi i32 [ %126, %117 ], [ %129, %128 ], [ %139, %138 ], [ %147, %146 ], [ %150, %148 ], [ %153, %152 ]
%503 = getelementptr inbounds i8, ptr %3, i64 44
%504 = load i32, ptr %503, align 4, !tbaa !57
%505 = load i32, ptr @HN_FLAG_SYNTH_ATTACHED, align 4, !tbaa !6
%506 = and i32 %505, %504
%507 = icmp eq i32 %506, 0
br i1 %507, label %510, label %508
508: ; preds = %501
%509 = call i32 @hn_synth_detach(ptr noundef nonnull %3) #4
br label %510
510: ; preds = %508, %501
%511 = call i32 @hn_detach(i32 noundef %0) #4
br label %512
512: ; preds = %510, %487
%513 = phi i32 [ %502, %510 ], [ 0, %487 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret i32 %513
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #2
declare i32 @vmbus_get_channel(i32 noundef) local_unnamed_addr #2
declare i32 @HN_LOCK_INIT(ptr noundef) local_unnamed_addr #2
declare i32 @rm_init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @taskqueue_create(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @taskqueue_start_threads(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @device_get_nameunit(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @TASK_INIT(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @TIMEOUT_TASK_INIT(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @if_alloc(i32 noundef) local_unnamed_addr #2
declare i32 @if_initname(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @device_get_name(i32 noundef) local_unnamed_addr #2
declare i32 @device_get_unit(i32 noundef) local_unnamed_addr #2
declare i32 @ifmedia_init(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @atomic_fetchadd_int(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hn_create_tx_data(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hn_create_rx_data(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @vmbus_xact_ctx_create(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bus_get_dma_tag(i32 noundef) local_unnamed_addr #2
declare i32 @vmbus_chan_set_orphan(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @vmbus_chan_is_revoked(i32 noundef) local_unnamed_addr #2
declare i32 @hn_synth_attach(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @hn_rndis_get_eaddr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hn_rndis_get_mtu(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @device_printf(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @hn_fixup_tx_data(ptr noundef) local_unnamed_addr #2
declare i32 @hn_fixup_rx_data(ptr noundef) local_unnamed_addr #2
declare ptr @device_get_sysctl_ctx(i32 noundef) local_unnamed_addr #2
declare ptr @SYSCTL_CHILDREN(i32 noundef) local_unnamed_addr #2
declare i32 @device_get_sysctl_tree(i32 noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_UINT(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_PROC(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @SYSCTL_ADD_INT(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ifmedia_add(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ifmedia_set(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @IF_Gbps(i32 noundef) local_unnamed_addr #2
declare i32 @HN_LOCK(ptr noundef) local_unnamed_addr #2
declare i32 @hn_set_tso_maxsize(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @HN_UNLOCK(ptr noundef) local_unnamed_addr #2
declare i32 @ether_ifattach(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @if_printf(ptr noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @hn_update_link_status(ptr noundef) local_unnamed_addr #2
declare ptr @EVENTHANDLER_REGISTER(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @hn_synth_detach(ptr noundef) local_unnamed_addr #2
declare i32 @hn_detach(i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 208}
!11 = !{!"hn_softc", !7, i64 0, !7, i64 4, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !7, i64 40, !7, i64 44, !13, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !14, i64 112, !7, i64 128, !7, i64 132, !13, i64 136, !13, i64 144, !7, i64 152, !13, i64 160, !7, i64 168, !7, i64 172, !7, i64 176, !13, i64 184, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"TYPE_9__", !13, i64 0, !7, i64 8}
!15 = !{!11, !7, i64 132}
!16 = !{!12, !12, i64 0}
!17 = !{!11, !7, i64 200}
!18 = !{!11, !7, i64 196}
!19 = !{!11, !7, i64 192}
!20 = !{!11, !13, i64 184}
!21 = !{!13, !13, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!11, !13, i64 88}
!25 = !{!11, !13, i64 160}
!26 = !{!11, !13, i64 144}
!27 = !{!28, !13, i64 80}
!28 = !{!"ifnet", !12, i64 0, !12, i64 8, !12, i64 16, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !12, i64 40, !7, i64 48, !7, i64 52, !7, i64 56, !29, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !13, i64 80}
!29 = !{!"TYPE_11__", !7, i64 0}
!30 = !{!11, !7, i64 0}
!31 = !{!11, !13, i64 136}
!32 = !{!11, !13, i64 112}
!33 = !{!34, !7, i64 0}
!34 = !{!"TYPE_8__", !7, i64 0}
!35 = !{!11, !7, i64 120}
!36 = !{!28, !7, i64 76}
!37 = !{!28, !7, i64 24}
!38 = !{!28, !7, i64 72}
!39 = !{!28, !7, i64 68}
!40 = !{!28, !7, i64 56}
!41 = !{!28, !7, i64 52}
!42 = !{!28, !7, i64 28}
!43 = !{!11, !7, i64 40}
!44 = !{!11, !13, i64 104}
!45 = !{!46, !7, i64 0}
!46 = !{!"TYPE_10__", !7, i64 0}
!47 = !{!28, !7, i64 36}
!48 = !{!28, !7, i64 32}
!49 = !{!28, !12, i64 8}
!50 = !{!28, !12, i64 16}
!51 = !{!28, !12, i64 40}
!52 = !{!28, !7, i64 48}
!53 = !{!11, !13, i64 96}
!54 = !{!11, !13, i64 80}
!55 = !{!11, !13, i64 56}
!56 = !{!11, !13, i64 48}
!57 = !{!11, !7, i64 44}
| freebsd_sys_dev_hyperv_netvsc_extr_if_hn.c_hn_attach |
; ModuleID = 'AnghaBench/reactos/win32ss/user/user32/controls/extr_listbox.c_LISTBOX_UpdatePage.c'
source_filename = "AnghaBench/reactos/win32ss/user/user32/controls/extr_listbox.c_LISTBOX_UpdatePage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, i32, i32, i32, i32 }
@LBS_MULTICOLUMN = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @LISTBOX_UpdatePage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @LISTBOX_UpdatePage(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = sdiv i32 %6, %2
%8 = icmp slt i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %4, %1
br label %10
10: ; preds = %9, %4
%11 = phi i32 [ 1, %9 ], [ %7, %4 ]
%12 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
%13 = load i32, ptr %12, align 4, !tbaa !11
%14 = icmp eq i32 %11, %13
br i1 %14, label %31, label %15
15: ; preds = %10
store i32 %11, ptr %12, align 4, !tbaa !11
%16 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 3
%17 = load i32, ptr %16, align 4, !tbaa !12
%18 = load i32, ptr @LBS_MULTICOLUMN, align 4, !tbaa !13
%19 = and i32 %18, %17
%20 = icmp eq i32 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %15
%22 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 5
%23 = load i32, ptr %22, align 4, !tbaa !14
%24 = load i32, ptr @TRUE, align 4, !tbaa !13
%25 = tail call i32 @InvalidateRect(i32 noundef %23, ptr noundef null, i32 noundef %24) #2
br label %26
26: ; preds = %21, %15
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 4
%28 = load i32, ptr %27, align 4, !tbaa !15
%29 = load i32, ptr @FALSE, align 4, !tbaa !13
%30 = tail call i32 @LISTBOX_SetTopItem(ptr noundef nonnull %0, i32 noundef %28, i32 noundef %29) #2
br label %31
31: ; preds = %10, %26
ret void
}
declare i32 @InvalidateRect(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LISTBOX_SetTopItem(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 12}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 20}
!15 = !{!6, !7, i64 16}
| ; ModuleID = 'AnghaBench/reactos/win32ss/user/user32/controls/extr_listbox.c_LISTBOX_UpdatePage.c'
source_filename = "AnghaBench/reactos/win32ss/user/user32/controls/extr_listbox.c_LISTBOX_UpdatePage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LBS_MULTICOLUMN = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@FALSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @LISTBOX_UpdatePage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @LISTBOX_UpdatePage(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = sdiv i32 %6, %2
%8 = icmp slt i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %4, %1
br label %10
10: ; preds = %9, %4
%11 = phi i32 [ 1, %9 ], [ %7, %4 ]
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i32, ptr %12, align 4, !tbaa !12
%14 = icmp eq i32 %11, %13
br i1 %14, label %31, label %15
15: ; preds = %10
store i32 %11, ptr %12, align 4, !tbaa !12
%16 = getelementptr inbounds i8, ptr %0, i64 12
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = load i32, ptr @LBS_MULTICOLUMN, align 4, !tbaa !14
%19 = and i32 %18, %17
%20 = icmp eq i32 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %15
%22 = getelementptr inbounds i8, ptr %0, i64 20
%23 = load i32, ptr %22, align 4, !tbaa !15
%24 = load i32, ptr @TRUE, align 4, !tbaa !14
%25 = tail call i32 @InvalidateRect(i32 noundef %23, ptr noundef null, i32 noundef %24) #2
br label %26
26: ; preds = %21, %15
%27 = getelementptr inbounds i8, ptr %0, i64 16
%28 = load i32, ptr %27, align 4, !tbaa !16
%29 = load i32, ptr @FALSE, align 4, !tbaa !14
%30 = tail call i32 @LISTBOX_SetTopItem(ptr noundef nonnull %0, i32 noundef %28, i32 noundef %29) #2
br label %31
31: ; preds = %10, %26
ret void
}
declare i32 @InvalidateRect(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LISTBOX_SetTopItem(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 12}
!14 = !{!8, !8, i64 0}
!15 = !{!7, !8, i64 20}
!16 = !{!7, !8, i64 16}
| reactos_win32ss_user_user32_controls_extr_listbox.c_LISTBOX_UpdatePage |
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/android/jni/extr_sndaudiotrack.c_SNDAudioTrackSetVolume.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/android/jni/extr_sndaudiotrack.c_SNDAudioTrackSetVolume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@soundvolume = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @SNDAudioTrackSetVolume], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable
define internal void @SNDAudioTrackSetVolume(i32 noundef %0) #0 {
store i32 %0, ptr @soundvolume, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/android/jni/extr_sndaudiotrack.c_SNDAudioTrackSetVolume.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/android/jni/extr_sndaudiotrack.c_SNDAudioTrackSetVolume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@soundvolume = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @SNDAudioTrackSetVolume], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal void @SNDAudioTrackSetVolume(i32 noundef %0) #0 {
store i32 %0, ptr @soundvolume, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_Yabause_yabause_src_android_jni_extr_sndaudiotrack.c_SNDAudioTrackSetVolume |
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_findCollSeqEntry.c'
source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_findCollSeqEntry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_14__ = type { ptr, i32 }
@SQLITE_UTF8 = dso_local local_unnamed_addr global i32 0, align 4
@SQLITE_UTF16LE = dso_local local_unnamed_addr global i32 0, align 4
@SQLITE_UTF16BE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @findCollSeqEntry], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @findCollSeqEntry(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @sqlite3HashFind(ptr noundef %0, ptr noundef %1) #2
%5 = icmp eq ptr %4, null
%6 = icmp ne i32 %2, 0
%7 = and i1 %6, %5
br i1 %7, label %8, label %35
8: ; preds = %3
%9 = tail call i32 @sqlite3Strlen30(ptr noundef %1) #2
%10 = add i32 %9, 49
%11 = tail call ptr @sqlite3DbMallocZero(ptr noundef %0, i32 noundef %10) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %35, label %13
13: ; preds = %8
%14 = add nsw i32 %9, 1
%15 = getelementptr inbounds %struct.TYPE_14__, ptr %11, i64 3
store ptr %15, ptr %11, align 8, !tbaa !5
%16 = load i32, ptr @SQLITE_UTF8, align 4, !tbaa !11
%17 = getelementptr inbounds %struct.TYPE_14__, ptr %11, i64 0, i32 1
store i32 %16, ptr %17, align 8, !tbaa !12
%18 = getelementptr inbounds %struct.TYPE_14__, ptr %11, i64 1
store ptr %15, ptr %18, align 8, !tbaa !5
%19 = load i32, ptr @SQLITE_UTF16LE, align 4, !tbaa !11
%20 = getelementptr inbounds %struct.TYPE_14__, ptr %11, i64 1, i32 1
store i32 %19, ptr %20, align 8, !tbaa !12
%21 = getelementptr inbounds %struct.TYPE_14__, ptr %11, i64 2
store ptr %15, ptr %21, align 8, !tbaa !5
%22 = load i32, ptr @SQLITE_UTF16BE, align 4, !tbaa !11
%23 = getelementptr inbounds %struct.TYPE_14__, ptr %11, i64 2, i32 1
store i32 %22, ptr %23, align 8, !tbaa !12
%24 = tail call i32 @memcpy(ptr noundef nonnull %15, ptr noundef %1, i32 noundef %14) #2
%25 = load ptr, ptr %11, align 8, !tbaa !5
%26 = tail call ptr @sqlite3HashInsert(ptr noundef %0, ptr noundef %25, ptr noundef nonnull %11) #2
%27 = icmp eq ptr %26, null
%28 = icmp eq ptr %26, %11
%29 = or i1 %27, %28
%30 = zext i1 %29 to i32
%31 = tail call i32 @assert(i32 noundef %30) #2
br i1 %27, label %35, label %32
32: ; preds = %13
%33 = tail call i32 @sqlite3OomFault(ptr noundef %0) #2
%34 = tail call i32 @sqlite3DbFree(ptr noundef %0, ptr noundef nonnull %26) #2
br label %35
35: ; preds = %8, %32, %13, %3
%36 = phi ptr [ %4, %3 ], [ null, %8 ], [ null, %32 ], [ %11, %13 ]
ret ptr %36
}
declare ptr @sqlite3HashFind(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3Strlen30(ptr noundef) local_unnamed_addr #1
declare ptr @sqlite3DbMallocZero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @sqlite3HashInsert(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3OomFault(ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3DbFree(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_14__", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_findCollSeqEntry.c'
source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_findCollSeqEntry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SQLITE_UTF8 = common local_unnamed_addr global i32 0, align 4
@SQLITE_UTF16LE = common local_unnamed_addr global i32 0, align 4
@SQLITE_UTF16BE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @findCollSeqEntry], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @findCollSeqEntry(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @sqlite3HashFind(ptr noundef %0, ptr noundef %1) #2
%5 = icmp eq ptr %4, null
%6 = icmp ne i32 %2, 0
%7 = and i1 %6, %5
br i1 %7, label %8, label %35
8: ; preds = %3
%9 = tail call i32 @sqlite3Strlen30(ptr noundef %1) #2
%10 = add i32 %9, 49
%11 = tail call ptr @sqlite3DbMallocZero(ptr noundef %0, i32 noundef %10) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %35, label %13
13: ; preds = %8
%14 = add nsw i32 %9, 1
%15 = getelementptr inbounds i8, ptr %11, i64 48
store ptr %15, ptr %11, align 8, !tbaa !6
%16 = load i32, ptr @SQLITE_UTF8, align 4, !tbaa !12
%17 = getelementptr inbounds i8, ptr %11, i64 8
store i32 %16, ptr %17, align 8, !tbaa !13
%18 = getelementptr inbounds i8, ptr %11, i64 16
store ptr %15, ptr %18, align 8, !tbaa !6
%19 = load i32, ptr @SQLITE_UTF16LE, align 4, !tbaa !12
%20 = getelementptr inbounds i8, ptr %11, i64 24
store i32 %19, ptr %20, align 8, !tbaa !13
%21 = getelementptr inbounds i8, ptr %11, i64 32
store ptr %15, ptr %21, align 8, !tbaa !6
%22 = load i32, ptr @SQLITE_UTF16BE, align 4, !tbaa !12
%23 = getelementptr inbounds i8, ptr %11, i64 40
store i32 %22, ptr %23, align 8, !tbaa !13
%24 = tail call i32 @memcpy(ptr noundef nonnull %15, ptr noundef %1, i32 noundef %14) #2
%25 = load ptr, ptr %11, align 8, !tbaa !6
%26 = tail call ptr @sqlite3HashInsert(ptr noundef %0, ptr noundef %25, ptr noundef nonnull %11) #2
%27 = icmp eq ptr %26, null
%28 = icmp eq ptr %26, %11
%29 = or i1 %27, %28
%30 = zext i1 %29 to i32
%31 = tail call i32 @assert(i32 noundef %30) #2
br i1 %27, label %35, label %32
32: ; preds = %13
%33 = tail call i32 @sqlite3OomFault(ptr noundef %0) #2
%34 = tail call i32 @sqlite3DbFree(ptr noundef %0, ptr noundef nonnull %26) #2
br label %35
35: ; preds = %8, %32, %13, %3
%36 = phi ptr [ %4, %3 ], [ null, %8 ], [ null, %32 ], [ %11, %13 ]
ret ptr %36
}
declare ptr @sqlite3HashFind(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3Strlen30(ptr noundef) local_unnamed_addr #1
declare ptr @sqlite3DbMallocZero(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @sqlite3HashInsert(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3OomFault(ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3DbFree(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_14__", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 8}
| ccv_lib_3rdparty_sqlite3_extr_sqlite3.c_findCollSeqEntry |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/gma500/extr_cdv_intel_dp.c_cdv_intel_dp_aux_ch.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/gma500/extr_cdv_intel_dp.c_cdv_intel_dp_aux_ch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.gma_encoder = type { %struct.TYPE_2__, ptr }
%struct.TYPE_2__ = type { ptr }
@DP_AUX_CH_CTL_SEND_BUSY = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"dp_aux_ch not started status 0x%08x\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_TIME_OUT_400us = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_DONE = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_TIME_OUT_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_RECEIVE_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [34 x i8] c"dp_aux_ch not done status 0x%08x\0A\00", align 1
@.str.2 = private unnamed_addr constant [39 x i8] c"dp_aux_ch receive error status 0x%08x\0A\00", align 1
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [33 x i8] c"dp_aux_ch timeout status 0x%08x\0A\00", align 1
@ETIMEDOUT = dso_local local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_MESSAGE_SIZE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cdv_intel_dp_aux_ch], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cdv_intel_dp_aux_ch(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds %struct.gma_encoder, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = add nsw i32 %8, 16
%10 = tail call i64 @is_edp(ptr noundef %0) #3
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, i32 4, i32 10
%13 = tail call i32 @REG_READ(i32 noundef %9) #3
%14 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !14
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %5
%18 = add nsw i32 %8, 20
%19 = icmp sgt i32 %2, 0
br label %28
20: ; preds = %5
%21 = tail call i32 @REG_READ(i32 noundef %9) #3
%22 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str, i32 noundef %21) #3
%23 = load i32, ptr @EBUSY, align 4, !tbaa !14
%24 = sub nsw i32 0, %23
br label %123
25: ; preds = %72
%26 = add nuw nsw i32 %29, 1
%27 = icmp eq i32 %26, 5
br i1 %27, label %84, label %28, !llvm.loop !15
28: ; preds = %17, %25
%29 = phi i32 [ 0, %17 ], [ %26, %25 ]
br i1 %19, label %30, label %42
30: ; preds = %28, %30
%31 = phi i64 [ %39, %30 ], [ 0, %28 ]
%32 = getelementptr inbounds i32, ptr %1, i64 %31
%33 = trunc i64 %31 to i32
%34 = sub i32 %2, %33
%35 = tail call i32 @pack_aux(ptr noundef %32, i32 noundef %34) #3
%36 = trunc i64 %31 to i32
%37 = add i32 %18, %36
%38 = tail call i32 @REG_WRITE(i32 noundef %37, i32 noundef %35) #3
%39 = add nuw i64 %31, 4
%40 = trunc i64 %39 to i32
%41 = icmp slt i32 %40, %2
br i1 %41, label %30, label %42, !llvm.loop !17
42: ; preds = %30, %28
%43 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !14
%44 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_400us, align 4, !tbaa !14
%45 = or i32 %44, %43
%46 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT, align 4, !tbaa !14
%47 = shl i32 %2, %46
%48 = or i32 %45, %47
%49 = load i32, ptr @DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT, align 4, !tbaa !14
%50 = shl i32 %12, %49
%51 = or i32 %48, %50
%52 = load i32, ptr @DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT, align 4, !tbaa !14
%53 = shl i32 100, %52
%54 = or i32 %51, %53
%55 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !14
%56 = or i32 %54, %55
%57 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !14
%58 = or i32 %56, %57
%59 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !14
%60 = or i32 %58, %59
%61 = tail call i32 @REG_WRITE(i32 noundef %9, i32 noundef %60) #3
%62 = tail call i32 @REG_READ(i32 noundef %9) #3
%63 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !14
%64 = and i32 %63, %62
%65 = icmp eq i32 %64, 0
br i1 %65, label %72, label %66
66: ; preds = %42, %66
%67 = tail call i32 @udelay(i32 noundef 100) #3
%68 = tail call i32 @REG_READ(i32 noundef %9) #3
%69 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !14
%70 = and i32 %69, %68
%71 = icmp eq i32 %70, 0
br i1 %71, label %72, label %66
72: ; preds = %66, %42
%73 = phi i32 [ %62, %42 ], [ %68, %66 ]
%74 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !14
%75 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !14
%76 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !14
%77 = or i32 %74, %75
%78 = or i32 %77, %76
%79 = or i32 %78, %73
%80 = tail call i32 @REG_WRITE(i32 noundef %9, i32 noundef %79) #3
%81 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !14
%82 = and i32 %81, %73
%83 = icmp eq i32 %82, 0
br i1 %83, label %25, label %88
84: ; preds = %25
%85 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str.1, i32 noundef %73) #3
%86 = load i32, ptr @EBUSY, align 4, !tbaa !14
%87 = sub nsw i32 0, %86
br label %123
88: ; preds = %72
%89 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !14
%90 = and i32 %89, %73
%91 = icmp eq i32 %90, 0
br i1 %91, label %96, label %92
92: ; preds = %88
%93 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str.2, i32 noundef %73) #3
%94 = load i32, ptr @EIO, align 4, !tbaa !14
%95 = sub nsw i32 0, %94
br label %123
96: ; preds = %88
%97 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !14
%98 = and i32 %97, %73
%99 = icmp eq i32 %98, 0
br i1 %99, label %104, label %100
100: ; preds = %96
%101 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str.3, i32 noundef %73) #3
%102 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !14
%103 = sub nsw i32 0, %102
br label %123
104: ; preds = %96
%105 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_MASK, align 4, !tbaa !14
%106 = and i32 %105, %73
%107 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT, align 4, !tbaa !14
%108 = ashr i32 %106, %107
%109 = tail call i32 @llvm.smin.i32(i32 %108, i32 %4)
%110 = icmp sgt i32 %109, 0
br i1 %110, label %111, label %123
111: ; preds = %104, %111
%112 = phi i64 [ %120, %111 ], [ 0, %104 ]
%113 = trunc i64 %112 to i32
%114 = add i32 %18, %113
%115 = tail call i32 @REG_READ(i32 noundef %114) #3
%116 = getelementptr inbounds i32, ptr %3, i64 %112
%117 = trunc i64 %112 to i32
%118 = sub i32 %109, %117
%119 = tail call i32 @unpack_aux(i32 noundef %115, ptr noundef %116, i32 noundef %118) #3
%120 = add nuw i64 %112, 4
%121 = trunc i64 %120 to i32
%122 = icmp sgt i32 %109, %121
br i1 %122, label %111, label %123, !llvm.loop !18
123: ; preds = %111, %104, %100, %92, %84, %20
%124 = phi i32 [ %24, %20 ], [ %87, %84 ], [ %95, %92 ], [ %103, %100 ], [ %109, %104 ], [ %109, %111 ]
ret i32 %124
}
declare i64 @is_edp(ptr noundef) local_unnamed_addr #1
declare i32 @REG_READ(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_ERROR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pack_aux(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG_KMS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @unpack_aux(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"gma_encoder", !7, i64 0, !8, i64 8}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"cdv_intel_dp", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/gma500/extr_cdv_intel_dp.c_cdv_intel_dp_aux_ch.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/gma500/extr_cdv_intel_dp.c_cdv_intel_dp_aux_ch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DP_AUX_CH_CTL_SEND_BUSY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"dp_aux_ch not started status 0x%08x\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_TIME_OUT_400us = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_DONE = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_TIME_OUT_ERROR = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_RECEIVE_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [34 x i8] c"dp_aux_ch not done status 0x%08x\0A\00", align 1
@.str.2 = private unnamed_addr constant [39 x i8] c"dp_aux_ch receive error status 0x%08x\0A\00", align 1
@EIO = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [33 x i8] c"dp_aux_ch timeout status 0x%08x\0A\00", align 1
@ETIMEDOUT = common local_unnamed_addr global i32 0, align 4
@DP_AUX_CH_CTL_MESSAGE_SIZE_MASK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cdv_intel_dp_aux_ch], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cdv_intel_dp_aux_ch(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = add nsw i32 %8, 16
%10 = tail call i64 @is_edp(ptr noundef %0) #3
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, i32 4, i32 10
%13 = tail call i32 @REG_READ(i32 noundef %9) #3
%14 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !15
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %5
%18 = add nsw i32 %8, 20
%19 = icmp sgt i32 %2, 0
br label %28
20: ; preds = %5
%21 = tail call i32 @REG_READ(i32 noundef %9) #3
%22 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str, i32 noundef %21) #3
%23 = load i32, ptr @EBUSY, align 4, !tbaa !15
%24 = sub nsw i32 0, %23
br label %121
25: ; preds = %71
%26 = add nuw nsw i32 %29, 1
%27 = icmp eq i32 %26, 5
br i1 %27, label %83, label %28, !llvm.loop !16
28: ; preds = %17, %25
%29 = phi i32 [ 0, %17 ], [ %26, %25 ]
br i1 %19, label %30, label %41
30: ; preds = %28, %30
%31 = phi i64 [ %38, %30 ], [ 0, %28 ]
%32 = getelementptr inbounds i32, ptr %1, i64 %31
%33 = trunc i64 %31 to i32
%34 = sub i32 %2, %33
%35 = tail call i32 @pack_aux(ptr noundef %32, i32 noundef %34) #3
%36 = add i32 %18, %33
%37 = tail call i32 @REG_WRITE(i32 noundef %36, i32 noundef %35) #3
%38 = add nuw nsw i64 %31, 4
%39 = trunc nuw i64 %38 to i32
%40 = icmp slt i32 %39, %2
br i1 %40, label %30, label %41, !llvm.loop !18
41: ; preds = %30, %28
%42 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !15
%43 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_400us, align 4, !tbaa !15
%44 = or i32 %43, %42
%45 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT, align 4, !tbaa !15
%46 = shl i32 %2, %45
%47 = or i32 %44, %46
%48 = load i32, ptr @DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT, align 4, !tbaa !15
%49 = shl i32 %12, %48
%50 = or i32 %47, %49
%51 = load i32, ptr @DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT, align 4, !tbaa !15
%52 = shl i32 100, %51
%53 = or i32 %50, %52
%54 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !15
%55 = or i32 %53, %54
%56 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !15
%57 = or i32 %55, %56
%58 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !15
%59 = or i32 %57, %58
%60 = tail call i32 @REG_WRITE(i32 noundef %9, i32 noundef %59) #3
%61 = tail call i32 @REG_READ(i32 noundef %9) #3
%62 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !15
%63 = and i32 %62, %61
%64 = icmp eq i32 %63, 0
br i1 %64, label %71, label %65
65: ; preds = %41, %65
%66 = tail call i32 @udelay(i32 noundef 100) #3
%67 = tail call i32 @REG_READ(i32 noundef %9) #3
%68 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !15
%69 = and i32 %68, %67
%70 = icmp eq i32 %69, 0
br i1 %70, label %71, label %65
71: ; preds = %65, %41
%72 = phi i32 [ %61, %41 ], [ %67, %65 ]
%73 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !15
%74 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !15
%75 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !15
%76 = or i32 %73, %74
%77 = or i32 %76, %75
%78 = or i32 %77, %72
%79 = tail call i32 @REG_WRITE(i32 noundef %9, i32 noundef %78) #3
%80 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !15
%81 = and i32 %80, %72
%82 = icmp eq i32 %81, 0
br i1 %82, label %25, label %87
83: ; preds = %25
%84 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str.1, i32 noundef %72) #3
%85 = load i32, ptr @EBUSY, align 4, !tbaa !15
%86 = sub nsw i32 0, %85
br label %121
87: ; preds = %71
%88 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !15
%89 = and i32 %88, %72
%90 = icmp eq i32 %89, 0
br i1 %90, label %95, label %91
91: ; preds = %87
%92 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str.2, i32 noundef %72) #3
%93 = load i32, ptr @EIO, align 4, !tbaa !15
%94 = sub nsw i32 0, %93
br label %121
95: ; preds = %87
%96 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !15
%97 = and i32 %96, %72
%98 = icmp eq i32 %97, 0
br i1 %98, label %103, label %99
99: ; preds = %95
%100 = tail call i32 @DRM_DEBUG_KMS(ptr noundef nonnull @.str.3, i32 noundef %72) #3
%101 = load i32, ptr @ETIMEDOUT, align 4, !tbaa !15
%102 = sub nsw i32 0, %101
br label %121
103: ; preds = %95
%104 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_MASK, align 4, !tbaa !15
%105 = and i32 %104, %72
%106 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT, align 4, !tbaa !15
%107 = ashr i32 %105, %106
%108 = tail call i32 @llvm.smin.i32(i32 %107, i32 %4)
%109 = icmp sgt i32 %108, 0
br i1 %109, label %110, label %121
110: ; preds = %103, %110
%111 = phi i64 [ %118, %110 ], [ 0, %103 ]
%112 = trunc i64 %111 to i32
%113 = add i32 %18, %112
%114 = tail call i32 @REG_READ(i32 noundef %113) #3
%115 = getelementptr inbounds i32, ptr %3, i64 %111
%116 = sub i32 %108, %112
%117 = tail call i32 @unpack_aux(i32 noundef %114, ptr noundef %115, i32 noundef %116) #3
%118 = add nuw nsw i64 %111, 4
%119 = trunc nuw i64 %118 to i32
%120 = icmp sgt i32 %108, %119
br i1 %120, label %110, label %121, !llvm.loop !19
121: ; preds = %110, %103, %99, %91, %83, %20
%122 = phi i32 [ %24, %20 ], [ %86, %83 ], [ %94, %91 ], [ %102, %99 ], [ %108, %103 ], [ %108, %110 ]
ret i32 %122
}
declare i64 @is_edp(ptr noundef) local_unnamed_addr #1
declare i32 @REG_READ(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_ERROR(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pack_aux(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @DRM_DEBUG_KMS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @unpack_aux(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 8}
!7 = !{!"gma_encoder", !8, i64 0, !9, i64 8}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !14, i64 0}
!13 = !{!"cdv_intel_dp", !14, i64 0}
!14 = !{!"int", !10, i64 0}
!15 = !{!14, !14, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
| linux_drivers_gpu_drm_gma500_extr_cdv_intel_dp.c_cdv_intel_dp_aux_ch |
; ModuleID = 'AnghaBench/linux/scripts/dtc/extr_util.c_get_oct_char.c'
source_filename = "AnghaBench/linux/scripts/dtc/extr_util.c_get_oct_char.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_oct_char], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal signext i8 @get_oct_char(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = alloca [4 x i8], align 1
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = getelementptr inbounds [4 x i8], ptr %3, i64 0, i64 3
store i8 0, ptr %5, align 1, !tbaa !5
%6 = load i32, ptr %1, align 4, !tbaa !8
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, ptr %0, i64 %7
%9 = call i32 @strncpy(ptr noundef nonnull %3, ptr noundef %8, i32 noundef 3) #4
%10 = call i64 @strtol(ptr noundef nonnull %3, ptr noundef nonnull %4, i32 noundef 8)
%11 = load ptr, ptr %4, align 8, !tbaa !10
%12 = icmp ugt ptr %11, %3
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 noundef %13) #4
%15 = ptrtoint ptr %11 to i64
%16 = ptrtoint ptr %3 to i64
%17 = sub i64 %15, %16
%18 = load i32, ptr %1, align 4, !tbaa !8
%19 = trunc i64 %17 to i32
%20 = add i32 %18, %19
store i32 %20, ptr %1, align 4, !tbaa !8
%21 = trunc i64 %10 to i8
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret i8 %21
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn
declare i64 @strtol(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #3
declare i32 @assert(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/scripts/dtc/extr_util.c_get_oct_char.c'
source_filename = "AnghaBench/linux/scripts/dtc/extr_util.c_get_oct_char.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @get_oct_char], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal signext i8 @get_oct_char(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = alloca [4 x i8], align 1
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #4
%5 = getelementptr inbounds i8, ptr %3, i64 3
store i8 0, ptr %5, align 1, !tbaa !6
%6 = load i32, ptr %1, align 4, !tbaa !9
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, ptr %0, i64 %7
%9 = call i32 @strncpy(ptr noundef nonnull %3, ptr noundef %8, i32 noundef 3) #4
%10 = call i64 @strtol(ptr noundef nonnull %3, ptr noundef nonnull %4, i32 noundef 8)
%11 = load ptr, ptr %4, align 8, !tbaa !11
%12 = icmp ugt ptr %11, %3
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 noundef %13) #4
%15 = ptrtoint ptr %11 to i64
%16 = ptrtoint ptr %3 to i64
%17 = sub i64 %15, %16
%18 = load i32, ptr %1, align 4, !tbaa !9
%19 = trunc i64 %17 to i32
%20 = add i32 %18, %19
store i32 %20, ptr %1, align 4, !tbaa !9
%21 = trunc i64 %10 to i8
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret i8 %21
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn
declare i64 @strtol(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #3
declare i32 @assert(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
| linux_scripts_dtc_extr_util.c_get_oct_char |
; ModuleID = 'AnghaBench/reactos/base/applications/mstsc/extr_uimain.c_ui_invalidate.c'
source_filename = "AnghaBench/reactos/base/applications/mstsc/extr_uimain.c_ui_invalidate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_server_depth = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ui_invalidate(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
store i32 %0, ptr %5, align 4, !tbaa !5
store i32 %1, ptr %6, align 4, !tbaa !5
store i32 %2, ptr %7, align 4, !tbaa !5
store i32 %3, ptr %8, align 4, !tbaa !5
%9 = icmp slt i32 %2, 1
%10 = icmp slt i32 %3, 1
%11 = or i1 %9, %10
br i1 %11, label %39, label %12
12: ; preds = %4
%13 = call i64 @bs_warp_coords(ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef nonnull %8, i32 noundef 0, i32 noundef 0) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %39, label %15
15: ; preds = %12
%16 = load i32, ptr %7, align 4, !tbaa !5
%17 = add nsw i32 %16, 3
%18 = and i32 %17, -4
store i32 %18, ptr %7, align 4, !tbaa !5
%19 = load i32, ptr %8, align 4, !tbaa !5
%20 = shl i32 %19, 2
%21 = mul i32 %20, %18
%22 = call i64 @xmalloc(i32 noundef %21) #2
%23 = inttoptr i64 %22 to ptr
%24 = load i32, ptr %5, align 4, !tbaa !5
%25 = load i32, ptr %6, align 4, !tbaa !5
%26 = load i32, ptr %7, align 4, !tbaa !5
%27 = load i32, ptr %8, align 4, !tbaa !5
%28 = load i32, ptr @g_server_depth, align 4, !tbaa !5
%29 = add nsw i32 %28, 7
%30 = sdiv i32 %29, 8
%31 = mul nsw i32 %30, %26
%32 = call i32 @bs_copy_box(ptr noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %31) #2
%33 = load i32, ptr %7, align 4, !tbaa !5
%34 = load i32, ptr %8, align 4, !tbaa !5
%35 = load i32, ptr %5, align 4, !tbaa !5
%36 = load i32, ptr %6, align 4, !tbaa !5
%37 = call i32 @mi_paint_rect(ptr noundef %23, i32 noundef %33, i32 noundef %34, i32 noundef %35, i32 noundef %36, i32 noundef %33, i32 noundef %34) #2
%38 = call i32 @xfree(ptr noundef %23) #2
br label %39
39: ; preds = %12, %15, %4
ret void
}
declare i64 @bs_warp_coords(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @xmalloc(i32 noundef) local_unnamed_addr #1
declare i32 @bs_copy_box(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mi_paint_rect(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/reactos/base/applications/mstsc/extr_uimain.c_ui_invalidate.c'
source_filename = "AnghaBench/reactos/base/applications/mstsc/extr_uimain.c_ui_invalidate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@g_server_depth = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ui_invalidate(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
store i32 %0, ptr %5, align 4, !tbaa !6
store i32 %1, ptr %6, align 4, !tbaa !6
store i32 %2, ptr %7, align 4, !tbaa !6
store i32 %3, ptr %8, align 4, !tbaa !6
%9 = icmp slt i32 %2, 1
%10 = icmp slt i32 %3, 1
%11 = or i1 %9, %10
br i1 %11, label %39, label %12
12: ; preds = %4
%13 = call i64 @bs_warp_coords(ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef nonnull %7, ptr noundef nonnull %8, i32 noundef 0, i32 noundef 0) #2
%14 = icmp eq i64 %13, 0
br i1 %14, label %39, label %15
15: ; preds = %12
%16 = load i32, ptr %7, align 4, !tbaa !6
%17 = add nsw i32 %16, 3
%18 = and i32 %17, -4
store i32 %18, ptr %7, align 4, !tbaa !6
%19 = load i32, ptr %8, align 4, !tbaa !6
%20 = shl i32 %19, 2
%21 = mul i32 %20, %18
%22 = call i64 @xmalloc(i32 noundef %21) #2
%23 = inttoptr i64 %22 to ptr
%24 = load i32, ptr %5, align 4, !tbaa !6
%25 = load i32, ptr %6, align 4, !tbaa !6
%26 = load i32, ptr %7, align 4, !tbaa !6
%27 = load i32, ptr %8, align 4, !tbaa !6
%28 = load i32, ptr @g_server_depth, align 4, !tbaa !6
%29 = add nsw i32 %28, 7
%30 = sdiv i32 %29, 8
%31 = mul nsw i32 %30, %26
%32 = call i32 @bs_copy_box(ptr noundef %23, i32 noundef %24, i32 noundef %25, i32 noundef %26, i32 noundef %27, i32 noundef %31) #2
%33 = load i32, ptr %7, align 4, !tbaa !6
%34 = load i32, ptr %8, align 4, !tbaa !6
%35 = load i32, ptr %5, align 4, !tbaa !6
%36 = load i32, ptr %6, align 4, !tbaa !6
%37 = call i32 @mi_paint_rect(ptr noundef %23, i32 noundef %33, i32 noundef %34, i32 noundef %35, i32 noundef %36, i32 noundef %33, i32 noundef %34) #2
%38 = call i32 @xfree(ptr noundef %23) #2
br label %39
39: ; preds = %12, %15, %4
ret void
}
declare i64 @bs_warp_coords(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @xmalloc(i32 noundef) local_unnamed_addr #1
declare i32 @bs_copy_box(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mi_paint_rect(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| reactos_base_applications_mstsc_extr_uimain.c_ui_invalidate |
; ModuleID = 'AnghaBench/freebsd/sys/dev/liquidio/base/extr_lio_request_manager.c___lio_add_to_request_list.c'
source_filename = "AnghaBench/freebsd/sys/dev/liquidio/base/extr_lio_request_manager.c___lio_add_to_request_list.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @__lio_add_to_request_list], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @__lio_add_to_request_list(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 %6, i32 1
store ptr %2, ptr %7, align 8, !tbaa !10
%8 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 %6
store i32 %3, ptr %8, align 8, !tbaa !13
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"lio_instr_queue", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_2__", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/liquidio/base/extr_lio_request_manager.c___lio_add_to_request_list.c'
source_filename = "AnghaBench/freebsd/sys/dev/liquidio/base/extr_lio_request_manager.c___lio_add_to_request_list.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr }
@llvm.used = appending global [1 x ptr] [ptr @__lio_add_to_request_list], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @__lio_add_to_request_list(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 %6, i32 1
store ptr %2, ptr %7, align 8, !tbaa !11
%8 = getelementptr inbounds %struct.TYPE_2__, ptr %5, i64 %6
store i32 %3, ptr %8, align 8, !tbaa !14
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"lio_instr_queue", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"TYPE_2__", !13, i64 0, !8, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !13, i64 0}
| freebsd_sys_dev_liquidio_base_extr_lio_request_manager.c___lio_add_to_request_list |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_fs/extr_dag.c_svn_fs_fs__dag_dir_entries.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_fs/extr_dag.c_svn_fs_fs__dag_dir_entries.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@svn_node_dir = dso_local local_unnamed_addr global i64 0, align 8
@SVN_ERR_FS_NOT_DIRECTORY = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"Can't get entries of non-directory\00", align 1
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_fs_fs__dag_dir_entries(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = call i32 @get_node_revision(ptr noundef nonnull %4, ptr noundef %1) #3
%6 = call i32 @SVN_ERR(i32 noundef %5) #3
%7 = load ptr, ptr %4, align 8, !tbaa !5
%8 = load i64, ptr %7, align 8, !tbaa !9
%9 = load i64, ptr @svn_node_dir, align 8, !tbaa !12
%10 = icmp eq i64 %8, %9
br i1 %10, label %15, label %11
11: ; preds = %3
%12 = load i32, ptr @SVN_ERR_FS_NOT_DIRECTORY, align 4, !tbaa !13
%13 = call i32 @_(ptr noundef nonnull @.str) #3
%14 = call ptr @svn_error_create(i32 noundef %12, ptr noundef null, i32 noundef %13) #3
br label %18
15: ; preds = %3
%16 = load i32, ptr %1, align 4, !tbaa !15
%17 = call ptr @svn_fs_fs__rep_contents_dir(ptr noundef %0, i32 noundef %16, ptr noundef nonnull %7, ptr noundef %2, ptr noundef %2) #3
br label %18
18: ; preds = %15, %11
%19 = phi ptr [ %14, %11 ], [ %17, %15 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret ptr %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @get_node_revision(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @svn_error_create(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare ptr @svn_fs_fs__rep_contents_dir(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_7__", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_8__", !14, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_fs/extr_dag.c_svn_fs_fs__dag_dir_entries.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_fs/extr_dag.c_svn_fs_fs__dag_dir_entries.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@svn_node_dir = common local_unnamed_addr global i64 0, align 8
@SVN_ERR_FS_NOT_DIRECTORY = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"Can't get entries of non-directory\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_fs_fs__dag_dir_entries(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%5 = call i32 @get_node_revision(ptr noundef nonnull %4, ptr noundef %1) #3
%6 = call i32 @SVN_ERR(i32 noundef %5) #3
%7 = load ptr, ptr %4, align 8, !tbaa !6
%8 = load i64, ptr %7, align 8, !tbaa !10
%9 = load i64, ptr @svn_node_dir, align 8, !tbaa !13
%10 = icmp eq i64 %8, %9
br i1 %10, label %15, label %11
11: ; preds = %3
%12 = load i32, ptr @SVN_ERR_FS_NOT_DIRECTORY, align 4, !tbaa !14
%13 = call i32 @_(ptr noundef nonnull @.str) #3
%14 = call ptr @svn_error_create(i32 noundef %12, ptr noundef null, i32 noundef %13) #3
br label %18
15: ; preds = %3
%16 = load i32, ptr %1, align 4, !tbaa !16
%17 = call ptr @svn_fs_fs__rep_contents_dir(ptr noundef %0, i32 noundef %16, ptr noundef nonnull %7, ptr noundef %2, ptr noundef %2) #3
br label %18
18: ; preds = %15, %11
%19 = phi ptr [ %14, %11 ], [ %17, %15 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret ptr %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @get_node_revision(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @svn_error_create(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare ptr @svn_fs_fs__rep_contents_dir(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"TYPE_8__", !15, i64 0}
| freebsd_contrib_subversion_subversion_libsvn_fs_fs_extr_dag.c_svn_fs_fs__dag_dir_entries |
; ModuleID = 'AnghaBench/HandBrake/libhb/extr_comb_detect.c_check_combing_results.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_comb_detect.c_check_combing_results.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr, i32, i32 }
@HB_COMB_NONE = dso_local local_unnamed_addr global i32 0, align 4
@HB_COMB_LIGHT = dso_local local_unnamed_addr global i32 0, align 4
@HB_COMB_HEAVY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @check_combing_results], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i32 @check_combing_results(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr @HB_COMB_NONE, align 4, !tbaa !5
%3 = load i32, ptr %0, align 8, !tbaa !9
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %29
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%9 = load i32, ptr %8, align 8, !tbaa !13
%10 = sdiv i32 %9, 2
%11 = load i32, ptr @HB_COMB_LIGHT, align 4
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%13 = zext nneg i32 %3 to i64
br label %14
14: ; preds = %5, %25
%15 = phi i64 [ 0, %5 ], [ %27, %25 ]
%16 = phi i32 [ %2, %5 ], [ %26, %25 ]
%17 = getelementptr inbounds i32, ptr %7, i64 %15
%18 = load i32, ptr %17, align 4, !tbaa !5
%19 = icmp slt i32 %18, %10
br i1 %19, label %25, label %20
20: ; preds = %14
%21 = icmp sgt i32 %18, %9
br i1 %21, label %23, label %22
22: ; preds = %20
store i32 2, ptr %12, align 4, !tbaa !14
br label %25
23: ; preds = %20
store i32 1, ptr %12, align 4, !tbaa !14
%24 = load i32, ptr @HB_COMB_HEAVY, align 4, !tbaa !5
br label %29
25: ; preds = %14, %22
%26 = phi i32 [ %11, %22 ], [ %16, %14 ]
%27 = add nuw nsw i64 %15, 1
%28 = icmp eq i64 %27, %13
br i1 %28, label %29, label %14, !llvm.loop !15
29: ; preds = %25, %1, %23
%30 = phi i32 [ %24, %23 ], [ %2, %1 ], [ %26, %25 ]
ret i32 %30
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_3__", !6, i64 0, !11, i64 8, !6, i64 16, !6, i64 20}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !6, i64 16}
!14 = !{!10, !6, i64 20}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_comb_detect.c_check_combing_results.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_comb_detect.c_check_combing_results.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HB_COMB_NONE = common local_unnamed_addr global i32 0, align 4
@HB_COMB_LIGHT = common local_unnamed_addr global i32 0, align 4
@HB_COMB_HEAVY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @check_combing_results], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal i32 @check_combing_results(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr @HB_COMB_NONE, align 4, !tbaa !6
%3 = load i32, ptr %0, align 8, !tbaa !10
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %29
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load i32, ptr %8, align 8, !tbaa !14
%10 = sdiv i32 %9, 2
%11 = load i32, ptr @HB_COMB_LIGHT, align 4
%12 = getelementptr inbounds i8, ptr %0, i64 20
%13 = zext nneg i32 %3 to i64
br label %14
14: ; preds = %5, %25
%15 = phi i64 [ 0, %5 ], [ %27, %25 ]
%16 = phi i32 [ %2, %5 ], [ %26, %25 ]
%17 = getelementptr inbounds i32, ptr %7, i64 %15
%18 = load i32, ptr %17, align 4, !tbaa !6
%19 = icmp slt i32 %18, %10
br i1 %19, label %25, label %20
20: ; preds = %14
%21 = icmp sgt i32 %18, %9
br i1 %21, label %23, label %22
22: ; preds = %20
store i32 2, ptr %12, align 4, !tbaa !15
br label %25
23: ; preds = %20
store i32 1, ptr %12, align 4, !tbaa !15
%24 = load i32, ptr @HB_COMB_HEAVY, align 4, !tbaa !6
br label %29
25: ; preds = %14, %22
%26 = phi i32 [ %11, %22 ], [ %16, %14 ]
%27 = add nuw nsw i64 %15, 1
%28 = icmp eq i64 %27, %13
br i1 %28, label %29, label %14, !llvm.loop !16
29: ; preds = %25, %1, %23
%30 = phi i32 [ %24, %23 ], [ %2, %1 ], [ %26, %25 ]
ret i32 %30
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0, !12, i64 8, !7, i64 16, !7, i64 20}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !7, i64 16}
!15 = !{!11, !7, i64 20}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| HandBrake_libhb_extr_comb_detect.c_check_combing_results |
; ModuleID = 'AnghaBench/freebsd/lib/libc/tests/nss/extr_getgr_test.c_compare_group.c'
source_filename = "AnghaBench/freebsd/lib/libc/tests/nss/extr_getgr_test.c_compare_group.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.group = type { ptr, ptr, i64, ptr }
@.str = private unnamed_addr constant [37 x i8] c"following structures are not equal:\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @compare_group], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @compare_group(ptr noundef %0, ptr noundef %1, ptr noundef readnone %2) #0 {
%4 = icmp eq ptr %0, %1
br i1 %4, label %62, label %5
5: ; preds = %3
%6 = icmp eq ptr %0, null
%7 = icmp eq ptr %1, null
%8 = or i1 %6, %7
br i1 %8, label %56, label %9
9: ; preds = %5
%10 = load ptr, ptr %0, align 8, !tbaa !5
%11 = load ptr, ptr %1, align 8, !tbaa !5
%12 = tail call i64 @strcmp(ptr noundef %10, ptr noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %56
14: ; preds = %9
%15 = getelementptr inbounds %struct.group, ptr %0, i64 0, i32 1
%16 = load ptr, ptr %15, align 8, !tbaa !11
%17 = getelementptr inbounds %struct.group, ptr %1, i64 0, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !11
%19 = tail call i64 @strcmp(ptr noundef %16, ptr noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %56
21: ; preds = %14
%22 = getelementptr inbounds %struct.group, ptr %0, i64 0, i32 2
%23 = load i64, ptr %22, align 8, !tbaa !12
%24 = getelementptr inbounds %struct.group, ptr %1, i64 0, i32 2
%25 = load i64, ptr %24, align 8, !tbaa !12
%26 = icmp eq i64 %23, %25
br i1 %26, label %27, label %56
27: ; preds = %21
%28 = getelementptr inbounds %struct.group, ptr %0, i64 0, i32 3
%29 = load ptr, ptr %28, align 8, !tbaa !13
%30 = icmp eq ptr %29, null
br i1 %30, label %56, label %31
31: ; preds = %27
%32 = getelementptr inbounds %struct.group, ptr %1, i64 0, i32 3
%33 = load ptr, ptr %32, align 8, !tbaa !13
%34 = icmp eq ptr %33, null
br i1 %34, label %56, label %35
35: ; preds = %31
%36 = load ptr, ptr %29, align 8, !tbaa !14
%37 = icmp eq ptr %36, null
br i1 %37, label %52, label %38
38: ; preds = %35, %47
%39 = phi ptr [ %50, %47 ], [ %36, %35 ]
%40 = phi ptr [ %49, %47 ], [ %33, %35 ]
%41 = phi ptr [ %48, %47 ], [ %29, %35 ]
%42 = load ptr, ptr %40, align 8, !tbaa !14
%43 = icmp eq ptr %42, null
br i1 %43, label %56, label %44
44: ; preds = %38
%45 = tail call i64 @strcmp(ptr noundef nonnull %39, ptr noundef nonnull %42) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %56
47: ; preds = %44
%48 = getelementptr inbounds ptr, ptr %41, i64 1
%49 = getelementptr inbounds ptr, ptr %40, i64 1
%50 = load ptr, ptr %48, align 8, !tbaa !14
%51 = icmp eq ptr %50, null
br i1 %51, label %52, label %38, !llvm.loop !15
52: ; preds = %47, %35
%53 = phi ptr [ %33, %35 ], [ %49, %47 ]
%54 = load ptr, ptr %53, align 8, !tbaa !14
%55 = icmp eq ptr %54, null
br i1 %55, label %62, label %56
56: ; preds = %38, %44, %52, %27, %31, %9, %14, %21, %5
%57 = icmp eq ptr %2, null
br i1 %57, label %58, label %62
58: ; preds = %56
%59 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%60 = tail call i32 @dump_group(ptr noundef %0) #2
%61 = tail call i32 @dump_group(ptr noundef %1) #2
br label %62
62: ; preds = %56, %58, %52, %3
%63 = phi i32 [ 0, %3 ], [ 0, %52 ], [ -1, %58 ], [ -1, %56 ]
ret i32 %63
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef) local_unnamed_addr #1
declare i32 @dump_group(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"group", !7, i64 0, !7, i64 8, !10, i64 16, !7, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !10, i64 16}
!13 = !{!6, !7, i64 24}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/lib/libc/tests/nss/extr_getgr_test.c_compare_group.c'
source_filename = "AnghaBench/freebsd/lib/libc/tests/nss/extr_getgr_test.c_compare_group.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [37 x i8] c"following structures are not equal:\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @compare_group], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @compare_group(ptr noundef %0, ptr noundef %1, ptr noundef readnone %2) #0 {
%4 = icmp eq ptr %0, %1
br i1 %4, label %62, label %5
5: ; preds = %3
%6 = icmp eq ptr %0, null
%7 = icmp eq ptr %1, null
%8 = or i1 %6, %7
br i1 %8, label %56, label %9
9: ; preds = %5
%10 = load ptr, ptr %0, align 8, !tbaa !6
%11 = load ptr, ptr %1, align 8, !tbaa !6
%12 = tail call i64 @strcmp(ptr noundef %10, ptr noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %56
14: ; preds = %9
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !12
%17 = getelementptr inbounds i8, ptr %1, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !12
%19 = tail call i64 @strcmp(ptr noundef %16, ptr noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %56
21: ; preds = %14
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = load i64, ptr %22, align 8, !tbaa !13
%24 = getelementptr inbounds i8, ptr %1, i64 16
%25 = load i64, ptr %24, align 8, !tbaa !13
%26 = icmp eq i64 %23, %25
br i1 %26, label %27, label %56
27: ; preds = %21
%28 = getelementptr inbounds i8, ptr %0, i64 24
%29 = load ptr, ptr %28, align 8, !tbaa !14
%30 = icmp eq ptr %29, null
br i1 %30, label %56, label %31
31: ; preds = %27
%32 = getelementptr inbounds i8, ptr %1, i64 24
%33 = load ptr, ptr %32, align 8, !tbaa !14
%34 = icmp eq ptr %33, null
br i1 %34, label %56, label %35
35: ; preds = %31
%36 = load ptr, ptr %29, align 8, !tbaa !15
%37 = icmp eq ptr %36, null
br i1 %37, label %52, label %38
38: ; preds = %35, %47
%39 = phi ptr [ %50, %47 ], [ %36, %35 ]
%40 = phi ptr [ %49, %47 ], [ %33, %35 ]
%41 = phi ptr [ %48, %47 ], [ %29, %35 ]
%42 = load ptr, ptr %40, align 8, !tbaa !15
%43 = icmp eq ptr %42, null
br i1 %43, label %56, label %44
44: ; preds = %38
%45 = tail call i64 @strcmp(ptr noundef nonnull %39, ptr noundef nonnull %42) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %56
47: ; preds = %44
%48 = getelementptr inbounds i8, ptr %41, i64 8
%49 = getelementptr inbounds i8, ptr %40, i64 8
%50 = load ptr, ptr %48, align 8, !tbaa !15
%51 = icmp eq ptr %50, null
br i1 %51, label %52, label %38, !llvm.loop !16
52: ; preds = %47, %35
%53 = phi ptr [ %33, %35 ], [ %49, %47 ]
%54 = load ptr, ptr %53, align 8, !tbaa !15
%55 = icmp eq ptr %54, null
br i1 %55, label %62, label %56
56: ; preds = %38, %44, %52, %27, %31, %9, %14, %21, %5
%57 = icmp eq ptr %2, null
br i1 %57, label %58, label %62
58: ; preds = %56
%59 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%60 = tail call i32 @dump_group(ptr noundef %0) #2
%61 = tail call i32 @dump_group(ptr noundef %1) #2
br label %62
62: ; preds = %56, %58, %52, %3
%63 = phi i32 [ 0, %3 ], [ 0, %52 ], [ -1, %58 ], [ -1, %56 ]
ret i32 %63
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef) local_unnamed_addr #1
declare i32 @dump_group(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"group", !8, i64 0, !8, i64 8, !11, i64 16, !8, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !8, i64 24}
!15 = !{!8, !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| freebsd_lib_libc_tests_nss_extr_getgr_test.c_compare_group |
; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/extr_sn9c2028.c_start_genius_videocam_live.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/extr_sn9c2028.c_start_genius_videocam_live.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.init_command = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i32, i32, i32, i32, i32 }
@__const.start_genius_videocam_live.genius_vcam_live_start_commands = private unnamed_addr constant [93 x %struct.init_command] [%struct.init_command { i32 12, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 22, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 16, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 28, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 18, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 28, %struct.TYPE_2__ { i32 1, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 32, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 18, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 27, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 29, %struct.TYPE_2__ zeroinitializer }], align 16
@llvm.compiler.used = appending global [1 x ptr] [ptr @start_genius_videocam_live], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @start_genius_videocam_live(ptr noundef %0) #0 {
%2 = alloca [93 x %struct.init_command], align 16
call void @llvm.lifetime.start.p0(i64 2604, ptr nonnull %2) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(2604) %2, ptr noundef nonnull align 16 dereferenceable(2604) @__const.start_genius_videocam_live.genius_vcam_live_start_commands, i64 2604, i1 false)
%3 = call i32 @ARRAY_SIZE(ptr noundef nonnull %2) #4
%4 = call i32 @run_start_commands(ptr noundef %0, ptr noundef nonnull %2, i32 noundef %3) #4
%5 = icmp slt i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i64, ptr %0, align 8, !tbaa !5
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = call i32 @v4l2_ctrl_g_ctrl(i64 noundef %7) #4
%11 = call i32 @set_gain(ptr noundef nonnull %0, i32 noundef %10) #4
br label %12
12: ; preds = %6, %9, %1
call void @llvm.lifetime.end.p0(i64 2604, ptr nonnull %2) #4
ret i32 %4
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i32 @run_start_commands(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3
declare i32 @set_gain(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @v4l2_ctrl_g_ctrl(i64 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sd", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/gspca/extr_sn9c2028.c_start_genius_videocam_live.c'
source_filename = "AnghaBench/linux/drivers/media/usb/gspca/extr_sn9c2028.c_start_genius_videocam_live.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.init_command = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i32, i32, i32, i32, i32 }
@__const.start_genius_videocam_live.genius_vcam_live_start_commands = private unnamed_addr constant [93 x %struct.init_command] [%struct.init_command { i32 12, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 22, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 16, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 28, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 18, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 19, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 17, %struct.TYPE_2__ { i32 4, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 28, %struct.TYPE_2__ { i32 1, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.init_command { i32 32, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 18, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 27, %struct.TYPE_2__ zeroinitializer }, %struct.init_command { i32 29, %struct.TYPE_2__ zeroinitializer }], align 4
@llvm.used = appending global [1 x ptr] [ptr @start_genius_videocam_live], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @start_genius_videocam_live(ptr noundef %0) #0 {
%2 = alloca [93 x %struct.init_command], align 4
call void @llvm.lifetime.start.p0(i64 2604, ptr nonnull %2) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(2604) %2, ptr noundef nonnull align 4 dereferenceable(2604) @__const.start_genius_videocam_live.genius_vcam_live_start_commands, i64 2604, i1 false)
%3 = call i32 @ARRAY_SIZE(ptr noundef nonnull %2) #4
%4 = call i32 @run_start_commands(ptr noundef %0, ptr noundef nonnull %2, i32 noundef %3) #4
%5 = icmp slt i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i64, ptr %0, align 8, !tbaa !6
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = call i32 @v4l2_ctrl_g_ctrl(i64 noundef %7) #4
%11 = call i32 @set_gain(ptr noundef nonnull %0, i32 noundef %10) #4
br label %12
12: ; preds = %6, %9, %1
call void @llvm.lifetime.end.p0(i64 2604, ptr nonnull %2) #4
ret i32 %4
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i32 @run_start_commands(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3
declare i32 @set_gain(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @v4l2_ctrl_g_ctrl(i64 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sd", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_media_usb_gspca_extr_sn9c2028.c_start_genius_videocam_live |
; ModuleID = 'AnghaBench/FFmpeg/libswscale/extr_swscale.c_lumRangeFromJpeg16_c.c'
source_filename = "AnghaBench/FFmpeg/libswscale/extr_swscale.c_lumRangeFromJpeg16_c.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @lumRangeFromJpeg16_c], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define internal void @lumRangeFromJpeg16_c(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %36
4: ; preds = %2
%5 = zext nneg i32 %1 to i64
%6 = icmp ult i32 %1, 8
br i1 %6, label %25, label %7
7: ; preds = %4
%8 = and i64 %5, 2147483640
br label %9
9: ; preds = %9, %7
%10 = phi i64 [ 0, %7 ], [ %21, %9 ]
%11 = getelementptr inbounds i32, ptr %0, i64 %10
%12 = getelementptr inbounds i32, ptr %11, i64 4
%13 = load <4 x i32>, ptr %11, align 4, !tbaa !5
%14 = load <4 x i32>, ptr %12, align 4, !tbaa !5
%15 = mul nsw <4 x i32> %13, <i32 3517, i32 3517, i32 3517, i32 3517>
%16 = mul nsw <4 x i32> %14, <i32 3517, i32 3517, i32 3517, i32 3517>
%17 = add nsw <4 x i32> %15, <i32 134247788, i32 134247788, i32 134247788, i32 134247788>
%18 = add nsw <4 x i32> %16, <i32 134247788, i32 134247788, i32 134247788, i32 134247788>
%19 = ashr <4 x i32> %17, <i32 12, i32 12, i32 12, i32 12>
%20 = ashr <4 x i32> %18, <i32 12, i32 12, i32 12, i32 12>
store <4 x i32> %19, ptr %11, align 4, !tbaa !5
store <4 x i32> %20, ptr %12, align 4, !tbaa !5
%21 = add nuw i64 %10, 8
%22 = icmp eq i64 %21, %8
br i1 %22, label %23, label %9, !llvm.loop !9
23: ; preds = %9
%24 = icmp eq i64 %8, %5
br i1 %24, label %36, label %25
25: ; preds = %4, %23
%26 = phi i64 [ 0, %4 ], [ %8, %23 ]
br label %27
27: ; preds = %25, %27
%28 = phi i64 [ %34, %27 ], [ %26, %25 ]
%29 = getelementptr inbounds i32, ptr %0, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !5
%31 = mul nsw i32 %30, 3517
%32 = add nsw i32 %31, 134247788
%33 = ashr i32 %32, 12
store i32 %33, ptr %29, align 4, !tbaa !5
%34 = add nuw nsw i64 %28, 1
%35 = icmp eq i64 %34, %5
br i1 %35, label %36, label %27, !llvm.loop !13
36: ; preds = %27, %23, %2
ret void
}
attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
| ; ModuleID = 'AnghaBench/FFmpeg/libswscale/extr_swscale.c_lumRangeFromJpeg16_c.c'
source_filename = "AnghaBench/FFmpeg/libswscale/extr_swscale.c_lumRangeFromJpeg16_c.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @lumRangeFromJpeg16_c], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync)
define internal void @lumRangeFromJpeg16_c(ptr nocapture noundef %0, i32 noundef %1) #0 {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %46
4: ; preds = %2
%5 = zext nneg i32 %1 to i64
%6 = icmp ult i32 %1, 16
br i1 %6, label %35, label %7
7: ; preds = %4
%8 = and i64 %5, 2147483632
br label %9
9: ; preds = %9, %7
%10 = phi i64 [ 0, %7 ], [ %31, %9 ]
%11 = getelementptr inbounds i32, ptr %0, i64 %10
%12 = getelementptr inbounds i8, ptr %11, i64 16
%13 = getelementptr inbounds i8, ptr %11, i64 32
%14 = getelementptr inbounds i8, ptr %11, i64 48
%15 = load <4 x i32>, ptr %11, align 4, !tbaa !6
%16 = load <4 x i32>, ptr %12, align 4, !tbaa !6
%17 = load <4 x i32>, ptr %13, align 4, !tbaa !6
%18 = load <4 x i32>, ptr %14, align 4, !tbaa !6
%19 = mul nsw <4 x i32> %15, <i32 3517, i32 3517, i32 3517, i32 3517>
%20 = mul nsw <4 x i32> %16, <i32 3517, i32 3517, i32 3517, i32 3517>
%21 = mul nsw <4 x i32> %17, <i32 3517, i32 3517, i32 3517, i32 3517>
%22 = mul nsw <4 x i32> %18, <i32 3517, i32 3517, i32 3517, i32 3517>
%23 = add nsw <4 x i32> %19, <i32 134247788, i32 134247788, i32 134247788, i32 134247788>
%24 = add nsw <4 x i32> %20, <i32 134247788, i32 134247788, i32 134247788, i32 134247788>
%25 = add nsw <4 x i32> %21, <i32 134247788, i32 134247788, i32 134247788, i32 134247788>
%26 = add nsw <4 x i32> %22, <i32 134247788, i32 134247788, i32 134247788, i32 134247788>
%27 = ashr <4 x i32> %23, <i32 12, i32 12, i32 12, i32 12>
%28 = ashr <4 x i32> %24, <i32 12, i32 12, i32 12, i32 12>
%29 = ashr <4 x i32> %25, <i32 12, i32 12, i32 12, i32 12>
%30 = ashr <4 x i32> %26, <i32 12, i32 12, i32 12, i32 12>
store <4 x i32> %27, ptr %11, align 4, !tbaa !6
store <4 x i32> %28, ptr %12, align 4, !tbaa !6
store <4 x i32> %29, ptr %13, align 4, !tbaa !6
store <4 x i32> %30, ptr %14, align 4, !tbaa !6
%31 = add nuw i64 %10, 16
%32 = icmp eq i64 %31, %8
br i1 %32, label %33, label %9, !llvm.loop !10
33: ; preds = %9
%34 = icmp eq i64 %8, %5
br i1 %34, label %46, label %35
35: ; preds = %33, %4
%36 = phi i64 [ 0, %4 ], [ %8, %33 ]
br label %37
37: ; preds = %35, %37
%38 = phi i64 [ %44, %37 ], [ %36, %35 ]
%39 = getelementptr inbounds i32, ptr %0, i64 %38
%40 = load i32, ptr %39, align 4, !tbaa !6
%41 = mul nsw i32 %40, 3517
%42 = add nsw i32 %41, 134247788
%43 = ashr i32 %42, 12
store i32 %43, ptr %39, align 4, !tbaa !6
%44 = add nuw nsw i64 %38, 1
%45 = icmp eq i64 %44, %5
br i1 %45, label %46, label %37, !llvm.loop !14
46: ; preds = %37, %33, %2
ret void
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11, !12, !13}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}
!14 = distinct !{!14, !11, !13, !12}
| FFmpeg_libswscale_extr_swscale.c_lumRangeFromJpeg16_c |
; ModuleID = 'AnghaBench/tmux/extr_tty.c_tty_add.c'
source_filename = "AnghaBench/tmux/extr_tty.c_tty_add.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.tty = type { i32, i64, i32, i32, ptr }
%struct.client = type { i64, i32 }
@TTY_BLOCK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"%s: %.*s\00", align 1
@tty_log_fd = dso_local local_unnamed_addr global i32 0, align 4
@TTY_STARTED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tty_add], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @tty_add(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr @TTY_BLOCK, align 4, !tbaa !12
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %3
%9 = getelementptr inbounds %struct.tty, ptr %0, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = add i64 %10, %2
store i64 %11, ptr %9, align 8, !tbaa !13
br label %36
12: ; preds = %3
%13 = getelementptr inbounds %struct.tty, ptr %0, i64 0, i32 4
%14 = load ptr, ptr %13, align 8, !tbaa !14
%15 = getelementptr inbounds %struct.tty, ptr %0, i64 0, i32 3
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = tail call i32 @evbuffer_add(i32 noundef %16, ptr noundef %1, i64 noundef %2) #2
%18 = getelementptr inbounds %struct.client, ptr %14, i64 0, i32 1
%19 = load i32, ptr %18, align 8, !tbaa !16
%20 = trunc i64 %2 to i32
%21 = tail call i32 @log_debug(ptr noundef nonnull @.str, i32 noundef %19, i32 noundef %20, ptr noundef %1) #2
%22 = load i64, ptr %14, align 8, !tbaa !18
%23 = add i64 %22, %2
store i64 %23, ptr %14, align 8, !tbaa !18
%24 = load i32, ptr @tty_log_fd, align 4, !tbaa !12
%25 = icmp eq i32 %24, -1
br i1 %25, label %28, label %26
26: ; preds = %12
%27 = tail call i32 @write(i32 noundef %24, ptr noundef %1, i64 noundef %2) #2
br label %28
28: ; preds = %26, %12
%29 = load i32, ptr %0, align 8, !tbaa !5
%30 = load i32, ptr @TTY_STARTED, align 4, !tbaa !12
%31 = and i32 %30, %29
%32 = icmp eq i32 %31, 0
br i1 %32, label %36, label %33
33: ; preds = %28
%34 = getelementptr inbounds %struct.tty, ptr %0, i64 0, i32 2
%35 = tail call i32 @event_add(ptr noundef nonnull %34, ptr noundef null) #2
br label %36
36: ; preds = %28, %33, %8
ret void
}
declare i32 @evbuffer_add(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @log_debug(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @write(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @event_add(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tty", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!6, !11, i64 24}
!15 = !{!6, !7, i64 20}
!16 = !{!17, !7, i64 8}
!17 = !{!"client", !10, i64 0, !7, i64 8}
!18 = !{!17, !10, i64 0}
| ; ModuleID = 'AnghaBench/tmux/extr_tty.c_tty_add.c'
source_filename = "AnghaBench/tmux/extr_tty.c_tty_add.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TTY_BLOCK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"%s: %.*s\00", align 1
@tty_log_fd = common local_unnamed_addr global i32 0, align 4
@TTY_STARTED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tty_add], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @tty_add(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr @TTY_BLOCK, align 4, !tbaa !13
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = add i64 %10, %2
store i64 %11, ptr %9, align 8, !tbaa !14
br label %36
12: ; preds = %3
%13 = getelementptr inbounds i8, ptr %0, i64 24
%14 = load ptr, ptr %13, align 8, !tbaa !15
%15 = getelementptr inbounds i8, ptr %0, i64 20
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = tail call i32 @evbuffer_add(i32 noundef %16, ptr noundef %1, i64 noundef %2) #2
%18 = getelementptr inbounds i8, ptr %14, i64 8
%19 = load i32, ptr %18, align 8, !tbaa !17
%20 = trunc i64 %2 to i32
%21 = tail call i32 @log_debug(ptr noundef nonnull @.str, i32 noundef %19, i32 noundef %20, ptr noundef %1) #2
%22 = load i64, ptr %14, align 8, !tbaa !19
%23 = add i64 %22, %2
store i64 %23, ptr %14, align 8, !tbaa !19
%24 = load i32, ptr @tty_log_fd, align 4, !tbaa !13
%25 = icmp eq i32 %24, -1
br i1 %25, label %28, label %26
26: ; preds = %12
%27 = tail call i32 @write(i32 noundef %24, ptr noundef %1, i64 noundef %2) #2
br label %28
28: ; preds = %26, %12
%29 = load i32, ptr %0, align 8, !tbaa !6
%30 = load i32, ptr @TTY_STARTED, align 4, !tbaa !13
%31 = and i32 %30, %29
%32 = icmp eq i32 %31, 0
br i1 %32, label %36, label %33
33: ; preds = %28
%34 = getelementptr inbounds i8, ptr %0, i64 16
%35 = tail call i32 @event_add(ptr noundef nonnull %34, ptr noundef null) #2
br label %36
36: ; preds = %28, %33, %8
ret void
}
declare i32 @evbuffer_add(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @log_debug(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @write(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @event_add(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tty", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20, !12, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!7, !12, i64 24}
!16 = !{!7, !8, i64 20}
!17 = !{!18, !8, i64 8}
!18 = !{!"client", !11, i64 0, !8, i64 8}
!19 = !{!18, !11, i64 0}
| tmux_extr_tty.c_tty_add |
; ModuleID = 'AnghaBench/radare2/libr/core/extr_panels.c___cursor_right.c'
source_filename = "AnghaBench/radare2/libr/core/extr_panels.c___cursor_right.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { ptr, i32 }
@PANEL_CMD_STACK = dso_local local_unnamed_addr global i32 0, align 4
@PANEL_CMD_REGISTERS = dso_local local_unnamed_addr global i32 0, align 4
@PANEL_CMD_DISASSEMBLY = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @__cursor_right(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 8, !tbaa !5
%4 = tail call ptr @__get_cur_panel(i32 noundef %3) #2
%5 = load ptr, ptr %0, align 8, !tbaa !11
%6 = load i32, ptr @PANEL_CMD_STACK, align 4, !tbaa !12
%7 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i32, ptr %5, align 4, !tbaa !13
%11 = icmp sgt i32 %10, 14
br i1 %11, label %34, label %12
12: ; preds = %9, %1
%13 = load i32, ptr @PANEL_CMD_REGISTERS, align 4, !tbaa !12
%14 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i32, ptr @PANEL_CMD_STACK, align 4, !tbaa !12
%18 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %12
%21 = load i32, ptr %5, align 4, !tbaa !13
%22 = add nsw i32 %21, 1
store i32 %22, ptr %5, align 4, !tbaa !13
%23 = load ptr, ptr %4, align 8, !tbaa !15
%24 = load i32, ptr %23, align 4, !tbaa !17
%25 = add nsw i32 %24, 1
store i32 %25, ptr %23, align 4, !tbaa !17
br label %34
26: ; preds = %16
%27 = load i32, ptr @PANEL_CMD_DISASSEMBLY, align 4, !tbaa !12
%28 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %27) #2
%29 = icmp eq i64 %28, 0
%30 = load i32, ptr %5, align 4, !tbaa !13
%31 = add nsw i32 %30, 1
store i32 %31, ptr %5, align 4, !tbaa !13
br i1 %29, label %34, label %32
32: ; preds = %26
%33 = tail call i32 @__fix_cursor_down(ptr noundef nonnull %0) #2
br label %34
34: ; preds = %26, %20, %32, %9
ret void
}
declare ptr @__get_cur_panel(i32 noundef) local_unnamed_addr #1
declare i64 @__check_panel_type(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__fix_cursor_down(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_12__", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!10, !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_10__", !10, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_11__", !7, i64 0}
!17 = !{!18, !10, i64 0}
!18 = !{!"TYPE_9__", !10, i64 0}
| ; ModuleID = 'AnghaBench/radare2/libr/core/extr_panels.c___cursor_right.c'
source_filename = "AnghaBench/radare2/libr/core/extr_panels.c___cursor_right.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PANEL_CMD_STACK = common local_unnamed_addr global i32 0, align 4
@PANEL_CMD_REGISTERS = common local_unnamed_addr global i32 0, align 4
@PANEL_CMD_DISASSEMBLY = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @__cursor_right(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i32, ptr %2, align 8, !tbaa !6
%4 = tail call ptr @__get_cur_panel(i32 noundef %3) #2
%5 = load ptr, ptr %0, align 8, !tbaa !12
%6 = load i32, ptr @PANEL_CMD_STACK, align 4, !tbaa !13
%7 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %6) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i32, ptr %5, align 4, !tbaa !14
%11 = icmp sgt i32 %10, 14
br i1 %11, label %34, label %12
12: ; preds = %9, %1
%13 = load i32, ptr @PANEL_CMD_REGISTERS, align 4, !tbaa !13
%14 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i32, ptr @PANEL_CMD_STACK, align 4, !tbaa !13
%18 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %12
%21 = load i32, ptr %5, align 4, !tbaa !14
%22 = add nsw i32 %21, 1
store i32 %22, ptr %5, align 4, !tbaa !14
%23 = load ptr, ptr %4, align 8, !tbaa !16
%24 = load i32, ptr %23, align 4, !tbaa !18
%25 = add nsw i32 %24, 1
store i32 %25, ptr %23, align 4, !tbaa !18
br label %34
26: ; preds = %16
%27 = load i32, ptr @PANEL_CMD_DISASSEMBLY, align 4, !tbaa !13
%28 = tail call i64 @__check_panel_type(ptr noundef %4, i32 noundef %27) #2
%29 = icmp eq i64 %28, 0
%30 = load i32, ptr %5, align 4, !tbaa !14
%31 = add nsw i32 %30, 1
store i32 %31, ptr %5, align 4, !tbaa !14
br i1 %29, label %34, label %32
32: ; preds = %26
%33 = tail call i32 @__fix_cursor_down(ptr noundef nonnull %0) #2
br label %34
34: ; preds = %26, %20, %32, %9
ret void
}
declare ptr @__get_cur_panel(i32 noundef) local_unnamed_addr #1
declare i64 @__check_panel_type(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__fix_cursor_down(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_12__", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_10__", !11, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"TYPE_11__", !8, i64 0}
!18 = !{!19, !11, i64 0}
!19 = !{!"TYPE_9__", !11, i64 0}
| radare2_libr_core_extr_panels.c___cursor_right |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/regulator/extr_core.c_regulator_min_uV_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/regulator/extr_core.c_regulator_min_uV_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [24 x i8] c"constraint not defined\0A\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @regulator_min_uV_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @regulator_min_uV_show(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #4
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %8
7: ; preds = %3
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(24) @.str, i64 24, i1 false)
br label %11
8: ; preds = %3
%9 = load i32, ptr %5, align 4, !tbaa !10
%10 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %9)
br label %11
11: ; preds = %8, %7
%12 = phi i32 [ %10, %8 ], [ 23, %7 ]
ret i32 %12
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"regulator_dev", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/regulator/extr_core.c_regulator_min_uV_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/regulator/extr_core.c_regulator_min_uV_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [24 x i8] c"constraint not defined\0A\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @regulator_min_uV_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @regulator_min_uV_show(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef writeonly %2) #0 {
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #4
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %8
7: ; preds = %3
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(24) @.str, i64 24, i1 false)
br label %11
8: ; preds = %3
%9 = load i32, ptr %5, align 4, !tbaa !11
%10 = tail call i32 (ptr, ptr, ...) @sprintf(ptr noundef nonnull dereferenceable(1) %2, ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %9)
br label %11
11: ; preds = %8, %7
%12 = phi i32 [ %10, %8 ], [ 23, %7 ]
ret i32 %12
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noundef i32 @sprintf(ptr noalias nocapture noundef writeonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #2
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"regulator_dev", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| fastsocket_kernel_drivers_regulator_extr_core.c_regulator_min_uV_show |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_ni_dpm.c_ni_dpm_vblank_too_short.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_ni_dpm.c_ni_dpm_vblank_too_short.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @ni_dpm_vblank_too_short(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @rv770_get_pi(ptr noundef %0) #2
%3 = tail call i64 @r600_dpm_get_vblank_time(ptr noundef %0) #2
%4 = load i64, ptr %2, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
%6 = select i1 %5, i64 0, i64 450
%7 = icmp slt i64 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
declare ptr @rv770_get_pi(ptr noundef) local_unnamed_addr #1
declare i64 @r600_dpm_get_vblank_time(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rv7xx_power_info", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_ni_dpm.c_ni_dpm_vblank_too_short.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_ni_dpm.c_ni_dpm_vblank_too_short.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @ni_dpm_vblank_too_short(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @rv770_get_pi(ptr noundef %0) #2
%3 = tail call i64 @r600_dpm_get_vblank_time(ptr noundef %0) #2
%4 = load i64, ptr %2, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
%6 = select i1 %5, i64 0, i64 450
%7 = icmp slt i64 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
declare ptr @rv770_get_pi(ptr noundef) local_unnamed_addr #1
declare i64 @r600_dpm_get_vblank_time(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rv7xx_power_info", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_radeon_extr_ni_dpm.c_ni_dpm_vblank_too_short |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_eepro.c_eepro_ethtool_get_settings.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_eepro.c_eepro_ethtool_get_settings.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ethtool_cmd = type { i32, i32, i64, i32, i32, i32, i32, i32 }
%struct.net_device = type { i64, i32 }
@SUPPORTED_10baseT_Half = dso_local local_unnamed_addr global i32 0, align 4
@SUPPORTED_10baseT_Full = dso_local local_unnamed_addr global i32 0, align 4
@SUPPORTED_Autoneg = dso_local local_unnamed_addr global i32 0, align 4
@ADVERTISED_10baseT_Half = dso_local local_unnamed_addr global i32 0, align 4
@ADVERTISED_10baseT_Full = dso_local local_unnamed_addr global i32 0, align 4
@ADVERTISED_Autoneg = dso_local local_unnamed_addr global i32 0, align 4
@ee_PortTPE = dso_local local_unnamed_addr global i32 0, align 4
@SUPPORTED_TP = dso_local local_unnamed_addr global i32 0, align 4
@ADVERTISED_TP = dso_local local_unnamed_addr global i32 0, align 4
@ee_PortBNC = dso_local local_unnamed_addr global i32 0, align 4
@SUPPORTED_BNC = dso_local local_unnamed_addr global i32 0, align 4
@ADVERTISED_BNC = dso_local local_unnamed_addr global i32 0, align 4
@ee_PortAUI = dso_local local_unnamed_addr global i32 0, align 4
@SUPPORTED_AUI = dso_local local_unnamed_addr global i32 0, align 4
@ADVERTISED_AUI = dso_local local_unnamed_addr global i32 0, align 4
@SPEED_10 = dso_local local_unnamed_addr global i32 0, align 4
@TPE = dso_local local_unnamed_addr global i64 0, align 8
@ee_Duplex = dso_local local_unnamed_addr global i32 0, align 4
@DUPLEX_FULL = dso_local local_unnamed_addr global i32 0, align 4
@DUPLEX_HALF = dso_local local_unnamed_addr global i32 0, align 4
@XCVR_INTERNAL = dso_local local_unnamed_addr global i32 0, align 4
@ee_AutoNeg = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @eepro_ethtool_get_settings], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @eepro_ethtool_get_settings(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = load i32, ptr @SUPPORTED_10baseT_Half, align 4, !tbaa !5
%5 = load i32, ptr @SUPPORTED_10baseT_Full, align 4, !tbaa !5
%6 = or i32 %5, %4
%7 = load i32, ptr @SUPPORTED_Autoneg, align 4, !tbaa !5
%8 = or i32 %6, %7
store i32 %8, ptr %1, align 8, !tbaa !9
%9 = load i32, ptr @ADVERTISED_10baseT_Half, align 4, !tbaa !5
%10 = load i32, ptr @ADVERTISED_10baseT_Full, align 4, !tbaa !5
%11 = or i32 %10, %9
%12 = load i32, ptr @ADVERTISED_Autoneg, align 4, !tbaa !5
%13 = or i32 %11, %12
%14 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 1
store i32 %13, ptr %14, align 4, !tbaa !12
%15 = load ptr, ptr %3, align 8, !tbaa !13
%16 = getelementptr inbounds i32, ptr %15, i64 5
%17 = load i32, ptr %16, align 4, !tbaa !5
%18 = load i32, ptr @ee_PortTPE, align 4, !tbaa !5
%19 = tail call i64 @GetBit(i32 noundef %17, i32 noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %28, label %21
21: ; preds = %2
%22 = load i32, ptr @SUPPORTED_TP, align 4, !tbaa !5
%23 = load i32, ptr %1, align 8, !tbaa !9
%24 = or i32 %23, %22
store i32 %24, ptr %1, align 8, !tbaa !9
%25 = load i32, ptr @ADVERTISED_TP, align 4, !tbaa !5
%26 = load i32, ptr %14, align 4, !tbaa !12
%27 = or i32 %26, %25
store i32 %27, ptr %14, align 4, !tbaa !12
br label %28
28: ; preds = %21, %2
%29 = load ptr, ptr %3, align 8, !tbaa !13
%30 = getelementptr inbounds i32, ptr %29, i64 5
%31 = load i32, ptr %30, align 4, !tbaa !5
%32 = load i32, ptr @ee_PortBNC, align 4, !tbaa !5
%33 = tail call i64 @GetBit(i32 noundef %31, i32 noundef %32) #2
%34 = icmp eq i64 %33, 0
br i1 %34, label %42, label %35
35: ; preds = %28
%36 = load i32, ptr @SUPPORTED_BNC, align 4, !tbaa !5
%37 = load i32, ptr %1, align 8, !tbaa !9
%38 = or i32 %37, %36
store i32 %38, ptr %1, align 8, !tbaa !9
%39 = load i32, ptr @ADVERTISED_BNC, align 4, !tbaa !5
%40 = load i32, ptr %14, align 4, !tbaa !12
%41 = or i32 %40, %39
store i32 %41, ptr %14, align 4, !tbaa !12
br label %42
42: ; preds = %35, %28
%43 = load ptr, ptr %3, align 8, !tbaa !13
%44 = getelementptr inbounds i32, ptr %43, i64 5
%45 = load i32, ptr %44, align 4, !tbaa !5
%46 = load i32, ptr @ee_PortAUI, align 4, !tbaa !5
%47 = tail call i64 @GetBit(i32 noundef %45, i32 noundef %46) #2
%48 = icmp eq i64 %47, 0
br i1 %48, label %56, label %49
49: ; preds = %42
%50 = load i32, ptr @SUPPORTED_AUI, align 4, !tbaa !5
%51 = load i32, ptr %1, align 8, !tbaa !9
%52 = or i32 %51, %50
store i32 %52, ptr %1, align 8, !tbaa !9
%53 = load i32, ptr @ADVERTISED_AUI, align 4, !tbaa !5
%54 = load i32, ptr %14, align 4, !tbaa !12
%55 = or i32 %54, %53
store i32 %55, ptr %14, align 4, !tbaa !12
br label %56
56: ; preds = %49, %42
%57 = load i32, ptr @SPEED_10, align 4, !tbaa !5
%58 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 7
store i32 %57, ptr %58, align 8, !tbaa !16
%59 = load i64, ptr %0, align 8, !tbaa !17
%60 = load i64, ptr @TPE, align 8, !tbaa !19
%61 = icmp eq i64 %59, %60
%62 = load ptr, ptr %3, align 8, !tbaa !13
br i1 %61, label %63, label %69
63: ; preds = %56
%64 = getelementptr inbounds i32, ptr %62, i64 1
%65 = load i32, ptr %64, align 4, !tbaa !5
%66 = load i32, ptr @ee_Duplex, align 4, !tbaa !5
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
br i1 %68, label %69, label %70
69: ; preds = %63, %56
br label %70
70: ; preds = %63, %69
%71 = phi ptr [ @DUPLEX_HALF, %69 ], [ @DUPLEX_FULL, %63 ]
%72 = load i32, ptr %71, align 4, !tbaa !5
%73 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 6
store i32 %72, ptr %73, align 4, !tbaa !20
%74 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 2
store i64 %59, ptr %74, align 8, !tbaa !21
%75 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 1
%76 = load i32, ptr %75, align 8, !tbaa !22
%77 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 5
store i32 %76, ptr %77, align 8, !tbaa !23
%78 = load i32, ptr @XCVR_INTERNAL, align 4, !tbaa !5
%79 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 4
store i32 %78, ptr %79, align 4, !tbaa !24
%80 = load i32, ptr %62, align 4, !tbaa !5
%81 = load i32, ptr @ee_AutoNeg, align 4, !tbaa !5
%82 = and i32 %81, %80
%83 = icmp eq i32 %82, 0
br i1 %83, label %86, label %84
84: ; preds = %70
%85 = getelementptr inbounds %struct.ethtool_cmd, ptr %1, i64 0, i32 3
store i32 1, ptr %85, align 8, !tbaa !25
br label %86
86: ; preds = %84, %70
ret i32 0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @GetBit(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ethtool_cmd", !6, i64 0, !6, i64 4, !11, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!14, !15, i64 0}
!14 = !{!"eepro_local", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!10, !6, i64 32}
!17 = !{!18, !11, i64 0}
!18 = !{!"net_device", !11, i64 0, !6, i64 8}
!19 = !{!11, !11, i64 0}
!20 = !{!10, !6, i64 28}
!21 = !{!10, !11, i64 8}
!22 = !{!18, !6, i64 8}
!23 = !{!10, !6, i64 24}
!24 = !{!10, !6, i64 20}
!25 = !{!10, !6, i64 16}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_eepro.c_eepro_ethtool_get_settings.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_eepro.c_eepro_ethtool_get_settings.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SUPPORTED_10baseT_Half = common local_unnamed_addr global i32 0, align 4
@SUPPORTED_10baseT_Full = common local_unnamed_addr global i32 0, align 4
@SUPPORTED_Autoneg = common local_unnamed_addr global i32 0, align 4
@ADVERTISED_10baseT_Half = common local_unnamed_addr global i32 0, align 4
@ADVERTISED_10baseT_Full = common local_unnamed_addr global i32 0, align 4
@ADVERTISED_Autoneg = common local_unnamed_addr global i32 0, align 4
@ee_PortTPE = common local_unnamed_addr global i32 0, align 4
@SUPPORTED_TP = common local_unnamed_addr global i32 0, align 4
@ADVERTISED_TP = common local_unnamed_addr global i32 0, align 4
@ee_PortBNC = common local_unnamed_addr global i32 0, align 4
@SUPPORTED_BNC = common local_unnamed_addr global i32 0, align 4
@ADVERTISED_BNC = common local_unnamed_addr global i32 0, align 4
@ee_PortAUI = common local_unnamed_addr global i32 0, align 4
@SUPPORTED_AUI = common local_unnamed_addr global i32 0, align 4
@ADVERTISED_AUI = common local_unnamed_addr global i32 0, align 4
@SPEED_10 = common local_unnamed_addr global i32 0, align 4
@TPE = common local_unnamed_addr global i64 0, align 8
@ee_Duplex = common local_unnamed_addr global i32 0, align 4
@DUPLEX_FULL = common local_unnamed_addr global i32 0, align 4
@DUPLEX_HALF = common local_unnamed_addr global i32 0, align 4
@XCVR_INTERNAL = common local_unnamed_addr global i32 0, align 4
@ee_AutoNeg = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @eepro_ethtool_get_settings], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @eepro_ethtool_get_settings(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = load i32, ptr @SUPPORTED_10baseT_Half, align 4, !tbaa !6
%5 = load i32, ptr @SUPPORTED_10baseT_Full, align 4, !tbaa !6
%6 = or i32 %5, %4
%7 = load i32, ptr @SUPPORTED_Autoneg, align 4, !tbaa !6
%8 = or i32 %6, %7
store i32 %8, ptr %1, align 8, !tbaa !10
%9 = load i32, ptr @ADVERTISED_10baseT_Half, align 4, !tbaa !6
%10 = load i32, ptr @ADVERTISED_10baseT_Full, align 4, !tbaa !6
%11 = or i32 %10, %9
%12 = load i32, ptr @ADVERTISED_Autoneg, align 4, !tbaa !6
%13 = or i32 %11, %12
%14 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %13, ptr %14, align 4, !tbaa !13
%15 = load ptr, ptr %3, align 8, !tbaa !14
%16 = getelementptr inbounds i8, ptr %15, i64 20
%17 = load i32, ptr %16, align 4, !tbaa !6
%18 = load i32, ptr @ee_PortTPE, align 4, !tbaa !6
%19 = tail call i64 @GetBit(i32 noundef %17, i32 noundef %18) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %28, label %21
21: ; preds = %2
%22 = load i32, ptr @SUPPORTED_TP, align 4, !tbaa !6
%23 = load i32, ptr %1, align 8, !tbaa !10
%24 = or i32 %23, %22
store i32 %24, ptr %1, align 8, !tbaa !10
%25 = load i32, ptr @ADVERTISED_TP, align 4, !tbaa !6
%26 = load i32, ptr %14, align 4, !tbaa !13
%27 = or i32 %26, %25
store i32 %27, ptr %14, align 4, !tbaa !13
br label %28
28: ; preds = %21, %2
%29 = load ptr, ptr %3, align 8, !tbaa !14
%30 = getelementptr inbounds i8, ptr %29, i64 20
%31 = load i32, ptr %30, align 4, !tbaa !6
%32 = load i32, ptr @ee_PortBNC, align 4, !tbaa !6
%33 = tail call i64 @GetBit(i32 noundef %31, i32 noundef %32) #2
%34 = icmp eq i64 %33, 0
br i1 %34, label %42, label %35
35: ; preds = %28
%36 = load i32, ptr @SUPPORTED_BNC, align 4, !tbaa !6
%37 = load i32, ptr %1, align 8, !tbaa !10
%38 = or i32 %37, %36
store i32 %38, ptr %1, align 8, !tbaa !10
%39 = load i32, ptr @ADVERTISED_BNC, align 4, !tbaa !6
%40 = load i32, ptr %14, align 4, !tbaa !13
%41 = or i32 %40, %39
store i32 %41, ptr %14, align 4, !tbaa !13
br label %42
42: ; preds = %35, %28
%43 = load ptr, ptr %3, align 8, !tbaa !14
%44 = getelementptr inbounds i8, ptr %43, i64 20
%45 = load i32, ptr %44, align 4, !tbaa !6
%46 = load i32, ptr @ee_PortAUI, align 4, !tbaa !6
%47 = tail call i64 @GetBit(i32 noundef %45, i32 noundef %46) #2
%48 = icmp eq i64 %47, 0
br i1 %48, label %56, label %49
49: ; preds = %42
%50 = load i32, ptr @SUPPORTED_AUI, align 4, !tbaa !6
%51 = load i32, ptr %1, align 8, !tbaa !10
%52 = or i32 %51, %50
store i32 %52, ptr %1, align 8, !tbaa !10
%53 = load i32, ptr @ADVERTISED_AUI, align 4, !tbaa !6
%54 = load i32, ptr %14, align 4, !tbaa !13
%55 = or i32 %54, %53
store i32 %55, ptr %14, align 4, !tbaa !13
br label %56
56: ; preds = %49, %42
%57 = load i32, ptr @SPEED_10, align 4, !tbaa !6
%58 = getelementptr inbounds i8, ptr %1, i64 32
store i32 %57, ptr %58, align 8, !tbaa !17
%59 = load i64, ptr %0, align 8, !tbaa !18
%60 = load i64, ptr @TPE, align 8, !tbaa !20
%61 = icmp eq i64 %59, %60
%62 = load ptr, ptr %3, align 8, !tbaa !14
br i1 %61, label %63, label %69
63: ; preds = %56
%64 = getelementptr inbounds i8, ptr %62, i64 4
%65 = load i32, ptr %64, align 4, !tbaa !6
%66 = load i32, ptr @ee_Duplex, align 4, !tbaa !6
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
br i1 %68, label %69, label %70
69: ; preds = %63, %56
br label %70
70: ; preds = %63, %69
%71 = phi ptr [ @DUPLEX_HALF, %69 ], [ @DUPLEX_FULL, %63 ]
%72 = load i32, ptr %71, align 4, !tbaa !6
%73 = getelementptr inbounds i8, ptr %1, i64 28
store i32 %72, ptr %73, align 4, !tbaa !21
%74 = getelementptr inbounds i8, ptr %1, i64 8
store i64 %59, ptr %74, align 8, !tbaa !22
%75 = getelementptr inbounds i8, ptr %0, i64 8
%76 = load i32, ptr %75, align 8, !tbaa !23
%77 = getelementptr inbounds i8, ptr %1, i64 24
store i32 %76, ptr %77, align 8, !tbaa !24
%78 = load i32, ptr @XCVR_INTERNAL, align 4, !tbaa !6
%79 = getelementptr inbounds i8, ptr %1, i64 20
store i32 %78, ptr %79, align 4, !tbaa !25
%80 = load i32, ptr %62, align 4, !tbaa !6
%81 = load i32, ptr @ee_AutoNeg, align 4, !tbaa !6
%82 = and i32 %81, %80
%83 = icmp eq i32 %82, 0
br i1 %83, label %86, label %84
84: ; preds = %70
%85 = getelementptr inbounds i8, ptr %1, i64 16
store i32 1, ptr %85, align 8, !tbaa !26
br label %86
86: ; preds = %84, %70
ret i32 0
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @GetBit(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ethtool_cmd", !7, i64 0, !7, i64 4, !12, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !7, i64 4}
!14 = !{!15, !16, i64 0}
!15 = !{!"eepro_local", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!11, !7, i64 32}
!18 = !{!19, !12, i64 0}
!19 = !{!"net_device", !12, i64 0, !7, i64 8}
!20 = !{!12, !12, i64 0}
!21 = !{!11, !7, i64 28}
!22 = !{!11, !12, i64 8}
!23 = !{!19, !7, i64 8}
!24 = !{!11, !7, i64 24}
!25 = !{!11, !7, i64 20}
!26 = !{!11, !7, i64 16}
| fastsocket_kernel_drivers_net_extr_eepro.c_eepro_ethtool_get_settings |
; ModuleID = 'AnghaBench/freebsd/stand/i386/libi386/extr_multiboot.c_num_modules.c'
source_filename = "AnghaBench/freebsd/stand/i386/libi386/extr_multiboot.c_num_modules.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @num_modules], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal i32 @num_modules(ptr nocapture noundef readonly %0) #0 {
br label %2
2: ; preds = %2, %1
%3 = phi ptr [ %0, %1 ], [ %5, %2 ]
%4 = phi i32 [ 0, %1 ], [ %7, %2 ]
%5 = load ptr, ptr %3, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
%7 = add nuw nsw i32 %4, 1
br i1 %6, label %8, label %2, !llvm.loop !9
8: ; preds = %2
ret i32 %4
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/stand/i386/libi386/extr_multiboot.c_num_modules.c'
source_filename = "AnghaBench/freebsd/stand/i386/libi386/extr_multiboot.c_num_modules.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @num_modules], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @num_modules(ptr nocapture noundef readonly %0) #0 {
br label %2
2: ; preds = %2, %1
%3 = phi ptr [ %0, %1 ], [ %5, %2 ]
%4 = phi i32 [ 0, %1 ], [ %7, %2 ]
%5 = load ptr, ptr %3, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
%7 = add nuw nsw i32 %4, 1
br i1 %6, label %8, label %2, !llvm.loop !10
8: ; preds = %2
ret i32 %4
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_stand_i386_libi386_extr_multiboot.c_num_modules |
; ModuleID = 'AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_RangeVarCallbackForRenameAttribute.c'
source_filename = "AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_RangeVarCallbackForRenameAttribute.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RELOID = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @RangeVarCallbackForRenameAttribute], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @RangeVarCallbackForRenameAttribute(ptr nocapture readnone %0, i32 noundef %1, i32 %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @RELOID, align 4, !tbaa !5
%6 = tail call i32 @ObjectIdGetDatum(i32 noundef %1) #2
%7 = tail call i32 @SearchSysCache1(i32 noundef %5, i32 noundef %6) #2
%8 = tail call i32 @HeapTupleIsValid(i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = tail call i64 @GETSTRUCT(i32 noundef %7) #2
%12 = tail call i32 @renameatt_check(i32 noundef %1, i64 noundef %11, i32 noundef 0) #2
%13 = tail call i32 @ReleaseSysCache(i32 noundef %7) #2
br label %14
14: ; preds = %4, %10
ret void
}
declare i32 @SearchSysCache1(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ObjectIdGetDatum(i32 noundef) local_unnamed_addr #1
declare i32 @HeapTupleIsValid(i32 noundef) local_unnamed_addr #1
declare i64 @GETSTRUCT(i32 noundef) local_unnamed_addr #1
declare i32 @renameatt_check(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ReleaseSysCache(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_RangeVarCallbackForRenameAttribute.c'
source_filename = "AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_RangeVarCallbackForRenameAttribute.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RELOID = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @RangeVarCallbackForRenameAttribute], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @RangeVarCallbackForRenameAttribute(ptr nocapture readnone %0, i32 noundef %1, i32 %2, ptr nocapture readnone %3) #0 {
%5 = load i32, ptr @RELOID, align 4, !tbaa !6
%6 = tail call i32 @ObjectIdGetDatum(i32 noundef %1) #2
%7 = tail call i32 @SearchSysCache1(i32 noundef %5, i32 noundef %6) #2
%8 = tail call i32 @HeapTupleIsValid(i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = tail call i64 @GETSTRUCT(i32 noundef %7) #2
%12 = tail call i32 @renameatt_check(i32 noundef %1, i64 noundef %11, i32 noundef 0) #2
%13 = tail call i32 @ReleaseSysCache(i32 noundef %7) #2
br label %14
14: ; preds = %4, %10
ret void
}
declare i32 @SearchSysCache1(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ObjectIdGetDatum(i32 noundef) local_unnamed_addr #1
declare i32 @HeapTupleIsValid(i32 noundef) local_unnamed_addr #1
declare i64 @GETSTRUCT(i32 noundef) local_unnamed_addr #1
declare i32 @renameatt_check(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ReleaseSysCache(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| postgres_src_backend_commands_extr_tablecmds.c_RangeVarCallbackForRenameAttribute |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_drv_shutdown.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_drv_shutdown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @oxu_drv_shutdown], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @oxu_drv_shutdown(ptr noundef %0) #0 {
%2 = tail call i32 @oxu_drv_remove(ptr noundef %0) #2
ret void
}
declare i32 @oxu_drv_remove(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_drv_shutdown.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/host/extr_oxu210hp-hcd.c_oxu_drv_shutdown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @oxu_drv_shutdown], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @oxu_drv_shutdown(ptr noundef %0) #0 {
%2 = tail call i32 @oxu_drv_remove(ptr noundef %0) #2
ret void
}
declare i32 @oxu_drv_remove(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_usb_host_extr_oxu210hp-hcd.c_oxu_drv_shutdown |
; ModuleID = 'AnghaBench/freebsd/contrib/netbsd-tests/lib/libcurses/slave/extr_curses_commands.c_cmd_wmove.c'
source_filename = "AnghaBench/freebsd/contrib/netbsd-tests/lib/libcurses/slave/extr_curses_commands.c_cmd_wmove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [3 x i8] c"%p\00", align 1
@.str.1 = private unnamed_addr constant [13 x i8] c"BAD ARGUMENT\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @cmd_wmove(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = alloca ptr, align 8
%4 = alloca i32, align 4
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = tail call i32 @check_arg_count(i32 noundef %0, i32 noundef 3) #3
%7 = icmp eq i32 %6, 1
br i1 %7, label %37, label %8
8: ; preds = %2
%9 = load ptr, ptr %1, align 8, !tbaa !5
%10 = call i64 @sscanf(ptr noundef %9, ptr noundef nonnull @.str, ptr noundef nonnull %3) #3
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = call i32 @report_count(i32 noundef 1) #3
%14 = call i32 @report_error(ptr noundef nonnull @.str.1) #3
br label %37
15: ; preds = %8
%16 = getelementptr inbounds ptr, ptr %1, i64 1
%17 = load ptr, ptr %16, align 8, !tbaa !5
%18 = call i64 @sscanf(ptr noundef %17, ptr noundef nonnull @.str.2, ptr noundef nonnull %4) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %15
%21 = call i32 @report_count(i32 noundef 1) #3
%22 = call i32 @report_error(ptr noundef nonnull @.str.1) #3
br label %37
23: ; preds = %15
%24 = getelementptr inbounds ptr, ptr %1, i64 2
%25 = load ptr, ptr %24, align 8, !tbaa !5
%26 = call i64 @sscanf(ptr noundef %25, ptr noundef nonnull @.str.2, ptr noundef nonnull %5) #3
%27 = icmp eq i64 %26, 0
%28 = call i32 @report_count(i32 noundef 1) #3
br i1 %27, label %29, label %31
29: ; preds = %23
%30 = call i32 @report_error(ptr noundef nonnull @.str.1) #3
br label %37
31: ; preds = %23
%32 = load ptr, ptr %3, align 8, !tbaa !5
%33 = load i32, ptr %4, align 4, !tbaa !9
%34 = load i32, ptr %5, align 4, !tbaa !9
%35 = call i32 @wmove(ptr noundef %32, i32 noundef %33, i32 noundef %34) #3
%36 = call i32 @report_return(i32 noundef %35) #3
br label %37
37: ; preds = %2, %31, %29, %20, %12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @check_arg_count(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @sscanf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @report_count(i32 noundef) local_unnamed_addr #2
declare i32 @report_error(ptr noundef) local_unnamed_addr #2
declare i32 @report_return(i32 noundef) local_unnamed_addr #2
declare i32 @wmove(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/netbsd-tests/lib/libcurses/slave/extr_curses_commands.c_cmd_wmove.c'
source_filename = "AnghaBench/freebsd/contrib/netbsd-tests/lib/libcurses/slave/extr_curses_commands.c_cmd_wmove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [3 x i8] c"%p\00", align 1
@.str.1 = private unnamed_addr constant [13 x i8] c"BAD ARGUMENT\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @cmd_wmove(i32 noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = alloca ptr, align 8
%4 = alloca i32, align 4
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = tail call i32 @check_arg_count(i32 noundef %0, i32 noundef 3) #3
%7 = icmp eq i32 %6, 1
br i1 %7, label %37, label %8
8: ; preds = %2
%9 = load ptr, ptr %1, align 8, !tbaa !6
%10 = call i64 @sscanf(ptr noundef %9, ptr noundef nonnull @.str, ptr noundef nonnull %3) #3
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = call i32 @report_count(i32 noundef 1) #3
%14 = call i32 @report_error(ptr noundef nonnull @.str.1) #3
br label %37
15: ; preds = %8
%16 = getelementptr inbounds i8, ptr %1, i64 8
%17 = load ptr, ptr %16, align 8, !tbaa !6
%18 = call i64 @sscanf(ptr noundef %17, ptr noundef nonnull @.str.2, ptr noundef nonnull %4) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %15
%21 = call i32 @report_count(i32 noundef 1) #3
%22 = call i32 @report_error(ptr noundef nonnull @.str.1) #3
br label %37
23: ; preds = %15
%24 = getelementptr inbounds i8, ptr %1, i64 16
%25 = load ptr, ptr %24, align 8, !tbaa !6
%26 = call i64 @sscanf(ptr noundef %25, ptr noundef nonnull @.str.2, ptr noundef nonnull %5) #3
%27 = icmp eq i64 %26, 0
%28 = call i32 @report_count(i32 noundef 1) #3
br i1 %27, label %29, label %31
29: ; preds = %23
%30 = call i32 @report_error(ptr noundef nonnull @.str.1) #3
br label %37
31: ; preds = %23
%32 = load ptr, ptr %3, align 8, !tbaa !6
%33 = load i32, ptr %4, align 4, !tbaa !10
%34 = load i32, ptr %5, align 4, !tbaa !10
%35 = call i32 @wmove(ptr noundef %32, i32 noundef %33, i32 noundef %34) #3
%36 = call i32 @report_return(i32 noundef %35) #3
br label %37
37: ; preds = %2, %31, %29, %20, %12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @check_arg_count(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @sscanf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @report_count(i32 noundef) local_unnamed_addr #2
declare i32 @report_error(ptr noundef) local_unnamed_addr #2
declare i32 @report_return(i32 noundef) local_unnamed_addr #2
declare i32 @wmove(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_contrib_netbsd-tests_lib_libcurses_slave_extr_curses_commands.c_cmd_wmove |
; ModuleID = 'AnghaBench/kphp-kdb/util/extr_tftp.c_tftp_pread.c'
source_filename = "AnghaBench/kphp-kdb/util/extr_tftp.c_tftp_pread.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i64, i64 }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @tftp_pread(ptr nocapture noundef readonly %0, ptr noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp slt i64 %3, 0
br i1 %5, label %17, label %6
6: ; preds = %4
%7 = load i64, ptr %0, align 8, !tbaa !5
%8 = icmp slt i64 %7, %3
br i1 %8, label %17, label %9
9: ; preds = %6
%10 = sub nsw i64 %7, %3
%11 = tail call i64 @llvm.umin.i64(i64 %10, i64 %2)
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%13 = load i64, ptr %12, align 8, !tbaa !10
%14 = add nsw i64 %13, %3
%15 = tail call i32 @memcpy(ptr noundef %1, i64 noundef %14, i64 noundef %11) #3
%16 = trunc i64 %11 to i32
br label %17
17: ; preds = %4, %6, %9
%18 = phi i32 [ %16, %9 ], [ -1, %6 ], [ -1, %4 ]
ret i32 %18
}
declare i32 @memcpy(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/kphp-kdb/util/extr_tftp.c_tftp_pread.c'
source_filename = "AnghaBench/kphp-kdb/util/extr_tftp.c_tftp_pread.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @tftp_pread(ptr nocapture noundef readonly %0, ptr noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp slt i64 %3, 0
br i1 %5, label %17, label %6
6: ; preds = %4
%7 = load i64, ptr %0, align 8, !tbaa !6
%8 = icmp slt i64 %7, %3
br i1 %8, label %17, label %9
9: ; preds = %6
%10 = sub nsw i64 %7, %3
%11 = tail call i64 @llvm.umin.i64(i64 %10, i64 %2)
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i64, ptr %12, align 8, !tbaa !11
%14 = add nsw i64 %13, %3
%15 = tail call i32 @memcpy(ptr noundef %1, i64 noundef %14, i64 noundef %11) #3
%16 = trunc i64 %11 to i32
br label %17
17: ; preds = %4, %6, %9
%18 = phi i32 [ %16, %9 ], [ -1, %6 ], [ -1, %4 ]
ret i32 %18
}
declare i32 @memcpy(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 8}
| kphp-kdb_util_extr_tftp.c_tftp_pread |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_tio.c_NI_660x_RTSI_Clock.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_tio.c_NI_660x_RTSI_Clock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ni_660x_max_rtsi_channel = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @NI_660x_RTSI_Clock], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal noundef i32 @NI_660x_RTSI_Clock(i32 noundef %0) #0 {
%2 = load i32, ptr @ni_660x_max_rtsi_channel, align 4, !tbaa !5
%3 = icmp ult i32 %2, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @BUG_ON(i32 noundef %4) #2
%6 = add i32 %0, 11
ret i32 %6
}
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_tio.c_NI_660x_RTSI_Clock.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_ni_tio.c_NI_660x_RTSI_Clock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ni_660x_max_rtsi_channel = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @NI_660x_RTSI_Clock], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal noundef i32 @NI_660x_RTSI_Clock(i32 noundef %0) #0 {
%2 = load i32, ptr @ni_660x_max_rtsi_channel, align 4, !tbaa !6
%3 = icmp ult i32 %2, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @BUG_ON(i32 noundef %4) #2
%6 = add i32 %0, 11
ret i32 %6
}
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_staging_comedi_drivers_extr_ni_tio.c_NI_660x_RTSI_Clock |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/subdev/gpio/extr_nv10.c_nv10_gpio_drive.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/subdev/gpio/extr_nv10.c_nv10_gpio_drive.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nv10_gpio_drive], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nv10_gpio_drive(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = icmp slt i32 %1, 2
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = shl nsw i32 %1, 4
br label %21
8: ; preds = %4
%9 = icmp ult i32 %1, 10
br i1 %9, label %10, label %13
10: ; preds = %8
%11 = shl nuw nsw i32 %1, 2
%12 = add nsw i32 %11, -8
br label %21
13: ; preds = %8
%14 = icmp ult i32 %1, 14
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = shl nuw nsw i32 %1, 2
%17 = add nsw i32 %16, -40
br label %21
18: ; preds = %13
%19 = load i32, ptr @EINVAL, align 4, !tbaa !5
%20 = sub nsw i32 0, %19
br label %31
21: ; preds = %10, %15, %6
%22 = phi i32 [ 1, %10 ], [ 1, %15 ], [ 4, %6 ]
%23 = phi i32 [ %12, %10 ], [ %17, %15 ], [ %7, %6 ]
%24 = phi i32 [ 6293532, %10 ], [ 6293584, %15 ], [ 6293528, %6 ]
%25 = phi i32 [ 3, %10 ], [ 3, %15 ], [ 17, %6 ]
%26 = shl i32 %2, %22
%27 = or i32 %26, %3
%28 = shl i32 %25, %23
%29 = shl i32 %27, %23
%30 = tail call i32 @nv_mask(ptr noundef %0, i32 noundef %24, i32 noundef %28, i32 noundef %29) #2
br label %31
31: ; preds = %21, %18
%32 = phi i32 [ 0, %21 ], [ %20, %18 ]
ret i32 %32
}
declare i32 @nv_mask(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/subdev/gpio/extr_nv10.c_nv10_gpio_drive.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/core/subdev/gpio/extr_nv10.c_nv10_gpio_drive.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nv10_gpio_drive], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @nv10_gpio_drive(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = icmp slt i32 %1, 2
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = shl nsw i32 %1, 4
br label %21
8: ; preds = %4
%9 = icmp ult i32 %1, 10
br i1 %9, label %10, label %13
10: ; preds = %8
%11 = shl nuw nsw i32 %1, 2
%12 = add nsw i32 %11, -8
br label %21
13: ; preds = %8
%14 = icmp ult i32 %1, 14
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = shl nuw nsw i32 %1, 2
%17 = add nsw i32 %16, -40
br label %21
18: ; preds = %13
%19 = load i32, ptr @EINVAL, align 4, !tbaa !6
%20 = sub nsw i32 0, %19
br label %31
21: ; preds = %10, %15, %6
%22 = phi i32 [ 1, %10 ], [ 1, %15 ], [ 4, %6 ]
%23 = phi i32 [ %12, %10 ], [ %17, %15 ], [ %7, %6 ]
%24 = phi i32 [ 6293532, %10 ], [ 6293584, %15 ], [ 6293528, %6 ]
%25 = phi i32 [ 3, %10 ], [ 3, %15 ], [ 17, %6 ]
%26 = shl i32 %2, %22
%27 = or i32 %26, %3
%28 = shl i32 %25, %23
%29 = shl i32 %27, %23
%30 = tail call i32 @nv_mask(ptr noundef %0, i32 noundef %24, i32 noundef %28, i32 noundef %29) #2
br label %31
31: ; preds = %21, %18
%32 = phi i32 [ 0, %21 ], [ %20, %18 ]
ret i32 %32
}
declare i32 @nv_mask(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_gpu_drm_nouveau_core_subdev_gpio_extr_nv10.c_nv10_gpio_drive |
; ModuleID = 'AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2835_cpufreq.c_bcm2835_cpufreq_probe.c'
source_filename = "AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2835_cpufreq.c_bcm2835_cpufreq_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [22 x i8] c"CPU Frequency Control\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @bcm2835_cpufreq_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bcm2835_cpufreq_probe(i32 noundef %0) #0 {
%2 = tail call i64 @device_get_unit(i32 noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %8
6: ; preds = %1
%7 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str) #2
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ 0, %6 ]
ret i32 %9
}
declare i64 @device_get_unit(i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2835_cpufreq.c_bcm2835_cpufreq_probe.c'
source_filename = "AnghaBench/freebsd/sys/arm/broadcom/bcm2835/extr_bcm2835_cpufreq.c_bcm2835_cpufreq_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENXIO = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [22 x i8] c"CPU Frequency Control\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @bcm2835_cpufreq_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @bcm2835_cpufreq_probe(i32 noundef %0) #0 {
%2 = tail call i64 @device_get_unit(i32 noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %8
6: ; preds = %1
%7 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str) #2
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ 0, %6 ]
ret i32 %9
}
declare i64 @device_get_unit(i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_arm_broadcom_bcm2835_extr_bcm2835_cpufreq.c_bcm2835_cpufreq_probe |
; ModuleID = 'AnghaBench/vlc/src/video_output/extr_vout_subpictures.c_spu_channel_UpdateDates.c'
source_filename = "AnghaBench/vlc/src/video_output/extr_vout_subpictures.c_spu_channel_UpdateDates.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, ptr }
%struct.spu_channel = type { %struct.TYPE_4__, i32, i64 }
%struct.TYPE_5__ = type { ptr, ptr, ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @spu_channel_UpdateDates], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @spu_channel_UpdateDates(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %89, label %5
5: ; preds = %2
%6 = tail call ptr @vlc_alloc(i64 noundef %3, i32 noundef 16) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %89, label %8
8: ; preds = %5
%9 = load i64, ptr %0, align 8, !tbaa !5
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %8
%12 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
br label %18
13: ; preds = %18, %8
%14 = phi i64 [ 0, %8 ], [ %32, %18 ]
%15 = getelementptr inbounds %struct.spu_channel, ptr %0, i64 0, i32 2
%16 = load i64, ptr %15, align 8, !tbaa !13
%17 = icmp eq i64 %16, 0
br i1 %17, label %41, label %34
18: ; preds = %11, %18
%19 = phi i64 [ 0, %11 ], [ %31, %18 ]
%20 = load ptr, ptr %12, align 8, !tbaa !14
%21 = getelementptr inbounds %struct.TYPE_5__, ptr %20, i64 %19
%22 = tail call i32 @assert(ptr noundef %21) #2
%23 = getelementptr inbounds %struct.TYPE_5__, ptr %20, i64 %19, i32 3
%24 = load ptr, ptr %23, align 8, !tbaa !15
%25 = shl i64 %19, 1
%26 = getelementptr inbounds ptr, ptr %6, i64 %25
store ptr %24, ptr %26, align 8, !tbaa !17
%27 = getelementptr inbounds %struct.TYPE_5__, ptr %20, i64 %19, i32 2
%28 = load ptr, ptr %27, align 8, !tbaa !18
%29 = or disjoint i64 %25, 1
%30 = getelementptr inbounds ptr, ptr %6, i64 %29
store ptr %28, ptr %30, align 8, !tbaa !17
%31 = add nuw i64 %19, 1
%32 = load i64, ptr %0, align 8, !tbaa !5
%33 = icmp ult i64 %31, %32
br i1 %33, label %18, label %13, !llvm.loop !19
34: ; preds = %13
%35 = trunc i64 %14 to i32
%36 = shl i32 %35, 1
%37 = getelementptr inbounds %struct.spu_channel, ptr %0, i64 0, i32 1
%38 = load i32, ptr %37, align 8, !tbaa !21
%39 = tail call i32 @vlc_clock_ConvertArrayToSystem(i64 noundef %16, ptr noundef %1, ptr noundef nonnull %6, i32 noundef %36, i32 noundef %38) #2
%40 = load i64, ptr %0, align 8, !tbaa !5
br label %41
41: ; preds = %34, %13
%42 = phi i64 [ %40, %34 ], [ %14, %13 ]
%43 = icmp eq i64 %42, 0
br i1 %43, label %63, label %44
44: ; preds = %41
%45 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%46 = load ptr, ptr %45, align 8, !tbaa !14
%47 = and i64 %42, 1
%48 = icmp eq i64 %42, 1
br i1 %48, label %51, label %49
49: ; preds = %44
%50 = and i64 %42, -2
br label %66
51: ; preds = %66, %44
%52 = phi i64 [ 0, %44 ], [ %86, %66 ]
%53 = icmp eq i64 %47, 0
br i1 %53, label %63, label %54
54: ; preds = %51
%55 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %52
%56 = shl i64 %52, 1
%57 = getelementptr inbounds ptr, ptr %6, i64 %56
%58 = load ptr, ptr %57, align 8, !tbaa !17
%59 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %52, i32 1
store ptr %58, ptr %59, align 8, !tbaa !22
%60 = or disjoint i64 %56, 1
%61 = getelementptr inbounds ptr, ptr %6, i64 %60
%62 = load ptr, ptr %61, align 8, !tbaa !17
store ptr %62, ptr %55, align 8, !tbaa !23
br label %63
63: ; preds = %54, %51, %41
%64 = tail call i32 @free(ptr noundef nonnull %6) #2
%65 = load i64, ptr %0, align 8, !tbaa !5
br label %89
66: ; preds = %66, %49
%67 = phi i64 [ 0, %49 ], [ %86, %66 ]
%68 = phi i64 [ 0, %49 ], [ %87, %66 ]
%69 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %67
%70 = shl i64 %67, 1
%71 = getelementptr inbounds ptr, ptr %6, i64 %70
%72 = load ptr, ptr %71, align 8, !tbaa !17
%73 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %67, i32 1
store ptr %72, ptr %73, align 8, !tbaa !22
%74 = or disjoint i64 %70, 1
%75 = getelementptr inbounds ptr, ptr %6, i64 %74
%76 = load ptr, ptr %75, align 8, !tbaa !17
store ptr %76, ptr %69, align 8, !tbaa !23
%77 = or disjoint i64 %67, 1
%78 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %77
%79 = shl i64 %77, 1
%80 = getelementptr inbounds ptr, ptr %6, i64 %79
%81 = load ptr, ptr %80, align 8, !tbaa !17
%82 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %77, i32 1
store ptr %81, ptr %82, align 8, !tbaa !22
%83 = or disjoint i64 %79, 1
%84 = getelementptr inbounds ptr, ptr %6, i64 %83
%85 = load ptr, ptr %84, align 8, !tbaa !17
store ptr %85, ptr %78, align 8, !tbaa !23
%86 = add nuw i64 %67, 2
%87 = add i64 %68, 2
%88 = icmp eq i64 %87, %50
br i1 %88, label %51, label %66, !llvm.loop !24
89: ; preds = %63, %5, %2
%90 = phi i64 [ 0, %2 ], [ %65, %63 ], [ 0, %5 ]
ret i64 %90
}
declare ptr @vlc_alloc(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert(ptr noundef) local_unnamed_addr #1
declare i32 @vlc_clock_ConvertArrayToSystem(i64 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"spu_channel", !7, i64 0, !12, i64 16, !8, i64 24}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!6, !8, i64 24}
!14 = !{!6, !11, i64 8}
!15 = !{!16, !11, i64 24}
!16 = !{!"TYPE_5__", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!17 = !{!11, !11, i64 0}
!18 = !{!16, !11, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!6, !12, i64 16}
!22 = !{!16, !11, i64 8}
!23 = !{!16, !11, i64 0}
!24 = distinct !{!24, !20}
| ; ModuleID = 'AnghaBench/vlc/src/video_output/extr_vout_subpictures.c_spu_channel_UpdateDates.c'
source_filename = "AnghaBench/vlc/src/video_output/extr_vout_subpictures.c_spu_channel_UpdateDates.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { ptr, ptr, ptr, ptr }
@llvm.used = appending global [1 x ptr] [ptr @spu_channel_UpdateDates], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @spu_channel_UpdateDates(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %62, label %5
5: ; preds = %2
%6 = tail call ptr @vlc_alloc(i64 noundef %3, i32 noundef 16) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %62, label %8
8: ; preds = %5
%9 = load i64, ptr %0, align 8, !tbaa !6
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %8
%12 = getelementptr inbounds i8, ptr %0, i64 8
br label %18
13: ; preds = %18, %8
%14 = phi i64 [ 0, %8 ], [ %32, %18 ]
%15 = getelementptr inbounds i8, ptr %0, i64 24
%16 = load i64, ptr %15, align 8, !tbaa !14
%17 = icmp eq i64 %16, 0
br i1 %17, label %41, label %34
18: ; preds = %11, %18
%19 = phi i64 [ 0, %11 ], [ %31, %18 ]
%20 = load ptr, ptr %12, align 8, !tbaa !15
%21 = getelementptr inbounds %struct.TYPE_5__, ptr %20, i64 %19
%22 = tail call i32 @assert(ptr noundef %21) #2
%23 = getelementptr inbounds i8, ptr %21, i64 24
%24 = load ptr, ptr %23, align 8, !tbaa !16
%25 = shl i64 %19, 1
%26 = getelementptr inbounds ptr, ptr %6, i64 %25
store ptr %24, ptr %26, align 8, !tbaa !18
%27 = getelementptr inbounds i8, ptr %21, i64 16
%28 = load ptr, ptr %27, align 8, !tbaa !19
%29 = or disjoint i64 %25, 1
%30 = getelementptr inbounds ptr, ptr %6, i64 %29
store ptr %28, ptr %30, align 8, !tbaa !18
%31 = add nuw i64 %19, 1
%32 = load i64, ptr %0, align 8, !tbaa !6
%33 = icmp ult i64 %31, %32
br i1 %33, label %18, label %13, !llvm.loop !20
34: ; preds = %13
%35 = trunc i64 %14 to i32
%36 = shl i32 %35, 1
%37 = getelementptr inbounds i8, ptr %0, i64 16
%38 = load i32, ptr %37, align 8, !tbaa !22
%39 = tail call i32 @vlc_clock_ConvertArrayToSystem(i64 noundef %16, ptr noundef %1, ptr noundef nonnull %6, i32 noundef %36, i32 noundef %38) #2
%40 = load i64, ptr %0, align 8, !tbaa !6
br label %41
41: ; preds = %34, %13
%42 = phi i64 [ %40, %34 ], [ %14, %13 ]
%43 = icmp eq i64 %42, 0
br i1 %43, label %47, label %44
44: ; preds = %41
%45 = getelementptr inbounds i8, ptr %0, i64 8
%46 = load ptr, ptr %45, align 8, !tbaa !15
br label %50
47: ; preds = %50, %41
%48 = tail call i32 @free(ptr noundef nonnull %6) #2
%49 = load i64, ptr %0, align 8, !tbaa !6
br label %62
50: ; preds = %44, %50
%51 = phi i64 [ 0, %44 ], [ %60, %50 ]
%52 = getelementptr inbounds %struct.TYPE_5__, ptr %46, i64 %51
%53 = shl i64 %51, 1
%54 = getelementptr inbounds ptr, ptr %6, i64 %53
%55 = load ptr, ptr %54, align 8, !tbaa !18
%56 = getelementptr inbounds i8, ptr %52, i64 8
store ptr %55, ptr %56, align 8, !tbaa !23
%57 = or disjoint i64 %53, 1
%58 = getelementptr inbounds ptr, ptr %6, i64 %57
%59 = load ptr, ptr %58, align 8, !tbaa !18
store ptr %59, ptr %52, align 8, !tbaa !24
%60 = add nuw i64 %51, 1
%61 = icmp eq i64 %60, %42
br i1 %61, label %47, label %50, !llvm.loop !25
62: ; preds = %47, %5, %2
%63 = phi i64 [ 0, %2 ], [ %49, %47 ], [ 0, %5 ]
ret i64 %63
}
declare ptr @vlc_alloc(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert(ptr noundef) local_unnamed_addr #1
declare i32 @vlc_clock_ConvertArrayToSystem(i64 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"spu_channel", !8, i64 0, !13, i64 16, !9, i64 24}
!8 = !{!"TYPE_4__", !9, i64 0, !12, i64 8}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!7, !9, i64 24}
!15 = !{!7, !12, i64 8}
!16 = !{!17, !12, i64 24}
!17 = !{!"TYPE_5__", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24}
!18 = !{!12, !12, i64 0}
!19 = !{!17, !12, i64 16}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!7, !13, i64 16}
!23 = !{!17, !12, i64 8}
!24 = !{!17, !12, i64 0}
!25 = distinct !{!25, !21}
| vlc_src_video_output_extr_vout_subpictures.c_spu_channel_UpdateDates |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_iounmap_diva.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_iounmap_diva.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.IsdnCardState = type { i64, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64, i64 }
@DIVA_IPAC_PCI = dso_local local_unnamed_addr global i64 0, align 8
@DIVA_IPACX_PCI = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @iounmap_diva], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @iounmap_diva(ptr nocapture noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @DIVA_IPAC_PCI, align 8, !tbaa !12
%4 = icmp eq i64 %2, %3
%5 = load i64, ptr @DIVA_IPACX_PCI, align 8
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %8, label %22
8: ; preds = %1
%9 = getelementptr inbounds %struct.IsdnCardState, ptr %0, i64 0, i32 1
%10 = getelementptr inbounds %struct.IsdnCardState, ptr %0, i64 0, i32 1, i32 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !13
%12 = icmp eq i64 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = inttoptr i64 %11 to ptr
%15 = tail call i32 @iounmap(ptr noundef nonnull %14) #2
store i64 0, ptr %10, align 8, !tbaa !13
br label %16
16: ; preds = %13, %8
%17 = load i64, ptr %9, align 8, !tbaa !14
%18 = icmp eq i64 %17, 0
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = inttoptr i64 %17 to ptr
%21 = tail call i32 @iounmap(ptr noundef nonnull %20) #2
store i64 0, ptr %9, align 8, !tbaa !14
br label %22
22: ; preds = %1, %16, %19
ret void
}
declare i32 @iounmap(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"IsdnCardState", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0, !7, i64 8}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 16}
!14 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_iounmap_diva.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_diva.c_iounmap_diva.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DIVA_IPAC_PCI = common local_unnamed_addr global i64 0, align 8
@DIVA_IPACX_PCI = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @iounmap_diva], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @iounmap_diva(ptr nocapture noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @DIVA_IPAC_PCI, align 8, !tbaa !13
%4 = icmp eq i64 %2, %3
%5 = load i64, ptr @DIVA_IPACX_PCI, align 8
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %8, label %22
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = getelementptr inbounds i8, ptr %0, i64 16
%11 = load i64, ptr %10, align 8, !tbaa !14
%12 = icmp eq i64 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = inttoptr i64 %11 to ptr
%15 = tail call i32 @iounmap(ptr noundef nonnull %14) #2
store i64 0, ptr %10, align 8, !tbaa !14
br label %16
16: ; preds = %13, %8
%17 = load i64, ptr %9, align 8, !tbaa !15
%18 = icmp eq i64 %17, 0
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = inttoptr i64 %17 to ptr
%21 = tail call i32 @iounmap(ptr noundef nonnull %20) #2
store i64 0, ptr %9, align 8, !tbaa !15
br label %22
22: ; preds = %1, %16, %19
ret void
}
declare i32 @iounmap(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"IsdnCardState", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0, !8, i64 8}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 16}
!15 = !{!7, !8, i64 8}
| fastsocket_kernel_drivers_isdn_hisax_extr_diva.c_iounmap_diva |
; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_id3v2.c_read_ttag.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_id3v2.c_read_ttag.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AV_DICT_DONT_OVERWRITE = dso_local local_unnamed_addr global i32 0, align 4
@AV_DICT_DONT_STRDUP_VAL = dso_local local_unnamed_addr global i32 0, align 4
@AV_LOG_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"Error reading frame %s, skipped\0A\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"TCON\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"TCO\00", align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"(%d)\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
@ID3v1_GENRE_MAX = dso_local local_unnamed_addr global i32 0, align 4
@ff_id3v1_genre_str = dso_local local_unnamed_addr global ptr null, align 8
@.str.5 = private unnamed_addr constant [5 x i8] c"TXXX\00", align 1
@.str.6 = private unnamed_addr constant [4 x i8] c"TXX\00", align 1
@AV_DICT_DONT_STRDUP_KEY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @read_ttag], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @read_ttag(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca ptr, align 8
%8 = alloca ptr, align 8
%9 = alloca i32, align 4
store ptr %4, ptr %7, align 8, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
%10 = load i32, ptr @AV_DICT_DONT_OVERWRITE, align 4, !tbaa !9
%11 = load i32, ptr @AV_DICT_DONT_STRDUP_VAL, align 4, !tbaa !9
%12 = or i32 %11, %10
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #3
%13 = icmp slt i32 %2, 1
br i1 %13, label %85, label %14
14: ; preds = %5
%15 = tail call i32 @avio_r8(ptr noundef %1) #3
%16 = add nsw i32 %2, -1
store i32 %16, ptr %6, align 4, !tbaa !9
%17 = call i64 @decode_str(ptr noundef %0, ptr noundef %1, i32 noundef %15, ptr noundef nonnull %8, ptr noundef nonnull %6) #3
%18 = icmp slt i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !9
%21 = call i32 @av_log(ptr noundef %0, i32 noundef %20, ptr noundef nonnull @.str, ptr noundef %4) #3
br label %85
22: ; preds = %14
%23 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.1) #3
%24 = icmp eq i64 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %22
%26 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.2) #3
%27 = icmp eq i64 %26, 0
br i1 %27, label %28, label %48
28: ; preds = %25, %22
%29 = load ptr, ptr %8, align 8, !tbaa !5
%30 = call i32 @sscanf(ptr noundef %29, ptr noundef nonnull @.str.3, ptr noundef nonnull %9) #3
%31 = icmp eq i32 %30, 1
br i1 %31, label %36, label %32
32: ; preds = %28
%33 = load ptr, ptr %8, align 8, !tbaa !5
%34 = call i32 @sscanf(ptr noundef %33, ptr noundef nonnull @.str.4, ptr noundef nonnull %9) #3
%35 = icmp eq i32 %34, 1
br i1 %35, label %36, label %48
36: ; preds = %32, %28
%37 = load i32, ptr %9, align 4, !tbaa !9
%38 = load i32, ptr @ID3v1_GENRE_MAX, align 4, !tbaa !9
%39 = icmp ugt i32 %37, %38
br i1 %39, label %48, label %40
40: ; preds = %36
%41 = call i32 @av_freep(ptr noundef nonnull %8) #3
%42 = load ptr, ptr @ff_id3v1_genre_str, align 8, !tbaa !5
%43 = load i32, ptr %9, align 4, !tbaa !9
%44 = zext i32 %43 to i64
%45 = getelementptr inbounds i32, ptr %42, i64 %44
%46 = load i32, ptr %45, align 4, !tbaa !9
%47 = call ptr @av_strdup(i32 noundef %46) #3
store ptr %47, ptr %8, align 8, !tbaa !5
br label %75
48: ; preds = %36, %32, %25
%49 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.5) #3
%50 = icmp eq i64 %49, 0
br i1 %50, label %54, label %51
51: ; preds = %48
%52 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.6) #3
%53 = icmp eq i64 %52, 0
br i1 %53, label %54, label %65
54: ; preds = %51, %48
%55 = load ptr, ptr %8, align 8, !tbaa !5
store ptr %55, ptr %7, align 8, !tbaa !5
%56 = call i64 @decode_str(ptr noundef %0, ptr noundef %1, i32 noundef %15, ptr noundef nonnull %8, ptr noundef nonnull %6) #3
%57 = icmp slt i64 %56, 0
br i1 %57, label %58, label %62
58: ; preds = %54
%59 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !9
%60 = call i32 @av_log(ptr noundef %0, i32 noundef %59, ptr noundef nonnull @.str, ptr noundef %55) #3
%61 = call i32 @av_freep(ptr noundef nonnull %7) #3
br label %85
62: ; preds = %54
%63 = load i32, ptr @AV_DICT_DONT_STRDUP_KEY, align 4, !tbaa !9
%64 = or i32 %63, %12
br label %71
65: ; preds = %51
%66 = load ptr, ptr %8, align 8, !tbaa !5
%67 = load i8, ptr %66, align 1, !tbaa !11
%68 = icmp eq i8 %67, 0
br i1 %68, label %69, label %80
69: ; preds = %65
%70 = call i32 @av_freep(ptr noundef nonnull %8) #3
br label %71
71: ; preds = %69, %62
%72 = phi ptr [ %55, %62 ], [ %4, %69 ]
%73 = phi i32 [ %64, %62 ], [ %12, %69 ]
%74 = load ptr, ptr %8, align 8, !tbaa !5
br label %75
75: ; preds = %71, %40
%76 = phi ptr [ %72, %71 ], [ %4, %40 ]
%77 = phi ptr [ %74, %71 ], [ %47, %40 ]
%78 = phi i32 [ %73, %71 ], [ %12, %40 ]
%79 = icmp eq ptr %77, null
br i1 %79, label %85, label %80
80: ; preds = %65, %75
%81 = phi ptr [ %76, %75 ], [ %4, %65 ]
%82 = phi i32 [ %78, %75 ], [ %12, %65 ]
%83 = phi ptr [ %77, %75 ], [ %66, %65 ]
%84 = call i32 @av_dict_set(ptr noundef %3, ptr noundef %81, ptr noundef nonnull %83, i32 noundef %82) #3
br label %85
85: ; preds = %75, %80, %5, %58, %19
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @avio_r8(ptr noundef) local_unnamed_addr #2
declare i64 @decode_str(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @av_log(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sscanf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @av_freep(ptr noundef) local_unnamed_addr #2
declare ptr @av_strdup(i32 noundef) local_unnamed_addr #2
declare i32 @av_dict_set(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_id3v2.c_read_ttag.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_id3v2.c_read_ttag.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AV_DICT_DONT_OVERWRITE = common local_unnamed_addr global i32 0, align 4
@AV_DICT_DONT_STRDUP_VAL = common local_unnamed_addr global i32 0, align 4
@AV_LOG_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"Error reading frame %s, skipped\0A\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"TCON\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"TCO\00", align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"(%d)\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
@ID3v1_GENRE_MAX = common local_unnamed_addr global i32 0, align 4
@ff_id3v1_genre_str = common local_unnamed_addr global ptr null, align 8
@.str.5 = private unnamed_addr constant [5 x i8] c"TXXX\00", align 1
@.str.6 = private unnamed_addr constant [4 x i8] c"TXX\00", align 1
@AV_DICT_DONT_STRDUP_KEY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @read_ttag], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @read_ttag(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca ptr, align 8
%8 = alloca ptr, align 8
%9 = alloca i32, align 4
store ptr %4, ptr %7, align 8, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
%10 = load i32, ptr @AV_DICT_DONT_OVERWRITE, align 4, !tbaa !10
%11 = load i32, ptr @AV_DICT_DONT_STRDUP_VAL, align 4, !tbaa !10
%12 = or i32 %11, %10
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #3
%13 = icmp slt i32 %2, 1
br i1 %13, label %85, label %14
14: ; preds = %5
%15 = tail call i32 @avio_r8(ptr noundef %1) #3
%16 = add nsw i32 %2, -1
store i32 %16, ptr %6, align 4, !tbaa !10
%17 = call i64 @decode_str(ptr noundef %0, ptr noundef %1, i32 noundef %15, ptr noundef nonnull %8, ptr noundef nonnull %6) #3
%18 = icmp slt i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %14
%20 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !10
%21 = call i32 @av_log(ptr noundef %0, i32 noundef %20, ptr noundef nonnull @.str, ptr noundef %4) #3
br label %85
22: ; preds = %14
%23 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.1) #3
%24 = icmp eq i64 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %22
%26 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.2) #3
%27 = icmp eq i64 %26, 0
br i1 %27, label %28, label %48
28: ; preds = %25, %22
%29 = load ptr, ptr %8, align 8, !tbaa !6
%30 = call i32 @sscanf(ptr noundef %29, ptr noundef nonnull @.str.3, ptr noundef nonnull %9) #3
%31 = icmp eq i32 %30, 1
br i1 %31, label %36, label %32
32: ; preds = %28
%33 = load ptr, ptr %8, align 8, !tbaa !6
%34 = call i32 @sscanf(ptr noundef %33, ptr noundef nonnull @.str.4, ptr noundef nonnull %9) #3
%35 = icmp eq i32 %34, 1
br i1 %35, label %36, label %48
36: ; preds = %32, %28
%37 = load i32, ptr %9, align 4, !tbaa !10
%38 = load i32, ptr @ID3v1_GENRE_MAX, align 4, !tbaa !10
%39 = icmp ugt i32 %37, %38
br i1 %39, label %48, label %40
40: ; preds = %36
%41 = call i32 @av_freep(ptr noundef nonnull %8) #3
%42 = load ptr, ptr @ff_id3v1_genre_str, align 8, !tbaa !6
%43 = load i32, ptr %9, align 4, !tbaa !10
%44 = zext i32 %43 to i64
%45 = getelementptr inbounds i32, ptr %42, i64 %44
%46 = load i32, ptr %45, align 4, !tbaa !10
%47 = call ptr @av_strdup(i32 noundef %46) #3
store ptr %47, ptr %8, align 8, !tbaa !6
br label %75
48: ; preds = %36, %32, %25
%49 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.5) #3
%50 = icmp eq i64 %49, 0
br i1 %50, label %54, label %51
51: ; preds = %48
%52 = call i64 @strcmp(ptr noundef %4, ptr noundef nonnull @.str.6) #3
%53 = icmp eq i64 %52, 0
br i1 %53, label %54, label %65
54: ; preds = %51, %48
%55 = load ptr, ptr %8, align 8, !tbaa !6
store ptr %55, ptr %7, align 8, !tbaa !6
%56 = call i64 @decode_str(ptr noundef %0, ptr noundef %1, i32 noundef %15, ptr noundef nonnull %8, ptr noundef nonnull %6) #3
%57 = icmp slt i64 %56, 0
br i1 %57, label %58, label %62
58: ; preds = %54
%59 = load i32, ptr @AV_LOG_ERROR, align 4, !tbaa !10
%60 = call i32 @av_log(ptr noundef %0, i32 noundef %59, ptr noundef nonnull @.str, ptr noundef %55) #3
%61 = call i32 @av_freep(ptr noundef nonnull %7) #3
br label %85
62: ; preds = %54
%63 = load i32, ptr @AV_DICT_DONT_STRDUP_KEY, align 4, !tbaa !10
%64 = or i32 %63, %12
br label %71
65: ; preds = %51
%66 = load ptr, ptr %8, align 8, !tbaa !6
%67 = load i8, ptr %66, align 1, !tbaa !12
%68 = icmp eq i8 %67, 0
br i1 %68, label %69, label %80
69: ; preds = %65
%70 = call i32 @av_freep(ptr noundef nonnull %8) #3
br label %71
71: ; preds = %69, %62
%72 = phi ptr [ %55, %62 ], [ %4, %69 ]
%73 = phi i32 [ %64, %62 ], [ %12, %69 ]
%74 = load ptr, ptr %8, align 8, !tbaa !6
br label %75
75: ; preds = %71, %40
%76 = phi ptr [ %72, %71 ], [ %4, %40 ]
%77 = phi ptr [ %74, %71 ], [ %47, %40 ]
%78 = phi i32 [ %73, %71 ], [ %12, %40 ]
%79 = icmp eq ptr %77, null
br i1 %79, label %85, label %80
80: ; preds = %65, %75
%81 = phi ptr [ %76, %75 ], [ %4, %65 ]
%82 = phi i32 [ %78, %75 ], [ %12, %65 ]
%83 = phi ptr [ %77, %75 ], [ %66, %65 ]
%84 = call i32 @av_dict_set(ptr noundef %3, ptr noundef %81, ptr noundef nonnull %83, i32 noundef %82) #3
br label %85
85: ; preds = %75, %80, %5, %58, %19
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @avio_r8(ptr noundef) local_unnamed_addr #2
declare i64 @decode_str(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @av_log(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sscanf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @av_freep(ptr noundef) local_unnamed_addr #2
declare ptr @av_strdup(i32 noundef) local_unnamed_addr #2
declare i32 @av_dict_set(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!8, !8, i64 0}
| FFmpeg_libavformat_extr_id3v2.c_read_ttag |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_cl22_read.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_cl22_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bnx2x_phy = type { i32, i64 }
@EMAC_REG_EMAC_MDIO_MODE = dso_local local_unnamed_addr global i64 0, align 8
@EMAC_MDIO_MODE_CLAUSE_45 = dso_local local_unnamed_addr global i32 0, align 4
@EMAC_MDIO_COMM_COMMAND_READ_22 = dso_local local_unnamed_addr global i32 0, align 4
@EMAC_MDIO_COMM_START_BUSY = dso_local local_unnamed_addr global i32 0, align 4
@EMAC_REG_EMAC_MDIO_COMM = dso_local local_unnamed_addr global i64 0, align 8
@EMAC_MDIO_COMM_DATA = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_MSG_LINK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"read phy register failed\0A\00", align 1
@EFAULT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_cl22_read], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bnx2x_cl22_read(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef writeonly %3) #0 {
%5 = getelementptr inbounds %struct.bnx2x_phy, ptr %1, i64 0, i32 1
%6 = load i64, ptr %5, align 8, !tbaa !5
%7 = load i64, ptr @EMAC_REG_EMAC_MDIO_MODE, align 8, !tbaa !11
%8 = add nsw i64 %7, %6
%9 = tail call i32 @REG_RD(ptr noundef %0, i64 noundef %8) #2
%10 = load i64, ptr %5, align 8, !tbaa !5
%11 = load i64, ptr @EMAC_REG_EMAC_MDIO_MODE, align 8, !tbaa !11
%12 = add nsw i64 %11, %10
%13 = load i32, ptr @EMAC_MDIO_MODE_CLAUSE_45, align 4, !tbaa !12
%14 = xor i32 %13, -1
%15 = and i32 %9, %14
%16 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %12, i32 noundef %15) #2
%17 = load i32, ptr %1, align 8, !tbaa !13
%18 = shl i32 %17, 21
%19 = shl i32 %2, 16
%20 = or i32 %18, %19
%21 = load i32, ptr @EMAC_MDIO_COMM_COMMAND_READ_22, align 4, !tbaa !12
%22 = or i32 %20, %21
%23 = load i32, ptr @EMAC_MDIO_COMM_START_BUSY, align 4, !tbaa !12
%24 = or i32 %22, %23
%25 = load i64, ptr %5, align 8, !tbaa !5
%26 = load i64, ptr @EMAC_REG_EMAC_MDIO_COMM, align 8, !tbaa !11
%27 = add nsw i64 %26, %25
%28 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %27, i32 noundef %24) #2
br label %32
29: ; preds = %32
%30 = add nuw nsw i32 %33, 1
%31 = icmp eq i32 %30, 50
br i1 %31, label %49, label %32, !llvm.loop !14
32: ; preds = %4, %29
%33 = phi i32 [ 0, %4 ], [ %30, %29 ]
%34 = tail call i32 @udelay(i32 noundef 10) #2
%35 = load i64, ptr %5, align 8, !tbaa !5
%36 = load i64, ptr @EMAC_REG_EMAC_MDIO_COMM, align 8, !tbaa !11
%37 = add nsw i64 %36, %35
%38 = tail call i32 @REG_RD(ptr noundef %0, i64 noundef %37) #2
%39 = load i32, ptr @EMAC_MDIO_COMM_START_BUSY, align 4, !tbaa !12
%40 = and i32 %39, %38
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %29
42: ; preds = %32
%43 = load i32, ptr @EMAC_MDIO_COMM_DATA, align 4, !tbaa !12
%44 = and i32 %43, %38
store i32 %44, ptr %3, align 4, !tbaa !12
%45 = tail call i32 @udelay(i32 noundef 5) #2
%46 = load i32, ptr @EMAC_MDIO_COMM_START_BUSY, align 4, !tbaa !12
%47 = and i32 %46, %38
%48 = icmp eq i32 %47, 0
br i1 %48, label %54, label %49
49: ; preds = %29, %42
%50 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !12
%51 = tail call i32 @DP(i32 noundef %50, ptr noundef nonnull @.str) #2
store i32 0, ptr %3, align 4, !tbaa !12
%52 = load i32, ptr @EFAULT, align 4, !tbaa !12
%53 = sub nsw i32 0, %52
br label %54
54: ; preds = %49, %42
%55 = phi i32 [ %53, %49 ], [ 0, %42 ]
%56 = load i64, ptr %5, align 8, !tbaa !5
%57 = load i64, ptr @EMAC_REG_EMAC_MDIO_MODE, align 8, !tbaa !11
%58 = add nsw i64 %57, %56
%59 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %58, i32 noundef %9) #2
ret i32 %55
}
declare i32 @REG_RD(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @REG_WR(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @DP(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"bnx2x_phy", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_cl22_read.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_cl22_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EMAC_REG_EMAC_MDIO_MODE = common local_unnamed_addr global i64 0, align 8
@EMAC_MDIO_MODE_CLAUSE_45 = common local_unnamed_addr global i32 0, align 4
@EMAC_MDIO_COMM_COMMAND_READ_22 = common local_unnamed_addr global i32 0, align 4
@EMAC_MDIO_COMM_START_BUSY = common local_unnamed_addr global i32 0, align 4
@EMAC_REG_EMAC_MDIO_COMM = common local_unnamed_addr global i64 0, align 8
@EMAC_MDIO_COMM_DATA = common local_unnamed_addr global i32 0, align 4
@NETIF_MSG_LINK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"read phy register failed\0A\00", align 1
@EFAULT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_cl22_read], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @bnx2x_cl22_read(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef writeonly %3) #0 {
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = load i64, ptr %5, align 8, !tbaa !6
%7 = load i64, ptr @EMAC_REG_EMAC_MDIO_MODE, align 8, !tbaa !12
%8 = add nsw i64 %7, %6
%9 = tail call i32 @REG_RD(ptr noundef %0, i64 noundef %8) #2
%10 = load i64, ptr %5, align 8, !tbaa !6
%11 = load i64, ptr @EMAC_REG_EMAC_MDIO_MODE, align 8, !tbaa !12
%12 = add nsw i64 %11, %10
%13 = load i32, ptr @EMAC_MDIO_MODE_CLAUSE_45, align 4, !tbaa !13
%14 = xor i32 %13, -1
%15 = and i32 %9, %14
%16 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %12, i32 noundef %15) #2
%17 = load i32, ptr %1, align 8, !tbaa !14
%18 = shl i32 %17, 21
%19 = shl i32 %2, 16
%20 = or i32 %18, %19
%21 = load i32, ptr @EMAC_MDIO_COMM_COMMAND_READ_22, align 4, !tbaa !13
%22 = or i32 %20, %21
%23 = load i32, ptr @EMAC_MDIO_COMM_START_BUSY, align 4, !tbaa !13
%24 = or i32 %22, %23
%25 = load i64, ptr %5, align 8, !tbaa !6
%26 = load i64, ptr @EMAC_REG_EMAC_MDIO_COMM, align 8, !tbaa !12
%27 = add nsw i64 %26, %25
%28 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %27, i32 noundef %24) #2
br label %32
29: ; preds = %32
%30 = add nuw nsw i32 %33, 1
%31 = icmp eq i32 %30, 50
br i1 %31, label %49, label %32, !llvm.loop !15
32: ; preds = %4, %29
%33 = phi i32 [ 0, %4 ], [ %30, %29 ]
%34 = tail call i32 @udelay(i32 noundef 10) #2
%35 = load i64, ptr %5, align 8, !tbaa !6
%36 = load i64, ptr @EMAC_REG_EMAC_MDIO_COMM, align 8, !tbaa !12
%37 = add nsw i64 %36, %35
%38 = tail call i32 @REG_RD(ptr noundef %0, i64 noundef %37) #2
%39 = load i32, ptr @EMAC_MDIO_COMM_START_BUSY, align 4, !tbaa !13
%40 = and i32 %39, %38
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %29
42: ; preds = %32
%43 = load i32, ptr @EMAC_MDIO_COMM_DATA, align 4, !tbaa !13
%44 = and i32 %43, %38
store i32 %44, ptr %3, align 4, !tbaa !13
%45 = tail call i32 @udelay(i32 noundef 5) #2
%46 = load i32, ptr @EMAC_MDIO_COMM_START_BUSY, align 4, !tbaa !13
%47 = and i32 %46, %38
%48 = icmp eq i32 %47, 0
br i1 %48, label %54, label %49
49: ; preds = %29, %42
%50 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !13
%51 = tail call i32 @DP(i32 noundef %50, ptr noundef nonnull @.str) #2
store i32 0, ptr %3, align 4, !tbaa !13
%52 = load i32, ptr @EFAULT, align 4, !tbaa !13
%53 = sub nsw i32 0, %52
br label %54
54: ; preds = %49, %42
%55 = phi i32 [ %53, %49 ], [ 0, %42 ]
%56 = load i64, ptr %5, align 8, !tbaa !6
%57 = load i64, ptr @EMAC_REG_EMAC_MDIO_MODE, align 8, !tbaa !12
%58 = add nsw i64 %57, %56
%59 = tail call i32 @REG_WR(ptr noundef %0, i64 noundef %58, i32 noundef %9) #2
ret i32 %55
}
declare i32 @REG_RD(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @REG_WR(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @DP(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"bnx2x_phy", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_link.c_bnx2x_cl22_read |
; ModuleID = 'AnghaBench/linux/net/core/extr_devlink.c_devlink_info_version_put.c'
source_filename = "AnghaBench/linux/net/core/extr_devlink.c_devlink_info_version_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EMSGSIZE = dso_local local_unnamed_addr global i32 0, align 4
@DEVLINK_ATTR_INFO_VERSION_NAME = dso_local local_unnamed_addr global i32 0, align 4
@DEVLINK_ATTR_INFO_VERSION_VALUE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @devlink_info_version_put], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @devlink_info_version_put(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = tail call ptr @nla_nest_start_noflag(i32 noundef %5, i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, ptr @EMSGSIZE, align 4, !tbaa !10
%10 = sub nsw i32 0, %9
br label %28
11: ; preds = %4
%12 = load i32, ptr %0, align 4, !tbaa !5
%13 = load i32, ptr @DEVLINK_ATTR_INFO_VERSION_NAME, align 4, !tbaa !10
%14 = tail call i32 @nla_put_string(i32 noundef %12, i32 noundef %13, ptr noundef %2) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %24
16: ; preds = %11
%17 = load i32, ptr %0, align 4, !tbaa !5
%18 = load i32, ptr @DEVLINK_ATTR_INFO_VERSION_VALUE, align 4, !tbaa !10
%19 = tail call i32 @nla_put_string(i32 noundef %17, i32 noundef %18, ptr noundef %3) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %16
%22 = load i32, ptr %0, align 4, !tbaa !5
%23 = tail call i32 @nla_nest_end(i32 noundef %22, ptr noundef nonnull %6) #2
br label %28
24: ; preds = %16, %11
%25 = phi i32 [ %14, %11 ], [ %19, %16 ]
%26 = load i32, ptr %0, align 4, !tbaa !5
%27 = tail call i32 @nla_nest_cancel(i32 noundef %26, ptr noundef nonnull %6) #2
br label %28
28: ; preds = %24, %21, %8
%29 = phi i32 [ %25, %24 ], [ 0, %21 ], [ %10, %8 ]
ret i32 %29
}
declare ptr @nla_nest_start_noflag(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nla_put_string(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nla_nest_end(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nla_nest_cancel(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"devlink_info_req", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/core/extr_devlink.c_devlink_info_version_put.c'
source_filename = "AnghaBench/linux/net/core/extr_devlink.c_devlink_info_version_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EMSGSIZE = common local_unnamed_addr global i32 0, align 4
@DEVLINK_ATTR_INFO_VERSION_NAME = common local_unnamed_addr global i32 0, align 4
@DEVLINK_ATTR_INFO_VERSION_VALUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @devlink_info_version_put], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @devlink_info_version_put(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = tail call ptr @nla_nest_start_noflag(i32 noundef %5, i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, ptr @EMSGSIZE, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %28
11: ; preds = %4
%12 = load i32, ptr %0, align 4, !tbaa !6
%13 = load i32, ptr @DEVLINK_ATTR_INFO_VERSION_NAME, align 4, !tbaa !11
%14 = tail call i32 @nla_put_string(i32 noundef %12, i32 noundef %13, ptr noundef %2) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %24
16: ; preds = %11
%17 = load i32, ptr %0, align 4, !tbaa !6
%18 = load i32, ptr @DEVLINK_ATTR_INFO_VERSION_VALUE, align 4, !tbaa !11
%19 = tail call i32 @nla_put_string(i32 noundef %17, i32 noundef %18, ptr noundef %3) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %16
%22 = load i32, ptr %0, align 4, !tbaa !6
%23 = tail call i32 @nla_nest_end(i32 noundef %22, ptr noundef nonnull %6) #2
br label %28
24: ; preds = %16, %11
%25 = phi i32 [ %14, %11 ], [ %19, %16 ]
%26 = load i32, ptr %0, align 4, !tbaa !6
%27 = tail call i32 @nla_nest_cancel(i32 noundef %26, ptr noundef nonnull %6) #2
br label %28
28: ; preds = %24, %21, %8
%29 = phi i32 [ %25, %24 ], [ 0, %21 ], [ %10, %8 ]
ret i32 %29
}
declare ptr @nla_nest_start_noflag(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nla_put_string(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nla_nest_end(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @nla_nest_cancel(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"devlink_info_req", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_net_core_extr_devlink.c_devlink_info_version_put |
; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/gxvalid/extr_gxvmorx1.c_gxv_morx_subtable_type1_substitutionTable_validate.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/gxvalid/extr_gxvmorx1.c_gxv_morx_subtable_type1_substitutionTable_validate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, i32, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
@GXV_LOOKUPVALUE_UNSIGNED = dso_local local_unnamed_addr global i32 0, align 4
@gxv_morx_subtable_type1_LookupValue_validate = dso_local local_unnamed_addr global i32 0, align 4
@gxv_morx_subtable_type1_LookupFmt4_transit = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gxv_morx_subtable_type1_substitutionTable_validate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @gxv_morx_subtable_type1_substitutionTable_validate(i64 noundef %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 3
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to ptr
%8 = load i32, ptr @GXV_LOOKUPVALUE_UNSIGNED, align 4, !tbaa !11
%9 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 2
store i32 %8, ptr %9, align 4, !tbaa !12
%10 = load i32, ptr @gxv_morx_subtable_type1_LookupValue_validate, align 4, !tbaa !11
%11 = getelementptr inbounds %struct.TYPE_8__, ptr %2, i64 0, i32 1
store i32 %10, ptr %11, align 4, !tbaa !13
%12 = load i32, ptr @gxv_morx_subtable_type1_LookupFmt4_transit, align 4, !tbaa !11
store i32 %12, ptr %2, align 4, !tbaa !14
%13 = load i64, ptr %7, align 8, !tbaa !15
%14 = icmp sgt i64 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %3, %15
%16 = phi i64 [ %21, %15 ], [ 0, %3 ]
%17 = tail call i32 @GXV_LIMIT_CHECK(i32 noundef 4) #2
%18 = tail call i64 @FT_NEXT_ULONG(i64 noundef %0) #2
%19 = add nsw i64 %18, %0
%20 = tail call i32 @gxv_LookupTable_validate(i64 noundef %19, i64 noundef %1, ptr noundef nonnull %2) #2
%21 = add nuw nsw i64 %16, 1
%22 = load i64, ptr %7, align 8, !tbaa !15
%23 = icmp slt i64 %21, %22
br i1 %23, label %15, label %24, !llvm.loop !18
24: ; preds = %15, %3
ret void
}
declare i32 @GXV_LIMIT_CHECK(i32 noundef) local_unnamed_addr #1
declare i64 @FT_NEXT_ULONG(i64 noundef) local_unnamed_addr #1
declare i32 @gxv_LookupTable_validate(i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 12}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_7__", !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/gxvalid/extr_gxvmorx1.c_gxv_morx_subtable_type1_substitutionTable_validate.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/freetype/src/gxvalid/extr_gxvmorx1.c_gxv_morx_subtable_type1_substitutionTable_validate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GXV_LOOKUPVALUE_UNSIGNED = common local_unnamed_addr global i32 0, align 4
@gxv_morx_subtable_type1_LookupValue_validate = common local_unnamed_addr global i32 0, align 4
@gxv_morx_subtable_type1_LookupFmt4_transit = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gxv_morx_subtable_type1_substitutionTable_validate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @gxv_morx_subtable_type1_substitutionTable_validate(i64 noundef %0, i64 noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %2, i64 12
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to ptr
%8 = load i32, ptr @GXV_LOOKUPVALUE_UNSIGNED, align 4, !tbaa !12
%9 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %8, ptr %9, align 4, !tbaa !13
%10 = load i32, ptr @gxv_morx_subtable_type1_LookupValue_validate, align 4, !tbaa !12
%11 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %10, ptr %11, align 4, !tbaa !14
%12 = load i32, ptr @gxv_morx_subtable_type1_LookupFmt4_transit, align 4, !tbaa !12
store i32 %12, ptr %2, align 4, !tbaa !15
%13 = load i64, ptr %7, align 8, !tbaa !16
%14 = icmp sgt i64 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %3, %15
%16 = phi i64 [ %21, %15 ], [ 0, %3 ]
%17 = tail call i32 @GXV_LIMIT_CHECK(i32 noundef 4) #2
%18 = tail call i64 @FT_NEXT_ULONG(i64 noundef %0) #2
%19 = add nsw i64 %18, %0
%20 = tail call i32 @gxv_LookupTable_validate(i64 noundef %19, i64 noundef %1, ptr noundef nonnull %2) #2
%21 = add nuw nsw i64 %16, 1
%22 = load i64, ptr %7, align 8, !tbaa !16
%23 = icmp slt i64 %21, %22
br i1 %23, label %15, label %24, !llvm.loop !19
24: ; preds = %15, %3
ret void
}
declare i32 @GXV_LIMIT_CHECK(i32 noundef) local_unnamed_addr #1
declare i64 @FT_NEXT_ULONG(i64 noundef) local_unnamed_addr #1
declare i32 @gxv_LookupTable_validate(i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 12}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !8, i64 4}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !18, i64 0}
!17 = !{!"TYPE_7__", !18, i64 0}
!18 = !{!"long", !9, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| reactos_sdk_lib_3rdparty_freetype_src_gxvalid_extr_gxvmorx1.c_gxv_morx_subtable_type1_substitutionTable_validate |
; ModuleID = 'AnghaBench/reactos/drivers/storage/port/storport/extr_storport.c_PortReleaseSpinLock.c'
source_filename = "AnghaBench/reactos/drivers/storage/port/storport/extr_storport.c_PortReleaseSpinLock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i32, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
@.str = private unnamed_addr constant [28 x i8] c"PortReleaseSpinLock(%p %p)\0A\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"DpcLock\0A\00", align 1
@.str.2 = private unnamed_addr constant [13 x i8] c"StartIoLock\0A\00", align 1
@.str.3 = private unnamed_addr constant [15 x i8] c"InterruptLock\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @PortReleaseSpinLock], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @PortReleaseSpinLock(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1) #2
%4 = load i32, ptr %1, align 4, !tbaa !5
switch i32 %4, label %17 [
i32 130, label %5
i32 128, label %7
i32 129, label %9
]
5: ; preds = %2
%6 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str.1) #2
br label %17
7: ; preds = %2
%8 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str.2) #2
br label %17
9: ; preds = %2
%10 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str.3) #2
%11 = load ptr, ptr %0, align 8, !tbaa !11
%12 = icmp eq ptr %11, null
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = tail call i32 @KeReleaseInterruptSpinLock(ptr noundef nonnull %11, i32 noundef %15) #2
br label %17
17: ; preds = %9, %13, %2, %7, %5
ret i32 undef
}
declare i32 @DPRINT1(ptr noundef, ...) local_unnamed_addr #1
declare i32 @KeReleaseInterruptSpinLock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_6__", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/reactos/drivers/storage/port/storport/extr_storport.c_PortReleaseSpinLock.c'
source_filename = "AnghaBench/reactos/drivers/storage/port/storport/extr_storport.c_PortReleaseSpinLock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [28 x i8] c"PortReleaseSpinLock(%p %p)\0A\00", align 1
@.str.1 = private unnamed_addr constant [9 x i8] c"DpcLock\0A\00", align 1
@.str.2 = private unnamed_addr constant [13 x i8] c"StartIoLock\0A\00", align 1
@.str.3 = private unnamed_addr constant [15 x i8] c"InterruptLock\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @PortReleaseSpinLock], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @PortReleaseSpinLock(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1) #2
%4 = load i32, ptr %1, align 4, !tbaa !6
switch i32 %4, label %17 [
i32 130, label %5
i32 128, label %7
i32 129, label %9
]
5: ; preds = %2
%6 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str.1) #2
br label %17
7: ; preds = %2
%8 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str.2) #2
br label %17
9: ; preds = %2
%10 = tail call i32 (ptr, ...) @DPRINT1(ptr noundef nonnull @.str.3) #2
%11 = load ptr, ptr %0, align 8, !tbaa !12
%12 = icmp eq ptr %11, null
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = getelementptr inbounds i8, ptr %1, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = tail call i32 @KeReleaseInterruptSpinLock(ptr noundef nonnull %11, i32 noundef %15) #2
br label %17
17: ; preds = %9, %13, %2, %7, %5
ret i32 undef
}
declare i32 @DPRINT1(ptr noundef, ...) local_unnamed_addr #1
declare i32 @KeReleaseInterruptSpinLock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_6__", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_8__", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!7, !8, i64 4}
| reactos_drivers_storage_port_storport_extr_storport.c_PortReleaseSpinLock |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/touchscreen/extr_zylonite-wm97xx.c_wm97xx_acc_pen_down.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/input/touchscreen/extr_zylonite-wm97xx.c_wm97xx_acc_pen_down.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@WM97XX_ADCSEL_PRES = dso_local local_unnamed_addr global i32 0, align 4
@wm97xx_acc_pen_down.last = internal unnamed_addr global i32 0, align 4
@wm97xx_acc_pen_down.tries = internal unnamed_addr global i32 0, align 4
@RC_PENUP = dso_local local_unnamed_addr global i32 0, align 4
@MODR = dso_local local_unnamed_addr global i32 0, align 4
@RC_AGAIN = dso_local local_unnamed_addr global i32 0, align 4
@pressure = dso_local local_unnamed_addr global i64 0, align 8
@WM97XX_ADCSRC_MASK = dso_local local_unnamed_addr global i32 0, align 4
@WM97XX_ADCSEL_X = dso_local local_unnamed_addr global i32 0, align 4
@WM97XX_ADCSEL_Y = dso_local local_unnamed_addr global i32 0, align 4
@ABS_X = dso_local local_unnamed_addr global i32 0, align 4
@ABS_Y = dso_local local_unnamed_addr global i32 0, align 4
@ABS_PRESSURE = dso_local local_unnamed_addr global i32 0, align 4
@BTN_TOUCH = dso_local local_unnamed_addr global i32 0, align 4
@cinfo = dso_local local_unnamed_addr global ptr null, align 8
@sp_idx = dso_local local_unnamed_addr global i64 0, align 8
@RC_PENDOWN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wm97xx_acc_pen_down], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @wm97xx_acc_pen_down(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @WM97XX_ADCSEL_PRES, align 4, !tbaa !5
%3 = or i32 %2, 256
%4 = tail call i32 @msleep(i32 noundef 1) #2
%5 = load i32, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !5
%6 = icmp sgt i32 %5, 5
br i1 %6, label %7, label %9
7: ; preds = %1
store i32 0, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !5
%8 = load i32, ptr @RC_PENUP, align 4, !tbaa !5
br label %102
9: ; preds = %1
%10 = load i32, ptr @MODR, align 4
%11 = load i32, ptr @wm97xx_acc_pen_down.last, align 4, !tbaa !5
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = add nuw nsw i32 %5, 1
store i32 %14, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !5
%15 = load i32, ptr @RC_AGAIN, align 4, !tbaa !5
br label %102
16: ; preds = %9
store i32 %10, ptr @wm97xx_acc_pen_down.last, align 4, !tbaa !5
%17 = load i64, ptr @pressure, align 8, !tbaa !9
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 %3, i32 %10
%20 = load i32, ptr @WM97XX_ADCSRC_MASK, align 4, !tbaa !5
%21 = and i32 %20, %10
%22 = load i32, ptr @WM97XX_ADCSEL_X, align 4, !tbaa !5
%23 = icmp eq i32 %21, %22
%24 = load i32, ptr @WM97XX_ADCSEL_Y, align 4
%25 = icmp eq i32 %21, %24
%26 = select i1 %23, i1 %25, i1 false
br i1 %26, label %27, label %98
27: ; preds = %16
%28 = and i32 %19, %20
%29 = load i32, ptr @WM97XX_ADCSEL_PRES, align 4, !tbaa !5
%30 = icmp eq i32 %28, %29
br i1 %30, label %31, label %98
31: ; preds = %27
store i32 0, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !5
%32 = load i32, ptr %0, align 4, !tbaa !11
%33 = load i32, ptr @ABS_X, align 4, !tbaa !5
%34 = and i32 %10, 4095
%35 = tail call i32 @input_report_abs(i32 noundef %32, i32 noundef %33, i32 noundef %34) #2
%36 = load i32, ptr %0, align 4, !tbaa !11
%37 = load i32, ptr @ABS_Y, align 4, !tbaa !5
%38 = tail call i32 @input_report_abs(i32 noundef %36, i32 noundef %37, i32 noundef %34) #2
%39 = load i32, ptr %0, align 4, !tbaa !11
%40 = load i32, ptr @ABS_PRESSURE, align 4, !tbaa !5
%41 = and i32 %19, 4095
%42 = tail call i32 @input_report_abs(i32 noundef %39, i32 noundef %40, i32 noundef %41) #2
%43 = load i32, ptr %0, align 4, !tbaa !11
%44 = load i32, ptr @BTN_TOUCH, align 4, !tbaa !5
%45 = icmp ne i32 %19, 0
%46 = zext i1 %45 to i32
%47 = tail call i32 @input_report_key(i32 noundef %43, i32 noundef %44, i32 noundef %46) #2
%48 = load i32, ptr %0, align 4, !tbaa !11
%49 = tail call i32 @input_sync(i32 noundef %48) #2
%50 = load ptr, ptr @cinfo, align 8, !tbaa !13
%51 = load i64, ptr @sp_idx, align 8, !tbaa !9
%52 = getelementptr inbounds %struct.TYPE_2__, ptr %50, i64 %51
%53 = load i32, ptr %52, align 4, !tbaa !15
%54 = icmp sgt i32 %53, 1
br i1 %54, label %55, label %98
55: ; preds = %31, %73
%56 = phi i32 [ %61, %73 ], [ %19, %31 ]
%57 = phi i32 [ %92, %73 ], [ 1, %31 ]
%58 = load i32, ptr @MODR, align 4
%59 = load i64, ptr @pressure, align 8, !tbaa !9
%60 = icmp eq i64 %59, 0
%61 = select i1 %60, i32 %56, i32 %58
%62 = load i32, ptr @WM97XX_ADCSRC_MASK, align 4, !tbaa !5
%63 = and i32 %62, %58
%64 = load i32, ptr @WM97XX_ADCSEL_X, align 4, !tbaa !5
%65 = icmp eq i32 %63, %64
%66 = load i32, ptr @WM97XX_ADCSEL_Y, align 4
%67 = icmp eq i32 %63, %66
%68 = select i1 %65, i1 %67, i1 false
br i1 %68, label %69, label %98
69: ; preds = %55
%70 = and i32 %61, %62
%71 = load i32, ptr @WM97XX_ADCSEL_PRES, align 4, !tbaa !5
%72 = icmp eq i32 %70, %71
br i1 %72, label %73, label %98
73: ; preds = %69
store i32 0, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !5
%74 = load i32, ptr %0, align 4, !tbaa !11
%75 = load i32, ptr @ABS_X, align 4, !tbaa !5
%76 = and i32 %58, 4095
%77 = tail call i32 @input_report_abs(i32 noundef %74, i32 noundef %75, i32 noundef %76) #2
%78 = load i32, ptr %0, align 4, !tbaa !11
%79 = load i32, ptr @ABS_Y, align 4, !tbaa !5
%80 = tail call i32 @input_report_abs(i32 noundef %78, i32 noundef %79, i32 noundef %76) #2
%81 = load i32, ptr %0, align 4, !tbaa !11
%82 = load i32, ptr @ABS_PRESSURE, align 4, !tbaa !5
%83 = and i32 %61, 4095
%84 = tail call i32 @input_report_abs(i32 noundef %81, i32 noundef %82, i32 noundef %83) #2
%85 = load i32, ptr %0, align 4, !tbaa !11
%86 = load i32, ptr @BTN_TOUCH, align 4, !tbaa !5
%87 = icmp ne i32 %61, 0
%88 = zext i1 %87 to i32
%89 = tail call i32 @input_report_key(i32 noundef %85, i32 noundef %86, i32 noundef %88) #2
%90 = load i32, ptr %0, align 4, !tbaa !11
%91 = tail call i32 @input_sync(i32 noundef %90) #2
%92 = add nuw nsw i32 %57, 1
%93 = load ptr, ptr @cinfo, align 8, !tbaa !13
%94 = load i64, ptr @sp_idx, align 8, !tbaa !9
%95 = getelementptr inbounds %struct.TYPE_2__, ptr %93, i64 %94
%96 = load i32, ptr %95, align 4, !tbaa !15
%97 = icmp slt i32 %92, %96
br i1 %97, label %55, label %98, !llvm.loop !17
98: ; preds = %73, %55, %69, %31, %27, %16
%99 = load i32, ptr @RC_PENDOWN, align 4, !tbaa !5
%100 = load i32, ptr @RC_AGAIN, align 4, !tbaa !5
%101 = or i32 %100, %99
br label %102
102: ; preds = %98, %13, %7
%103 = phi i32 [ %8, %7 ], [ %15, %13 ], [ %101, %98 ]
ret i32 %103
}
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
declare i32 @input_report_abs(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_report_key(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_sync(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"wm97xx", !6, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!16, !6, i64 0}
!16 = !{!"TYPE_2__", !6, i64 0}
!17 = distinct !{!17, !18, !19}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!"llvm.loop.peeled.count", i32 1}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/touchscreen/extr_zylonite-wm97xx.c_wm97xx_acc_pen_down.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/input/touchscreen/extr_zylonite-wm97xx.c_wm97xx_acc_pen_down.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@WM97XX_ADCSEL_PRES = common local_unnamed_addr global i32 0, align 4
@wm97xx_acc_pen_down.last = internal unnamed_addr global i32 0, align 4
@wm97xx_acc_pen_down.tries = internal unnamed_addr global i32 0, align 4
@RC_PENUP = common local_unnamed_addr global i32 0, align 4
@MODR = common local_unnamed_addr global i32 0, align 4
@RC_AGAIN = common local_unnamed_addr global i32 0, align 4
@pressure = common local_unnamed_addr global i64 0, align 8
@WM97XX_ADCSRC_MASK = common local_unnamed_addr global i32 0, align 4
@WM97XX_ADCSEL_X = common local_unnamed_addr global i32 0, align 4
@WM97XX_ADCSEL_Y = common local_unnamed_addr global i32 0, align 4
@ABS_X = common local_unnamed_addr global i32 0, align 4
@ABS_Y = common local_unnamed_addr global i32 0, align 4
@ABS_PRESSURE = common local_unnamed_addr global i32 0, align 4
@BTN_TOUCH = common local_unnamed_addr global i32 0, align 4
@cinfo = common local_unnamed_addr global ptr null, align 8
@sp_idx = common local_unnamed_addr global i64 0, align 8
@RC_PENDOWN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wm97xx_acc_pen_down], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @wm97xx_acc_pen_down(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @WM97XX_ADCSEL_PRES, align 4, !tbaa !6
%3 = or i32 %2, 256
%4 = tail call i32 @msleep(i32 noundef 1) #2
%5 = load i32, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !6
%6 = icmp sgt i32 %5, 5
br i1 %6, label %7, label %9
7: ; preds = %1
store i32 0, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !6
%8 = load i32, ptr @RC_PENUP, align 4, !tbaa !6
br label %102
9: ; preds = %1
%10 = load i32, ptr @MODR, align 4
%11 = load i32, ptr @wm97xx_acc_pen_down.last, align 4, !tbaa !6
%12 = icmp eq i32 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = add nuw nsw i32 %5, 1
store i32 %14, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !6
%15 = load i32, ptr @RC_AGAIN, align 4, !tbaa !6
br label %102
16: ; preds = %9
store i32 %10, ptr @wm97xx_acc_pen_down.last, align 4, !tbaa !6
%17 = load i64, ptr @pressure, align 8, !tbaa !10
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 %3, i32 %10
%20 = load i32, ptr @WM97XX_ADCSRC_MASK, align 4, !tbaa !6
%21 = and i32 %20, %10
%22 = load i32, ptr @WM97XX_ADCSEL_X, align 4, !tbaa !6
%23 = icmp eq i32 %21, %22
%24 = load i32, ptr @WM97XX_ADCSEL_Y, align 4
%25 = icmp eq i32 %21, %24
%26 = select i1 %23, i1 %25, i1 false
br i1 %26, label %27, label %98
27: ; preds = %16
%28 = and i32 %19, %20
%29 = load i32, ptr @WM97XX_ADCSEL_PRES, align 4, !tbaa !6
%30 = icmp eq i32 %28, %29
br i1 %30, label %31, label %98
31: ; preds = %27
store i32 0, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !6
%32 = load i32, ptr %0, align 4, !tbaa !12
%33 = load i32, ptr @ABS_X, align 4, !tbaa !6
%34 = and i32 %10, 4095
%35 = tail call i32 @input_report_abs(i32 noundef %32, i32 noundef %33, i32 noundef %34) #2
%36 = load i32, ptr %0, align 4, !tbaa !12
%37 = load i32, ptr @ABS_Y, align 4, !tbaa !6
%38 = tail call i32 @input_report_abs(i32 noundef %36, i32 noundef %37, i32 noundef %34) #2
%39 = load i32, ptr %0, align 4, !tbaa !12
%40 = load i32, ptr @ABS_PRESSURE, align 4, !tbaa !6
%41 = and i32 %19, 4095
%42 = tail call i32 @input_report_abs(i32 noundef %39, i32 noundef %40, i32 noundef %41) #2
%43 = load i32, ptr %0, align 4, !tbaa !12
%44 = load i32, ptr @BTN_TOUCH, align 4, !tbaa !6
%45 = icmp ne i32 %19, 0
%46 = zext i1 %45 to i32
%47 = tail call i32 @input_report_key(i32 noundef %43, i32 noundef %44, i32 noundef %46) #2
%48 = load i32, ptr %0, align 4, !tbaa !12
%49 = tail call i32 @input_sync(i32 noundef %48) #2
%50 = load ptr, ptr @cinfo, align 8, !tbaa !14
%51 = load i64, ptr @sp_idx, align 8, !tbaa !10
%52 = getelementptr inbounds %struct.TYPE_2__, ptr %50, i64 %51
%53 = load i32, ptr %52, align 4, !tbaa !16
%54 = icmp sgt i32 %53, 1
br i1 %54, label %55, label %98
55: ; preds = %31, %73
%56 = phi i32 [ %61, %73 ], [ %19, %31 ]
%57 = phi i32 [ %92, %73 ], [ 1, %31 ]
%58 = load i32, ptr @MODR, align 4
%59 = load i64, ptr @pressure, align 8, !tbaa !10
%60 = icmp eq i64 %59, 0
%61 = select i1 %60, i32 %56, i32 %58
%62 = load i32, ptr @WM97XX_ADCSRC_MASK, align 4, !tbaa !6
%63 = and i32 %62, %58
%64 = load i32, ptr @WM97XX_ADCSEL_X, align 4, !tbaa !6
%65 = icmp eq i32 %63, %64
%66 = load i32, ptr @WM97XX_ADCSEL_Y, align 4
%67 = icmp eq i32 %63, %66
%68 = select i1 %65, i1 %67, i1 false
br i1 %68, label %69, label %98
69: ; preds = %55
%70 = and i32 %61, %62
%71 = load i32, ptr @WM97XX_ADCSEL_PRES, align 4, !tbaa !6
%72 = icmp eq i32 %70, %71
br i1 %72, label %73, label %98
73: ; preds = %69
store i32 0, ptr @wm97xx_acc_pen_down.tries, align 4, !tbaa !6
%74 = load i32, ptr %0, align 4, !tbaa !12
%75 = load i32, ptr @ABS_X, align 4, !tbaa !6
%76 = and i32 %58, 4095
%77 = tail call i32 @input_report_abs(i32 noundef %74, i32 noundef %75, i32 noundef %76) #2
%78 = load i32, ptr %0, align 4, !tbaa !12
%79 = load i32, ptr @ABS_Y, align 4, !tbaa !6
%80 = tail call i32 @input_report_abs(i32 noundef %78, i32 noundef %79, i32 noundef %76) #2
%81 = load i32, ptr %0, align 4, !tbaa !12
%82 = load i32, ptr @ABS_PRESSURE, align 4, !tbaa !6
%83 = and i32 %61, 4095
%84 = tail call i32 @input_report_abs(i32 noundef %81, i32 noundef %82, i32 noundef %83) #2
%85 = load i32, ptr %0, align 4, !tbaa !12
%86 = load i32, ptr @BTN_TOUCH, align 4, !tbaa !6
%87 = icmp ne i32 %61, 0
%88 = zext i1 %87 to i32
%89 = tail call i32 @input_report_key(i32 noundef %85, i32 noundef %86, i32 noundef %88) #2
%90 = load i32, ptr %0, align 4, !tbaa !12
%91 = tail call i32 @input_sync(i32 noundef %90) #2
%92 = add nuw nsw i32 %57, 1
%93 = load ptr, ptr @cinfo, align 8, !tbaa !14
%94 = load i64, ptr @sp_idx, align 8, !tbaa !10
%95 = getelementptr inbounds %struct.TYPE_2__, ptr %93, i64 %94
%96 = load i32, ptr %95, align 4, !tbaa !16
%97 = icmp slt i32 %92, %96
br i1 %97, label %55, label %98, !llvm.loop !18
98: ; preds = %73, %55, %69, %31, %27, %16
%99 = load i32, ptr @RC_PENDOWN, align 4, !tbaa !6
%100 = load i32, ptr @RC_AGAIN, align 4, !tbaa !6
%101 = or i32 %100, %99
br label %102
102: ; preds = %98, %13, %7
%103 = phi i32 [ %8, %7 ], [ %15, %13 ], [ %101, %98 ]
ret i32 %103
}
declare i32 @msleep(i32 noundef) local_unnamed_addr #1
declare i32 @input_report_abs(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_report_key(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_sync(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"wm97xx", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"TYPE_2__", !7, i64 0}
!18 = distinct !{!18, !19, !20}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!"llvm.loop.peeled.count", i32 1}
| fastsocket_kernel_drivers_input_touchscreen_extr_zylonite-wm97xx.c_wm97xx_acc_pen_down |
; ModuleID = 'AnghaBench/linux/block/extr_blk-pm.c_blk_pre_runtime_suspend.c'
source_filename = "AnghaBench/linux/block/extr_blk-pm.c_blk_pre_runtime_suspend.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.request_queue = type { i64, i32, i32, i32 }
@RPM_ACTIVE = dso_local local_unnamed_addr global i64 0, align 8
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@RPM_SUSPENDING = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @blk_pre_runtime_suspend(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.request_queue, ptr %0, i64 0, i32 2
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = load i64, ptr %0, align 8, !tbaa !11
%7 = load i64, ptr @RPM_ACTIVE, align 8, !tbaa !12
%8 = icmp ne i64 %6, %7
%9 = zext i1 %8 to i32
%10 = tail call i32 @WARN_ON_ONCE(i32 noundef %9) #2
%11 = tail call i32 @blk_set_pm_only(ptr noundef nonnull %0) #2
%12 = load i32, ptr @EBUSY, align 4, !tbaa !13
%13 = sub nsw i32 0, %12
%14 = tail call i32 @blk_freeze_queue_start(ptr noundef nonnull %0) #2
%15 = getelementptr inbounds %struct.request_queue, ptr %0, i64 0, i32 3
%16 = tail call i32 @percpu_ref_switch_to_atomic_sync(ptr noundef nonnull %15) #2
%17 = tail call i64 @percpu_ref_is_zero(ptr noundef nonnull %15) #2
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 %13, i32 0
%20 = tail call i32 @blk_mq_unfreeze_queue(ptr noundef nonnull %0) #2
%21 = getelementptr inbounds %struct.request_queue, ptr %0, i64 0, i32 1
%22 = tail call i32 @spin_lock_irq(ptr noundef nonnull %21) #2
%23 = icmp slt i32 %19, 0
br i1 %23, label %24, label %28
24: ; preds = %5
%25 = load i32, ptr %2, align 4, !tbaa !5
%26 = tail call i32 @pm_runtime_mark_last_busy(i32 noundef %25) #2
%27 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %21) #2
br label %32
28: ; preds = %5
%29 = load i64, ptr @RPM_SUSPENDING, align 8, !tbaa !12
store i64 %29, ptr %0, align 8, !tbaa !11
%30 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %21) #2
%31 = icmp eq i32 %19, 0
br i1 %31, label %34, label %32
32: ; preds = %24, %28
%33 = tail call i32 @blk_clear_pm_only(ptr noundef nonnull %0) #2
br label %34
34: ; preds = %28, %32, %1
%35 = phi i32 [ 0, %1 ], [ %13, %32 ], [ 0, %28 ]
ret i32 %35
}
declare i32 @WARN_ON_ONCE(i32 noundef) local_unnamed_addr #1
declare i32 @blk_set_pm_only(ptr noundef) local_unnamed_addr #1
declare i32 @blk_freeze_queue_start(ptr noundef) local_unnamed_addr #1
declare i32 @percpu_ref_switch_to_atomic_sync(ptr noundef) local_unnamed_addr #1
declare i64 @percpu_ref_is_zero(ptr noundef) local_unnamed_addr #1
declare i32 @blk_mq_unfreeze_queue(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_mark_last_busy(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @blk_clear_pm_only(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 12}
!6 = !{!"request_queue", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/block/extr_blk-pm.c_blk_pre_runtime_suspend.c'
source_filename = "AnghaBench/linux/block/extr_blk-pm.c_blk_pre_runtime_suspend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RPM_ACTIVE = common local_unnamed_addr global i64 0, align 8
@EBUSY = common local_unnamed_addr global i32 0, align 4
@RPM_SUSPENDING = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @blk_pre_runtime_suspend(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 12
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %34, label %5
5: ; preds = %1
%6 = load i64, ptr %0, align 8, !tbaa !12
%7 = load i64, ptr @RPM_ACTIVE, align 8, !tbaa !13
%8 = icmp ne i64 %6, %7
%9 = zext i1 %8 to i32
%10 = tail call i32 @WARN_ON_ONCE(i32 noundef %9) #2
%11 = tail call i32 @blk_set_pm_only(ptr noundef nonnull %0) #2
%12 = load i32, ptr @EBUSY, align 4, !tbaa !14
%13 = sub nsw i32 0, %12
%14 = tail call i32 @blk_freeze_queue_start(ptr noundef nonnull %0) #2
%15 = getelementptr inbounds i8, ptr %0, i64 16
%16 = tail call i32 @percpu_ref_switch_to_atomic_sync(ptr noundef nonnull %15) #2
%17 = tail call i64 @percpu_ref_is_zero(ptr noundef nonnull %15) #2
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 %13, i32 0
%20 = tail call i32 @blk_mq_unfreeze_queue(ptr noundef nonnull %0) #2
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = tail call i32 @spin_lock_irq(ptr noundef nonnull %21) #2
%23 = icmp slt i32 %19, 0
br i1 %23, label %24, label %28
24: ; preds = %5
%25 = load i32, ptr %2, align 4, !tbaa !6
%26 = tail call i32 @pm_runtime_mark_last_busy(i32 noundef %25) #2
%27 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %21) #2
br label %32
28: ; preds = %5
%29 = load i64, ptr @RPM_SUSPENDING, align 8, !tbaa !13
store i64 %29, ptr %0, align 8, !tbaa !12
%30 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %21) #2
%31 = icmp eq i32 %19, 0
br i1 %31, label %34, label %32
32: ; preds = %24, %28
%33 = tail call i32 @blk_clear_pm_only(ptr noundef nonnull %0) #2
br label %34
34: ; preds = %28, %32, %1
%35 = phi i32 [ 0, %1 ], [ %13, %32 ], [ 0, %28 ]
ret i32 %35
}
declare i32 @WARN_ON_ONCE(i32 noundef) local_unnamed_addr #1
declare i32 @blk_set_pm_only(ptr noundef) local_unnamed_addr #1
declare i32 @blk_freeze_queue_start(ptr noundef) local_unnamed_addr #1
declare i32 @percpu_ref_switch_to_atomic_sync(ptr noundef) local_unnamed_addr #1
declare i64 @percpu_ref_is_zero(ptr noundef) local_unnamed_addr #1
declare i32 @blk_mq_unfreeze_queue(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @pm_runtime_mark_last_busy(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @blk_clear_pm_only(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 12}
!7 = !{!"request_queue", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!11, !11, i64 0}
| linux_block_extr_blk-pm.c_blk_pre_runtime_suspend |
; ModuleID = 'AnghaBench/sumatrapdf/ext/libwebp/src/mux/extr_muxinternal.c_MuxImageInit.c'
source_filename = "AnghaBench/sumatrapdf/ext/libwebp/src/mux/extr_muxinternal.c_MuxImageInit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @MuxImageInit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @assert(ptr noundef %0) #2
%3 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
ret void
}
declare i32 @assert(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/libwebp/src/mux/extr_muxinternal.c_MuxImageInit.c'
source_filename = "AnghaBench/sumatrapdf/ext/libwebp/src/mux/extr_muxinternal.c_MuxImageInit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @MuxImageInit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @assert(ptr noundef %0) #2
%3 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
ret void
}
declare i32 @assert(ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| sumatrapdf_ext_libwebp_src_mux_extr_muxinternal.c_MuxImageInit |
; ModuleID = 'AnghaBench/git/builtin/extr_merge.c_write_tree_trivial.c'
source_filename = "AnghaBench/git/builtin/extr_merge.c_write_tree_trivial.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [38 x i8] c"git write-tree failed to write a tree\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @write_tree_trivial], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @write_tree_trivial(ptr noundef %0) #0 {
%2 = tail call i64 @write_cache_as_tree(ptr noundef %0, i32 noundef 0, ptr noundef null) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @_(ptr noundef nonnull @.str) #2
%6 = tail call i32 @die(i32 noundef %5) #2
br label %7
7: ; preds = %4, %1
ret void
}
declare i64 @write_cache_as_tree(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @die(i32 noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/git/builtin/extr_merge.c_write_tree_trivial.c'
source_filename = "AnghaBench/git/builtin/extr_merge.c_write_tree_trivial.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [38 x i8] c"git write-tree failed to write a tree\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @write_tree_trivial], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @write_tree_trivial(ptr noundef %0) #0 {
%2 = tail call i64 @write_cache_as_tree(ptr noundef %0, i32 noundef 0, ptr noundef null) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @_(ptr noundef nonnull @.str) #2
%6 = tail call i32 @die(i32 noundef %5) #2
br label %7
7: ; preds = %4, %1
ret void
}
declare i64 @write_cache_as_tree(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @die(i32 noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| git_builtin_extr_merge.c_write_tree_trivial |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/apps/extr_s_client.c_ocsp_resp_cb.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/apps/extr_s_client.c_ocsp_resp_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [16 x i8] c"OCSP response: \00", align 1
@.str.1 = private unnamed_addr constant [18 x i8] c"no response sent\0A\00", align 1
@.str.2 = private unnamed_addr constant [22 x i8] c"response parse error\0A\00", align 1
@.str.3 = private unnamed_addr constant [41 x i8] c"\0A======================================\0A\00", align 1
@.str.4 = private unnamed_addr constant [40 x i8] c"======================================\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ocsp_resp_cb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ocsp_resp_cb(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = call i32 @SSL_get_tlsext_status_ocsp_resp(ptr noundef %0, ptr noundef nonnull %3) #3
%5 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str) #3
%6 = load ptr, ptr %3, align 8, !tbaa !5
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.1) #3
br label %22
10: ; preds = %2
%11 = call ptr @d2i_OCSP_RESPONSE(ptr noundef null, ptr noundef nonnull %3, i32 noundef %4) #3
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.2) #3
%15 = load ptr, ptr %3, align 8, !tbaa !5
%16 = call i32 @BIO_dump_indent(ptr noundef %1, ptr noundef %15, i32 noundef %4, i32 noundef 4) #3
br label %22
17: ; preds = %10
%18 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.3) #3
%19 = call i32 @OCSP_RESPONSE_print(ptr noundef %1, ptr noundef nonnull %11, i32 noundef 0) #3
%20 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.4) #3
%21 = call i32 @OCSP_RESPONSE_free(ptr noundef nonnull %11) #3
br label %22
22: ; preds = %17, %13, %8
%23 = phi i32 [ 1, %8 ], [ 0, %13 ], [ 1, %17 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SSL_get_tlsext_status_ocsp_resp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BIO_puts(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @d2i_OCSP_RESPONSE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIO_dump_indent(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OCSP_RESPONSE_print(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OCSP_RESPONSE_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/apps/extr_s_client.c_ocsp_resp_cb.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/apps/extr_s_client.c_ocsp_resp_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [16 x i8] c"OCSP response: \00", align 1
@.str.1 = private unnamed_addr constant [18 x i8] c"no response sent\0A\00", align 1
@.str.2 = private unnamed_addr constant [22 x i8] c"response parse error\0A\00", align 1
@.str.3 = private unnamed_addr constant [41 x i8] c"\0A======================================\0A\00", align 1
@.str.4 = private unnamed_addr constant [40 x i8] c"======================================\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ocsp_resp_cb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @ocsp_resp_cb(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = call i32 @SSL_get_tlsext_status_ocsp_resp(ptr noundef %0, ptr noundef nonnull %3) #3
%5 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str) #3
%6 = load ptr, ptr %3, align 8, !tbaa !6
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.1) #3
br label %22
10: ; preds = %2
%11 = call ptr @d2i_OCSP_RESPONSE(ptr noundef null, ptr noundef nonnull %3, i32 noundef %4) #3
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.2) #3
%15 = load ptr, ptr %3, align 8, !tbaa !6
%16 = call i32 @BIO_dump_indent(ptr noundef %1, ptr noundef %15, i32 noundef %4, i32 noundef 4) #3
br label %22
17: ; preds = %10
%18 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.3) #3
%19 = call i32 @OCSP_RESPONSE_print(ptr noundef %1, ptr noundef nonnull %11, i32 noundef 0) #3
%20 = call i32 @BIO_puts(ptr noundef %1, ptr noundef nonnull @.str.4) #3
%21 = call i32 @OCSP_RESPONSE_free(ptr noundef nonnull %11) #3
br label %22
22: ; preds = %17, %13, %8
%23 = phi i32 [ 1, %8 ], [ 0, %13 ], [ 1, %17 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SSL_get_tlsext_status_ocsp_resp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BIO_puts(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @d2i_OCSP_RESPONSE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIO_dump_indent(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OCSP_RESPONSE_print(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OCSP_RESPONSE_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_openssl_apps_extr_s_client.c_ocsp_resp_cb |
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_ac3enc_fixed.c_clip_coefficients.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_ac3enc_fixed.c_clip_coefficients.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@COEF_MIN = dso_local local_unnamed_addr global i32 0, align 4
@COEF_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @clip_coefficients], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @clip_coefficients(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr @COEF_MIN, align 4, !tbaa !10
%6 = load i32, ptr @COEF_MAX, align 4, !tbaa !10
%7 = tail call i32 %4(ptr noundef %1, ptr noundef %1, i32 noundef %5, i32 noundef %6, i32 noundef %2) #1
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_ac3enc_fixed.c_clip_coefficients.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_ac3enc_fixed.c_clip_coefficients.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@COEF_MIN = common local_unnamed_addr global i32 0, align 4
@COEF_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @clip_coefficients], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @clip_coefficients(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr @COEF_MIN, align 4, !tbaa !11
%6 = load i32, ptr @COEF_MAX, align 4, !tbaa !11
%7 = tail call i32 %4(ptr noundef %1, ptr noundef %1, i32 noundef %5, i32 noundef %6, i32 noundef %2) #1
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| FFmpeg_libavcodec_extr_ac3enc_fixed.c_clip_coefficients |
; ModuleID = 'AnghaBench/linux/drivers/net/wan/extr_sealevel.c_sealevel_queue_xmit.c'
source_filename = "AnghaBench/linux/drivers/net/wan/extr_sealevel.c_sealevel_queue_xmit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sealevel_queue_xmit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @sealevel_queue_xmit(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @dev_to_chan(ptr noundef %1) #2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i32 @z8530_queue_xmit(i32 noundef %4, ptr noundef %0) #2
ret i32 %5
}
declare i32 @z8530_queue_xmit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_to_chan(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wan/extr_sealevel.c_sealevel_queue_xmit.c'
source_filename = "AnghaBench/linux/drivers/net/wan/extr_sealevel.c_sealevel_queue_xmit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sealevel_queue_xmit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @sealevel_queue_xmit(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @dev_to_chan(ptr noundef %1) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i32 @z8530_queue_xmit(i32 noundef %4, ptr noundef %0) #2
ret i32 %5
}
declare i32 @z8530_queue_xmit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @dev_to_chan(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_wan_extr_sealevel.c_sealevel_queue_xmit |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_i386gnu-nat.c_store_fpregs.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_i386gnu-nat.c_store_fpregs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i386_float_state = type { i32 }
@i386_FLOAT_STATE_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@i386_FLOAT_STATE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"Couldn't fetch floating-point state from %s\00", align 1
@.str.1 = private unnamed_addr constant [44 x i8] c"Couldn't store floating-point state into %s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @store_fpregs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @store_fpregs(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca %struct.i386_float_state, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = load i32, ptr @i386_FLOAT_STATE_COUNT, align 4, !tbaa !5
store i32 %5, ptr %3, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%6 = load i32, ptr %0, align 4, !tbaa !9
%7 = load i32, ptr @i386_FLOAT_STATE, align 4, !tbaa !5
%8 = ptrtoint ptr %4 to i64
%9 = trunc i64 %8 to i32
%10 = call i64 @thread_get_state(i32 noundef %6, i32 noundef %7, i32 noundef %9, ptr noundef nonnull %3) #3
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %2
%13 = load i32, ptr %4, align 4, !tbaa !11
%14 = call i32 @i387_fill_fsave(i32 noundef %13, i32 noundef %1) #3
%15 = load i32, ptr %0, align 4, !tbaa !9
%16 = load i32, ptr @i386_FLOAT_STATE, align 4, !tbaa !5
%17 = load i32, ptr @i386_FLOAT_STATE_COUNT, align 4, !tbaa !5
%18 = call i64 @thread_set_state(i32 noundef %15, i32 noundef %16, i32 noundef %9, i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %12, %2
%21 = phi ptr [ @.str, %2 ], [ @.str.1, %12 ]
%22 = call i32 @proc_string(ptr noundef nonnull %0) #3
%23 = call i32 @warning(ptr noundef nonnull %21, i32 noundef %22) #3
br label %24
24: ; preds = %20, %12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @thread_get_state(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @warning(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @proc_string(ptr noundef) local_unnamed_addr #2
declare i32 @i387_fill_fsave(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @thread_set_state(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"proc", !6, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"i386_float_state", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_i386gnu-nat.c_store_fpregs.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_i386gnu-nat.c_store_fpregs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.i386_float_state = type { i32 }
@i386_FLOAT_STATE_COUNT = common local_unnamed_addr global i32 0, align 4
@i386_FLOAT_STATE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"Couldn't fetch floating-point state from %s\00", align 1
@.str.1 = private unnamed_addr constant [44 x i8] c"Couldn't store floating-point state into %s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @store_fpregs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @store_fpregs(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca %struct.i386_float_state, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = load i32, ptr @i386_FLOAT_STATE_COUNT, align 4, !tbaa !6
store i32 %5, ptr %3, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%6 = load i32, ptr %0, align 4, !tbaa !10
%7 = load i32, ptr @i386_FLOAT_STATE, align 4, !tbaa !6
%8 = ptrtoint ptr %4 to i64
%9 = trunc i64 %8 to i32
%10 = call i64 @thread_get_state(i32 noundef %6, i32 noundef %7, i32 noundef %9, ptr noundef nonnull %3) #3
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %2
%13 = load i32, ptr %4, align 4, !tbaa !12
%14 = call i32 @i387_fill_fsave(i32 noundef %13, i32 noundef %1) #3
%15 = load i32, ptr %0, align 4, !tbaa !10
%16 = load i32, ptr @i386_FLOAT_STATE, align 4, !tbaa !6
%17 = load i32, ptr @i386_FLOAT_STATE_COUNT, align 4, !tbaa !6
%18 = call i64 @thread_set_state(i32 noundef %15, i32 noundef %16, i32 noundef %9, i32 noundef %17) #3
%19 = icmp eq i64 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %12, %2
%21 = phi ptr [ @.str, %2 ], [ @.str.1, %12 ]
%22 = call i32 @proc_string(ptr noundef nonnull %0) #3
%23 = call i32 @warning(ptr noundef nonnull %21, i32 noundef %22) #3
br label %24
24: ; preds = %20, %12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @thread_get_state(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @warning(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @proc_string(ptr noundef) local_unnamed_addr #2
declare i32 @i387_fill_fsave(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @thread_set_state(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"proc", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"i386_float_state", !7, i64 0}
| freebsd_contrib_gdb_gdb_extr_i386gnu-nat.c_store_fpregs |
; ModuleID = 'AnghaBench/freebsd/lib/libusb/extr_libusb20.c_libusb20_tr_setup_control.c'
source_filename = "AnghaBench/freebsd/lib/libusb/extr_libusb20.c_libusb20_tr_setup_control.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.libusb20_transfer = type { ptr, i32, ptr, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @libusb20_tr_setup_control(ptr nocapture noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @libusb20_pass_ptr(ptr noundef %1) #2
%6 = getelementptr inbounds %struct.libusb20_transfer, ptr %0, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !5
store ptr %5, ptr %7, align 8, !tbaa !11
%8 = load ptr, ptr %0, align 8, !tbaa !12
store i32 8, ptr %8, align 4, !tbaa !13
%9 = getelementptr inbounds %struct.libusb20_transfer, ptr %0, i64 0, i32 3
store i32 %3, ptr %9, align 8, !tbaa !14
%10 = getelementptr inbounds i32, ptr %1, i64 6
%11 = load i32, ptr %10, align 4, !tbaa !13
%12 = getelementptr inbounds i32, ptr %1, i64 7
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = shl i32 %13, 8
%15 = or i32 %14, %11
%16 = icmp eq i32 %15, 0
%17 = getelementptr inbounds %struct.libusb20_transfer, ptr %0, i64 0, i32 1
br i1 %16, label %24, label %18
18: ; preds = %4
store i32 2, ptr %17, align 8, !tbaa !15
%19 = tail call ptr @libusb20_pass_ptr(ptr noundef %2) #2
%20 = load ptr, ptr %6, align 8, !tbaa !5
%21 = getelementptr inbounds ptr, ptr %20, i64 1
store ptr %19, ptr %21, align 8, !tbaa !11
%22 = load ptr, ptr %0, align 8, !tbaa !12
%23 = getelementptr inbounds i32, ptr %22, i64 1
store i32 %15, ptr %23, align 4, !tbaa !13
br label %25
24: ; preds = %4
store i32 1, ptr %17, align 8, !tbaa !15
br label %25
25: ; preds = %24, %18
ret void
}
declare ptr @libusb20_pass_ptr(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"libusb20_transfer", !7, i64 0, !10, i64 8, !7, i64 16, !10, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!10, !10, i64 0}
!14 = !{!6, !10, i64 24}
!15 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/lib/libusb/extr_libusb20.c_libusb20_tr_setup_control.c'
source_filename = "AnghaBench/freebsd/lib/libusb/extr_libusb20.c_libusb20_tr_setup_control.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @libusb20_tr_setup_control(ptr nocapture noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = tail call ptr @libusb20_pass_ptr(ptr noundef %1) #2
%6 = getelementptr inbounds i8, ptr %0, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !6
store ptr %5, ptr %7, align 8, !tbaa !12
%8 = load ptr, ptr %0, align 8, !tbaa !13
store i32 8, ptr %8, align 4, !tbaa !14
%9 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %3, ptr %9, align 8, !tbaa !15
%10 = getelementptr inbounds i8, ptr %1, i64 24
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = getelementptr inbounds i8, ptr %1, i64 28
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = shl i32 %13, 8
%15 = or i32 %14, %11
%16 = icmp eq i32 %15, 0
%17 = getelementptr inbounds i8, ptr %0, i64 8
br i1 %16, label %24, label %18
18: ; preds = %4
store i32 2, ptr %17, align 8, !tbaa !16
%19 = tail call ptr @libusb20_pass_ptr(ptr noundef %2) #2
%20 = load ptr, ptr %6, align 8, !tbaa !6
%21 = getelementptr inbounds i8, ptr %20, i64 8
store ptr %19, ptr %21, align 8, !tbaa !12
%22 = load ptr, ptr %0, align 8, !tbaa !13
%23 = getelementptr inbounds i8, ptr %22, i64 4
store i32 %15, ptr %23, align 4, !tbaa !14
br label %25
24: ; preds = %4
store i32 1, ptr %17, align 8, !tbaa !16
br label %25
25: ; preds = %24, %18
ret void
}
declare ptr @libusb20_pass_ptr(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"libusb20_transfer", !8, i64 0, !11, i64 8, !8, i64 16, !11, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !11, i64 24}
!16 = !{!7, !11, i64 8}
| freebsd_lib_libusb_extr_libusb20.c_libusb20_tr_setup_control |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_dmtimer.c_omap_dm_timer_set_source.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_dmtimer.c_omap_dm_timer_set_source.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@dm_source_clocks = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @omap_dm_timer_set_source(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp ugt i32 %1, 2
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, ptr @EINVAL, align 4, !tbaa !5
%6 = sub nsw i32 0, %5
br label %19
7: ; preds = %2
%8 = load i32, ptr %0, align 4, !tbaa !9
%9 = tail call i32 @clk_disable(i32 noundef %8) #2
%10 = load i32, ptr %0, align 4, !tbaa !9
%11 = load ptr, ptr @dm_source_clocks, align 8, !tbaa !11
%12 = zext nneg i32 %1 to i64
%13 = getelementptr inbounds i32, ptr %11, i64 %12
%14 = load i32, ptr %13, align 4, !tbaa !5
%15 = tail call i32 @clk_set_parent(i32 noundef %10, i32 noundef %14) #2
%16 = load i32, ptr %0, align 4, !tbaa !9
%17 = tail call i32 @clk_enable(i32 noundef %16) #2
%18 = tail call i32 @__delay(i32 noundef 150000) #2
br label %19
19: ; preds = %7, %4
%20 = phi i32 [ %6, %4 ], [ %15, %7 ]
ret i32 %20
}
declare i32 @clk_disable(i32 noundef) local_unnamed_addr #1
declare i32 @clk_set_parent(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clk_enable(i32 noundef) local_unnamed_addr #1
declare i32 @__delay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"omap_dm_timer", !6, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_dmtimer.c_omap_dm_timer_set_source.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/plat-omap/extr_dmtimer.c_omap_dm_timer_set_source.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@dm_source_clocks = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @omap_dm_timer_set_source(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp ugt i32 %1, 2
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = load i32, ptr @EINVAL, align 4, !tbaa !6
%6 = sub nsw i32 0, %5
br label %19
7: ; preds = %2
%8 = load i32, ptr %0, align 4, !tbaa !10
%9 = tail call i32 @clk_disable(i32 noundef %8) #2
%10 = load i32, ptr %0, align 4, !tbaa !10
%11 = load ptr, ptr @dm_source_clocks, align 8, !tbaa !12
%12 = zext nneg i32 %1 to i64
%13 = getelementptr inbounds i32, ptr %11, i64 %12
%14 = load i32, ptr %13, align 4, !tbaa !6
%15 = tail call i32 @clk_set_parent(i32 noundef %10, i32 noundef %14) #2
%16 = load i32, ptr %0, align 4, !tbaa !10
%17 = tail call i32 @clk_enable(i32 noundef %16) #2
%18 = tail call i32 @__delay(i32 noundef 150000) #2
br label %19
19: ; preds = %7, %4
%20 = phi i32 [ %6, %4 ], [ %15, %7 ]
ret i32 %20
}
declare i32 @clk_disable(i32 noundef) local_unnamed_addr #1
declare i32 @clk_set_parent(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clk_enable(i32 noundef) local_unnamed_addr #1
declare i32 @__delay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"omap_dm_timer", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
| fastsocket_kernel_arch_arm_plat-omap_extr_dmtimer.c_omap_dm_timer_set_source |
; ModuleID = 'AnghaBench/micropython/drivers/cc3000/src/extr_wlan.c_wlan_stop.c'
source_filename = "AnghaBench/micropython/drivers/cc3000/src/extr_wlan.c_wlan_stop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr, i64, ptr }
@tSLInformation = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@WLAN_DISABLE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @wlan_stop() local_unnamed_addr #0 {
%1 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @tSLInformation, i64 0, i32 2), align 8, !tbaa !5
%2 = load i32, ptr @WLAN_DISABLE, align 4, !tbaa !11
%3 = tail call i32 %1(i32 noundef %2) #2
br label %4
4: ; preds = %4, %0
%5 = load ptr, ptr @tSLInformation, align 8, !tbaa !13
%6 = tail call i64 (...) %5() #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %4, label %8, !llvm.loop !14
8: ; preds = %4
%9 = load i64, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @tSLInformation, i64 0, i32 1), align 8, !tbaa !16
%10 = icmp eq i64 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %8
store i64 0, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @tSLInformation, i64 0, i32 1), align 8, !tbaa !16
br label %12
12: ; preds = %11, %8
%13 = tail call i32 (...) @SpiClose() #2
ret void
}
declare i32 @SpiClose(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"TYPE_2__", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/micropython/drivers/cc3000/src/extr_wlan.c_wlan_stop.c'
source_filename = "AnghaBench/micropython/drivers/cc3000/src/extr_wlan.c_wlan_stop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr, i64, ptr }
@tSLInformation = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@WLAN_DISABLE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @wlan_stop() local_unnamed_addr #0 {
%1 = load ptr, ptr getelementptr inbounds (i8, ptr @tSLInformation, i64 16), align 8, !tbaa !6
%2 = load i32, ptr @WLAN_DISABLE, align 4, !tbaa !12
%3 = tail call i32 %1(i32 noundef %2) #2
br label %4
4: ; preds = %4, %0
%5 = load ptr, ptr @tSLInformation, align 8, !tbaa !14
%6 = tail call i64 %5() #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %4, label %8, !llvm.loop !15
8: ; preds = %4
%9 = load i64, ptr getelementptr inbounds (i8, ptr @tSLInformation, i64 8), align 8, !tbaa !17
%10 = icmp eq i64 %9, 0
br i1 %10, label %12, label %11
11: ; preds = %8
store i64 0, ptr getelementptr inbounds (i8, ptr @tSLInformation, i64 8), align 8, !tbaa !17
br label %12
12: ; preds = %11, %8
%13 = tail call i32 @SpiClose() #2
ret void
}
declare i32 @SpiClose(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!7, !11, i64 8}
| micropython_drivers_cc3000_src_extr_wlan.c_wlan_stop |
; ModuleID = 'AnghaBench/sqlcipher/ext/lsm1/lsm-test/extr_lsmtest3.c_testCksumArrayGet.c'
source_filename = "AnghaBench/sqlcipher/ext/lsm1/lsm-test/extr_lsmtest3.c_testCksumArrayGet.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32, ptr }
; Function Attrs: nounwind uwtable
define dso_local ptr @testCksumArrayGet(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 8, !tbaa !5
%4 = icmp sle i32 %3, %1
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 noundef %5) #2
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = icmp sge i32 %8, %1
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 noundef %10) #2
%12 = load i32, ptr %0, align 8, !tbaa !5
%13 = sub nsw i32 %1, %12
%14 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%15 = load i32, ptr %14, align 8, !tbaa !12
%16 = srem i32 %13, %15
%17 = icmp eq i32 %16, 0
%18 = zext i1 %17 to i32
%19 = tail call i32 @assert(i32 noundef %18) #2
%20 = load i32, ptr %0, align 8, !tbaa !5
%21 = sub nsw i32 %1, %20
%22 = load i32, ptr %14, align 8, !tbaa !12
%23 = sdiv i32 %21, %22
%24 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%25 = load ptr, ptr %24, align 8, !tbaa !13
%26 = sext i32 %23 to i64
%27 = getelementptr inbounds ptr, ptr %25, i64 %26
%28 = load ptr, ptr %27, align 8, !tbaa !14
ret ptr %28
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !10, i64 16}
!14 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/sqlcipher/ext/lsm1/lsm-test/extr_lsmtest3.c_testCksumArrayGet.c'
source_filename = "AnghaBench/sqlcipher/ext/lsm1/lsm-test/extr_lsmtest3.c_testCksumArrayGet.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @testCksumArrayGet(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 8, !tbaa !6
%4 = icmp sle i32 %3, %1
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = icmp sge i32 %8, %1
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 noundef %10) #2
%12 = load i32, ptr %0, align 8, !tbaa !6
%13 = sub nsw i32 %1, %12
%14 = getelementptr inbounds i8, ptr %0, i64 8
%15 = load i32, ptr %14, align 8, !tbaa !13
%16 = srem i32 %13, %15
%17 = icmp eq i32 %16, 0
%18 = zext i1 %17 to i32
%19 = tail call i32 @assert(i32 noundef %18) #2
%20 = load i32, ptr %0, align 8, !tbaa !6
%21 = sub nsw i32 %1, %20
%22 = load i32, ptr %14, align 8, !tbaa !13
%23 = sdiv i32 %21, %22
%24 = getelementptr inbounds i8, ptr %0, i64 16
%25 = load ptr, ptr %24, align 8, !tbaa !14
%26 = sext i32 %23 to i64
%27 = getelementptr inbounds ptr, ptr %25, i64 %26
%28 = load ptr, ptr %27, align 8, !tbaa !15
ret ptr %28
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !11, i64 16}
!15 = !{!11, !11, i64 0}
| sqlcipher_ext_lsm1_lsm-test_extr_lsmtest3.c_testCksumArrayGet |
; ModuleID = 'AnghaBench/linux/arch/mips/cavium-octeon/executive/extr_cvmx-l2c.c_cvmx_l2c_get_num_sets.c'
source_filename = "AnghaBench/linux/arch/mips/cavium-octeon/executive/extr_cvmx-l2c.c_cvmx_l2c_get_num_sets.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @cvmx_l2c_get_num_sets() local_unnamed_addr #0 {
%1 = tail call i32 (...) @cvmx_l2c_get_set_bits() #2
%2 = shl nuw i32 1, %1
ret i32 %2
}
declare i32 @cvmx_l2c_get_set_bits(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/arch/mips/cavium-octeon/executive/extr_cvmx-l2c.c_cvmx_l2c_get_num_sets.c'
source_filename = "AnghaBench/linux/arch/mips/cavium-octeon/executive/extr_cvmx-l2c.c_cvmx_l2c_get_num_sets.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cvmx_l2c_get_num_sets() local_unnamed_addr #0 {
%1 = tail call i32 @cvmx_l2c_get_set_bits() #2
%2 = shl nuw i32 1, %1
ret i32 %2
}
declare i32 @cvmx_l2c_get_set_bits(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_mips_cavium-octeon_executive_extr_cvmx-l2c.c_cvmx_l2c_get_num_sets |
; ModuleID = 'AnghaBench/linux/fs/ext4/extr_resize.c_setup_new_flex_group_blocks.c'
source_filename = "AnghaBench/linux/fs/ext4/extr_resize.c_setup_new_flex_group_blocks.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ext4_sb_info = type { i32, i64, ptr, ptr }
%struct.ext4_new_flex_group_data = type { ptr, i32, ptr }
%struct.ext4_new_group_data = type { i64, i64, i64, i64, i64 }
%struct.buffer_head = type { i32, i32 }
@EXT4_HT_RESIZE = dso_local local_unnamed_addr global i32 0, align 4
@EXT4_MAX_TRANS_DATA = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"update backup group %#04llx\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [17 x i8] c"get_write_access\00", align 1
@GFP_NOFS = dso_local local_unnamed_addr global i32 0, align 4
@EXT4_BG_INODE_ZEROED = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [44 x i8] c"clear inode table blocks %#04llx -> %#04lx\0A\00", align 1
@EXT4_BG_BLOCK_UNINIT = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [37 x i8] c"mark backup superblock %#04llx (+0)\0A\00", align 1
@EXT4_BG_INODE_UNINIT = dso_local local_unnamed_addr global i32 0, align 4
@GROUP_TABLE_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @setup_new_flex_group_blocks], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @setup_new_flex_group_blocks(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca [3 x i32], align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
store i32 1, ptr %3, align 4, !tbaa !5
%4 = getelementptr inbounds i32, ptr %3, i64 1
store i32 1, ptr %4, align 4, !tbaa !5
%5 = getelementptr inbounds i32, ptr %3, i64 2
%6 = tail call ptr @EXT4_SB(ptr noundef %0) #3
%7 = load i32, ptr %6, align 8, !tbaa !9
store i32 %7, ptr %5, align 4, !tbaa !5
%8 = tail call ptr @EXT4_SB(ptr noundef %0) #3
%9 = getelementptr inbounds %struct.ext4_sb_info, ptr %8, i64 0, i32 3
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds %struct.ext4_new_flex_group_data, ptr %1, i64 0, i32 2
%12 = load ptr, ptr %11, align 8, !tbaa !14
%13 = load ptr, ptr %1, align 8, !tbaa !16
%14 = getelementptr inbounds %struct.ext4_new_flex_group_data, ptr %1, i64 0, i32 1
%15 = load i32, ptr %14, align 8, !tbaa !17
%16 = icmp ne i32 %15, 0
%17 = icmp ne ptr %12, null
%18 = select i1 %16, i1 %17, i1 false
br i1 %18, label %19, label %25
19: ; preds = %2
%20 = load i64, ptr %12, align 8, !tbaa !18
%21 = getelementptr inbounds %struct.ext4_sb_info, ptr %8, i64 0, i32 1
%22 = load i64, ptr %21, align 8, !tbaa !20
%23 = icmp ne i64 %20, %22
%24 = zext i1 %23 to i32
br label %25
25: ; preds = %19, %2
%26 = phi i32 [ 1, %2 ], [ %24, %19 ]
%27 = tail call i32 @BUG_ON(i32 noundef %26) #3
%28 = load i32, ptr %10, align 4, !tbaa !21
%29 = tail call i32 @le16_to_cpu(i32 noundef %28) #3
%30 = tail call i32 @ext4_has_feature_meta_bg(ptr noundef %0) #3
%31 = load i32, ptr @EXT4_HT_RESIZE, align 4, !tbaa !5
%32 = load i32, ptr @EXT4_MAX_TRANS_DATA, align 4, !tbaa !5
%33 = tail call ptr @ext4_journal_start_sb(ptr noundef %0, i32 noundef %31, i32 noundef %32) #3
%34 = tail call i64 @IS_ERR(ptr noundef %33) #3
%35 = icmp eq i64 %34, 0
br i1 %35, label %38, label %36
36: ; preds = %25
%37 = tail call i32 @PTR_ERR(ptr noundef %33) #3
br label %280
38: ; preds = %25
%39 = load i32, ptr %14, align 8, !tbaa !17
%40 = icmp sgt i32 %39, 0
br i1 %40, label %41, label %44
41: ; preds = %38
%42 = load i64, ptr %12, align 8, !tbaa !18
%43 = getelementptr inbounds %struct.ext4_sb_info, ptr %8, i64 0, i32 2
br label %50
44: ; preds = %205, %38
%45 = phi i32 [ 0, %38 ], [ %206, %205 ]
%46 = load i32, ptr @GROUP_TABLE_COUNT, align 4, !tbaa !5
%47 = icmp sgt i32 %46, 0
br i1 %47, label %48, label %273
48: ; preds = %44
%49 = getelementptr inbounds %struct.ext4_new_group_data, ptr %12, i64 0, i32 2
br label %212
50: ; preds = %41, %205
%51 = phi i64 [ 0, %41 ], [ %207, %205 ]
%52 = phi i64 [ %42, %41 ], [ %208, %205 ]
%53 = phi i32 [ 0, %41 ], [ %206, %205 ]
%54 = tail call i64 @ext4_bg_num_gdb(ptr noundef %0, i64 noundef %52) #3
%55 = tail call i64 @ext4_group_first_block_no(ptr noundef %0, i64 noundef %52) #3
switch i32 %30, label %69 [
i32 0, label %56
i32 1, label %59
]
56: ; preds = %50
%57 = tail call i64 @ext4_bg_has_super(ptr noundef %0, i64 noundef %52) #3
%58 = icmp eq i64 %57, 0
br i1 %58, label %123, label %69
59: ; preds = %50
%60 = tail call i64 @ext4_meta_bg_first_group(ptr noundef %0, i64 noundef %52) #3
%61 = add nsw i64 %52, 1
%62 = icmp eq i64 %60, %61
br i1 %62, label %69, label %63
63: ; preds = %59
%64 = tail call i32 @EXT4_DESC_PER_BLOCK(ptr noundef %0) #3
%65 = sext i32 %64 to i64
%66 = add i64 %52, -1
%67 = add i64 %66, %65
%68 = icmp eq i64 %60, %67
br i1 %68, label %69, label %123
69: ; preds = %63, %59, %56, %50
%70 = tail call i64 @ext4_bg_has_super(ptr noundef %0, i64 noundef %52) #3
%71 = icmp eq i64 %54, 0
br i1 %71, label %113, label %72
72: ; preds = %69
%73 = add nsw i64 %70, %55
br label %74
74: ; preds = %72, %109
%75 = phi i64 [ 0, %72 ], [ %110, %109 ]
%76 = phi i64 [ %73, %72 ], [ %111, %109 ]
%77 = tail call i32 (ptr, i64, ...) @ext4_debug(ptr noundef nonnull @.str, i64 noundef %76) #3
%78 = tail call i32 @extend_or_restart_transaction(ptr noundef %33, i32 noundef 1) #3
%79 = icmp eq i32 %78, 0
br i1 %79, label %80, label %273
80: ; preds = %74
%81 = tail call ptr @sb_getblk(ptr noundef %0, i64 noundef %76) #3
%82 = icmp eq ptr %81, null
%83 = zext i1 %82 to i32
%84 = tail call i64 @unlikely(i32 noundef %83) #3
%85 = icmp eq i64 %84, 0
br i1 %85, label %89, label %86
86: ; preds = %80
%87 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%88 = sub nsw i32 0, %87
br label %273
89: ; preds = %80
%90 = tail call i32 @BUFFER_TRACE(ptr noundef %81, ptr noundef nonnull @.str.1) #3
%91 = tail call i32 @ext4_journal_get_write_access(ptr noundef %33, ptr noundef %81) #3
%92 = icmp eq i32 %91, 0
br i1 %92, label %95, label %93
93: ; preds = %89
%94 = tail call i32 @brelse(ptr noundef %81) #3
br label %273
95: ; preds = %89
%96 = load i32, ptr %81, align 4, !tbaa !23
%97 = load ptr, ptr %43, align 8, !tbaa !25
%98 = getelementptr inbounds ptr, ptr %97, i64 %75
%99 = load ptr, ptr %98, align 8, !tbaa !26
%100 = load i32, ptr %99, align 4, !tbaa !27
%101 = getelementptr inbounds %struct.buffer_head, ptr %81, i64 0, i32 1
%102 = load i32, ptr %101, align 4, !tbaa !29
%103 = tail call i32 @memcpy(i32 noundef %96, i32 noundef %100, i32 noundef %102) #3
%104 = tail call i32 @set_buffer_uptodate(ptr noundef nonnull %81) #3
%105 = tail call i32 @ext4_handle_dirty_metadata(ptr noundef %33, ptr noundef null, ptr noundef nonnull %81) #3
%106 = tail call i64 @unlikely(i32 noundef %105) #3
%107 = icmp eq i64 %106, 0
%108 = tail call i32 @brelse(ptr noundef nonnull %81) #3
br i1 %107, label %109, label %273
109: ; preds = %95
%110 = add nuw i64 %75, 1
%111 = add nsw i64 %76, 1
%112 = icmp eq i64 %110, %54
br i1 %112, label %113, label %74, !llvm.loop !30
113: ; preds = %109, %69
%114 = phi i32 [ %53, %69 ], [ %105, %109 ]
%115 = tail call i64 @ext4_bg_has_super(ptr noundef %0, i64 noundef %52) #3
%116 = icmp eq i64 %115, 0
br i1 %116, label %123, label %117
117: ; preds = %113
%118 = add i64 %54, 1
%119 = add i64 %118, %55
%120 = load i32, ptr @GFP_NOFS, align 4, !tbaa !5
%121 = tail call i32 @sb_issue_zeroout(ptr noundef %0, i64 noundef %119, i32 noundef %29, i32 noundef %120) #3
%122 = icmp eq i32 %121, 0
br i1 %122, label %123, label %273
123: ; preds = %63, %113, %117, %56
%124 = phi i32 [ 0, %117 ], [ %114, %113 ], [ %53, %56 ], [ %53, %63 ]
%125 = getelementptr inbounds i32, ptr %13, i64 %51
%126 = load i32, ptr %125, align 4, !tbaa !5
%127 = load i32, ptr @EXT4_BG_INODE_ZEROED, align 4, !tbaa !5
%128 = and i32 %127, %126
%129 = icmp eq i32 %128, 0
br i1 %129, label %141, label %130
130: ; preds = %123
%131 = getelementptr inbounds %struct.ext4_new_group_data, ptr %12, i64 %51, i32 1
%132 = load i64, ptr %131, align 8, !tbaa !32
%133 = load i32, ptr %8, align 8, !tbaa !9
%134 = tail call i32 (ptr, i64, ...) @ext4_debug(ptr noundef nonnull @.str.2, i64 noundef %132, i32 noundef %133) #3
%135 = load i32, ptr %8, align 8, !tbaa !9
%136 = load i32, ptr @GFP_NOFS, align 4, !tbaa !5
%137 = tail call i32 @sb_issue_zeroout(ptr noundef %0, i64 noundef %132, i32 noundef %135, i32 noundef %136) #3
%138 = icmp eq i32 %137, 0
br i1 %138, label %139, label %273
139: ; preds = %130
%140 = load i32, ptr %125, align 4, !tbaa !5
br label %141
141: ; preds = %139, %123
%142 = phi i32 [ %140, %139 ], [ %126, %123 ]
%143 = phi i32 [ 0, %139 ], [ %124, %123 ]
%144 = load i32, ptr @EXT4_BG_BLOCK_UNINIT, align 4, !tbaa !5
%145 = and i32 %144, %142
%146 = icmp eq i32 %145, 0
br i1 %146, label %147, label %179
147: ; preds = %141
%148 = getelementptr inbounds %struct.ext4_new_group_data, ptr %12, i64 %51, i32 2
%149 = load i64, ptr %148, align 8, !tbaa !33
%150 = tail call i32 @extend_or_restart_transaction(ptr noundef %33, i32 noundef 1) #3
%151 = icmp eq i32 %150, 0
br i1 %151, label %152, label %273
152: ; preds = %147
%153 = tail call ptr @bclean(ptr noundef %33, ptr noundef %0, i64 noundef %149) #3
%154 = tail call i64 @IS_ERR(ptr noundef %153) #3
%155 = icmp eq i64 %154, 0
br i1 %155, label %158, label %156
156: ; preds = %152
%157 = tail call i32 @PTR_ERR(ptr noundef %153) #3
br label %273
158: ; preds = %152
%159 = tail call i64 @ext4_group_overhead_blocks(ptr noundef %0, i64 noundef %52) #3
%160 = icmp eq i64 %159, 0
br i1 %160, label %166, label %161
161: ; preds = %158
%162 = tail call i32 (ptr, i64, ...) @ext4_debug(ptr noundef nonnull @.str.3, i64 noundef %55) #3
%163 = load i32, ptr %153, align 4, !tbaa !23
%164 = tail call i32 @EXT4_NUM_B2C(ptr noundef %8, i64 noundef %159) #3
%165 = tail call i32 @ext4_set_bits(i32 noundef %163, i32 noundef 0, i32 noundef %164) #3
br label %166
166: ; preds = %161, %158
%167 = getelementptr inbounds %struct.ext4_new_group_data, ptr %12, i64 %51, i32 3
%168 = load i64, ptr %167, align 8, !tbaa !34
%169 = tail call i32 @EXT4_B2C(ptr noundef %8, i64 noundef %168) #3
%170 = load i32, ptr %0, align 4, !tbaa !35
%171 = shl nsw i32 %170, 3
%172 = load i32, ptr %153, align 4, !tbaa !23
%173 = tail call i32 @ext4_mark_bitmap_end(i32 noundef %169, i32 noundef %171, i32 noundef %172) #3
%174 = tail call i32 @ext4_handle_dirty_metadata(ptr noundef %33, ptr noundef null, ptr noundef nonnull %153) #3
%175 = tail call i32 @brelse(ptr noundef nonnull %153) #3
%176 = icmp eq i32 %174, 0
br i1 %176, label %177, label %273
177: ; preds = %166
%178 = load i32, ptr %125, align 4, !tbaa !5
br label %179
179: ; preds = %177, %141
%180 = phi i32 [ %142, %141 ], [ %178, %177 ]
%181 = phi i32 [ %143, %141 ], [ 0, %177 ]
%182 = load i32, ptr @EXT4_BG_INODE_UNINIT, align 4, !tbaa !5
%183 = and i32 %182, %180
%184 = icmp eq i32 %183, 0
br i1 %184, label %185, label %205
185: ; preds = %179
%186 = getelementptr inbounds %struct.ext4_new_group_data, ptr %12, i64 %51, i32 4
%187 = load i64, ptr %186, align 8, !tbaa !37
%188 = tail call i32 @extend_or_restart_transaction(ptr noundef %33, i32 noundef 1) #3
%189 = icmp eq i32 %188, 0
br i1 %189, label %190, label %273
190: ; preds = %185
%191 = tail call ptr @bclean(ptr noundef %33, ptr noundef %0, i64 noundef %187) #3
%192 = tail call i64 @IS_ERR(ptr noundef %191) #3
%193 = icmp eq i64 %192, 0
br i1 %193, label %196, label %194
194: ; preds = %190
%195 = tail call i32 @PTR_ERR(ptr noundef %191) #3
br label %273
196: ; preds = %190
%197 = tail call i32 @EXT4_INODES_PER_GROUP(ptr noundef %0) #3
%198 = load i32, ptr %0, align 4, !tbaa !35
%199 = shl nsw i32 %198, 3
%200 = load i32, ptr %191, align 4, !tbaa !23
%201 = tail call i32 @ext4_mark_bitmap_end(i32 noundef %197, i32 noundef %199, i32 noundef %200) #3
%202 = tail call i32 @ext4_handle_dirty_metadata(ptr noundef %33, ptr noundef null, ptr noundef nonnull %191) #3
%203 = tail call i32 @brelse(ptr noundef nonnull %191) #3
%204 = icmp eq i32 %202, 0
br i1 %204, label %205, label %273
205: ; preds = %196, %179
%206 = phi i32 [ %181, %179 ], [ 0, %196 ]
%207 = add nuw nsw i64 %51, 1
%208 = add nsw i64 %52, 1
%209 = load i32, ptr %14, align 8, !tbaa !17
%210 = sext i32 %209 to i64
%211 = icmp slt i64 %207, %210
br i1 %211, label %50, label %44, !llvm.loop !38
212: ; preds = %48, %267
%213 = phi i64 [ 0, %48 ], [ %269, %267 ]
%214 = phi i32 [ %45, %48 ], [ %268, %267 ]
%215 = getelementptr inbounds [3 x i32], ptr %3, i64 0, i64 %213
%216 = load i32, ptr %215, align 4, !tbaa !5
%217 = sext i32 %216 to i64
%218 = getelementptr inbounds i64, ptr %49, i64 %213
%219 = load i64, ptr %218, align 8, !tbaa !33
%220 = getelementptr inbounds i64, ptr %12, i64 %213
%221 = load i32, ptr %14, align 8, !tbaa !17
%222 = icmp sgt i32 %221, 1
br i1 %222, label %223, label %255
223: ; preds = %212, %246
%224 = phi i32 [ %247, %246 ], [ %221, %212 ]
%225 = phi i64 [ %252, %246 ], [ 1, %212 ]
%226 = phi i64 [ %251, %246 ], [ %219, %212 ]
%227 = phi i64 [ %250, %246 ], [ %219, %212 ]
%228 = phi i64 [ %249, %246 ], [ %217, %212 ]
%229 = phi i32 [ %248, %246 ], [ %214, %212 ]
%230 = add nsw i64 %227, %217
%231 = getelementptr inbounds %struct.ext4_new_group_data, ptr %220, i64 %225, i32 2
%232 = load i64, ptr %231, align 8, !tbaa !33
%233 = icmp eq i64 %230, %232
br i1 %233, label %234, label %236
234: ; preds = %223
%235 = add nsw i64 %228, %217
br label %246
236: ; preds = %223
%237 = tail call i32 @EXT4_B2C(ptr noundef %8, i64 noundef %226) #3
%238 = add i64 %228, -1
%239 = add i64 %238, %226
%240 = tail call i32 @EXT4_B2C(ptr noundef %8, i64 noundef %239) #3
%241 = tail call i32 @set_flexbg_block_bitmap(ptr noundef %0, ptr noundef %33, ptr noundef nonnull %1, i32 noundef %237, i32 noundef %240) #3
%242 = icmp eq i32 %241, 0
br i1 %242, label %243, label %273
243: ; preds = %236
%244 = load i64, ptr %231, align 8, !tbaa !33
%245 = load i32, ptr %14, align 8, !tbaa !17
br label %246
246: ; preds = %243, %234
%247 = phi i32 [ %224, %234 ], [ %245, %243 ]
%248 = phi i32 [ %229, %234 ], [ 0, %243 ]
%249 = phi i64 [ %235, %234 ], [ %217, %243 ]
%250 = phi i64 [ %230, %234 ], [ %244, %243 ]
%251 = phi i64 [ %226, %234 ], [ %244, %243 ]
%252 = add nuw nsw i64 %225, 1
%253 = sext i32 %247 to i64
%254 = icmp slt i64 %252, %253
br i1 %254, label %223, label %255, !llvm.loop !39
255: ; preds = %246, %212
%256 = phi i32 [ %214, %212 ], [ %248, %246 ]
%257 = phi i64 [ %217, %212 ], [ %249, %246 ]
%258 = phi i64 [ %219, %212 ], [ %251, %246 ]
%259 = icmp eq i64 %257, 0
br i1 %259, label %267, label %260
260: ; preds = %255
%261 = tail call i32 @EXT4_B2C(ptr noundef %8, i64 noundef %258) #3
%262 = add i64 %257, -1
%263 = add i64 %262, %258
%264 = tail call i32 @EXT4_B2C(ptr noundef %8, i64 noundef %263) #3
%265 = tail call i32 @set_flexbg_block_bitmap(ptr noundef %0, ptr noundef %33, ptr noundef nonnull %1, i32 noundef %261, i32 noundef %264) #3
%266 = icmp eq i32 %265, 0
br i1 %266, label %267, label %273
267: ; preds = %255, %260
%268 = phi i32 [ 0, %260 ], [ %256, %255 ]
%269 = add nuw nsw i64 %213, 1
%270 = load i32, ptr @GROUP_TABLE_COUNT, align 4, !tbaa !5
%271 = sext i32 %270 to i64
%272 = icmp slt i64 %269, %271
br i1 %272, label %212, label %273, !llvm.loop !40
273: ; preds = %196, %185, %166, %147, %130, %117, %74, %95, %260, %267, %236, %44, %93, %86, %156, %194
%274 = phi i32 [ %157, %156 ], [ %195, %194 ], [ %91, %93 ], [ %88, %86 ], [ %45, %44 ], [ %241, %236 ], [ %265, %260 ], [ %268, %267 ], [ %78, %74 ], [ %105, %95 ], [ %121, %117 ], [ %137, %130 ], [ %150, %147 ], [ %174, %166 ], [ %188, %185 ], [ %202, %196 ]
%275 = tail call i32 @ext4_journal_stop(ptr noundef %33) #3
%276 = icmp eq i32 %275, 0
%277 = icmp ne i32 %274, 0
%278 = select i1 %276, i1 true, i1 %277
%279 = select i1 %278, i32 %274, i32 %275
br label %280
280: ; preds = %273, %36
%281 = phi i32 [ %37, %36 ], [ %279, %273 ]
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
ret i32 %281
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @EXT4_SB(ptr noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @ext4_has_feature_meta_bg(ptr noundef) local_unnamed_addr #2
declare ptr @ext4_journal_start_sb(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i64 @ext4_bg_num_gdb(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_group_first_block_no(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_bg_has_super(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_meta_bg_first_group(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @EXT4_DESC_PER_BLOCK(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @ext4_debug(ptr noundef, i64 noundef, ...) local_unnamed_addr #2
declare i32 @extend_or_restart_transaction(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @sb_getblk(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @BUFFER_TRACE(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ext4_journal_get_write_access(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brelse(ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_buffer_uptodate(ptr noundef) local_unnamed_addr #2
declare i32 @ext4_handle_dirty_metadata(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sb_issue_zeroout(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @bclean(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_group_overhead_blocks(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ext4_set_bits(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EXT4_NUM_B2C(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ext4_mark_bitmap_end(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EXT4_B2C(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @EXT4_INODES_PER_GROUP(ptr noundef) local_unnamed_addr #2
declare i32 @set_flexbg_block_bitmap(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ext4_journal_stop(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ext4_sb_info", !6, i64 0, !11, i64 8, !12, i64 16, !12, i64 24}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !12, i64 24}
!14 = !{!15, !12, i64 16}
!15 = !{!"ext4_new_flex_group_data", !12, i64 0, !6, i64 8, !12, i64 16}
!16 = !{!15, !12, i64 0}
!17 = !{!15, !6, i64 8}
!18 = !{!19, !11, i64 0}
!19 = !{!"ext4_new_group_data", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!20 = !{!10, !11, i64 8}
!21 = !{!22, !6, i64 0}
!22 = !{!"ext4_super_block", !6, i64 0}
!23 = !{!24, !6, i64 0}
!24 = !{!"buffer_head", !6, i64 0, !6, i64 4}
!25 = !{!10, !12, i64 16}
!26 = !{!12, !12, i64 0}
!27 = !{!28, !6, i64 0}
!28 = !{!"TYPE_2__", !6, i64 0}
!29 = !{!24, !6, i64 4}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!19, !11, i64 8}
!33 = !{!19, !11, i64 16}
!34 = !{!19, !11, i64 24}
!35 = !{!36, !6, i64 0}
!36 = !{!"super_block", !6, i64 0}
!37 = !{!19, !11, i64 32}
!38 = distinct !{!38, !31}
!39 = distinct !{!39, !31}
!40 = distinct !{!40, !31}
| ; ModuleID = 'AnghaBench/linux/fs/ext4/extr_resize.c_setup_new_flex_group_blocks.c'
source_filename = "AnghaBench/linux/fs/ext4/extr_resize.c_setup_new_flex_group_blocks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ext4_new_group_data = type { i64, i64, i64, i64, i64 }
@EXT4_HT_RESIZE = common local_unnamed_addr global i32 0, align 4
@EXT4_MAX_TRANS_DATA = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [29 x i8] c"update backup group %#04llx\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [17 x i8] c"get_write_access\00", align 1
@GFP_NOFS = common local_unnamed_addr global i32 0, align 4
@EXT4_BG_INODE_ZEROED = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [44 x i8] c"clear inode table blocks %#04llx -> %#04lx\0A\00", align 1
@EXT4_BG_BLOCK_UNINIT = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [37 x i8] c"mark backup superblock %#04llx (+0)\0A\00", align 1
@EXT4_BG_INODE_UNINIT = common local_unnamed_addr global i32 0, align 4
@GROUP_TABLE_COUNT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @setup_new_flex_group_blocks], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @setup_new_flex_group_blocks(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca [3 x i32], align 8
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #3
store <2 x i32> <i32 1, i32 1>, ptr %3, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
%5 = tail call ptr @EXT4_SB(ptr noundef %0) #3
%6 = load i32, ptr %5, align 8, !tbaa !10
store i32 %6, ptr %4, align 8, !tbaa !6
%7 = tail call ptr @EXT4_SB(ptr noundef %0) #3
%8 = getelementptr inbounds i8, ptr %7, i64 24
%9 = load ptr, ptr %8, align 8, !tbaa !14
%10 = getelementptr inbounds i8, ptr %1, i64 16
%11 = load ptr, ptr %10, align 8, !tbaa !15
%12 = load ptr, ptr %1, align 8, !tbaa !17
%13 = getelementptr inbounds i8, ptr %1, i64 8
%14 = load i32, ptr %13, align 8, !tbaa !18
%15 = icmp ne i32 %14, 0
%16 = icmp ne ptr %11, null
%17 = select i1 %15, i1 %16, i1 false
br i1 %17, label %18, label %24
18: ; preds = %2
%19 = load i64, ptr %11, align 8, !tbaa !19
%20 = getelementptr inbounds i8, ptr %7, i64 8
%21 = load i64, ptr %20, align 8, !tbaa !21
%22 = icmp ne i64 %19, %21
%23 = zext i1 %22 to i32
br label %24
24: ; preds = %18, %2
%25 = phi i32 [ 1, %2 ], [ %23, %18 ]
%26 = tail call i32 @BUG_ON(i32 noundef %25) #3
%27 = load i32, ptr %9, align 4, !tbaa !22
%28 = tail call i32 @le16_to_cpu(i32 noundef %27) #3
%29 = tail call i32 @ext4_has_feature_meta_bg(ptr noundef %0) #3
%30 = load i32, ptr @EXT4_HT_RESIZE, align 4, !tbaa !6
%31 = load i32, ptr @EXT4_MAX_TRANS_DATA, align 4, !tbaa !6
%32 = tail call ptr @ext4_journal_start_sb(ptr noundef %0, i32 noundef %30, i32 noundef %31) #3
%33 = tail call i64 @IS_ERR(ptr noundef %32) #3
%34 = icmp eq i64 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %24
%36 = tail call i32 @PTR_ERR(ptr noundef %32) #3
br label %280
37: ; preds = %24
%38 = load i32, ptr %13, align 8, !tbaa !18
%39 = icmp sgt i32 %38, 0
br i1 %39, label %40, label %43
40: ; preds = %37
%41 = load i64, ptr %11, align 8, !tbaa !19
%42 = getelementptr inbounds i8, ptr %7, i64 16
br label %49
43: ; preds = %205, %37
%44 = phi i32 [ 0, %37 ], [ %206, %205 ]
%45 = load i32, ptr @GROUP_TABLE_COUNT, align 4, !tbaa !6
%46 = icmp sgt i32 %45, 0
br i1 %46, label %47, label %273
47: ; preds = %43
%48 = getelementptr inbounds i8, ptr %11, i64 16
br label %212
49: ; preds = %40, %205
%50 = phi i64 [ 0, %40 ], [ %207, %205 ]
%51 = phi i64 [ %41, %40 ], [ %208, %205 ]
%52 = phi i32 [ 0, %40 ], [ %206, %205 ]
%53 = tail call i64 @ext4_bg_num_gdb(ptr noundef %0, i64 noundef %51) #3
%54 = tail call i64 @ext4_group_first_block_no(ptr noundef %0, i64 noundef %51) #3
switch i32 %29, label %68 [
i32 0, label %55
i32 1, label %58
]
55: ; preds = %49
%56 = tail call i64 @ext4_bg_has_super(ptr noundef %0, i64 noundef %51) #3
%57 = icmp eq i64 %56, 0
br i1 %57, label %122, label %68
58: ; preds = %49
%59 = tail call i64 @ext4_meta_bg_first_group(ptr noundef %0, i64 noundef %51) #3
%60 = add nsw i64 %51, 1
%61 = icmp eq i64 %59, %60
br i1 %61, label %68, label %62
62: ; preds = %58
%63 = tail call i32 @EXT4_DESC_PER_BLOCK(ptr noundef %0) #3
%64 = sext i32 %63 to i64
%65 = add i64 %51, -1
%66 = add i64 %65, %64
%67 = icmp eq i64 %59, %66
br i1 %67, label %68, label %122
68: ; preds = %62, %58, %55, %49
%69 = tail call i64 @ext4_bg_has_super(ptr noundef %0, i64 noundef %51) #3
%70 = icmp eq i64 %53, 0
br i1 %70, label %112, label %71
71: ; preds = %68
%72 = add nsw i64 %69, %54
br label %73
73: ; preds = %71, %108
%74 = phi i64 [ 0, %71 ], [ %109, %108 ]
%75 = phi i64 [ %72, %71 ], [ %110, %108 ]
%76 = tail call i32 (ptr, i64, ...) @ext4_debug(ptr noundef nonnull @.str, i64 noundef %75) #3
%77 = tail call i32 @extend_or_restart_transaction(ptr noundef %32, i32 noundef 1) #3
%78 = icmp eq i32 %77, 0
br i1 %78, label %79, label %273
79: ; preds = %73
%80 = tail call ptr @sb_getblk(ptr noundef %0, i64 noundef %75) #3
%81 = icmp eq ptr %80, null
%82 = zext i1 %81 to i32
%83 = tail call i64 @unlikely(i32 noundef %82) #3
%84 = icmp eq i64 %83, 0
br i1 %84, label %88, label %85
85: ; preds = %79
%86 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%87 = sub nsw i32 0, %86
br label %273
88: ; preds = %79
%89 = tail call i32 @BUFFER_TRACE(ptr noundef %80, ptr noundef nonnull @.str.1) #3
%90 = tail call i32 @ext4_journal_get_write_access(ptr noundef %32, ptr noundef %80) #3
%91 = icmp eq i32 %90, 0
br i1 %91, label %94, label %92
92: ; preds = %88
%93 = tail call i32 @brelse(ptr noundef %80) #3
br label %273
94: ; preds = %88
%95 = load i32, ptr %80, align 4, !tbaa !24
%96 = load ptr, ptr %42, align 8, !tbaa !26
%97 = getelementptr inbounds ptr, ptr %96, i64 %74
%98 = load ptr, ptr %97, align 8, !tbaa !27
%99 = load i32, ptr %98, align 4, !tbaa !28
%100 = getelementptr inbounds i8, ptr %80, i64 4
%101 = load i32, ptr %100, align 4, !tbaa !30
%102 = tail call i32 @memcpy(i32 noundef %95, i32 noundef %99, i32 noundef %101) #3
%103 = tail call i32 @set_buffer_uptodate(ptr noundef nonnull %80) #3
%104 = tail call i32 @ext4_handle_dirty_metadata(ptr noundef %32, ptr noundef null, ptr noundef nonnull %80) #3
%105 = tail call i64 @unlikely(i32 noundef %104) #3
%106 = icmp eq i64 %105, 0
%107 = tail call i32 @brelse(ptr noundef nonnull %80) #3
br i1 %106, label %108, label %273
108: ; preds = %94
%109 = add nuw i64 %74, 1
%110 = add nsw i64 %75, 1
%111 = icmp eq i64 %109, %53
br i1 %111, label %112, label %73, !llvm.loop !31
112: ; preds = %108, %68
%113 = phi i32 [ %52, %68 ], [ %104, %108 ]
%114 = tail call i64 @ext4_bg_has_super(ptr noundef %0, i64 noundef %51) #3
%115 = icmp eq i64 %114, 0
br i1 %115, label %122, label %116
116: ; preds = %112
%117 = add i64 %53, 1
%118 = add i64 %117, %54
%119 = load i32, ptr @GFP_NOFS, align 4, !tbaa !6
%120 = tail call i32 @sb_issue_zeroout(ptr noundef %0, i64 noundef %118, i32 noundef %28, i32 noundef %119) #3
%121 = icmp eq i32 %120, 0
br i1 %121, label %122, label %273
122: ; preds = %62, %112, %116, %55
%123 = phi i32 [ 0, %116 ], [ %113, %112 ], [ %52, %55 ], [ %52, %62 ]
%124 = getelementptr inbounds i32, ptr %12, i64 %50
%125 = load i32, ptr %124, align 4, !tbaa !6
%126 = load i32, ptr @EXT4_BG_INODE_ZEROED, align 4, !tbaa !6
%127 = and i32 %126, %125
%128 = icmp eq i32 %127, 0
br i1 %128, label %140, label %129
129: ; preds = %122
%130 = getelementptr inbounds %struct.ext4_new_group_data, ptr %11, i64 %50, i32 1
%131 = load i64, ptr %130, align 8, !tbaa !33
%132 = load i32, ptr %7, align 8, !tbaa !10
%133 = tail call i32 (ptr, i64, ...) @ext4_debug(ptr noundef nonnull @.str.2, i64 noundef %131, i32 noundef %132) #3
%134 = load i32, ptr %7, align 8, !tbaa !10
%135 = load i32, ptr @GFP_NOFS, align 4, !tbaa !6
%136 = tail call i32 @sb_issue_zeroout(ptr noundef %0, i64 noundef %131, i32 noundef %134, i32 noundef %135) #3
%137 = icmp eq i32 %136, 0
br i1 %137, label %138, label %273
138: ; preds = %129
%139 = load i32, ptr %124, align 4, !tbaa !6
br label %140
140: ; preds = %138, %122
%141 = phi i32 [ %139, %138 ], [ %125, %122 ]
%142 = phi i32 [ 0, %138 ], [ %123, %122 ]
%143 = load i32, ptr @EXT4_BG_BLOCK_UNINIT, align 4, !tbaa !6
%144 = and i32 %143, %141
%145 = icmp eq i32 %144, 0
br i1 %145, label %146, label %179
146: ; preds = %140
%147 = getelementptr inbounds %struct.ext4_new_group_data, ptr %11, i64 %50
%148 = getelementptr inbounds i8, ptr %147, i64 16
%149 = load i64, ptr %148, align 8, !tbaa !34
%150 = tail call i32 @extend_or_restart_transaction(ptr noundef %32, i32 noundef 1) #3
%151 = icmp eq i32 %150, 0
br i1 %151, label %152, label %273
152: ; preds = %146
%153 = tail call ptr @bclean(ptr noundef %32, ptr noundef %0, i64 noundef %149) #3
%154 = tail call i64 @IS_ERR(ptr noundef %153) #3
%155 = icmp eq i64 %154, 0
br i1 %155, label %158, label %156
156: ; preds = %152
%157 = tail call i32 @PTR_ERR(ptr noundef %153) #3
br label %273
158: ; preds = %152
%159 = tail call i64 @ext4_group_overhead_blocks(ptr noundef %0, i64 noundef %51) #3
%160 = icmp eq i64 %159, 0
br i1 %160, label %166, label %161
161: ; preds = %158
%162 = tail call i32 (ptr, i64, ...) @ext4_debug(ptr noundef nonnull @.str.3, i64 noundef %54) #3
%163 = load i32, ptr %153, align 4, !tbaa !24
%164 = tail call i32 @EXT4_NUM_B2C(ptr noundef %7, i64 noundef %159) #3
%165 = tail call i32 @ext4_set_bits(i32 noundef %163, i32 noundef 0, i32 noundef %164) #3
br label %166
166: ; preds = %161, %158
%167 = getelementptr inbounds i8, ptr %147, i64 24
%168 = load i64, ptr %167, align 8, !tbaa !35
%169 = tail call i32 @EXT4_B2C(ptr noundef %7, i64 noundef %168) #3
%170 = load i32, ptr %0, align 4, !tbaa !36
%171 = shl nsw i32 %170, 3
%172 = load i32, ptr %153, align 4, !tbaa !24
%173 = tail call i32 @ext4_mark_bitmap_end(i32 noundef %169, i32 noundef %171, i32 noundef %172) #3
%174 = tail call i32 @ext4_handle_dirty_metadata(ptr noundef %32, ptr noundef null, ptr noundef nonnull %153) #3
%175 = tail call i32 @brelse(ptr noundef nonnull %153) #3
%176 = icmp eq i32 %174, 0
br i1 %176, label %177, label %273
177: ; preds = %166
%178 = load i32, ptr %124, align 4, !tbaa !6
br label %179
179: ; preds = %177, %140
%180 = phi i32 [ %141, %140 ], [ %178, %177 ]
%181 = phi i32 [ %142, %140 ], [ 0, %177 ]
%182 = load i32, ptr @EXT4_BG_INODE_UNINIT, align 4, !tbaa !6
%183 = and i32 %182, %180
%184 = icmp eq i32 %183, 0
br i1 %184, label %185, label %205
185: ; preds = %179
%186 = getelementptr inbounds %struct.ext4_new_group_data, ptr %11, i64 %50, i32 4
%187 = load i64, ptr %186, align 8, !tbaa !38
%188 = tail call i32 @extend_or_restart_transaction(ptr noundef %32, i32 noundef 1) #3
%189 = icmp eq i32 %188, 0
br i1 %189, label %190, label %273
190: ; preds = %185
%191 = tail call ptr @bclean(ptr noundef %32, ptr noundef %0, i64 noundef %187) #3
%192 = tail call i64 @IS_ERR(ptr noundef %191) #3
%193 = icmp eq i64 %192, 0
br i1 %193, label %196, label %194
194: ; preds = %190
%195 = tail call i32 @PTR_ERR(ptr noundef %191) #3
br label %273
196: ; preds = %190
%197 = tail call i32 @EXT4_INODES_PER_GROUP(ptr noundef %0) #3
%198 = load i32, ptr %0, align 4, !tbaa !36
%199 = shl nsw i32 %198, 3
%200 = load i32, ptr %191, align 4, !tbaa !24
%201 = tail call i32 @ext4_mark_bitmap_end(i32 noundef %197, i32 noundef %199, i32 noundef %200) #3
%202 = tail call i32 @ext4_handle_dirty_metadata(ptr noundef %32, ptr noundef null, ptr noundef nonnull %191) #3
%203 = tail call i32 @brelse(ptr noundef nonnull %191) #3
%204 = icmp eq i32 %202, 0
br i1 %204, label %205, label %273
205: ; preds = %196, %179
%206 = phi i32 [ %181, %179 ], [ 0, %196 ]
%207 = add nuw nsw i64 %50, 1
%208 = add nsw i64 %51, 1
%209 = load i32, ptr %13, align 8, !tbaa !18
%210 = sext i32 %209 to i64
%211 = icmp slt i64 %207, %210
br i1 %211, label %49, label %43, !llvm.loop !39
212: ; preds = %47, %267
%213 = phi i64 [ 0, %47 ], [ %269, %267 ]
%214 = phi i32 [ %44, %47 ], [ %268, %267 ]
%215 = getelementptr inbounds [3 x i32], ptr %3, i64 0, i64 %213
%216 = load i32, ptr %215, align 4, !tbaa !6
%217 = sext i32 %216 to i64
%218 = getelementptr inbounds i64, ptr %48, i64 %213
%219 = load i64, ptr %218, align 8, !tbaa !34
%220 = getelementptr inbounds i64, ptr %11, i64 %213
%221 = load i32, ptr %13, align 8, !tbaa !18
%222 = icmp sgt i32 %221, 1
br i1 %222, label %223, label %255
223: ; preds = %212, %246
%224 = phi i32 [ %247, %246 ], [ %221, %212 ]
%225 = phi i64 [ %252, %246 ], [ 1, %212 ]
%226 = phi i64 [ %251, %246 ], [ %219, %212 ]
%227 = phi i64 [ %250, %246 ], [ %219, %212 ]
%228 = phi i64 [ %249, %246 ], [ %217, %212 ]
%229 = phi i32 [ %248, %246 ], [ %214, %212 ]
%230 = add nsw i64 %227, %217
%231 = getelementptr inbounds %struct.ext4_new_group_data, ptr %220, i64 %225, i32 2
%232 = load i64, ptr %231, align 8, !tbaa !34
%233 = icmp eq i64 %230, %232
br i1 %233, label %234, label %236
234: ; preds = %223
%235 = add nsw i64 %228, %217
br label %246
236: ; preds = %223
%237 = tail call i32 @EXT4_B2C(ptr noundef %7, i64 noundef %226) #3
%238 = add i64 %228, -1
%239 = add i64 %238, %226
%240 = tail call i32 @EXT4_B2C(ptr noundef %7, i64 noundef %239) #3
%241 = tail call i32 @set_flexbg_block_bitmap(ptr noundef %0, ptr noundef %32, ptr noundef nonnull %1, i32 noundef %237, i32 noundef %240) #3
%242 = icmp eq i32 %241, 0
br i1 %242, label %243, label %273
243: ; preds = %236
%244 = load i64, ptr %231, align 8, !tbaa !34
%245 = load i32, ptr %13, align 8, !tbaa !18
br label %246
246: ; preds = %243, %234
%247 = phi i32 [ %224, %234 ], [ %245, %243 ]
%248 = phi i32 [ %229, %234 ], [ 0, %243 ]
%249 = phi i64 [ %235, %234 ], [ %217, %243 ]
%250 = phi i64 [ %230, %234 ], [ %244, %243 ]
%251 = phi i64 [ %226, %234 ], [ %244, %243 ]
%252 = add nuw nsw i64 %225, 1
%253 = sext i32 %247 to i64
%254 = icmp slt i64 %252, %253
br i1 %254, label %223, label %255, !llvm.loop !40
255: ; preds = %246, %212
%256 = phi i32 [ %214, %212 ], [ %248, %246 ]
%257 = phi i64 [ %217, %212 ], [ %249, %246 ]
%258 = phi i64 [ %219, %212 ], [ %251, %246 ]
%259 = icmp eq i64 %257, 0
br i1 %259, label %267, label %260
260: ; preds = %255
%261 = tail call i32 @EXT4_B2C(ptr noundef %7, i64 noundef %258) #3
%262 = add i64 %257, -1
%263 = add i64 %262, %258
%264 = tail call i32 @EXT4_B2C(ptr noundef %7, i64 noundef %263) #3
%265 = tail call i32 @set_flexbg_block_bitmap(ptr noundef %0, ptr noundef %32, ptr noundef nonnull %1, i32 noundef %261, i32 noundef %264) #3
%266 = icmp eq i32 %265, 0
br i1 %266, label %267, label %273
267: ; preds = %255, %260
%268 = phi i32 [ 0, %260 ], [ %256, %255 ]
%269 = add nuw nsw i64 %213, 1
%270 = load i32, ptr @GROUP_TABLE_COUNT, align 4, !tbaa !6
%271 = sext i32 %270 to i64
%272 = icmp slt i64 %269, %271
br i1 %272, label %212, label %273, !llvm.loop !41
273: ; preds = %196, %185, %166, %146, %129, %116, %73, %94, %260, %267, %236, %43, %92, %85, %156, %194
%274 = phi i32 [ %157, %156 ], [ %195, %194 ], [ %90, %92 ], [ %87, %85 ], [ %44, %43 ], [ %241, %236 ], [ %265, %260 ], [ %268, %267 ], [ %77, %73 ], [ %104, %94 ], [ %120, %116 ], [ %136, %129 ], [ %150, %146 ], [ %174, %166 ], [ %188, %185 ], [ %202, %196 ]
%275 = tail call i32 @ext4_journal_stop(ptr noundef %32) #3
%276 = icmp eq i32 %275, 0
%277 = icmp ne i32 %274, 0
%278 = select i1 %276, i1 true, i1 %277
%279 = select i1 %278, i32 %274, i32 %275
br label %280
280: ; preds = %273, %35
%281 = phi i32 [ %36, %35 ], [ %279, %273 ]
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #3
ret i32 %281
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @EXT4_SB(ptr noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @ext4_has_feature_meta_bg(ptr noundef) local_unnamed_addr #2
declare ptr @ext4_journal_start_sb(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i64 @ext4_bg_num_gdb(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_group_first_block_no(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_bg_has_super(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_meta_bg_first_group(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @EXT4_DESC_PER_BLOCK(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @ext4_debug(ptr noundef, i64 noundef, ...) local_unnamed_addr #2
declare i32 @extend_or_restart_transaction(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @sb_getblk(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @BUFFER_TRACE(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ext4_journal_get_write_access(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brelse(ptr noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_buffer_uptodate(ptr noundef) local_unnamed_addr #2
declare i32 @ext4_handle_dirty_metadata(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sb_issue_zeroout(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @bclean(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @ext4_group_overhead_blocks(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ext4_set_bits(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EXT4_NUM_B2C(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ext4_mark_bitmap_end(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @EXT4_B2C(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @EXT4_INODES_PER_GROUP(ptr noundef) local_unnamed_addr #2
declare i32 @set_flexbg_block_bitmap(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ext4_journal_stop(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ext4_sb_info", !7, i64 0, !12, i64 8, !13, i64 16, !13, i64 24}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 24}
!15 = !{!16, !13, i64 16}
!16 = !{!"ext4_new_flex_group_data", !13, i64 0, !7, i64 8, !13, i64 16}
!17 = !{!16, !13, i64 0}
!18 = !{!16, !7, i64 8}
!19 = !{!20, !12, i64 0}
!20 = !{!"ext4_new_group_data", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32}
!21 = !{!11, !12, i64 8}
!22 = !{!23, !7, i64 0}
!23 = !{!"ext4_super_block", !7, i64 0}
!24 = !{!25, !7, i64 0}
!25 = !{!"buffer_head", !7, i64 0, !7, i64 4}
!26 = !{!11, !13, i64 16}
!27 = !{!13, !13, i64 0}
!28 = !{!29, !7, i64 0}
!29 = !{!"TYPE_2__", !7, i64 0}
!30 = !{!25, !7, i64 4}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = !{!20, !12, i64 8}
!34 = !{!20, !12, i64 16}
!35 = !{!20, !12, i64 24}
!36 = !{!37, !7, i64 0}
!37 = !{!"super_block", !7, i64 0}
!38 = !{!20, !12, i64 32}
!39 = distinct !{!39, !32}
!40 = distinct !{!40, !32}
!41 = distinct !{!41, !32}
| linux_fs_ext4_extr_resize.c_setup_new_flex_group_blocks |
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/extr_inner.h_BIT_LENGTH.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/extr_inner.h_BIT_LENGTH.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @BIT_LENGTH], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @BIT_LENGTH(i32 noundef %0) #0 {
%2 = tail call i32 @NEQ(i32 noundef %0, i32 noundef 0) #2
%3 = tail call i32 @GT(i32 noundef %0, i32 noundef 65535) #2
%4 = ashr i32 %0, 16
%5 = tail call i32 @MUX(i32 noundef %3, i32 noundef %4, i32 noundef %0) #2
%6 = shl i32 %3, 4
%7 = add nsw i32 %6, %2
%8 = tail call i32 @GT(i32 noundef %5, i32 noundef 255) #2
%9 = ashr i32 %5, 8
%10 = tail call i32 @MUX(i32 noundef %8, i32 noundef %9, i32 noundef %5) #2
%11 = shl i32 %8, 3
%12 = add nsw i32 %7, %11
%13 = tail call i32 @GT(i32 noundef %10, i32 noundef 15) #2
%14 = ashr i32 %10, 4
%15 = tail call i32 @MUX(i32 noundef %13, i32 noundef %14, i32 noundef %10) #2
%16 = shl i32 %13, 2
%17 = add nsw i32 %12, %16
%18 = tail call i32 @GT(i32 noundef %15, i32 noundef 3) #2
%19 = ashr i32 %15, 2
%20 = tail call i32 @MUX(i32 noundef %18, i32 noundef %19, i32 noundef %15) #2
%21 = shl i32 %18, 1
%22 = add nsw i32 %17, %21
%23 = tail call i32 @GT(i32 noundef %20, i32 noundef 1) #2
%24 = add nsw i32 %22, %23
ret i32 %24
}
declare i32 @NEQ(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GT(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MUX(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/extr_inner.h_BIT_LENGTH.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/extr_inner.h_BIT_LENGTH.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @BIT_LENGTH], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @BIT_LENGTH(i32 noundef %0) #0 {
%2 = tail call i32 @NEQ(i32 noundef %0, i32 noundef 0) #2
%3 = tail call i32 @GT(i32 noundef %0, i32 noundef 65535) #2
%4 = ashr i32 %0, 16
%5 = tail call i32 @MUX(i32 noundef %3, i32 noundef %4, i32 noundef %0) #2
%6 = shl i32 %3, 4
%7 = add nsw i32 %6, %2
%8 = tail call i32 @GT(i32 noundef %5, i32 noundef 255) #2
%9 = ashr i32 %5, 8
%10 = tail call i32 @MUX(i32 noundef %8, i32 noundef %9, i32 noundef %5) #2
%11 = shl i32 %8, 3
%12 = add nsw i32 %7, %11
%13 = tail call i32 @GT(i32 noundef %10, i32 noundef 15) #2
%14 = ashr i32 %10, 4
%15 = tail call i32 @MUX(i32 noundef %13, i32 noundef %14, i32 noundef %10) #2
%16 = shl i32 %13, 2
%17 = add nsw i32 %12, %16
%18 = tail call i32 @GT(i32 noundef %15, i32 noundef 3) #2
%19 = ashr i32 %15, 2
%20 = tail call i32 @MUX(i32 noundef %18, i32 noundef %19, i32 noundef %15) #2
%21 = shl i32 %18, 1
%22 = add nsw i32 %17, %21
%23 = tail call i32 @GT(i32 noundef %20, i32 noundef 1) #2
%24 = add nsw i32 %22, %23
ret i32 %24
}
declare i32 @NEQ(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GT(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MUX(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_bearssl_src_extr_inner.h_BIT_LENGTH |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/marvell/mwifiex/extr_ie.c_mwifiex_uap_parse_tail_ies.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/marvell/mwifiex/extr_ie.c_mwifiex_uap_parse_tail_ies.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cfg80211_beacon_data = type { i32, ptr }
%struct.mwifiex_ie = type { ptr, ptr, ptr, i64 }
%struct.ieee_types_header = type { i32, i32 }
@MWIFIEX_AUTO_IDX_MASK = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@WLAN_OUI_MICROSOFT = dso_local local_unnamed_addr global i32 0, align 4
@WLAN_OUI_TYPE_MICROSOFT_WMM = dso_local local_unnamed_addr global i32 0, align 4
@IEEE_MAX_IE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@WLAN_OUI_TYPE_MICROSOFT_WPA = dso_local local_unnamed_addr global i32 0, align 4
@MGMT_MASK_BEACON = dso_local local_unnamed_addr global i32 0, align 4
@MGMT_MASK_PROBE_RESP = dso_local local_unnamed_addr global i32 0, align 4
@MGMT_MASK_ASSOC_RESP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mwifiex_uap_parse_tail_ies], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mwifiex_uap_parse_tail_ies(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @MWIFIEX_AUTO_IDX_MASK, align 4, !tbaa !5
store i32 %4, ptr %3, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.cfg80211_beacon_data, ptr %1, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !9
%7 = icmp eq ptr %6, null
br i1 %7, label %111, label %8
8: ; preds = %2
%9 = load i32, ptr %1, align 8, !tbaa !12
%10 = icmp eq i32 %9, 0
br i1 %10, label %111, label %11
11: ; preds = %8
%12 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%13 = tail call ptr @kzalloc(i32 noundef 32, i32 noundef %12) #3
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%17 = sub nsw i32 0, %16
br label %111
18: ; preds = %11
%19 = load i32, ptr %1, align 8, !tbaa !12
%20 = icmp ugt i32 %19, 8
br i1 %20, label %21, label %63
21: ; preds = %18
%22 = getelementptr inbounds %struct.mwifiex_ie, ptr %13, i64 0, i32 3
br label %23
23: ; preds = %21, %56
%24 = phi i32 [ 0, %21 ], [ %59, %56 ]
%25 = phi i32 [ %19, %21 ], [ %58, %56 ]
%26 = phi i32 [ 0, %21 ], [ %57, %56 ]
%27 = load ptr, ptr %5, align 8, !tbaa !9
%28 = sext i32 %24 to i64
%29 = getelementptr inbounds i32, ptr %27, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !13
%31 = add i32 %30, 8
%32 = icmp ugt i32 %31, %25
br i1 %32, label %33, label %36
33: ; preds = %23
%34 = load i32, ptr @EINVAL, align 4, !tbaa !5
%35 = sub nsw i32 0, %34
br label %108
36: ; preds = %23
%37 = getelementptr inbounds %struct.ieee_types_header, ptr %29, i64 0, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !15
switch i32 %38, label %44 [
i32 132, label %56
i32 131, label %56
i32 138, label %56
i32 133, label %56
i32 137, label %56
i32 136, label %56
i32 135, label %56
i32 134, label %56
i32 129, label %56
i32 128, label %56
i32 130, label %39
]
39: ; preds = %36
%40 = load i32, ptr @WLAN_OUI_MICROSOFT, align 4, !tbaa !5
%41 = load i32, ptr @WLAN_OUI_TYPE_MICROSOFT_WMM, align 4, !tbaa !5
%42 = tail call i64 @cfg80211_find_vendor_ie(i32 noundef %40, i32 noundef %41, ptr noundef nonnull %29, i32 noundef %31) #3
%43 = icmp eq i64 %42, 0
br i1 %43, label %44, label %56
44: ; preds = %39, %36
%45 = add i32 %31, %26
%46 = load i32, ptr @IEEE_MAX_IE_SIZE, align 4, !tbaa !5
%47 = icmp ugt i32 %45, %46
br i1 %47, label %48, label %51
48: ; preds = %44
%49 = load i32, ptr @EINVAL, align 4, !tbaa !5
%50 = sub nsw i32 0, %49
br label %108
51: ; preds = %44
%52 = load i64, ptr %22, align 8, !tbaa !16
%53 = zext i32 %26 to i64
%54 = add nsw i64 %52, %53
%55 = tail call i32 @memcpy(i64 noundef %54, ptr noundef nonnull %29, i32 noundef %31) #3
br label %56
56: ; preds = %39, %36, %36, %36, %36, %36, %36, %36, %36, %36, %36, %51
%57 = phi i32 [ %45, %51 ], [ %26, %39 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ]
%58 = sub i32 %25, %31
%59 = add i32 %31, %24
%60 = icmp ugt i32 %58, 8
br i1 %60, label %23, label %61, !llvm.loop !19
61: ; preds = %56
%62 = load i32, ptr %1, align 8, !tbaa !12
br label %63
63: ; preds = %61, %18
%64 = phi i32 [ %19, %18 ], [ %62, %61 ]
%65 = phi i32 [ 0, %18 ], [ %57, %61 ]
%66 = load i32, ptr @WLAN_OUI_MICROSOFT, align 4, !tbaa !5
%67 = load i32, ptr @WLAN_OUI_TYPE_MICROSOFT_WPA, align 4, !tbaa !5
%68 = load ptr, ptr %5, align 8, !tbaa !9
%69 = tail call i64 @cfg80211_find_vendor_ie(i32 noundef %66, i32 noundef %67, ptr noundef %68, i32 noundef %64) #3
%70 = inttoptr i64 %69 to ptr
%71 = icmp eq i64 %69, 0
br i1 %71, label %87, label %72
72: ; preds = %63
%73 = load i32, ptr %70, align 4, !tbaa !21
%74 = add i32 %73, 8
%75 = add i32 %74, %65
%76 = load i32, ptr @IEEE_MAX_IE_SIZE, align 4, !tbaa !5
%77 = icmp ugt i32 %75, %76
br i1 %77, label %78, label %81
78: ; preds = %72
%79 = load i32, ptr @EINVAL, align 4, !tbaa !5
%80 = sub nsw i32 0, %79
br label %108
81: ; preds = %72
%82 = getelementptr inbounds %struct.mwifiex_ie, ptr %13, i64 0, i32 3
%83 = load i64, ptr %82, align 8, !tbaa !16
%84 = zext i32 %65 to i64
%85 = add nsw i64 %83, %84
%86 = tail call i32 @memcpy(i64 noundef %85, ptr noundef nonnull %70, i32 noundef %74) #3
br label %87
87: ; preds = %81, %63
%88 = phi i32 [ %75, %81 ], [ %65, %63 ]
%89 = icmp eq i32 %88, 0
br i1 %89, label %108, label %90
90: ; preds = %87
%91 = tail call ptr @cpu_to_le16(i32 noundef %4) #3
%92 = getelementptr inbounds %struct.mwifiex_ie, ptr %13, i64 0, i32 2
store ptr %91, ptr %92, align 8, !tbaa !23
%93 = load i32, ptr @MGMT_MASK_BEACON, align 4, !tbaa !5
%94 = load i32, ptr @MGMT_MASK_PROBE_RESP, align 4, !tbaa !5
%95 = or i32 %94, %93
%96 = load i32, ptr @MGMT_MASK_ASSOC_RESP, align 4, !tbaa !5
%97 = or i32 %95, %96
%98 = tail call ptr @cpu_to_le16(i32 noundef %97) #3
%99 = getelementptr inbounds %struct.mwifiex_ie, ptr %13, i64 0, i32 1
store ptr %98, ptr %99, align 8, !tbaa !24
%100 = tail call ptr @cpu_to_le16(i32 noundef %88) #3
store ptr %100, ptr %13, align 8, !tbaa !25
%101 = call i64 @mwifiex_update_uap_custom_ie(ptr noundef %0, ptr noundef nonnull %13, ptr noundef nonnull %3, ptr noundef null, ptr noundef null, ptr noundef null, ptr noundef null) #3
%102 = icmp eq i64 %101, 0
br i1 %102, label %106, label %103
103: ; preds = %90
%104 = load i32, ptr @EINVAL, align 4, !tbaa !5
%105 = sub nsw i32 0, %104
br label %108
106: ; preds = %90
%107 = load i32, ptr %3, align 4, !tbaa !5
store i32 %107, ptr %0, align 4, !tbaa !26
br label %108
108: ; preds = %87, %106, %103, %78, %48, %33
%109 = phi i32 [ %35, %33 ], [ %50, %48 ], [ %80, %78 ], [ %105, %103 ], [ 0, %106 ], [ 0, %87 ]
%110 = call i32 @kfree(ptr noundef nonnull %13) #3
br label %111
111: ; preds = %2, %8, %108, %15
%112 = phi i32 [ %109, %108 ], [ %17, %15 ], [ 0, %8 ], [ 0, %2 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %112
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @cfg80211_find_vendor_ie(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare i64 @mwifiex_update_uap_custom_ie(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"cfg80211_beacon_data", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"ieee_types_header", !6, i64 0, !6, i64 4}
!15 = !{!14, !6, i64 4}
!16 = !{!17, !18, i64 24}
!17 = !{!"mwifiex_ie", !11, i64 0, !11, i64 8, !11, i64 16, !18, i64 24}
!18 = !{!"long", !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!22, !6, i64 0}
!22 = !{!"ieee80211_vendor_ie", !6, i64 0, !6, i64 4}
!23 = !{!17, !11, i64 16}
!24 = !{!17, !11, i64 8}
!25 = !{!17, !11, i64 0}
!26 = !{!27, !6, i64 0}
!27 = !{!"mwifiex_private", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/marvell/mwifiex/extr_ie.c_mwifiex_uap_parse_tail_ies.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/marvell/mwifiex/extr_ie.c_mwifiex_uap_parse_tail_ies.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MWIFIEX_AUTO_IDX_MASK = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@WLAN_OUI_MICROSOFT = common local_unnamed_addr global i32 0, align 4
@WLAN_OUI_TYPE_MICROSOFT_WMM = common local_unnamed_addr global i32 0, align 4
@IEEE_MAX_IE_SIZE = common local_unnamed_addr global i32 0, align 4
@WLAN_OUI_TYPE_MICROSOFT_WPA = common local_unnamed_addr global i32 0, align 4
@MGMT_MASK_BEACON = common local_unnamed_addr global i32 0, align 4
@MGMT_MASK_PROBE_RESP = common local_unnamed_addr global i32 0, align 4
@MGMT_MASK_ASSOC_RESP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mwifiex_uap_parse_tail_ies], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @mwifiex_uap_parse_tail_ies(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @MWIFIEX_AUTO_IDX_MASK, align 4, !tbaa !6
store i32 %4, ptr %3, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !10
%7 = icmp eq ptr %6, null
br i1 %7, label %111, label %8
8: ; preds = %2
%9 = load i32, ptr %1, align 8, !tbaa !13
%10 = icmp eq i32 %9, 0
br i1 %10, label %111, label %11
11: ; preds = %8
%12 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%13 = tail call ptr @kzalloc(i32 noundef 32, i32 noundef %12) #3
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%17 = sub nsw i32 0, %16
br label %111
18: ; preds = %11
%19 = load i32, ptr %1, align 8, !tbaa !13
%20 = icmp ugt i32 %19, 8
br i1 %20, label %21, label %63
21: ; preds = %18
%22 = getelementptr inbounds i8, ptr %13, i64 24
br label %23
23: ; preds = %21, %56
%24 = phi i32 [ 0, %21 ], [ %59, %56 ]
%25 = phi i32 [ %19, %21 ], [ %58, %56 ]
%26 = phi i32 [ 0, %21 ], [ %57, %56 ]
%27 = load ptr, ptr %5, align 8, !tbaa !10
%28 = sext i32 %24 to i64
%29 = getelementptr inbounds i32, ptr %27, i64 %28
%30 = load i32, ptr %29, align 4, !tbaa !14
%31 = add i32 %30, 8
%32 = icmp ugt i32 %31, %25
br i1 %32, label %33, label %36
33: ; preds = %23
%34 = load i32, ptr @EINVAL, align 4, !tbaa !6
%35 = sub nsw i32 0, %34
br label %108
36: ; preds = %23
%37 = getelementptr inbounds i8, ptr %29, i64 4
%38 = load i32, ptr %37, align 4, !tbaa !16
switch i32 %38, label %44 [
i32 132, label %56
i32 131, label %56
i32 138, label %56
i32 133, label %56
i32 137, label %56
i32 136, label %56
i32 135, label %56
i32 134, label %56
i32 129, label %56
i32 128, label %56
i32 130, label %39
]
39: ; preds = %36
%40 = load i32, ptr @WLAN_OUI_MICROSOFT, align 4, !tbaa !6
%41 = load i32, ptr @WLAN_OUI_TYPE_MICROSOFT_WMM, align 4, !tbaa !6
%42 = tail call i64 @cfg80211_find_vendor_ie(i32 noundef %40, i32 noundef %41, ptr noundef nonnull %29, i32 noundef %31) #3
%43 = icmp eq i64 %42, 0
br i1 %43, label %44, label %56
44: ; preds = %39, %36
%45 = add i32 %31, %26
%46 = load i32, ptr @IEEE_MAX_IE_SIZE, align 4, !tbaa !6
%47 = icmp ugt i32 %45, %46
br i1 %47, label %48, label %51
48: ; preds = %44
%49 = load i32, ptr @EINVAL, align 4, !tbaa !6
%50 = sub nsw i32 0, %49
br label %108
51: ; preds = %44
%52 = load i64, ptr %22, align 8, !tbaa !17
%53 = zext i32 %26 to i64
%54 = add nsw i64 %52, %53
%55 = tail call i32 @memcpy(i64 noundef %54, ptr noundef nonnull %29, i32 noundef %31) #3
br label %56
56: ; preds = %39, %36, %36, %36, %36, %36, %36, %36, %36, %36, %36, %51
%57 = phi i32 [ %45, %51 ], [ %26, %39 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ], [ %26, %36 ]
%58 = sub i32 %25, %31
%59 = add i32 %31, %24
%60 = icmp ugt i32 %58, 8
br i1 %60, label %23, label %61, !llvm.loop !20
61: ; preds = %56
%62 = load i32, ptr %1, align 8, !tbaa !13
br label %63
63: ; preds = %61, %18
%64 = phi i32 [ %19, %18 ], [ %62, %61 ]
%65 = phi i32 [ 0, %18 ], [ %57, %61 ]
%66 = load i32, ptr @WLAN_OUI_MICROSOFT, align 4, !tbaa !6
%67 = load i32, ptr @WLAN_OUI_TYPE_MICROSOFT_WPA, align 4, !tbaa !6
%68 = load ptr, ptr %5, align 8, !tbaa !10
%69 = tail call i64 @cfg80211_find_vendor_ie(i32 noundef %66, i32 noundef %67, ptr noundef %68, i32 noundef %64) #3
%70 = inttoptr i64 %69 to ptr
%71 = icmp eq i64 %69, 0
br i1 %71, label %87, label %72
72: ; preds = %63
%73 = load i32, ptr %70, align 4, !tbaa !22
%74 = add i32 %73, 8
%75 = add i32 %74, %65
%76 = load i32, ptr @IEEE_MAX_IE_SIZE, align 4, !tbaa !6
%77 = icmp ugt i32 %75, %76
br i1 %77, label %78, label %81
78: ; preds = %72
%79 = load i32, ptr @EINVAL, align 4, !tbaa !6
%80 = sub nsw i32 0, %79
br label %108
81: ; preds = %72
%82 = getelementptr inbounds i8, ptr %13, i64 24
%83 = load i64, ptr %82, align 8, !tbaa !17
%84 = zext i32 %65 to i64
%85 = add nsw i64 %83, %84
%86 = tail call i32 @memcpy(i64 noundef %85, ptr noundef nonnull %70, i32 noundef %74) #3
br label %87
87: ; preds = %81, %63
%88 = phi i32 [ %75, %81 ], [ %65, %63 ]
%89 = icmp eq i32 %88, 0
br i1 %89, label %108, label %90
90: ; preds = %87
%91 = tail call ptr @cpu_to_le16(i32 noundef %4) #3
%92 = getelementptr inbounds i8, ptr %13, i64 16
store ptr %91, ptr %92, align 8, !tbaa !24
%93 = load i32, ptr @MGMT_MASK_BEACON, align 4, !tbaa !6
%94 = load i32, ptr @MGMT_MASK_PROBE_RESP, align 4, !tbaa !6
%95 = or i32 %94, %93
%96 = load i32, ptr @MGMT_MASK_ASSOC_RESP, align 4, !tbaa !6
%97 = or i32 %95, %96
%98 = tail call ptr @cpu_to_le16(i32 noundef %97) #3
%99 = getelementptr inbounds i8, ptr %13, i64 8
store ptr %98, ptr %99, align 8, !tbaa !25
%100 = tail call ptr @cpu_to_le16(i32 noundef %88) #3
store ptr %100, ptr %13, align 8, !tbaa !26
%101 = call i64 @mwifiex_update_uap_custom_ie(ptr noundef %0, ptr noundef nonnull %13, ptr noundef nonnull %3, ptr noundef null, ptr noundef null, ptr noundef null, ptr noundef null) #3
%102 = icmp eq i64 %101, 0
br i1 %102, label %106, label %103
103: ; preds = %90
%104 = load i32, ptr @EINVAL, align 4, !tbaa !6
%105 = sub nsw i32 0, %104
br label %108
106: ; preds = %90
%107 = load i32, ptr %3, align 4, !tbaa !6
store i32 %107, ptr %0, align 4, !tbaa !27
br label %108
108: ; preds = %87, %106, %103, %78, %48, %33
%109 = phi i32 [ %35, %33 ], [ %50, %48 ], [ %80, %78 ], [ %105, %103 ], [ 0, %106 ], [ 0, %87 ]
%110 = call i32 @kfree(ptr noundef nonnull %13) #3
br label %111
111: ; preds = %2, %8, %108, %15
%112 = phi i32 [ %109, %108 ], [ %17, %15 ], [ 0, %8 ], [ 0, %2 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %112
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @cfg80211_find_vendor_ie(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare i64 @mwifiex_update_uap_custom_ie(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"cfg80211_beacon_data", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"ieee_types_header", !7, i64 0, !7, i64 4}
!16 = !{!15, !7, i64 4}
!17 = !{!18, !19, i64 24}
!18 = !{!"mwifiex_ie", !12, i64 0, !12, i64 8, !12, i64 16, !19, i64 24}
!19 = !{!"long", !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!23, !7, i64 0}
!23 = !{!"ieee80211_vendor_ie", !7, i64 0, !7, i64 4}
!24 = !{!18, !12, i64 16}
!25 = !{!18, !12, i64 8}
!26 = !{!18, !12, i64 0}
!27 = !{!28, !7, i64 0}
!28 = !{!"mwifiex_private", !7, i64 0}
| linux_drivers_net_wireless_marvell_mwifiex_extr_ie.c_mwifiex_uap_parse_tail_ies |
; ModuleID = 'AnghaBench/freebsd/sys/geom/linux_lvm/extr_g_linux_lvm.c_llvm_grab_name.c'
source_filename = "AnghaBench/freebsd/sys/geom/linux_lvm/extr_g_linux_lvm.c_llvm_grab_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [2 x i8] c".\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"..\00", align 1
@G_LLVM_NAMELEN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @llvm_grab_name], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i64 @llvm_grab_name(ptr noundef %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %42, label %4
4: ; preds = %2
%5 = load i8, ptr %1, align 1, !tbaa !5
%6 = icmp eq i8 %5, 45
br i1 %6, label %42, label %7
7: ; preds = %4
%8 = tail call i64 @strcmp(ptr noundef nonnull %1, ptr noundef nonnull @.str) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %42, label %10
10: ; preds = %7
%11 = tail call i64 @strcmp(ptr noundef nonnull %1, ptr noundef nonnull @.str.1) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %42, label %13
13: ; preds = %10
%14 = load i8, ptr %1, align 1, !tbaa !5
%15 = icmp eq i8 %14, 0
br i1 %15, label %38, label %16
16: ; preds = %13, %33
%17 = phi i8 [ %36, %33 ], [ %14, %13 ]
%18 = phi ptr [ %35, %33 ], [ %1, %13 ]
%19 = phi i64 [ %34, %33 ], [ 0, %13 ]
%20 = tail call i64 @isalpha(i8 noundef signext %17) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %28
22: ; preds = %16
%23 = load i8, ptr %18, align 1, !tbaa !5
%24 = tail call i64 @isdigit(i8 noundef signext %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %22
%27 = load i8, ptr %18, align 1, !tbaa !5
switch i8 %27, label %38 [
i8 46, label %28
i8 95, label %28
i8 45, label %28
i8 43, label %28
]
28: ; preds = %26, %26, %26, %26, %22, %16
%29 = load i32, ptr @G_LLVM_NAMELEN, align 4, !tbaa !8
%30 = add nsw i32 %29, -1
%31 = sext i32 %30 to i64
%32 = icmp ult i64 %19, %31
br i1 %32, label %33, label %38
33: ; preds = %28
%34 = add nuw i64 %19, 1
%35 = getelementptr inbounds i8, ptr %1, i64 %34
%36 = load i8, ptr %35, align 1, !tbaa !5
%37 = icmp eq i8 %36, 0
br i1 %37, label %38, label %16, !llvm.loop !10
38: ; preds = %28, %33, %26, %13
%39 = phi i64 [ 0, %13 ], [ %19, %26 ], [ %34, %33 ], [ %19, %28 ]
%40 = tail call i32 @bcopy(ptr noundef nonnull %1, ptr noundef %0, i64 noundef %39) #2
%41 = getelementptr inbounds i8, ptr %0, i64 %39
store i8 0, ptr %41, align 1, !tbaa !5
br label %42
42: ; preds = %7, %10, %4, %2, %38
%43 = phi i64 [ %39, %38 ], [ 0, %2 ], [ 0, %4 ], [ 0, %10 ], [ 0, %7 ]
ret i64 %43
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @isalpha(i8 noundef signext) local_unnamed_addr #1
declare i64 @isdigit(i8 noundef signext) local_unnamed_addr #1
declare i32 @bcopy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/geom/linux_lvm/extr_g_linux_lvm.c_llvm_grab_name.c'
source_filename = "AnghaBench/freebsd/sys/geom/linux_lvm/extr_g_linux_lvm.c_llvm_grab_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [2 x i8] c".\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"..\00", align 1
@G_LLVM_NAMELEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @llvm_grab_name], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i64 @llvm_grab_name(ptr noundef %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %42, label %4
4: ; preds = %2
%5 = load i8, ptr %1, align 1, !tbaa !6
%6 = icmp eq i8 %5, 45
br i1 %6, label %42, label %7
7: ; preds = %4
%8 = tail call i64 @strcmp(ptr noundef nonnull %1, ptr noundef nonnull @.str) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %42, label %10
10: ; preds = %7
%11 = tail call i64 @strcmp(ptr noundef nonnull %1, ptr noundef nonnull @.str.1) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %42, label %13
13: ; preds = %10
%14 = load i8, ptr %1, align 1, !tbaa !6
%15 = icmp eq i8 %14, 0
br i1 %15, label %38, label %16
16: ; preds = %13, %33
%17 = phi i8 [ %36, %33 ], [ %14, %13 ]
%18 = phi i64 [ %34, %33 ], [ 0, %13 ]
%19 = getelementptr inbounds i8, ptr %1, i64 %18
%20 = tail call i64 @isalpha(i8 noundef signext %17) #2
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %28
22: ; preds = %16
%23 = load i8, ptr %19, align 1, !tbaa !6
%24 = tail call i64 @isdigit(i8 noundef signext %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %28
26: ; preds = %22
%27 = load i8, ptr %19, align 1, !tbaa !6
switch i8 %27, label %38 [
i8 46, label %28
i8 95, label %28
i8 45, label %28
i8 43, label %28
]
28: ; preds = %26, %26, %26, %26, %22, %16
%29 = load i32, ptr @G_LLVM_NAMELEN, align 4, !tbaa !9
%30 = add nsw i32 %29, -1
%31 = sext i32 %30 to i64
%32 = icmp ult i64 %18, %31
br i1 %32, label %33, label %38
33: ; preds = %28
%34 = add nuw i64 %18, 1
%35 = getelementptr inbounds i8, ptr %1, i64 %34
%36 = load i8, ptr %35, align 1, !tbaa !6
%37 = icmp eq i8 %36, 0
br i1 %37, label %38, label %16, !llvm.loop !11
38: ; preds = %28, %33, %26, %13
%39 = phi i64 [ 0, %13 ], [ %18, %26 ], [ %34, %33 ], [ %18, %28 ]
%40 = tail call i32 @bcopy(ptr noundef nonnull %1, ptr noundef %0, i64 noundef %39) #2
%41 = getelementptr inbounds i8, ptr %0, i64 %39
store i8 0, ptr %41, align 1, !tbaa !6
br label %42
42: ; preds = %7, %10, %4, %2, %38
%43 = phi i64 [ %39, %38 ], [ 0, %2 ], [ 0, %4 ], [ 0, %10 ], [ 0, %7 ]
ret i64 %43
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @isalpha(i8 noundef signext) local_unnamed_addr #1
declare i64 @isdigit(i8 noundef signext) local_unnamed_addr #1
declare i32 @bcopy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_geom_linux_lvm_extr_g_linux_lvm.c_llvm_grab_name |
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm9705.c_wm9705_soc_probe.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm9705.c_wm9705_soc_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wm9705_priv = type { ptr, ptr }
%struct.TYPE_2__ = type { ptr, ptr }
@CONFIG_SND_SOC_AC97_BUS = dso_local local_unnamed_addr global i32 0, align 4
@WM9705_VENDOR_ID = dso_local local_unnamed_addr global i32 0, align 4
@WM9705_VENDOR_ID_MASK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Failed to register AC97 codec\0A\00", align 1
@wm9705_regmap_config = dso_local global i32 0, align 4
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wm9705_soc_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @wm9705_soc_probe(ptr noundef %0) #0 {
%2 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.wm9705_priv, ptr %2, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %4, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !10
store ptr %8, ptr %2, align 8, !tbaa !12
%9 = load ptr, ptr %4, align 8, !tbaa !13
br label %37
10: ; preds = %1
%11 = load i32, ptr @CONFIG_SND_SOC_AC97_BUS, align 4, !tbaa !14
%12 = tail call i64 @IS_ENABLED(i32 noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %34, label %14
14: ; preds = %10
%15 = load i32, ptr @WM9705_VENDOR_ID, align 4, !tbaa !14
%16 = load i32, ptr @WM9705_VENDOR_ID_MASK, align 4, !tbaa !14
%17 = tail call ptr @snd_soc_new_ac97_component(ptr noundef %0, i32 noundef %15, i32 noundef %16) #2
store ptr %17, ptr %2, align 8, !tbaa !12
%18 = tail call i64 @IS_ERR(ptr noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %25, label %20
20: ; preds = %14
%21 = load i32, ptr %0, align 4, !tbaa !16
%22 = tail call i32 @dev_err(i32 noundef %21, ptr noundef nonnull @.str) #2
%23 = load ptr, ptr %2, align 8, !tbaa !12
%24 = tail call i32 @PTR_ERR(ptr noundef %23) #2
br label %42
25: ; preds = %14
%26 = load ptr, ptr %2, align 8, !tbaa !12
%27 = tail call ptr @regmap_init_ac97(ptr noundef %26, ptr noundef nonnull @wm9705_regmap_config) #2
%28 = tail call i64 @IS_ERR(ptr noundef %27) #2
%29 = icmp eq i64 %28, 0
%30 = load ptr, ptr %2, align 8, !tbaa !12
br i1 %29, label %37, label %31
31: ; preds = %25
%32 = tail call i32 @snd_soc_free_ac97_component(ptr noundef %30) #2
%33 = tail call i32 @PTR_ERR(ptr noundef %27) #2
br label %42
34: ; preds = %10
%35 = load i32, ptr @ENXIO, align 4, !tbaa !14
%36 = sub nsw i32 0, %35
br label %42
37: ; preds = %25, %6
%38 = phi ptr [ %8, %6 ], [ %30, %25 ]
%39 = phi ptr [ %9, %6 ], [ %27, %25 ]
%40 = tail call i32 @snd_soc_component_set_drvdata(ptr noundef %0, ptr noundef %38) #2
%41 = tail call i32 @snd_soc_component_init_regmap(ptr noundef %0, ptr noundef %39) #2
br label %42
42: ; preds = %37, %34, %31, %20
%43 = phi i32 [ 0, %37 ], [ %24, %20 ], [ %33, %31 ], [ %36, %34 ]
ret i32 %43
}
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i64 @IS_ENABLED(i32 noundef) local_unnamed_addr #1
declare ptr @snd_soc_new_ac97_component(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare ptr @regmap_init_ac97(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_free_ac97_component(ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_init_regmap(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"wm9705_priv", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_2__", !7, i64 0, !7, i64 8}
!12 = !{!6, !7, i64 0}
!13 = !{!11, !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"snd_soc_component", !15, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm9705.c_wm9705_soc_probe.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm9705.c_wm9705_soc_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CONFIG_SND_SOC_AC97_BUS = common local_unnamed_addr global i32 0, align 4
@WM9705_VENDOR_ID = common local_unnamed_addr global i32 0, align 4
@WM9705_VENDOR_ID_MASK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [31 x i8] c"Failed to register AC97 codec\0A\00", align 1
@wm9705_regmap_config = common global i32 0, align 4
@ENXIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wm9705_soc_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @wm9705_soc_probe(ptr noundef %0) #0 {
%2 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %4, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !11
store ptr %8, ptr %2, align 8, !tbaa !13
%9 = load ptr, ptr %4, align 8, !tbaa !14
br label %37
10: ; preds = %1
%11 = load i32, ptr @CONFIG_SND_SOC_AC97_BUS, align 4, !tbaa !15
%12 = tail call i64 @IS_ENABLED(i32 noundef %11) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %34, label %14
14: ; preds = %10
%15 = load i32, ptr @WM9705_VENDOR_ID, align 4, !tbaa !15
%16 = load i32, ptr @WM9705_VENDOR_ID_MASK, align 4, !tbaa !15
%17 = tail call ptr @snd_soc_new_ac97_component(ptr noundef %0, i32 noundef %15, i32 noundef %16) #2
store ptr %17, ptr %2, align 8, !tbaa !13
%18 = tail call i64 @IS_ERR(ptr noundef %17) #2
%19 = icmp eq i64 %18, 0
br i1 %19, label %25, label %20
20: ; preds = %14
%21 = load i32, ptr %0, align 4, !tbaa !17
%22 = tail call i32 @dev_err(i32 noundef %21, ptr noundef nonnull @.str) #2
%23 = load ptr, ptr %2, align 8, !tbaa !13
%24 = tail call i32 @PTR_ERR(ptr noundef %23) #2
br label %42
25: ; preds = %14
%26 = load ptr, ptr %2, align 8, !tbaa !13
%27 = tail call ptr @regmap_init_ac97(ptr noundef %26, ptr noundef nonnull @wm9705_regmap_config) #2
%28 = tail call i64 @IS_ERR(ptr noundef %27) #2
%29 = icmp eq i64 %28, 0
%30 = load ptr, ptr %2, align 8, !tbaa !13
br i1 %29, label %37, label %31
31: ; preds = %25
%32 = tail call i32 @snd_soc_free_ac97_component(ptr noundef %30) #2
%33 = tail call i32 @PTR_ERR(ptr noundef %27) #2
br label %42
34: ; preds = %10
%35 = load i32, ptr @ENXIO, align 4, !tbaa !15
%36 = sub nsw i32 0, %35
br label %42
37: ; preds = %25, %6
%38 = phi ptr [ %8, %6 ], [ %30, %25 ]
%39 = phi ptr [ %9, %6 ], [ %27, %25 ]
%40 = tail call i32 @snd_soc_component_set_drvdata(ptr noundef %0, ptr noundef %38) #2
%41 = tail call i32 @snd_soc_component_init_regmap(ptr noundef %0, ptr noundef %39) #2
br label %42
42: ; preds = %37, %34, %31, %20
%43 = phi i32 [ 0, %37 ], [ %24, %20 ], [ %33, %31 ], [ %36, %34 ]
ret i32 %43
}
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i64 @IS_ENABLED(i32 noundef) local_unnamed_addr #1
declare ptr @snd_soc_new_ac97_component(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare ptr @regmap_init_ac97(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_free_ac97_component(ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_init_regmap(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"wm9705_priv", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"TYPE_2__", !8, i64 0, !8, i64 8}
!13 = !{!7, !8, i64 0}
!14 = !{!12, !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"snd_soc_component", !16, i64 0}
| linux_sound_soc_codecs_extr_wm9705.c_wm9705_soc_probe |
; ModuleID = 'AnghaBench/nodemcu-firmware/app/modules/extr_sjson.c_output_utf8.c'
source_filename = "AnghaBench/nodemcu-firmware/app/modules/extr_sjson.c_output_utf8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @output_utf8], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @output_utf8(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca [4 x i8], align 1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = icmp slt i32 %1, 128
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = trunc i32 %1 to i8
%7 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %6, ptr %3, align 1, !tbaa !5
br label %63
8: ; preds = %2
%9 = icmp ult i32 %1, 2048
br i1 %9, label %10, label %19
10: ; preds = %8
%11 = lshr i32 %1, 6
%12 = trunc i32 %11 to i8
%13 = or disjoint i8 %12, -64
%14 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %13, ptr %3, align 1, !tbaa !5
%15 = trunc i32 %1 to i8
%16 = and i8 %15, 63
%17 = or disjoint i8 %16, -128
%18 = getelementptr inbounds i8, ptr %3, i64 2
store i8 %17, ptr %14, align 1, !tbaa !5
br label %63
19: ; preds = %8
%20 = and i32 %1, 2147481600
%21 = icmp eq i32 %20, 55296
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = getelementptr inbounds i8, ptr %3, i64 1
store i8 63, ptr %3, align 1, !tbaa !5
br label %63
24: ; preds = %19
%25 = icmp ult i32 %1, 65536
br i1 %25, label %26, label %40
26: ; preds = %24
%27 = lshr i32 %1, 12
%28 = trunc i32 %27 to i8
%29 = or disjoint i8 %28, -32
%30 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %29, ptr %3, align 1, !tbaa !5
%31 = lshr i32 %1, 6
%32 = trunc i32 %31 to i8
%33 = and i8 %32, 63
%34 = or disjoint i8 %33, -128
%35 = getelementptr inbounds i8, ptr %3, i64 2
store i8 %34, ptr %30, align 1, !tbaa !5
%36 = trunc i32 %1 to i8
%37 = and i8 %36, 63
%38 = or disjoint i8 %37, -128
%39 = getelementptr inbounds i8, ptr %3, i64 3
store i8 %38, ptr %35, align 1, !tbaa !5
br label %63
40: ; preds = %24
%41 = icmp ult i32 %1, 1114112
br i1 %41, label %42, label %61
42: ; preds = %40
%43 = lshr i32 %1, 18
%44 = trunc i32 %43 to i8
%45 = or disjoint i8 %44, -16
%46 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %45, ptr %3, align 1, !tbaa !5
%47 = lshr i32 %1, 12
%48 = trunc i32 %47 to i8
%49 = and i8 %48, 63
%50 = or disjoint i8 %49, -128
%51 = getelementptr inbounds i8, ptr %3, i64 2
store i8 %50, ptr %46, align 1, !tbaa !5
%52 = lshr i32 %1, 6
%53 = trunc i32 %52 to i8
%54 = and i8 %53, 63
%55 = or disjoint i8 %54, -128
%56 = getelementptr inbounds i8, ptr %3, i64 3
store i8 %55, ptr %51, align 1, !tbaa !5
%57 = trunc i32 %1 to i8
%58 = and i8 %57, 63
%59 = or disjoint i8 %58, -128
%60 = getelementptr inbounds i8, ptr %3, i64 4
store i8 %59, ptr %56, align 1, !tbaa !5
br label %63
61: ; preds = %40
%62 = getelementptr inbounds i8, ptr %3, i64 1
store i8 63, ptr %3, align 1, !tbaa !5
br label %63
63: ; preds = %10, %26, %61, %42, %22, %5
%64 = phi ptr [ %7, %5 ], [ %18, %10 ], [ %23, %22 ], [ %39, %26 ], [ %60, %42 ], [ %62, %61 ]
%65 = ptrtoint ptr %64 to i64
%66 = ptrtoint ptr %3 to i64
%67 = sub i64 %65, %66
%68 = trunc i64 %67 to i32
%69 = call i32 @luaL_addlstring(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %68) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @luaL_addlstring(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/nodemcu-firmware/app/modules/extr_sjson.c_output_utf8.c'
source_filename = "AnghaBench/nodemcu-firmware/app/modules/extr_sjson.c_output_utf8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @output_utf8], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @output_utf8(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca [4 x i8], align 1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = icmp slt i32 %1, 128
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = trunc i32 %1 to i8
%7 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %6, ptr %3, align 1, !tbaa !6
br label %63
8: ; preds = %2
%9 = icmp ult i32 %1, 2048
br i1 %9, label %10, label %19
10: ; preds = %8
%11 = lshr i32 %1, 6
%12 = trunc nuw i32 %11 to i8
%13 = or disjoint i8 %12, -64
%14 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %13, ptr %3, align 1, !tbaa !6
%15 = trunc i32 %1 to i8
%16 = and i8 %15, 63
%17 = or disjoint i8 %16, -128
%18 = getelementptr inbounds i8, ptr %3, i64 2
store i8 %17, ptr %14, align 1, !tbaa !6
br label %63
19: ; preds = %8
%20 = and i32 %1, 2147481600
%21 = icmp eq i32 %20, 55296
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = getelementptr inbounds i8, ptr %3, i64 1
store i8 63, ptr %3, align 1, !tbaa !6
br label %63
24: ; preds = %19
%25 = icmp ult i32 %1, 65536
br i1 %25, label %26, label %40
26: ; preds = %24
%27 = lshr i32 %1, 12
%28 = trunc nuw i32 %27 to i8
%29 = or disjoint i8 %28, -32
%30 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %29, ptr %3, align 1, !tbaa !6
%31 = lshr i32 %1, 6
%32 = trunc i32 %31 to i8
%33 = and i8 %32, 63
%34 = or disjoint i8 %33, -128
%35 = getelementptr inbounds i8, ptr %3, i64 2
store i8 %34, ptr %30, align 1, !tbaa !6
%36 = trunc i32 %1 to i8
%37 = and i8 %36, 63
%38 = or disjoint i8 %37, -128
%39 = getelementptr inbounds i8, ptr %3, i64 3
store i8 %38, ptr %35, align 1, !tbaa !6
br label %63
40: ; preds = %24
%41 = icmp ult i32 %1, 1114112
br i1 %41, label %42, label %61
42: ; preds = %40
%43 = lshr i32 %1, 18
%44 = trunc nuw i32 %43 to i8
%45 = or disjoint i8 %44, -16
%46 = getelementptr inbounds i8, ptr %3, i64 1
store i8 %45, ptr %3, align 1, !tbaa !6
%47 = lshr i32 %1, 12
%48 = trunc i32 %47 to i8
%49 = and i8 %48, 63
%50 = or disjoint i8 %49, -128
%51 = getelementptr inbounds i8, ptr %3, i64 2
store i8 %50, ptr %46, align 1, !tbaa !6
%52 = lshr i32 %1, 6
%53 = trunc i32 %52 to i8
%54 = and i8 %53, 63
%55 = or disjoint i8 %54, -128
%56 = getelementptr inbounds i8, ptr %3, i64 3
store i8 %55, ptr %51, align 1, !tbaa !6
%57 = trunc i32 %1 to i8
%58 = and i8 %57, 63
%59 = or disjoint i8 %58, -128
%60 = getelementptr inbounds i8, ptr %3, i64 4
store i8 %59, ptr %56, align 1, !tbaa !6
br label %63
61: ; preds = %40
%62 = getelementptr inbounds i8, ptr %3, i64 1
store i8 63, ptr %3, align 1, !tbaa !6
br label %63
63: ; preds = %10, %26, %61, %42, %22, %5
%64 = phi ptr [ %7, %5 ], [ %18, %10 ], [ %23, %22 ], [ %39, %26 ], [ %60, %42 ], [ %62, %61 ]
%65 = ptrtoint ptr %64 to i64
%66 = ptrtoint ptr %3 to i64
%67 = sub i64 %65, %66
%68 = trunc i64 %67 to i32
%69 = call i32 @luaL_addlstring(ptr noundef %0, ptr noundef nonnull %3, i32 noundef %68) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @luaL_addlstring(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| nodemcu-firmware_app_modules_extr_sjson.c_output_utf8 |
; ModuleID = 'AnghaBench/freebsd/contrib/elftoolchain/libelf/extr_elf_flag.c_elf_flagarhdr.c'
source_filename = "AnghaBench/freebsd/contrib/elftoolchain/libelf/extr_elf_flag.c_elf_flagarhdr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ELF_C_SET = dso_local local_unnamed_addr global i64 0, align 8
@ELF_C_CLR = dso_local local_unnamed_addr global i64 0, align 8
@ELF_F_DIRTY = dso_local local_unnamed_addr global i32 0, align 4
@ARGUMENT = dso_local local_unnamed_addr global i32 0, align 4
@LIBELF_F_API_MASK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @elf_flagarhdr(ptr noundef %0, i64 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %31, label %5
5: ; preds = %3
%6 = load i64, ptr @ELF_C_SET, align 8, !tbaa !5
%7 = icmp eq i64 %6, %1
%8 = load i64, ptr @ELF_C_CLR, align 8
%9 = icmp eq i64 %8, %1
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = load i32, ptr @ELF_F_DIRTY, align 4, !tbaa !9
%13 = xor i32 %12, -1
%14 = and i32 %13, %2
%15 = icmp eq i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %5, %11
%17 = load i32, ptr @ARGUMENT, align 4, !tbaa !9
%18 = tail call i32 @LIBELF_SET_ERROR(i32 noundef %17, i32 noundef 0) #2
br label %31
19: ; preds = %11
br i1 %7, label %20, label %23
20: ; preds = %19
%21 = load i32, ptr %0, align 4, !tbaa !11
%22 = or i32 %21, %2
br label %27
23: ; preds = %19
%24 = xor i32 %2, -1
%25 = load i32, ptr %0, align 4, !tbaa !11
%26 = and i32 %25, %24
br label %27
27: ; preds = %23, %20
%28 = phi i32 [ %26, %23 ], [ %22, %20 ]
store i32 %28, ptr %0, align 4, !tbaa !11
%29 = load i32, ptr @LIBELF_F_API_MASK, align 4, !tbaa !9
%30 = and i32 %29, %28
br label %31
31: ; preds = %3, %27, %16
%32 = phi i32 [ 0, %16 ], [ %30, %27 ], [ 0, %3 ]
ret i32 %32
}
declare i32 @LIBELF_SET_ERROR(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_3__", !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/elftoolchain/libelf/extr_elf_flag.c_elf_flagarhdr.c'
source_filename = "AnghaBench/freebsd/contrib/elftoolchain/libelf/extr_elf_flag.c_elf_flagarhdr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ELF_C_SET = common local_unnamed_addr global i64 0, align 8
@ELF_C_CLR = common local_unnamed_addr global i64 0, align 8
@ELF_F_DIRTY = common local_unnamed_addr global i32 0, align 4
@ARGUMENT = common local_unnamed_addr global i32 0, align 4
@LIBELF_F_API_MASK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @elf_flagarhdr(ptr noundef %0, i64 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %31, label %5
5: ; preds = %3
%6 = load i64, ptr @ELF_C_SET, align 8, !tbaa !6
%7 = icmp eq i64 %6, %1
%8 = load i64, ptr @ELF_C_CLR, align 8
%9 = icmp eq i64 %8, %1
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = load i32, ptr @ELF_F_DIRTY, align 4, !tbaa !10
%13 = xor i32 %12, -1
%14 = and i32 %13, %2
%15 = icmp eq i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %5, %11
%17 = load i32, ptr @ARGUMENT, align 4, !tbaa !10
%18 = tail call i32 @LIBELF_SET_ERROR(i32 noundef %17, i32 noundef 0) #2
br label %31
19: ; preds = %11
br i1 %7, label %20, label %23
20: ; preds = %19
%21 = load i32, ptr %0, align 4, !tbaa !12
%22 = or i32 %21, %2
br label %27
23: ; preds = %19
%24 = xor i32 %2, -1
%25 = load i32, ptr %0, align 4, !tbaa !12
%26 = and i32 %25, %24
br label %27
27: ; preds = %23, %20
%28 = phi i32 [ %26, %23 ], [ %22, %20 ]
store i32 %28, ptr %0, align 4, !tbaa !12
%29 = load i32, ptr @LIBELF_F_API_MASK, align 4, !tbaa !10
%30 = and i32 %29, %28
br label %31
31: ; preds = %3, %27, %16
%32 = phi i32 [ 0, %16 ], [ %30, %27 ], [ 0, %3 ]
ret i32 %32
}
declare i32 @LIBELF_SET_ERROR(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_3__", !11, i64 0}
| freebsd_contrib_elftoolchain_libelf_extr_elf_flag.c_elf_flagarhdr |
; ModuleID = 'AnghaBench/jemalloc/src/extr_ckh.c_ckh_shrink.c'
source_filename = "AnghaBench/jemalloc/src/extr_ckh.c_ckh_shrink.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32, ptr, i32 }
@LG_CKH_BUCKET_CELLS = dso_local local_unnamed_addr global i32 0, align 4
@CACHELINE = dso_local local_unnamed_addr global i32 0, align 4
@SC_LARGE_MAXCLASS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ckh_shrink], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ckh_shrink(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 8, !tbaa !5
%4 = load i32, ptr @LG_CKH_BUCKET_CELLS, align 4, !tbaa !11
%5 = add i32 %3, -1
%6 = add i32 %5, %4
%7 = zext nneg i32 %6 to i64
%8 = shl i64 4, %7
%9 = trunc i64 %8 to i32
%10 = load i32, ptr @CACHELINE, align 4, !tbaa !11
%11 = tail call i64 @sz_sa2u(i32 noundef %9, i32 noundef %10) #2
%12 = load i64, ptr @SC_LARGE_MAXCLASS, align 8
%13 = freeze i64 %12
%14 = add i64 %11, -1
%15 = icmp uge i64 %14, %13
%16 = zext i1 %15 to i32
%17 = tail call i64 @unlikely(i32 noundef %16) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %39
19: ; preds = %2
%20 = tail call i32 @tsd_tsdn(ptr noundef %0) #2
%21 = load i32, ptr @CACHELINE, align 4, !tbaa !11
%22 = tail call i32 @arena_ichoose(ptr noundef %0, ptr noundef null) #2
%23 = tail call i64 @ipallocztm(i32 noundef %20, i64 noundef %11, i32 noundef %21, i32 noundef 1, ptr noundef null, i32 noundef 1, i32 noundef %22) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %39, label %25
25: ; preds = %19
%26 = inttoptr i64 %23 to ptr
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 2
%28 = load ptr, ptr %27, align 8, !tbaa !12
store ptr %26, ptr %27, align 8, !tbaa !12
%29 = load i32, ptr @LG_CKH_BUCKET_CELLS, align 4, !tbaa !11
%30 = sub i32 %6, %29
store i32 %30, ptr %1, align 8, !tbaa !5
%31 = tail call i32 @ckh_rebuild(ptr noundef nonnull %1, ptr noundef %28) #2
%32 = icmp eq i32 %31, 0
%33 = tail call i32 @tsd_tsdn(ptr noundef %0) #2
br i1 %32, label %34, label %36
34: ; preds = %25
%35 = tail call i32 @idalloctm(i32 noundef %33, ptr noundef %28, ptr noundef null, ptr noundef null, i32 noundef 1, i32 noundef 1) #2
br label %39
36: ; preds = %25
%37 = load ptr, ptr %27, align 8, !tbaa !12
%38 = tail call i32 @idalloctm(i32 noundef %33, ptr noundef %37, ptr noundef null, ptr noundef null, i32 noundef 1, i32 noundef 1) #2
store ptr %28, ptr %27, align 8, !tbaa !12
store i32 %3, ptr %1, align 8, !tbaa !5
br label %39
39: ; preds = %19, %2, %36, %34
ret void
}
declare i64 @sz_sa2u(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i64 @ipallocztm(i32 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsd_tsdn(ptr noundef) local_unnamed_addr #1
declare i32 @arena_ichoose(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ckh_rebuild(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @idalloctm(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/jemalloc/src/extr_ckh.c_ckh_shrink.c'
source_filename = "AnghaBench/jemalloc/src/extr_ckh.c_ckh_shrink.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LG_CKH_BUCKET_CELLS = common local_unnamed_addr global i32 0, align 4
@CACHELINE = common local_unnamed_addr global i32 0, align 4
@SC_LARGE_MAXCLASS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @ckh_shrink], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ckh_shrink(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 8, !tbaa !6
%4 = load i32, ptr @LG_CKH_BUCKET_CELLS, align 4, !tbaa !12
%5 = add i32 %3, -1
%6 = add i32 %5, %4
%7 = zext nneg i32 %6 to i64
%8 = shl i64 4, %7
%9 = trunc i64 %8 to i32
%10 = load i32, ptr @CACHELINE, align 4, !tbaa !12
%11 = tail call i64 @sz_sa2u(i32 noundef %9, i32 noundef %10) #2
%12 = load i64, ptr @SC_LARGE_MAXCLASS, align 8
%13 = freeze i64 %12
%14 = add i64 %11, -1
%15 = icmp uge i64 %14, %13
%16 = zext i1 %15 to i32
%17 = tail call i64 @unlikely(i32 noundef %16) #2
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %39
19: ; preds = %2
%20 = tail call i32 @tsd_tsdn(ptr noundef %0) #2
%21 = load i32, ptr @CACHELINE, align 4, !tbaa !12
%22 = tail call i32 @arena_ichoose(ptr noundef %0, ptr noundef null) #2
%23 = tail call i64 @ipallocztm(i32 noundef %20, i64 noundef %11, i32 noundef %21, i32 noundef 1, ptr noundef null, i32 noundef 1, i32 noundef %22) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %39, label %25
25: ; preds = %19
%26 = inttoptr i64 %23 to ptr
%27 = getelementptr inbounds i8, ptr %1, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !13
store ptr %26, ptr %27, align 8, !tbaa !13
%29 = load i32, ptr @LG_CKH_BUCKET_CELLS, align 4, !tbaa !12
%30 = sub i32 %6, %29
store i32 %30, ptr %1, align 8, !tbaa !6
%31 = tail call i32 @ckh_rebuild(ptr noundef nonnull %1, ptr noundef %28) #2
%32 = icmp eq i32 %31, 0
%33 = tail call i32 @tsd_tsdn(ptr noundef %0) #2
br i1 %32, label %34, label %36
34: ; preds = %25
%35 = tail call i32 @idalloctm(i32 noundef %33, ptr noundef %28, ptr noundef null, ptr noundef null, i32 noundef 1, i32 noundef 1) #2
br label %39
36: ; preds = %25
%37 = load ptr, ptr %27, align 8, !tbaa !13
%38 = tail call i32 @idalloctm(i32 noundef %33, ptr noundef %37, ptr noundef null, ptr noundef null, i32 noundef 1, i32 noundef 1) #2
store ptr %28, ptr %27, align 8, !tbaa !13
store i32 %3, ptr %1, align 8, !tbaa !6
br label %39
39: ; preds = %19, %2, %36, %34
ret void
}
declare i64 @sz_sa2u(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i64 @ipallocztm(i32 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsd_tsdn(ptr noundef) local_unnamed_addr #1
declare i32 @arena_ichoose(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ckh_rebuild(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @idalloctm(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
| jemalloc_src_extr_ckh.c_ckh_shrink |
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_perf_event_release_pmc.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_perf_event_release_pmc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@active_events = dso_local global i32 0, align 4
@pmc_grab_mutex = dso_local global i32 0, align 4
@nmi_active = dso_local global i32 0, align 4
@start_nmi_watchdog = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @perf_event_release_pmc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @perf_event_release_pmc() #0 {
%1 = tail call i64 @atomic_dec_and_mutex_lock(ptr noundef nonnull @active_events, ptr noundef nonnull @pmc_grab_mutex) #2
%2 = icmp eq i64 %1, 0
br i1 %2, label %11, label %3
3: ; preds = %0
%4 = tail call i64 @atomic_read(ptr noundef nonnull @nmi_active) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @start_nmi_watchdog, align 4, !tbaa !5
%8 = tail call i32 @on_each_cpu(i32 noundef %7, ptr noundef null, i32 noundef 1) #2
br label %9
9: ; preds = %6, %3
%10 = tail call i32 @mutex_unlock(ptr noundef nonnull @pmc_grab_mutex) #2
br label %11
11: ; preds = %9, %0
ret void
}
declare i64 @atomic_dec_and_mutex_lock(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1
declare i32 @on_each_cpu(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_perf_event_release_pmc.c'
source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_perf_event.c_perf_event_release_pmc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@active_events = common global i32 0, align 4
@pmc_grab_mutex = common global i32 0, align 4
@nmi_active = common global i32 0, align 4
@start_nmi_watchdog = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @perf_event_release_pmc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @perf_event_release_pmc() #0 {
%1 = tail call i64 @atomic_dec_and_mutex_lock(ptr noundef nonnull @active_events, ptr noundef nonnull @pmc_grab_mutex) #2
%2 = icmp eq i64 %1, 0
br i1 %2, label %11, label %3
3: ; preds = %0
%4 = tail call i64 @atomic_read(ptr noundef nonnull @nmi_active) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, ptr @start_nmi_watchdog, align 4, !tbaa !6
%8 = tail call i32 @on_each_cpu(i32 noundef %7, ptr noundef null, i32 noundef 1) #2
br label %9
9: ; preds = %6, %3
%10 = tail call i32 @mutex_unlock(ptr noundef nonnull @pmc_grab_mutex) #2
br label %11
11: ; preds = %9, %0
ret void
}
declare i64 @atomic_dec_and_mutex_lock(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1
declare i32 @on_each_cpu(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_sparc_kernel_extr_perf_event.c_perf_event_release_pmc |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/yosino58/rev1/extr_matrix.c_read_cols.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/yosino58/rev1/extr_matrix.c_read_cols.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MATRIX_COLS = dso_local local_unnamed_addr global i32 0, align 4
@col_pins = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @read_cols], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @read_cols() #0 {
%1 = load i32, ptr @MATRIX_COLS, align 4, !tbaa !5
%2 = icmp sgt i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %5, %0
%4 = phi i32 [ 0, %0 ], [ %23, %5 ]
ret i32 %4
5: ; preds = %0, %5
%6 = phi i64 [ %24, %5 ], [ 0, %0 ]
%7 = phi i32 [ %23, %5 ], [ 0, %0 ]
%8 = load ptr, ptr @col_pins, align 8, !tbaa !9
%9 = getelementptr inbounds i32, ptr %8, i64 %6
%10 = load i32, ptr %9, align 4, !tbaa !5
%11 = ashr i32 %10, 4
%12 = tail call i32 @_SFR_IO8(i32 noundef %11) #2
%13 = load ptr, ptr @col_pins, align 8, !tbaa !9
%14 = getelementptr inbounds i32, ptr %13, i64 %6
%15 = load i32, ptr %14, align 4, !tbaa !5
%16 = and i32 %15, 15
%17 = tail call i32 @_BV(i32 noundef %16) #2
%18 = and i32 %17, %12
%19 = icmp eq i32 %18, 0
%20 = trunc i64 %6 to i32
%21 = shl nuw i32 1, %20
%22 = select i1 %19, i32 %21, i32 0
%23 = or i32 %22, %7
%24 = add nuw nsw i64 %6, 1
%25 = load i32, ptr @MATRIX_COLS, align 4, !tbaa !5
%26 = sext i32 %25 to i64
%27 = icmp slt i64 %24, %26
br i1 %27, label %5, label %3, !llvm.loop !11
}
declare i32 @_SFR_IO8(i32 noundef) local_unnamed_addr #1
declare i32 @_BV(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/yosino58/rev1/extr_matrix.c_read_cols.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/yosino58/rev1/extr_matrix.c_read_cols.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MATRIX_COLS = common local_unnamed_addr global i32 0, align 4
@col_pins = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @read_cols], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @read_cols() #0 {
%1 = load i32, ptr @MATRIX_COLS, align 4, !tbaa !6
%2 = icmp sgt i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %5, %0
%4 = phi i32 [ 0, %0 ], [ %23, %5 ]
ret i32 %4
5: ; preds = %0, %5
%6 = phi i64 [ %24, %5 ], [ 0, %0 ]
%7 = phi i32 [ %23, %5 ], [ 0, %0 ]
%8 = load ptr, ptr @col_pins, align 8, !tbaa !10
%9 = getelementptr inbounds i32, ptr %8, i64 %6
%10 = load i32, ptr %9, align 4, !tbaa !6
%11 = ashr i32 %10, 4
%12 = tail call i32 @_SFR_IO8(i32 noundef %11) #2
%13 = load ptr, ptr @col_pins, align 8, !tbaa !10
%14 = getelementptr inbounds i32, ptr %13, i64 %6
%15 = load i32, ptr %14, align 4, !tbaa !6
%16 = and i32 %15, 15
%17 = tail call i32 @_BV(i32 noundef %16) #2
%18 = and i32 %17, %12
%19 = icmp eq i32 %18, 0
%20 = trunc nuw nsw i64 %6 to i32
%21 = shl nuw i32 1, %20
%22 = select i1 %19, i32 %21, i32 0
%23 = or i32 %22, %7
%24 = add nuw nsw i64 %6, 1
%25 = load i32, ptr @MATRIX_COLS, align 4, !tbaa !6
%26 = sext i32 %25 to i64
%27 = icmp slt i64 %24, %26
br i1 %27, label %5, label %3, !llvm.loop !12
}
declare i32 @_SFR_IO8(i32 noundef) local_unnamed_addr #1
declare i32 @_BV(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| qmk_firmware_keyboards_yosino58_rev1_extr_matrix.c_read_cols |
; ModuleID = 'AnghaBench/linux/net/netfilter/extr_nft_cmp.c_nft_cmp_offload.c'
source_filename = "AnghaBench/linux/net/netfilter/extr_nft_cmp.c_nft_cmp_offload.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @nft_cmp_offload], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nft_cmp_offload(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @nft_expr_priv(ptr noundef %2) #2
%5 = tail call i32 @__nft_cmp_offload(ptr noundef %0, ptr noundef %1, ptr noundef %4) #2
ret i32 %5
}
declare ptr @nft_expr_priv(ptr noundef) local_unnamed_addr #1
declare i32 @__nft_cmp_offload(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/net/netfilter/extr_nft_cmp.c_nft_cmp_offload.c'
source_filename = "AnghaBench/linux/net/netfilter/extr_nft_cmp.c_nft_cmp_offload.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nft_cmp_offload], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nft_cmp_offload(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call ptr @nft_expr_priv(ptr noundef %2) #2
%5 = tail call i32 @__nft_cmp_offload(ptr noundef %0, ptr noundef %1, ptr noundef %4) #2
ret i32 %5
}
declare ptr @nft_expr_priv(ptr noundef) local_unnamed_addr #1
declare i32 @__nft_cmp_offload(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_netfilter_extr_nft_cmp.c_nft_cmp_offload |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/bridge/analogix/extr_analogix_dp_reg.c_analogix_dp_get_lane2_link_training.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/bridge/analogix/extr_analogix_dp_reg.c_analogix_dp_get_lane2_link_training.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ANALOGIX_DP_LN2_LINK_TRAINING_CTL = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @analogix_dp_get_lane2_link_training(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @ANALOGIX_DP_LN2_LINK_TRAINING_CTL, align 8, !tbaa !10
%4 = add nsw i64 %3, %2
%5 = tail call i32 @readl(i64 noundef %4) #2
ret i32 %5
}
declare i32 @readl(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"analogix_dp_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/bridge/analogix/extr_analogix_dp_reg.c_analogix_dp_get_lane2_link_training.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/bridge/analogix/extr_analogix_dp_reg.c_analogix_dp_get_lane2_link_training.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ANALOGIX_DP_LN2_LINK_TRAINING_CTL = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @analogix_dp_get_lane2_link_training(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @ANALOGIX_DP_LN2_LINK_TRAINING_CTL, align 8, !tbaa !11
%4 = add nsw i64 %3, %2
%5 = tail call i32 @readl(i64 noundef %4) #2
ret i32 %5
}
declare i32 @readl(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"analogix_dp_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_gpu_drm_bridge_analogix_extr_analogix_dp_reg.c_analogix_dp_get_lane2_link_training |
; ModuleID = 'AnghaBench/linux/drivers/firmware/tegra/extr_bpmp-debugfs.c_seqbuf_seek.c'
source_filename = "AnghaBench/linux/drivers/firmware/tegra/extr_bpmp-debugfs.c_seqbuf_seek.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @seqbuf_seek], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define internal void @seqbuf_seek(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = trunc i64 %1 to i32
%5 = add i32 %3, %4
store i32 %5, ptr %0, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"seqbuf", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/firmware/tegra/extr_bpmp-debugfs.c_seqbuf_seek.c'
source_filename = "AnghaBench/linux/drivers/firmware/tegra/extr_bpmp-debugfs.c_seqbuf_seek.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @seqbuf_seek], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @seqbuf_seek(ptr nocapture noundef %0, i64 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = trunc i64 %1 to i32
%5 = add i32 %3, %4
store i32 %5, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"seqbuf", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_firmware_tegra_extr_bpmp-debugfs.c_seqbuf_seek |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_.arc4random.c_arc4_getbyte.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_.arc4random.c_arc4_getbyte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr, i8 }
@rs = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @arc4_getbyte], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal zeroext i8 @arc4_getbyte() #0 {
%1 = load i32, ptr @rs, align 8, !tbaa !5
%2 = add nsw i32 %1, 1
store i32 %2, ptr @rs, align 8, !tbaa !5
%3 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @rs, i64 0, i32 1), align 8, !tbaa !11
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i8, ptr %3, i64 %4
%6 = load i8, ptr %5, align 1, !tbaa !12
%7 = load i8, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @rs, i64 0, i32 2), align 8, !tbaa !13
%8 = add i8 %7, %6
store i8 %8, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @rs, i64 0, i32 2), align 8, !tbaa !13
%9 = zext i8 %8 to i64
%10 = getelementptr inbounds i8, ptr %3, i64 %9
%11 = load i8, ptr %10, align 1, !tbaa !12
store i8 %11, ptr %5, align 1, !tbaa !12
%12 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @rs, i64 0, i32 1), align 8, !tbaa !11
%13 = load i8, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @rs, i64 0, i32 2), align 8, !tbaa !13
%14 = zext i8 %13 to i64
%15 = getelementptr inbounds i8, ptr %12, i64 %14
store i8 %6, ptr %15, align 1, !tbaa !12
%16 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @rs, i64 0, i32 1), align 8, !tbaa !11
%17 = add i8 %11, %6
%18 = zext i8 %17 to i64
%19 = getelementptr inbounds i8, ptr %16, i64 %18
%20 = load i8, ptr %19, align 1, !tbaa !12
ret i8 %20
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0, !10, i64 8, !8, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!8, !8, i64 0}
!13 = !{!6, !8, i64 16}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_.arc4random.c_arc4_getbyte.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_.arc4random.c_arc4_getbyte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr, i8 }
@rs = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.used = appending global [1 x ptr] [ptr @arc4_getbyte], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal zeroext i8 @arc4_getbyte() #0 {
%1 = load i32, ptr @rs, align 8, !tbaa !6
%2 = add nsw i32 %1, 1
store i32 %2, ptr @rs, align 8, !tbaa !6
%3 = load ptr, ptr getelementptr inbounds (i8, ptr @rs, i64 8), align 8, !tbaa !12
%4 = sext i32 %2 to i64
%5 = getelementptr inbounds i8, ptr %3, i64 %4
%6 = load i8, ptr %5, align 1, !tbaa !13
%7 = load i8, ptr getelementptr inbounds (i8, ptr @rs, i64 16), align 8, !tbaa !14
%8 = add i8 %7, %6
store i8 %8, ptr getelementptr inbounds (i8, ptr @rs, i64 16), align 8, !tbaa !14
%9 = zext i8 %8 to i64
%10 = getelementptr inbounds i8, ptr %3, i64 %9
%11 = load i8, ptr %10, align 1, !tbaa !13
store i8 %11, ptr %5, align 1, !tbaa !13
%12 = load ptr, ptr getelementptr inbounds (i8, ptr @rs, i64 8), align 8, !tbaa !12
%13 = load i8, ptr getelementptr inbounds (i8, ptr @rs, i64 16), align 8, !tbaa !14
%14 = zext i8 %13 to i64
%15 = getelementptr inbounds i8, ptr %12, i64 %14
store i8 %6, ptr %15, align 1, !tbaa !13
%16 = load ptr, ptr getelementptr inbounds (i8, ptr @rs, i64 8), align 8, !tbaa !12
%17 = add i8 %11, %6
%18 = zext i8 %17 to i64
%19 = getelementptr inbounds i8, ptr %16, i64 %18
%20 = load i8, ptr %19, align 1, !tbaa !13
ret i8 %20
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8, !9, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!9, !9, i64 0}
!14 = !{!7, !9, i64 16}
| freebsd_contrib_ntp_sntp_libevent_extr_.arc4random.c_arc4_getbyte |
; ModuleID = 'AnghaBench/linux/drivers/nvme/host/extr_fc.c_nvme_fc_fcpio_done.c'
source_filename = "AnghaBench/linux/drivers/nvme/host/extr_fc.c_nvme_fc_fcpio_done.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%union.nvme_result = type { i32 }
%struct.nvme_fc_fcp_op = type { i32, i32, %struct.TYPE_9__, %struct.TYPE_8__, %struct.nvmefc_fcp_req, ptr, ptr, ptr }
%struct.TYPE_9__ = type { i32, i32, i32, %struct.nvme_completion }
%struct.nvme_completion = type { i64, %union.nvme_result, i32 }
%struct.TYPE_8__ = type { i32, %struct.nvme_command }
%struct.nvme_command = type { %struct.TYPE_10__ }
%struct.TYPE_10__ = type { i32 }
%struct.nvmefc_fcp_req = type { i32, i32, i32, i32 }
%struct.nvme_fc_ctrl = type { i32, %struct.TYPE_11__, ptr }
%struct.TYPE_11__ = type { i32 }
@NVME_SC_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@FCPOP_STATE_COMPLETE = dso_local local_unnamed_addr global i32 0, align 4
@DMA_FROM_DEVICE = dso_local local_unnamed_addr global i32 0, align 4
@FCPOP_STATE_ABORTED = dso_local local_unnamed_addr global i32 0, align 4
@NVME_SC_HOST_PATH_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [45 x i8] c"NVME-FC{%d}: io failed due to lldd error %d\0A\00", align 1
@.str.1 = private unnamed_addr constant [70 x i8] c"NVME-FC{%d}: io failed due to bad transfer length: %d vs expected %d\0A\00", align 1
@.str.2 = private unnamed_addr constant [106 x i8] c"NVME-FC{%d}: io failed due to bad NVMe_ERSP: iu len %d, xfr len %d vs %d, status code %d, cmdid %d vs %d\0A\00", align 1
@.str.3 = private unnamed_addr constant [55 x i8] c"NVME-FC{%d}: io failed due to odd NVMe_xRSP iu len %d\0A\00", align 1
@FCOP_FLAGS_AEN = dso_local local_unnamed_addr global i32 0, align 4
@FCPOP_STATE_IDLE = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [28 x i8] c"transport detected io error\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @nvme_fc_fcpio_done], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @nvme_fc_fcpio_done(ptr noundef %0) #0 {
%2 = alloca %union.nvme_result, align 4
%3 = tail call ptr @fcp_req_to_fcp_op(ptr noundef %0) #3
%4 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 7
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 4
%7 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 6
%8 = load ptr, ptr %7, align 8, !tbaa !18
%9 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 5
%10 = load ptr, ptr %9, align 8, !tbaa !19
%11 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2
%12 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 3
%13 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 3
%14 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 3, i32 1
%15 = load i32, ptr @NVME_SC_SUCCESS, align 4, !tbaa !20
%16 = shl i32 %15, 1
%17 = tail call i64 @cpu_to_le16(i32 noundef %16) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%18 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 1
%19 = load i32, ptr @FCPOP_STATE_COMPLETE, align 4, !tbaa !20
%20 = tail call i32 @atomic_xchg(ptr noundef nonnull %18, i32 noundef %19) #3
%21 = getelementptr inbounds %struct.nvme_fc_ctrl, ptr %8, i64 0, i32 2
%22 = load ptr, ptr %21, align 8, !tbaa !21
%23 = load i32, ptr %22, align 4, !tbaa !24
%24 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 4, i32 3
%25 = load i32, ptr %24, align 4, !tbaa !26
%26 = load i32, ptr @DMA_FROM_DEVICE, align 4, !tbaa !20
%27 = tail call i32 @fc_dma_sync_single_for_cpu(i32 noundef %23, i32 noundef %25, i32 noundef 32, i32 noundef %26) #3
%28 = load i32, ptr @FCPOP_STATE_ABORTED, align 4, !tbaa !20
%29 = icmp eq i32 %20, %28
br i1 %29, label %30, label %34
30: ; preds = %1
%31 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !20
%32 = shl i32 %31, 1
%33 = tail call i64 @cpu_to_le16(i32 noundef %32) #3
br label %46
34: ; preds = %1
%35 = load i32, ptr %6, align 4, !tbaa !27
%36 = icmp eq i32 %35, 0
br i1 %36, label %46, label %37
37: ; preds = %34
%38 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !20
%39 = shl i32 %38, 1
%40 = tail call i64 @cpu_to_le16(i32 noundef %39) #3
%41 = getelementptr inbounds %struct.nvme_fc_ctrl, ptr %8, i64 0, i32 1
%42 = load i32, ptr %41, align 4, !tbaa !28
%43 = load i32, ptr %8, align 8, !tbaa !29
%44 = load i32, ptr %6, align 4, !tbaa !27
%45 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %42, ptr noundef nonnull @.str, i32 noundef %43, i32 noundef %44) #3
br label %46
46: ; preds = %34, %37, %30
%47 = phi i64 [ %33, %30 ], [ %40, %37 ], [ %17, %34 ]
%48 = icmp eq i64 %47, 0
br i1 %48, label %49, label %129
49: ; preds = %46
%50 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 4, i32 1
%51 = load i32, ptr %50, align 4, !tbaa !30
switch i32 %51, label %120 [
i32 0, label %52
i32 128, label %52
i32 4, label %70
]
52: ; preds = %49, %49
%53 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 4, i32 2
%54 = load i32, ptr %53, align 4, !tbaa !31
%55 = load i32, ptr %13, align 8, !tbaa !32
%56 = tail call i32 @be32_to_cpu(i32 noundef %55) #3
%57 = icmp eq i32 %54, %56
br i1 %57, label %69, label %58
58: ; preds = %52
%59 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !20
%60 = shl i32 %59, 1
%61 = tail call i64 @cpu_to_le16(i32 noundef %60) #3
%62 = getelementptr inbounds %struct.nvme_fc_ctrl, ptr %8, i64 0, i32 1
%63 = load i32, ptr %62, align 4, !tbaa !28
%64 = load i32, ptr %8, align 8, !tbaa !29
%65 = load i32, ptr %53, align 4, !tbaa !31
%66 = load i32, ptr %13, align 8, !tbaa !32
%67 = tail call i32 @be32_to_cpu(i32 noundef %66) #3
%68 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %63, ptr noundef nonnull @.str.1, i32 noundef %64, i32 noundef %65, i32 noundef %67) #3
br label %129
69: ; preds = %52
store i32 0, ptr %2, align 4, !tbaa !33
br label %129
70: ; preds = %49
%71 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 2
%72 = load i32, ptr %71, align 8, !tbaa !34
%73 = tail call i32 @be16_to_cpu(i32 noundef %72) #3
%74 = load i32, ptr %50, align 4, !tbaa !30
%75 = sdiv i32 %74, 4
%76 = icmp eq i32 %73, %75
br i1 %76, label %77, label %93
77: ; preds = %70
%78 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 1
%79 = load i32, ptr %78, align 4, !tbaa !35
%80 = tail call i32 @be32_to_cpu(i32 noundef %79) #3
%81 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 4, i32 2
%82 = load i32, ptr %81, align 4, !tbaa !31
%83 = icmp eq i32 %80, %82
br i1 %83, label %84, label %93
84: ; preds = %77
%85 = load i32, ptr %11, align 8, !tbaa !36
%86 = icmp eq i32 %85, 0
br i1 %86, label %87, label %93
87: ; preds = %84
%88 = load i32, ptr %14, align 4, !tbaa !37
%89 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 3, i32 2
%90 = load i32, ptr %89, align 4, !tbaa !38
%91 = icmp ne i32 %88, %90
%92 = zext i1 %91 to i32
br label %93
93: ; preds = %87, %84, %77, %70
%94 = phi i32 [ 1, %84 ], [ 1, %77 ], [ 1, %70 ], [ %92, %87 ]
%95 = tail call i32 @unlikely(i32 noundef %94) #3
%96 = icmp eq i32 %95, 0
br i1 %96, label %116, label %97
97: ; preds = %93
%98 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !20
%99 = shl i32 %98, 1
%100 = tail call i64 @cpu_to_le16(i32 noundef %99) #3
%101 = getelementptr inbounds %struct.nvme_fc_ctrl, ptr %8, i64 0, i32 1
%102 = load i32, ptr %101, align 4, !tbaa !28
%103 = load i32, ptr %8, align 8, !tbaa !29
%104 = load i32, ptr %71, align 8, !tbaa !34
%105 = tail call i32 @be16_to_cpu(i32 noundef %104) #3
%106 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 1
%107 = load i32, ptr %106, align 4, !tbaa !35
%108 = tail call i32 @be32_to_cpu(i32 noundef %107) #3
%109 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 4, i32 2
%110 = load i32, ptr %109, align 4, !tbaa !31
%111 = load i32, ptr %11, align 8, !tbaa !36
%112 = load i32, ptr %14, align 4, !tbaa !37
%113 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 3, i32 2
%114 = load i32, ptr %113, align 4, !tbaa !38
%115 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %102, ptr noundef nonnull @.str.2, i32 noundef %103, i32 noundef %105, i32 noundef %108, i32 noundef %110, i32 noundef %111, i32 noundef %112, i32 noundef %114) #3
br label %129
116: ; preds = %93
%117 = getelementptr inbounds %struct.nvme_fc_fcp_op, ptr %3, i64 0, i32 2, i32 3, i32 1
%118 = load i32, ptr %117, align 8, !tbaa !20
store i32 %118, ptr %2, align 4, !tbaa !20
%119 = load i64, ptr %12, align 8, !tbaa !39
br label %129
120: ; preds = %49
%121 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !20
%122 = shl i32 %121, 1
%123 = tail call i64 @cpu_to_le16(i32 noundef %122) #3
%124 = getelementptr inbounds %struct.nvme_fc_ctrl, ptr %8, i64 0, i32 1
%125 = load i32, ptr %124, align 4, !tbaa !28
%126 = load i32, ptr %8, align 8, !tbaa !29
%127 = load i32, ptr %50, align 4, !tbaa !30
%128 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %125, ptr noundef nonnull @.str.3, i32 noundef %126, i32 noundef %127) #3
br label %129
129: ; preds = %69, %116, %46, %120, %97, %58
%130 = phi i32 [ undef, %46 ], [ undef, %120 ], [ undef, %97 ], [ undef, %58 ], [ %118, %116 ], [ 0, %69 ]
%131 = phi i1 [ false, %46 ], [ false, %120 ], [ false, %97 ], [ false, %58 ], [ true, %116 ], [ true, %69 ]
%132 = phi i64 [ %47, %46 ], [ %123, %120 ], [ %100, %97 ], [ %61, %58 ], [ %119, %116 ], [ 0, %69 ]
%133 = load i32, ptr %3, align 8, !tbaa !40
%134 = load i32, ptr @FCOP_FLAGS_AEN, align 4, !tbaa !20
%135 = and i32 %134, %133
%136 = icmp eq i32 %135, 0
br i1 %136, label %145, label %137
137: ; preds = %129
%138 = load ptr, ptr %10, align 8, !tbaa !41
%139 = call i32 @nvme_complete_async_event(ptr noundef %138, i64 noundef %132, ptr noundef nonnull %2) #3
%140 = call i32 @__nvme_fc_fcpop_chk_teardowns(ptr noundef nonnull %8, ptr noundef nonnull %3, i32 noundef %20) #3
%141 = load i32, ptr @FCPOP_STATE_IDLE, align 4, !tbaa !20
%142 = call i32 @atomic_set(ptr noundef nonnull %18, i32 noundef %141) #3
%143 = load i32, ptr @FCOP_FLAGS_AEN, align 4, !tbaa !20
store i32 %143, ptr %3, align 8, !tbaa !40
%144 = call i32 @nvme_fc_ctrl_put(ptr noundef nonnull %8) #3
br label %148
145: ; preds = %129
%146 = tail call i32 @__nvme_fc_fcpop_chk_teardowns(ptr noundef nonnull %8, ptr noundef nonnull %3, i32 noundef %20) #3
%147 = tail call i32 @nvme_end_request(ptr noundef %5, i64 noundef %132, i32 %130) #3
br label %148
148: ; preds = %145, %137
br i1 %131, label %151, label %149
149: ; preds = %148
%150 = call i32 @nvme_fc_error_recovery(ptr noundef nonnull %8, ptr noundef nonnull @.str.4) #3
br label %151
151: ; preds = %149, %148
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @fcp_req_to_fcp_op(ptr noundef) local_unnamed_addr #2
declare i64 @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare i32 @atomic_xchg(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fc_dma_sync_single_for_cpu(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_info(i32 noundef, ptr noundef, i32 noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @be16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @nvme_complete_async_event(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @__nvme_fc_fcpop_chk_teardowns(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_fc_ctrl_put(ptr noundef) local_unnamed_addr #2
declare i32 @nvme_end_request(ptr noundef, i64 noundef, i32) local_unnamed_addr #2
declare i32 @nvme_fc_error_recovery(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !17, i64 80}
!6 = !{!"nvme_fc_fcp_op", !7, i64 0, !7, i64 4, !10, i64 8, !13, i64 40, !16, i64 48, !17, i64 64, !17, i64 72, !17, i64 80}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_9__", !7, i64 0, !7, i64 4, !7, i64 8, !11, i64 16}
!11 = !{!"nvme_completion", !12, i64 0, !8, i64 8, !7, i64 12}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_8__", !7, i64 0, !14, i64 4}
!14 = !{!"nvme_command", !15, i64 0}
!15 = !{!"TYPE_10__", !7, i64 0}
!16 = !{!"nvmefc_fcp_req", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!6, !17, i64 72}
!19 = !{!6, !17, i64 64}
!20 = !{!7, !7, i64 0}
!21 = !{!22, !17, i64 8}
!22 = !{!"nvme_fc_ctrl", !7, i64 0, !23, i64 4, !17, i64 8}
!23 = !{!"TYPE_11__", !7, i64 0}
!24 = !{!25, !7, i64 0}
!25 = !{!"TYPE_7__", !7, i64 0}
!26 = !{!6, !7, i64 60}
!27 = !{!16, !7, i64 0}
!28 = !{!22, !7, i64 4}
!29 = !{!22, !7, i64 0}
!30 = !{!16, !7, i64 4}
!31 = !{!16, !7, i64 8}
!32 = !{!6, !7, i64 40}
!33 = !{!8, !8, i64 0}
!34 = !{!6, !7, i64 16}
!35 = !{!6, !7, i64 12}
!36 = !{!6, !7, i64 8}
!37 = !{!14, !7, i64 0}
!38 = !{!11, !7, i64 12}
!39 = !{!11, !12, i64 0}
!40 = !{!6, !7, i64 0}
!41 = !{!42, !17, i64 0}
!42 = !{!"nvme_fc_queue", !17, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/nvme/host/extr_fc.c_nvme_fc_fcpio_done.c'
source_filename = "AnghaBench/linux/drivers/nvme/host/extr_fc.c_nvme_fc_fcpio_done.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%union.nvme_result = type { i32 }
@NVME_SC_SUCCESS = common local_unnamed_addr global i32 0, align 4
@FCPOP_STATE_COMPLETE = common local_unnamed_addr global i32 0, align 4
@DMA_FROM_DEVICE = common local_unnamed_addr global i32 0, align 4
@FCPOP_STATE_ABORTED = common local_unnamed_addr global i32 0, align 4
@NVME_SC_HOST_PATH_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [45 x i8] c"NVME-FC{%d}: io failed due to lldd error %d\0A\00", align 1
@.str.1 = private unnamed_addr constant [70 x i8] c"NVME-FC{%d}: io failed due to bad transfer length: %d vs expected %d\0A\00", align 1
@.str.2 = private unnamed_addr constant [106 x i8] c"NVME-FC{%d}: io failed due to bad NVMe_ERSP: iu len %d, xfr len %d vs %d, status code %d, cmdid %d vs %d\0A\00", align 1
@.str.3 = private unnamed_addr constant [55 x i8] c"NVME-FC{%d}: io failed due to odd NVMe_xRSP iu len %d\0A\00", align 1
@FCOP_FLAGS_AEN = common local_unnamed_addr global i32 0, align 4
@FCPOP_STATE_IDLE = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [28 x i8] c"transport detected io error\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @nvme_fc_fcpio_done], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @nvme_fc_fcpio_done(ptr noundef %0) #0 {
%2 = alloca %union.nvme_result, align 4
%3 = tail call ptr @fcp_req_to_fcp_op(ptr noundef %0) #3
%4 = getelementptr inbounds i8, ptr %3, i64 80
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %3, i64 48
%7 = getelementptr inbounds i8, ptr %3, i64 72
%8 = load ptr, ptr %7, align 8, !tbaa !19
%9 = getelementptr inbounds i8, ptr %3, i64 64
%10 = load ptr, ptr %9, align 8, !tbaa !20
%11 = getelementptr inbounds i8, ptr %3, i64 8
%12 = getelementptr inbounds i8, ptr %3, i64 24
%13 = getelementptr inbounds i8, ptr %3, i64 40
%14 = getelementptr inbounds i8, ptr %3, i64 44
%15 = load i32, ptr @NVME_SC_SUCCESS, align 4, !tbaa !21
%16 = shl i32 %15, 1
%17 = tail call i64 @cpu_to_le16(i32 noundef %16) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%18 = getelementptr inbounds i8, ptr %3, i64 4
%19 = load i32, ptr @FCPOP_STATE_COMPLETE, align 4, !tbaa !21
%20 = tail call i32 @atomic_xchg(ptr noundef nonnull %18, i32 noundef %19) #3
%21 = getelementptr inbounds i8, ptr %8, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !22
%23 = load i32, ptr %22, align 4, !tbaa !25
%24 = getelementptr inbounds i8, ptr %3, i64 60
%25 = load i32, ptr %24, align 4, !tbaa !27
%26 = load i32, ptr @DMA_FROM_DEVICE, align 4, !tbaa !21
%27 = tail call i32 @fc_dma_sync_single_for_cpu(i32 noundef %23, i32 noundef %25, i32 noundef 32, i32 noundef %26) #3
%28 = load i32, ptr @FCPOP_STATE_ABORTED, align 4, !tbaa !21
%29 = icmp eq i32 %20, %28
br i1 %29, label %30, label %34
30: ; preds = %1
%31 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !21
%32 = shl i32 %31, 1
%33 = tail call i64 @cpu_to_le16(i32 noundef %32) #3
br label %46
34: ; preds = %1
%35 = load i32, ptr %6, align 4, !tbaa !28
%36 = icmp eq i32 %35, 0
br i1 %36, label %46, label %37
37: ; preds = %34
%38 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !21
%39 = shl i32 %38, 1
%40 = tail call i64 @cpu_to_le16(i32 noundef %39) #3
%41 = getelementptr inbounds i8, ptr %8, i64 4
%42 = load i32, ptr %41, align 4, !tbaa !29
%43 = load i32, ptr %8, align 8, !tbaa !30
%44 = load i32, ptr %6, align 4, !tbaa !28
%45 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %42, ptr noundef nonnull @.str, i32 noundef %43, i32 noundef %44) #3
br label %46
46: ; preds = %34, %37, %30
%47 = phi i64 [ %33, %30 ], [ %40, %37 ], [ %17, %34 ]
%48 = icmp eq i64 %47, 0
br i1 %48, label %49, label %130
49: ; preds = %46
%50 = getelementptr inbounds i8, ptr %3, i64 52
%51 = load i32, ptr %50, align 4, !tbaa !31
switch i32 %51, label %121 [
i32 0, label %52
i32 128, label %52
i32 4, label %70
]
52: ; preds = %49, %49
%53 = getelementptr inbounds i8, ptr %3, i64 56
%54 = load i32, ptr %53, align 4, !tbaa !32
%55 = load i32, ptr %13, align 8, !tbaa !33
%56 = tail call i32 @be32_to_cpu(i32 noundef %55) #3
%57 = icmp eq i32 %54, %56
br i1 %57, label %69, label %58
58: ; preds = %52
%59 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !21
%60 = shl i32 %59, 1
%61 = tail call i64 @cpu_to_le16(i32 noundef %60) #3
%62 = getelementptr inbounds i8, ptr %8, i64 4
%63 = load i32, ptr %62, align 4, !tbaa !29
%64 = load i32, ptr %8, align 8, !tbaa !30
%65 = load i32, ptr %53, align 4, !tbaa !32
%66 = load i32, ptr %13, align 8, !tbaa !33
%67 = tail call i32 @be32_to_cpu(i32 noundef %66) #3
%68 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %63, ptr noundef nonnull @.str.1, i32 noundef %64, i32 noundef %65, i32 noundef %67) #3
br label %130
69: ; preds = %52
store i32 0, ptr %2, align 4, !tbaa !34
br label %130
70: ; preds = %49
%71 = getelementptr inbounds i8, ptr %3, i64 16
%72 = load i32, ptr %71, align 8, !tbaa !35
%73 = tail call i32 @be16_to_cpu(i32 noundef %72) #3
%74 = load i32, ptr %50, align 4, !tbaa !31
%75 = sdiv i32 %74, 4
%76 = icmp eq i32 %73, %75
br i1 %76, label %77, label %93
77: ; preds = %70
%78 = getelementptr inbounds i8, ptr %3, i64 12
%79 = load i32, ptr %78, align 4, !tbaa !36
%80 = tail call i32 @be32_to_cpu(i32 noundef %79) #3
%81 = getelementptr inbounds i8, ptr %3, i64 56
%82 = load i32, ptr %81, align 4, !tbaa !32
%83 = icmp eq i32 %80, %82
br i1 %83, label %84, label %93
84: ; preds = %77
%85 = load i32, ptr %11, align 8, !tbaa !37
%86 = icmp eq i32 %85, 0
br i1 %86, label %87, label %93
87: ; preds = %84
%88 = load i32, ptr %14, align 4, !tbaa !38
%89 = getelementptr inbounds i8, ptr %3, i64 36
%90 = load i32, ptr %89, align 4, !tbaa !39
%91 = icmp ne i32 %88, %90
%92 = zext i1 %91 to i32
br label %93
93: ; preds = %87, %84, %77, %70
%94 = phi i32 [ 1, %84 ], [ 1, %77 ], [ 1, %70 ], [ %92, %87 ]
%95 = tail call i32 @unlikely(i32 noundef %94) #3
%96 = icmp eq i32 %95, 0
br i1 %96, label %116, label %97
97: ; preds = %93
%98 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !21
%99 = shl i32 %98, 1
%100 = tail call i64 @cpu_to_le16(i32 noundef %99) #3
%101 = getelementptr inbounds i8, ptr %8, i64 4
%102 = load i32, ptr %101, align 4, !tbaa !29
%103 = load i32, ptr %8, align 8, !tbaa !30
%104 = load i32, ptr %71, align 8, !tbaa !35
%105 = tail call i32 @be16_to_cpu(i32 noundef %104) #3
%106 = getelementptr inbounds i8, ptr %3, i64 12
%107 = load i32, ptr %106, align 4, !tbaa !36
%108 = tail call i32 @be32_to_cpu(i32 noundef %107) #3
%109 = getelementptr inbounds i8, ptr %3, i64 56
%110 = load i32, ptr %109, align 4, !tbaa !32
%111 = load i32, ptr %11, align 8, !tbaa !37
%112 = load i32, ptr %14, align 4, !tbaa !38
%113 = getelementptr inbounds i8, ptr %3, i64 36
%114 = load i32, ptr %113, align 4, !tbaa !39
%115 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %102, ptr noundef nonnull @.str.2, i32 noundef %103, i32 noundef %105, i32 noundef %108, i32 noundef %110, i32 noundef %111, i32 noundef %112, i32 noundef %114) #3
br label %130
116: ; preds = %93
%117 = getelementptr inbounds i8, ptr %3, i64 32
%118 = load i32, ptr %117, align 8, !tbaa !34
store i32 %118, ptr %2, align 4, !tbaa !34
%119 = load i64, ptr %12, align 8, !tbaa !40
%120 = zext i32 %118 to i64
br label %130
121: ; preds = %49
%122 = load i32, ptr @NVME_SC_HOST_PATH_ERROR, align 4, !tbaa !21
%123 = shl i32 %122, 1
%124 = tail call i64 @cpu_to_le16(i32 noundef %123) #3
%125 = getelementptr inbounds i8, ptr %8, i64 4
%126 = load i32, ptr %125, align 4, !tbaa !29
%127 = load i32, ptr %8, align 8, !tbaa !30
%128 = load i32, ptr %50, align 4, !tbaa !31
%129 = tail call i32 (i32, ptr, i32, i32, ...) @dev_info(i32 noundef %126, ptr noundef nonnull @.str.3, i32 noundef %127, i32 noundef %128) #3
br label %130
130: ; preds = %69, %116, %46, %121, %97, %58
%131 = phi i64 [ 0, %46 ], [ 0, %121 ], [ 0, %97 ], [ 0, %58 ], [ %120, %116 ], [ 0, %69 ]
%132 = phi i1 [ false, %46 ], [ false, %121 ], [ false, %97 ], [ false, %58 ], [ true, %116 ], [ true, %69 ]
%133 = phi i64 [ %47, %46 ], [ %124, %121 ], [ %100, %97 ], [ %61, %58 ], [ %119, %116 ], [ 0, %69 ]
%134 = load i32, ptr %3, align 8, !tbaa !41
%135 = load i32, ptr @FCOP_FLAGS_AEN, align 4, !tbaa !21
%136 = and i32 %135, %134
%137 = icmp eq i32 %136, 0
br i1 %137, label %146, label %138
138: ; preds = %130
%139 = load ptr, ptr %10, align 8, !tbaa !42
%140 = call i32 @nvme_complete_async_event(ptr noundef %139, i64 noundef %133, ptr noundef nonnull %2) #3
%141 = call i32 @__nvme_fc_fcpop_chk_teardowns(ptr noundef nonnull %8, ptr noundef nonnull %3, i32 noundef %20) #3
%142 = load i32, ptr @FCPOP_STATE_IDLE, align 4, !tbaa !21
%143 = call i32 @atomic_set(ptr noundef nonnull %18, i32 noundef %142) #3
%144 = load i32, ptr @FCOP_FLAGS_AEN, align 4, !tbaa !21
store i32 %144, ptr %3, align 8, !tbaa !41
%145 = call i32 @nvme_fc_ctrl_put(ptr noundef nonnull %8) #3
br label %149
146: ; preds = %130
%147 = tail call i32 @__nvme_fc_fcpop_chk_teardowns(ptr noundef nonnull %8, ptr noundef nonnull %3, i32 noundef %20) #3
%148 = tail call i32 @nvme_end_request(ptr noundef %5, i64 noundef %133, i64 %131) #3
br label %149
149: ; preds = %146, %138
br i1 %132, label %152, label %150
150: ; preds = %149
%151 = call i32 @nvme_fc_error_recovery(ptr noundef nonnull %8, ptr noundef nonnull @.str.4) #3
br label %152
152: ; preds = %150, %149
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @fcp_req_to_fcp_op(ptr noundef) local_unnamed_addr #2
declare i64 @cpu_to_le16(i32 noundef) local_unnamed_addr #2
declare i32 @atomic_xchg(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fc_dma_sync_single_for_cpu(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_info(i32 noundef, ptr noundef, i32 noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @be16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @nvme_complete_async_event(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @__nvme_fc_fcpop_chk_teardowns(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nvme_fc_ctrl_put(ptr noundef) local_unnamed_addr #2
declare i32 @nvme_end_request(ptr noundef, i64 noundef, i64) local_unnamed_addr #2
declare i32 @nvme_fc_error_recovery(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !18, i64 80}
!7 = !{!"nvme_fc_fcp_op", !8, i64 0, !8, i64 4, !11, i64 8, !14, i64 40, !17, i64 48, !18, i64 64, !18, i64 72, !18, i64 80}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_9__", !8, i64 0, !8, i64 4, !8, i64 8, !12, i64 16}
!12 = !{!"nvme_completion", !13, i64 0, !9, i64 8, !8, i64 12}
!13 = !{!"long", !9, i64 0}
!14 = !{!"TYPE_8__", !8, i64 0, !15, i64 4}
!15 = !{!"nvme_command", !16, i64 0}
!16 = !{!"TYPE_10__", !8, i64 0}
!17 = !{!"nvmefc_fcp_req", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!7, !18, i64 72}
!20 = !{!7, !18, i64 64}
!21 = !{!8, !8, i64 0}
!22 = !{!23, !18, i64 8}
!23 = !{!"nvme_fc_ctrl", !8, i64 0, !24, i64 4, !18, i64 8}
!24 = !{!"TYPE_11__", !8, i64 0}
!25 = !{!26, !8, i64 0}
!26 = !{!"TYPE_7__", !8, i64 0}
!27 = !{!7, !8, i64 60}
!28 = !{!17, !8, i64 0}
!29 = !{!23, !8, i64 4}
!30 = !{!23, !8, i64 0}
!31 = !{!17, !8, i64 4}
!32 = !{!17, !8, i64 8}
!33 = !{!7, !8, i64 40}
!34 = !{!9, !9, i64 0}
!35 = !{!7, !8, i64 16}
!36 = !{!7, !8, i64 12}
!37 = !{!7, !8, i64 8}
!38 = !{!15, !8, i64 0}
!39 = !{!12, !8, i64 12}
!40 = !{!12, !13, i64 0}
!41 = !{!7, !8, i64 0}
!42 = !{!43, !18, i64 0}
!43 = !{!"nvme_fc_queue", !18, i64 0}
| linux_drivers_nvme_host_extr_fc.c_nvme_fc_fcpio_done |
; ModuleID = 'AnghaBench/linux/sound/soc/sh/rcar/extr_ssiu.c_rsnd_ssiu_init.c'
source_filename = "AnghaBench/linux/sound/soc/sh/rcar/extr_ssiu.c_rsnd_ssiu_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SSI_MODE0 = dso_local local_unnamed_addr global i32 0, align 4
@SSI_MODE1 = dso_local local_unnamed_addr global i32 0, align 4
@SSI_MODE2 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rsnd_ssiu_init], section "llvm.metadata"
@switch.table.rsnd_ssiu_init = private unnamed_addr constant [10 x i32] [i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1], align 4
@switch.table.rsnd_ssiu_init.1 = private unnamed_addr constant [10 x i32] [i32 15, i32 240, i32 3840, i32 61440, i32 983040, i32 15, i32 15, i32 15, i32 15, i32 240], align 4
@switch.table.rsnd_ssiu_init.2 = private unnamed_addr constant [10 x i32] [i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 3], align 4
@switch.table.rsnd_ssiu_init.3 = private unnamed_addr constant [10 x i32] [i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 5], align 4
@switch.table.rsnd_ssiu_init.4 = private unnamed_addr constant [10 x i32] [i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 7], align 4
; Function Attrs: nounwind uwtable
define internal noundef i32 @rsnd_ssiu_init(ptr noundef %0, ptr noundef %1, ptr nocapture readnone %2) #0 {
%4 = tail call ptr @rsnd_io_to_rdai(ptr noundef %1) #2
%5 = tail call i32 @rsnd_ssi_multi_slaves_runtime(ptr noundef %1) #2
%6 = tail call i32 @rsnd_ssi_use_busif(ptr noundef %1) #2
%7 = tail call i32 @rsnd_mod_id(ptr noundef %0) #2
%8 = tail call i32 @rsnd_rdai_is_clk_master(ptr noundef %4) #2
%9 = icmp ult i32 %7, 10
br i1 %9, label %10, label %39
10: ; preds = %3
%11 = trunc i32 %7 to i16
%12 = lshr i16 543, %11
%13 = and i16 %12, 1
%14 = icmp eq i16 %13, 0
br i1 %14, label %39, label %15
15: ; preds = %10
%16 = zext nneg i32 %7 to i64
%17 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init, i64 0, i64 %16
%18 = load i32, ptr %17, align 4
%19 = zext nneg i32 %7 to i64
%20 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.1, i64 0, i64 %19
%21 = load i32, ptr %20, align 4
%22 = zext nneg i32 %7 to i64
%23 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.2, i64 0, i64 %22
%24 = load i32, ptr %23, align 4
%25 = zext nneg i32 %7 to i64
%26 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.3, i64 0, i64 %25
%27 = load i32, ptr %26, align 4
%28 = zext nneg i32 %7 to i64
%29 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.4, i64 0, i64 %28
%30 = load i32, ptr %29, align 4
%31 = tail call i32 @SSI_SYS_STATUS(i32 noundef %18) #2
%32 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %31, i32 noundef %21) #2
%33 = tail call i32 @SSI_SYS_STATUS(i32 noundef %24) #2
%34 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %33, i32 noundef %21) #2
%35 = tail call i32 @SSI_SYS_STATUS(i32 noundef %27) #2
%36 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %35, i32 noundef %21) #2
%37 = tail call i32 @SSI_SYS_STATUS(i32 noundef %30) #2
%38 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %37, i32 noundef %21) #2
br label %39
39: ; preds = %10, %3, %15
%40 = load i32, ptr @SSI_MODE0, align 4, !tbaa !5
%41 = shl nuw i32 1, %7
%42 = icmp eq i32 %6, 0
%43 = zext i1 %42 to i32
%44 = shl nuw i32 %43, %7
%45 = tail call i32 @rsnd_mod_bset(ptr noundef %0, i32 noundef %40, i32 noundef %41, i32 noundef %44) #2
%46 = load i32, ptr @SSI_MODE1, align 4, !tbaa !5
%47 = tail call i32 @rsnd_mod_read(ptr noundef %0, i32 noundef %46) #2
%48 = load i32, ptr @SSI_MODE2, align 4, !tbaa !5
%49 = tail call i32 @rsnd_mod_read(ptr noundef %0, i32 noundef %48) #2
%50 = tail call i64 @rsnd_ssi_is_pin_sharing(ptr noundef %1) #2
%51 = icmp eq i64 %50, 0
br i1 %51, label %54, label %52
52: ; preds = %39
%53 = or i32 %41, %5
br label %66
54: ; preds = %39
%55 = icmp eq i32 %5, 0
br i1 %55, label %66, label %56
56: ; preds = %54
%57 = shl i32 %5, 16
%58 = and i32 %57, 1048576
%59 = or i32 %47, %58
%60 = icmp eq i32 %5, 6
%61 = or i32 %59, 16
%62 = select i1 %60, i32 %61, i32 %59
%63 = icmp eq i32 %5, 518
%64 = or i32 %49, 16
%65 = select i1 %63, i32 %64, i32 %49
br label %66
66: ; preds = %56, %54, %52
%67 = phi i32 [ %53, %52 ], [ 0, %54 ], [ %5, %56 ]
%68 = phi i32 [ %47, %52 ], [ %47, %54 ], [ %62, %56 ]
%69 = phi i32 [ %49, %52 ], [ %49, %54 ], [ %65, %56 ]
%70 = and i32 %67, 2
%71 = icmp eq i32 %70, 0
%72 = icmp eq i32 %8, 0
%73 = select i1 %72, i32 1, i32 2
%74 = select i1 %71, i32 0, i32 %73
%75 = or i32 %74, %68
%76 = and i32 %67, 4
%77 = icmp eq i32 %76, 0
%78 = select i1 %72, i32 4, i32 8
%79 = select i1 %77, i32 0, i32 %78
%80 = or i32 %75, %79
%81 = and i32 %67, 16
%82 = icmp eq i32 %81, 0
%83 = select i1 %72, i32 65536, i32 131072
%84 = select i1 %82, i32 0, i32 %83
%85 = or i32 %80, %84
%86 = and i32 %67, 512
%87 = icmp eq i32 %86, 0
%88 = select i1 %87, i32 0, i32 %73
%89 = or i32 %88, %69
%90 = load i32, ptr @SSI_MODE1, align 4, !tbaa !5
%91 = tail call i32 @rsnd_mod_bset(ptr noundef %0, i32 noundef %90, i32 noundef 1245215, i32 noundef %85) #2
%92 = load i32, ptr @SSI_MODE2, align 4, !tbaa !5
%93 = tail call i32 @rsnd_mod_bset(ptr noundef %0, i32 noundef %92, i32 noundef 23, i32 noundef %89) #2
ret i32 0
}
declare ptr @rsnd_io_to_rdai(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_ssi_multi_slaves_runtime(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_ssi_use_busif(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_id(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_rdai_is_clk_master(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SSI_SYS_STATUS(i32 noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_bset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_read(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @rsnd_ssi_is_pin_sharing(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/sound/soc/sh/rcar/extr_ssiu.c_rsnd_ssiu_init.c'
source_filename = "AnghaBench/linux/sound/soc/sh/rcar/extr_ssiu.c_rsnd_ssiu_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SSI_MODE0 = common local_unnamed_addr global i32 0, align 4
@SSI_MODE1 = common local_unnamed_addr global i32 0, align 4
@SSI_MODE2 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rsnd_ssiu_init], section "llvm.metadata"
@switch.table.rsnd_ssiu_init = private unnamed_addr constant [10 x i32] [i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1], align 4
@switch.table.rsnd_ssiu_init.1 = private unnamed_addr constant [10 x i32] [i32 15, i32 240, i32 3840, i32 61440, i32 983040, i32 15, i32 15, i32 15, i32 15, i32 240], align 4
@switch.table.rsnd_ssiu_init.2 = private unnamed_addr constant [10 x i32] [i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 3], align 4
@switch.table.rsnd_ssiu_init.3 = private unnamed_addr constant [10 x i32] [i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 5], align 4
@switch.table.rsnd_ssiu_init.4 = private unnamed_addr constant [10 x i32] [i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 7], align 4
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @rsnd_ssiu_init(ptr noundef %0, ptr noundef %1, ptr nocapture readnone %2) #0 {
%4 = tail call ptr @rsnd_io_to_rdai(ptr noundef %1) #2
%5 = tail call i32 @rsnd_ssi_multi_slaves_runtime(ptr noundef %1) #2
%6 = tail call i32 @rsnd_ssi_use_busif(ptr noundef %1) #2
%7 = tail call i32 @rsnd_mod_id(ptr noundef %0) #2
%8 = tail call i32 @rsnd_rdai_is_clk_master(ptr noundef %4) #2
%9 = icmp ult i32 %7, 10
br i1 %9, label %10, label %38
10: ; preds = %3
%11 = trunc nuw i32 %7 to i16
%12 = lshr i16 543, %11
%13 = trunc i16 %12 to i1
br i1 %13, label %14, label %38
14: ; preds = %10
%15 = zext nneg i32 %7 to i64
%16 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init, i64 0, i64 %15
%17 = load i32, ptr %16, align 4
%18 = zext nneg i32 %7 to i64
%19 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.1, i64 0, i64 %18
%20 = load i32, ptr %19, align 4
%21 = zext nneg i32 %7 to i64
%22 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.2, i64 0, i64 %21
%23 = load i32, ptr %22, align 4
%24 = zext nneg i32 %7 to i64
%25 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.3, i64 0, i64 %24
%26 = load i32, ptr %25, align 4
%27 = zext nneg i32 %7 to i64
%28 = getelementptr inbounds [10 x i32], ptr @switch.table.rsnd_ssiu_init.4, i64 0, i64 %27
%29 = load i32, ptr %28, align 4
%30 = tail call i32 @SSI_SYS_STATUS(i32 noundef %17) #2
%31 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %30, i32 noundef %20) #2
%32 = tail call i32 @SSI_SYS_STATUS(i32 noundef %23) #2
%33 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %32, i32 noundef %20) #2
%34 = tail call i32 @SSI_SYS_STATUS(i32 noundef %26) #2
%35 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %34, i32 noundef %20) #2
%36 = tail call i32 @SSI_SYS_STATUS(i32 noundef %29) #2
%37 = tail call i32 @rsnd_mod_write(ptr noundef %0, i32 noundef %36, i32 noundef %20) #2
br label %38
38: ; preds = %10, %3, %14
%39 = load i32, ptr @SSI_MODE0, align 4, !tbaa !6
%40 = shl nuw i32 1, %7
%41 = icmp eq i32 %6, 0
%42 = zext i1 %41 to i32
%43 = shl nuw i32 %42, %7
%44 = tail call i32 @rsnd_mod_bset(ptr noundef %0, i32 noundef %39, i32 noundef %40, i32 noundef %43) #2
%45 = load i32, ptr @SSI_MODE1, align 4, !tbaa !6
%46 = tail call i32 @rsnd_mod_read(ptr noundef %0, i32 noundef %45) #2
%47 = load i32, ptr @SSI_MODE2, align 4, !tbaa !6
%48 = tail call i32 @rsnd_mod_read(ptr noundef %0, i32 noundef %47) #2
%49 = tail call i64 @rsnd_ssi_is_pin_sharing(ptr noundef %1) #2
%50 = icmp eq i64 %49, 0
br i1 %50, label %53, label %51
51: ; preds = %38
%52 = or i32 %40, %5
br label %65
53: ; preds = %38
%54 = icmp eq i32 %5, 0
br i1 %54, label %65, label %55
55: ; preds = %53
%56 = shl i32 %5, 16
%57 = and i32 %56, 1048576
%58 = or i32 %46, %57
%59 = icmp eq i32 %5, 6
%60 = or i32 %58, 16
%61 = select i1 %59, i32 %60, i32 %58
%62 = icmp eq i32 %5, 518
%63 = or i32 %48, 16
%64 = select i1 %62, i32 %63, i32 %48
br label %65
65: ; preds = %55, %53, %51
%66 = phi i32 [ %52, %51 ], [ 0, %53 ], [ %5, %55 ]
%67 = phi i32 [ %46, %51 ], [ %46, %53 ], [ %61, %55 ]
%68 = phi i32 [ %48, %51 ], [ %48, %53 ], [ %64, %55 ]
%69 = and i32 %66, 2
%70 = icmp eq i32 %69, 0
%71 = icmp eq i32 %8, 0
%72 = select i1 %71, i32 1, i32 2
%73 = select i1 %70, i32 0, i32 %72
%74 = or i32 %73, %67
%75 = and i32 %66, 4
%76 = icmp eq i32 %75, 0
%77 = select i1 %71, i32 4, i32 8
%78 = select i1 %76, i32 0, i32 %77
%79 = or i32 %74, %78
%80 = and i32 %66, 16
%81 = icmp eq i32 %80, 0
%82 = select i1 %71, i32 65536, i32 131072
%83 = select i1 %81, i32 0, i32 %82
%84 = or i32 %79, %83
%85 = and i32 %66, 512
%86 = icmp eq i32 %85, 0
%87 = select i1 %86, i32 0, i32 %72
%88 = or i32 %87, %68
%89 = load i32, ptr @SSI_MODE1, align 4, !tbaa !6
%90 = tail call i32 @rsnd_mod_bset(ptr noundef %0, i32 noundef %89, i32 noundef 1245215, i32 noundef %84) #2
%91 = load i32, ptr @SSI_MODE2, align 4, !tbaa !6
%92 = tail call i32 @rsnd_mod_bset(ptr noundef %0, i32 noundef %91, i32 noundef 23, i32 noundef %88) #2
ret i32 0
}
declare ptr @rsnd_io_to_rdai(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_ssi_multi_slaves_runtime(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_ssi_use_busif(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_id(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_rdai_is_clk_master(ptr noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SSI_SYS_STATUS(i32 noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_bset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rsnd_mod_read(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @rsnd_ssi_is_pin_sharing(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_sound_soc_sh_rcar_extr_ssiu.c_rsnd_ssiu_init |
; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_stack_user.c_sync_wait_cb.c'
source_filename = "AnghaBench/linux/fs/ocfs2/extr_stack_user.c_sync_wait_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sync_wait_cb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sync_wait_cb(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @complete(ptr noundef %2) #2
ret void
}
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ocfs2_cluster_connection", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_stack_user.c_sync_wait_cb.c'
source_filename = "AnghaBench/linux/fs/ocfs2/extr_stack_user.c_sync_wait_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sync_wait_cb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sync_wait_cb(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @complete(ptr noundef %2) #2
ret void
}
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ocfs2_cluster_connection", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_fs_ocfs2_extr_stack_user.c_sync_wait_cb |
; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/trace/extr_ring_buffer.c_rb_null_event.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/trace/extr_ring_buffer.c_rb_null_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ring_buffer_event = type { i64, i32 }
@RINGBUF_TYPE_PADDING = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @rb_null_event], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @rb_null_event(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @RINGBUF_TYPE_PADDING, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = getelementptr inbounds %struct.ring_buffer_event, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 8, !tbaa !12
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %1
%11 = phi i32 [ 0, %1 ], [ %9, %5 ]
ret i32 %11
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ring_buffer_event", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/trace/extr_ring_buffer.c_rb_null_event.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/trace/extr_ring_buffer.c_rb_null_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RINGBUF_TYPE_PADDING = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @rb_null_event], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @rb_null_event(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @RINGBUF_TYPE_PADDING, align 8, !tbaa !12
%4 = icmp eq i64 %2, %3
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i32, ptr %6, align 8, !tbaa !13
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %1
%11 = phi i32 [ 0, %1 ], [ %9, %5 ]
ret i32 %11
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ring_buffer_event", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
| fastsocket_kernel_kernel_trace_extr_ring_buffer.c_rb_null_event |
; ModuleID = 'AnghaBench/jemalloc/test/unit/extr_emitter.c_emit_table_printf.c'
source_filename = "AnghaBench/jemalloc/test/unit/extr_emitter.c_emit_table_printf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [14 x i8] c"Table note 1\0A\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"Table note 2 %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [19 x i8] c"with format string\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @emit_table_printf], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @emit_table_printf(ptr noundef %0) #0 {
%2 = tail call i32 @emitter_begin(ptr noundef %0) #2
%3 = tail call i32 (ptr, ptr, ...) @emitter_table_printf(ptr noundef %0, ptr noundef nonnull @.str) #2
%4 = tail call i32 (ptr, ptr, ...) @emitter_table_printf(ptr noundef %0, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #2
%5 = tail call i32 @emitter_end(ptr noundef %0) #2
ret void
}
declare i32 @emitter_begin(ptr noundef) local_unnamed_addr #1
declare i32 @emitter_table_printf(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @emitter_end(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/jemalloc/test/unit/extr_emitter.c_emit_table_printf.c'
source_filename = "AnghaBench/jemalloc/test/unit/extr_emitter.c_emit_table_printf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [14 x i8] c"Table note 1\0A\00", align 1
@.str.1 = private unnamed_addr constant [17 x i8] c"Table note 2 %s\0A\00", align 1
@.str.2 = private unnamed_addr constant [19 x i8] c"with format string\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @emit_table_printf], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @emit_table_printf(ptr noundef %0) #0 {
%2 = tail call i32 @emitter_begin(ptr noundef %0) #2
%3 = tail call i32 (ptr, ptr, ...) @emitter_table_printf(ptr noundef %0, ptr noundef nonnull @.str) #2
%4 = tail call i32 (ptr, ptr, ...) @emitter_table_printf(ptr noundef %0, ptr noundef nonnull @.str.1, ptr noundef nonnull @.str.2) #2
%5 = tail call i32 @emitter_end(ptr noundef %0) #2
ret void
}
declare i32 @emitter_begin(ptr noundef) local_unnamed_addr #1
declare i32 @emitter_table_printf(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @emitter_end(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| jemalloc_test_unit_extr_emitter.c_emit_table_printf |
; ModuleID = 'AnghaBench/linux/arch/powerpc/sysdev/extr_fsl_rcpm.c_rcpm_v1_plat_enter_sleep.c'
source_filename = "AnghaBench/linux/arch/powerpc/sysdev/extr_fsl_rcpm.c_rcpm_v1_plat_enter_sleep.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PLAT_PM_SLEEP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rcpm_v1_plat_enter_sleep], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rcpm_v1_plat_enter_sleep() #0 {
%1 = load i32, ptr @PLAT_PM_SLEEP, align 4, !tbaa !5
%2 = tail call i32 @rcpm_v1_plat_enter_state(i32 noundef %1) #2
ret i32 %2
}
declare i32 @rcpm_v1_plat_enter_state(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/powerpc/sysdev/extr_fsl_rcpm.c_rcpm_v1_plat_enter_sleep.c'
source_filename = "AnghaBench/linux/arch/powerpc/sysdev/extr_fsl_rcpm.c_rcpm_v1_plat_enter_sleep.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PLAT_PM_SLEEP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rcpm_v1_plat_enter_sleep], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rcpm_v1_plat_enter_sleep() #0 {
%1 = load i32, ptr @PLAT_PM_SLEEP, align 4, !tbaa !6
%2 = tail call i32 @rcpm_v1_plat_enter_state(i32 noundef %1) #2
ret i32 %2
}
declare i32 @rcpm_v1_plat_enter_state(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_powerpc_sysdev_extr_fsl_rcpm.c_rcpm_v1_plat_enter_sleep |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/wined3d/extr_context.c_have_framebuffer_attachment.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/wined3d/extr_context.c_have_framebuffer_attachment.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@WINED3DFMT_NULL = dso_local local_unnamed_addr global i64 0, align 8
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @have_framebuffer_attachment], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal i32 @have_framebuffer_attachment(i32 noundef %0, ptr nocapture noundef readonly %1, ptr noundef readnone %2) #0 {
%4 = icmp eq ptr %2, null
br i1 %4, label %5, label %22
5: ; preds = %3
%6 = icmp eq i32 %0, 0
br i1 %6, label %22, label %7
7: ; preds = %5
%8 = load i64, ptr @WINED3DFMT_NULL, align 8
%9 = zext i32 %0 to i64
br label %10
10: ; preds = %7, %19
%11 = phi i64 [ 0, %7 ], [ %20, %19 ]
%12 = getelementptr inbounds ptr, ptr %1, i64 %11
%13 = load ptr, ptr %12, align 8, !tbaa !5
%14 = icmp eq ptr %13, null
br i1 %14, label %19, label %15
15: ; preds = %10
%16 = load ptr, ptr %13, align 8, !tbaa !9
%17 = load i64, ptr %16, align 8, !tbaa !11
%18 = icmp eq i64 %17, %8
br i1 %18, label %19, label %22
19: ; preds = %10, %15
%20 = add nuw nsw i64 %11, 1
%21 = icmp eq i64 %20, %9
br i1 %21, label %22, label %10, !llvm.loop !14
22: ; preds = %15, %19, %5, %3
%23 = phi ptr [ @TRUE, %3 ], [ @FALSE, %5 ], [ @TRUE, %15 ], [ @FALSE, %19 ]
%24 = load i32, ptr %23, align 4, !tbaa !16
ret i32 %24
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"wined3d_rendertarget_view", !6, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/wined3d/extr_context.c_have_framebuffer_attachment.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/wined3d/extr_context.c_have_framebuffer_attachment.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TRUE = common local_unnamed_addr global i32 0, align 4
@WINED3DFMT_NULL = common local_unnamed_addr global i64 0, align 8
@FALSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @have_framebuffer_attachment], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @have_framebuffer_attachment(i32 noundef %0, ptr nocapture noundef readonly %1, ptr noundef readnone %2) #0 {
%4 = icmp eq ptr %2, null
br i1 %4, label %5, label %22
5: ; preds = %3
%6 = icmp eq i32 %0, 0
br i1 %6, label %22, label %7
7: ; preds = %5
%8 = load i64, ptr @WINED3DFMT_NULL, align 8
%9 = zext i32 %0 to i64
br label %10
10: ; preds = %7, %19
%11 = phi i64 [ 0, %7 ], [ %20, %19 ]
%12 = getelementptr inbounds ptr, ptr %1, i64 %11
%13 = load ptr, ptr %12, align 8, !tbaa !6
%14 = icmp eq ptr %13, null
br i1 %14, label %19, label %15
15: ; preds = %10
%16 = load ptr, ptr %13, align 8, !tbaa !10
%17 = load i64, ptr %16, align 8, !tbaa !12
%18 = icmp eq i64 %17, %8
br i1 %18, label %19, label %22
19: ; preds = %10, %15
%20 = add nuw nsw i64 %11, 1
%21 = icmp eq i64 %20, %9
br i1 %21, label %22, label %10, !llvm.loop !15
22: ; preds = %15, %19, %5, %3
%23 = phi ptr [ @TRUE, %3 ], [ @FALSE, %5 ], [ @TRUE, %15 ], [ @FALSE, %19 ]
%24 = load i32, ptr %23, align 4, !tbaa !17
ret i32 %24
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"wined3d_rendertarget_view", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !18, i64 0}
!18 = !{!"int", !8, i64 0}
| reactos_dll_directx_wine_wined3d_extr_context.c_have_framebuffer_attachment |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_sol-thread.c_sol_find_new_threads_callback.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_sol-thread.c_sol_find_new_threads_callback.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32 }
@TD_OK = dso_local local_unnamed_addr global i32 0, align 4
@inferior_ptid = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @sol_find_new_threads_callback], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @sol_find_new_threads_callback(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = alloca %struct.TYPE_3__, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @p_td_thr_get_info(ptr noundef %0, ptr noundef nonnull %3) #3
%5 = load i32, ptr @TD_OK, align 4, !tbaa !5
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, ptr %3, align 4, !tbaa !9
%9 = load i32, ptr @inferior_ptid, align 4, !tbaa !5
%10 = call i32 @PIDGET(i32 noundef %9) #3
%11 = call i32 @BUILD_THREAD(i32 noundef %8, i32 noundef %10) #3
%12 = call i32 @in_thread_list(i32 noundef %11) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %7
%15 = call i32 @add_thread(i32 noundef %11) #3
br label %16
16: ; preds = %7, %14, %2
%17 = phi i32 [ -1, %2 ], [ 0, %14 ], [ 0, %7 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %17
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @p_td_thr_get_info(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BUILD_THREAD(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @PIDGET(i32 noundef) local_unnamed_addr #2
declare i32 @in_thread_list(i32 noundef) local_unnamed_addr #2
declare i32 @add_thread(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_3__", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_sol-thread.c_sol_find_new_threads_callback.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_sol-thread.c_sol_find_new_threads_callback.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32 }
@TD_OK = common local_unnamed_addr global i32 0, align 4
@inferior_ptid = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @sol_find_new_threads_callback], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @sol_find_new_threads_callback(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = alloca %struct.TYPE_3__, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @p_td_thr_get_info(ptr noundef %0, ptr noundef nonnull %3) #3
%5 = load i32, ptr @TD_OK, align 4, !tbaa !6
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %16
7: ; preds = %2
%8 = load i32, ptr %3, align 4, !tbaa !10
%9 = load i32, ptr @inferior_ptid, align 4, !tbaa !6
%10 = call i32 @PIDGET(i32 noundef %9) #3
%11 = call i32 @BUILD_THREAD(i32 noundef %8, i32 noundef %10) #3
%12 = call i32 @in_thread_list(i32 noundef %11) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %7
%15 = call i32 @add_thread(i32 noundef %11) #3
br label %16
16: ; preds = %7, %14, %2
%17 = phi i32 [ -1, %2 ], [ 0, %14 ], [ 0, %7 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %17
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @p_td_thr_get_info(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @BUILD_THREAD(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @PIDGET(i32 noundef) local_unnamed_addr #2
declare i32 @in_thread_list(i32 noundef) local_unnamed_addr #2
declare i32 @add_thread(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0}
| freebsd_contrib_gdb_gdb_extr_sol-thread.c_sol_find_new_threads_callback |
; ModuleID = 'AnghaBench/freebsd/contrib/serf/extr_context.c_serf_config_credentials_callback.c'
source_filename = "AnghaBench/freebsd/contrib/serf/extr_context.c_serf_config_credentials_callback.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @serf_config_credentials_callback(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/serf/extr_context.c_serf_config_credentials_callback.c'
source_filename = "AnghaBench/freebsd/contrib/serf/extr_context.c_serf_config_credentials_callback.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @serf_config_credentials_callback(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_serf_extr_context.c_serf_config_credentials_callback |
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_ble_adv_filter.c_btm_ble_update_srvc_data_change.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_ble_adv_filter.c_btm_ble_update_srvc_data_change.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BTM_ILLEGAL_VALUE = dso_local local_unnamed_addr global i32 0, align 4
@BTM_BLE_SCAN_COND_ADD = dso_local local_unnamed_addr global i64 0, align 8
@BTM_BLE_PF_SRVC_DATA = dso_local local_unnamed_addr global i32 0, align 4
@BTM_BLE_INVALID_COUNTER = dso_local local_unnamed_addr global i64 0, align 8
@BTM_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @btm_ble_update_srvc_data_change(i64 noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @BTM_ILLEGAL_VALUE, align 4, !tbaa !5
%5 = load i64, ptr @BTM_BLE_SCAN_COND_ADD, align 8, !tbaa !9
%6 = icmp ne i64 %5, %0
%7 = zext i1 %6 to i32
%8 = load i32, ptr @BTM_BLE_PF_SRVC_DATA, align 4, !tbaa !5
%9 = tail call i64 @btm_ble_cs_update_pf_counter(i64 noundef %0, i32 noundef %8, ptr noundef %2, i32 noundef %7) #2
%10 = load i64, ptr @BTM_BLE_INVALID_COUNTER, align 8, !tbaa !9
%11 = icmp eq i64 %9, %10
%12 = load i32, ptr @BTM_SUCCESS, align 4
%13 = select i1 %11, i32 %4, i32 %12
ret i32 %13
}
declare i64 @btm_ble_cs_update_pf_counter(i64 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_ble_adv_filter.c_btm_ble_update_srvc_data_change.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/btm/extr_btm_ble_adv_filter.c_btm_ble_update_srvc_data_change.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BTM_ILLEGAL_VALUE = common local_unnamed_addr global i32 0, align 4
@BTM_BLE_SCAN_COND_ADD = common local_unnamed_addr global i64 0, align 8
@BTM_BLE_PF_SRVC_DATA = common local_unnamed_addr global i32 0, align 4
@BTM_BLE_INVALID_COUNTER = common local_unnamed_addr global i64 0, align 8
@BTM_SUCCESS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @btm_ble_update_srvc_data_change(i64 noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @BTM_ILLEGAL_VALUE, align 4, !tbaa !6
%5 = load i64, ptr @BTM_BLE_SCAN_COND_ADD, align 8, !tbaa !10
%6 = icmp ne i64 %5, %0
%7 = zext i1 %6 to i32
%8 = load i32, ptr @BTM_BLE_PF_SRVC_DATA, align 4, !tbaa !6
%9 = tail call i64 @btm_ble_cs_update_pf_counter(i64 noundef %0, i32 noundef %8, ptr noundef %2, i32 noundef %7) #2
%10 = load i64, ptr @BTM_BLE_INVALID_COUNTER, align 8, !tbaa !10
%11 = icmp eq i64 %9, %10
%12 = load i32, ptr @BTM_SUCCESS, align 4
%13 = select i1 %11, i32 %4, i32 %12
ret i32 %13
}
declare i64 @btm_ble_cs_update_pf_counter(i64 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| esp-idf_components_bt_host_bluedroid_stack_btm_extr_btm_ble_adv_filter.c_btm_ble_update_srvc_data_change |
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