IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/hashcat/deps/LZMA-SDK/C/extr_MtDec.c_MtDec_Free.c'
source_filename = "AnghaBench/hashcat/deps/LZMA-SDK/C/extr_MtDec.c_MtDec_Free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i32, ptr, i32 }
@True = dso_local local_unnamed_addr global i32 0, align 4
@MTDEC__THREADS_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @MtDec_Free], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @MtDec_Free(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr @True, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
store i32 %2, ptr %3, align 8, !tbaa !9
%4 = load i32, ptr @MTDEC__THREADS_MAX, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %13, %8 ]
%10 = load ptr, ptr %7, align 8, !tbaa !12
%11 = getelementptr inbounds i32, ptr %10, i64 %9
%12 = tail call i32 @MtDecThread_Destruct(ptr noundef %11) #2
%13 = add nuw nsw i64 %9, 1
%14 = load i32, ptr @MTDEC__THREADS_MAX, align 4, !tbaa !5
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %13, %15
br i1 %16, label %8, label %17, !llvm.loop !13
17: ; preds = %8, %1
%18 = load ptr, ptr %0, align 8, !tbaa !15
%19 = icmp eq ptr %18, null
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%22 = load i32, ptr %21, align 8, !tbaa !16
%23 = tail call i32 @ISzAlloc_Free(i32 noundef %22, ptr noundef nonnull %18) #2
store ptr null, ptr %0, align 8, !tbaa !15
br label %24
24: ; preds = %20, %17
ret void
}
declare i32 @MtDecThread_Destruct(ptr noundef) local_unnamed_addr #1
declare i32 @ISzAlloc_Free(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"TYPE_3__", !11, i64 0, !6, i64 8, !11, i64 16, !6, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 16}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!10, !11, i64 0}
!16 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/hashcat/deps/LZMA-SDK/C/extr_MtDec.c_MtDec_Free.c'
source_filename = "AnghaBench/hashcat/deps/LZMA-SDK/C/extr_MtDec.c_MtDec_Free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@True = common local_unnamed_addr global i32 0, align 4
@MTDEC__THREADS_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @MtDec_Free], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @MtDec_Free(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr @True, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %2, ptr %3, align 8, !tbaa !10
%4 = load i32, ptr @MTDEC__THREADS_MAX, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 16
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %13, %8 ]
%10 = load ptr, ptr %7, align 8, !tbaa !13
%11 = getelementptr inbounds i32, ptr %10, i64 %9
%12 = tail call i32 @MtDecThread_Destruct(ptr noundef %11) #2
%13 = add nuw nsw i64 %9, 1
%14 = load i32, ptr @MTDEC__THREADS_MAX, align 4, !tbaa !6
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %13, %15
br i1 %16, label %8, label %17, !llvm.loop !14
17: ; preds = %8, %1
%18 = load ptr, ptr %0, align 8, !tbaa !16
%19 = icmp eq ptr %18, null
br i1 %19, label %24, label %20
20: ; preds = %17
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = load i32, ptr %21, align 8, !tbaa !17
%23 = tail call i32 @ISzAlloc_Free(i32 noundef %22, ptr noundef nonnull %18) #2
store ptr null, ptr %0, align 8, !tbaa !16
br label %24
24: ; preds = %20, %17
ret void
}
declare i32 @MtDecThread_Destruct(ptr noundef) local_unnamed_addr #1
declare i32 @ISzAlloc_Free(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"TYPE_3__", !12, i64 0, !7, i64 8, !12, i64 16, !7, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!11, !12, i64 0}
!17 = !{!11, !7, i64 8}
| hashcat_deps_LZMA-SDK_C_extr_MtDec.c_MtDec_Free |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_cmsg.c_nfp_bpf_cmsg_alloc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_cmsg.c_nfp_bpf_cmsg_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfp_bpf_cmsg_alloc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @nfp_bpf_cmsg_alloc(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !10
%5 = tail call ptr @nfp_app_ctrl_msg_alloc(i32 noundef %3, i32 noundef %1, i32 noundef %4) #2
%6 = tail call i32 @skb_put(ptr noundef %5, i32 noundef %1) #2
ret ptr %5
}
declare ptr @nfp_app_ctrl_msg_alloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @skb_put(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nfp_app_bpf", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_cmsg.c_nfp_bpf_cmsg_alloc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_cmsg.c_nfp_bpf_cmsg_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nfp_bpf_cmsg_alloc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @nfp_bpf_cmsg_alloc(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11
%5 = tail call ptr @nfp_app_ctrl_msg_alloc(i32 noundef %3, i32 noundef %1, i32 noundef %4) #2
%6 = tail call i32 @skb_put(ptr noundef %5, i32 noundef %1) #2
ret ptr %5
}
declare ptr @nfp_app_ctrl_msg_alloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @skb_put(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nfp_app_bpf", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_net_ethernet_netronome_nfp_bpf_extr_cmsg.c_nfp_bpf_cmsg_alloc |
; ModuleID = 'AnghaBench/openwrt/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/extr_mt753x_mdio.c_mt753x_probe.c'
source_filename = "AnghaBench/openwrt/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/extr_mt753x_mdio.c_mt753x_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.chip_rev = type { i32, i32 }
%struct.gsw_mt753x = type { i32, i64, ptr, i32, i32, i32, i32, i32, i32, ptr }
%struct.mt753x_sw_id = type { ptr, ptr, i32, ptr }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"mediatek,mdio\00", align 1
@EPROBE_DEFER = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [18 x i8] c"mediatek,smi-addr\00", align 1
@MT753X_DFL_SMI_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [25 x i8] c"LAN/WAN VLAN setting=%s\0A\00", align 1
@mt753x_sw_ids = dso_local local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [29 x i8] c"Switch is MediaTek %s rev %d\00", align 1
@.str.4 = private unnamed_addr constant [24 x i8] c"No mt753x switch found\0A\00", align 1
@mt753x_irq_handler = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [26 x i8] c"Failed to request irq %d\0A\00", align 1
@mt753x_irq_worker = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [18 x i8] c"mediatek,phy-poll\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mt753x_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mt753x_probe(ptr noundef %0) #0 {
%2 = alloca %struct.chip_rev, align 4
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load i32, ptr @EINVAL, align 4, !tbaa !11
%5 = sub nsw i32 0, %4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%6 = tail call ptr @of_parse_phandle(ptr noundef %3, ptr noundef nonnull @.str, i32 noundef 0) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, ptr @EINVAL, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %132
11: ; preds = %1
%12 = tail call ptr @of_mdio_find_bus(ptr noundef nonnull %6) #3
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, ptr @EPROBE_DEFER, align 4, !tbaa !11
%16 = sub nsw i32 0, %15
br label %132
17: ; preds = %11
%18 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11
%19 = tail call ptr @devm_kzalloc(ptr noundef nonnull %0, i32 noundef 56, i32 noundef %18) #3
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load i32, ptr @ENOMEM, align 4, !tbaa !11
%23 = sub nsw i32 0, %22
br label %132
24: ; preds = %17
%25 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 9
store ptr %12, ptr %25, align 8, !tbaa !13
%26 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 2
store ptr %0, ptr %26, align 8, !tbaa !16
%27 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 8
%28 = tail call i32 @mutex_init(ptr noundef nonnull %27) #3
%29 = tail call i64 @mt753x_hw_reset(ptr noundef nonnull %19) #3
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %129
31: ; preds = %24
%32 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 7
%33 = tail call i64 @of_property_read_u32(ptr noundef %3, ptr noundef nonnull @.str.1, ptr noundef nonnull %32) #3
%34 = icmp eq i64 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %31
%36 = load i32, ptr @MT753X_DFL_SMI_ADDR, align 4, !tbaa !11
store i32 %36, ptr %32, align 8, !tbaa !17
br label %37
37: ; preds = %35, %31
%38 = tail call ptr @mt753x_find_mapping(ptr noundef %3) #3
%39 = icmp eq ptr %38, null
br i1 %39, label %45, label %40
40: ; preds = %37
%41 = tail call i32 @mt753x_apply_mapping(ptr noundef nonnull %19, ptr noundef nonnull %38) #3
store i32 1, ptr %19, align 8, !tbaa !18
%42 = load ptr, ptr %26, align 8, !tbaa !16
%43 = load i32, ptr %38, align 4, !tbaa !19
%44 = tail call i32 (ptr, ptr, i32, ...) @dev_info(ptr noundef %42, ptr noundef nonnull @.str.2, i32 noundef %43) #3
br label %45
45: ; preds = %40, %37
%46 = tail call i32 @mt753x_load_port_cfg(ptr noundef nonnull %19) #3
%47 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !21
%48 = tail call i32 @ARRAY_SIZE(ptr noundef %47) #3
%49 = icmp sgt i32 %48, 0
br i1 %49, label %50, label %83
50: ; preds = %45, %76
%51 = phi i64 [ %77, %76 ], [ 0, %45 ]
%52 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !21
%53 = getelementptr inbounds ptr, ptr %52, i64 %51
%54 = load ptr, ptr %53, align 8, !tbaa !21
%55 = getelementptr inbounds %struct.mt753x_sw_id, ptr %54, i64 0, i32 3
%56 = load ptr, ptr %55, align 8, !tbaa !22
%57 = call i32 %56(ptr noundef %19, ptr noundef nonnull %2) #3
%58 = icmp eq i32 %57, 0
%59 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !21
br i1 %58, label %60, label %76
60: ; preds = %50
%61 = trunc i64 %51 to i32
%62 = getelementptr inbounds ptr, ptr %59, i64 %51
%63 = load ptr, ptr %62, align 8, !tbaa !21
%64 = getelementptr inbounds %struct.chip_rev, ptr %2, i64 0, i32 1
%65 = load i32, ptr %64, align 4, !tbaa !24
%66 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 5
store i32 %65, ptr %66, align 8, !tbaa !26
%67 = getelementptr inbounds %struct.mt753x_sw_id, ptr %63, i64 0, i32 2
%68 = load i32, ptr %67, align 8, !tbaa !27
%69 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 6
store i32 %68, ptr %69, align 4, !tbaa !28
%70 = load ptr, ptr %26, align 8, !tbaa !16
%71 = load i32, ptr %2, align 4, !tbaa !29
%72 = call i32 (ptr, ptr, i32, ...) @dev_info(ptr noundef %70, ptr noundef nonnull @.str.3, i32 noundef %65, i32 noundef %71) #3
%73 = load ptr, ptr %63, align 8, !tbaa !30
%74 = call i32 %73(ptr noundef %19) #3
%75 = icmp eq i32 %74, 0
br i1 %75, label %83, label %129
76: ; preds = %50
%77 = add nuw nsw i64 %51, 1
%78 = call i32 @ARRAY_SIZE(ptr noundef %59) #3
%79 = sext i32 %78 to i64
%80 = icmp slt i64 %77, %79
br i1 %80, label %50, label %81, !llvm.loop !31
81: ; preds = %76
%82 = trunc i64 %77 to i32
br label %83
83: ; preds = %81, %45, %60
%84 = phi i32 [ %61, %60 ], [ 0, %45 ], [ %82, %81 ]
%85 = phi ptr [ %63, %60 ], [ undef, %45 ], [ undef, %81 ]
%86 = phi i32 [ 0, %60 ], [ %5, %45 ], [ %5, %81 ]
%87 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !21
%88 = call i32 @ARRAY_SIZE(ptr noundef %87) #3
%89 = icmp slt i32 %84, %88
br i1 %89, label %93, label %90
90: ; preds = %83
%91 = load ptr, ptr %26, align 8, !tbaa !16
%92 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %91, ptr noundef nonnull @.str.4) #3
br label %129
93: ; preds = %83
%94 = call i64 @platform_get_irq(ptr noundef nonnull %0, i32 noundef 0) #3
%95 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 1
store i64 %94, ptr %95, align 8, !tbaa !33
%96 = icmp sgt i64 %94, -1
br i1 %96, label %97, label %111
97: ; preds = %93
%98 = load ptr, ptr %26, align 8, !tbaa !16
%99 = load i32, ptr @mt753x_irq_handler, align 4, !tbaa !11
%100 = call i32 @dev_name(ptr noundef %98) #3
%101 = call i32 @devm_request_irq(ptr noundef %98, i64 noundef %94, i32 noundef %99, i32 noundef 0, i32 noundef %100, ptr noundef nonnull %19) #3
%102 = icmp eq i32 %101, 0
br i1 %102, label %107, label %103
103: ; preds = %97
%104 = load ptr, ptr %26, align 8, !tbaa !16
%105 = load i64, ptr %95, align 8, !tbaa !33
%106 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %104, ptr noundef nonnull @.str.5, i64 noundef %105) #3
br label %129
107: ; preds = %97
%108 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 4
%109 = load i32, ptr @mt753x_irq_worker, align 4, !tbaa !11
%110 = call i32 @INIT_WORK(ptr noundef nonnull %108, i32 noundef %109) #3
br label %111
111: ; preds = %107, %93
%112 = call i32 @platform_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %19) #3
%113 = load ptr, ptr %26, align 8, !tbaa !16
%114 = load ptr, ptr %113, align 8, !tbaa !34
%115 = call i32 @of_property_read_bool(ptr noundef %114, ptr noundef nonnull @.str.6) #3
%116 = getelementptr inbounds %struct.gsw_mt753x, ptr %19, i64 0, i32 3
store i32 %115, ptr %116, align 8, !tbaa !35
%117 = call i32 @mt753x_add_gsw(ptr noundef nonnull %19) #3
%118 = call i32 @mt753x_swconfig_init(ptr noundef nonnull %19) #3
%119 = getelementptr inbounds %struct.mt753x_sw_id, ptr %85, i64 0, i32 1
%120 = load ptr, ptr %119, align 8, !tbaa !36
%121 = icmp eq ptr %120, null
br i1 %121, label %124, label %122
122: ; preds = %111
%123 = call i32 %120(ptr noundef nonnull %19) #3
br label %124
124: ; preds = %122, %111
%125 = load i64, ptr %95, align 8, !tbaa !33
%126 = icmp sgt i64 %125, -1
br i1 %126, label %127, label %132
127: ; preds = %124
%128 = call i32 @mt753x_irq_enable(ptr noundef nonnull %19) #3
br label %132
129: ; preds = %60, %24, %103, %90
%130 = phi i32 [ %5, %24 ], [ %74, %60 ], [ %86, %90 ], [ %101, %103 ]
%131 = call i32 @devm_kfree(ptr noundef nonnull %0, ptr noundef nonnull %19) #3
br label %132
132: ; preds = %124, %127, %129, %21, %14, %8
%133 = phi i32 [ %130, %129 ], [ %23, %21 ], [ %16, %14 ], [ %10, %8 ], [ 0, %127 ], [ 0, %124 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %133
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @of_parse_phandle(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @of_mdio_find_bus(ptr noundef) local_unnamed_addr #2
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #2
declare i64 @mt753x_hw_reset(ptr noundef) local_unnamed_addr #2
declare i64 @of_property_read_u32(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @mt753x_find_mapping(ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_apply_mapping(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @mt753x_load_port_cfg(ptr noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #2
declare i64 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @devm_request_irq(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_name(ptr noundef) local_unnamed_addr #2
declare i32 @INIT_WORK(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @of_property_read_bool(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_add_gsw(ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_swconfig_init(ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_irq_enable(ptr noundef) local_unnamed_addr #2
declare i32 @devm_kfree(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"platform_device", !7, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !8, i64 48}
!14 = !{!"gsw_mt753x", !12, i64 0, !15, i64 8, !8, i64 16, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !8, i64 48}
!15 = !{!"long", !9, i64 0}
!16 = !{!14, !8, i64 16}
!17 = !{!14, !12, i64 40}
!18 = !{!14, !12, i64 0}
!19 = !{!20, !12, i64 0}
!20 = !{!"mt753x_mapping", !12, i64 0}
!21 = !{!8, !8, i64 0}
!22 = !{!23, !8, i64 24}
!23 = !{!"mt753x_sw_id", !8, i64 0, !8, i64 8, !12, i64 16, !8, i64 24}
!24 = !{!25, !12, i64 4}
!25 = !{!"chip_rev", !12, i64 0, !12, i64 4}
!26 = !{!14, !12, i64 32}
!27 = !{!23, !12, i64 16}
!28 = !{!14, !12, i64 36}
!29 = !{!25, !12, i64 0}
!30 = !{!23, !8, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = !{!14, !15, i64 8}
!34 = !{!7, !8, i64 0}
!35 = !{!14, !12, i64 24}
!36 = !{!23, !8, i64 8}
| ; ModuleID = 'AnghaBench/openwrt/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/extr_mt753x_mdio.c_mt753x_probe.c'
source_filename = "AnghaBench/openwrt/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/extr_mt753x_mdio.c_mt753x_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.chip_rev = type { i32, i32 }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"mediatek,mdio\00", align 1
@EPROBE_DEFER = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [18 x i8] c"mediatek,smi-addr\00", align 1
@MT753X_DFL_SMI_ADDR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [25 x i8] c"LAN/WAN VLAN setting=%s\0A\00", align 1
@mt753x_sw_ids = common local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [29 x i8] c"Switch is MediaTek %s rev %d\00", align 1
@.str.4 = private unnamed_addr constant [24 x i8] c"No mt753x switch found\0A\00", align 1
@mt753x_irq_handler = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [26 x i8] c"Failed to request irq %d\0A\00", align 1
@mt753x_irq_worker = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [18 x i8] c"mediatek,phy-poll\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mt753x_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mt753x_probe(ptr noundef %0) #0 {
%2 = alloca %struct.chip_rev, align 4
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr @EINVAL, align 4, !tbaa !12
%5 = sub nsw i32 0, %4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%6 = tail call ptr @of_parse_phandle(ptr noundef %3, ptr noundef nonnull @.str, i32 noundef 0) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, ptr @EINVAL, align 4, !tbaa !12
%10 = sub nsw i32 0, %9
br label %132
11: ; preds = %1
%12 = tail call ptr @of_mdio_find_bus(ptr noundef nonnull %6) #3
%13 = icmp eq ptr %12, null
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, ptr @EPROBE_DEFER, align 4, !tbaa !12
%16 = sub nsw i32 0, %15
br label %132
17: ; preds = %11
%18 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12
%19 = tail call ptr @devm_kzalloc(ptr noundef nonnull %0, i32 noundef 56, i32 noundef %18) #3
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%23 = sub nsw i32 0, %22
br label %132
24: ; preds = %17
%25 = getelementptr inbounds i8, ptr %19, i64 48
store ptr %12, ptr %25, align 8, !tbaa !14
%26 = getelementptr inbounds i8, ptr %19, i64 16
store ptr %0, ptr %26, align 8, !tbaa !17
%27 = getelementptr inbounds i8, ptr %19, i64 44
%28 = tail call i32 @mutex_init(ptr noundef nonnull %27) #3
%29 = tail call i64 @mt753x_hw_reset(ptr noundef nonnull %19) #3
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %129
31: ; preds = %24
%32 = getelementptr inbounds i8, ptr %19, i64 40
%33 = tail call i64 @of_property_read_u32(ptr noundef %3, ptr noundef nonnull @.str.1, ptr noundef nonnull %32) #3
%34 = icmp eq i64 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %31
%36 = load i32, ptr @MT753X_DFL_SMI_ADDR, align 4, !tbaa !12
store i32 %36, ptr %32, align 8, !tbaa !18
br label %37
37: ; preds = %35, %31
%38 = tail call ptr @mt753x_find_mapping(ptr noundef %3) #3
%39 = icmp eq ptr %38, null
br i1 %39, label %45, label %40
40: ; preds = %37
%41 = tail call i32 @mt753x_apply_mapping(ptr noundef nonnull %19, ptr noundef nonnull %38) #3
store i32 1, ptr %19, align 8, !tbaa !19
%42 = load ptr, ptr %26, align 8, !tbaa !17
%43 = load i32, ptr %38, align 4, !tbaa !20
%44 = tail call i32 (ptr, ptr, i32, ...) @dev_info(ptr noundef %42, ptr noundef nonnull @.str.2, i32 noundef %43) #3
br label %45
45: ; preds = %40, %37
%46 = tail call i32 @mt753x_load_port_cfg(ptr noundef nonnull %19) #3
%47 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !22
%48 = tail call i32 @ARRAY_SIZE(ptr noundef %47) #3
%49 = icmp sgt i32 %48, 0
br i1 %49, label %50, label %83
50: ; preds = %45, %76
%51 = phi i64 [ %77, %76 ], [ 0, %45 ]
%52 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !22
%53 = getelementptr inbounds ptr, ptr %52, i64 %51
%54 = load ptr, ptr %53, align 8, !tbaa !22
%55 = getelementptr inbounds i8, ptr %54, i64 24
%56 = load ptr, ptr %55, align 8, !tbaa !23
%57 = call i32 %56(ptr noundef %19, ptr noundef nonnull %2) #3
%58 = icmp eq i32 %57, 0
%59 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !22
br i1 %58, label %60, label %76
60: ; preds = %50
%61 = trunc nuw nsw i64 %51 to i32
%62 = getelementptr inbounds ptr, ptr %59, i64 %51
%63 = load ptr, ptr %62, align 8, !tbaa !22
%64 = getelementptr inbounds i8, ptr %2, i64 4
%65 = load i32, ptr %64, align 4, !tbaa !25
%66 = getelementptr inbounds i8, ptr %19, i64 32
store i32 %65, ptr %66, align 8, !tbaa !27
%67 = getelementptr inbounds i8, ptr %63, i64 16
%68 = load i32, ptr %67, align 8, !tbaa !28
%69 = getelementptr inbounds i8, ptr %19, i64 36
store i32 %68, ptr %69, align 4, !tbaa !29
%70 = load ptr, ptr %26, align 8, !tbaa !17
%71 = load i32, ptr %2, align 4, !tbaa !30
%72 = call i32 (ptr, ptr, i32, ...) @dev_info(ptr noundef %70, ptr noundef nonnull @.str.3, i32 noundef %65, i32 noundef %71) #3
%73 = load ptr, ptr %63, align 8, !tbaa !31
%74 = call i32 %73(ptr noundef %19) #3
%75 = icmp eq i32 %74, 0
br i1 %75, label %83, label %129
76: ; preds = %50
%77 = add nuw nsw i64 %51, 1
%78 = call i32 @ARRAY_SIZE(ptr noundef %59) #3
%79 = sext i32 %78 to i64
%80 = icmp slt i64 %77, %79
br i1 %80, label %50, label %81, !llvm.loop !32
81: ; preds = %76
%82 = trunc nuw nsw i64 %77 to i32
br label %83
83: ; preds = %81, %45, %60
%84 = phi i32 [ %61, %60 ], [ 0, %45 ], [ %82, %81 ]
%85 = phi ptr [ %63, %60 ], [ undef, %45 ], [ undef, %81 ]
%86 = phi i32 [ 0, %60 ], [ %5, %45 ], [ %5, %81 ]
%87 = load ptr, ptr @mt753x_sw_ids, align 8, !tbaa !22
%88 = call i32 @ARRAY_SIZE(ptr noundef %87) #3
%89 = icmp slt i32 %84, %88
br i1 %89, label %93, label %90
90: ; preds = %83
%91 = load ptr, ptr %26, align 8, !tbaa !17
%92 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %91, ptr noundef nonnull @.str.4) #3
br label %129
93: ; preds = %83
%94 = call i64 @platform_get_irq(ptr noundef nonnull %0, i32 noundef 0) #3
%95 = getelementptr inbounds i8, ptr %19, i64 8
store i64 %94, ptr %95, align 8, !tbaa !34
%96 = icmp sgt i64 %94, -1
br i1 %96, label %97, label %111
97: ; preds = %93
%98 = load ptr, ptr %26, align 8, !tbaa !17
%99 = load i32, ptr @mt753x_irq_handler, align 4, !tbaa !12
%100 = call i32 @dev_name(ptr noundef %98) #3
%101 = call i32 @devm_request_irq(ptr noundef %98, i64 noundef %94, i32 noundef %99, i32 noundef 0, i32 noundef %100, ptr noundef nonnull %19) #3
%102 = icmp eq i32 %101, 0
br i1 %102, label %107, label %103
103: ; preds = %97
%104 = load ptr, ptr %26, align 8, !tbaa !17
%105 = load i64, ptr %95, align 8, !tbaa !34
%106 = call i32 (ptr, ptr, ...) @dev_err(ptr noundef %104, ptr noundef nonnull @.str.5, i64 noundef %105) #3
br label %129
107: ; preds = %97
%108 = getelementptr inbounds i8, ptr %19, i64 28
%109 = load i32, ptr @mt753x_irq_worker, align 4, !tbaa !12
%110 = call i32 @INIT_WORK(ptr noundef nonnull %108, i32 noundef %109) #3
br label %111
111: ; preds = %107, %93
%112 = call i32 @platform_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %19) #3
%113 = load ptr, ptr %26, align 8, !tbaa !17
%114 = load ptr, ptr %113, align 8, !tbaa !35
%115 = call i32 @of_property_read_bool(ptr noundef %114, ptr noundef nonnull @.str.6) #3
%116 = getelementptr inbounds i8, ptr %19, i64 24
store i32 %115, ptr %116, align 8, !tbaa !36
%117 = call i32 @mt753x_add_gsw(ptr noundef nonnull %19) #3
%118 = call i32 @mt753x_swconfig_init(ptr noundef nonnull %19) #3
%119 = getelementptr inbounds i8, ptr %85, i64 8
%120 = load ptr, ptr %119, align 8, !tbaa !37
%121 = icmp eq ptr %120, null
br i1 %121, label %124, label %122
122: ; preds = %111
%123 = call i32 %120(ptr noundef nonnull %19) #3
br label %124
124: ; preds = %122, %111
%125 = load i64, ptr %95, align 8, !tbaa !34
%126 = icmp sgt i64 %125, -1
br i1 %126, label %127, label %132
127: ; preds = %124
%128 = call i32 @mt753x_irq_enable(ptr noundef nonnull %19) #3
br label %132
129: ; preds = %60, %24, %103, %90
%130 = phi i32 [ %5, %24 ], [ %74, %60 ], [ %86, %90 ], [ %101, %103 ]
%131 = call i32 @devm_kfree(ptr noundef nonnull %0, ptr noundef nonnull %19) #3
br label %132
132: ; preds = %124, %127, %129, %21, %14, %8
%133 = phi i32 [ %130, %129 ], [ %23, %21 ], [ %16, %14 ], [ %10, %8 ], [ 0, %127 ], [ 0, %124 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %133
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @of_parse_phandle(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @of_mdio_find_bus(ptr noundef) local_unnamed_addr #2
declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_init(ptr noundef) local_unnamed_addr #2
declare i64 @mt753x_hw_reset(ptr noundef) local_unnamed_addr #2
declare i64 @of_property_read_u32(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @mt753x_find_mapping(ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_apply_mapping(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_info(ptr noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @mt753x_load_port_cfg(ptr noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef, ...) local_unnamed_addr #2
declare i64 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @devm_request_irq(ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @dev_name(ptr noundef) local_unnamed_addr #2
declare i32 @INIT_WORK(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @of_property_read_bool(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_add_gsw(ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_swconfig_init(ptr noundef) local_unnamed_addr #2
declare i32 @mt753x_irq_enable(ptr noundef) local_unnamed_addr #2
declare i32 @devm_kfree(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"platform_device", !8, i64 0}
!8 = !{!"TYPE_7__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!15, !9, i64 48}
!15 = !{!"gsw_mt753x", !13, i64 0, !16, i64 8, !9, i64 16, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !9, i64 48}
!16 = !{!"long", !10, i64 0}
!17 = !{!15, !9, i64 16}
!18 = !{!15, !13, i64 40}
!19 = !{!15, !13, i64 0}
!20 = !{!21, !13, i64 0}
!21 = !{!"mt753x_mapping", !13, i64 0}
!22 = !{!9, !9, i64 0}
!23 = !{!24, !9, i64 24}
!24 = !{!"mt753x_sw_id", !9, i64 0, !9, i64 8, !13, i64 16, !9, i64 24}
!25 = !{!26, !13, i64 4}
!26 = !{!"chip_rev", !13, i64 0, !13, i64 4}
!27 = !{!15, !13, i64 32}
!28 = !{!24, !13, i64 16}
!29 = !{!15, !13, i64 36}
!30 = !{!26, !13, i64 0}
!31 = !{!24, !9, i64 0}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = !{!15, !16, i64 8}
!35 = !{!8, !9, i64 0}
!36 = !{!15, !13, i64 24}
!37 = !{!24, !9, i64 8}
| openwrt_target_linux_mediatek_files-4.19_drivers_net_phy_mtk_mt753x_extr_mt753x_mdio.c_mt753x_probe |
; ModuleID = 'AnghaBench/freebsd/lib/libfigpar/extr_figpar.c_parse_config.c'
source_filename = "AnghaBench/freebsd/lib/libfigpar/extr_figpar.c_parse_config.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.figpar_config = type { ptr, ptr }
@PATH_MAX = dso_local local_unnamed_addr global i32 0, align 4
@FIGPAR_BREAK_ON_EQUALS = dso_local local_unnamed_addr global i32 0, align 4
@FIGPAR_BREAK_ON_SEMICOLON = dso_local local_unnamed_addr global i32 0, align 4
@FIGPAR_CASE_SENSITIVE = dso_local local_unnamed_addr global i32 0, align 4
@FIGPAR_REQUIRE_EQUALS = dso_local local_unnamed_addr global i32 0, align 4
@FIGPAR_STRICT_EQUALS = dso_local local_unnamed_addr global i32 0, align 4
@O_RDONLY = dso_local local_unnamed_addr global i32 0, align 4
@SEEK_CUR = dso_local local_unnamed_addr global i32 0, align 4
@SEEK_SET = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [3 x i8] c"\\\22\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"\\\\\22\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"\\\0A\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@FNM_NOESCAPE = dso_local local_unnamed_addr global i32 0, align 4
@FNM_NOMATCH = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @parse_config(ptr noundef %0, ptr noundef %1, ptr noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca [2 x i8], align 1
call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #4
%6 = load i32, ptr @PATH_MAX, align 4, !tbaa !5
%7 = zext i32 %6 to i64
%8 = tail call ptr @llvm.stacksave.p0()
%9 = alloca i8, i64 %7, align 16
%10 = icmp eq ptr %0, null
%11 = icmp eq ptr %2, null
%12 = and i1 %10, %11
br i1 %12, label %388, label %13
13: ; preds = %4
%14 = load i32, ptr @FIGPAR_BREAK_ON_EQUALS, align 4, !tbaa !5
%15 = and i32 %14, %3
%16 = icmp ne i32 %15, 0
%17 = load i32, ptr @FIGPAR_BREAK_ON_SEMICOLON, align 4, !tbaa !5
%18 = and i32 %17, %3
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr @FIGPAR_CASE_SENSITIVE, align 4, !tbaa !5
%21 = and i32 %20, %3
%22 = icmp eq i32 %21, 0
%23 = load i32, ptr @FIGPAR_REQUIRE_EQUALS, align 4, !tbaa !5
%24 = and i32 %23, %3
%25 = icmp eq i32 %24, 0
%26 = load i32, ptr @FIGPAR_STRICT_EQUALS, align 4, !tbaa !5
%27 = and i32 %26, %3
%28 = icmp ne i32 %27, 0
%29 = call i64 @realpath(ptr noundef %1, ptr noundef nonnull %9) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %388, label %31
31: ; preds = %13
%32 = load i32, ptr @O_RDONLY, align 4, !tbaa !5
%33 = call i32 @open(ptr noundef nonnull %9, i32 noundef %32) #4
%34 = icmp slt i32 %33, 0
br i1 %34, label %388, label %35
35: ; preds = %31
%36 = xor i1 %28, true
%37 = icmp ne ptr %2, null
%38 = and i1 %10, %37
%39 = getelementptr inbounds %struct.figpar_config, ptr %0, i64 0, i32 1
br label %40
40: ; preds = %35, %383
%41 = phi i32 [ 0, %35 ], [ %342, %383 ]
%42 = phi i32 [ 1, %35 ], [ %341, %383 ]
%43 = phi i32 [ 0, %35 ], [ %107, %383 ]
%44 = phi ptr [ null, %35 ], [ %339, %383 ]
%45 = phi ptr [ null, %35 ], [ %106, %383 ]
%46 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%47 = icmp eq i64 %46, 0
br i1 %47, label %385, label %48
48: ; preds = %40, %66
%49 = phi i64 [ %68, %66 ], [ 0, %40 ]
%50 = phi i32 [ %67, %66 ], [ %42, %40 ]
%51 = load i8, ptr %5, align 1, !tbaa !9
%52 = call i64 @isspace(i8 noundef signext %51) #4
%53 = icmp eq i64 %52, 0
%54 = load i8, ptr %5, align 1
%55 = icmp ne i8 %54, 35
%56 = select i1 %53, i1 %55, i1 false
%57 = icmp eq i64 %49, 0
%58 = select i1 %56, i1 %57, i1 false
%59 = icmp ne i8 %54, 59
%60 = select i1 %19, i1 true, i1 %59
%61 = select i1 %58, i1 %60, i1 false
br i1 %61, label %71, label %62
62: ; preds = %48
switch i8 %54, label %65 [
i8 35, label %66
i8 10, label %63
]
63: ; preds = %62
%64 = add nsw i32 %50, 1
br label %66
65: ; preds = %62
br label %66
66: ; preds = %62, %65, %63
%67 = phi i32 [ %64, %63 ], [ %50, %62 ], [ %50, %65 ]
%68 = phi i64 [ 0, %63 ], [ 1, %62 ], [ %49, %65 ]
%69 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%70 = icmp eq i64 %69, 0
br i1 %70, label %385, label %48, !llvm.loop !10
71: ; preds = %48
%72 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%73 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %72) #4
%74 = add nsw i32 %73, -1
%75 = icmp eq i32 %73, 0
br i1 %75, label %385, label %76
76: ; preds = %71, %88
%77 = phi i32 [ %90, %88 ], [ 0, %71 ]
%78 = load i8, ptr %5, align 1, !tbaa !9
%79 = call i64 @isspace(i8 noundef signext %78) #4
%80 = icmp eq i64 %79, 0
br i1 %80, label %81, label %92
81: ; preds = %76
%82 = load i8, ptr %5, align 1
%83 = icmp eq i8 %82, 61
%84 = select i1 %16, i1 %83, i1 false
br i1 %84, label %92, label %85
85: ; preds = %81
%86 = icmp ne i8 %82, 59
%87 = select i1 %19, i1 true, i1 %86
br i1 %87, label %88, label %92
88: ; preds = %85
%89 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%90 = add nuw nsw i32 %77, 1
%91 = icmp eq i64 %89, 0
br i1 %91, label %92, label %76, !llvm.loop !12
92: ; preds = %76, %85, %81, %88
%93 = phi i32 [ %90, %88 ], [ %77, %81 ], [ %77, %85 ], [ %77, %76 ]
%94 = phi i64 [ 0, %88 ], [ 1, %81 ], [ 0, %85 ], [ 0, %76 ]
%95 = load i32, ptr @SEEK_SET, align 4, !tbaa !5
%96 = call i32 @lseek(i32 noundef %33, i32 noundef %74, i32 noundef %95) #4
%97 = add nsw i32 %73, -2
%98 = icmp eq i32 %96, %97
br i1 %98, label %385, label %99
99: ; preds = %92
%100 = icmp sgt i32 %93, %43
br i1 %100, label %101, label %105
101: ; preds = %99
%102 = add nuw nsw i32 %93, 1
%103 = call ptr @realloc(ptr noundef %45, i32 noundef %102) #4
%104 = icmp eq ptr %103, null
br i1 %104, label %385, label %105
105: ; preds = %101, %99
%106 = phi ptr [ %45, %99 ], [ %103, %101 ]
%107 = phi i32 [ %43, %99 ], [ %93, %101 ]
%108 = call i64 @read(i32 noundef %33, ptr noundef %106, i32 noundef %93) #4
%109 = load i8, ptr %5, align 1
%110 = icmp eq i8 %109, 61
%111 = select i1 %16, i1 %110, i1 false
br i1 %111, label %112, label %125
112: ; preds = %105
%113 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%114 = call i32 @lseek(i32 noundef %33, i32 noundef 1, i32 noundef %113) #4
%115 = icmp eq i32 %114, -1
br i1 %115, label %118, label %116
116: ; preds = %112
%117 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
br label %118
118: ; preds = %116, %112
%119 = phi i64 [ %117, %116 ], [ %108, %112 ]
br i1 %28, label %120, label %125
120: ; preds = %118
%121 = load i8, ptr %5, align 1, !tbaa !9
%122 = call i64 @isspace(i8 noundef signext %121) #4
%123 = icmp eq i64 %122, 0
br i1 %123, label %125, label %124
124: ; preds = %120
store i8 10, ptr %5, align 1, !tbaa !9
br label %125
125: ; preds = %118, %120, %124, %105
%126 = phi i64 [ %119, %124 ], [ %119, %120 ], [ %119, %118 ], [ %108, %105 ]
%127 = zext nneg i32 %93 to i64
%128 = getelementptr inbounds i8, ptr %106, i64 %127
store i8 0, ptr %128, align 1, !tbaa !9
br i1 %22, label %129, label %131
129: ; preds = %125
%130 = call i32 @strtolower(ptr noundef nonnull %106) #4
br label %131
131: ; preds = %129, %125
%132 = load i8, ptr %5, align 1
%133 = icmp ne i8 %132, 59
%134 = select i1 %19, i1 true, i1 %133
br i1 %134, label %135, label %185
135: ; preds = %131
%136 = icmp ne i8 %132, 61
%137 = select i1 %36, i1 true, i1 %136
%138 = icmp ne i64 %126, 0
%139 = select i1 %137, i1 %138, i1 false
br i1 %139, label %140, label %156
140: ; preds = %135
%141 = call i64 @isspace(i8 noundef signext %132) #4
%142 = icmp ne i64 %141, 0
%143 = load i8, ptr %5, align 1
%144 = icmp ne i8 %143, 10
%145 = select i1 %142, i1 %144, i1 false
br i1 %145, label %153, label %156
146: ; preds = %153
%147 = load i8, ptr %5, align 1
%148 = call i64 @isspace(i8 noundef signext %147) #4
%149 = icmp ne i64 %148, 0
%150 = load i8, ptr %5, align 1
%151 = icmp ne i8 %150, 10
%152 = select i1 %149, i1 %151, i1 false
br i1 %152, label %153, label %156
153: ; preds = %140, %146
%154 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%155 = icmp eq i64 %154, 0
br i1 %155, label %185, label %146
156: ; preds = %146, %140, %135
%157 = phi i8 [ %132, %135 ], [ %143, %140 ], [ %150, %146 ]
%158 = phi i64 [ %126, %135 ], [ %126, %140 ], [ %154, %146 ]
%159 = icmp ne i64 %158, 0
%160 = select i1 %159, i1 %16, i1 false
%161 = icmp ne i8 %157, 61
%162 = xor i1 %160, true
%163 = select i1 %162, i1 true, i1 %161
%164 = select i1 %163, i1 true, i1 %28
br i1 %164, label %185, label %165
165: ; preds = %156
%166 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%167 = icmp eq i64 %166, 0
br i1 %167, label %185, label %168
168: ; preds = %165
%169 = load i8, ptr %5, align 1, !tbaa !9
%170 = call i64 @isspace(i8 noundef signext %169) #4
%171 = icmp ne i64 %170, 0
%172 = load i8, ptr %5, align 1
%173 = icmp ne i8 %172, 10
%174 = select i1 %171, i1 %173, i1 false
br i1 %174, label %182, label %185
175: ; preds = %182
%176 = load i8, ptr %5, align 1, !tbaa !9
%177 = call i64 @isspace(i8 noundef signext %176) #4
%178 = icmp ne i64 %177, 0
%179 = load i8, ptr %5, align 1
%180 = icmp ne i8 %179, 10
%181 = select i1 %178, i1 %180, i1 false
br i1 %181, label %182, label %185, !llvm.loop !13
182: ; preds = %168, %175
%183 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%184 = icmp eq i64 %183, 0
br i1 %184, label %185, label %175, !llvm.loop !13
185: ; preds = %153, %182, %175, %168, %131, %165, %156
%186 = phi i64 [ %94, %156 ], [ 1, %165 ], [ %94, %131 ], [ 1, %168 ], [ 1, %175 ], [ 1, %182 ], [ %94, %153 ]
%187 = phi i64 [ %158, %156 ], [ 0, %165 ], [ %126, %131 ], [ %166, %168 ], [ 0, %182 ], [ %183, %175 ], [ 0, %153 ]
%188 = icmp ne i64 %187, 0
%189 = load i8, ptr %5, align 1
%190 = icmp ne i8 %189, 10
%191 = select i1 %188, i1 %190, i1 false
%192 = icmp ne i8 %189, 35
%193 = select i1 %191, i1 %192, i1 false
%194 = icmp ne i8 %189, 59
%195 = select i1 %19, i1 true, i1 %194
%196 = select i1 %193, i1 %195, i1 false
br i1 %196, label %204, label %197
197: ; preds = %185
%198 = icmp eq ptr %44, null
br i1 %198, label %199, label %202
199: ; preds = %197
%200 = call ptr @malloc(i32 noundef 1) #4
%201 = icmp eq ptr %200, null
br i1 %201, label %385, label %202
202: ; preds = %199, %197
%203 = phi ptr [ %200, %199 ], [ %44, %197 ]
store i8 0, ptr %203, align 1, !tbaa !9
br label %338
204: ; preds = %185
%205 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%206 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %205) #4
%207 = add nsw i32 %206, -1
%208 = icmp eq i32 %206, 0
br i1 %208, label %385, label %279
209: ; preds = %279, %214
%210 = load i8, ptr %5, align 1
switch i8 %210, label %211 [
i8 35, label %217
i8 34, label %217
i8 10, label %217
]
211: ; preds = %209
%212 = icmp ne i8 %210, 59
%213 = or i1 %19, %212
br i1 %213, label %214, label %217
214: ; preds = %211
%215 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%216 = icmp eq i64 %215, 0
br i1 %216, label %282, label %209, !llvm.loop !14
217: ; preds = %209, %209, %209, %211
%218 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%219 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %218) #4
%220 = add nsw i32 %219, -1
%221 = icmp eq i32 %219, 0
br i1 %221, label %385, label %222
222: ; preds = %217
%223 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%224 = call i32 @lseek(i32 noundef %33, i32 noundef -2, i32 noundef %223) #4
%225 = icmp eq i32 %224, -3
br i1 %225, label %385, label %226
226: ; preds = %222
%227 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%228 = load i8, ptr %5, align 1, !tbaa !9
%229 = icmp eq i8 %228, 92
br i1 %229, label %230, label %240
230: ; preds = %226, %235
%231 = phi i32 [ %237, %235 ], [ 1, %226 ]
%232 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%233 = call i32 @lseek(i32 noundef %33, i32 noundef -2, i32 noundef %232) #4
%234 = icmp eq i32 %233, -3
br i1 %234, label %385, label %235
235: ; preds = %230
%236 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%237 = add nuw nsw i32 %231, 1
%238 = load i8, ptr %5, align 1, !tbaa !9
%239 = icmp eq i8 %238, 92
br i1 %239, label %230, label %240, !llvm.loop !15
240: ; preds = %235, %226
%241 = phi i32 [ 1, %226 ], [ %237, %235 ]
%242 = load i32, ptr @SEEK_SET, align 4, !tbaa !5
%243 = call i32 @lseek(i32 noundef %33, i32 noundef %220, i32 noundef %242) #4
%244 = add nsw i32 %219, -2
%245 = icmp eq i32 %243, %244
br i1 %245, label %385, label %246
246: ; preds = %240
%247 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%248 = and i32 %241, 1
%249 = icmp eq i32 %248, 0
%250 = load i8, ptr %5, align 1, !tbaa !9
br i1 %249, label %267, label %251
251: ; preds = %246
switch i8 %250, label %271 [
i8 34, label %252
i8 35, label %255
i8 10, label %260
i8 59, label %261
]
252: ; preds = %251
%253 = icmp eq i64 %281, 0
%254 = zext i1 %253 to i64
br label %271
255: ; preds = %251
%256 = icmp ne i64 %281, 0
%257 = zext i1 %256 to i64
%258 = xor i1 %256, true
%259 = zext i1 %258 to i64
br label %271
260: ; preds = %251
br label %261
261: ; preds = %251, %260
%262 = phi i64 [ 0, %251 ], [ 1, %260 ]
%263 = icmp ne i64 %281, 0
%264 = select i1 %263, i1 true, i1 %19
%265 = select i1 %264, i64 %281, i64 0
%266 = select i1 %264, i64 %262, i64 1
br label %271
267: ; preds = %246
%268 = icmp eq i8 %250, 10
%269 = zext i1 %268 to i32
%270 = add nsw i32 %280, %269
br label %271
271: ; preds = %267, %261, %255, %252, %251
%272 = phi i64 [ %281, %251 ], [ %254, %252 ], [ %257, %255 ], [ %265, %261 ], [ %281, %267 ]
%273 = phi i32 [ %280, %251 ], [ %280, %252 ], [ %280, %255 ], [ %280, %261 ], [ %270, %267 ]
%274 = phi i64 [ 0, %251 ], [ 0, %252 ], [ %259, %255 ], [ %266, %261 ], [ 0, %267 ]
%275 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%276 = icmp ne i64 %275, 0
%277 = icmp eq i64 %274, 0
%278 = and i1 %276, %277
br i1 %278, label %279, label %282, !llvm.loop !14
279: ; preds = %204, %271
%280 = phi i32 [ %273, %271 ], [ %50, %204 ]
%281 = phi i64 [ %272, %271 ], [ 0, %204 ]
br label %209
282: ; preds = %271, %214
%283 = phi i32 [ %280, %214 ], [ %273, %271 ]
%284 = phi i1 [ false, %214 ], [ %276, %271 ]
%285 = load i32, ptr @SEEK_CUR, align 4, !tbaa !5
%286 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %285) #4
%287 = icmp eq i32 %286, 0
br i1 %287, label %385, label %288
288: ; preds = %282
%289 = sub i32 %286, %206
%290 = sext i1 %284 to i32
%291 = add nsw i32 %289, %290
%292 = load i32, ptr @SEEK_SET, align 4, !tbaa !5
%293 = call i32 @lseek(i32 noundef %33, i32 noundef %207, i32 noundef %292) #4
%294 = add nsw i32 %206, -2
%295 = icmp eq i32 %293, %294
br i1 %295, label %385, label %296
296: ; preds = %288
%297 = icmp sgt i32 %291, %41
br i1 %297, label %298, label %302
298: ; preds = %296
%299 = add nuw nsw i32 %291, 1
%300 = call ptr @realloc(ptr noundef %44, i32 noundef %299) #4
%301 = icmp eq ptr %300, null
br i1 %301, label %385, label %302
302: ; preds = %298, %296
%303 = phi ptr [ %44, %296 ], [ %300, %298 ]
%304 = phi i32 [ %41, %296 ], [ %291, %298 ]
%305 = call i64 @read(i32 noundef %33, ptr noundef %303, i32 noundef %291) #4
%306 = sext i32 %291 to i64
%307 = getelementptr inbounds i8, ptr %303, i64 %306
store i8 0, ptr %307, align 1, !tbaa !9
%308 = getelementptr inbounds i8, ptr %307, i64 -1
%309 = load i8, ptr %308, align 1, !tbaa !9
%310 = call i64 @isspace(i8 noundef signext %309) #4
%311 = icmp eq i64 %310, 0
br i1 %311, label %318, label %312
312: ; preds = %302, %312
%313 = phi ptr [ %314, %312 ], [ %308, %302 ]
store i8 0, ptr %313, align 1, !tbaa !9
%314 = getelementptr inbounds i8, ptr %313, i64 -1
%315 = load i8, ptr %314, align 1, !tbaa !9
%316 = call i64 @isspace(i8 noundef signext %315) #4
%317 = icmp eq i64 %316, 0
br i1 %317, label %318, label %312, !llvm.loop !16
318: ; preds = %312, %302
%319 = call i32 @strcount(ptr noundef %303, ptr noundef nonnull @.str) #4
%320 = icmp eq i32 %319, 0
br i1 %320, label %328, label %321
321: ; preds = %318
%322 = add nsw i32 %319, %291
%323 = icmp sgt i32 %322, %304
br i1 %323, label %324, label %328
324: ; preds = %321
%325 = add nuw nsw i32 %322, 1
%326 = call ptr @realloc(ptr noundef %303, i32 noundef %325) #4
%327 = icmp eq ptr %326, null
br i1 %327, label %385, label %328
328: ; preds = %324, %321, %318
%329 = phi ptr [ %303, %321 ], [ %303, %318 ], [ %326, %324 ]
%330 = phi i32 [ %304, %321 ], [ %304, %318 ], [ %322, %324 ]
%331 = call i64 @replaceall(ptr noundef %329, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1) #4
%332 = icmp slt i64 %331, 0
br i1 %332, label %385, label %333
333: ; preds = %328
%334 = call i64 @replaceall(ptr noundef %329, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #4
%335 = icmp slt i64 %334, 0
br i1 %335, label %385, label %336
336: ; preds = %333
%337 = call i32 @strexpand(ptr noundef %329) #4
br label %338
338: ; preds = %336, %202
%339 = phi ptr [ %203, %202 ], [ %329, %336 ]
%340 = phi i64 [ %187, %202 ], [ %305, %336 ]
%341 = phi i32 [ %50, %202 ], [ %283, %336 ]
%342 = phi i32 [ %41, %202 ], [ %330, %336 ]
%343 = icmp ne i64 %186, 0
%344 = or i1 %25, %343
br i1 %344, label %345, label %388
345: ; preds = %338
br i1 %38, label %349, label %346
346: ; preds = %345
%347 = load ptr, ptr %39, align 8, !tbaa !17
%348 = icmp eq ptr %347, null
br i1 %348, label %376, label %352
349: ; preds = %345
%350 = call i32 %2(ptr noundef null, i32 noundef %341, ptr noundef %106, ptr noundef %339) #4
%351 = icmp eq i32 %350, 0
br i1 %351, label %383, label %385
352: ; preds = %346, %369
%353 = phi i64 [ %371, %369 ], [ 0, %346 ]
%354 = phi ptr [ %374, %369 ], [ %347, %346 ]
%355 = phi ptr [ %372, %369 ], [ %0, %346 ]
%356 = phi i64 [ %370, %369 ], [ 0, %346 ]
%357 = load i32, ptr @FNM_NOESCAPE, align 4, !tbaa !5
%358 = call i32 @fnmatch(ptr noundef nonnull %354, ptr noundef %106, i32 noundef %357) #4
%359 = icmp eq i32 %358, 0
br i1 %359, label %360, label %366
360: ; preds = %352
%361 = load ptr, ptr %355, align 8, !tbaa !20
%362 = icmp eq ptr %361, null
br i1 %362, label %369, label %363
363: ; preds = %360
%364 = call i32 %361(ptr noundef nonnull %355, i32 noundef %341, ptr noundef %106, ptr noundef %339) #4
%365 = icmp eq i32 %364, 0
br i1 %365, label %369, label %385
366: ; preds = %352
%367 = load i32, ptr @FNM_NOMATCH, align 4, !tbaa !5
%368 = icmp eq i32 %358, %367
br i1 %368, label %369, label %385
369: ; preds = %363, %360, %366
%370 = phi i64 [ 1, %363 ], [ 1, %360 ], [ %356, %366 ]
%371 = add nuw i64 %353, 1
%372 = getelementptr inbounds %struct.figpar_config, ptr %0, i64 %371
%373 = getelementptr inbounds %struct.figpar_config, ptr %0, i64 %371, i32 1
%374 = load ptr, ptr %373, align 8, !tbaa !17
%375 = icmp eq ptr %374, null
br i1 %375, label %376, label %352, !llvm.loop !21
376: ; preds = %369, %346
%377 = phi i64 [ 0, %346 ], [ %370, %369 ]
%378 = icmp eq i64 %377, 0
%379 = and i1 %37, %378
br i1 %379, label %380, label %383
380: ; preds = %376
%381 = call i32 %2(ptr noundef null, i32 noundef %341, ptr noundef %106, ptr noundef %339) #4
%382 = icmp eq i32 %381, 0
br i1 %382, label %383, label %385
383: ; preds = %376, %380, %349
%384 = icmp eq i64 %340, 0
br i1 %384, label %385, label %40, !llvm.loop !22
385: ; preds = %383, %380, %349, %333, %328, %324, %298, %288, %282, %204, %199, %101, %92, %71, %40, %66, %240, %222, %217, %366, %363, %230
%386 = phi i32 [ -1, %230 ], [ %364, %363 ], [ -1, %366 ], [ -1, %217 ], [ -1, %222 ], [ -1, %240 ], [ 0, %66 ], [ 0, %40 ], [ -1, %71 ], [ -1, %92 ], [ -1, %101 ], [ -1, %199 ], [ -1, %204 ], [ -1, %282 ], [ -1, %288 ], [ -1, %298 ], [ -1, %324 ], [ -1, %328 ], [ -1, %333 ], [ %350, %349 ], [ %381, %380 ], [ 0, %383 ]
%387 = call i32 @close(i32 noundef %33) #4
br label %388
388: ; preds = %338, %385, %31, %13, %4
%389 = phi i32 [ -1, %4 ], [ -1, %13 ], [ -1, %31 ], [ %386, %385 ], [ -1, %338 ]
call void @llvm.stackrestore.p0(ptr %8)
call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #4
ret i32 %389
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2
declare i64 @realpath(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @open(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @isspace(i8 noundef signext) local_unnamed_addr #3
declare i32 @close(i32 noundef) local_unnamed_addr #3
declare i32 @lseek(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare ptr @realloc(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @strtolower(ptr noundef) local_unnamed_addr #3
declare ptr @malloc(i32 noundef) local_unnamed_addr #3
declare i32 @strcount(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i64 @replaceall(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @strexpand(ptr noundef) local_unnamed_addr #3
declare i32 @fnmatch(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}
!15 = distinct !{!15, !11}
!16 = distinct !{!16, !11}
!17 = !{!18, !19, i64 8}
!18 = !{!"figpar_config", !19, i64 0, !19, i64 8}
!19 = !{!"any pointer", !7, i64 0}
!20 = !{!18, !19, i64 0}
!21 = distinct !{!21, !11}
!22 = distinct !{!22, !11}
| ; ModuleID = 'AnghaBench/freebsd/lib/libfigpar/extr_figpar.c_parse_config.c'
source_filename = "AnghaBench/freebsd/lib/libfigpar/extr_figpar.c_parse_config.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.figpar_config = type { ptr, ptr }
@PATH_MAX = common local_unnamed_addr global i32 0, align 4
@FIGPAR_BREAK_ON_EQUALS = common local_unnamed_addr global i32 0, align 4
@FIGPAR_BREAK_ON_SEMICOLON = common local_unnamed_addr global i32 0, align 4
@FIGPAR_CASE_SENSITIVE = common local_unnamed_addr global i32 0, align 4
@FIGPAR_REQUIRE_EQUALS = common local_unnamed_addr global i32 0, align 4
@FIGPAR_STRICT_EQUALS = common local_unnamed_addr global i32 0, align 4
@O_RDONLY = common local_unnamed_addr global i32 0, align 4
@SEEK_CUR = common local_unnamed_addr global i32 0, align 4
@SEEK_SET = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [3 x i8] c"\\\22\00", align 1
@.str.1 = private unnamed_addr constant [4 x i8] c"\\\\\22\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"\\\0A\00", align 1
@.str.3 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@FNM_NOESCAPE = common local_unnamed_addr global i32 0, align 4
@FNM_NOMATCH = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @parse_config(ptr noundef %0, ptr noundef %1, ptr noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca [2 x i8], align 1
call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #4
%6 = load i32, ptr @PATH_MAX, align 4, !tbaa !6
%7 = zext i32 %6 to i64
%8 = tail call ptr @llvm.stacksave.p0()
%9 = alloca i8, i64 %7, align 1
%10 = icmp eq ptr %0, null
%11 = icmp eq ptr %2, null
%12 = and i1 %10, %11
br i1 %12, label %387, label %13
13: ; preds = %4
%14 = load i32, ptr @FIGPAR_BREAK_ON_EQUALS, align 4, !tbaa !6
%15 = and i32 %14, %3
%16 = icmp ne i32 %15, 0
%17 = load i32, ptr @FIGPAR_BREAK_ON_SEMICOLON, align 4, !tbaa !6
%18 = and i32 %17, %3
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr @FIGPAR_CASE_SENSITIVE, align 4, !tbaa !6
%21 = and i32 %20, %3
%22 = icmp eq i32 %21, 0
%23 = load i32, ptr @FIGPAR_REQUIRE_EQUALS, align 4, !tbaa !6
%24 = and i32 %23, %3
%25 = icmp eq i32 %24, 0
%26 = load i32, ptr @FIGPAR_STRICT_EQUALS, align 4, !tbaa !6
%27 = and i32 %26, %3
%28 = icmp ne i32 %27, 0
%29 = call i64 @realpath(ptr noundef %1, ptr noundef nonnull %9) #4
%30 = icmp eq i64 %29, 0
br i1 %30, label %387, label %31
31: ; preds = %13
%32 = load i32, ptr @O_RDONLY, align 4, !tbaa !6
%33 = call i32 @open(ptr noundef nonnull %9, i32 noundef %32) #4
%34 = icmp slt i32 %33, 0
br i1 %34, label %387, label %35
35: ; preds = %31
%36 = xor i1 %28, true
%37 = icmp ne ptr %2, null
%38 = and i1 %10, %37
%39 = getelementptr inbounds i8, ptr %0, i64 8
br label %40
40: ; preds = %35, %382
%41 = phi i32 [ 0, %35 ], [ %342, %382 ]
%42 = phi i32 [ 1, %35 ], [ %341, %382 ]
%43 = phi i32 [ 0, %35 ], [ %107, %382 ]
%44 = phi ptr [ null, %35 ], [ %339, %382 ]
%45 = phi ptr [ null, %35 ], [ %106, %382 ]
%46 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%47 = icmp eq i64 %46, 0
br i1 %47, label %384, label %48
48: ; preds = %40, %66
%49 = phi i64 [ %68, %66 ], [ 0, %40 ]
%50 = phi i32 [ %67, %66 ], [ %42, %40 ]
%51 = load i8, ptr %5, align 1, !tbaa !10
%52 = call i64 @isspace(i8 noundef signext %51) #4
%53 = icmp eq i64 %52, 0
%54 = load i8, ptr %5, align 1
%55 = icmp ne i8 %54, 35
%56 = select i1 %53, i1 %55, i1 false
%57 = icmp eq i64 %49, 0
%58 = select i1 %56, i1 %57, i1 false
%59 = icmp ne i8 %54, 59
%60 = select i1 %19, i1 true, i1 %59
%61 = select i1 %58, i1 %60, i1 false
br i1 %61, label %71, label %62
62: ; preds = %48
switch i8 %54, label %65 [
i8 35, label %66
i8 10, label %63
]
63: ; preds = %62
%64 = add nsw i32 %50, 1
br label %66
65: ; preds = %62
br label %66
66: ; preds = %62, %65, %63
%67 = phi i32 [ %64, %63 ], [ %50, %62 ], [ %50, %65 ]
%68 = phi i64 [ 0, %63 ], [ 1, %62 ], [ %49, %65 ]
%69 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%70 = icmp eq i64 %69, 0
br i1 %70, label %384, label %48, !llvm.loop !11
71: ; preds = %48
%72 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%73 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %72) #4
%74 = add nsw i32 %73, -1
%75 = icmp eq i32 %73, 0
br i1 %75, label %384, label %76
76: ; preds = %71, %88
%77 = phi i32 [ %90, %88 ], [ 0, %71 ]
%78 = load i8, ptr %5, align 1, !tbaa !10
%79 = call i64 @isspace(i8 noundef signext %78) #4
%80 = icmp eq i64 %79, 0
br i1 %80, label %81, label %92
81: ; preds = %76
%82 = load i8, ptr %5, align 1
%83 = icmp eq i8 %82, 61
%84 = select i1 %16, i1 %83, i1 false
br i1 %84, label %92, label %85
85: ; preds = %81
%86 = icmp ne i8 %82, 59
%87 = select i1 %19, i1 true, i1 %86
br i1 %87, label %88, label %92
88: ; preds = %85
%89 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%90 = add nuw nsw i32 %77, 1
%91 = icmp eq i64 %89, 0
br i1 %91, label %92, label %76, !llvm.loop !13
92: ; preds = %76, %85, %81, %88
%93 = phi i32 [ %90, %88 ], [ %77, %81 ], [ %77, %85 ], [ %77, %76 ]
%94 = phi i64 [ 0, %88 ], [ 1, %81 ], [ 0, %85 ], [ 0, %76 ]
%95 = load i32, ptr @SEEK_SET, align 4, !tbaa !6
%96 = call i32 @lseek(i32 noundef %33, i32 noundef %74, i32 noundef %95) #4
%97 = add nsw i32 %73, -2
%98 = icmp eq i32 %96, %97
br i1 %98, label %384, label %99
99: ; preds = %92
%100 = icmp sgt i32 %93, %43
br i1 %100, label %101, label %105
101: ; preds = %99
%102 = add nuw nsw i32 %93, 1
%103 = call ptr @realloc(ptr noundef %45, i32 noundef %102) #4
%104 = icmp eq ptr %103, null
br i1 %104, label %384, label %105
105: ; preds = %101, %99
%106 = phi ptr [ %45, %99 ], [ %103, %101 ]
%107 = phi i32 [ %43, %99 ], [ %93, %101 ]
%108 = call i64 @read(i32 noundef %33, ptr noundef %106, i32 noundef %93) #4
%109 = load i8, ptr %5, align 1
%110 = icmp eq i8 %109, 61
%111 = select i1 %16, i1 %110, i1 false
br i1 %111, label %112, label %125
112: ; preds = %105
%113 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%114 = call i32 @lseek(i32 noundef %33, i32 noundef 1, i32 noundef %113) #4
%115 = icmp eq i32 %114, -1
br i1 %115, label %118, label %116
116: ; preds = %112
%117 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
br label %118
118: ; preds = %116, %112
%119 = phi i64 [ %117, %116 ], [ %108, %112 ]
br i1 %28, label %120, label %125
120: ; preds = %118
%121 = load i8, ptr %5, align 1, !tbaa !10
%122 = call i64 @isspace(i8 noundef signext %121) #4
%123 = icmp eq i64 %122, 0
br i1 %123, label %125, label %124
124: ; preds = %120
store i8 10, ptr %5, align 1, !tbaa !10
br label %125
125: ; preds = %118, %120, %124, %105
%126 = phi i64 [ %119, %124 ], [ %119, %120 ], [ %119, %118 ], [ %108, %105 ]
%127 = zext nneg i32 %93 to i64
%128 = getelementptr inbounds i8, ptr %106, i64 %127
store i8 0, ptr %128, align 1, !tbaa !10
br i1 %22, label %129, label %131
129: ; preds = %125
%130 = call i32 @strtolower(ptr noundef nonnull %106) #4
br label %131
131: ; preds = %129, %125
%132 = load i8, ptr %5, align 1
%133 = icmp ne i8 %132, 59
%134 = select i1 %19, i1 true, i1 %133
br i1 %134, label %135, label %185
135: ; preds = %131
%136 = icmp ne i8 %132, 61
%137 = select i1 %36, i1 true, i1 %136
%138 = icmp ne i64 %126, 0
%139 = select i1 %137, i1 %138, i1 false
br i1 %139, label %140, label %156
140: ; preds = %135
%141 = call i64 @isspace(i8 noundef signext %132) #4
%142 = icmp ne i64 %141, 0
%143 = load i8, ptr %5, align 1
%144 = icmp ne i8 %143, 10
%145 = select i1 %142, i1 %144, i1 false
br i1 %145, label %153, label %156
146: ; preds = %153
%147 = load i8, ptr %5, align 1
%148 = call i64 @isspace(i8 noundef signext %147) #4
%149 = icmp ne i64 %148, 0
%150 = load i8, ptr %5, align 1
%151 = icmp ne i8 %150, 10
%152 = select i1 %149, i1 %151, i1 false
br i1 %152, label %153, label %156
153: ; preds = %140, %146
%154 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%155 = icmp eq i64 %154, 0
br i1 %155, label %185, label %146
156: ; preds = %146, %140, %135
%157 = phi i8 [ %132, %135 ], [ %143, %140 ], [ %150, %146 ]
%158 = phi i64 [ %126, %135 ], [ %126, %140 ], [ %154, %146 ]
%159 = icmp ne i64 %158, 0
%160 = select i1 %159, i1 %16, i1 false
%161 = icmp ne i8 %157, 61
%162 = xor i1 %160, true
%163 = select i1 %162, i1 true, i1 %161
%164 = select i1 %163, i1 true, i1 %28
br i1 %164, label %185, label %165
165: ; preds = %156
%166 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%167 = icmp eq i64 %166, 0
br i1 %167, label %185, label %168
168: ; preds = %165
%169 = load i8, ptr %5, align 1, !tbaa !10
%170 = call i64 @isspace(i8 noundef signext %169) #4
%171 = icmp ne i64 %170, 0
%172 = load i8, ptr %5, align 1
%173 = icmp ne i8 %172, 10
%174 = select i1 %171, i1 %173, i1 false
br i1 %174, label %182, label %185
175: ; preds = %182
%176 = load i8, ptr %5, align 1, !tbaa !10
%177 = call i64 @isspace(i8 noundef signext %176) #4
%178 = icmp ne i64 %177, 0
%179 = load i8, ptr %5, align 1
%180 = icmp ne i8 %179, 10
%181 = select i1 %178, i1 %180, i1 false
br i1 %181, label %182, label %185, !llvm.loop !14
182: ; preds = %168, %175
%183 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%184 = icmp eq i64 %183, 0
br i1 %184, label %185, label %175, !llvm.loop !14
185: ; preds = %153, %182, %175, %168, %131, %165, %156
%186 = phi i64 [ %94, %156 ], [ 1, %165 ], [ %94, %131 ], [ 1, %168 ], [ 1, %175 ], [ 1, %182 ], [ %94, %153 ]
%187 = phi i64 [ %158, %156 ], [ 0, %165 ], [ %126, %131 ], [ %166, %168 ], [ 0, %182 ], [ %183, %175 ], [ 0, %153 ]
%188 = icmp ne i64 %187, 0
%189 = load i8, ptr %5, align 1
%190 = icmp ne i8 %189, 10
%191 = icmp ne i8 %189, 35
%192 = and i1 %190, %191
%193 = select i1 %188, i1 %192, i1 false
%194 = icmp ne i8 %189, 59
%195 = select i1 %19, i1 true, i1 %194
%196 = select i1 %193, i1 %195, i1 false
br i1 %196, label %204, label %197
197: ; preds = %185
%198 = icmp eq ptr %44, null
br i1 %198, label %199, label %202
199: ; preds = %197
%200 = call ptr @malloc(i32 noundef 1) #4
%201 = icmp eq ptr %200, null
br i1 %201, label %384, label %202
202: ; preds = %199, %197
%203 = phi ptr [ %200, %199 ], [ %44, %197 ]
store i8 0, ptr %203, align 1, !tbaa !10
br label %338
204: ; preds = %185
%205 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%206 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %205) #4
%207 = add nsw i32 %206, -1
%208 = icmp eq i32 %206, 0
br i1 %208, label %384, label %279
209: ; preds = %279, %214
%210 = load i8, ptr %5, align 1
switch i8 %210, label %211 [
i8 35, label %217
i8 34, label %217
i8 10, label %217
]
211: ; preds = %209
%212 = icmp ne i8 %210, 59
%213 = or i1 %19, %212
br i1 %213, label %214, label %217
214: ; preds = %211
%215 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%216 = icmp eq i64 %215, 0
br i1 %216, label %282, label %209, !llvm.loop !15
217: ; preds = %209, %209, %209, %211
%218 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%219 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %218) #4
%220 = add nsw i32 %219, -1
%221 = icmp eq i32 %219, 0
br i1 %221, label %384, label %222
222: ; preds = %217
%223 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%224 = call i32 @lseek(i32 noundef %33, i32 noundef -2, i32 noundef %223) #4
%225 = icmp eq i32 %224, -3
br i1 %225, label %384, label %226
226: ; preds = %222
%227 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%228 = load i8, ptr %5, align 1, !tbaa !10
%229 = icmp eq i8 %228, 92
br i1 %229, label %230, label %240
230: ; preds = %226, %235
%231 = phi i32 [ %237, %235 ], [ 1, %226 ]
%232 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%233 = call i32 @lseek(i32 noundef %33, i32 noundef -2, i32 noundef %232) #4
%234 = icmp eq i32 %233, -3
br i1 %234, label %384, label %235
235: ; preds = %230
%236 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%237 = add nuw nsw i32 %231, 1
%238 = load i8, ptr %5, align 1, !tbaa !10
%239 = icmp eq i8 %238, 92
br i1 %239, label %230, label %240, !llvm.loop !16
240: ; preds = %235, %226
%241 = phi i32 [ 1, %226 ], [ %237, %235 ]
%242 = load i32, ptr @SEEK_SET, align 4, !tbaa !6
%243 = call i32 @lseek(i32 noundef %33, i32 noundef %220, i32 noundef %242) #4
%244 = add nsw i32 %219, -2
%245 = icmp eq i32 %243, %244
br i1 %245, label %384, label %246
246: ; preds = %240
%247 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%248 = and i32 %241, 1
%249 = icmp eq i32 %248, 0
%250 = load i8, ptr %5, align 1, !tbaa !10
br i1 %249, label %267, label %251
251: ; preds = %246
switch i8 %250, label %271 [
i8 34, label %252
i8 35, label %255
i8 10, label %260
i8 59, label %261
]
252: ; preds = %251
%253 = icmp eq i64 %281, 0
%254 = zext i1 %253 to i64
br label %271
255: ; preds = %251
%256 = icmp ne i64 %281, 0
%257 = zext i1 %256 to i64
%258 = xor i1 %256, true
%259 = zext i1 %258 to i64
br label %271
260: ; preds = %251
br label %261
261: ; preds = %251, %260
%262 = phi i64 [ 0, %251 ], [ 1, %260 ]
%263 = icmp ne i64 %281, 0
%264 = select i1 %263, i1 true, i1 %19
%265 = select i1 %264, i64 %281, i64 0
%266 = select i1 %264, i64 %262, i64 1
br label %271
267: ; preds = %246
%268 = icmp eq i8 %250, 10
%269 = zext i1 %268 to i32
%270 = add nsw i32 %280, %269
br label %271
271: ; preds = %267, %261, %255, %252, %251
%272 = phi i64 [ %281, %251 ], [ %254, %252 ], [ %257, %255 ], [ %265, %261 ], [ %281, %267 ]
%273 = phi i32 [ %280, %251 ], [ %280, %252 ], [ %280, %255 ], [ %280, %261 ], [ %270, %267 ]
%274 = phi i64 [ 0, %251 ], [ 0, %252 ], [ %259, %255 ], [ %266, %261 ], [ 0, %267 ]
%275 = call i64 @read(i32 noundef %33, ptr noundef nonnull %5, i32 noundef 1) #4
%276 = icmp ne i64 %275, 0
%277 = icmp eq i64 %274, 0
%278 = and i1 %276, %277
br i1 %278, label %279, label %282, !llvm.loop !15
279: ; preds = %204, %271
%280 = phi i32 [ %273, %271 ], [ %50, %204 ]
%281 = phi i64 [ %272, %271 ], [ 0, %204 ]
br label %209
282: ; preds = %271, %214
%283 = phi i32 [ %280, %214 ], [ %273, %271 ]
%284 = phi i1 [ false, %214 ], [ %276, %271 ]
%285 = load i32, ptr @SEEK_CUR, align 4, !tbaa !6
%286 = call i32 @lseek(i32 noundef %33, i32 noundef 0, i32 noundef %285) #4
%287 = icmp eq i32 %286, 0
br i1 %287, label %384, label %288
288: ; preds = %282
%289 = sub i32 %286, %206
%290 = sext i1 %284 to i32
%291 = add nsw i32 %289, %290
%292 = load i32, ptr @SEEK_SET, align 4, !tbaa !6
%293 = call i32 @lseek(i32 noundef %33, i32 noundef %207, i32 noundef %292) #4
%294 = add nsw i32 %206, -2
%295 = icmp eq i32 %293, %294
br i1 %295, label %384, label %296
296: ; preds = %288
%297 = icmp sgt i32 %291, %41
br i1 %297, label %298, label %302
298: ; preds = %296
%299 = add nuw nsw i32 %291, 1
%300 = call ptr @realloc(ptr noundef %44, i32 noundef %299) #4
%301 = icmp eq ptr %300, null
br i1 %301, label %384, label %302
302: ; preds = %298, %296
%303 = phi ptr [ %44, %296 ], [ %300, %298 ]
%304 = phi i32 [ %41, %296 ], [ %291, %298 ]
%305 = call i64 @read(i32 noundef %33, ptr noundef %303, i32 noundef %291) #4
%306 = sext i32 %291 to i64
%307 = getelementptr inbounds i8, ptr %303, i64 %306
store i8 0, ptr %307, align 1, !tbaa !10
%308 = getelementptr inbounds i8, ptr %307, i64 -1
%309 = load i8, ptr %308, align 1, !tbaa !10
%310 = call i64 @isspace(i8 noundef signext %309) #4
%311 = icmp eq i64 %310, 0
br i1 %311, label %318, label %312
312: ; preds = %302, %312
%313 = phi ptr [ %314, %312 ], [ %308, %302 ]
store i8 0, ptr %313, align 1, !tbaa !10
%314 = getelementptr inbounds i8, ptr %313, i64 -1
%315 = load i8, ptr %314, align 1, !tbaa !10
%316 = call i64 @isspace(i8 noundef signext %315) #4
%317 = icmp eq i64 %316, 0
br i1 %317, label %318, label %312, !llvm.loop !17
318: ; preds = %312, %302
%319 = call i32 @strcount(ptr noundef %303, ptr noundef nonnull @.str) #4
%320 = icmp eq i32 %319, 0
br i1 %320, label %328, label %321
321: ; preds = %318
%322 = add nsw i32 %319, %291
%323 = icmp sgt i32 %322, %304
br i1 %323, label %324, label %328
324: ; preds = %321
%325 = add nuw nsw i32 %322, 1
%326 = call ptr @realloc(ptr noundef %303, i32 noundef %325) #4
%327 = icmp eq ptr %326, null
br i1 %327, label %384, label %328
328: ; preds = %324, %321, %318
%329 = phi ptr [ %303, %321 ], [ %303, %318 ], [ %326, %324 ]
%330 = phi i32 [ %304, %321 ], [ %304, %318 ], [ %322, %324 ]
%331 = call i64 @replaceall(ptr noundef %329, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1) #4
%332 = icmp slt i64 %331, 0
br i1 %332, label %384, label %333
333: ; preds = %328
%334 = call i64 @replaceall(ptr noundef %329, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3) #4
%335 = icmp slt i64 %334, 0
br i1 %335, label %384, label %336
336: ; preds = %333
%337 = call i32 @strexpand(ptr noundef %329) #4
br label %338
338: ; preds = %336, %202
%339 = phi ptr [ %203, %202 ], [ %329, %336 ]
%340 = phi i64 [ %187, %202 ], [ %305, %336 ]
%341 = phi i32 [ %50, %202 ], [ %283, %336 ]
%342 = phi i32 [ %41, %202 ], [ %330, %336 ]
%343 = icmp ne i64 %186, 0
%344 = or i1 %25, %343
br i1 %344, label %345, label %387
345: ; preds = %338
br i1 %38, label %349, label %346
346: ; preds = %345
%347 = load ptr, ptr %39, align 8, !tbaa !18
%348 = icmp eq ptr %347, null
br i1 %348, label %375, label %352
349: ; preds = %345
%350 = call i32 %2(ptr noundef null, i32 noundef %341, ptr noundef %106, ptr noundef %339) #4
%351 = icmp eq i32 %350, 0
br i1 %351, label %382, label %384
352: ; preds = %346, %369
%353 = phi i64 [ %371, %369 ], [ 0, %346 ]
%354 = phi ptr [ %373, %369 ], [ %347, %346 ]
%355 = phi i64 [ %370, %369 ], [ 0, %346 ]
%356 = getelementptr inbounds %struct.figpar_config, ptr %0, i64 %353
%357 = load i32, ptr @FNM_NOESCAPE, align 4, !tbaa !6
%358 = call i32 @fnmatch(ptr noundef nonnull %354, ptr noundef %106, i32 noundef %357) #4
%359 = icmp eq i32 %358, 0
br i1 %359, label %360, label %366
360: ; preds = %352
%361 = load ptr, ptr %356, align 8, !tbaa !21
%362 = icmp eq ptr %361, null
br i1 %362, label %369, label %363
363: ; preds = %360
%364 = call i32 %361(ptr noundef nonnull %356, i32 noundef %341, ptr noundef %106, ptr noundef %339) #4
%365 = icmp eq i32 %364, 0
br i1 %365, label %369, label %384
366: ; preds = %352
%367 = load i32, ptr @FNM_NOMATCH, align 4, !tbaa !6
%368 = icmp eq i32 %358, %367
br i1 %368, label %369, label %384
369: ; preds = %363, %360, %366
%370 = phi i64 [ 1, %363 ], [ 1, %360 ], [ %355, %366 ]
%371 = add nuw nsw i64 %353, 1
%372 = getelementptr inbounds %struct.figpar_config, ptr %0, i64 %371, i32 1
%373 = load ptr, ptr %372, align 8, !tbaa !18
%374 = icmp eq ptr %373, null
br i1 %374, label %375, label %352, !llvm.loop !22
375: ; preds = %369, %346
%376 = phi i64 [ 0, %346 ], [ %370, %369 ]
%377 = icmp eq i64 %376, 0
%378 = and i1 %37, %377
br i1 %378, label %379, label %382
379: ; preds = %375
%380 = call i32 %2(ptr noundef null, i32 noundef %341, ptr noundef %106, ptr noundef %339) #4
%381 = icmp eq i32 %380, 0
br i1 %381, label %382, label %384
382: ; preds = %375, %379, %349
%383 = icmp eq i64 %340, 0
br i1 %383, label %384, label %40, !llvm.loop !23
384: ; preds = %382, %379, %349, %333, %328, %324, %298, %288, %282, %204, %199, %101, %92, %71, %40, %66, %240, %222, %217, %366, %363, %230
%385 = phi i32 [ -1, %230 ], [ %364, %363 ], [ -1, %366 ], [ -1, %217 ], [ -1, %222 ], [ -1, %240 ], [ 0, %66 ], [ 0, %40 ], [ -1, %71 ], [ -1, %92 ], [ -1, %101 ], [ -1, %199 ], [ -1, %204 ], [ -1, %282 ], [ -1, %288 ], [ -1, %298 ], [ -1, %324 ], [ -1, %328 ], [ -1, %333 ], [ %350, %349 ], [ %380, %379 ], [ 0, %382 ]
%386 = call i32 @close(i32 noundef %33) #4
br label %387
387: ; preds = %338, %384, %31, %13, %4
%388 = phi i32 [ -1, %4 ], [ -1, %13 ], [ -1, %31 ], [ %385, %384 ], [ -1, %338 ]
call void @llvm.stackrestore.p0(ptr %8)
call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #4
ret i32 %388
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2
declare i64 @realpath(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @open(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
declare i64 @isspace(i8 noundef signext) local_unnamed_addr #3
declare i32 @close(i32 noundef) local_unnamed_addr #3
declare i32 @lseek(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare ptr @realloc(ptr noundef, i32 noundef) local_unnamed_addr #3
declare i32 @strtolower(ptr noundef) local_unnamed_addr #3
declare ptr @malloc(i32 noundef) local_unnamed_addr #3
declare i32 @strcount(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i64 @replaceall(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @strexpand(ptr noundef) local_unnamed_addr #3
declare i32 @fnmatch(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}
!18 = !{!19, !20, i64 8}
!19 = !{!"figpar_config", !20, i64 0, !20, i64 8}
!20 = !{!"any pointer", !8, i64 0}
!21 = !{!19, !20, i64 0}
!22 = distinct !{!22, !12}
!23 = distinct !{!23, !12}
| freebsd_lib_libfigpar_extr_figpar.c_parse_config |
; ModuleID = 'AnghaBench/linux/arch/um/kernel/skas/extr_uaccess.c_maybe_map.c'
source_filename = "AnghaBench/linux/arch/um/kernel/skas/extr_uaccess.c_maybe_map.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@current = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @maybe_map], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @maybe_map(i64 noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr @current, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !9
%6 = tail call ptr @virt_to_pte(i32 noundef %5, i64 noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %18, label %8
8: ; preds = %2
%9 = load i32, ptr %6, align 4, !tbaa !12
%10 = tail call i32 @pte_present(i32 noundef %9) #3
%11 = icmp eq i32 %10, 0
br i1 %11, label %18, label %12
12: ; preds = %8
%13 = icmp eq i32 %1, 0
br i1 %13, label %25, label %14
14: ; preds = %12
%15 = load i32, ptr %6, align 4, !tbaa !12
%16 = tail call i32 @pte_write(i32 noundef %15) #3
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %25
18: ; preds = %14, %8, %2
%19 = call i32 @handle_page_fault(i64 noundef %0, i32 noundef 0, i32 noundef %1, i32 noundef 1, ptr noundef nonnull %3) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %31
21: ; preds = %18
%22 = load ptr, ptr @current, align 8, !tbaa !5
%23 = load i32, ptr %22, align 4, !tbaa !9
%24 = call ptr @virt_to_pte(i32 noundef %23, i64 noundef %0) #3
br label %25
25: ; preds = %21, %14, %12
%26 = phi ptr [ %24, %21 ], [ %6, %14 ], [ %6, %12 ]
%27 = load i32, ptr %26, align 4, !tbaa !12
%28 = call i32 @pte_present(i32 noundef %27) #3
%29 = icmp eq i32 %28, 0
%30 = select i1 %29, ptr null, ptr %26
br label %31
31: ; preds = %18, %25
%32 = phi ptr [ %30, %25 ], [ null, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret ptr %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @virt_to_pte(i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @pte_present(i32 noundef) local_unnamed_addr #2
declare i32 @pte_write(i32 noundef) local_unnamed_addr #2
declare i32 @handle_page_fault(i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/um/kernel/skas/extr_uaccess.c_maybe_map.c'
source_filename = "AnghaBench/linux/arch/um/kernel/skas/extr_uaccess.c_maybe_map.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @maybe_map], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @maybe_map(i64 noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr @current, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = tail call ptr @virt_to_pte(i32 noundef %5, i64 noundef %0) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %18, label %8
8: ; preds = %2
%9 = load i32, ptr %6, align 4, !tbaa !13
%10 = tail call i32 @pte_present(i32 noundef %9) #3
%11 = icmp eq i32 %10, 0
br i1 %11, label %18, label %12
12: ; preds = %8
%13 = icmp eq i32 %1, 0
br i1 %13, label %25, label %14
14: ; preds = %12
%15 = load i32, ptr %6, align 4, !tbaa !13
%16 = tail call i32 @pte_write(i32 noundef %15) #3
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %25
18: ; preds = %14, %8, %2
%19 = call i32 @handle_page_fault(i64 noundef %0, i32 noundef 0, i32 noundef %1, i32 noundef 1, ptr noundef nonnull %3) #3
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %31
21: ; preds = %18
%22 = load ptr, ptr @current, align 8, !tbaa !6
%23 = load i32, ptr %22, align 4, !tbaa !10
%24 = call ptr @virt_to_pte(i32 noundef %23, i64 noundef %0) #3
br label %25
25: ; preds = %21, %14, %12
%26 = phi ptr [ %24, %21 ], [ %6, %14 ], [ %6, %12 ]
%27 = load i32, ptr %26, align 4, !tbaa !13
%28 = call i32 @pte_present(i32 noundef %27) #3
%29 = icmp eq i32 %28, 0
%30 = select i1 %29, ptr null, ptr %26
br label %31
31: ; preds = %18, %25
%32 = phi ptr [ %30, %25 ], [ null, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret ptr %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @virt_to_pte(i32 noundef, i64 noundef) local_unnamed_addr #2
declare i32 @pte_present(i32 noundef) local_unnamed_addr #2
declare i32 @pte_write(i32 noundef) local_unnamed_addr #2
declare i32 @handle_page_fault(i64 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| linux_arch_um_kernel_skas_extr_uaccess.c_maybe_map |
; ModuleID = 'AnghaBench/macvim/src/extr_ex_docmd.c_alist_new.c'
source_filename = "AnghaBench/macvim/src/extr_ex_docmd.c_alist_new.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i64 }
@curwin = dso_local local_unnamed_addr global ptr null, align 8
@global_alist = dso_local global %struct.TYPE_5__ zeroinitializer, align 8
@max_alist_id = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @alist_new() local_unnamed_addr #0 {
%1 = tail call i64 @alloc(i32 noundef 16) #2
%2 = inttoptr i64 %1 to ptr
%3 = load ptr, ptr @curwin, align 8, !tbaa !5
store ptr %2, ptr %3, align 8, !tbaa !9
%4 = load ptr, ptr @curwin, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !9
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %0
store ptr @global_alist, ptr %4, align 8, !tbaa !9
%8 = load i32, ptr @global_alist, align 8, !tbaa !11
%9 = add nsw i32 %8, 1
store i32 %9, ptr @global_alist, align 8, !tbaa !11
br label %15
10: ; preds = %0
store i32 1, ptr %5, align 8, !tbaa !11
%11 = load i64, ptr @max_alist_id, align 8, !tbaa !15
%12 = add nsw i64 %11, 1
store i64 %12, ptr @max_alist_id, align 8, !tbaa !15
%13 = getelementptr inbounds %struct.TYPE_5__, ptr %5, i64 0, i32 1
store i64 %12, ptr %13, align 8, !tbaa !16
%14 = tail call i32 @alist_init(ptr noundef nonnull %5) #2
br label %15
15: ; preds = %10, %7
ret void
}
declare i64 @alloc(i32 noundef) local_unnamed_addr #1
declare i32 @alist_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_6__", !6, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0, !14, i64 8}
!13 = !{!"int", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!12, !14, i64 8}
| ; ModuleID = 'AnghaBench/macvim/src/extr_ex_docmd.c_alist_new.c'
source_filename = "AnghaBench/macvim/src/extr_ex_docmd.c_alist_new.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, i64 }
@curwin = common local_unnamed_addr global ptr null, align 8
@global_alist = common global %struct.TYPE_5__ zeroinitializer, align 8
@max_alist_id = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @alist_new() local_unnamed_addr #0 {
%1 = tail call i64 @alloc(i32 noundef 16) #2
%2 = inttoptr i64 %1 to ptr
%3 = load ptr, ptr @curwin, align 8, !tbaa !6
store ptr %2, ptr %3, align 8, !tbaa !10
%4 = load ptr, ptr @curwin, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %0
store ptr @global_alist, ptr %4, align 8, !tbaa !10
%8 = load i32, ptr @global_alist, align 8, !tbaa !12
%9 = add nsw i32 %8, 1
store i32 %9, ptr @global_alist, align 8, !tbaa !12
br label %15
10: ; preds = %0
store i32 1, ptr %5, align 8, !tbaa !12
%11 = load i64, ptr @max_alist_id, align 8, !tbaa !16
%12 = add nsw i64 %11, 1
store i64 %12, ptr @max_alist_id, align 8, !tbaa !16
%13 = getelementptr inbounds i8, ptr %5, i64 8
store i64 %12, ptr %13, align 8, !tbaa !17
%14 = tail call i32 @alist_init(ptr noundef nonnull %5) #2
br label %15
15: ; preds = %10, %7
ret void
}
declare i64 @alloc(i32 noundef) local_unnamed_addr #1
declare i32 @alist_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_6__", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_5__", !14, i64 0, !15, i64 8}
!14 = !{!"int", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!13, !15, i64 8}
| macvim_src_extr_ex_docmd.c_alist_new |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_traps.c_simulate_sync.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_traps.c_simulate_sync.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@OPCODE = dso_local local_unnamed_addr global i32 0, align 4
@SPEC0 = dso_local local_unnamed_addr global i32 0, align 4
@FUNC = dso_local local_unnamed_addr global i32 0, align 4
@SYNC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @simulate_sync], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal noundef i32 @simulate_sync(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @OPCODE, align 4, !tbaa !5
%4 = and i32 %3, %1
%5 = load i32, ptr @SPEC0, align 4, !tbaa !5
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, ptr @FUNC, align 4, !tbaa !5
%9 = and i32 %8, %1
%10 = load i32, ptr @SYNC, align 4, !tbaa !5
%11 = icmp eq i32 %9, %10
br i1 %11, label %13, label %12
12: ; preds = %7, %2
br label %13
13: ; preds = %7, %12
%14 = phi i32 [ -1, %12 ], [ 0, %7 ]
ret i32 %14
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_traps.c_simulate_sync.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/mips/kernel/extr_traps.c_simulate_sync.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OPCODE = common local_unnamed_addr global i32 0, align 4
@SPEC0 = common local_unnamed_addr global i32 0, align 4
@FUNC = common local_unnamed_addr global i32 0, align 4
@SYNC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @simulate_sync], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -1, 1) i32 @simulate_sync(ptr nocapture readnone %0, i32 noundef %1) #0 {
%3 = load i32, ptr @OPCODE, align 4, !tbaa !6
%4 = and i32 %3, %1
%5 = load i32, ptr @SPEC0, align 4, !tbaa !6
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i32, ptr @FUNC, align 4, !tbaa !6
%9 = and i32 %8, %1
%10 = load i32, ptr @SYNC, align 4, !tbaa !6
%11 = icmp eq i32 %9, %10
br i1 %11, label %13, label %12
12: ; preds = %7, %2
br label %13
13: ; preds = %7, %12
%14 = phi i32 [ -1, %12 ], [ 0, %7 ]
ret i32 %14
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_mips_kernel_extr_traps.c_simulate_sync |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/ibm/emac/extr_core.c_emac_rx_clk_tx.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/ibm/emac/extr_core.c_emac_rx_clk_tx.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EMAC_FTR_440EP_PHY_CLK_FIX = dso_local local_unnamed_addr global i32 0, align 4
@SDR0 = dso_local local_unnamed_addr global i32 0, align 4
@SDR0_MFR = dso_local local_unnamed_addr global i32 0, align 4
@SDR0_MFR_ECS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @emac_rx_clk_tx], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @emac_rx_clk_tx(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/ibm/emac/extr_core.c_emac_rx_clk_tx.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/ibm/emac/extr_core.c_emac_rx_clk_tx.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EMAC_FTR_440EP_PHY_CLK_FIX = common local_unnamed_addr global i32 0, align 4
@SDR0 = common local_unnamed_addr global i32 0, align 4
@SDR0_MFR = common local_unnamed_addr global i32 0, align 4
@SDR0_MFR_ECS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @emac_rx_clk_tx], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @emac_rx_clk_tx(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_ethernet_ibm_emac_extr_core.c_emac_rx_clk_tx |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/cpuidle/extr_cpuidle.c_cpuidle_kick_cpus.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/cpuidle/extr_cpuidle.c_cpuidle_kick_cpus.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cpuidle_kick_cpus], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @cpuidle_kick_cpus() #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/cpuidle/extr_cpuidle.c_cpuidle_kick_cpus.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/cpuidle/extr_cpuidle.c_cpuidle_kick_cpus.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cpuidle_kick_cpus], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @cpuidle_kick_cpus() #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_cpuidle_extr_cpuidle.c_cpuidle_kick_cpus |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_acpi.c_nouveau_dsm_switchto.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_acpi.c_nouveau_dsm_switchto.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@nouveau_dsm_priv = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@VGA_SWITCHEROO_IGD = dso_local local_unnamed_addr global i32 0, align 4
@NOUVEAU_DSM_LED_STAMINA = dso_local local_unnamed_addr global i32 0, align 4
@NOUVEAU_DSM_LED_SPEED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nouveau_dsm_switchto], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nouveau_dsm_switchto(i32 noundef %0) #0 {
%2 = load i32, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @nouveau_dsm_priv, i64 0, i32 1), align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = load i32, ptr @VGA_SWITCHEROO_IGD, align 4, !tbaa !10
%6 = icmp eq i32 %5, %0
%7 = load i32, ptr @nouveau_dsm_priv, align 4, !tbaa !11
%8 = load i32, ptr @NOUVEAU_DSM_LED_STAMINA, align 4
%9 = load i32, ptr @NOUVEAU_DSM_LED_SPEED, align 4
%10 = select i1 %6, i32 %8, i32 %9
%11 = tail call i32 @nouveau_dsm_switch_mux(i32 noundef %7, i32 noundef %10) #2
br label %12
12: ; preds = %4, %1
%13 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %13
}
declare i32 @nouveau_dsm_switch_mux(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_2__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_acpi.c_nouveau_dsm_switchto.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_acpi.c_nouveau_dsm_switchto.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32 }
@nouveau_dsm_priv = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@VGA_SWITCHEROO_IGD = common local_unnamed_addr global i32 0, align 4
@NOUVEAU_DSM_LED_STAMINA = common local_unnamed_addr global i32 0, align 4
@NOUVEAU_DSM_LED_SPEED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nouveau_dsm_switchto], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nouveau_dsm_switchto(i32 noundef %0) #0 {
%2 = load i32, ptr getelementptr inbounds (i8, ptr @nouveau_dsm_priv, i64 4), align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = load i32, ptr @VGA_SWITCHEROO_IGD, align 4, !tbaa !11
%6 = icmp eq i32 %5, %0
%7 = load i32, ptr @nouveau_dsm_priv, align 4, !tbaa !12
%8 = load i32, ptr @NOUVEAU_DSM_LED_STAMINA, align 4
%9 = load i32, ptr @NOUVEAU_DSM_LED_SPEED, align 4
%10 = select i1 %6, i32 %8, i32 %9
%11 = tail call i32 @nouveau_dsm_switch_mux(i32 noundef %7, i32 noundef %10) #2
br label %12
12: ; preds = %4, %1
%13 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %13
}
declare i32 @nouveau_dsm_switch_mux(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
| fastsocket_kernel_drivers_gpu_drm_nouveau_extr_nouveau_acpi.c_nouveau_dsm_switchto |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/benet/extr_be_cmds.c_be_mcc_notify_wait.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/benet/extr_be_cmds.c_be_mcc_notify_wait.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
%struct.be_mcc_wrb = type { i32, i32 }
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @be_mcc_notify_wait], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @be_mcc_notify_wait(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 4, !tbaa !5
store i32 %4, ptr %2, align 4, !tbaa !11
%5 = load i32, ptr %0, align 4, !tbaa !12
%6 = call i32 @index_dec(ptr noundef nonnull %2, i32 noundef %5) #3
%7 = load i32, ptr %2, align 4, !tbaa !11
%8 = call ptr @queue_index_node(ptr noundef nonnull %0, i32 noundef %7) #3
%9 = getelementptr inbounds %struct.be_mcc_wrb, ptr %8, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = load i32, ptr %8, align 4, !tbaa !15
%12 = call ptr @be_decode_resp_hdr(i32 noundef %10, i32 noundef %11) #3
%13 = call i32 @be_mcc_notify(ptr noundef nonnull %0) #3
%14 = call i32 @be_mcc_wait_compl(ptr noundef nonnull %0) #3
%15 = load i32, ptr @EIO, align 4, !tbaa !11
%16 = sub nsw i32 0, %15
%17 = icmp eq i32 %14, %16
br i1 %17, label %20, label %18
18: ; preds = %1
%19 = load i32, ptr %12, align 4, !tbaa !16
br label %20
20: ; preds = %1, %18
%21 = phi i32 [ %14, %1 ], [ %19, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %21
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @index_dec(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @queue_index_node(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @be_decode_resp_hdr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @be_mcc_notify(ptr noundef) local_unnamed_addr #2
declare i32 @be_mcc_wait_compl(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 4}
!6 = !{!"be_mcc_obj", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!6, !8, i64 0}
!13 = !{!14, !8, i64 4}
!14 = !{!"be_mcc_wrb", !8, i64 0, !8, i64 4}
!15 = !{!14, !8, i64 0}
!16 = !{!17, !8, i64 0}
!17 = !{!"be_cmd_resp_hdr", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/benet/extr_be_cmds.c_be_mcc_notify_wait.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/benet/extr_be_cmds.c_be_mcc_notify_wait.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @be_mcc_notify_wait], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @be_mcc_notify_wait(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
store i32 %4, ptr %2, align 4, !tbaa !12
%5 = load i32, ptr %0, align 4, !tbaa !13
%6 = call i32 @index_dec(ptr noundef nonnull %2, i32 noundef %5) #3
%7 = load i32, ptr %2, align 4, !tbaa !12
%8 = call ptr @queue_index_node(ptr noundef nonnull %0, i32 noundef %7) #3
%9 = getelementptr inbounds i8, ptr %8, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = load i32, ptr %8, align 4, !tbaa !16
%12 = call ptr @be_decode_resp_hdr(i32 noundef %10, i32 noundef %11) #3
%13 = call i32 @be_mcc_notify(ptr noundef nonnull %0) #3
%14 = call i32 @be_mcc_wait_compl(ptr noundef nonnull %0) #3
%15 = load i32, ptr @EIO, align 4, !tbaa !12
%16 = sub nsw i32 0, %15
%17 = icmp eq i32 %14, %16
br i1 %17, label %20, label %18
18: ; preds = %1
%19 = load i32, ptr %12, align 4, !tbaa !17
br label %20
20: ; preds = %1, %18
%21 = phi i32 [ %14, %1 ], [ %19, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %21
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @index_dec(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @queue_index_node(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @be_decode_resp_hdr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @be_mcc_notify(ptr noundef) local_unnamed_addr #2
declare i32 @be_mcc_wait_compl(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 4}
!7 = !{!"be_mcc_obj", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
!13 = !{!7, !9, i64 0}
!14 = !{!15, !9, i64 4}
!15 = !{!"be_mcc_wrb", !9, i64 0, !9, i64 4}
!16 = !{!15, !9, i64 0}
!17 = !{!18, !9, i64 0}
!18 = !{!"be_cmd_resp_hdr", !9, i64 0}
| fastsocket_kernel_drivers_net_benet_extr_be_cmds.c_be_mcc_notify_wait |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/extr_phy_lcn.c_wlc_lcnphy_set_tx_iqcc.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/extr_phy_lcn.c_wlc_lcnphy_set_tx_iqcc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.phytbl_info = type { i32, i32, i32, ptr, i32 }
@LCNPHY_TBL_ID_IQLOCAL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @wlc_lcnphy_set_tx_iqcc(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.phytbl_info, align 8
%5 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
store i32 %1, ptr %5, align 4, !tbaa !5
%6 = getelementptr inbounds [2 x i32], ptr %5, i64 0, i64 1
store i32 %2, ptr %6, align 4, !tbaa !5
%7 = load i32, ptr @LCNPHY_TBL_ID_IQLOCAL, align 4, !tbaa !5
%8 = getelementptr inbounds %struct.phytbl_info, ptr %4, i64 0, i32 4
store i32 %7, ptr %8, align 8, !tbaa !9
store i32 16, ptr %4, align 8, !tbaa !12
%9 = getelementptr inbounds %struct.phytbl_info, ptr %4, i64 0, i32 3
store ptr %5, ptr %9, align 8, !tbaa !13
%10 = getelementptr inbounds %struct.phytbl_info, ptr %4, i64 0, i32 1
store i32 2, ptr %10, align 4, !tbaa !14
%11 = getelementptr inbounds %struct.phytbl_info, ptr %4, i64 0, i32 2
store i32 80, ptr %11, align 8, !tbaa !15
%12 = call i32 @wlc_lcnphy_write_table(ptr noundef %0, ptr noundef nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wlc_lcnphy_write_table(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"phytbl_info", !6, i64 0, !6, i64 4, !6, i64 8, !11, i64 16, !6, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!10, !11, i64 16}
!14 = !{!10, !6, i64 4}
!15 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/extr_phy_lcn.c_wlc_lcnphy_set_tx_iqcc.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/extr_phy_lcn.c_wlc_lcnphy_set_tx_iqcc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.phytbl_info = type { i32, i32, i32, ptr, i32 }
@LCNPHY_TBL_ID_IQLOCAL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @wlc_lcnphy_set_tx_iqcc(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.phytbl_info, align 8
%5 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
store i32 %1, ptr %5, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %2, ptr %6, align 4, !tbaa !6
%7 = load i32, ptr @LCNPHY_TBL_ID_IQLOCAL, align 4, !tbaa !6
%8 = getelementptr inbounds i8, ptr %4, i64 24
store i32 %7, ptr %8, align 8, !tbaa !10
%9 = getelementptr inbounds i8, ptr %4, i64 16
store ptr %5, ptr %9, align 8, !tbaa !13
store <2 x i32> <i32 16, i32 2>, ptr %4, align 8, !tbaa !6
%10 = getelementptr inbounds i8, ptr %4, i64 8
store i32 80, ptr %10, align 8, !tbaa !14
%11 = call i32 @wlc_lcnphy_write_table(ptr noundef %0, ptr noundef nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wlc_lcnphy_write_table(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"phytbl_info", !7, i64 0, !7, i64 4, !7, i64 8, !12, i64 16, !7, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 16}
!14 = !{!11, !7, i64 8}
| linux_drivers_net_wireless_broadcom_brcm80211_brcmsmac_phy_extr_phy_lcn.c_wlc_lcnphy_set_tx_iqcc |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_evdns.c_evdns_base_get_nameserver_addr.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_evdns.c_evdns_base_get_nameserver_addr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nameserver = type { i64, i32, ptr }
; Function Attrs: nounwind uwtable
define dso_local i32 @evdns_base_get_nameserver_addr(ptr noundef %0, i32 noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @EVDNS_LOCK(ptr noundef %0) #2
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = icmp sgt i32 %1, 0
%8 = icmp ne ptr %6, null
%9 = select i1 %7, i1 %8, i1 false
br i1 %9, label %15, label %21
10: ; preds = %15
%11 = add nuw nsw i32 %17, 1
%12 = icmp slt i32 %11, %1
%13 = icmp ne ptr %19, null
%14 = and i1 %12, %13
br i1 %14, label %15, label %21, !llvm.loop !10
15: ; preds = %4, %10
%16 = phi ptr [ %19, %10 ], [ %6, %4 ]
%17 = phi i32 [ %11, %10 ], [ 0, %4 ]
%18 = getelementptr inbounds %struct.nameserver, ptr %16, i64 0, i32 2
%19 = load ptr, ptr %18, align 8, !tbaa !12
%20 = icmp eq ptr %19, %6
br i1 %20, label %34, label %10
21: ; preds = %10, %4
%22 = phi ptr [ %6, %4 ], [ %19, %10 ]
%23 = phi i1 [ %8, %4 ], [ %13, %10 ]
br i1 %23, label %24, label %34
24: ; preds = %21
%25 = load i64, ptr %22, align 8, !tbaa !16
%26 = icmp sgt i64 %25, %3
br i1 %26, label %27, label %29
27: ; preds = %24
%28 = trunc i64 %25 to i32
br label %34
29: ; preds = %24
%30 = getelementptr inbounds %struct.nameserver, ptr %22, i64 0, i32 1
%31 = tail call i32 @memcpy(ptr noundef %2, ptr noundef nonnull %30, i64 noundef %25) #2
%32 = load i64, ptr %22, align 8, !tbaa !16
%33 = trunc i64 %32 to i32
br label %34
34: ; preds = %15, %21, %29, %27
%35 = phi i32 [ %28, %27 ], [ %33, %29 ], [ -1, %21 ], [ -1, %15 ]
%36 = tail call i32 @EVDNS_UNLOCK(ptr noundef nonnull %0) #2
ret i32 %35
}
declare i32 @EVDNS_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @EVDNS_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"evdns_base", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !7, i64 16}
!13 = !{!"nameserver", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!13, !14, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_evdns.c_evdns_base_get_nameserver_addr.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_evdns.c_evdns_base_get_nameserver_addr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @evdns_base_get_nameserver_addr(ptr noundef %0, i32 noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = tail call i32 @EVDNS_LOCK(ptr noundef %0) #2
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = icmp sgt i32 %1, 0
%8 = icmp ne ptr %6, null
%9 = select i1 %7, i1 %8, i1 false
br i1 %9, label %15, label %21
10: ; preds = %15
%11 = add nuw nsw i32 %17, 1
%12 = icmp slt i32 %11, %1
%13 = icmp ne ptr %19, null
%14 = and i1 %12, %13
br i1 %14, label %15, label %21, !llvm.loop !11
15: ; preds = %4, %10
%16 = phi ptr [ %19, %10 ], [ %6, %4 ]
%17 = phi i32 [ %11, %10 ], [ 0, %4 ]
%18 = getelementptr inbounds i8, ptr %16, i64 16
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = icmp eq ptr %19, %6
br i1 %20, label %34, label %10
21: ; preds = %10, %4
%22 = phi ptr [ %6, %4 ], [ %19, %10 ]
%23 = phi i1 [ %8, %4 ], [ %13, %10 ]
br i1 %23, label %24, label %34
24: ; preds = %21
%25 = load i64, ptr %22, align 8, !tbaa !17
%26 = icmp sgt i64 %25, %3
br i1 %26, label %27, label %29
27: ; preds = %24
%28 = trunc i64 %25 to i32
br label %34
29: ; preds = %24
%30 = getelementptr inbounds i8, ptr %22, i64 8
%31 = tail call i32 @memcpy(ptr noundef %2, ptr noundef nonnull %30, i64 noundef %25) #2
%32 = load i64, ptr %22, align 8, !tbaa !17
%33 = trunc i64 %32 to i32
br label %34
34: ; preds = %15, %21, %29, %27
%35 = phi i32 [ %28, %27 ], [ %33, %29 ], [ -1, %21 ], [ -1, %15 ]
%36 = tail call i32 @EVDNS_UNLOCK(ptr noundef nonnull %0) #2
ret i32 %35
}
declare i32 @EVDNS_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @EVDNS_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"evdns_base", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !8, i64 16}
!14 = !{!"nameserver", !15, i64 0, !16, i64 8, !8, i64 16}
!15 = !{!"long", !9, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = !{!14, !15, i64 0}
| freebsd_contrib_ntp_sntp_libevent_extr_evdns.c_evdns_base_get_nameserver_addr |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/wined3d/extr_shader_sm4.c_shader_sm4_read_dcl_input_primitive.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/wined3d/extr_shader_sm4.c_shader_sm4_read_dcl_input_primitive.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@WINED3D_SM4_PRIMITIVE_TYPE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@WINED3D_SM4_PRIMITIVE_TYPE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@WINED3D_SM5_INPUT_PT_PATCH1 = dso_local local_unnamed_addr global i32 0, align 4
@WINED3D_SM5_INPUT_PT_PATCH32 = dso_local local_unnamed_addr global i32 0, align 4
@WINED3D_PT_PATCH = dso_local local_unnamed_addr global i32 0, align 4
@input_primitive_type_table = dso_local local_unnamed_addr global ptr null, align 8
@WINED3D_PT_UNDEFINED = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Unhandled input primitive type %#x.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @shader_sm4_read_dcl_input_primitive], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @shader_sm4_read_dcl_input_primitive(ptr nocapture noundef writeonly %0, i32 %1, i32 noundef %2, ptr nocapture readnone %3, i32 %4, ptr nocapture readnone %5) #0 {
%7 = load i32, ptr @WINED3D_SM4_PRIMITIVE_TYPE_MASK, align 4, !tbaa !5
%8 = and i32 %7, %2
%9 = load i32, ptr @WINED3D_SM4_PRIMITIVE_TYPE_SHIFT, align 4, !tbaa !5
%10 = ashr i32 %8, %9
%11 = load i32, ptr @WINED3D_SM5_INPUT_PT_PATCH1, align 4, !tbaa !5
%12 = icmp ugt i32 %11, %10
%13 = load i32, ptr @WINED3D_SM5_INPUT_PT_PATCH32, align 4
%14 = icmp ugt i32 %10, %13
%15 = select i1 %12, i1 true, i1 %14
br i1 %15, label %21, label %16
16: ; preds = %6
%17 = load i32, ptr @WINED3D_PT_PATCH, align 4, !tbaa !5
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store i32 %17, ptr %18, align 4, !tbaa !9
%19 = sub i32 %10, %11
%20 = add i32 %19, 1
store i32 %20, ptr %0, align 4, !tbaa !13
br label %34
21: ; preds = %6
%22 = load ptr, ptr @input_primitive_type_table, align 8, !tbaa !14
%23 = tail call i32 @ARRAY_SIZE(ptr noundef %22) #2
%24 = icmp ult i32 %10, %23
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = load i32, ptr @WINED3D_PT_UNDEFINED, align 4, !tbaa !5
%27 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store i32 %26, ptr %27, align 4, !tbaa !9
br label %34
28: ; preds = %21
%29 = load ptr, ptr @input_primitive_type_table, align 8, !tbaa !14
%30 = zext i32 %10 to i64
%31 = getelementptr inbounds i32, ptr %29, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !5
%33 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
store i32 %32, ptr %33, align 4, !tbaa !9
br label %34
34: ; preds = %25, %28, %16
%35 = phi i32 [ %26, %25 ], [ %32, %28 ], [ %17, %16 ]
%36 = load i32, ptr @WINED3D_PT_UNDEFINED, align 4, !tbaa !5
%37 = icmp eq i32 %35, %36
br i1 %37, label %38, label %40
38: ; preds = %34
%39 = tail call i32 @FIXME(ptr noundef nonnull @.str, i32 noundef %10) #2
br label %40
40: ; preds = %38, %34
ret void
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @FIXME(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"wined3d_shader_instruction", !11, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !6, i64 0, !6, i64 4}
!13 = !{!10, !6, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/wined3d/extr_shader_sm4.c_shader_sm4_read_dcl_input_primitive.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/wined3d/extr_shader_sm4.c_shader_sm4_read_dcl_input_primitive.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WINED3D_SM4_PRIMITIVE_TYPE_MASK = common local_unnamed_addr global i32 0, align 4
@WINED3D_SM4_PRIMITIVE_TYPE_SHIFT = common local_unnamed_addr global i32 0, align 4
@WINED3D_SM5_INPUT_PT_PATCH1 = common local_unnamed_addr global i32 0, align 4
@WINED3D_SM5_INPUT_PT_PATCH32 = common local_unnamed_addr global i32 0, align 4
@WINED3D_PT_PATCH = common local_unnamed_addr global i32 0, align 4
@input_primitive_type_table = common local_unnamed_addr global ptr null, align 8
@WINED3D_PT_UNDEFINED = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Unhandled input primitive type %#x.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @shader_sm4_read_dcl_input_primitive], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @shader_sm4_read_dcl_input_primitive(ptr nocapture noundef writeonly %0, i32 %1, i32 noundef %2, ptr nocapture readnone %3, i32 %4, ptr nocapture readnone %5) #0 {
%7 = load i32, ptr @WINED3D_SM4_PRIMITIVE_TYPE_MASK, align 4, !tbaa !6
%8 = and i32 %7, %2
%9 = load i32, ptr @WINED3D_SM4_PRIMITIVE_TYPE_SHIFT, align 4, !tbaa !6
%10 = ashr i32 %8, %9
%11 = load i32, ptr @WINED3D_SM5_INPUT_PT_PATCH1, align 4, !tbaa !6
%12 = icmp ugt i32 %11, %10
%13 = load i32, ptr @WINED3D_SM5_INPUT_PT_PATCH32, align 4
%14 = icmp ugt i32 %10, %13
%15 = select i1 %12, i1 true, i1 %14
br i1 %15, label %21, label %16
16: ; preds = %6
%17 = load i32, ptr @WINED3D_PT_PATCH, align 4, !tbaa !6
%18 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %17, ptr %18, align 4, !tbaa !10
%19 = sub i32 %10, %11
%20 = add i32 %19, 1
store i32 %20, ptr %0, align 4, !tbaa !14
br label %34
21: ; preds = %6
%22 = load ptr, ptr @input_primitive_type_table, align 8, !tbaa !15
%23 = tail call i32 @ARRAY_SIZE(ptr noundef %22) #2
%24 = icmp ult i32 %10, %23
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = load i32, ptr @WINED3D_PT_UNDEFINED, align 4, !tbaa !6
%27 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %26, ptr %27, align 4, !tbaa !10
br label %34
28: ; preds = %21
%29 = load ptr, ptr @input_primitive_type_table, align 8, !tbaa !15
%30 = zext i32 %10 to i64
%31 = getelementptr inbounds i32, ptr %29, i64 %30
%32 = load i32, ptr %31, align 4, !tbaa !6
%33 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %32, ptr %33, align 4, !tbaa !10
br label %34
34: ; preds = %25, %28, %16
%35 = phi i32 [ %26, %25 ], [ %32, %28 ], [ %17, %16 ]
%36 = load i32, ptr @WINED3D_PT_UNDEFINED, align 4, !tbaa !6
%37 = icmp eq i32 %35, %36
br i1 %37, label %38, label %40
38: ; preds = %34
%39 = tail call i32 @FIXME(ptr noundef nonnull @.str, i32 noundef %10) #2
br label %40
40: ; preds = %38, %34
ret void
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @FIXME(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"wined3d_shader_instruction", !12, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!14 = !{!11, !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
| reactos_dll_directx_wine_wined3d_extr_shader_sm4.c_shader_sm4_read_dcl_input_primitive |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_fast.c_eap_fast_tlv_result.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_fast.c_eap_fast_tlv_result.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.eap_tlv_intermediate_result_tlv = type { ptr, ptr, ptr }
@MSG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"EAP-FAST: Add %sResult TLV(status=%d)\00", align 1
@.str.1 = private unnamed_addr constant [14 x i8] c"Intermediate \00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@EAP_TLV_TYPE_MANDATORY = dso_local local_unnamed_addr global i32 0, align 4
@EAP_TLV_INTERMEDIATE_RESULT_TLV = dso_local local_unnamed_addr global i32 0, align 4
@EAP_TLV_RESULT_TLV = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @eap_fast_tlv_result], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @eap_fast_tlv_result(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @wpabuf_alloc(i32 noundef 24) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %21, label %5
5: ; preds = %2
%6 = load i32, ptr @MSG_DEBUG, align 4, !tbaa !5
%7 = icmp eq i32 %1, 0
%8 = select i1 %7, ptr @.str.2, ptr @.str.1
%9 = tail call i32 @wpa_printf(i32 noundef %6, ptr noundef nonnull @.str, ptr noundef nonnull %8, i32 noundef %0) #2
%10 = tail call ptr @wpabuf_put(ptr noundef nonnull %3, i32 noundef 24) #2
%11 = load i32, ptr @EAP_TLV_TYPE_MANDATORY, align 4, !tbaa !5
%12 = load i32, ptr @EAP_TLV_INTERMEDIATE_RESULT_TLV, align 4
%13 = load i32, ptr @EAP_TLV_RESULT_TLV, align 4
%14 = select i1 %7, i32 %13, i32 %12
%15 = or i32 %14, %11
%16 = tail call ptr @host_to_be16(i32 noundef %15) #2
%17 = getelementptr inbounds %struct.eap_tlv_intermediate_result_tlv, ptr %10, i64 0, i32 2
store ptr %16, ptr %17, align 8, !tbaa !9
%18 = tail call ptr @host_to_be16(i32 noundef 2) #2
%19 = getelementptr inbounds %struct.eap_tlv_intermediate_result_tlv, ptr %10, i64 0, i32 1
store ptr %18, ptr %19, align 8, !tbaa !12
%20 = tail call ptr @host_to_be16(i32 noundef %0) #2
store ptr %20, ptr %10, align 8, !tbaa !13
br label %21
21: ; preds = %2, %5
ret ptr %3
}
declare ptr @wpabuf_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @wpa_printf(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @wpabuf_put(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @host_to_be16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"eap_tlv_intermediate_result_tlv", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_fast.c_eap_fast_tlv_result.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/eap_peer/extr_eap_fast.c_eap_fast_tlv_result.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MSG_DEBUG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [38 x i8] c"EAP-FAST: Add %sResult TLV(status=%d)\00", align 1
@.str.1 = private unnamed_addr constant [14 x i8] c"Intermediate \00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@EAP_TLV_TYPE_MANDATORY = common local_unnamed_addr global i32 0, align 4
@EAP_TLV_INTERMEDIATE_RESULT_TLV = common local_unnamed_addr global i32 0, align 4
@EAP_TLV_RESULT_TLV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @eap_fast_tlv_result], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @eap_fast_tlv_result(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @wpabuf_alloc(i32 noundef 24) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %21, label %5
5: ; preds = %2
%6 = load i32, ptr @MSG_DEBUG, align 4, !tbaa !6
%7 = icmp eq i32 %1, 0
%8 = select i1 %7, ptr @.str.2, ptr @.str.1
%9 = tail call i32 @wpa_printf(i32 noundef %6, ptr noundef nonnull @.str, ptr noundef nonnull %8, i32 noundef %0) #2
%10 = tail call ptr @wpabuf_put(ptr noundef nonnull %3, i32 noundef 24) #2
%11 = load i32, ptr @EAP_TLV_TYPE_MANDATORY, align 4, !tbaa !6
%12 = load i32, ptr @EAP_TLV_INTERMEDIATE_RESULT_TLV, align 4
%13 = load i32, ptr @EAP_TLV_RESULT_TLV, align 4
%14 = select i1 %7, i32 %13, i32 %12
%15 = or i32 %14, %11
%16 = tail call ptr @host_to_be16(i32 noundef %15) #2
%17 = getelementptr inbounds i8, ptr %10, i64 16
store ptr %16, ptr %17, align 8, !tbaa !10
%18 = tail call ptr @host_to_be16(i32 noundef 2) #2
%19 = getelementptr inbounds i8, ptr %10, i64 8
store ptr %18, ptr %19, align 8, !tbaa !13
%20 = tail call ptr @host_to_be16(i32 noundef %0) #2
store ptr %20, ptr %10, align 8, !tbaa !14
br label %21
21: ; preds = %2, %5
ret ptr %3
}
declare ptr @wpabuf_alloc(i32 noundef) local_unnamed_addr #1
declare i32 @wpa_printf(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @wpabuf_put(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @host_to_be16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"eap_tlv_intermediate_result_tlv", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 0}
| freebsd_contrib_wpa_src_eap_peer_extr_eap_fast.c_eap_fast_tlv_result |
; ModuleID = 'AnghaBench/freebsd/sys/dev/iicbus/extr_ds1775.c_ds1775_probe.c'
source_filename = "AnghaBench/freebsd/sys/dev/iicbus/extr_ds1775.c_ds1775_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ds1775_softc = type { i32, i32 }
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [13 x i8] c"temp-monitor\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"ds1775\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"lm75\00", align 1
@.str.3 = private unnamed_addr constant [20 x i8] c"Temp-Monitor DS1775\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ds1775_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ds1775_probe(i32 noundef %0) #0 {
%2 = tail call ptr @ofw_bus_get_name(i32 noundef %0) #2
%3 = tail call ptr @ofw_bus_get_compat(i32 noundef %0) #2
%4 = icmp eq ptr %2, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %23
7: ; preds = %1
%8 = tail call i64 @strcmp(ptr noundef nonnull %2, ptr noundef nonnull @.str) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = tail call i64 @strcmp(ptr noundef %3, ptr noundef nonnull @.str.1) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %18, label %13
13: ; preds = %10
%14 = tail call i64 @strcmp(ptr noundef %3, ptr noundef nonnull @.str.2) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %13, %7
%17 = load i32, ptr @ENXIO, align 4, !tbaa !5
br label %23
18: ; preds = %13, %10
%19 = tail call ptr @device_get_softc(i32 noundef %0) #2
%20 = getelementptr inbounds %struct.ds1775_softc, ptr %19, i64 0, i32 1
store i32 %0, ptr %20, align 4, !tbaa !9
%21 = tail call i32 @iicbus_get_addr(i32 noundef %0) #2
store i32 %21, ptr %19, align 4, !tbaa !11
%22 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str.3) #2
br label %23
23: ; preds = %18, %16, %5
%24 = phi i32 [ %17, %16 ], [ 0, %18 ], [ %6, %5 ]
ret i32 %24
}
declare ptr @ofw_bus_get_name(i32 noundef) local_unnamed_addr #1
declare ptr @ofw_bus_get_compat(i32 noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @iicbus_get_addr(i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"ds1775_softc", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/iicbus/extr_ds1775.c_ds1775_probe.c'
source_filename = "AnghaBench/freebsd/sys/dev/iicbus/extr_ds1775.c_ds1775_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENXIO = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [13 x i8] c"temp-monitor\00", align 1
@.str.1 = private unnamed_addr constant [7 x i8] c"ds1775\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"lm75\00", align 1
@.str.3 = private unnamed_addr constant [20 x i8] c"Temp-Monitor DS1775\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ds1775_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ds1775_probe(i32 noundef %0) #0 {
%2 = tail call ptr @ofw_bus_get_name(i32 noundef %0) #2
%3 = tail call ptr @ofw_bus_get_compat(i32 noundef %0) #2
%4 = icmp eq ptr %2, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %23
7: ; preds = %1
%8 = tail call i64 @strcmp(ptr noundef nonnull %2, ptr noundef nonnull @.str) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = tail call i64 @strcmp(ptr noundef %3, ptr noundef nonnull @.str.1) #2
%12 = icmp eq i64 %11, 0
br i1 %12, label %18, label %13
13: ; preds = %10
%14 = tail call i64 @strcmp(ptr noundef %3, ptr noundef nonnull @.str.2) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %13, %7
%17 = load i32, ptr @ENXIO, align 4, !tbaa !6
br label %23
18: ; preds = %13, %10
%19 = tail call ptr @device_get_softc(i32 noundef %0) #2
%20 = getelementptr inbounds i8, ptr %19, i64 4
store i32 %0, ptr %20, align 4, !tbaa !10
%21 = tail call i32 @iicbus_get_addr(i32 noundef %0) #2
store i32 %21, ptr %19, align 4, !tbaa !12
%22 = tail call i32 @device_set_desc(i32 noundef %0, ptr noundef nonnull @.str.3) #2
br label %23
23: ; preds = %18, %16, %5
%24 = phi i32 [ %17, %16 ], [ 0, %18 ], [ %6, %5 ]
ret i32 %24
}
declare ptr @ofw_bus_get_name(i32 noundef) local_unnamed_addr #1
declare ptr @ofw_bus_get_compat(i32 noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @iicbus_get_addr(i32 noundef) local_unnamed_addr #1
declare i32 @device_set_desc(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"ds1775_softc", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 0}
| freebsd_sys_dev_iicbus_extr_ds1775.c_ds1775_probe |
; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-rx8025.c_rx8025_sysfs_store_clock_adjust.c'
source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-rx8025.c_rx8025_sysfs_store_clock_adjust.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [3 x i8] c"%i\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rx8025_sysfs_store_clock_adjust], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rx8025_sysfs_store_clock_adjust(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call i32 @sscanf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef nonnull %5) #3
%7 = icmp eq i32 %6, 1
br i1 %7, label %11, label %8
8: ; preds = %4
%9 = load i32, ptr @EINVAL, align 4, !tbaa !5
%10 = sub nsw i32 0, %9
br label %18
11: ; preds = %4
%12 = load i32, ptr %5, align 4, !tbaa !5
%13 = call i32 @rx8025_set_clock_adjust(ptr noundef %0, i32 noundef %12) #3
%14 = icmp eq i32 %13, 0
%15 = zext i32 %13 to i64
%16 = select i1 %14, i64 %3, i64 %15
%17 = trunc i64 %16 to i32
br label %18
18: ; preds = %11, %8
%19 = phi i32 [ %10, %8 ], [ %17, %11 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sscanf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @rx8025_set_clock_adjust(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-rx8025.c_rx8025_sysfs_store_clock_adjust.c'
source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-rx8025.c_rx8025_sysfs_store_clock_adjust.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [3 x i8] c"%i\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rx8025_sysfs_store_clock_adjust], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rx8025_sysfs_store_clock_adjust(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%6 = call i32 @sscanf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef nonnull %5) #3
%7 = icmp eq i32 %6, 1
br i1 %7, label %11, label %8
8: ; preds = %4
%9 = load i32, ptr @EINVAL, align 4, !tbaa !6
%10 = sub nsw i32 0, %9
br label %18
11: ; preds = %4
%12 = load i32, ptr %5, align 4, !tbaa !6
%13 = call i32 @rx8025_set_clock_adjust(ptr noundef %0, i32 noundef %12) #3
%14 = icmp eq i32 %13, 0
%15 = zext i32 %13 to i64
%16 = select i1 %14, i64 %3, i64 %15
%17 = trunc i64 %16 to i32
br label %18
18: ; preds = %11, %8
%19 = phi i32 [ %10, %8 ], [ %17, %11 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sscanf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @rx8025_set_clock_adjust(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_rtc_extr_rtc-rx8025.c_rx8025_sysfs_store_clock_adjust |
; ModuleID = 'AnghaBench/RetroArch/ctr/extr_ctr_memory.c__sbrk_r.c'
source_filename = "AnghaBench/RetroArch/ctr/extr_ctr_memory.c__sbrk_r.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@_sbrk_r.sbrk_top = internal unnamed_addr global i32 0, align 4
@__heapBase = dso_local local_unnamed_addr global i32 0, align 4
@__heap_size = dso_local local_unnamed_addr global i32 0, align 4
@MEMOP_ALLOC = dso_local local_unnamed_addr global i32 0, align 4
@MEMPERM_READ = dso_local local_unnamed_addr global i32 0, align 4
@MEMPERM_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@MEMOP_FREE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @_sbrk_r(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @__heapBase, align 4, !tbaa !5
br i1 %5, label %7, label %8
7: ; preds = %2
store i32 %6, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !5
br label %8
8: ; preds = %7, %2
%9 = phi i32 [ %6, %7 ], [ %4, %2 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%10 = add i32 %1, 4095
%11 = add i32 %10, %9
%12 = and i32 %11, -4096
%13 = load i32, ptr @__heap_size, align 4, !tbaa !5
%14 = add i32 %13, %6
%15 = sub i32 %12, %14
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %34
17: ; preds = %8
%18 = lshr i32 %15, 12
%19 = tail call i32 @ctr_request_free_pages(i32 noundef %18) #3
%20 = load i32, ptr @__heapBase, align 4, !tbaa !5
%21 = load i32, ptr @__heap_size, align 4, !tbaa !5
%22 = add nsw i32 %21, %20
%23 = load i32, ptr @MEMOP_ALLOC, align 4, !tbaa !5
%24 = load i32, ptr @MEMPERM_READ, align 4, !tbaa !5
%25 = load i32, ptr @MEMPERM_WRITE, align 4, !tbaa !5
%26 = or i32 %25, %24
%27 = call i64 @svcControlMemory(ptr noundef nonnull %3, i32 noundef %22, i32 noundef 0, i32 noundef %15, i32 noundef %23, i32 noundef %26) #3
%28 = icmp slt i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %17
%30 = load i32, ptr @__heap_size, align 4, !tbaa !5
%31 = add nsw i32 %30, %15
store i32 %31, ptr @__heap_size, align 4, !tbaa !5
br label %45
32: ; preds = %17
%33 = load i32, ptr @ENOMEM, align 4, !tbaa !5
store i32 %33, ptr %0, align 4, !tbaa !9
br label %50
34: ; preds = %8
%35 = add nsw i32 %13, %15
store i32 %35, ptr @__heap_size, align 4, !tbaa !5
%36 = icmp slt i32 %15, 0
br i1 %36, label %37, label %45
37: ; preds = %34
%38 = add nsw i32 %6, %35
%39 = sub nsw i32 0, %15
%40 = load i32, ptr @MEMOP_FREE, align 4, !tbaa !5
%41 = load i32, ptr @MEMPERM_READ, align 4, !tbaa !5
%42 = load i32, ptr @MEMPERM_WRITE, align 4, !tbaa !5
%43 = or i32 %42, %41
%44 = call i64 @svcControlMemory(ptr noundef nonnull %3, i32 noundef %38, i32 noundef 0, i32 noundef %39, i32 noundef %40, i32 noundef %43) #3
br label %45
45: ; preds = %29, %37, %34
%46 = load i32, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !5
%47 = add nsw i32 %46, %1
store i32 %47, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !5
%48 = sext i32 %46 to i64
%49 = inttoptr i64 %48 to ptr
br label %50
50: ; preds = %45, %32
%51 = phi ptr [ inttoptr (i64 -1 to ptr), %32 ], [ %49, %45 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret ptr %51
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ctr_request_free_pages(i32 noundef) local_unnamed_addr #2
declare i64 @svcControlMemory(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_reent", !6, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/ctr/extr_ctr_memory.c__sbrk_r.c'
source_filename = "AnghaBench/RetroArch/ctr/extr_ctr_memory.c__sbrk_r.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@_sbrk_r.sbrk_top = internal unnamed_addr global i32 0, align 4
@__heapBase = common local_unnamed_addr global i32 0, align 4
@__heap_size = common local_unnamed_addr global i32 0, align 4
@MEMOP_ALLOC = common local_unnamed_addr global i32 0, align 4
@MEMPERM_READ = common local_unnamed_addr global i32 0, align 4
@MEMPERM_WRITE = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@MEMOP_FREE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @_sbrk_r(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr @__heapBase, align 4, !tbaa !6
br i1 %5, label %7, label %8
7: ; preds = %2
store i32 %6, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !6
br label %8
8: ; preds = %7, %2
%9 = phi i32 [ %6, %7 ], [ %4, %2 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%10 = add i32 %1, 4095
%11 = add i32 %10, %9
%12 = and i32 %11, -4096
%13 = load i32, ptr @__heap_size, align 4, !tbaa !6
%14 = add i32 %13, %6
%15 = sub i32 %12, %14
%16 = icmp sgt i32 %15, 0
br i1 %16, label %17, label %34
17: ; preds = %8
%18 = lshr i32 %15, 12
%19 = tail call i32 @ctr_request_free_pages(i32 noundef %18) #3
%20 = load i32, ptr @__heapBase, align 4, !tbaa !6
%21 = load i32, ptr @__heap_size, align 4, !tbaa !6
%22 = add nsw i32 %21, %20
%23 = load i32, ptr @MEMOP_ALLOC, align 4, !tbaa !6
%24 = load i32, ptr @MEMPERM_READ, align 4, !tbaa !6
%25 = load i32, ptr @MEMPERM_WRITE, align 4, !tbaa !6
%26 = or i32 %25, %24
%27 = call i64 @svcControlMemory(ptr noundef nonnull %3, i32 noundef %22, i32 noundef 0, i32 noundef %15, i32 noundef %23, i32 noundef %26) #3
%28 = icmp slt i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %17
%30 = load i32, ptr @__heap_size, align 4, !tbaa !6
%31 = add nsw i32 %30, %15
store i32 %31, ptr @__heap_size, align 4, !tbaa !6
br label %45
32: ; preds = %17
%33 = load i32, ptr @ENOMEM, align 4, !tbaa !6
store i32 %33, ptr %0, align 4, !tbaa !10
br label %50
34: ; preds = %8
%35 = add nsw i32 %13, %15
store i32 %35, ptr @__heap_size, align 4, !tbaa !6
%36 = icmp slt i32 %15, 0
br i1 %36, label %37, label %45
37: ; preds = %34
%38 = add nsw i32 %6, %35
%39 = sub nsw i32 0, %15
%40 = load i32, ptr @MEMOP_FREE, align 4, !tbaa !6
%41 = load i32, ptr @MEMPERM_READ, align 4, !tbaa !6
%42 = load i32, ptr @MEMPERM_WRITE, align 4, !tbaa !6
%43 = or i32 %42, %41
%44 = call i64 @svcControlMemory(ptr noundef nonnull %3, i32 noundef %38, i32 noundef 0, i32 noundef %39, i32 noundef %40, i32 noundef %43) #3
br label %45
45: ; preds = %29, %37, %34
%46 = load i32, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !6
%47 = add nsw i32 %46, %1
store i32 %47, ptr @_sbrk_r.sbrk_top, align 4, !tbaa !6
%48 = sext i32 %46 to i64
%49 = inttoptr i64 %48 to ptr
br label %50
50: ; preds = %45, %32
%51 = phi ptr [ inttoptr (i64 -1 to ptr), %32 ], [ %49, %45 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret ptr %51
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ctr_request_free_pages(i32 noundef) local_unnamed_addr #2
declare i64 @svcControlMemory(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"_reent", !7, i64 0}
| RetroArch_ctr_extr_ctr_memory.c__sbrk_r |
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_int.c_ecore_db_rec_attn.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_int.c_ecore_db_rec_attn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ECORE_DB_REC_COUNT = dso_local local_unnamed_addr global i32 0, align 4
@DORQ_REG_PF_USAGE_CNT = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_DB_REC_INTERVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [72 x i8] c"DB recovery: doorbell usage failed to zero after %d usec. usage was %x\0A\00", align 1
@ECORE_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@DORQ_REG_DPM_FORCE_ABORT = dso_local local_unnamed_addr global i32 0, align 4
@DORQ_REG_PF_OVFL_STICKY = dso_local local_unnamed_addr global i32 0, align 4
@DB_REC_REAL_DEAL = dso_local local_unnamed_addr global i32 0, align 4
@ECORE_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ecore_db_rec_attn], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ecore_db_rec_attn(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ECORE_DB_REC_COUNT, align 4, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %7, %5 ], [ %3, %2 ]
%7 = add nsw i32 %6, -1
%8 = load i32, ptr @DORQ_REG_PF_USAGE_CNT, align 4, !tbaa !5
%9 = tail call i32 @ecore_rd(ptr noundef %0, ptr noundef %1, i32 noundef %8) #2
%10 = load i32, ptr @ECORE_DB_REC_INTERVAL, align 4, !tbaa !5
%11 = tail call i32 @OSAL_UDELAY(i32 noundef %10) #2
%12 = icmp ne i32 %7, 0
%13 = icmp ne i32 %9, 0
%14 = select i1 %12, i1 %13, i1 false
br i1 %14, label %5, label %15, !llvm.loop !9
15: ; preds = %5
br i1 %13, label %16, label %23
16: ; preds = %2, %15
%17 = phi i32 [ %9, %15 ], [ 1, %2 ]
%18 = load i32, ptr %0, align 4, !tbaa !11
%19 = load i32, ptr @ECORE_DB_REC_INTERVAL, align 4, !tbaa !5
%20 = load i32, ptr @ECORE_DB_REC_COUNT, align 4, !tbaa !5
%21 = mul nsw i32 %20, %19
%22 = tail call i32 @DP_NOTICE(i32 noundef %18, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %21, i32 noundef %17) #2
br label %30
23: ; preds = %15
%24 = load i32, ptr @DORQ_REG_DPM_FORCE_ABORT, align 4, !tbaa !5
%25 = tail call i32 @ecore_wr(ptr noundef %0, ptr noundef %1, i32 noundef %24, i32 noundef 1) #2
%26 = load i32, ptr @DORQ_REG_PF_OVFL_STICKY, align 4, !tbaa !5
%27 = tail call i32 @ecore_wr(ptr noundef %0, ptr noundef %1, i32 noundef %26, i32 noundef 0) #2
%28 = load i32, ptr @DB_REC_REAL_DEAL, align 4, !tbaa !5
%29 = tail call i32 @ecore_db_recovery_execute(ptr noundef %0, i32 noundef %28) #2
br label %30
30: ; preds = %23, %16
%31 = phi ptr [ @ECORE_TIMEOUT, %16 ], [ @ECORE_SUCCESS, %23 ]
%32 = load i32, ptr %31, align 4, !tbaa !5
ret i32 %32
}
declare i32 @ecore_rd(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @OSAL_UDELAY(i32 noundef) local_unnamed_addr #1
declare i32 @DP_NOTICE(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_wr(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_db_recovery_execute(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !6, i64 0}
!12 = !{!"ecore_hwfn", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_int.c_ecore_db_rec_attn.c'
source_filename = "AnghaBench/freebsd/sys/dev/qlnx/qlnxe/extr_ecore_int.c_ecore_db_rec_attn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ECORE_DB_REC_COUNT = common local_unnamed_addr global i32 0, align 4
@DORQ_REG_PF_USAGE_CNT = common local_unnamed_addr global i32 0, align 4
@ECORE_DB_REC_INTERVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [72 x i8] c"DB recovery: doorbell usage failed to zero after %d usec. usage was %x\0A\00", align 1
@ECORE_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@DORQ_REG_DPM_FORCE_ABORT = common local_unnamed_addr global i32 0, align 4
@DORQ_REG_PF_OVFL_STICKY = common local_unnamed_addr global i32 0, align 4
@DB_REC_REAL_DEAL = common local_unnamed_addr global i32 0, align 4
@ECORE_SUCCESS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ecore_db_rec_attn], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ecore_db_rec_attn(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ECORE_DB_REC_COUNT, align 4, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %7, %5 ], [ %3, %2 ]
%7 = add nsw i32 %6, -1
%8 = load i32, ptr @DORQ_REG_PF_USAGE_CNT, align 4, !tbaa !6
%9 = tail call i32 @ecore_rd(ptr noundef %0, ptr noundef %1, i32 noundef %8) #2
%10 = load i32, ptr @ECORE_DB_REC_INTERVAL, align 4, !tbaa !6
%11 = tail call i32 @OSAL_UDELAY(i32 noundef %10) #2
%12 = icmp ne i32 %7, 0
%13 = icmp ne i32 %9, 0
%14 = select i1 %12, i1 %13, i1 false
br i1 %14, label %5, label %15, !llvm.loop !10
15: ; preds = %5
br i1 %13, label %16, label %23
16: ; preds = %2, %15
%17 = phi i32 [ %9, %15 ], [ 1, %2 ]
%18 = load i32, ptr %0, align 4, !tbaa !12
%19 = load i32, ptr @ECORE_DB_REC_INTERVAL, align 4, !tbaa !6
%20 = load i32, ptr @ECORE_DB_REC_COUNT, align 4, !tbaa !6
%21 = mul nsw i32 %20, %19
%22 = tail call i32 @DP_NOTICE(i32 noundef %18, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %21, i32 noundef %17) #2
br label %30
23: ; preds = %15
%24 = load i32, ptr @DORQ_REG_DPM_FORCE_ABORT, align 4, !tbaa !6
%25 = tail call i32 @ecore_wr(ptr noundef %0, ptr noundef %1, i32 noundef %24, i32 noundef 1) #2
%26 = load i32, ptr @DORQ_REG_PF_OVFL_STICKY, align 4, !tbaa !6
%27 = tail call i32 @ecore_wr(ptr noundef %0, ptr noundef %1, i32 noundef %26, i32 noundef 0) #2
%28 = load i32, ptr @DB_REC_REAL_DEAL, align 4, !tbaa !6
%29 = tail call i32 @ecore_db_recovery_execute(ptr noundef %0, i32 noundef %28) #2
br label %30
30: ; preds = %23, %16
%31 = phi ptr [ @ECORE_TIMEOUT, %16 ], [ @ECORE_SUCCESS, %23 ]
%32 = load i32, ptr %31, align 4, !tbaa !6
ret i32 %32
}
declare i32 @ecore_rd(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @OSAL_UDELAY(i32 noundef) local_unnamed_addr #1
declare i32 @DP_NOTICE(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_wr(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ecore_db_recovery_execute(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !7, i64 0}
!13 = !{!"ecore_hwfn", !7, i64 0}
| freebsd_sys_dev_qlnx_qlnxe_extr_ecore_int.c_ecore_db_rec_attn |
; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalDropUserMappingStmt.c'
source_filename = "AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalDropUserMappingStmt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@user = dso_local local_unnamed_addr global i32 0, align 4
@servername = dso_local local_unnamed_addr global i32 0, align 4
@missing_ok = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @_equalDropUserMappingStmt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @_equalDropUserMappingStmt(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @user, align 4, !tbaa !5
%4 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %3) #2
%5 = load i32, ptr @servername, align 4, !tbaa !5
%6 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %5) #2
%7 = load i32, ptr @missing_ok, align 4, !tbaa !5
%8 = tail call i32 @COMPARE_SCALAR_FIELD(i32 noundef %7) #2
ret i32 1
}
declare i32 @COMPARE_NODE_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_STRING_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_SCALAR_FIELD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalDropUserMappingStmt.c'
source_filename = "AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalDropUserMappingStmt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@user = common local_unnamed_addr global i32 0, align 4
@servername = common local_unnamed_addr global i32 0, align 4
@missing_ok = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @_equalDropUserMappingStmt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @_equalDropUserMappingStmt(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @user, align 4, !tbaa !6
%4 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %3) #2
%5 = load i32, ptr @servername, align 4, !tbaa !6
%6 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %5) #2
%7 = load i32, ptr @missing_ok, align 4, !tbaa !6
%8 = tail call i32 @COMPARE_SCALAR_FIELD(i32 noundef %7) #2
ret i32 1
}
declare i32 @COMPARE_NODE_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_STRING_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_SCALAR_FIELD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| postgres_src_backend_nodes_extr_equalfuncs.c__equalDropUserMappingStmt |
; ModuleID = 'AnghaBench/libsodium/src/libsodium/crypto_stream/salsa2012/extr_stream_salsa2012.c_crypto_stream_salsa2012_noncebytes.c'
source_filename = "AnghaBench/libsodium/src/libsodium/crypto_stream/salsa2012/extr_stream_salsa2012.c_crypto_stream_salsa2012_noncebytes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@crypto_stream_salsa2012_NONCEBYTES = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i64 @crypto_stream_salsa2012_noncebytes() local_unnamed_addr #0 {
%1 = load i64, ptr @crypto_stream_salsa2012_NONCEBYTES, align 8, !tbaa !5
ret i64 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/libsodium/src/libsodium/crypto_stream/salsa2012/extr_stream_salsa2012.c_crypto_stream_salsa2012_noncebytes.c'
source_filename = "AnghaBench/libsodium/src/libsodium/crypto_stream/salsa2012/extr_stream_salsa2012.c_crypto_stream_salsa2012_noncebytes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@crypto_stream_salsa2012_NONCEBYTES = common local_unnamed_addr global i64 0, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i64 @crypto_stream_salsa2012_noncebytes() local_unnamed_addr #0 {
%1 = load i64, ptr @crypto_stream_salsa2012_NONCEBYTES, align 8, !tbaa !6
ret i64 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| libsodium_src_libsodium_crypto_stream_salsa2012_extr_stream_salsa2012.c_crypto_stream_salsa2012_noncebytes |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_amdkfd_arcturus.c_get_amdgpu_device.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_amdkfd_arcturus.c_get_amdgpu_device.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_amdgpu_device], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef ptr @get_amdgpu_device(ptr noundef readnone returned %0) #0 {
ret ptr %0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_amdkfd_arcturus.c_get_amdgpu_device.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_amdkfd_arcturus.c_get_amdgpu_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @get_amdgpu_device], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef ptr @get_amdgpu_device(ptr noundef readnone returned %0) #0 {
ret ptr %0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_amd_amdgpu_extr_amdgpu_amdkfd_arcturus.c_get_amdgpu_device |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/stmicro/stmmac/extr_stmmac_main.c_stmmac_tx_timeout.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/stmicro/stmmac/extr_stmmac_main.c_stmmac_tx_timeout.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @stmmac_tx_timeout], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @stmmac_tx_timeout(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = tail call i32 @stmmac_global_err(ptr noundef %2) #2
ret void
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @stmmac_global_err(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/stmicro/stmmac/extr_stmmac_main.c_stmmac_tx_timeout.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/stmicro/stmmac/extr_stmmac_main.c_stmmac_tx_timeout.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @stmmac_tx_timeout], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @stmmac_tx_timeout(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = tail call i32 @stmmac_global_err(ptr noundef %2) #2
ret void
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @stmmac_global_err(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_ethernet_stmicro_stmmac_extr_stmmac_main.c_stmmac_tx_timeout |
; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_fsl-imx25-tsadc.c_mx25_tsadc_remove.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_fsl-imx25-tsadc.c_mx25_tsadc_remove.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mx25_tsadc_remove], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @mx25_tsadc_remove(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = tail call i32 @platform_get_irq(ptr noundef %0, i32 noundef 0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = tail call i32 @irq_set_chained_handler_and_data(i32 noundef %3, ptr noundef null, ptr noundef null) #2
%7 = load i32, ptr %2, align 4, !tbaa !5
%8 = tail call i32 @irq_domain_remove(i32 noundef %7) #2
br label %9
9: ; preds = %5, %1
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @irq_set_chained_handler_and_data(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @irq_domain_remove(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mx25_tsadc", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/mfd/extr_fsl-imx25-tsadc.c_mx25_tsadc_remove.c'
source_filename = "AnghaBench/linux/drivers/mfd/extr_fsl-imx25-tsadc.c_mx25_tsadc_remove.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mx25_tsadc_remove], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @mx25_tsadc_remove(ptr noundef %0) #0 {
%2 = tail call ptr @platform_get_drvdata(ptr noundef %0) #2
%3 = tail call i32 @platform_get_irq(ptr noundef %0, i32 noundef 0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = tail call i32 @irq_set_chained_handler_and_data(i32 noundef %3, ptr noundef null, ptr noundef null) #2
%7 = load i32, ptr %2, align 4, !tbaa !6
%8 = tail call i32 @irq_domain_remove(i32 noundef %7) #2
br label %9
9: ; preds = %5, %1
ret i32 0
}
declare ptr @platform_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @irq_set_chained_handler_and_data(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @irq_domain_remove(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mx25_tsadc", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_mfd_extr_fsl-imx25-tsadc.c_mx25_tsadc_remove |
; ModuleID = 'AnghaBench/linux/net/dccp/ccids/lib/extr_....dccp.h_dccp_hdr_set_seq.c'
source_filename = "AnghaBench/linux/net/dccp/ccids/lib/extr_....dccp.h_dccp_hdr_set_seq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dccp_hdr = type { i32, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @dccp_hdr_set_seq], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @dccp_hdr_set_seq(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = getelementptr inbounds %struct.dccp_hdr, ptr %0, i64 0, i32 1
store i64 0, ptr %4, align 8, !tbaa !5
%5 = tail call i32 @htons(i32 noundef poison) #3
store i32 %5, ptr %0, align 8, !tbaa !11
%6 = tail call i32 @htonl(i32 noundef %1)
store i32 %6, ptr %3, align 4, !tbaa !12
ret void
}
declare i32 @htons(i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #2
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nosync nounwind memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"dccp_hdr", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"dccp_hdr_ext", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/dccp/ccids/lib/extr_....dccp.h_dccp_hdr_set_seq.c'
source_filename = "AnghaBench/linux/net/dccp/ccids/lib/extr_....dccp.h_dccp_hdr_set_seq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dccp_hdr_set_seq], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @dccp_hdr_set_seq(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = getelementptr inbounds i8, ptr %0, i64 8
store i64 0, ptr %4, align 8, !tbaa !6
%5 = tail call i32 @htons(i32 noundef poison) #3
store i32 %5, ptr %0, align 8, !tbaa !12
%6 = tail call i32 @htonl(i32 noundef %1)
store i32 %6, ptr %3, align 4, !tbaa !13
ret void
}
declare i32 @htons(i32 noundef) local_unnamed_addr #1
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #2
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nosync nounwind memory(none) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dccp_hdr", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"dccp_hdr_ext", !8, i64 0}
| linux_net_dccp_ccids_lib_extr_....dccp.h_dccp_hdr_set_seq |
; ModuleID = 'AnghaBench/sqlcipher/src/extr_vdbeaux.c_sqlite3VdbeFrameDelete.c'
source_filename = "AnghaBench/sqlcipher/src/extr_vdbeaux.c_sqlite3VdbeFrameDelete.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { i64, i32, ptr, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @sqlite3VdbeFrameDelete(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @VdbeFrameMem(ptr noundef %0) #2
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = getelementptr inbounds i32, ptr %2, i64 %3
%5 = tail call i32 @sqlite3VdbeFrameIsValid(ptr noundef nonnull %0) #2
%6 = tail call i32 @assert(i32 noundef %5) #2
%7 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %1
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
br label %12
12: ; preds = %10, %12
%13 = phi i64 [ 0, %10 ], [ %18, %12 ]
%14 = load ptr, ptr %11, align 8, !tbaa !13
%15 = getelementptr inbounds ptr, ptr %4, i64 %13
%16 = load ptr, ptr %15, align 8, !tbaa !14
%17 = tail call i32 @sqlite3VdbeFreeCursor(ptr noundef %14, ptr noundef %16) #2
%18 = add nuw nsw i64 %13, 1
%19 = load i32, ptr %7, align 8, !tbaa !12
%20 = sext i32 %19 to i64
%21 = icmp slt i64 %18, %20
br i1 %21, label %12, label %22, !llvm.loop !15
22: ; preds = %12, %1
%23 = load i64, ptr %0, align 8, !tbaa !5
%24 = tail call i32 @releaseMemArray(ptr noundef %2, i64 noundef %23) #2
%25 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
%26 = load ptr, ptr %25, align 8, !tbaa !13
%27 = load i32, ptr %26, align 4, !tbaa !17
%28 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 3
%29 = tail call i32 @sqlite3VdbeDeleteAuxData(i32 noundef %27, ptr noundef nonnull %28, i32 noundef -1, i32 noundef 0) #2
%30 = load ptr, ptr %25, align 8, !tbaa !13
%31 = load i32, ptr %30, align 4, !tbaa !17
%32 = tail call i32 @sqlite3DbFree(i32 noundef %31, ptr noundef nonnull %0) #2
ret void
}
declare ptr @VdbeFrameMem(ptr noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3VdbeFrameIsValid(ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3VdbeFreeCursor(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @releaseMemArray(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @sqlite3VdbeDeleteAuxData(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3DbFree(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0, !10, i64 8, !11, i64 16, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !11, i64 16}
!14 = !{!11, !11, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !10, i64 0}
!18 = !{!"TYPE_8__", !10, i64 0}
| ; ModuleID = 'AnghaBench/sqlcipher/src/extr_vdbeaux.c_sqlite3VdbeFrameDelete.c'
source_filename = "AnghaBench/sqlcipher/src/extr_vdbeaux.c_sqlite3VdbeFrameDelete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @sqlite3VdbeFrameDelete(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @VdbeFrameMem(ptr noundef %0) #2
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = getelementptr inbounds i32, ptr %2, i64 %3
%5 = tail call i32 @sqlite3VdbeFrameIsValid(ptr noundef nonnull %0) #2
%6 = tail call i32 @assert(i32 noundef %5) #2
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !13
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %1
%11 = getelementptr inbounds i8, ptr %0, i64 16
br label %12
12: ; preds = %10, %12
%13 = phi i64 [ 0, %10 ], [ %18, %12 ]
%14 = load ptr, ptr %11, align 8, !tbaa !14
%15 = getelementptr inbounds ptr, ptr %4, i64 %13
%16 = load ptr, ptr %15, align 8, !tbaa !15
%17 = tail call i32 @sqlite3VdbeFreeCursor(ptr noundef %14, ptr noundef %16) #2
%18 = add nuw nsw i64 %13, 1
%19 = load i32, ptr %7, align 8, !tbaa !13
%20 = sext i32 %19 to i64
%21 = icmp slt i64 %18, %20
br i1 %21, label %12, label %22, !llvm.loop !16
22: ; preds = %12, %1
%23 = load i64, ptr %0, align 8, !tbaa !6
%24 = tail call i32 @releaseMemArray(ptr noundef %2, i64 noundef %23) #2
%25 = getelementptr inbounds i8, ptr %0, i64 16
%26 = load ptr, ptr %25, align 8, !tbaa !14
%27 = load i32, ptr %26, align 4, !tbaa !18
%28 = getelementptr inbounds i8, ptr %0, i64 24
%29 = tail call i32 @sqlite3VdbeDeleteAuxData(i32 noundef %27, ptr noundef nonnull %28, i32 noundef -1, i32 noundef 0) #2
%30 = load ptr, ptr %25, align 8, !tbaa !14
%31 = load i32, ptr %30, align 4, !tbaa !18
%32 = tail call i32 @sqlite3DbFree(i32 noundef %31, ptr noundef nonnull %0) #2
ret void
}
declare ptr @VdbeFrameMem(ptr noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3VdbeFrameIsValid(ptr noundef) local_unnamed_addr #1
declare i32 @sqlite3VdbeFreeCursor(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @releaseMemArray(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @sqlite3VdbeDeleteAuxData(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqlite3DbFree(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8, !12, i64 16, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !12, i64 16}
!15 = !{!12, !12, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!19, !11, i64 0}
!19 = !{!"TYPE_8__", !11, i64 0}
| sqlcipher_src_extr_vdbeaux.c_sqlite3VdbeFrameDelete |
; ModuleID = 'AnghaBench/linux/net/mac80211/extr_mesh_ps.c_ieee80211_mps_set_sta_local_pm.c'
source_filename = "AnghaBench/linux/net/mac80211/extr_mesh_ps.c_ieee80211_mps_set_sta_local_pm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sta_info = type { ptr, %struct.TYPE_3__, ptr }
%struct.TYPE_3__ = type { i32 }
%struct.TYPE_4__ = type { i32, i64 }
@.str = private unnamed_addr constant [40 x i8] c"local STA operates in mode %d with %pM\0A\00", align 1
@NL80211_PLINK_ESTAB = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @ieee80211_mps_set_sta_local_pm(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.sta_info, ptr %0, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %0, align 8, !tbaa !12
%6 = load i32, ptr %5, align 8, !tbaa !13
%7 = icmp eq i32 %6, %1
br i1 %7, label %21, label %8
8: ; preds = %2
%9 = getelementptr inbounds %struct.sta_info, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 8, !tbaa !16
%11 = tail call i32 @mps_dbg(ptr noundef %4, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %10) #2
%12 = load ptr, ptr %0, align 8, !tbaa !12
store i32 %1, ptr %12, align 8, !tbaa !13
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %12, i64 0, i32 1
%14 = load i64, ptr %13, align 8, !tbaa !17
%15 = load i64, ptr @NL80211_PLINK_ESTAB, align 8, !tbaa !18
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %8
%18 = tail call i32 @mps_qos_null_tx(ptr noundef nonnull %0) #2
br label %19
19: ; preds = %17, %8
%20 = tail call i32 @ieee80211_mps_local_status_update(ptr noundef %4) #2
br label %21
21: ; preds = %2, %19
%22 = phi i32 [ %20, %19 ], [ 0, %2 ]
ret i32 %22
}
declare i32 @mps_dbg(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mps_qos_null_tx(ptr noundef) local_unnamed_addr #1
declare i32 @ieee80211_mps_local_status_update(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"sta_info", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_4__", !11, i64 0, !15, i64 8}
!15 = !{!"long", !8, i64 0}
!16 = !{!6, !11, i64 8}
!17 = !{!14, !15, i64 8}
!18 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/mac80211/extr_mesh_ps.c_ieee80211_mps_set_sta_local_pm.c'
source_filename = "AnghaBench/linux/net/mac80211/extr_mesh_ps.c_ieee80211_mps_set_sta_local_pm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [40 x i8] c"local STA operates in mode %d with %pM\0A\00", align 1
@NL80211_PLINK_ESTAB = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ieee80211_mps_set_sta_local_pm(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %0, align 8, !tbaa !13
%6 = load i32, ptr %5, align 8, !tbaa !14
%7 = icmp eq i32 %6, %1
br i1 %7, label %21, label %8
8: ; preds = %2
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !17
%11 = tail call i32 @mps_dbg(ptr noundef %4, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %10) #2
%12 = load ptr, ptr %0, align 8, !tbaa !13
store i32 %1, ptr %12, align 8, !tbaa !14
%13 = getelementptr inbounds i8, ptr %12, i64 8
%14 = load i64, ptr %13, align 8, !tbaa !18
%15 = load i64, ptr @NL80211_PLINK_ESTAB, align 8, !tbaa !19
%16 = icmp eq i64 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %8
%18 = tail call i32 @mps_qos_null_tx(ptr noundef nonnull %0) #2
br label %19
19: ; preds = %17, %8
%20 = tail call i32 @ieee80211_mps_local_status_update(ptr noundef %4) #2
br label %21
21: ; preds = %2, %19
%22 = phi i32 [ %20, %19 ], [ 0, %2 ]
ret i32 %22
}
declare i32 @mps_dbg(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mps_qos_null_tx(ptr noundef) local_unnamed_addr #1
declare i32 @ieee80211_mps_local_status_update(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"sta_info", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_4__", !12, i64 0, !16, i64 8}
!16 = !{!"long", !9, i64 0}
!17 = !{!7, !12, i64 8}
!18 = !{!15, !16, i64 8}
!19 = !{!16, !16, i64 0}
| linux_net_mac80211_extr_mesh_ps.c_ieee80211_mps_set_sta_local_pm |
; ModuleID = 'AnghaBench/linux/fs/ubifs/extr_tnc_commit.c_find_next_dirty.c'
source_filename = "AnghaBench/linux/fs/ubifs/extr_tnc_commit.c_find_next_dirty.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ubifs_znode = type { i32, i32, ptr, ptr }
%struct.ubifs_zbranch = type { i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @find_next_dirty], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @find_next_dirty(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.ubifs_znode, ptr %0, i64 0, i32 3
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %36, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !11
%7 = getelementptr inbounds %struct.ubifs_znode, ptr %3, i64 0, i32 1
%8 = add nsw i32 %6, 1
%9 = load i32, ptr %7, align 4, !tbaa !12
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %36
11: ; preds = %5
%12 = getelementptr inbounds %struct.ubifs_znode, ptr %3, i64 0, i32 2
%13 = sext i32 %6 to i64
%14 = add nsw i64 %13, 1
br label %15
15: ; preds = %11, %31
%16 = phi i32 [ %9, %11 ], [ %32, %31 ]
%17 = phi i64 [ %14, %11 ], [ %33, %31 ]
%18 = load ptr, ptr %12, align 8, !tbaa !13
%19 = getelementptr inbounds %struct.ubifs_zbranch, ptr %18, i64 %17
%20 = load i64, ptr %19, align 8, !tbaa !14
%21 = icmp eq i64 %20, 0
br i1 %21, label %31, label %22
22: ; preds = %15
%23 = tail call i64 @ubifs_zn_dirty(i64 noundef %20) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %27
25: ; preds = %22
%26 = load i32, ptr %7, align 4, !tbaa !12
br label %31
27: ; preds = %22
%28 = getelementptr inbounds %struct.ubifs_zbranch, ptr %18, i64 %17
%29 = load i64, ptr %28, align 8, !tbaa !14
%30 = tail call ptr @find_first_dirty(i64 noundef %29) #2
br label %36
31: ; preds = %25, %15
%32 = phi i32 [ %26, %25 ], [ %16, %15 ]
%33 = add nsw i64 %17, 1
%34 = sext i32 %32 to i64
%35 = icmp slt i64 %33, %34
br i1 %35, label %15, label %36, !llvm.loop !17
36: ; preds = %31, %5, %27, %1
%37 = phi ptr [ null, %1 ], [ %30, %27 ], [ %3, %5 ], [ %3, %31 ]
ret ptr %37
}
declare i64 @ubifs_zn_dirty(i64 noundef) local_unnamed_addr #1
declare ptr @find_first_dirty(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"ubifs_znode", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !16, i64 0}
!15 = !{!"ubifs_zbranch", !16, i64 0}
!16 = !{!"long", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/fs/ubifs/extr_tnc_commit.c_find_next_dirty.c'
source_filename = "AnghaBench/linux/fs/ubifs/extr_tnc_commit.c_find_next_dirty.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ubifs_zbranch = type { i64 }
@llvm.used = appending global [1 x ptr] [ptr @find_next_dirty], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @find_next_dirty(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %36, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !12
%7 = getelementptr inbounds i8, ptr %3, i64 4
%8 = add nsw i32 %6, 1
%9 = load i32, ptr %7, align 4, !tbaa !13
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %36
11: ; preds = %5
%12 = getelementptr inbounds i8, ptr %3, i64 8
%13 = sext i32 %6 to i64
%14 = add nsw i64 %13, 1
br label %15
15: ; preds = %11, %31
%16 = phi i32 [ %9, %11 ], [ %32, %31 ]
%17 = phi i64 [ %14, %11 ], [ %33, %31 ]
%18 = load ptr, ptr %12, align 8, !tbaa !14
%19 = getelementptr inbounds %struct.ubifs_zbranch, ptr %18, i64 %17
%20 = load i64, ptr %19, align 8, !tbaa !15
%21 = icmp eq i64 %20, 0
br i1 %21, label %31, label %22
22: ; preds = %15
%23 = tail call i64 @ubifs_zn_dirty(i64 noundef %20) #2
%24 = icmp eq i64 %23, 0
br i1 %24, label %25, label %27
25: ; preds = %22
%26 = load i32, ptr %7, align 4, !tbaa !13
br label %31
27: ; preds = %22
%28 = getelementptr inbounds %struct.ubifs_zbranch, ptr %18, i64 %17
%29 = load i64, ptr %28, align 8, !tbaa !15
%30 = tail call ptr @find_first_dirty(i64 noundef %29) #2
br label %36
31: ; preds = %25, %15
%32 = phi i32 [ %26, %25 ], [ %16, %15 ]
%33 = add nsw i64 %17, 1
%34 = sext i32 %32 to i64
%35 = icmp slt i64 %33, %34
br i1 %35, label %15, label %36, !llvm.loop !18
36: ; preds = %31, %5, %27, %1
%37 = phi ptr [ null, %1 ], [ %30, %27 ], [ %3, %5 ], [ %3, %31 ]
ret ptr %37
}
declare i64 @ubifs_zn_dirty(i64 noundef) local_unnamed_addr #1
declare ptr @find_first_dirty(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"ubifs_znode", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !17, i64 0}
!16 = !{!"ubifs_zbranch", !17, i64 0}
!17 = !{!"long", !9, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
| linux_fs_ubifs_extr_tnc_commit.c_find_next_dirty |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/omap3isp/extr_ispccdc.c_ccdc_apply_controls.c'
source_filename = "AnghaBench/linux/drivers/media/platform/omap3isp/extr_ispccdc.c_ccdc_apply_controls.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@OMAP3ISP_CCDC_ALAW = dso_local local_unnamed_addr global i32 0, align 4
@OMAP3ISP_CCDC_LPF = dso_local local_unnamed_addr global i32 0, align 4
@OMAP3ISP_CCDC_BLCLAMP = dso_local local_unnamed_addr global i32 0, align 4
@OMAP3ISP_CCDC_BCOMP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ccdc_apply_controls], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ccdc_apply_controls(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = load i32, ptr @OMAP3ISP_CCDC_ALAW, align 4, !tbaa !10
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = tail call i32 @ccdc_configure_alaw(ptr noundef nonnull %0) #2
%8 = load i32, ptr @OMAP3ISP_CCDC_ALAW, align 4, !tbaa !10
%9 = xor i32 %8, -1
%10 = load i32, ptr %0, align 4, !tbaa !5
%11 = and i32 %10, %9
store i32 %11, ptr %0, align 4, !tbaa !5
br label %12
12: ; preds = %6, %1
%13 = phi i32 [ %11, %6 ], [ %2, %1 ]
%14 = load i32, ptr @OMAP3ISP_CCDC_LPF, align 4, !tbaa !10
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %23, label %17
17: ; preds = %12
%18 = tail call i32 @ccdc_configure_lpf(ptr noundef nonnull %0) #2
%19 = load i32, ptr @OMAP3ISP_CCDC_LPF, align 4, !tbaa !10
%20 = xor i32 %19, -1
%21 = load i32, ptr %0, align 4, !tbaa !5
%22 = and i32 %21, %20
store i32 %22, ptr %0, align 4, !tbaa !5
br label %23
23: ; preds = %17, %12
%24 = phi i32 [ %22, %17 ], [ %13, %12 ]
%25 = load i32, ptr @OMAP3ISP_CCDC_BLCLAMP, align 4, !tbaa !10
%26 = and i32 %25, %24
%27 = icmp eq i32 %26, 0
br i1 %27, label %34, label %28
28: ; preds = %23
%29 = tail call i32 @ccdc_configure_clamp(ptr noundef nonnull %0) #2
%30 = load i32, ptr @OMAP3ISP_CCDC_BLCLAMP, align 4, !tbaa !10
%31 = xor i32 %30, -1
%32 = load i32, ptr %0, align 4, !tbaa !5
%33 = and i32 %32, %31
store i32 %33, ptr %0, align 4, !tbaa !5
br label %34
34: ; preds = %28, %23
%35 = phi i32 [ %33, %28 ], [ %24, %23 ]
%36 = load i32, ptr @OMAP3ISP_CCDC_BCOMP, align 4, !tbaa !10
%37 = and i32 %36, %35
%38 = icmp eq i32 %37, 0
br i1 %38, label %45, label %39
39: ; preds = %34
%40 = tail call i32 @ccdc_configure_black_comp(ptr noundef nonnull %0) #2
%41 = load i32, ptr @OMAP3ISP_CCDC_BCOMP, align 4, !tbaa !10
%42 = xor i32 %41, -1
%43 = load i32, ptr %0, align 4, !tbaa !5
%44 = and i32 %43, %42
store i32 %44, ptr %0, align 4, !tbaa !5
br label %45
45: ; preds = %39, %34
ret void
}
declare i32 @ccdc_configure_alaw(ptr noundef) local_unnamed_addr #1
declare i32 @ccdc_configure_lpf(ptr noundef) local_unnamed_addr #1
declare i32 @ccdc_configure_clamp(ptr noundef) local_unnamed_addr #1
declare i32 @ccdc_configure_black_comp(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"isp_ccdc_device", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/omap3isp/extr_ispccdc.c_ccdc_apply_controls.c'
source_filename = "AnghaBench/linux/drivers/media/platform/omap3isp/extr_ispccdc.c_ccdc_apply_controls.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OMAP3ISP_CCDC_ALAW = common local_unnamed_addr global i32 0, align 4
@OMAP3ISP_CCDC_LPF = common local_unnamed_addr global i32 0, align 4
@OMAP3ISP_CCDC_BLCLAMP = common local_unnamed_addr global i32 0, align 4
@OMAP3ISP_CCDC_BCOMP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ccdc_apply_controls], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ccdc_apply_controls(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @OMAP3ISP_CCDC_ALAW, align 4, !tbaa !11
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = tail call i32 @ccdc_configure_alaw(ptr noundef nonnull %0) #2
%8 = load i32, ptr @OMAP3ISP_CCDC_ALAW, align 4, !tbaa !11
%9 = xor i32 %8, -1
%10 = load i32, ptr %0, align 4, !tbaa !6
%11 = and i32 %10, %9
store i32 %11, ptr %0, align 4, !tbaa !6
br label %12
12: ; preds = %6, %1
%13 = phi i32 [ %11, %6 ], [ %2, %1 ]
%14 = load i32, ptr @OMAP3ISP_CCDC_LPF, align 4, !tbaa !11
%15 = and i32 %14, %13
%16 = icmp eq i32 %15, 0
br i1 %16, label %23, label %17
17: ; preds = %12
%18 = tail call i32 @ccdc_configure_lpf(ptr noundef nonnull %0) #2
%19 = load i32, ptr @OMAP3ISP_CCDC_LPF, align 4, !tbaa !11
%20 = xor i32 %19, -1
%21 = load i32, ptr %0, align 4, !tbaa !6
%22 = and i32 %21, %20
store i32 %22, ptr %0, align 4, !tbaa !6
br label %23
23: ; preds = %17, %12
%24 = phi i32 [ %22, %17 ], [ %13, %12 ]
%25 = load i32, ptr @OMAP3ISP_CCDC_BLCLAMP, align 4, !tbaa !11
%26 = and i32 %25, %24
%27 = icmp eq i32 %26, 0
br i1 %27, label %34, label %28
28: ; preds = %23
%29 = tail call i32 @ccdc_configure_clamp(ptr noundef nonnull %0) #2
%30 = load i32, ptr @OMAP3ISP_CCDC_BLCLAMP, align 4, !tbaa !11
%31 = xor i32 %30, -1
%32 = load i32, ptr %0, align 4, !tbaa !6
%33 = and i32 %32, %31
store i32 %33, ptr %0, align 4, !tbaa !6
br label %34
34: ; preds = %28, %23
%35 = phi i32 [ %33, %28 ], [ %24, %23 ]
%36 = load i32, ptr @OMAP3ISP_CCDC_BCOMP, align 4, !tbaa !11
%37 = and i32 %36, %35
%38 = icmp eq i32 %37, 0
br i1 %38, label %45, label %39
39: ; preds = %34
%40 = tail call i32 @ccdc_configure_black_comp(ptr noundef nonnull %0) #2
%41 = load i32, ptr @OMAP3ISP_CCDC_BCOMP, align 4, !tbaa !11
%42 = xor i32 %41, -1
%43 = load i32, ptr %0, align 4, !tbaa !6
%44 = and i32 %43, %42
store i32 %44, ptr %0, align 4, !tbaa !6
br label %45
45: ; preds = %39, %34
ret void
}
declare i32 @ccdc_configure_alaw(ptr noundef) local_unnamed_addr #1
declare i32 @ccdc_configure_lpf(ptr noundef) local_unnamed_addr #1
declare i32 @ccdc_configure_clamp(ptr noundef) local_unnamed_addr #1
declare i32 @ccdc_configure_black_comp(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"isp_ccdc_device", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_media_platform_omap3isp_extr_ispccdc.c_ccdc_apply_controls |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_hpread.c_hpread_call_pxdb.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_hpread.c_hpread_call_pxdb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PXDB_SVR4 = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [2 x i8] c" \00", align 1
@.str.1 = private unnamed_addr constant [51 x i8] c"File not processed by pxdb--about to process now.\0A\00", align 1
@.str.2 = private unnamed_addr constant [231 x i8] c"pxdb not found at standard location: /opt/langtools/bin\0Agdb will not be able to debug %s.\0APlease install pxdb at the above location and then restart gdb.\0AYou can also run pxdb on %s with the command\0A\22pxdb %s\22 and then restart gdb.\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @hpread_call_pxdb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @hpread_call_pxdb(ptr noundef %0) #0 {
%2 = load ptr, ptr @PXDB_SVR4, align 8, !tbaa !5
%3 = tail call i64 @file_exists(ptr noundef %2) #4
%4 = icmp eq i64 %3, 0
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load ptr, ptr @PXDB_SVR4, align 8, !tbaa !5
%7 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %6)
%8 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %0)
%9 = add i64 %7, 2
%10 = add i64 %9, %8
%11 = tail call ptr @xmalloc(i64 noundef %10) #4
%12 = load ptr, ptr @PXDB_SVR4, align 8, !tbaa !5
%13 = tail call i32 @strcpy(ptr noundef %11, ptr noundef %12) #4
%14 = tail call i32 @strcat(ptr noundef %11, ptr noundef nonnull @.str) #4
%15 = tail call i32 @strcat(ptr noundef %11, ptr noundef %0) #4
%16 = tail call i32 (ptr, ...) @warning(ptr noundef nonnull @.str.1) #4
%17 = tail call i32 @system(ptr noundef %11) #4
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
br label %22
20: ; preds = %1
%21 = tail call i32 (ptr, ...) @warning(ptr noundef nonnull @.str.2, ptr noundef %0, ptr noundef %0, ptr noundef %0) #4
br label %22
22: ; preds = %20, %5
%23 = phi i32 [ %19, %5 ], [ 0, %20 ]
ret i32 %23
}
declare i64 @file_exists(ptr noundef) local_unnamed_addr #1
declare ptr @xmalloc(i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @strcat(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @warning(ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: nofree
declare noundef i32 @system(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_hpread.c_hpread_call_pxdb.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_hpread.c_hpread_call_pxdb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PXDB_SVR4 = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [2 x i8] c" \00", align 1
@.str.1 = private unnamed_addr constant [51 x i8] c"File not processed by pxdb--about to process now.\0A\00", align 1
@.str.2 = private unnamed_addr constant [231 x i8] c"pxdb not found at standard location: /opt/langtools/bin\0Agdb will not be able to debug %s.\0APlease install pxdb at the above location and then restart gdb.\0AYou can also run pxdb on %s with the command\0A\22pxdb %s\22 and then restart gdb.\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @hpread_call_pxdb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @hpread_call_pxdb(ptr noundef %0) #0 {
%2 = load ptr, ptr @PXDB_SVR4, align 8, !tbaa !6
%3 = tail call i64 @file_exists(ptr noundef %2) #4
%4 = icmp eq i64 %3, 0
br i1 %4, label %20, label %5
5: ; preds = %1
%6 = load ptr, ptr @PXDB_SVR4, align 8, !tbaa !6
%7 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %6)
%8 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) %0)
%9 = add i64 %7, 2
%10 = add i64 %9, %8
%11 = tail call ptr @xmalloc(i64 noundef %10) #4
%12 = load ptr, ptr @PXDB_SVR4, align 8, !tbaa !6
%13 = tail call i32 @strcpy(ptr noundef %11, ptr noundef %12) #4
%14 = tail call i32 @strcat(ptr noundef %11, ptr noundef nonnull @.str) #4
%15 = tail call i32 @strcat(ptr noundef %11, ptr noundef %0) #4
%16 = tail call i32 (ptr, ...) @warning(ptr noundef nonnull @.str.1) #4
%17 = tail call i32 @system(ptr noundef %11) #4
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
br label %22
20: ; preds = %1
%21 = tail call i32 (ptr, ...) @warning(ptr noundef nonnull @.str.2, ptr noundef %0, ptr noundef %0, ptr noundef %0) #4
br label %22
22: ; preds = %20, %5
%23 = phi i32 [ %19, %5 ], [ 0, %20 ]
ret i32 %23
}
declare i64 @file_exists(ptr noundef) local_unnamed_addr #1
declare ptr @xmalloc(i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #2
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @strcat(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @warning(ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: nofree
declare noundef i32 @system(ptr nocapture noundef readonly) local_unnamed_addr #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_gdb_gdb_extr_hpread.c_hpread_call_pxdb |
; ModuleID = 'AnghaBench/linux/drivers/hwtracing/coresight/extr_coresight-tmc-etf.c_tmc_enable_etf_sink_sysfs.c'
source_filename = "AnghaBench/linux/drivers/hwtracing/coresight/extr_coresight-tmc-etf.c_tmc_enable_etf_sink_sysfs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.coresight_device = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
%struct.tmc_drvdata = type { ptr, i64, i32, i32, i64 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@CS_MODE_SYSFS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @tmc_enable_etf_sink_sysfs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tmc_enable_etf_sink_sysfs(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.coresight_device, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = tail call ptr @dev_get_drvdata(i32 noundef %3) #2
%5 = getelementptr inbounds %struct.tmc_drvdata, ptr %4, i64 0, i32 2
%6 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
%7 = load ptr, ptr %4, align 8, !tbaa !11
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %21
9: ; preds = %1
%10 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
%11 = getelementptr inbounds %struct.tmc_drvdata, ptr %4, i64 0, i32 3
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !16
%14 = tail call ptr @kzalloc(i32 noundef %12, i32 noundef %13) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i32, ptr @ENOMEM, align 4, !tbaa !16
%18 = sub nsw i32 0, %17
br label %59
19: ; preds = %9
%20 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
br label %21
21: ; preds = %19, %1
%22 = phi ptr [ null, %1 ], [ %14, %19 ]
%23 = getelementptr inbounds %struct.tmc_drvdata, ptr %4, i64 0, i32 4
%24 = load i64, ptr %23, align 8, !tbaa !17
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21
%27 = load i32, ptr @EBUSY, align 4, !tbaa !16
%28 = sub nsw i32 0, %27
br label %48
29: ; preds = %21
%30 = getelementptr inbounds %struct.tmc_drvdata, ptr %4, i64 0, i32 1
%31 = load i64, ptr %30, align 8, !tbaa !18
%32 = load i64, ptr @CS_MODE_SYSFS, align 8, !tbaa !19
%33 = icmp eq i64 %31, %32
br i1 %33, label %34, label %37
34: ; preds = %29
%35 = load i32, ptr %0, align 4, !tbaa !20
%36 = tail call i32 @atomic_inc(i32 noundef %35) #2
br label %48
37: ; preds = %29
%38 = load ptr, ptr %4, align 8, !tbaa !11
%39 = icmp eq ptr %38, null
br i1 %39, label %44, label %40
40: ; preds = %37
%41 = getelementptr inbounds %struct.tmc_drvdata, ptr %4, i64 0, i32 3
%42 = load i32, ptr %41, align 4, !tbaa !15
%43 = tail call i32 @memset(ptr noundef nonnull %38, i32 noundef 0, i32 noundef %42) #2
br label %45
44: ; preds = %37
store ptr %22, ptr %4, align 8, !tbaa !11
br label %45
45: ; preds = %44, %40
%46 = tail call i32 @tmc_etb_enable_hw(ptr noundef nonnull %4) #2
%47 = icmp eq i32 %46, 0
br i1 %47, label %51, label %48
48: ; preds = %26, %34, %45
%49 = phi i32 [ %46, %45 ], [ 0, %34 ], [ %28, %26 ]
%50 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
br label %56
51: ; preds = %45
%52 = load i64, ptr @CS_MODE_SYSFS, align 8, !tbaa !19
store i64 %52, ptr %30, align 8, !tbaa !18
%53 = load i32, ptr %0, align 4, !tbaa !20
%54 = tail call i32 @atomic_inc(i32 noundef %53) #2
%55 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
br i1 %39, label %59, label %56
56: ; preds = %48, %51
%57 = phi i32 [ %49, %48 ], [ 0, %51 ]
%58 = tail call i32 @kfree(ptr noundef %22) #2
br label %59
59: ; preds = %51, %56, %16
%60 = phi i32 [ %18, %16 ], [ %57, %56 ], [ 0, %51 ]
ret i32 %60
}
declare ptr @dev_get_drvdata(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tmc_etb_enable_hw(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"coresight_device", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"tmc_drvdata", !13, i64 0, !14, i64 8, !7, i64 16, !7, i64 20, !14, i64 24}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!12, !7, i64 20}
!16 = !{!7, !7, i64 0}
!17 = !{!12, !14, i64 24}
!18 = !{!12, !14, i64 8}
!19 = !{!14, !14, i64 0}
!20 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/hwtracing/coresight/extr_coresight-tmc-etf.c_tmc_enable_etf_sink_sysfs.c'
source_filename = "AnghaBench/linux/drivers/hwtracing/coresight/extr_coresight-tmc-etf.c_tmc_enable_etf_sink_sysfs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@EBUSY = common local_unnamed_addr global i32 0, align 4
@CS_MODE_SYSFS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @tmc_enable_etf_sink_sysfs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tmc_enable_etf_sink_sysfs(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call ptr @dev_get_drvdata(i32 noundef %3) #2
%5 = getelementptr inbounds i8, ptr %4, i64 16
%6 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
%7 = load ptr, ptr %4, align 8, !tbaa !12
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %21
9: ; preds = %1
%10 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
%11 = getelementptr inbounds i8, ptr %4, i64 20
%12 = load i32, ptr %11, align 4, !tbaa !16
%13 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !17
%14 = tail call ptr @kzalloc(i32 noundef %12, i32 noundef %13) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i32, ptr @ENOMEM, align 4, !tbaa !17
%18 = sub nsw i32 0, %17
br label %59
19: ; preds = %9
%20 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %5, i64 noundef undef) #2
br label %21
21: ; preds = %19, %1
%22 = phi ptr [ null, %1 ], [ %14, %19 ]
%23 = getelementptr inbounds i8, ptr %4, i64 24
%24 = load i64, ptr %23, align 8, !tbaa !18
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21
%27 = load i32, ptr @EBUSY, align 4, !tbaa !17
%28 = sub nsw i32 0, %27
br label %48
29: ; preds = %21
%30 = getelementptr inbounds i8, ptr %4, i64 8
%31 = load i64, ptr %30, align 8, !tbaa !19
%32 = load i64, ptr @CS_MODE_SYSFS, align 8, !tbaa !20
%33 = icmp eq i64 %31, %32
br i1 %33, label %34, label %37
34: ; preds = %29
%35 = load i32, ptr %0, align 4, !tbaa !21
%36 = tail call i32 @atomic_inc(i32 noundef %35) #2
br label %48
37: ; preds = %29
%38 = load ptr, ptr %4, align 8, !tbaa !12
%39 = icmp eq ptr %38, null
br i1 %39, label %44, label %40
40: ; preds = %37
%41 = getelementptr inbounds i8, ptr %4, i64 20
%42 = load i32, ptr %41, align 4, !tbaa !16
%43 = tail call i32 @memset(ptr noundef nonnull %38, i32 noundef 0, i32 noundef %42) #2
br label %45
44: ; preds = %37
store ptr %22, ptr %4, align 8, !tbaa !12
br label %45
45: ; preds = %44, %40
%46 = tail call i32 @tmc_etb_enable_hw(ptr noundef nonnull %4) #2
%47 = icmp eq i32 %46, 0
br i1 %47, label %51, label %48
48: ; preds = %26, %34, %45
%49 = phi i32 [ %46, %45 ], [ 0, %34 ], [ %28, %26 ]
%50 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
br label %56
51: ; preds = %45
%52 = load i64, ptr @CS_MODE_SYSFS, align 8, !tbaa !20
store i64 %52, ptr %30, align 8, !tbaa !19
%53 = load i32, ptr %0, align 4, !tbaa !21
%54 = tail call i32 @atomic_inc(i32 noundef %53) #2
%55 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %5, i64 noundef undef) #2
br i1 %39, label %59, label %56
56: ; preds = %48, %51
%57 = phi i32 [ %49, %48 ], [ 0, %51 ]
%58 = tail call i32 @kfree(ptr noundef %22) #2
br label %59
59: ; preds = %51, %56, %16
%60 = phi i32 [ %18, %16 ], [ %57, %56 ], [ 0, %51 ]
ret i32 %60
}
declare ptr @dev_get_drvdata(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tmc_etb_enable_hw(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"coresight_device", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"tmc_drvdata", !14, i64 0, !15, i64 8, !8, i64 16, !8, i64 20, !15, i64 24}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!13, !8, i64 20}
!17 = !{!8, !8, i64 0}
!18 = !{!13, !15, i64 24}
!19 = !{!13, !15, i64 8}
!20 = !{!15, !15, i64 0}
!21 = !{!7, !8, i64 0}
| linux_drivers_hwtracing_coresight_extr_coresight-tmc-etf.c_tmc_enable_etf_sink_sysfs |
; ModuleID = 'AnghaBench/radare2/libr/anal/p/extr_....asmarchwhitespacewsdis.c_get_ws_val.c'
source_filename = "AnghaBench/radare2/libr/anal/p/extr_....asmarchwhitespacewsdis.c_get_ws_val.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_ws_val], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @get_ws_val(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @get_ws_next_token(ptr noundef %0, i32 noundef %1) #2
%4 = load i8, ptr %3, align 1, !tbaa !5
%5 = ptrtoint ptr %3 to i64
%6 = ptrtoint ptr %0 to i64
%7 = xor i64 %5, -1
%8 = add i64 %7, %6
%9 = trunc i64 %8 to i32
%10 = add i32 %9, %1
br label %11
11: ; preds = %2, %22
%12 = phi ptr [ %3, %2 ], [ %17, %22 ]
%13 = phi i32 [ 0, %2 ], [ %26, %22 ]
%14 = phi i32 [ 0, %2 ], [ %32, %22 ]
%15 = phi i32 [ %10, %2 ], [ %31, %22 ]
%16 = getelementptr inbounds i8, ptr %12, i64 1
%17 = tail call ptr @get_ws_next_token(ptr noundef nonnull %16, i32 noundef %15) #2
%18 = icmp eq ptr %17, null
br i1 %18, label %34, label %19
19: ; preds = %11
%20 = load i8, ptr %17, align 1, !tbaa !5
%21 = icmp eq i8 %20, 10
br i1 %21, label %34, label %22
22: ; preds = %19
%23 = shl i32 %13, 1
%24 = icmp eq i8 %20, 9
%25 = zext i1 %24 to i32
%26 = or disjoint i32 %23, %25
%27 = ptrtoint ptr %17 to i64
%28 = sub i64 %6, %27
%29 = trunc i64 %28 to i32
%30 = add i32 %15, -1
%31 = add i32 %30, %29
%32 = add nuw nsw i32 %14, 1
%33 = icmp eq i32 %32, 30
br i1 %33, label %34, label %11, !llvm.loop !8
34: ; preds = %22, %11, %19
%35 = phi i32 [ %13, %19 ], [ %13, %11 ], [ %26, %22 ]
%36 = icmp eq i8 %4, 9
%37 = sub nsw i32 0, %35
%38 = select i1 %36, i32 %37, i32 %35
ret i32 %38
}
declare ptr @get_ws_next_token(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/radare2/libr/anal/p/extr_....asmarchwhitespacewsdis.c_get_ws_val.c'
source_filename = "AnghaBench/radare2/libr/anal/p/extr_....asmarchwhitespacewsdis.c_get_ws_val.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @get_ws_val], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @get_ws_val(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @get_ws_next_token(ptr noundef %0, i32 noundef %1) #2
%4 = load i8, ptr %3, align 1, !tbaa !6
%5 = ptrtoint ptr %3 to i64
%6 = ptrtoint ptr %0 to i64
%7 = xor i64 %5, -1
%8 = add i64 %7, %6
%9 = trunc i64 %8 to i32
%10 = add i32 %9, %1
br label %11
11: ; preds = %2, %22
%12 = phi ptr [ %3, %2 ], [ %17, %22 ]
%13 = phi i32 [ 0, %2 ], [ %26, %22 ]
%14 = phi i32 [ 0, %2 ], [ %32, %22 ]
%15 = phi i32 [ %10, %2 ], [ %31, %22 ]
%16 = getelementptr inbounds i8, ptr %12, i64 1
%17 = tail call ptr @get_ws_next_token(ptr noundef nonnull %16, i32 noundef %15) #2
%18 = icmp eq ptr %17, null
br i1 %18, label %34, label %19
19: ; preds = %11
%20 = load i8, ptr %17, align 1, !tbaa !6
%21 = icmp eq i8 %20, 10
br i1 %21, label %34, label %22
22: ; preds = %19
%23 = shl i32 %13, 1
%24 = icmp eq i8 %20, 9
%25 = zext i1 %24 to i32
%26 = or disjoint i32 %23, %25
%27 = ptrtoint ptr %17 to i64
%28 = sub i64 %6, %27
%29 = trunc i64 %28 to i32
%30 = add i32 %15, -1
%31 = add i32 %30, %29
%32 = add nuw nsw i32 %14, 1
%33 = icmp eq i32 %32, 30
br i1 %33, label %34, label %11, !llvm.loop !9
34: ; preds = %22, %11, %19
%35 = phi i32 [ %13, %19 ], [ %13, %11 ], [ %26, %22 ]
%36 = icmp eq i8 %4, 9
%37 = sub nsw i32 0, %35
%38 = select i1 %36, i32 %37, i32 %35
ret i32 %38
}
declare ptr @get_ws_next_token(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| radare2_libr_anal_p_extr_....asmarchwhitespacewsdis.c_get_ws_val |
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_singlestep.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_singlestep.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32, i32, i32, i32, ptr, %struct.TYPE_5__, i32, i32 }
%struct.TYPE_5__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @singlestep], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @singlestep(ptr noundef %0) #0 {
%2 = tail call ptr @G(ptr noundef %0) #2
%3 = load i32, ptr %2, align 8, !tbaa !5
switch i32 %3, label %65 [
i32 0, label %4
i32 1, label %6
i32 2, label %14
i32 3, label %36
i32 4, label %52
]
4: ; preds = %1
%5 = tail call i32 @markroot(ptr noundef %0) #2
br label %65
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 8
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = icmp eq i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %6
%11 = tail call i32 @propagatemark(ptr noundef nonnull %2) #2
br label %65
12: ; preds = %6
%13 = tail call i32 @atomic(ptr noundef %0) #2
br label %65
14: ; preds = %1
%15 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 6
%18 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 6, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !14
%20 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 7
%21 = load i32, ptr %20, align 8, !tbaa !15
%22 = add nsw i32 %21, 1
store i32 %22, ptr %20, align 8, !tbaa !15
%23 = sext i32 %21 to i64
%24 = getelementptr inbounds i32, ptr %19, i64 %23
%25 = tail call i32 @sweepwholelist(ptr noundef %0, ptr noundef %24) #2
%26 = load i32, ptr %20, align 8, !tbaa !15
%27 = load i32, ptr %17, align 8, !tbaa !16
%28 = icmp slt i32 %26, %27
br i1 %28, label %30, label %29
29: ; preds = %14
store i32 3, ptr %2, align 8, !tbaa !5
br label %30
30: ; preds = %29, %14
%31 = load i32, ptr %15, align 4, !tbaa !13
%32 = sub i32 %31, %16
%33 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 2
%34 = load i32, ptr %33, align 8, !tbaa !17
%35 = add i32 %32, %34
store i32 %35, ptr %33, align 8, !tbaa !17
br label %65
36: ; preds = %1
%37 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 1
%38 = load i32, ptr %37, align 4, !tbaa !13
%39 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 5
%40 = load ptr, ptr %39, align 8, !tbaa !18
%41 = tail call ptr @sweeplist(ptr noundef %0, ptr noundef %40, i32 noundef 40) #2
store ptr %41, ptr %39, align 8, !tbaa !18
%42 = load ptr, ptr %41, align 8, !tbaa !19
%43 = icmp eq ptr %42, null
br i1 %43, label %44, label %46
44: ; preds = %36
%45 = tail call i32 @checkSizes(ptr noundef %0) #2
store i32 4, ptr %2, align 8, !tbaa !5
br label %46
46: ; preds = %44, %36
%47 = load i32, ptr %37, align 4, !tbaa !13
%48 = sub i32 %47, %38
%49 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 2
%50 = load i32, ptr %49, align 8, !tbaa !17
%51 = add i32 %48, %50
store i32 %51, ptr %49, align 8, !tbaa !17
br label %65
52: ; preds = %1
%53 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 4
%54 = load i32, ptr %53, align 8, !tbaa !20
%55 = icmp eq i32 %54, 0
br i1 %55, label %63, label %56
56: ; preds = %52
%57 = tail call i32 @GCTM(ptr noundef %0) #2
%58 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 2
%59 = load i32, ptr %58, align 8, !tbaa !17
%60 = icmp sgt i32 %59, 100
br i1 %60, label %61, label %65
61: ; preds = %56
%62 = add nsw i32 %59, -100
store i32 %62, ptr %58, align 8, !tbaa !17
br label %65
63: ; preds = %52
store i32 0, ptr %2, align 8, !tbaa !5
%64 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 3
store i32 0, ptr %64, align 4, !tbaa !21
br label %65
65: ; preds = %1, %56, %61, %63, %46, %30, %12, %10, %4
%66 = phi i32 [ 0, %63 ], [ 400, %46 ], [ 10, %30 ], [ %11, %10 ], [ 0, %12 ], [ 0, %4 ], [ 100, %61 ], [ 100, %56 ], [ 0, %1 ]
ret i32 %66
}
declare ptr @G(ptr noundef) local_unnamed_addr #1
declare i32 @markroot(ptr noundef) local_unnamed_addr #1
declare i32 @propagatemark(ptr noundef) local_unnamed_addr #1
declare i32 @atomic(ptr noundef) local_unnamed_addr #1
declare i32 @sweepwholelist(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @sweeplist(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @checkSizes(ptr noundef) local_unnamed_addr #1
declare i32 @GCTM(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !10, i64 24, !11, i64 32, !7, i64 48, !7, i64 52}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0, !10, i64 8}
!12 = !{!6, !7, i64 52}
!13 = !{!6, !7, i64 4}
!14 = !{!6, !10, i64 40}
!15 = !{!6, !7, i64 48}
!16 = !{!6, !7, i64 32}
!17 = !{!6, !7, i64 8}
!18 = !{!6, !10, i64 24}
!19 = !{!10, !10, i64 0}
!20 = !{!6, !7, i64 16}
!21 = !{!6, !7, i64 12}
| ; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_singlestep.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_singlestep.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @singlestep], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @singlestep(ptr noundef %0) #0 {
%2 = tail call ptr @G(ptr noundef %0) #2
%3 = load i32, ptr %2, align 8, !tbaa !6
switch i32 %3, label %65 [
i32 0, label %4
i32 1, label %6
i32 2, label %14
i32 3, label %36
i32 4, label %52
]
4: ; preds = %1
%5 = tail call i32 @markroot(ptr noundef %0) #2
br label %65
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %2, i64 52
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = icmp eq i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %6
%11 = tail call i32 @propagatemark(ptr noundef nonnull %2) #2
br label %65
12: ; preds = %6
%13 = tail call i32 @atomic(ptr noundef %0) #2
br label %65
14: ; preds = %1
%15 = getelementptr inbounds i8, ptr %2, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = getelementptr inbounds i8, ptr %2, i64 32
%18 = getelementptr inbounds i8, ptr %2, i64 40
%19 = load ptr, ptr %18, align 8, !tbaa !15
%20 = getelementptr inbounds i8, ptr %2, i64 48
%21 = load i32, ptr %20, align 8, !tbaa !16
%22 = add nsw i32 %21, 1
store i32 %22, ptr %20, align 8, !tbaa !16
%23 = sext i32 %21 to i64
%24 = getelementptr inbounds i32, ptr %19, i64 %23
%25 = tail call i32 @sweepwholelist(ptr noundef %0, ptr noundef %24) #2
%26 = load i32, ptr %20, align 8, !tbaa !16
%27 = load i32, ptr %17, align 8, !tbaa !17
%28 = icmp slt i32 %26, %27
br i1 %28, label %30, label %29
29: ; preds = %14
store i32 3, ptr %2, align 8, !tbaa !6
br label %30
30: ; preds = %29, %14
%31 = load i32, ptr %15, align 4, !tbaa !14
%32 = sub i32 %31, %16
%33 = getelementptr inbounds i8, ptr %2, i64 8
%34 = load i32, ptr %33, align 8, !tbaa !18
%35 = add i32 %32, %34
store i32 %35, ptr %33, align 8, !tbaa !18
br label %65
36: ; preds = %1
%37 = getelementptr inbounds i8, ptr %2, i64 4
%38 = load i32, ptr %37, align 4, !tbaa !14
%39 = getelementptr inbounds i8, ptr %2, i64 24
%40 = load ptr, ptr %39, align 8, !tbaa !19
%41 = tail call ptr @sweeplist(ptr noundef %0, ptr noundef %40, i32 noundef 40) #2
store ptr %41, ptr %39, align 8, !tbaa !19
%42 = load ptr, ptr %41, align 8, !tbaa !20
%43 = icmp eq ptr %42, null
br i1 %43, label %44, label %46
44: ; preds = %36
%45 = tail call i32 @checkSizes(ptr noundef %0) #2
store i32 4, ptr %2, align 8, !tbaa !6
br label %46
46: ; preds = %44, %36
%47 = load i32, ptr %37, align 4, !tbaa !14
%48 = sub i32 %47, %38
%49 = getelementptr inbounds i8, ptr %2, i64 8
%50 = load i32, ptr %49, align 8, !tbaa !18
%51 = add i32 %48, %50
store i32 %51, ptr %49, align 8, !tbaa !18
br label %65
52: ; preds = %1
%53 = getelementptr inbounds i8, ptr %2, i64 16
%54 = load i32, ptr %53, align 8, !tbaa !21
%55 = icmp eq i32 %54, 0
br i1 %55, label %63, label %56
56: ; preds = %52
%57 = tail call i32 @GCTM(ptr noundef %0) #2
%58 = getelementptr inbounds i8, ptr %2, i64 8
%59 = load i32, ptr %58, align 8, !tbaa !18
%60 = icmp sgt i32 %59, 100
br i1 %60, label %61, label %65
61: ; preds = %56
%62 = add nsw i32 %59, -100
store i32 %62, ptr %58, align 8, !tbaa !18
br label %65
63: ; preds = %52
store i32 0, ptr %2, align 8, !tbaa !6
%64 = getelementptr inbounds i8, ptr %2, i64 12
store i32 0, ptr %64, align 4, !tbaa !22
br label %65
65: ; preds = %1, %56, %61, %63, %46, %30, %12, %10, %4
%66 = phi i32 [ 0, %63 ], [ 400, %46 ], [ 10, %30 ], [ %11, %10 ], [ 0, %12 ], [ 0, %4 ], [ 100, %61 ], [ 100, %56 ], [ 0, %1 ]
ret i32 %66
}
declare ptr @G(ptr noundef) local_unnamed_addr #1
declare i32 @markroot(ptr noundef) local_unnamed_addr #1
declare i32 @propagatemark(ptr noundef) local_unnamed_addr #1
declare i32 @atomic(ptr noundef) local_unnamed_addr #1
declare i32 @sweepwholelist(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @sweeplist(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @checkSizes(ptr noundef) local_unnamed_addr #1
declare i32 @GCTM(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24, !12, i64 32, !8, i64 48, !8, i64 52}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_5__", !8, i64 0, !11, i64 8}
!13 = !{!7, !8, i64 52}
!14 = !{!7, !8, i64 4}
!15 = !{!7, !11, i64 40}
!16 = !{!7, !8, i64 48}
!17 = !{!7, !8, i64 32}
!18 = !{!7, !8, i64 8}
!19 = !{!7, !11, i64 24}
!20 = !{!11, !11, i64 0}
!21 = !{!7, !8, i64 16}
!22 = !{!7, !8, i64 12}
| xLua_build_luajit-2.1.0b2_src_host_extr_minilua.c_singlestep |
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_led_ctl.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_led_ctl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@URTW_DEBUG_STATE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"unsupported LED mode %d\0A\00", align 1
@USB_ERR_INVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @urtw_led_ctl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @urtw_led_ctl(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
switch i32 %3, label %12 [
i32 131, label %4
i32 130, label %6
i32 129, label %8
i32 128, label %10
]
4: ; preds = %2
%5 = tail call i32 @urtw_led_mode0(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
6: ; preds = %2
%7 = tail call i32 @urtw_led_mode1(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
8: ; preds = %2
%9 = tail call i32 @urtw_led_mode2(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
10: ; preds = %2
%11 = tail call i32 @urtw_led_mode3(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
12: ; preds = %2
%13 = load i32, ptr @URTW_DEBUG_STATE, align 4, !tbaa !10
%14 = tail call i32 @DPRINTF(ptr noundef nonnull %0, i32 noundef %13, ptr noundef nonnull @.str, i32 noundef %3) #2
%15 = load i32, ptr @USB_ERR_INVAL, align 4, !tbaa !10
br label %16
16: ; preds = %12, %10, %8, %6, %4
%17 = phi i32 [ %15, %12 ], [ %11, %10 ], [ %9, %8 ], [ %7, %6 ], [ %5, %4 ]
ret i32 %17
}
declare i32 @urtw_led_mode0(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_led_mode1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_led_mode2(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_led_mode3(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DPRINTF(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"urtw_softc", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_led_ctl.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_urtw.c_urtw_led_ctl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@URTW_DEBUG_STATE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"unsupported LED mode %d\0A\00", align 1
@USB_ERR_INVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @urtw_led_ctl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @urtw_led_ctl(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
switch i32 %3, label %12 [
i32 131, label %4
i32 130, label %6
i32 129, label %8
i32 128, label %10
]
4: ; preds = %2
%5 = tail call i32 @urtw_led_mode0(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
6: ; preds = %2
%7 = tail call i32 @urtw_led_mode1(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
8: ; preds = %2
%9 = tail call i32 @urtw_led_mode2(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
10: ; preds = %2
%11 = tail call i32 @urtw_led_mode3(ptr noundef nonnull %0, i32 noundef %1) #2
br label %16
12: ; preds = %2
%13 = load i32, ptr @URTW_DEBUG_STATE, align 4, !tbaa !11
%14 = tail call i32 @DPRINTF(ptr noundef nonnull %0, i32 noundef %13, ptr noundef nonnull @.str, i32 noundef %3) #2
%15 = load i32, ptr @USB_ERR_INVAL, align 4, !tbaa !11
br label %16
16: ; preds = %12, %10, %8, %6, %4
%17 = phi i32 [ %15, %12 ], [ %11, %10 ], [ %9, %8 ], [ %7, %6 ], [ %5, %4 ]
ret i32 %17
}
declare i32 @urtw_led_mode0(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_led_mode1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_led_mode2(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @urtw_led_mode3(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DPRINTF(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"urtw_softc", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| freebsd_sys_dev_usb_wlan_extr_if_urtw.c_urtw_led_ctl |
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_imgact_binmisc.c_imgact_binmisc_populate_interp.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_imgact_binmisc.c_imgact_binmisc_populate_interp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32 }
@IBE_INTERP_LEN_MAX = dso_local local_unnamed_addr global i32 0, align 4
@M_BINMISC = dso_local local_unnamed_addr global i32 0, align 4
@M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4
@M_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @imgact_binmisc_populate_interp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @imgact_binmisc_populate_interp(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @IBE_INTERP_LEN_MAX, align 4, !tbaa !5
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 16
%6 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef %3) #2
br label %7
7: ; preds = %2, %32
%8 = phi i32 [ %18, %32 ], [ 1, %2 ]
%9 = phi i32 [ %35, %32 ], [ 0, %2 ]
%10 = phi ptr [ %33, %32 ], [ %0, %2 ]
%11 = phi ptr [ %34, %32 ], [ %5, %2 ]
%12 = load i8, ptr %10, align 1, !tbaa !9
br label %16
13: ; preds = %27
%14 = getelementptr inbounds i8, ptr %21, i64 1
%15 = add nsw i32 %18, 1
br label %16
16: ; preds = %13, %7
%17 = phi i8 [ %12, %7 ], [ %29, %13 ]
%18 = phi i32 [ %8, %7 ], [ %15, %13 ]
%19 = phi i32 [ %9, %7 ], [ %23, %13 ]
%20 = phi ptr [ %10, %7 ], [ %28, %13 ]
%21 = phi ptr [ %11, %7 ], [ %14, %13 ]
switch i8 %17, label %32 [
i8 0, label %36
i8 32, label %22
i8 9, label %22
]
22: ; preds = %16, %16
%23 = add nsw i32 %19, 1
%24 = load i32, ptr @IBE_INTERP_LEN_MAX, align 4, !tbaa !5
%25 = icmp slt i32 %23, %24
br i1 %25, label %26, label %36
26: ; preds = %22
store i8 32, ptr %21, align 1, !tbaa !9
br label %27
27: ; preds = %30, %26
%28 = phi ptr [ %20, %26 ], [ %31, %30 ]
%29 = load i8, ptr %28, align 1, !tbaa !9
switch i8 %29, label %13 [
i8 32, label %30
i8 9, label %30
]
30: ; preds = %27, %27
%31 = getelementptr inbounds i8, ptr %28, i64 1
br label %27, !llvm.loop !10
32: ; preds = %16
%33 = getelementptr inbounds i8, ptr %20, i64 1
%34 = getelementptr inbounds i8, ptr %21, i64 1
store i8 %17, ptr %21, align 1, !tbaa !9
%35 = add nsw i32 %19, 1
br label %7, !llvm.loop !12
36: ; preds = %16, %22
%37 = phi i32 [ %23, %22 ], [ %19, %16 ]
store i8 0, ptr %21, align 1, !tbaa !9
%38 = add nsw i32 %37, 1
%39 = load i32, ptr @M_BINMISC, align 4, !tbaa !5
%40 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%41 = load i32, ptr @M_ZERO, align 4, !tbaa !5
%42 = or i32 %41, %40
%43 = call i32 @malloc(i32 noundef %38, i32 noundef %39, i32 noundef %42) #2
%44 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
store i32 %43, ptr %44, align 4, !tbaa !13
%45 = call i32 @memcpy(i32 noundef %43, ptr noundef nonnull %5, i32 noundef %38) #2
store i32 %18, ptr %1, align 4, !tbaa !15
%46 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
store i32 %38, ptr %46, align 4, !tbaa !16
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = !{!14, !6, i64 8}
!14 = !{!"TYPE_3__", !6, i64 0, !6, i64 4, !6, i64 8}
!15 = !{!14, !6, i64 0}
!16 = !{!14, !6, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_imgact_binmisc.c_imgact_binmisc_populate_interp.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_imgact_binmisc.c_imgact_binmisc_populate_interp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IBE_INTERP_LEN_MAX = common local_unnamed_addr global i32 0, align 4
@M_BINMISC = common local_unnamed_addr global i32 0, align 4
@M_WAITOK = common local_unnamed_addr global i32 0, align 4
@M_ZERO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @imgact_binmisc_populate_interp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @imgact_binmisc_populate_interp(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @IBE_INTERP_LEN_MAX, align 4, !tbaa !6
%4 = zext i32 %3 to i64
%5 = alloca i8, i64 %4, align 1
%6 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef %3) #2
br label %7
7: ; preds = %2, %32
%8 = phi i32 [ %18, %32 ], [ 1, %2 ]
%9 = phi i32 [ %35, %32 ], [ 0, %2 ]
%10 = phi ptr [ %33, %32 ], [ %0, %2 ]
%11 = phi ptr [ %34, %32 ], [ %5, %2 ]
%12 = load i8, ptr %10, align 1, !tbaa !10
br label %16
13: ; preds = %27
%14 = getelementptr inbounds i8, ptr %21, i64 1
%15 = add nsw i32 %18, 1
br label %16
16: ; preds = %13, %7
%17 = phi i8 [ %12, %7 ], [ %29, %13 ]
%18 = phi i32 [ %8, %7 ], [ %15, %13 ]
%19 = phi i32 [ %9, %7 ], [ %23, %13 ]
%20 = phi ptr [ %10, %7 ], [ %28, %13 ]
%21 = phi ptr [ %11, %7 ], [ %14, %13 ]
switch i8 %17, label %32 [
i8 0, label %36
i8 32, label %22
i8 9, label %22
]
22: ; preds = %16, %16
%23 = add nsw i32 %19, 1
%24 = load i32, ptr @IBE_INTERP_LEN_MAX, align 4, !tbaa !6
%25 = icmp slt i32 %23, %24
br i1 %25, label %26, label %36
26: ; preds = %22
store i8 32, ptr %21, align 1, !tbaa !10
br label %27
27: ; preds = %30, %26
%28 = phi ptr [ %20, %26 ], [ %31, %30 ]
%29 = load i8, ptr %28, align 1, !tbaa !10
switch i8 %29, label %13 [
i8 32, label %30
i8 9, label %30
]
30: ; preds = %27, %27
%31 = getelementptr inbounds i8, ptr %28, i64 1
br label %27, !llvm.loop !11
32: ; preds = %16
%33 = getelementptr inbounds i8, ptr %20, i64 1
%34 = getelementptr inbounds i8, ptr %21, i64 1
store i8 %17, ptr %21, align 1, !tbaa !10
%35 = add nsw i32 %19, 1
br label %7, !llvm.loop !13
36: ; preds = %16, %22
%37 = phi i32 [ %23, %22 ], [ %19, %16 ]
store i8 0, ptr %21, align 1, !tbaa !10
%38 = add nsw i32 %37, 1
%39 = load i32, ptr @M_BINMISC, align 4, !tbaa !6
%40 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%41 = load i32, ptr @M_ZERO, align 4, !tbaa !6
%42 = or i32 %41, %40
%43 = call i32 @malloc(i32 noundef %38, i32 noundef %39, i32 noundef %42) #2
%44 = getelementptr inbounds i8, ptr %1, i64 8
store i32 %43, ptr %44, align 4, !tbaa !14
%45 = call i32 @memcpy(i32 noundef %43, ptr noundef nonnull %5, i32 noundef %38) #2
store i32 %18, ptr %1, align 4, !tbaa !16
%46 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %38, ptr %46, align 4, !tbaa !17
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = !{!15, !7, i64 8}
!15 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8}
!16 = !{!15, !7, i64 0}
!17 = !{!15, !7, i64 4}
| freebsd_sys_kern_extr_imgact_binmisc.c_imgact_binmisc_populate_interp |
; ModuleID = 'AnghaBench/git/builtin/extr_column.c_cmd_column.c'
source_filename = "AnghaBench/git/builtin/extr_column.c_cmd_column.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.string_list = type { i32 }
%struct.strbuf = type { i32 }
%struct.column_options = type { i32, ptr, i32, i32 }
%struct.option = type { i32 }
@STRING_LIST_INIT_DUP = dso_local local_unnamed_addr global %struct.string_list zeroinitializer, align 4
@STRBUF_INIT = dso_local local_unnamed_addr global %struct.strbuf zeroinitializer, align 4
@.str = private unnamed_addr constant [8 x i8] c"command\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"name\00", align 1
@.str.2 = private unnamed_addr constant [19 x i8] c"lookup config vars\00", align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"mode\00", align 1
@colopts = dso_local global i32 0, align 4
@.str.4 = private unnamed_addr constant [14 x i8] c"layout to use\00", align 1
@.str.5 = private unnamed_addr constant [9 x i8] c"raw-mode\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c"width\00", align 1
@.str.7 = private unnamed_addr constant [14 x i8] c"Maximum width\00", align 1
@.str.8 = private unnamed_addr constant [7 x i8] c"indent\00", align 1
@.str.9 = private unnamed_addr constant [7 x i8] c"string\00", align 1
@.str.10 = private unnamed_addr constant [29 x i8] c"Padding space on left border\00", align 1
@.str.11 = private unnamed_addr constant [3 x i8] c"nl\00", align 1
@.str.12 = private unnamed_addr constant [30 x i8] c"Padding space on right border\00", align 1
@.str.13 = private unnamed_addr constant [8 x i8] c"padding\00", align 1
@.str.14 = private unnamed_addr constant [30 x i8] c"Padding space between columns\00", align 1
@.str.15 = private unnamed_addr constant [11 x i8] c"--command=\00", align 1
@column_config = dso_local local_unnamed_addr global i32 0, align 4
@builtin_column_usage = dso_local local_unnamed_addr global i32 0, align 4
@.str.16 = private unnamed_addr constant [37 x i8] c"--command must be the first argument\00", align 1
@stdin = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @cmd_column(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.string_list, align 4
%5 = alloca %struct.strbuf, align 4
%6 = alloca %struct.column_options, align 8
%7 = alloca ptr, align 8
%8 = alloca [8 x %struct.option], align 16
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%9 = load i32, ptr @STRING_LIST_INIT_DUP, align 4, !tbaa !5
store i32 %9, ptr %4, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%10 = load i32, ptr @STRBUF_INIT, align 4, !tbaa !5
store i32 %10, ptr %5, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
store ptr null, ptr %7, align 8, !tbaa !9
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %8) #3
%11 = tail call i32 @N_(ptr noundef nonnull @.str.1) #3
%12 = tail call i32 @N_(ptr noundef nonnull @.str.2) #3
%13 = call i32 @OPT_STRING(i32 noundef 0, ptr noundef nonnull @.str, ptr noundef nonnull %7, i32 noundef %11, i32 noundef %12) #3
store i32 %13, ptr %8, align 16
%14 = getelementptr inbounds %struct.option, ptr %8, i64 1
%15 = call i32 @N_(ptr noundef nonnull @.str.4) #3
%16 = call i32 @OPT_COLUMN(i32 noundef 0, ptr noundef nonnull @.str.3, ptr noundef nonnull @colopts, i32 noundef %15) #3
store i32 %16, ptr %14, align 4
%17 = getelementptr inbounds %struct.option, ptr %8, i64 2
%18 = call i32 @N_(ptr noundef nonnull @.str.4) #3
%19 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.5, ptr noundef nonnull @colopts, i32 noundef %18) #3
store i32 %19, ptr %17, align 8
%20 = getelementptr inbounds %struct.option, ptr %8, i64 3
%21 = call i32 @N_(ptr noundef nonnull @.str.7) #3
%22 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.6, ptr noundef nonnull %6, i32 noundef %21) #3
store i32 %22, ptr %20, align 4
%23 = getelementptr inbounds %struct.option, ptr %8, i64 4
%24 = getelementptr inbounds %struct.column_options, ptr %6, i64 0, i32 1
%25 = call i32 @N_(ptr noundef nonnull @.str.9) #3
%26 = call i32 @N_(ptr noundef nonnull @.str.10) #3
%27 = call i32 @OPT_STRING(i32 noundef 0, ptr noundef nonnull @.str.8, ptr noundef nonnull %24, i32 noundef %25, i32 noundef %26) #3
store i32 %27, ptr %23, align 16
%28 = getelementptr inbounds %struct.option, ptr %8, i64 5
%29 = getelementptr inbounds %struct.column_options, ptr %6, i64 0, i32 2
%30 = call i32 @N_(ptr noundef nonnull @.str.12) #3
%31 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.11, ptr noundef nonnull %29, i32 noundef %30) #3
store i32 %31, ptr %28, align 4
%32 = getelementptr inbounds %struct.option, ptr %8, i64 6
%33 = getelementptr inbounds %struct.column_options, ptr %6, i64 0, i32 3
%34 = call i32 @N_(ptr noundef nonnull @.str.14) #3
%35 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.13, ptr noundef nonnull %33, i32 noundef %34) #3
store i32 %35, ptr %32, align 8
%36 = getelementptr inbounds %struct.option, ptr %8, i64 7
%37 = call i32 (...) @OPT_END() #3
store i32 %37, ptr %36, align 4
%38 = icmp sgt i32 %0, 1
br i1 %38, label %39, label %49
39: ; preds = %3
%40 = getelementptr inbounds ptr, ptr %1, i64 1
%41 = load ptr, ptr %40, align 8, !tbaa !9
%42 = call i64 @starts_with(ptr noundef %41, ptr noundef nonnull @.str.15) #3
%43 = icmp eq i64 %42, 0
br i1 %43, label %49, label %44
44: ; preds = %39
%45 = load ptr, ptr %40, align 8, !tbaa !9
%46 = getelementptr inbounds i8, ptr %45, i64 10
%47 = load i32, ptr @column_config, align 4, !tbaa !5
%48 = call i32 @git_config(i32 noundef %47, ptr noundef nonnull %46) #3
br label %52
49: ; preds = %39, %3
%50 = load i32, ptr @column_config, align 4, !tbaa !5
%51 = call i32 @git_config(i32 noundef %50, ptr noundef null) #3
br label %52
52: ; preds = %49, %44
%53 = phi ptr [ %46, %44 ], [ null, %49 ]
%54 = call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 24) #3
store i32 1, ptr %33, align 4, !tbaa !11
%55 = load i32, ptr @builtin_column_usage, align 4, !tbaa !5
%56 = call i32 @parse_options(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %8, i32 noundef %55, i32 noundef 0) #3
%57 = icmp eq i32 %56, 0
br i1 %57, label %61, label %58
58: ; preds = %52
%59 = load i32, ptr @builtin_column_usage, align 4, !tbaa !5
%60 = call i32 @usage_with_options(i32 noundef %59, ptr noundef nonnull %8) #3
br label %61
61: ; preds = %58, %52
%62 = load ptr, ptr %7, align 8, !tbaa !9
%63 = icmp ne ptr %62, null
%64 = icmp ne ptr %53, null
%65 = or i1 %64, %63
br i1 %65, label %66, label %74
66: ; preds = %61
%67 = and i1 %64, %63
br i1 %67, label %68, label %71
68: ; preds = %66
%69 = call i64 @strcmp(ptr noundef nonnull %62, ptr noundef nonnull %53) #3
%70 = icmp eq i64 %69, 0
br i1 %70, label %74, label %71
71: ; preds = %68, %66
%72 = call i32 @_(ptr noundef nonnull @.str.16) #3
%73 = call i32 @die(i32 noundef %72) #3
br label %74
74: ; preds = %68, %71, %61
%75 = call i32 @finalize_colopts(ptr noundef nonnull @colopts, i32 noundef -1) #3
%76 = load i32, ptr @stdin, align 4, !tbaa !5
%77 = call i32 @strbuf_getline(ptr noundef nonnull %5, i32 noundef %76) #3
%78 = icmp eq i32 %77, 0
br i1 %78, label %79, label %85
79: ; preds = %74, %79
%80 = load i32, ptr %5, align 4, !tbaa !13
%81 = call i32 @string_list_append(ptr noundef nonnull %4, i32 noundef %80) #3
%82 = load i32, ptr @stdin, align 4, !tbaa !5
%83 = call i32 @strbuf_getline(ptr noundef nonnull %5, i32 noundef %82) #3
%84 = icmp eq i32 %83, 0
br i1 %84, label %79, label %85, !llvm.loop !15
85: ; preds = %79, %74
%86 = load i32, ptr @colopts, align 4, !tbaa !5
%87 = call i32 @print_columns(ptr noundef nonnull %4, i32 noundef %86, ptr noundef nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @OPT_STRING(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @N_(ptr noundef) local_unnamed_addr #2
declare i32 @OPT_COLUMN(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OPT_INTEGER(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OPT_END(...) local_unnamed_addr #2
declare i64 @starts_with(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_config(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @parse_options(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @usage_with_options(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @die(i32 noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare i32 @finalize_colopts(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strbuf_getline(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @string_list_append(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @print_columns(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 20}
!12 = !{!"column_options", !6, i64 0, !10, i64 8, !6, i64 16, !6, i64 20}
!13 = !{!14, !6, i64 0}
!14 = !{!"strbuf", !6, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/git/builtin/extr_column.c_cmd_column.c'
source_filename = "AnghaBench/git/builtin/extr_column.c_cmd_column.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.string_list = type { i32 }
%struct.strbuf = type { i32 }
%struct.column_options = type { i32, ptr, i32, i32 }
%struct.option = type { i32 }
@STRING_LIST_INIT_DUP = common local_unnamed_addr global %struct.string_list zeroinitializer, align 4
@STRBUF_INIT = common local_unnamed_addr global %struct.strbuf zeroinitializer, align 4
@.str = private unnamed_addr constant [8 x i8] c"command\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"name\00", align 1
@.str.2 = private unnamed_addr constant [19 x i8] c"lookup config vars\00", align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"mode\00", align 1
@colopts = common global i32 0, align 4
@.str.4 = private unnamed_addr constant [14 x i8] c"layout to use\00", align 1
@.str.5 = private unnamed_addr constant [9 x i8] c"raw-mode\00", align 1
@.str.6 = private unnamed_addr constant [6 x i8] c"width\00", align 1
@.str.7 = private unnamed_addr constant [14 x i8] c"Maximum width\00", align 1
@.str.8 = private unnamed_addr constant [7 x i8] c"indent\00", align 1
@.str.9 = private unnamed_addr constant [7 x i8] c"string\00", align 1
@.str.10 = private unnamed_addr constant [29 x i8] c"Padding space on left border\00", align 1
@.str.11 = private unnamed_addr constant [3 x i8] c"nl\00", align 1
@.str.12 = private unnamed_addr constant [30 x i8] c"Padding space on right border\00", align 1
@.str.13 = private unnamed_addr constant [8 x i8] c"padding\00", align 1
@.str.14 = private unnamed_addr constant [30 x i8] c"Padding space between columns\00", align 1
@.str.15 = private unnamed_addr constant [11 x i8] c"--command=\00", align 1
@column_config = common local_unnamed_addr global i32 0, align 4
@builtin_column_usage = common local_unnamed_addr global i32 0, align 4
@.str.16 = private unnamed_addr constant [37 x i8] c"--command must be the first argument\00", align 1
@stdin = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @cmd_column(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = alloca %struct.string_list, align 4
%5 = alloca %struct.strbuf, align 4
%6 = alloca %struct.column_options, align 8
%7 = alloca ptr, align 8
%8 = alloca [8 x %struct.option], align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%9 = load i32, ptr @STRING_LIST_INIT_DUP, align 4, !tbaa !6
store i32 %9, ptr %4, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
%10 = load i32, ptr @STRBUF_INIT, align 4, !tbaa !6
store i32 %10, ptr %5, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
store ptr null, ptr %7, align 8, !tbaa !10
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %8) #3
%11 = tail call i32 @N_(ptr noundef nonnull @.str.1) #3
%12 = tail call i32 @N_(ptr noundef nonnull @.str.2) #3
%13 = call i32 @OPT_STRING(i32 noundef 0, ptr noundef nonnull @.str, ptr noundef nonnull %7, i32 noundef %11, i32 noundef %12) #3
store i32 %13, ptr %8, align 4
%14 = getelementptr inbounds i8, ptr %8, i64 4
%15 = call i32 @N_(ptr noundef nonnull @.str.4) #3
%16 = call i32 @OPT_COLUMN(i32 noundef 0, ptr noundef nonnull @.str.3, ptr noundef nonnull @colopts, i32 noundef %15) #3
store i32 %16, ptr %14, align 4
%17 = getelementptr inbounds i8, ptr %8, i64 8
%18 = call i32 @N_(ptr noundef nonnull @.str.4) #3
%19 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.5, ptr noundef nonnull @colopts, i32 noundef %18) #3
store i32 %19, ptr %17, align 4
%20 = getelementptr inbounds i8, ptr %8, i64 12
%21 = call i32 @N_(ptr noundef nonnull @.str.7) #3
%22 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.6, ptr noundef nonnull %6, i32 noundef %21) #3
store i32 %22, ptr %20, align 4
%23 = getelementptr inbounds i8, ptr %8, i64 16
%24 = getelementptr inbounds i8, ptr %6, i64 8
%25 = call i32 @N_(ptr noundef nonnull @.str.9) #3
%26 = call i32 @N_(ptr noundef nonnull @.str.10) #3
%27 = call i32 @OPT_STRING(i32 noundef 0, ptr noundef nonnull @.str.8, ptr noundef nonnull %24, i32 noundef %25, i32 noundef %26) #3
store i32 %27, ptr %23, align 4
%28 = getelementptr inbounds i8, ptr %8, i64 20
%29 = getelementptr inbounds i8, ptr %6, i64 16
%30 = call i32 @N_(ptr noundef nonnull @.str.12) #3
%31 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.11, ptr noundef nonnull %29, i32 noundef %30) #3
store i32 %31, ptr %28, align 4
%32 = getelementptr inbounds i8, ptr %8, i64 24
%33 = getelementptr inbounds i8, ptr %6, i64 20
%34 = call i32 @N_(ptr noundef nonnull @.str.14) #3
%35 = call i32 @OPT_INTEGER(i32 noundef 0, ptr noundef nonnull @.str.13, ptr noundef nonnull %33, i32 noundef %34) #3
store i32 %35, ptr %32, align 4
%36 = getelementptr inbounds i8, ptr %8, i64 28
%37 = call i32 @OPT_END() #3
store i32 %37, ptr %36, align 4
%38 = icmp sgt i32 %0, 1
br i1 %38, label %39, label %49
39: ; preds = %3
%40 = getelementptr inbounds i8, ptr %1, i64 8
%41 = load ptr, ptr %40, align 8, !tbaa !10
%42 = call i64 @starts_with(ptr noundef %41, ptr noundef nonnull @.str.15) #3
%43 = icmp eq i64 %42, 0
br i1 %43, label %49, label %44
44: ; preds = %39
%45 = load ptr, ptr %40, align 8, !tbaa !10
%46 = getelementptr inbounds i8, ptr %45, i64 10
%47 = load i32, ptr @column_config, align 4, !tbaa !6
%48 = call i32 @git_config(i32 noundef %47, ptr noundef nonnull %46) #3
br label %52
49: ; preds = %39, %3
%50 = load i32, ptr @column_config, align 4, !tbaa !6
%51 = call i32 @git_config(i32 noundef %50, ptr noundef null) #3
br label %52
52: ; preds = %49, %44
%53 = phi ptr [ %46, %44 ], [ null, %49 ]
%54 = call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 24) #3
store i32 1, ptr %33, align 4, !tbaa !12
%55 = load i32, ptr @builtin_column_usage, align 4, !tbaa !6
%56 = call i32 @parse_options(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef nonnull %8, i32 noundef %55, i32 noundef 0) #3
%57 = icmp eq i32 %56, 0
br i1 %57, label %61, label %58
58: ; preds = %52
%59 = load i32, ptr @builtin_column_usage, align 4, !tbaa !6
%60 = call i32 @usage_with_options(i32 noundef %59, ptr noundef nonnull %8) #3
br label %61
61: ; preds = %58, %52
%62 = load ptr, ptr %7, align 8, !tbaa !10
%63 = icmp ne ptr %62, null
%64 = icmp ne ptr %53, null
%65 = or i1 %64, %63
br i1 %65, label %66, label %74
66: ; preds = %61
%67 = and i1 %64, %63
br i1 %67, label %68, label %71
68: ; preds = %66
%69 = call i64 @strcmp(ptr noundef nonnull %62, ptr noundef nonnull %53) #3
%70 = icmp eq i64 %69, 0
br i1 %70, label %74, label %71
71: ; preds = %68, %66
%72 = call i32 @_(ptr noundef nonnull @.str.16) #3
%73 = call i32 @die(i32 noundef %72) #3
br label %74
74: ; preds = %68, %71, %61
%75 = call i32 @finalize_colopts(ptr noundef nonnull @colopts, i32 noundef -1) #3
%76 = load i32, ptr @stdin, align 4, !tbaa !6
%77 = call i32 @strbuf_getline(ptr noundef nonnull %5, i32 noundef %76) #3
%78 = icmp eq i32 %77, 0
br i1 %78, label %79, label %85
79: ; preds = %74, %79
%80 = load i32, ptr %5, align 4, !tbaa !14
%81 = call i32 @string_list_append(ptr noundef nonnull %4, i32 noundef %80) #3
%82 = load i32, ptr @stdin, align 4, !tbaa !6
%83 = call i32 @strbuf_getline(ptr noundef nonnull %5, i32 noundef %82) #3
%84 = icmp eq i32 %83, 0
br i1 %84, label %79, label %85, !llvm.loop !16
85: ; preds = %79, %74
%86 = load i32, ptr @colopts, align 4, !tbaa !6
%87 = call i32 @print_columns(ptr noundef nonnull %4, i32 noundef %86, ptr noundef nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @OPT_STRING(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @N_(ptr noundef) local_unnamed_addr #2
declare i32 @OPT_COLUMN(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OPT_INTEGER(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @OPT_END(...) local_unnamed_addr #2
declare i64 @starts_with(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_config(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @parse_options(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @usage_with_options(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @die(i32 noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare i32 @finalize_colopts(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strbuf_getline(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @string_list_append(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @print_columns(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 20}
!13 = !{!"column_options", !7, i64 0, !11, i64 8, !7, i64 16, !7, i64 20}
!14 = !{!15, !7, i64 0}
!15 = !{!"strbuf", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| git_builtin_extr_column.c_cmd_column |
; ModuleID = 'AnghaBench/linux/drivers/pinctrl/extr_core.c_pinctrl_gpio_direction_output.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/extr_core.c_pinctrl_gpio_direction_output.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @pinctrl_gpio_direction_output(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @pinctrl_gpio_direction(i32 noundef %0, i32 noundef 0) #2
ret i32 %2
}
declare i32 @pinctrl_gpio_direction(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/pinctrl/extr_core.c_pinctrl_gpio_direction_output.c'
source_filename = "AnghaBench/linux/drivers/pinctrl/extr_core.c_pinctrl_gpio_direction_output.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @pinctrl_gpio_direction_output(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @pinctrl_gpio_direction(i32 noundef %0, i32 noundef 0) #2
ret i32 %2
}
declare i32 @pinctrl_gpio_direction(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_pinctrl_extr_core.c_pinctrl_gpio_direction_output |
; ModuleID = 'AnghaBench/freebsd/libexec/tftpd/extr_tftp-io.c_errtomsg.c'
source_filename = "AnghaBench/freebsd/libexec/tftpd/extr_tftp-io.c_errtomsg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.errmsg = type { i32, ptr }
@errtomsg.ebuf = internal global [40 x i8] zeroinitializer, align 16
@.str = private unnamed_addr constant [8 x i8] c"success\00", align 1
@errmsgs = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [9 x i8] c"error %d\00", align 1
; Function Attrs: nounwind uwtable
define dso_local ptr @errtomsg(i32 noundef %0) local_unnamed_addr #0 {
%2 = icmp eq i32 %0, 0
br i1 %2, label %20, label %3
3: ; preds = %1
%4 = load ptr, ptr @errmsgs, align 8, !tbaa !5
%5 = load i32, ptr %4, align 8, !tbaa !9
%6 = icmp sgt i32 %5, -1
br i1 %6, label %7, label %18
7: ; preds = %3, %14
%8 = phi i32 [ %16, %14 ], [ %5, %3 ]
%9 = phi ptr [ %15, %14 ], [ %4, %3 ]
%10 = icmp eq i32 %8, %0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = getelementptr inbounds %struct.errmsg, ptr %9, i64 0, i32 1
%13 = load ptr, ptr %12, align 8, !tbaa !12
br label %20
14: ; preds = %7
%15 = getelementptr inbounds %struct.errmsg, ptr %9, i64 1
%16 = load i32, ptr %15, align 8, !tbaa !9
%17 = icmp sgt i32 %16, -1
br i1 %17, label %7, label %18, !llvm.loop !13
18: ; preds = %14, %3
%19 = tail call i32 @snprintf(ptr noundef nonnull @errtomsg.ebuf, i32 noundef 40, ptr noundef nonnull @.str.1, i32 noundef %0) #2
br label %20
20: ; preds = %1, %18, %11
%21 = phi ptr [ %13, %11 ], [ @errtomsg.ebuf, %18 ], [ @.str, %1 ]
ret ptr %21
}
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"errmsg", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/libexec/tftpd/extr_tftp-io.c_errtomsg.c'
source_filename = "AnghaBench/freebsd/libexec/tftpd/extr_tftp-io.c_errtomsg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@errtomsg.ebuf = internal global [40 x i8] zeroinitializer, align 1
@.str = private unnamed_addr constant [8 x i8] c"success\00", align 1
@errmsgs = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [9 x i8] c"error %d\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @errtomsg(i32 noundef %0) local_unnamed_addr #0 {
%2 = icmp eq i32 %0, 0
br i1 %2, label %20, label %3
3: ; preds = %1
%4 = load ptr, ptr @errmsgs, align 8, !tbaa !6
%5 = load i32, ptr %4, align 8, !tbaa !10
%6 = icmp sgt i32 %5, -1
br i1 %6, label %7, label %18
7: ; preds = %3, %14
%8 = phi i32 [ %16, %14 ], [ %5, %3 ]
%9 = phi ptr [ %15, %14 ], [ %4, %3 ]
%10 = icmp eq i32 %8, %0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = getelementptr inbounds i8, ptr %9, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !13
br label %20
14: ; preds = %7
%15 = getelementptr inbounds i8, ptr %9, i64 16
%16 = load i32, ptr %15, align 8, !tbaa !10
%17 = icmp sgt i32 %16, -1
br i1 %17, label %7, label %18, !llvm.loop !14
18: ; preds = %14, %3
%19 = tail call i32 @snprintf(ptr noundef nonnull @errtomsg.ebuf, i32 noundef 40, ptr noundef nonnull @.str.1, i32 noundef %0) #2
br label %20
20: ; preds = %1, %18, %11
%21 = phi ptr [ %13, %11 ], [ @errtomsg.ebuf, %18 ], [ @.str, %1 ]
ret ptr %21
}
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"errmsg", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| freebsd_libexec_tftpd_extr_tftp-io.c_errtomsg |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_fw_id_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_fw_id_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"0x%04x\0A\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"0x0\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mptscsih_device_fw_id_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mptscsih_device_fw_id_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_scsi_device(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %14, label %7
7: ; preds = %3
%8 = load ptr, ptr %5, align 8, !tbaa !10
%9 = icmp eq ptr %8, null
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !12
%12 = load i32, ptr %8, align 4, !tbaa !14
%13 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %12) #2
br label %17
14: ; preds = %7, %3
%15 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !12
%16 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %15, ptr noundef nonnull @.str.1) #2
br label %17
17: ; preds = %14, %10
%18 = phi i32 [ %13, %10 ], [ %16, %14 ]
ret i32 %18
}
declare ptr @to_scsi_device(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"scsi_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_3__", !13, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_fw_id_show.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_fw_id_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"0x%04x\0A\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"0x0\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mptscsih_device_fw_id_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mptscsih_device_fw_id_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_scsi_device(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %14, label %7
7: ; preds = %3
%8 = load ptr, ptr %5, align 8, !tbaa !11
%9 = icmp eq ptr %8, null
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !13
%12 = load i32, ptr %8, align 4, !tbaa !15
%13 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %11, ptr noundef nonnull @.str, i32 noundef %12) #2
br label %17
14: ; preds = %7, %3
%15 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !13
%16 = tail call i32 (ptr, i32, ptr, ...) @snprintf(ptr noundef %2, i32 noundef %15, ptr noundef nonnull @.str.1) #2
br label %17
17: ; preds = %14, %10
%18 = phi i32 [ %13, %10 ], [ %16, %14 ]
ret i32 %18
}
declare ptr @to_scsi_device(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"scsi_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_3__", !14, i64 0}
| fastsocket_kernel_drivers_message_fusion_extr_mptscsih.c_mptscsih_device_fw_id_show |
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_mmu.c_get_mmio_spte_gfn.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_mmu.c_get_mmio_spte_gfn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@shadow_nonpresent_or_rsvd_lower_gfn_mask = dso_local local_unnamed_addr global i32 0, align 4
@shadow_nonpresent_or_rsvd_mask_len = dso_local local_unnamed_addr global i32 0, align 4
@shadow_nonpresent_or_rsvd_mask = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_mmio_spte_gfn], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @get_mmio_spte_gfn(i32 noundef %0) #0 {
%2 = load i32, ptr @shadow_nonpresent_or_rsvd_lower_gfn_mask, align 4, !tbaa !5
%3 = and i32 %2, %0
%4 = load i32, ptr @shadow_nonpresent_or_rsvd_mask_len, align 4, !tbaa !5
%5 = ashr i32 %0, %4
%6 = load i32, ptr @shadow_nonpresent_or_rsvd_mask, align 4, !tbaa !5
%7 = and i32 %5, %6
%8 = or i32 %7, %3
%9 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !5
%10 = ashr i32 %8, %9
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_mmu.c_get_mmio_spte_gfn.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_mmu.c_get_mmio_spte_gfn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@shadow_nonpresent_or_rsvd_lower_gfn_mask = common local_unnamed_addr global i32 0, align 4
@shadow_nonpresent_or_rsvd_mask_len = common local_unnamed_addr global i32 0, align 4
@shadow_nonpresent_or_rsvd_mask = common local_unnamed_addr global i32 0, align 4
@PAGE_SHIFT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_mmio_spte_gfn], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @get_mmio_spte_gfn(i32 noundef %0) #0 {
%2 = load i32, ptr @shadow_nonpresent_or_rsvd_lower_gfn_mask, align 4, !tbaa !6
%3 = and i32 %2, %0
%4 = load i32, ptr @shadow_nonpresent_or_rsvd_mask_len, align 4, !tbaa !6
%5 = ashr i32 %0, %4
%6 = load i32, ptr @shadow_nonpresent_or_rsvd_mask, align 4, !tbaa !6
%7 = and i32 %5, %6
%8 = or i32 %7, %3
%9 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !6
%10 = ashr i32 %8, %9
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_x86_kvm_extr_mmu.c_get_mmio_spte_gfn |
; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/extr_dn_sched_fq_pie.c_fq_pie_getconfig.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/extr_dn_sched_fq_pie.c_fq_pie_getconfig.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32 }
%struct.dn_schk = type { i32 }
%struct.dn_extra_parms = type { ptr, i32 }
@fq_pie_desc = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @fq_pie_getconfig], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @fq_pie_getconfig(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 1
%4 = getelementptr inbounds %struct.dn_extra_parms, ptr %1, i64 0, i32 1
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = load i32, ptr @fq_pie_desc, align 4, !tbaa !11
%7 = tail call i32 @strcpy(i32 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 4
%9 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 10
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = load ptr, ptr %1, align 8, !tbaa !16
store i32 %10, ptr %11, align 4, !tbaa !17
%12 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 9
%13 = load i32, ptr %12, align 4, !tbaa !18
%14 = getelementptr inbounds i32, ptr %11, i64 1
store i32 %13, ptr %14, align 4, !tbaa !17
%15 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 8
%16 = load i32, ptr %15, align 4, !tbaa !19
%17 = getelementptr inbounds i32, ptr %11, i64 2
store i32 %16, ptr %17, align 4, !tbaa !17
%18 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 7
%19 = load i32, ptr %18, align 4, !tbaa !20
%20 = getelementptr inbounds i32, ptr %11, i64 3
store i32 %19, ptr %20, align 4, !tbaa !17
%21 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 6
%22 = load i32, ptr %21, align 4, !tbaa !21
%23 = getelementptr inbounds i32, ptr %11, i64 4
store i32 %22, ptr %23, align 4, !tbaa !17
%24 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 5
%25 = load i32, ptr %24, align 4, !tbaa !22
%26 = getelementptr inbounds i32, ptr %11, i64 5
store i32 %25, ptr %26, align 4, !tbaa !17
%27 = load i32, ptr %8, align 4, !tbaa !23
%28 = getelementptr inbounds i32, ptr %11, i64 6
store i32 %27, ptr %28, align 4, !tbaa !17
%29 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 3
%30 = load i32, ptr %29, align 4, !tbaa !24
%31 = getelementptr inbounds i32, ptr %11, i64 7
store i32 %30, ptr %31, align 4, !tbaa !17
%32 = getelementptr inbounds %struct.dn_schk, ptr %0, i64 2
%33 = load i32, ptr %32, align 4, !tbaa !25
%34 = getelementptr inbounds i32, ptr %11, i64 8
store i32 %33, ptr %34, align 4, !tbaa !17
%35 = load i32, ptr %3, align 4, !tbaa !26
%36 = getelementptr inbounds i32, ptr %11, i64 9
store i32 %35, ptr %36, align 4, !tbaa !17
ret i32 0
}
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"dn_extra_parms", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_4__", !10, i64 0}
!13 = !{!14, !10, i64 36}
!14 = !{!"dn_sch_fq_pie_parms", !10, i64 0, !10, i64 4, !10, i64 8, !15, i64 12}
!15 = !{!"TYPE_3__", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24}
!16 = !{!6, !7, i64 0}
!17 = !{!10, !10, i64 0}
!18 = !{!14, !10, i64 32}
!19 = !{!14, !10, i64 28}
!20 = !{!14, !10, i64 24}
!21 = !{!14, !10, i64 20}
!22 = !{!14, !10, i64 16}
!23 = !{!14, !10, i64 12}
!24 = !{!14, !10, i64 8}
!25 = !{!14, !10, i64 4}
!26 = !{!14, !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/extr_dn_sched_fq_pie.c_fq_pie_getconfig.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/extr_dn_sched_fq_pie.c_fq_pie_getconfig.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32 }
@fq_pie_desc = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @fq_pie_getconfig], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @fq_pie_getconfig(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = load i32, ptr @fq_pie_desc, align 4, !tbaa !12
%7 = tail call i32 @strcpy(i32 noundef %5, i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = getelementptr inbounds i8, ptr %0, i64 40
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = load ptr, ptr %1, align 8, !tbaa !17
store i32 %10, ptr %11, align 4, !tbaa !18
%12 = getelementptr inbounds i8, ptr %0, i64 36
%13 = load i32, ptr %12, align 4, !tbaa !19
%14 = getelementptr inbounds i8, ptr %11, i64 4
store i32 %13, ptr %14, align 4, !tbaa !18
%15 = getelementptr inbounds i8, ptr %0, i64 32
%16 = load i32, ptr %15, align 4, !tbaa !20
%17 = getelementptr inbounds i8, ptr %11, i64 8
store i32 %16, ptr %17, align 4, !tbaa !18
%18 = getelementptr inbounds i8, ptr %0, i64 28
%19 = load i32, ptr %18, align 4, !tbaa !21
%20 = getelementptr inbounds i8, ptr %11, i64 12
store i32 %19, ptr %20, align 4, !tbaa !18
%21 = getelementptr inbounds i8, ptr %0, i64 24
%22 = load i32, ptr %21, align 4, !tbaa !22
%23 = getelementptr inbounds i8, ptr %11, i64 16
store i32 %22, ptr %23, align 4, !tbaa !18
%24 = getelementptr inbounds i8, ptr %0, i64 20
%25 = load i32, ptr %24, align 4, !tbaa !23
%26 = getelementptr inbounds i8, ptr %11, i64 20
store i32 %25, ptr %26, align 4, !tbaa !18
%27 = load i32, ptr %8, align 4, !tbaa !24
%28 = getelementptr inbounds i8, ptr %11, i64 24
store i32 %27, ptr %28, align 4, !tbaa !18
%29 = getelementptr inbounds i8, ptr %0, i64 12
%30 = load i32, ptr %29, align 4, !tbaa !25
%31 = getelementptr inbounds i8, ptr %11, i64 28
store i32 %30, ptr %31, align 4, !tbaa !18
%32 = getelementptr inbounds i8, ptr %0, i64 8
%33 = load i32, ptr %32, align 4, !tbaa !26
%34 = getelementptr inbounds i8, ptr %11, i64 32
store i32 %33, ptr %34, align 4, !tbaa !18
%35 = load i32, ptr %3, align 4, !tbaa !27
%36 = getelementptr inbounds i8, ptr %11, i64 36
store i32 %35, ptr %36, align 4, !tbaa !18
ret i32 0
}
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dn_extra_parms", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_4__", !11, i64 0}
!14 = !{!15, !11, i64 36}
!15 = !{!"dn_sch_fq_pie_parms", !11, i64 0, !11, i64 4, !11, i64 8, !16, i64 12}
!16 = !{!"TYPE_3__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24}
!17 = !{!7, !8, i64 0}
!18 = !{!11, !11, i64 0}
!19 = !{!15, !11, i64 32}
!20 = !{!15, !11, i64 28}
!21 = !{!15, !11, i64 24}
!22 = !{!15, !11, i64 20}
!23 = !{!15, !11, i64 16}
!24 = !{!15, !11, i64 12}
!25 = !{!15, !11, i64 8}
!26 = !{!15, !11, i64 4}
!27 = !{!15, !11, i64 0}
| freebsd_sys_netpfil_ipfw_extr_dn_sched_fq_pie.c_fq_pie_getconfig |
; ModuleID = 'AnghaBench/linux/sound/pci/asihpi/extr_asihpi.c_snd_card_asihpi_isr.c'
source_filename = "AnghaBench/linux/sound/pci/asihpi/extr_asihpi.c_snd_card_asihpi_isr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_card_asihpi_isr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @snd_card_asihpi_isr(ptr noundef readonly %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = load i64, ptr %4, align 8, !tbaa !10
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %3, %1
%11 = phi i32 [ 1, %3 ], [ 1, %1 ], [ %9, %6 ]
%12 = tail call i32 @WARN_ON(i32 noundef %11) #2
%13 = load ptr, ptr %0, align 8, !tbaa !5
%14 = load i64, ptr %13, align 8, !tbaa !10
%15 = inttoptr i64 %14 to ptr
%16 = tail call i32 @tasklet_schedule(ptr noundef %15) #2
ret void
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @tasklet_schedule(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"hpi_adapter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/pci/asihpi/extr_asihpi.c_snd_card_asihpi_isr.c'
source_filename = "AnghaBench/linux/sound/pci/asihpi/extr_asihpi.c_snd_card_asihpi_isr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_card_asihpi_isr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @snd_card_asihpi_isr(ptr noundef readonly %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = load i64, ptr %4, align 8, !tbaa !11
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %3, %1
%11 = phi i32 [ 1, %3 ], [ 1, %1 ], [ %9, %6 ]
%12 = tail call i32 @WARN_ON(i32 noundef %11) #2
%13 = load ptr, ptr %0, align 8, !tbaa !6
%14 = load i64, ptr %13, align 8, !tbaa !11
%15 = inttoptr i64 %14 to ptr
%16 = tail call i32 @tasklet_schedule(ptr noundef %15) #2
ret void
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @tasklet_schedule(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"hpi_adapter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
| linux_sound_pci_asihpi_extr_asihpi.c_snd_card_asihpi_isr |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/siano/extr_smscoreapi.c_smscore_register_device.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/siano/extr_smscoreapi.c_smscore_register_device.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.smscore_device_t = type { i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.smsdevice_params_t = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [20 x i8] c"kzalloc(...) failed\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@GFP_DMA = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"allocated %d buffers\00", align 1
@DEVICE_MODE_NONE = dso_local local_unnamed_addr global i32 0, align 4
@g_smscore_deviceslock = dso_local global i32 0, align 4
@g_smscore_devices = dso_local global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"device %p created\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @smscore_register_device(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%4 = tail call ptr @kzalloc(i32 noundef 136, i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 (ptr, ...) @sms_info(ptr noundef nonnull @.str) #2
%8 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%9 = sub nsw i32 0, %8
br label %108
10: ; preds = %2
%11 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 2
%12 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %11) #2
%13 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 29
%14 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %13) #2
%15 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 28
%16 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %15) #2
%17 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 27
%18 = tail call i32 @spin_lock_init(ptr noundef nonnull %17) #2
%19 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 26
%20 = tail call i32 @spin_lock_init(ptr noundef nonnull %19) #2
%21 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 25
%22 = tail call i32 @init_completion(ptr noundef nonnull %21) #2
%23 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 24
%24 = tail call i32 @init_completion(ptr noundef nonnull %23) #2
%25 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 23
%26 = tail call i32 @init_completion(ptr noundef nonnull %25) #2
%27 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 22
%28 = tail call i32 @init_completion(ptr noundef nonnull %27) #2
%29 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 21
%30 = tail call i32 @init_completion(ptr noundef nonnull %29) #2
%31 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 20
%32 = tail call i32 @init_completion(ptr noundef nonnull %31) #2
%33 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 19
%34 = tail call i32 @init_completion(ptr noundef nonnull %33) #2
%35 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 18
%36 = tail call i32 @init_completion(ptr noundef nonnull %35) #2
%37 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 17
%38 = tail call i32 @init_completion(ptr noundef nonnull %37) #2
%39 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 16
%40 = tail call i32 @init_completion(ptr noundef nonnull %39) #2
%41 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 15
%42 = tail call i32 @init_waitqueue_head(ptr noundef nonnull %41) #2
%43 = load i32, ptr %0, align 4, !tbaa !9
%44 = getelementptr inbounds %struct.smsdevice_params_t, ptr %0, i64 0, i32 1
%45 = load i32, ptr %44, align 4, !tbaa !11
%46 = mul nsw i32 %45, %43
store i32 %46, ptr %4, align 8, !tbaa !12
%47 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 13
%48 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%49 = load i32, ptr @GFP_DMA, align 4, !tbaa !5
%50 = or i32 %49, %48
%51 = tail call ptr @dma_alloc_coherent(ptr noundef null, i32 noundef %46, ptr noundef nonnull %47, i32 noundef %50) #2
%52 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 14
store ptr %51, ptr %52, align 8, !tbaa !16
%53 = icmp eq ptr %51, null
br i1 %53, label %60, label %54
54: ; preds = %10
%55 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 1
%56 = load i64, ptr %55, align 8, !tbaa !17
%57 = load i32, ptr %44, align 4, !tbaa !11
%58 = sext i32 %57 to i64
%59 = icmp slt i64 %56, %58
br i1 %59, label %64, label %84
60: ; preds = %10
%61 = tail call i32 @smscore_unregister_device(ptr noundef nonnull %4) #2
%62 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%63 = sub nsw i32 0, %62
br label %108
64: ; preds = %54, %74
%65 = phi ptr [ %80, %74 ], [ %51, %54 ]
%66 = load ptr, ptr %52, align 8, !tbaa !16
%67 = load i32, ptr %47, align 4, !tbaa !18
%68 = tail call ptr @smscore_createbuffer(ptr noundef %65, ptr noundef %66, i32 noundef %67) #2
%69 = icmp eq ptr %68, null
br i1 %69, label %70, label %74
70: ; preds = %64
%71 = tail call i32 @smscore_unregister_device(ptr noundef nonnull %4) #2
%72 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%73 = sub nsw i32 0, %72
br label %108
74: ; preds = %64
%75 = tail call i32 @smscore_putbuffer(ptr noundef nonnull %4, ptr noundef nonnull %68) #2
%76 = load i64, ptr %55, align 8, !tbaa !17
%77 = add nsw i64 %76, 1
store i64 %77, ptr %55, align 8, !tbaa !17
%78 = load i32, ptr %0, align 4, !tbaa !9
%79 = sext i32 %78 to i64
%80 = getelementptr inbounds i32, ptr %65, i64 %79
%81 = load i32, ptr %44, align 4, !tbaa !11
%82 = sext i32 %81 to i64
%83 = icmp slt i64 %77, %82
br i1 %83, label %64, label %84, !llvm.loop !19
84: ; preds = %74, %54
%85 = phi i64 [ %56, %54 ], [ %77, %74 ]
%86 = tail call i32 (ptr, ...) @sms_info(ptr noundef nonnull @.str.1, i64 noundef %85) #2
%87 = load i32, ptr @DEVICE_MODE_NONE, align 4, !tbaa !5
%88 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 12
store i32 %87, ptr %88, align 8, !tbaa !21
%89 = getelementptr inbounds %struct.smsdevice_params_t, ptr %0, i64 0, i32 8
%90 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 8
%91 = load <4 x i32>, ptr %89, align 4, !tbaa !5
store <4 x i32> %91, ptr %90, align 8, !tbaa !5
%92 = getelementptr inbounds %struct.smsdevice_params_t, ptr %0, i64 0, i32 4
%93 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 4
%94 = load <4 x i32>, ptr %92, align 4, !tbaa !5
store <4 x i32> %94, ptr %93, align 8, !tbaa !5
%95 = getelementptr inbounds %struct.smscore_device_t, ptr %4, i64 0, i32 3
%96 = load i32, ptr %95, align 4, !tbaa !22
%97 = getelementptr inbounds %struct.smsdevice_params_t, ptr %0, i64 0, i32 3
%98 = load i32, ptr %97, align 4, !tbaa !23
%99 = tail call i32 @strcpy(i32 noundef %96, i32 noundef %98) #2
%100 = load i32, ptr %95, align 4, !tbaa !22
%101 = getelementptr inbounds %struct.smsdevice_params_t, ptr %0, i64 0, i32 2
%102 = load i32, ptr %101, align 4, !tbaa !24
%103 = tail call i32 @smscore_registry_settype(i32 noundef %100, i32 noundef %102) #2
%104 = tail call i32 @kmutex_lock(ptr noundef nonnull @g_smscore_deviceslock) #2
%105 = tail call i32 @list_add(ptr noundef nonnull %11, ptr noundef nonnull @g_smscore_devices) #2
%106 = tail call i32 @kmutex_unlock(ptr noundef nonnull @g_smscore_deviceslock) #2
store ptr %4, ptr %1, align 8, !tbaa !25
%107 = tail call i32 (ptr, ...) @sms_info(ptr noundef nonnull @.str.2, ptr noundef nonnull %4) #2
br label %108
108: ; preds = %70, %84, %60, %6
%109 = phi i32 [ 0, %84 ], [ %63, %60 ], [ %9, %6 ], [ %73, %70 ]
ret i32 %109
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sms_info(ptr noundef, ...) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
declare i32 @init_completion(ptr noundef) local_unnamed_addr #1
declare i32 @init_waitqueue_head(ptr noundef) local_unnamed_addr #1
declare ptr @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smscore_unregister_device(ptr noundef) local_unnamed_addr #1
declare ptr @smscore_createbuffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smscore_putbuffer(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smscore_registry_settype(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kmutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kmutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"smsdevice_params_t", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44}
!11 = !{!10, !6, i64 4}
!12 = !{!13, !6, i64 0}
!13 = !{!"smscore_device_t", !6, i64 0, !14, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !15, i64 64, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128}
!14 = !{!"long", !7, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!13, !15, i64 64}
!17 = !{!13, !14, i64 8}
!18 = !{!13, !6, i64 60}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!13, !6, i64 56}
!22 = !{!13, !6, i64 20}
!23 = !{!10, !6, i64 12}
!24 = !{!10, !6, i64 8}
!25 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/dvb/siano/extr_smscoreapi.c_smscore_register_device.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/dvb/siano/extr_smscoreapi.c_smscore_register_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [20 x i8] c"kzalloc(...) failed\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@GFP_DMA = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"allocated %d buffers\00", align 1
@DEVICE_MODE_NONE = common local_unnamed_addr global i32 0, align 4
@g_smscore_deviceslock = common global i32 0, align 4
@g_smscore_devices = common global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"device %p created\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @smscore_register_device(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%4 = tail call ptr @kzalloc(i32 noundef 136, i32 noundef %3) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i32 (ptr, ...) @sms_info(ptr noundef nonnull @.str) #2
%8 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%9 = sub nsw i32 0, %8
br label %108
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %4, i64 16
%12 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %11) #2
%13 = getelementptr inbounds i8, ptr %4, i64 128
%14 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %13) #2
%15 = getelementptr inbounds i8, ptr %4, i64 124
%16 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %15) #2
%17 = getelementptr inbounds i8, ptr %4, i64 120
%18 = tail call i32 @spin_lock_init(ptr noundef nonnull %17) #2
%19 = getelementptr inbounds i8, ptr %4, i64 116
%20 = tail call i32 @spin_lock_init(ptr noundef nonnull %19) #2
%21 = getelementptr inbounds i8, ptr %4, i64 112
%22 = tail call i32 @init_completion(ptr noundef nonnull %21) #2
%23 = getelementptr inbounds i8, ptr %4, i64 108
%24 = tail call i32 @init_completion(ptr noundef nonnull %23) #2
%25 = getelementptr inbounds i8, ptr %4, i64 104
%26 = tail call i32 @init_completion(ptr noundef nonnull %25) #2
%27 = getelementptr inbounds i8, ptr %4, i64 100
%28 = tail call i32 @init_completion(ptr noundef nonnull %27) #2
%29 = getelementptr inbounds i8, ptr %4, i64 96
%30 = tail call i32 @init_completion(ptr noundef nonnull %29) #2
%31 = getelementptr inbounds i8, ptr %4, i64 92
%32 = tail call i32 @init_completion(ptr noundef nonnull %31) #2
%33 = getelementptr inbounds i8, ptr %4, i64 88
%34 = tail call i32 @init_completion(ptr noundef nonnull %33) #2
%35 = getelementptr inbounds i8, ptr %4, i64 84
%36 = tail call i32 @init_completion(ptr noundef nonnull %35) #2
%37 = getelementptr inbounds i8, ptr %4, i64 80
%38 = tail call i32 @init_completion(ptr noundef nonnull %37) #2
%39 = getelementptr inbounds i8, ptr %4, i64 76
%40 = tail call i32 @init_completion(ptr noundef nonnull %39) #2
%41 = getelementptr inbounds i8, ptr %4, i64 72
%42 = tail call i32 @init_waitqueue_head(ptr noundef nonnull %41) #2
%43 = load i32, ptr %0, align 4, !tbaa !10
%44 = getelementptr inbounds i8, ptr %0, i64 4
%45 = load i32, ptr %44, align 4, !tbaa !12
%46 = mul nsw i32 %45, %43
store i32 %46, ptr %4, align 8, !tbaa !13
%47 = getelementptr inbounds i8, ptr %4, i64 60
%48 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%49 = load i32, ptr @GFP_DMA, align 4, !tbaa !6
%50 = or i32 %49, %48
%51 = tail call ptr @dma_alloc_coherent(ptr noundef null, i32 noundef %46, ptr noundef nonnull %47, i32 noundef %50) #2
%52 = getelementptr inbounds i8, ptr %4, i64 64
store ptr %51, ptr %52, align 8, !tbaa !17
%53 = icmp eq ptr %51, null
br i1 %53, label %60, label %54
54: ; preds = %10
%55 = getelementptr inbounds i8, ptr %4, i64 8
%56 = load i64, ptr %55, align 8, !tbaa !18
%57 = load i32, ptr %44, align 4, !tbaa !12
%58 = sext i32 %57 to i64
%59 = icmp slt i64 %56, %58
br i1 %59, label %64, label %84
60: ; preds = %10
%61 = tail call i32 @smscore_unregister_device(ptr noundef nonnull %4) #2
%62 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%63 = sub nsw i32 0, %62
br label %108
64: ; preds = %54, %74
%65 = phi ptr [ %80, %74 ], [ %51, %54 ]
%66 = load ptr, ptr %52, align 8, !tbaa !17
%67 = load i32, ptr %47, align 4, !tbaa !19
%68 = tail call ptr @smscore_createbuffer(ptr noundef %65, ptr noundef %66, i32 noundef %67) #2
%69 = icmp eq ptr %68, null
br i1 %69, label %70, label %74
70: ; preds = %64
%71 = tail call i32 @smscore_unregister_device(ptr noundef nonnull %4) #2
%72 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%73 = sub nsw i32 0, %72
br label %108
74: ; preds = %64
%75 = tail call i32 @smscore_putbuffer(ptr noundef nonnull %4, ptr noundef nonnull %68) #2
%76 = load i64, ptr %55, align 8, !tbaa !18
%77 = add nsw i64 %76, 1
store i64 %77, ptr %55, align 8, !tbaa !18
%78 = load i32, ptr %0, align 4, !tbaa !10
%79 = sext i32 %78 to i64
%80 = getelementptr inbounds i32, ptr %65, i64 %79
%81 = load i32, ptr %44, align 4, !tbaa !12
%82 = sext i32 %81 to i64
%83 = icmp slt i64 %77, %82
br i1 %83, label %64, label %84, !llvm.loop !20
84: ; preds = %74, %54
%85 = phi i64 [ %56, %54 ], [ %77, %74 ]
%86 = tail call i32 (ptr, ...) @sms_info(ptr noundef nonnull @.str.1, i64 noundef %85) #2
%87 = load i32, ptr @DEVICE_MODE_NONE, align 4, !tbaa !6
%88 = getelementptr inbounds i8, ptr %4, i64 56
store i32 %87, ptr %88, align 8, !tbaa !22
%89 = getelementptr inbounds i8, ptr %0, i64 32
%90 = getelementptr inbounds i8, ptr %4, i64 40
%91 = load <4 x i32>, ptr %89, align 4, !tbaa !6
store <4 x i32> %91, ptr %90, align 8, !tbaa !6
%92 = getelementptr inbounds i8, ptr %0, i64 16
%93 = getelementptr inbounds i8, ptr %4, i64 24
%94 = load <4 x i32>, ptr %92, align 4, !tbaa !6
store <4 x i32> %94, ptr %93, align 8, !tbaa !6
%95 = getelementptr inbounds i8, ptr %4, i64 20
%96 = load i32, ptr %95, align 4, !tbaa !23
%97 = getelementptr inbounds i8, ptr %0, i64 12
%98 = load i32, ptr %97, align 4, !tbaa !24
%99 = tail call i32 @strcpy(i32 noundef %96, i32 noundef %98) #2
%100 = load i32, ptr %95, align 4, !tbaa !23
%101 = getelementptr inbounds i8, ptr %0, i64 8
%102 = load i32, ptr %101, align 4, !tbaa !25
%103 = tail call i32 @smscore_registry_settype(i32 noundef %100, i32 noundef %102) #2
%104 = tail call i32 @kmutex_lock(ptr noundef nonnull @g_smscore_deviceslock) #2
%105 = tail call i32 @list_add(ptr noundef nonnull %11, ptr noundef nonnull @g_smscore_devices) #2
%106 = tail call i32 @kmutex_unlock(ptr noundef nonnull @g_smscore_deviceslock) #2
store ptr %4, ptr %1, align 8, !tbaa !26
%107 = tail call i32 (ptr, ...) @sms_info(ptr noundef nonnull @.str.2, ptr noundef nonnull %4) #2
br label %108
108: ; preds = %70, %84, %60, %6
%109 = phi i32 [ 0, %84 ], [ %63, %60 ], [ %9, %6 ], [ %73, %70 ]
ret i32 %109
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sms_info(ptr noundef, ...) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
declare i32 @init_completion(ptr noundef) local_unnamed_addr #1
declare i32 @init_waitqueue_head(ptr noundef) local_unnamed_addr #1
declare ptr @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smscore_unregister_device(ptr noundef) local_unnamed_addr #1
declare ptr @smscore_createbuffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smscore_putbuffer(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @strcpy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @smscore_registry_settype(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kmutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kmutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"smsdevice_params_t", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44}
!12 = !{!11, !7, i64 4}
!13 = !{!14, !7, i64 0}
!14 = !{!"smscore_device_t", !7, i64 0, !15, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !16, i64 64, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128}
!15 = !{!"long", !8, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!14, !16, i64 64}
!18 = !{!14, !15, i64 8}
!19 = !{!14, !7, i64 60}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!14, !7, i64 56}
!23 = !{!14, !7, i64 20}
!24 = !{!11, !7, i64 12}
!25 = !{!11, !7, i64 8}
!26 = !{!16, !16, i64 0}
| fastsocket_kernel_drivers_media_dvb_siano_extr_smscoreapi.c_smscore_register_device |
; ModuleID = 'AnghaBench/RetroArch/wii/libogc/lwbt/extr_bte.c_bt_alarmhandler.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/lwbt/extr_bte.c_bt_alarmhandler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@l2cap_tmr = dso_local local_unnamed_addr global i64 0, align 8
@ppc_stack = dso_local local_unnamed_addr global ptr null, align 8
@STACKSIZE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @bt_alarmhandler], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bt_alarmhandler(i32 %0, ptr nocapture readnone %1) #0 {
%3 = tail call i32 (...) @__lwp_thread_dispatchdisable() #2
%4 = load i64, ptr @l2cap_tmr, align 8, !tbaa !5
%5 = trunc i64 %4 to i32
%6 = load ptr, ptr @ppc_stack, align 8, !tbaa !9
%7 = load i64, ptr @STACKSIZE, align 8, !tbaa !5
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = ptrtoint ptr %8 to i64
%10 = trunc i64 %9 to i32
%11 = tail call i32 @SYS_SwitchFiber(i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef %5, i32 noundef %10) #2
%12 = tail call i32 (...) @__lwp_thread_dispatchunnest() #2
ret void
}
declare i32 @__lwp_thread_dispatchdisable(...) local_unnamed_addr #1
declare i32 @SYS_SwitchFiber(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__lwp_thread_dispatchunnest(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/wii/libogc/lwbt/extr_bte.c_bt_alarmhandler.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/lwbt/extr_bte.c_bt_alarmhandler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@l2cap_tmr = common local_unnamed_addr global i64 0, align 8
@ppc_stack = common local_unnamed_addr global ptr null, align 8
@STACKSIZE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @bt_alarmhandler], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bt_alarmhandler(i32 %0, ptr nocapture readnone %1) #0 {
%3 = tail call i32 @__lwp_thread_dispatchdisable() #2
%4 = load i64, ptr @l2cap_tmr, align 8, !tbaa !6
%5 = trunc i64 %4 to i32
%6 = load ptr, ptr @ppc_stack, align 8, !tbaa !10
%7 = load i64, ptr @STACKSIZE, align 8, !tbaa !6
%8 = getelementptr inbounds i32, ptr %6, i64 %7
%9 = ptrtoint ptr %8 to i64
%10 = trunc i64 %9 to i32
%11 = tail call i32 @SYS_SwitchFiber(i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef %5, i32 noundef %10) #2
%12 = tail call i32 @__lwp_thread_dispatchunnest() #2
ret void
}
declare i32 @__lwp_thread_dispatchdisable(...) local_unnamed_addr #1
declare i32 @SYS_SwitchFiber(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__lwp_thread_dispatchunnest(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| RetroArch_wii_libogc_lwbt_extr_bte.c_bt_alarmhandler |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_radio_2056.c_b2056_upload_inittabs.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_radio_2056.c_b2056_upload_inittabs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.b2056_inittabs_pts = type { i32, i32, i32, i32, i32, i32 }
@b2056_inittabs = dso_local local_unnamed_addr global ptr null, align 8
@B2056_SYN = dso_local local_unnamed_addr global i32 0, align 4
@B2056_TX0 = dso_local local_unnamed_addr global i32 0, align 4
@B2056_TX1 = dso_local local_unnamed_addr global i32 0, align 4
@B2056_RX0 = dso_local local_unnamed_addr global i32 0, align 4
@B2056_RX1 = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @b2056_upload_inittabs(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr %0, align 8, !tbaa !5
%5 = load ptr, ptr @b2056_inittabs, align 8, !tbaa !11
%6 = tail call i64 @ARRAY_SIZE(ptr noundef %5) #2
%7 = icmp ult i64 %4, %6
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @B43_WARN_ON(i32 noundef 1) #2
br label %39
10: ; preds = %3
%11 = load ptr, ptr @b2056_inittabs, align 8, !tbaa !11
%12 = load i64, ptr %0, align 8, !tbaa !5
%13 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12
%14 = load i32, ptr @B2056_SYN, align 4, !tbaa !13
%15 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12, i32 5
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12, i32 4
%18 = load i32, ptr %17, align 4, !tbaa !17
%19 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %14, i32 noundef %16, i32 noundef %18) #2
%20 = load i32, ptr @B2056_TX0, align 4, !tbaa !13
%21 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12, i32 3
%22 = load i32, ptr %21, align 4, !tbaa !18
%23 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12, i32 2
%24 = load i32, ptr %23, align 4, !tbaa !19
%25 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %20, i32 noundef %22, i32 noundef %24) #2
%26 = load i32, ptr @B2056_TX1, align 4, !tbaa !13
%27 = load i32, ptr %21, align 4, !tbaa !18
%28 = load i32, ptr %23, align 4, !tbaa !19
%29 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %26, i32 noundef %27, i32 noundef %28) #2
%30 = load i32, ptr @B2056_RX0, align 4, !tbaa !13
%31 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12, i32 1
%32 = load i32, ptr %31, align 4, !tbaa !20
%33 = load i32, ptr %13, align 4, !tbaa !21
%34 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %30, i32 noundef %32, i32 noundef %33) #2
%35 = load i32, ptr @B2056_RX1, align 4, !tbaa !13
%36 = load i32, ptr %31, align 4, !tbaa !20
%37 = load i32, ptr %13, align 4, !tbaa !21
%38 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %35, i32 noundef %36, i32 noundef %37) #2
br label %39
39: ; preds = %10, %8
ret void
}
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @B43_WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @b2056_upload_inittab(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"b43_wldev", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !14, i64 20}
!16 = !{!"b2056_inittabs_pts", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20}
!17 = !{!16, !14, i64 16}
!18 = !{!16, !14, i64 12}
!19 = !{!16, !14, i64 8}
!20 = !{!16, !14, i64 4}
!21 = !{!16, !14, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_radio_2056.c_b2056_upload_inittabs.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_radio_2056.c_b2056_upload_inittabs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.b2056_inittabs_pts = type { i32, i32, i32, i32, i32, i32 }
@b2056_inittabs = common local_unnamed_addr global ptr null, align 8
@B2056_SYN = common local_unnamed_addr global i32 0, align 4
@B2056_TX0 = common local_unnamed_addr global i32 0, align 4
@B2056_TX1 = common local_unnamed_addr global i32 0, align 4
@B2056_RX0 = common local_unnamed_addr global i32 0, align 4
@B2056_RX1 = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @b2056_upload_inittabs(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i64, ptr %0, align 8, !tbaa !6
%5 = load ptr, ptr @b2056_inittabs, align 8, !tbaa !12
%6 = tail call i64 @ARRAY_SIZE(ptr noundef %5) #2
%7 = icmp ult i64 %4, %6
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @B43_WARN_ON(i32 noundef 1) #2
br label %39
10: ; preds = %3
%11 = load ptr, ptr @b2056_inittabs, align 8, !tbaa !12
%12 = load i64, ptr %0, align 8, !tbaa !6
%13 = getelementptr inbounds %struct.b2056_inittabs_pts, ptr %11, i64 %12
%14 = load i32, ptr @B2056_SYN, align 4, !tbaa !14
%15 = getelementptr inbounds i8, ptr %13, i64 20
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = getelementptr inbounds i8, ptr %13, i64 16
%18 = load i32, ptr %17, align 4, !tbaa !18
%19 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %14, i32 noundef %16, i32 noundef %18) #2
%20 = load i32, ptr @B2056_TX0, align 4, !tbaa !14
%21 = getelementptr inbounds i8, ptr %13, i64 12
%22 = load i32, ptr %21, align 4, !tbaa !19
%23 = getelementptr inbounds i8, ptr %13, i64 8
%24 = load i32, ptr %23, align 4, !tbaa !20
%25 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %20, i32 noundef %22, i32 noundef %24) #2
%26 = load i32, ptr @B2056_TX1, align 4, !tbaa !14
%27 = load i32, ptr %21, align 4, !tbaa !19
%28 = load i32, ptr %23, align 4, !tbaa !20
%29 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %26, i32 noundef %27, i32 noundef %28) #2
%30 = load i32, ptr @B2056_RX0, align 4, !tbaa !14
%31 = getelementptr inbounds i8, ptr %13, i64 4
%32 = load i32, ptr %31, align 4, !tbaa !21
%33 = load i32, ptr %13, align 4, !tbaa !22
%34 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %30, i32 noundef %32, i32 noundef %33) #2
%35 = load i32, ptr @B2056_RX1, align 4, !tbaa !14
%36 = load i32, ptr %31, align 4, !tbaa !21
%37 = load i32, ptr %13, align 4, !tbaa !22
%38 = tail call i32 @b2056_upload_inittab(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %35, i32 noundef %36, i32 noundef %37) #2
br label %39
39: ; preds = %10, %8
ret void
}
declare i64 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @B43_WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @b2056_upload_inittab(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"b43_wldev", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !10, i64 0}
!16 = !{!17, !15, i64 20}
!17 = !{!"b2056_inittabs_pts", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20}
!18 = !{!17, !15, i64 16}
!19 = !{!17, !15, i64 12}
!20 = !{!17, !15, i64 8}
!21 = !{!17, !15, i64 4}
!22 = !{!17, !15, i64 0}
| fastsocket_kernel_drivers_net_wireless_b43_extr_radio_2056.c_b2056_upload_inittabs |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/cxgbi/extr_libcxgbi.h_cxgbi_sock_set_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/cxgbi/extr_libcxgbi.h_cxgbi_sock_set_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cxgbi_sock = type { i32, i32 }
@CXGBI_DBG_SOCK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"csk 0x%p,%u,0x%lx, state -> %u.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @cxgbi_sock_set_state], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @cxgbi_sock_set_state(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @CXGBI_DBG_SOCK, align 4, !tbaa !5
%4 = shl nuw i32 1, %3
%5 = load i32, ptr %0, align 4, !tbaa !9
%6 = getelementptr inbounds %struct.cxgbi_sock, ptr %0, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = tail call i32 @log_debug(i32 noundef %4, ptr noundef nonnull @.str, ptr noundef nonnull %0, i32 noundef %5, i32 noundef %7, i32 noundef %1) #2
store i32 %1, ptr %0, align 4, !tbaa !9
ret void
}
declare i32 @log_debug(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"cxgbi_sock", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/cxgbi/extr_libcxgbi.h_cxgbi_sock_set_state.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/cxgbi/extr_libcxgbi.h_cxgbi_sock_set_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CXGBI_DBG_SOCK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"csk 0x%p,%u,0x%lx, state -> %u.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @cxgbi_sock_set_state], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @cxgbi_sock_set_state(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @CXGBI_DBG_SOCK, align 4, !tbaa !6
%4 = shl nuw i32 1, %3
%5 = load i32, ptr %0, align 4, !tbaa !10
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = tail call i32 @log_debug(i32 noundef %4, ptr noundef nonnull @.str, ptr noundef nonnull %0, i32 noundef %5, i32 noundef %7, i32 noundef %1) #2
store i32 %1, ptr %0, align 4, !tbaa !10
ret void
}
declare i32 @log_debug(i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"cxgbi_sock", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
| fastsocket_kernel_drivers_scsi_cxgbi_extr_libcxgbi.h_cxgbi_sock_set_state |
; ModuleID = 'AnghaBench/reactos/dll/win32/msi/extr_msipriv.h_msi_free.c'
source_filename = "AnghaBench/reactos/dll/win32/msi/extr_msipriv.h_msi_free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @msi_free], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @msi_free(ptr noundef %0) #0 {
%2 = tail call i32 (...) @GetProcessHeap() #2
%3 = tail call i32 @HeapFree(i32 noundef %2, i32 noundef 0, ptr noundef %0) #2
ret i32 %3
}
declare i32 @HeapFree(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @GetProcessHeap(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/reactos/dll/win32/msi/extr_msipriv.h_msi_free.c'
source_filename = "AnghaBench/reactos/dll/win32/msi/extr_msipriv.h_msi_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @msi_free], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @msi_free(ptr noundef %0) #0 {
%2 = tail call i32 @GetProcessHeap() #2
%3 = tail call i32 @HeapFree(i32 noundef %2, i32 noundef 0, ptr noundef %0) #2
ret i32 %3
}
declare i32 @HeapFree(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @GetProcessHeap(...) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| reactos_dll_win32_msi_extr_msipriv.h_msi_free |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_qp.c_alloc_qpn.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_qp.c_alloc_qpn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qib_qpn_table = type { i32, i32, i32, i32, ptr, i32 }
%struct.qpn_map = type { i32 }
@IB_QPT_SMI = dso_local local_unnamed_addr global i32 0, align 4
@IB_QPT_GSI = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@QPN_MAX = dso_local local_unnamed_addr global i32 0, align 4
@BITS_PER_PAGE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@BITS_PER_PAGE = dso_local local_unnamed_addr global i32 0, align 4
@QPNMAP_ENTRIES = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @alloc_qpn], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @alloc_qpn(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr @IB_QPT_SMI, align 4, !tbaa !5
%6 = icmp eq i32 %5, %2
%7 = load i32, ptr @IB_QPT_GSI, align 4
%8 = icmp eq i32 %7, %2
%9 = select i1 %6, i1 true, i1 %8
br i1 %9, label %10, label %29
10: ; preds = %4
%11 = zext i1 %8 to i32
%12 = shl i32 %3, 1
%13 = add i32 %12, -2
%14 = or disjoint i32 %13, %11
%15 = shl nuw i32 1, %14
%16 = getelementptr inbounds %struct.qib_qpn_table, ptr %1, i64 0, i32 5
%17 = tail call i32 @spin_lock(ptr noundef nonnull %16) #2
%18 = load i32, ptr %1, align 8, !tbaa !9
%19 = and i32 %18, %15
%20 = icmp eq i32 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %10
%22 = load i32, ptr @EINVAL, align 4, !tbaa !5
%23 = sub nsw i32 0, %22
br label %26
24: ; preds = %10
%25 = or i32 %18, %15
store i32 %25, ptr %1, align 8, !tbaa !9
br label %26
26: ; preds = %24, %21
%27 = phi i32 [ %23, %21 ], [ %11, %24 ]
%28 = tail call i32 @spin_unlock(ptr noundef nonnull %16) #2
br label %127
29: ; preds = %4
%30 = getelementptr inbounds %struct.qib_qpn_table, ptr %1, i64 0, i32 1
%31 = load i32, ptr %30, align 4, !tbaa !12
%32 = add nsw i32 %31, 2
%33 = load i32, ptr @QPN_MAX, align 4, !tbaa !5
%34 = icmp slt i32 %32, %33
%35 = select i1 %34, i32 %32, i32 2
%36 = getelementptr inbounds %struct.qib_qpn_table, ptr %1, i64 0, i32 2
%37 = load i32, ptr %36, align 8, !tbaa !13
%38 = icmp eq i32 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %29
%40 = and i32 %35, %37
%41 = ashr i32 %40, 1
%42 = load i32, ptr %0, align 4, !tbaa !14
%43 = icmp slt i32 %41, %42
br i1 %43, label %47, label %44
44: ; preds = %39
%45 = or i32 %35, %37
%46 = add nsw i32 %45, 2
br label %47
47: ; preds = %44, %39, %29
%48 = phi i32 [ %46, %44 ], [ %35, %39 ], [ %35, %29 ]
%49 = load i32, ptr @BITS_PER_PAGE_MASK, align 4, !tbaa !5
%50 = and i32 %49, %48
%51 = getelementptr inbounds %struct.qib_qpn_table, ptr %1, i64 0, i32 4
%52 = load ptr, ptr %51, align 8, !tbaa !16
%53 = load i32, ptr @BITS_PER_PAGE, align 4, !tbaa !5
%54 = sdiv i32 %48, %53
%55 = sext i32 %54 to i64
%56 = getelementptr inbounds %struct.qpn_map, ptr %52, i64 %55
%57 = getelementptr inbounds %struct.qib_qpn_table, ptr %1, i64 0, i32 3
%58 = load i32, ptr %57, align 4, !tbaa !17
%59 = icmp eq i32 %50, 0
%60 = sext i1 %59 to i32
%61 = add i32 %58, %60
br label %62
62: ; preds = %120, %47
%63 = phi i32 [ %50, %47 ], [ %121, %120 ]
%64 = phi i32 [ 0, %47 ], [ %100, %120 ]
%65 = phi i32 [ %48, %47 ], [ %123, %120 ]
%66 = phi ptr [ %56, %47 ], [ %122, %120 ]
%67 = load i32, ptr %66, align 4, !tbaa !18
%68 = icmp eq i32 %67, 0
%69 = zext i1 %68 to i32
%70 = tail call i64 @unlikely(i32 noundef %69) #2
%71 = icmp eq i64 %70, 0
br i1 %71, label %79, label %72
72: ; preds = %62
%73 = tail call i32 @get_map_page(ptr noundef nonnull %1, ptr noundef nonnull %66) #2
%74 = load i32, ptr %66, align 4, !tbaa !18
%75 = icmp eq i32 %74, 0
%76 = zext i1 %75 to i32
%77 = tail call i64 @unlikely(i32 noundef %76) #2
%78 = icmp eq i64 %77, 0
br i1 %78, label %79, label %124
79: ; preds = %72, %62
%80 = load i32, ptr %66, align 4, !tbaa !18
%81 = tail call i32 @test_and_set_bit(i32 noundef %63, i32 noundef %80) #2
%82 = icmp eq i32 %81, 0
br i1 %82, label %87, label %89
83: ; preds = %89
%84 = load i32, ptr %66, align 4, !tbaa !18
%85 = tail call i32 @test_and_set_bit(i32 noundef %92, i32 noundef %84) #2
%86 = icmp eq i32 %85, 0
br i1 %86, label %87, label %89, !llvm.loop !20
87: ; preds = %79, %83
%88 = phi i32 [ %93, %83 ], [ %65, %79 ]
store i32 %88, ptr %30, align 4, !tbaa !12
br label %127
89: ; preds = %79, %83
%90 = phi i32 [ %92, %83 ], [ %63, %79 ]
%91 = load i32, ptr %0, align 4, !tbaa !14
%92 = tail call i32 @find_next_offset(ptr noundef %1, ptr noundef nonnull %66, i32 noundef %90, i32 noundef %91) #2
%93 = tail call i32 @mk_qpn(ptr noundef %1, ptr noundef nonnull %66, i32 noundef %92) #2
%94 = load i32, ptr @BITS_PER_PAGE, align 4, !tbaa !5
%95 = icmp slt i32 %92, %94
%96 = load i32, ptr @QPN_MAX, align 4
%97 = icmp slt i32 %93, %96
%98 = select i1 %95, i1 %97, i1 false
br i1 %98, label %83, label %99, !llvm.loop !20
99: ; preds = %89
%100 = add nuw nsw i32 %64, 1
%101 = icmp slt i32 %64, %61
br i1 %101, label %111, label %102
102: ; preds = %99
%103 = load i32, ptr %57, align 4, !tbaa !17
%104 = load i32, ptr @QPNMAP_ENTRIES, align 4, !tbaa !5
%105 = icmp eq i32 %103, %104
br i1 %105, label %124, label %106
106: ; preds = %102
%107 = load ptr, ptr %51, align 8, !tbaa !16
%108 = add nsw i32 %103, 1
store i32 %108, ptr %57, align 4, !tbaa !17
%109 = sext i32 %103 to i64
%110 = getelementptr inbounds %struct.qpn_map, ptr %107, i64 %109
br label %120
111: ; preds = %99
%112 = load ptr, ptr %51, align 8, !tbaa !16
%113 = load i32, ptr %57, align 4, !tbaa !17
%114 = sext i32 %113 to i64
%115 = getelementptr inbounds %struct.qpn_map, ptr %112, i64 %114
%116 = icmp ult ptr %66, %115
%117 = getelementptr inbounds %struct.qpn_map, ptr %66, i64 1
%118 = select i1 %116, i32 0, i32 2
%119 = select i1 %116, ptr %117, ptr %112
br label %120
120: ; preds = %111, %106
%121 = phi i32 [ 0, %106 ], [ %118, %111 ]
%122 = phi ptr [ %110, %106 ], [ %119, %111 ]
%123 = tail call i32 @mk_qpn(ptr noundef nonnull %1, ptr noundef %122, i32 noundef %121) #2
br label %62
124: ; preds = %102, %72
%125 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%126 = sub nsw i32 0, %125
br label %127
127: ; preds = %87, %124, %26
%128 = phi i32 [ %27, %26 ], [ %126, %124 ], [ %88, %87 ]
ret i32 %128
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @get_map_page(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @test_and_set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @find_next_offset(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mk_qpn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"qib_qpn_table", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16, !6, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!10, !6, i64 8}
!14 = !{!15, !6, i64 0}
!15 = !{!"qib_devdata", !6, i64 0}
!16 = !{!10, !11, i64 16}
!17 = !{!10, !6, i64 12}
!18 = !{!19, !6, i64 0}
!19 = !{!"qpn_map", !6, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_qp.c_alloc_qpn.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_qp.c_alloc_qpn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.qpn_map = type { i32 }
@IB_QPT_SMI = common local_unnamed_addr global i32 0, align 4
@IB_QPT_GSI = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@QPN_MAX = common local_unnamed_addr global i32 0, align 4
@BITS_PER_PAGE_MASK = common local_unnamed_addr global i32 0, align 4
@BITS_PER_PAGE = common local_unnamed_addr global i32 0, align 4
@QPNMAP_ENTRIES = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @alloc_qpn], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @alloc_qpn(ptr nocapture noundef readonly %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr @IB_QPT_SMI, align 4, !tbaa !6
%6 = icmp eq i32 %5, %2
%7 = load i32, ptr @IB_QPT_GSI, align 4
%8 = icmp eq i32 %7, %2
%9 = select i1 %6, i1 true, i1 %8
br i1 %9, label %10, label %29
10: ; preds = %4
%11 = zext i1 %8 to i32
%12 = shl i32 %3, 1
%13 = add i32 %12, -2
%14 = or disjoint i32 %13, %11
%15 = shl nuw i32 1, %14
%16 = getelementptr inbounds i8, ptr %1, i64 24
%17 = tail call i32 @spin_lock(ptr noundef nonnull %16) #2
%18 = load i32, ptr %1, align 8, !tbaa !10
%19 = and i32 %18, %15
%20 = icmp eq i32 %19, 0
br i1 %20, label %24, label %21
21: ; preds = %10
%22 = load i32, ptr @EINVAL, align 4, !tbaa !6
%23 = sub nsw i32 0, %22
br label %26
24: ; preds = %10
%25 = or i32 %18, %15
store i32 %25, ptr %1, align 8, !tbaa !10
br label %26
26: ; preds = %24, %21
%27 = phi i32 [ %23, %21 ], [ %11, %24 ]
%28 = tail call i32 @spin_unlock(ptr noundef nonnull %16) #2
br label %127
29: ; preds = %4
%30 = getelementptr inbounds i8, ptr %1, i64 4
%31 = load i32, ptr %30, align 4, !tbaa !13
%32 = add nsw i32 %31, 2
%33 = load i32, ptr @QPN_MAX, align 4, !tbaa !6
%34 = icmp slt i32 %32, %33
%35 = select i1 %34, i32 %32, i32 2
%36 = getelementptr inbounds i8, ptr %1, i64 8
%37 = load i32, ptr %36, align 8, !tbaa !14
%38 = icmp eq i32 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %29
%40 = and i32 %35, %37
%41 = ashr i32 %40, 1
%42 = load i32, ptr %0, align 4, !tbaa !15
%43 = icmp slt i32 %41, %42
br i1 %43, label %47, label %44
44: ; preds = %39
%45 = or i32 %35, %37
%46 = add nsw i32 %45, 2
br label %47
47: ; preds = %44, %39, %29
%48 = phi i32 [ %46, %44 ], [ %35, %39 ], [ %35, %29 ]
%49 = load i32, ptr @BITS_PER_PAGE_MASK, align 4, !tbaa !6
%50 = and i32 %49, %48
%51 = getelementptr inbounds i8, ptr %1, i64 16
%52 = load ptr, ptr %51, align 8, !tbaa !17
%53 = load i32, ptr @BITS_PER_PAGE, align 4, !tbaa !6
%54 = sdiv i32 %48, %53
%55 = sext i32 %54 to i64
%56 = getelementptr inbounds %struct.qpn_map, ptr %52, i64 %55
%57 = getelementptr inbounds i8, ptr %1, i64 12
%58 = load i32, ptr %57, align 4, !tbaa !18
%59 = icmp eq i32 %50, 0
%60 = sext i1 %59 to i32
%61 = add i32 %58, %60
br label %62
62: ; preds = %120, %47
%63 = phi i32 [ %50, %47 ], [ %121, %120 ]
%64 = phi i32 [ 0, %47 ], [ %100, %120 ]
%65 = phi i32 [ %48, %47 ], [ %123, %120 ]
%66 = phi ptr [ %56, %47 ], [ %122, %120 ]
%67 = load i32, ptr %66, align 4, !tbaa !19
%68 = icmp eq i32 %67, 0
%69 = zext i1 %68 to i32
%70 = tail call i64 @unlikely(i32 noundef %69) #2
%71 = icmp eq i64 %70, 0
br i1 %71, label %79, label %72
72: ; preds = %62
%73 = tail call i32 @get_map_page(ptr noundef nonnull %1, ptr noundef nonnull %66) #2
%74 = load i32, ptr %66, align 4, !tbaa !19
%75 = icmp eq i32 %74, 0
%76 = zext i1 %75 to i32
%77 = tail call i64 @unlikely(i32 noundef %76) #2
%78 = icmp eq i64 %77, 0
br i1 %78, label %79, label %124
79: ; preds = %72, %62
%80 = load i32, ptr %66, align 4, !tbaa !19
%81 = tail call i32 @test_and_set_bit(i32 noundef %63, i32 noundef %80) #2
%82 = icmp eq i32 %81, 0
br i1 %82, label %87, label %89
83: ; preds = %89
%84 = load i32, ptr %66, align 4, !tbaa !19
%85 = tail call i32 @test_and_set_bit(i32 noundef %92, i32 noundef %84) #2
%86 = icmp eq i32 %85, 0
br i1 %86, label %87, label %89, !llvm.loop !21
87: ; preds = %79, %83
%88 = phi i32 [ %93, %83 ], [ %65, %79 ]
store i32 %88, ptr %30, align 4, !tbaa !13
br label %127
89: ; preds = %79, %83
%90 = phi i32 [ %92, %83 ], [ %63, %79 ]
%91 = load i32, ptr %0, align 4, !tbaa !15
%92 = tail call i32 @find_next_offset(ptr noundef %1, ptr noundef nonnull %66, i32 noundef %90, i32 noundef %91) #2
%93 = tail call i32 @mk_qpn(ptr noundef %1, ptr noundef nonnull %66, i32 noundef %92) #2
%94 = load i32, ptr @BITS_PER_PAGE, align 4, !tbaa !6
%95 = icmp slt i32 %92, %94
%96 = load i32, ptr @QPN_MAX, align 4
%97 = icmp slt i32 %93, %96
%98 = select i1 %95, i1 %97, i1 false
br i1 %98, label %83, label %99, !llvm.loop !21
99: ; preds = %89
%100 = add nuw nsw i32 %64, 1
%101 = icmp slt i32 %64, %61
br i1 %101, label %111, label %102
102: ; preds = %99
%103 = load i32, ptr %57, align 4, !tbaa !18
%104 = load i32, ptr @QPNMAP_ENTRIES, align 4, !tbaa !6
%105 = icmp eq i32 %103, %104
br i1 %105, label %124, label %106
106: ; preds = %102
%107 = load ptr, ptr %51, align 8, !tbaa !17
%108 = add nsw i32 %103, 1
store i32 %108, ptr %57, align 4, !tbaa !18
%109 = sext i32 %103 to i64
%110 = getelementptr inbounds %struct.qpn_map, ptr %107, i64 %109
br label %120
111: ; preds = %99
%112 = load ptr, ptr %51, align 8, !tbaa !17
%113 = load i32, ptr %57, align 4, !tbaa !18
%114 = sext i32 %113 to i64
%115 = getelementptr inbounds %struct.qpn_map, ptr %112, i64 %114
%116 = icmp ult ptr %66, %115
%117 = getelementptr inbounds i8, ptr %66, i64 4
%118 = select i1 %116, i32 0, i32 2
%119 = select i1 %116, ptr %117, ptr %112
br label %120
120: ; preds = %111, %106
%121 = phi i32 [ 0, %106 ], [ %118, %111 ]
%122 = phi ptr [ %110, %106 ], [ %119, %111 ]
%123 = tail call i32 @mk_qpn(ptr noundef nonnull %1, ptr noundef %122, i32 noundef %121) #2
br label %62
124: ; preds = %102, %72
%125 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%126 = sub nsw i32 0, %125
br label %127
127: ; preds = %87, %124, %26
%128 = phi i32 [ %27, %26 ], [ %126, %124 ], [ %88, %87 ]
ret i32 %128
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @get_map_page(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @test_and_set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @find_next_offset(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mk_qpn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"qib_qpn_table", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !12, i64 16, !7, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 4}
!14 = !{!11, !7, i64 8}
!15 = !{!16, !7, i64 0}
!16 = !{!"qib_devdata", !7, i64 0}
!17 = !{!11, !12, i64 16}
!18 = !{!11, !7, i64 12}
!19 = !{!20, !7, i64 0}
!20 = !{!"qpn_map", !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_drivers_infiniband_hw_qib_extr_qib_qp.c_alloc_qpn |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_msi.c_arch_msi_check_device.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_msi.c_arch_msi_check_device.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @arch_msi_check_device(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_msi.c_arch_msi_check_device.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_msi.c_arch_msi_check_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @arch_msi_check_device(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_pci_extr_msi.c_arch_msi_check_device |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_resource.c_cxio_hal_get_cqid.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_resource.c_cxio_hal_get_cqid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @cxio_hal_get_cqid(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i32 @cxio_hal_get_resource(i32 noundef %2) #2
ret i32 %3
}
declare i32 @cxio_hal_get_resource(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cxio_hal_resource", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_resource.c_cxio_hal_get_cqid.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_resource.c_cxio_hal_get_cqid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cxio_hal_get_cqid(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @cxio_hal_get_resource(i32 noundef %2) #2
ret i32 %3
}
declare i32 @cxio_hal_get_resource(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cxio_hal_resource", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_infiniband_hw_cxgb3_extr_cxio_resource.c_cxio_hal_get_cqid |
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/gas/extr_messages.c_had_warnings.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/gas/extr_messages.c_had_warnings.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@warning_count = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @had_warnings() local_unnamed_addr #0 {
%1 = load i32, ptr @warning_count, align 4, !tbaa !5
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/gas/extr_messages.c_had_warnings.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/gas/extr_messages.c_had_warnings.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@warning_count = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @had_warnings() local_unnamed_addr #0 {
%1 = load i32, ptr @warning_count, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_binutils_gas_extr_messages.c_had_warnings |
; ModuleID = 'AnghaBench/linux/net/lapb/extr_lapb_iface.c_lapb_data_transmit.c'
source_filename = "AnghaBench/linux/net/lapb/extr_lapb_iface.c_lapb_data_transmit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lapb_cb = type { i32, ptr }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @lapb_data_transmit(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds %struct.lapb_cb, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = icmp eq ptr %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, ptr %0, align 8, !tbaa !13
%9 = tail call i32 %5(i32 noundef %8, ptr noundef %1) #1
br label %10
10: ; preds = %7, %2
%11 = phi i32 [ 1, %7 ], [ 0, %2 ]
ret i32 %11
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"lapb_cb", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_2__", !10, i64 0}
!13 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/lapb/extr_lapb_iface.c_lapb_data_transmit.c'
source_filename = "AnghaBench/linux/net/lapb/extr_lapb_iface.c_lapb_data_transmit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @lapb_data_transmit(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = icmp eq ptr %5, null
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, ptr %0, align 8, !tbaa !14
%9 = tail call i32 %5(i32 noundef %8, ptr noundef %1) #1
br label %10
10: ; preds = %7, %2
%11 = phi i32 [ 1, %7 ], [ 0, %2 ]
ret i32 %11
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"lapb_cb", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = !{!7, !8, i64 0}
| linux_net_lapb_extr_lapb_iface.c_lapb_data_transmit |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_main.c_b43_wireless_core_start.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_main.c_b43_wireless_core_start.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.b43_wldev = type { ptr, i32, ptr }
@B43_STAT_INITIALIZED = dso_local local_unnamed_addr global i64 0, align 8
@b43_sdio_interrupt_handler = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Cannot request SDIO IRQ\0A\00", align 1
@b43_interrupt_handler = dso_local local_unnamed_addr global i32 0, align 4
@b43_interrupt_thread_handler = dso_local local_unnamed_addr global i32 0, align 4
@IRQF_SHARED = dso_local local_unnamed_addr global i32 0, align 4
@KBUILD_MODNAME = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [23 x i8] c"Cannot request IRQ-%d\0A\00", align 1
@B43_STAT_STARTED = dso_local local_unnamed_addr global i32 0, align 4
@B43_MMIO_GEN_IRQ_MASK = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [28 x i8] c"Wireless interface started\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @b43_wireless_core_start], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @b43_wireless_core_start(ptr noundef %0) #0 {
%2 = tail call i64 @b43_status(ptr noundef %0) #2
%3 = load i64, ptr @B43_STAT_INITIALIZED, align 8, !tbaa !5
%4 = icmp ne i64 %2, %3
%5 = zext i1 %4 to i32
%6 = tail call i32 @B43_WARN_ON(i32 noundef %5) #2
%7 = tail call i32 @drain_txstatus_queue(ptr noundef %0) #2
%8 = getelementptr inbounds %struct.b43_wldev, ptr %0, i64 0, i32 2
%9 = load ptr, ptr %8, align 8, !tbaa !9
%10 = tail call i64 @b43_bus_host_is_sdio(ptr noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %19, label %12
12: ; preds = %1
%13 = load i32, ptr @b43_sdio_interrupt_handler, align 4, !tbaa !13
%14 = tail call i32 @b43_sdio_request_irq(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %33, label %16
16: ; preds = %12
%17 = load ptr, ptr %0, align 8, !tbaa !14
%18 = tail call i32 (ptr, ptr, ...) @b43err(ptr noundef %17, ptr noundef nonnull @.str) #2
br label %48
19: ; preds = %1
%20 = load ptr, ptr %8, align 8, !tbaa !9
%21 = load i32, ptr %20, align 4, !tbaa !15
%22 = load i32, ptr @b43_interrupt_handler, align 4, !tbaa !13
%23 = load i32, ptr @b43_interrupt_thread_handler, align 4, !tbaa !13
%24 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !13
%25 = load i32, ptr @KBUILD_MODNAME, align 4, !tbaa !13
%26 = tail call i32 @request_threaded_irq(i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, ptr noundef nonnull %0) #2
%27 = icmp eq i32 %26, 0
br i1 %27, label %33, label %28
28: ; preds = %19
%29 = load ptr, ptr %0, align 8, !tbaa !14
%30 = load ptr, ptr %8, align 8, !tbaa !9
%31 = load i32, ptr %30, align 4, !tbaa !15
%32 = tail call i32 (ptr, ptr, ...) @b43err(ptr noundef %29, ptr noundef nonnull @.str.1, i32 noundef %31) #2
br label %48
33: ; preds = %19, %12
%34 = load ptr, ptr %0, align 8, !tbaa !14
%35 = load i32, ptr %34, align 4, !tbaa !17
%36 = tail call i32 @ieee80211_wake_queues(i32 noundef %35) #2
%37 = load i32, ptr @B43_STAT_STARTED, align 4, !tbaa !13
%38 = tail call i32 @b43_set_status(ptr noundef nonnull %0, i32 noundef %37) #2
%39 = tail call i32 @b43_mac_enable(ptr noundef nonnull %0) #2
%40 = load i32, ptr @B43_MMIO_GEN_IRQ_MASK, align 4, !tbaa !13
%41 = getelementptr inbounds %struct.b43_wldev, ptr %0, i64 0, i32 1
%42 = load i32, ptr %41, align 8, !tbaa !19
%43 = tail call i32 @b43_write32(ptr noundef nonnull %0, i32 noundef %40, i32 noundef %42) #2
%44 = tail call i32 @b43_periodic_tasks_setup(ptr noundef nonnull %0) #2
%45 = tail call i32 @b43_leds_init(ptr noundef nonnull %0) #2
%46 = load ptr, ptr %0, align 8, !tbaa !14
%47 = tail call i32 @b43dbg(ptr noundef %46, ptr noundef nonnull @.str.2) #2
br label %48
48: ; preds = %33, %28, %16
%49 = phi i32 [ %14, %16 ], [ 0, %33 ], [ %26, %28 ]
ret i32 %49
}
declare i32 @B43_WARN_ON(i32 noundef) local_unnamed_addr #1
declare i64 @b43_status(ptr noundef) local_unnamed_addr #1
declare i32 @drain_txstatus_queue(ptr noundef) local_unnamed_addr #1
declare i64 @b43_bus_host_is_sdio(ptr noundef) local_unnamed_addr #1
declare i32 @b43_sdio_request_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @request_threaded_irq(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ieee80211_wake_queues(i32 noundef) local_unnamed_addr #1
declare i32 @b43_set_status(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_mac_enable(ptr noundef) local_unnamed_addr #1
declare i32 @b43_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_periodic_tasks_setup(ptr noundef) local_unnamed_addr #1
declare i32 @b43_leds_init(ptr noundef) local_unnamed_addr #1
declare i32 @b43dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"b43_wldev", !11, i64 0, !12, i64 8, !11, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!10, !11, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_5__", !12, i64 0}
!17 = !{!18, !12, i64 0}
!18 = !{!"TYPE_4__", !12, i64 0}
!19 = !{!10, !12, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_main.c_b43_wireless_core_start.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_main.c_b43_wireless_core_start.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@B43_STAT_INITIALIZED = common local_unnamed_addr global i64 0, align 8
@b43_sdio_interrupt_handler = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Cannot request SDIO IRQ\0A\00", align 1
@b43_interrupt_handler = common local_unnamed_addr global i32 0, align 4
@b43_interrupt_thread_handler = common local_unnamed_addr global i32 0, align 4
@IRQF_SHARED = common local_unnamed_addr global i32 0, align 4
@KBUILD_MODNAME = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [23 x i8] c"Cannot request IRQ-%d\0A\00", align 1
@B43_STAT_STARTED = common local_unnamed_addr global i32 0, align 4
@B43_MMIO_GEN_IRQ_MASK = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [28 x i8] c"Wireless interface started\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @b43_wireless_core_start], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @b43_wireless_core_start(ptr noundef %0) #0 {
%2 = tail call i64 @b43_status(ptr noundef %0) #2
%3 = load i64, ptr @B43_STAT_INITIALIZED, align 8, !tbaa !6
%4 = icmp ne i64 %2, %3
%5 = zext i1 %4 to i32
%6 = tail call i32 @B43_WARN_ON(i32 noundef %5) #2
%7 = tail call i32 @drain_txstatus_queue(ptr noundef %0) #2
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load ptr, ptr %8, align 8, !tbaa !10
%10 = tail call i64 @b43_bus_host_is_sdio(ptr noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %19, label %12
12: ; preds = %1
%13 = load i32, ptr @b43_sdio_interrupt_handler, align 4, !tbaa !14
%14 = tail call i32 @b43_sdio_request_irq(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %33, label %16
16: ; preds = %12
%17 = load ptr, ptr %0, align 8, !tbaa !15
%18 = tail call i32 (ptr, ptr, ...) @b43err(ptr noundef %17, ptr noundef nonnull @.str) #2
br label %48
19: ; preds = %1
%20 = load ptr, ptr %8, align 8, !tbaa !10
%21 = load i32, ptr %20, align 4, !tbaa !16
%22 = load i32, ptr @b43_interrupt_handler, align 4, !tbaa !14
%23 = load i32, ptr @b43_interrupt_thread_handler, align 4, !tbaa !14
%24 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !14
%25 = load i32, ptr @KBUILD_MODNAME, align 4, !tbaa !14
%26 = tail call i32 @request_threaded_irq(i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24, i32 noundef %25, ptr noundef nonnull %0) #2
%27 = icmp eq i32 %26, 0
br i1 %27, label %33, label %28
28: ; preds = %19
%29 = load ptr, ptr %0, align 8, !tbaa !15
%30 = load ptr, ptr %8, align 8, !tbaa !10
%31 = load i32, ptr %30, align 4, !tbaa !16
%32 = tail call i32 (ptr, ptr, ...) @b43err(ptr noundef %29, ptr noundef nonnull @.str.1, i32 noundef %31) #2
br label %48
33: ; preds = %19, %12
%34 = load ptr, ptr %0, align 8, !tbaa !15
%35 = load i32, ptr %34, align 4, !tbaa !18
%36 = tail call i32 @ieee80211_wake_queues(i32 noundef %35) #2
%37 = load i32, ptr @B43_STAT_STARTED, align 4, !tbaa !14
%38 = tail call i32 @b43_set_status(ptr noundef nonnull %0, i32 noundef %37) #2
%39 = tail call i32 @b43_mac_enable(ptr noundef nonnull %0) #2
%40 = load i32, ptr @B43_MMIO_GEN_IRQ_MASK, align 4, !tbaa !14
%41 = getelementptr inbounds i8, ptr %0, i64 8
%42 = load i32, ptr %41, align 8, !tbaa !20
%43 = tail call i32 @b43_write32(ptr noundef nonnull %0, i32 noundef %40, i32 noundef %42) #2
%44 = tail call i32 @b43_periodic_tasks_setup(ptr noundef nonnull %0) #2
%45 = tail call i32 @b43_leds_init(ptr noundef nonnull %0) #2
%46 = load ptr, ptr %0, align 8, !tbaa !15
%47 = tail call i32 @b43dbg(ptr noundef %46, ptr noundef nonnull @.str.2) #2
br label %48
48: ; preds = %33, %28, %16
%49 = phi i32 [ %14, %16 ], [ 0, %33 ], [ %26, %28 ]
ret i32 %49
}
declare i32 @B43_WARN_ON(i32 noundef) local_unnamed_addr #1
declare i64 @b43_status(ptr noundef) local_unnamed_addr #1
declare i32 @drain_txstatus_queue(ptr noundef) local_unnamed_addr #1
declare i64 @b43_bus_host_is_sdio(ptr noundef) local_unnamed_addr #1
declare i32 @b43_sdio_request_irq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43err(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @request_threaded_irq(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ieee80211_wake_queues(i32 noundef) local_unnamed_addr #1
declare i32 @b43_set_status(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_mac_enable(ptr noundef) local_unnamed_addr #1
declare i32 @b43_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @b43_periodic_tasks_setup(ptr noundef) local_unnamed_addr #1
declare i32 @b43_leds_init(ptr noundef) local_unnamed_addr #1
declare i32 @b43dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"b43_wldev", !12, i64 0, !13, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!11, !12, i64 0}
!16 = !{!17, !13, i64 0}
!17 = !{!"TYPE_5__", !13, i64 0}
!18 = !{!19, !13, i64 0}
!19 = !{!"TYPE_4__", !13, i64 0}
!20 = !{!11, !13, i64 8}
| linux_drivers_net_wireless_broadcom_b43_extr_main.c_b43_wireless_core_start |
; ModuleID = 'AnghaBench/freebsd/sys/dev/acpica/extr_acpi_timer.c_acpi_timer_test.c'
source_filename = "AnghaBench/freebsd/sys/dev/acpica/extr_acpi_timer.c_acpi_timer_test.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@INT32_MAX = dso_local local_unnamed_addr global i32 0, align 4
@N = dso_local local_unnamed_addr global i32 0, align 4
@vm_guest = dso_local local_unnamed_addr global i64 0, align 8
@VM_GUEST_NO = dso_local local_unnamed_addr global i64 0, align 8
@bootverbose = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c" %d/%d\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @acpi_timer_test], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @acpi_timer_test() #0 {
%1 = load i32, ptr @INT32_MAX, align 4, !tbaa !5
%2 = tail call i32 (...) @intr_disable() #3
%3 = tail call i32 (...) @acpi_timer_read() #3
%4 = load i32, ptr @N, align 4, !tbaa !5
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %22
6: ; preds = %0, %6
%7 = phi i32 [ %12, %6 ], [ %3, %0 ]
%8 = phi i32 [ %19, %6 ], [ 0, %0 ]
%9 = phi i32 [ %18, %6 ], [ %1, %0 ]
%10 = phi i32 [ %17, %6 ], [ 0, %0 ]
%11 = phi i32 [ %16, %6 ], [ 0, %0 ]
%12 = tail call i32 (...) @acpi_timer_read() #3
%13 = tail call i32 @acpi_TimerDelta(i32 noundef %12, i32 noundef %7) #3
%14 = icmp sgt i32 %13, %11
%15 = tail call i32 @llvm.smax.i32(i32 %13, i32 %10)
%16 = tail call i32 @llvm.smax.i32(i32 %13, i32 %11)
%17 = select i1 %14, i32 %11, i32 %15
%18 = tail call i32 @llvm.smin.i32(i32 %13, i32 %9)
%19 = add nuw nsw i32 %8, 1
%20 = load i32, ptr @N, align 4, !tbaa !5
%21 = icmp slt i32 %19, %20
br i1 %21, label %6, label %22, !llvm.loop !9
22: ; preds = %6, %0
%23 = phi i32 [ 0, %0 ], [ %16, %6 ]
%24 = phi i32 [ 0, %0 ], [ %17, %6 ]
%25 = phi i32 [ %1, %0 ], [ %18, %6 ]
%26 = tail call i32 @intr_restore(i32 noundef %2) #3
%27 = sub nsw i32 %24, %25
%28 = sub nsw i32 %23, %25
%29 = icmp sgt i32 %28, 8
%30 = icmp sgt i32 %27, 3
%31 = select i1 %29, i1 true, i1 %30
br i1 %31, label %32, label %36
32: ; preds = %22
%33 = load i64, ptr @vm_guest, align 8, !tbaa !11
%34 = load i64, ptr @VM_GUEST_NO, align 8, !tbaa !11
%35 = icmp eq i64 %33, %34
br i1 %35, label %43, label %36
36: ; preds = %22, %32
%37 = icmp sgt i32 %25, -1
%38 = icmp ne i32 %23, 0
%39 = select i1 %37, i1 %38, i1 false
%40 = icmp ne i32 %24, 0
%41 = select i1 %39, i1 %40, i1 false
%42 = zext i1 %41 to i32
br label %43
43: ; preds = %36, %32
%44 = phi i32 [ 0, %32 ], [ %42, %36 ]
%45 = load i64, ptr @bootverbose, align 8, !tbaa !11
%46 = icmp eq i64 %45, 0
br i1 %46, label %49, label %47
47: ; preds = %43
%48 = tail call i32 @printf(ptr noundef nonnull @.str, i32 noundef %44, i32 noundef %27) #3
br label %49
49: ; preds = %47, %43
ret i32 %44
}
declare i32 @intr_disable(...) local_unnamed_addr #1
declare i32 @acpi_timer_read(...) local_unnamed_addr #1
declare i32 @acpi_TimerDelta(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @intr_restore(i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/acpica/extr_acpi_timer.c_acpi_timer_test.c'
source_filename = "AnghaBench/freebsd/sys/dev/acpica/extr_acpi_timer.c_acpi_timer_test.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@INT32_MAX = common local_unnamed_addr global i32 0, align 4
@N = common local_unnamed_addr global i32 0, align 4
@vm_guest = common local_unnamed_addr global i64 0, align 8
@VM_GUEST_NO = common local_unnamed_addr global i64 0, align 8
@bootverbose = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c" %d/%d\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @acpi_timer_test], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @acpi_timer_test() #0 {
%1 = load i32, ptr @INT32_MAX, align 4, !tbaa !6
%2 = tail call i32 @intr_disable() #3
%3 = tail call i32 @acpi_timer_read() #3
%4 = load i32, ptr @N, align 4, !tbaa !6
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %22
6: ; preds = %0, %6
%7 = phi i32 [ %12, %6 ], [ %3, %0 ]
%8 = phi i32 [ %19, %6 ], [ 0, %0 ]
%9 = phi i32 [ %18, %6 ], [ %1, %0 ]
%10 = phi i32 [ %17, %6 ], [ 0, %0 ]
%11 = phi i32 [ %16, %6 ], [ 0, %0 ]
%12 = tail call i32 @acpi_timer_read() #3
%13 = tail call i32 @acpi_TimerDelta(i32 noundef %12, i32 noundef %7) #3
%14 = icmp sgt i32 %13, %11
%15 = tail call i32 @llvm.smax.i32(i32 %13, i32 %10)
%16 = tail call i32 @llvm.smax.i32(i32 %13, i32 %11)
%17 = select i1 %14, i32 %11, i32 %15
%18 = tail call i32 @llvm.smin.i32(i32 %13, i32 %9)
%19 = add nuw nsw i32 %8, 1
%20 = load i32, ptr @N, align 4, !tbaa !6
%21 = icmp slt i32 %19, %20
br i1 %21, label %6, label %22, !llvm.loop !10
22: ; preds = %6, %0
%23 = phi i32 [ 0, %0 ], [ %16, %6 ]
%24 = phi i32 [ 0, %0 ], [ %17, %6 ]
%25 = phi i32 [ %1, %0 ], [ %18, %6 ]
%26 = tail call i32 @intr_restore(i32 noundef %2) #3
%27 = sub nsw i32 %24, %25
%28 = sub nsw i32 %23, %25
%29 = icmp sgt i32 %28, 8
%30 = icmp sgt i32 %27, 3
%31 = select i1 %29, i1 true, i1 %30
br i1 %31, label %32, label %36
32: ; preds = %22
%33 = load i64, ptr @vm_guest, align 8, !tbaa !12
%34 = load i64, ptr @VM_GUEST_NO, align 8, !tbaa !12
%35 = icmp eq i64 %33, %34
br i1 %35, label %43, label %36
36: ; preds = %22, %32
%37 = icmp sgt i32 %25, -1
%38 = icmp ne i32 %23, 0
%39 = select i1 %37, i1 %38, i1 false
%40 = icmp ne i32 %24, 0
%41 = select i1 %39, i1 %40, i1 false
%42 = zext i1 %41 to i32
br label %43
43: ; preds = %36, %32
%44 = phi i32 [ 0, %32 ], [ %42, %36 ]
%45 = load i64, ptr @bootverbose, align 8, !tbaa !12
%46 = icmp eq i64 %45, 0
br i1 %46, label %49, label %47
47: ; preds = %43
%48 = tail call i32 @printf(ptr noundef nonnull @.str, i32 noundef %44, i32 noundef %27) #3
br label %49
49: ; preds = %47, %43
ret i32 %44
}
declare i32 @intr_disable(...) local_unnamed_addr #1
declare i32 @acpi_timer_read(...) local_unnamed_addr #1
declare i32 @acpi_TimerDelta(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @intr_restore(i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
| freebsd_sys_dev_acpica_extr_acpi_timer.c_acpi_timer_test |
; ModuleID = 'AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_read_status_byte.c'
source_filename = "AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_read_status_byte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PMBUS_STATUS_BYTE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pmbus_read_status_byte], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pmbus_read_status_byte(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @PMBUS_STATUS_BYTE, align 4, !tbaa !5
%4 = tail call i32 @_pmbus_read_byte_data(ptr noundef %0, i32 noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @_pmbus_read_byte_data(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_read_status_byte.c'
source_filename = "AnghaBench/linux/drivers/hwmon/pmbus/extr_pmbus_core.c_pmbus_read_status_byte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PMBUS_STATUS_BYTE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pmbus_read_status_byte], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pmbus_read_status_byte(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @PMBUS_STATUS_BYTE, align 4, !tbaa !6
%4 = tail call i32 @_pmbus_read_byte_data(ptr noundef %0, i32 noundef %1, i32 noundef %3) #2
ret i32 %4
}
declare i32 @_pmbus_read_byte_data(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hwmon_pmbus_extr_pmbus_core.c_pmbus_read_status_byte |
; ModuleID = 'AnghaBench/linux/arch/powerpc/platforms/powernv/extr_........driverspcipci.h_pci_enable_ptm.c'
source_filename = "AnghaBench/linux/arch/powerpc/platforms/powernv/extr_........driverspcipci.h_pci_enable_ptm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pci_enable_ptm], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @pci_enable_ptm(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @EINVAL, align 4, !tbaa !5
%4 = sub nsw i32 0, %3
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/powerpc/platforms/powernv/extr_........driverspcipci.h_pci_enable_ptm.c'
source_filename = "AnghaBench/linux/arch/powerpc/platforms/powernv/extr_........driverspcipci.h_pci_enable_ptm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pci_enable_ptm], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @pci_enable_ptm(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @EINVAL, align 4, !tbaa !6
%4 = sub nsw i32 0, %3
ret i32 %4
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_powerpc_platforms_powernv_extr_........driverspcipci.h_pci_enable_ptm |
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_assem_arm.c_emit_and.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_assem_arm.c_emit_and.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [14 x i8] c"and %s,%s,%s\0A\00", align 1
@regname = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @emit_and(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @regname, align 8, !tbaa !5
%5 = zext i32 %2 to i64
%6 = getelementptr inbounds i32, ptr %4, i64 %5
%7 = load i32, ptr %6, align 4, !tbaa !9
%8 = zext i32 %0 to i64
%9 = getelementptr inbounds i32, ptr %4, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !9
%11 = zext i32 %1 to i64
%12 = getelementptr inbounds i32, ptr %4, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !9
%14 = tail call i32 @assem_debug(ptr noundef nonnull @.str, i32 noundef %7, i32 noundef %10, i32 noundef %13) #2
%15 = tail call i32 @rd_rn_rm(i32 noundef %2, i32 noundef %0, i32 noundef %1) #2
%16 = or i32 %15, -536870912
%17 = tail call i32 @output_w32(i32 noundef %16) #2
ret void
}
declare i32 @assem_debug(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @output_w32(i32 noundef) local_unnamed_addr #1
declare i32 @rd_rn_rm(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_assem_arm.c_emit_and.c'
source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/sh2_dynarec/extr_assem_arm.c_emit_and.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [14 x i8] c"and %s,%s,%s\0A\00", align 1
@regname = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @emit_and(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr @regname, align 8, !tbaa !6
%5 = zext i32 %2 to i64
%6 = getelementptr inbounds i32, ptr %4, i64 %5
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = zext i32 %0 to i64
%9 = getelementptr inbounds i32, ptr %4, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = zext i32 %1 to i64
%12 = getelementptr inbounds i32, ptr %4, i64 %11
%13 = load i32, ptr %12, align 4, !tbaa !10
%14 = tail call i32 @assem_debug(ptr noundef nonnull @.str, i32 noundef %7, i32 noundef %10, i32 noundef %13) #2
%15 = tail call i32 @rd_rn_rm(i32 noundef %2, i32 noundef %0, i32 noundef %1) #2
%16 = or i32 %15, -536870912
%17 = tail call i32 @output_w32(i32 noundef %16) #2
ret void
}
declare i32 @assem_debug(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @output_w32(i32 noundef) local_unnamed_addr #1
declare i32 @rd_rn_rm(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| Provenance_Cores_Yabause_yabause_src_sh2_dynarec_extr_assem_arm.c_emit_and |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_dcb_82598.c_ixgbe_dcb_config_pfc_82598.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_dcb_82598.c_ixgbe_dcb_config_pfc_82598.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr, i32 }
@IXGBE_RMCS = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_RMCS_TFCE_802_3X = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_RMCS_TFCE_PRIORITY = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_FCTRL = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_FCTRL_RPFCE = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_FCTRL_RFCE = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_FCRTL_XONE = dso_local local_unnamed_addr global i32 0, align 4
@MAX_TRAFFIC_CLASS = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_FCRTH_FCEN = dso_local local_unnamed_addr global i32 0, align 4
@IXGBE_FCRTV = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @ixgbe_dcb_config_pfc_82598(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @IXGBE_RMCS, align 4, !tbaa !5
%4 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @IXGBE_RMCS_TFCE_802_3X, align 4, !tbaa !5
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
%8 = load i32, ptr @IXGBE_RMCS_TFCE_PRIORITY, align 4, !tbaa !5
%9 = or i32 %7, %8
%10 = load i32, ptr @IXGBE_RMCS, align 4, !tbaa !5
%11 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %10, i32 noundef %9) #2
%12 = load i32, ptr @IXGBE_FCTRL, align 4, !tbaa !5
%13 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %12) #2
%14 = load i32, ptr @IXGBE_FCTRL_RPFCE, align 4, !tbaa !5
%15 = load i32, ptr @IXGBE_FCTRL_RFCE, align 4, !tbaa !5
%16 = or i32 %15, %14
%17 = xor i32 %16, -1
%18 = and i32 %13, %17
%19 = icmp eq i32 %1, 0
%20 = select i1 %19, i32 0, i32 %14
%21 = or i32 %18, %20
%22 = load i32, ptr @IXGBE_FCTRL, align 4, !tbaa !5
%23 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %22, i32 noundef %21) #2
%24 = load i32, ptr %0, align 8, !tbaa !9
%25 = shl i32 %24, 10
%26 = load i32, ptr @IXGBE_FCRTL_XONE, align 4, !tbaa !5
%27 = or i32 %25, %26
%28 = load i32, ptr @MAX_TRAFFIC_CLASS, align 4, !tbaa !5
%29 = icmp sgt i32 %28, 0
br i1 %29, label %32, label %30
30: ; preds = %2
%31 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2
br label %71
32: ; preds = %2
%33 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
br label %34
34: ; preds = %32, %47
%35 = phi i64 [ 0, %32 ], [ %54, %47 ]
%36 = trunc i64 %35 to i32
%37 = shl nuw i32 1, %36
%38 = and i32 %37, %1
%39 = icmp eq i32 %38, 0
br i1 %39, label %47, label %40
40: ; preds = %34
%41 = load ptr, ptr %33, align 8, !tbaa !13
%42 = getelementptr inbounds i32, ptr %41, i64 %35
%43 = load i32, ptr %42, align 4, !tbaa !5
%44 = shl i32 %43, 10
%45 = load i32, ptr @IXGBE_FCRTH_FCEN, align 4, !tbaa !5
%46 = or i32 %44, %45
br label %47
47: ; preds = %34, %40
%48 = phi i32 [ %27, %40 ], [ 0, %34 ]
%49 = phi i32 [ %46, %40 ], [ 0, %34 ]
%50 = tail call i32 @IXGBE_FCRTL(i32 noundef %36) #2
%51 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %50, i32 noundef %48) #2
%52 = tail call i32 @IXGBE_FCRTH(i32 noundef %36) #2
%53 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %52, i32 noundef %49) #2
%54 = add nuw nsw i64 %35, 1
%55 = load i32, ptr @MAX_TRAFFIC_CLASS, align 4, !tbaa !5
%56 = sext i32 %55 to i64
%57 = icmp slt i64 %54, %56
br i1 %57, label %34, label %58, !llvm.loop !14
58: ; preds = %47
%59 = icmp sgt i32 %55, 1
%60 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2
%61 = load i32, ptr %60, align 8, !tbaa !16
%62 = mul nsw i32 %61, 65537
br i1 %59, label %63, label %74
63: ; preds = %58, %63
%64 = phi i32 [ %67, %63 ], [ 0, %58 ]
%65 = tail call i32 @IXGBE_FCTTV(i32 noundef %64) #2
%66 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %62) #2
%67 = add nuw nsw i32 %64, 1
%68 = load i32, ptr @MAX_TRAFFIC_CLASS, align 4, !tbaa !5
%69 = sdiv i32 %68, 2
%70 = icmp slt i32 %67, %69
br i1 %70, label %63, label %71, !llvm.loop !17
71: ; preds = %63, %30
%72 = phi ptr [ %31, %30 ], [ %60, %63 ]
%73 = load i32, ptr %72, align 8, !tbaa !16
br label %74
74: ; preds = %71, %58
%75 = phi i32 [ %61, %58 ], [ %73, %71 ]
%76 = load i32, ptr @IXGBE_FCRTV, align 4, !tbaa !5
%77 = sdiv i32 %75, 2
%78 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %76, i32 noundef %77) #2
ret i32 0
}
declare i32 @IXGBE_READ_REG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_WRITE_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_FCRTL(i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_FCRTH(i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_FCTTV(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ixgbe_hw", !11, i64 0}
!11 = !{!"TYPE_2__", !6, i64 0, !12, i64 8, !6, i64 16}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !12, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!10, !6, i64 16}
!17 = distinct !{!17, !15}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_dcb_82598.c_ixgbe_dcb_config_pfc_82598.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_dcb_82598.c_ixgbe_dcb_config_pfc_82598.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IXGBE_RMCS = common local_unnamed_addr global i32 0, align 4
@IXGBE_RMCS_TFCE_802_3X = common local_unnamed_addr global i32 0, align 4
@IXGBE_RMCS_TFCE_PRIORITY = common local_unnamed_addr global i32 0, align 4
@IXGBE_FCTRL = common local_unnamed_addr global i32 0, align 4
@IXGBE_FCTRL_RPFCE = common local_unnamed_addr global i32 0, align 4
@IXGBE_FCTRL_RFCE = common local_unnamed_addr global i32 0, align 4
@IXGBE_FCRTL_XONE = common local_unnamed_addr global i32 0, align 4
@MAX_TRAFFIC_CLASS = common local_unnamed_addr global i32 0, align 4
@IXGBE_FCRTH_FCEN = common local_unnamed_addr global i32 0, align 4
@IXGBE_FCRTV = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @ixgbe_dcb_config_pfc_82598(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @IXGBE_RMCS, align 4, !tbaa !6
%4 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @IXGBE_RMCS_TFCE_802_3X, align 4, !tbaa !6
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
%8 = load i32, ptr @IXGBE_RMCS_TFCE_PRIORITY, align 4, !tbaa !6
%9 = or i32 %7, %8
%10 = load i32, ptr @IXGBE_RMCS, align 4, !tbaa !6
%11 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %10, i32 noundef %9) #2
%12 = load i32, ptr @IXGBE_FCTRL, align 4, !tbaa !6
%13 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %12) #2
%14 = load i32, ptr @IXGBE_FCTRL_RPFCE, align 4, !tbaa !6
%15 = load i32, ptr @IXGBE_FCTRL_RFCE, align 4, !tbaa !6
%16 = or i32 %15, %14
%17 = xor i32 %16, -1
%18 = and i32 %13, %17
%19 = icmp eq i32 %1, 0
%20 = select i1 %19, i32 0, i32 %14
%21 = or i32 %18, %20
%22 = load i32, ptr @IXGBE_FCTRL, align 4, !tbaa !6
%23 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %22, i32 noundef %21) #2
%24 = load i32, ptr %0, align 8, !tbaa !10
%25 = shl i32 %24, 10
%26 = load i32, ptr @IXGBE_FCRTL_XONE, align 4, !tbaa !6
%27 = or i32 %25, %26
%28 = load i32, ptr @MAX_TRAFFIC_CLASS, align 4, !tbaa !6
%29 = icmp sgt i32 %28, 0
br i1 %29, label %32, label %30
30: ; preds = %2
%31 = getelementptr inbounds i8, ptr %0, i64 16
br label %71
32: ; preds = %2
%33 = getelementptr inbounds i8, ptr %0, i64 8
br label %34
34: ; preds = %32, %47
%35 = phi i64 [ 0, %32 ], [ %54, %47 ]
%36 = trunc nuw nsw i64 %35 to i32
%37 = shl nuw i32 1, %36
%38 = and i32 %37, %1
%39 = icmp eq i32 %38, 0
br i1 %39, label %47, label %40
40: ; preds = %34
%41 = load ptr, ptr %33, align 8, !tbaa !14
%42 = getelementptr inbounds i32, ptr %41, i64 %35
%43 = load i32, ptr %42, align 4, !tbaa !6
%44 = shl i32 %43, 10
%45 = load i32, ptr @IXGBE_FCRTH_FCEN, align 4, !tbaa !6
%46 = or i32 %44, %45
br label %47
47: ; preds = %34, %40
%48 = phi i32 [ %27, %40 ], [ 0, %34 ]
%49 = phi i32 [ %46, %40 ], [ 0, %34 ]
%50 = tail call i32 @IXGBE_FCRTL(i32 noundef %36) #2
%51 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %50, i32 noundef %48) #2
%52 = tail call i32 @IXGBE_FCRTH(i32 noundef %36) #2
%53 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %52, i32 noundef %49) #2
%54 = add nuw nsw i64 %35, 1
%55 = load i32, ptr @MAX_TRAFFIC_CLASS, align 4, !tbaa !6
%56 = sext i32 %55 to i64
%57 = icmp slt i64 %54, %56
br i1 %57, label %34, label %58, !llvm.loop !15
58: ; preds = %47
%59 = icmp sgt i32 %55, 1
%60 = getelementptr inbounds i8, ptr %0, i64 16
%61 = load i32, ptr %60, align 8, !tbaa !17
%62 = mul nsw i32 %61, 65537
br i1 %59, label %63, label %74
63: ; preds = %58, %63
%64 = phi i32 [ %67, %63 ], [ 0, %58 ]
%65 = tail call i32 @IXGBE_FCTTV(i32 noundef %64) #2
%66 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %62) #2
%67 = add nuw nsw i32 %64, 1
%68 = load i32, ptr @MAX_TRAFFIC_CLASS, align 4, !tbaa !6
%69 = sdiv i32 %68, 2
%70 = icmp slt i32 %67, %69
br i1 %70, label %63, label %71, !llvm.loop !18
71: ; preds = %63, %30
%72 = phi ptr [ %31, %30 ], [ %60, %63 ]
%73 = load i32, ptr %72, align 8, !tbaa !17
br label %74
74: ; preds = %71, %58
%75 = phi i32 [ %61, %58 ], [ %73, %71 ]
%76 = load i32, ptr @IXGBE_FCRTV, align 4, !tbaa !6
%77 = sdiv i32 %75, 2
%78 = tail call i32 @IXGBE_WRITE_REG(ptr noundef nonnull %0, i32 noundef %76, i32 noundef %77) #2
ret i32 0
}
declare i32 @IXGBE_READ_REG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_WRITE_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_FCRTL(i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_FCRTH(i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_FCTTV(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ixgbe_hw", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0, !13, i64 8, !7, i64 16}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!11, !7, i64 16}
!18 = distinct !{!18, !16}
| fastsocket_kernel_drivers_net_ixgbe_extr_ixgbe_dcb_82598.c_ixgbe_dcb_config_pfc_82598 |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_main.c_ice_clean_mailboxq_subtask.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_main.c_ice_clean_mailboxq_subtask.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ice_pf = type { i32, %struct.ice_hw }
%struct.ice_hw = type { i32 }
@__ICE_MAILBOXQ_EVENT_PENDING = dso_local local_unnamed_addr global i32 0, align 4
@ICE_CTL_Q_MAILBOX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ice_clean_mailboxq_subtask], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ice_clean_mailboxq_subtask(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.ice_pf, ptr %0, i64 0, i32 1
%3 = load i32, ptr @__ICE_MAILBOXQ_EVENT_PENDING, align 4, !tbaa !5
%4 = load i32, ptr %0, align 4, !tbaa !9
%5 = tail call i32 @test_bit(i32 noundef %3, i32 noundef %4) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %22, label %7
7: ; preds = %1
%8 = load i32, ptr @ICE_CTL_Q_MAILBOX, align 4, !tbaa !5
%9 = tail call i64 @__ice_clean_ctrlq(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32, ptr @__ICE_MAILBOXQ_EVENT_PENDING, align 4, !tbaa !5
%13 = load i32, ptr %0, align 4, !tbaa !9
%14 = tail call i32 @clear_bit(i32 noundef %12, i32 noundef %13) #2
%15 = tail call i64 @ice_ctrlq_pending(ptr noundef nonnull %2, ptr noundef nonnull %2) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %11
%18 = load i32, ptr @ICE_CTL_Q_MAILBOX, align 4, !tbaa !5
%19 = tail call i64 @__ice_clean_ctrlq(ptr noundef nonnull %0, i32 noundef %18) #2
br label %20
20: ; preds = %17, %11
%21 = tail call i32 @ice_flush(ptr noundef nonnull %2) #2
br label %22
22: ; preds = %7, %1, %20
ret void
}
declare i32 @test_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @__ice_clean_ctrlq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clear_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ice_ctrlq_pending(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ice_flush(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ice_pf", !6, i64 0, !11, i64 4}
!11 = !{!"ice_hw", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_main.c_ice_clean_mailboxq_subtask.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/ice/extr_ice_main.c_ice_clean_mailboxq_subtask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__ICE_MAILBOXQ_EVENT_PENDING = common local_unnamed_addr global i32 0, align 4
@ICE_CTL_Q_MAILBOX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ice_clean_mailboxq_subtask], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ice_clean_mailboxq_subtask(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr @__ICE_MAILBOXQ_EVENT_PENDING, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call i32 @test_bit(i32 noundef %3, i32 noundef %4) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %22, label %7
7: ; preds = %1
%8 = load i32, ptr @ICE_CTL_Q_MAILBOX, align 4, !tbaa !6
%9 = tail call i64 @__ice_clean_ctrlq(ptr noundef nonnull %0, i32 noundef %8) #2
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32, ptr @__ICE_MAILBOXQ_EVENT_PENDING, align 4, !tbaa !6
%13 = load i32, ptr %0, align 4, !tbaa !10
%14 = tail call i32 @clear_bit(i32 noundef %12, i32 noundef %13) #2
%15 = tail call i64 @ice_ctrlq_pending(ptr noundef nonnull %2, ptr noundef nonnull %2) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %11
%18 = load i32, ptr @ICE_CTL_Q_MAILBOX, align 4, !tbaa !6
%19 = tail call i64 @__ice_clean_ctrlq(ptr noundef nonnull %0, i32 noundef %18) #2
br label %20
20: ; preds = %17, %11
%21 = tail call i32 @ice_flush(ptr noundef nonnull %2) #2
br label %22
22: ; preds = %7, %1, %20
ret void
}
declare i32 @test_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @__ice_clean_ctrlq(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @clear_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ice_ctrlq_pending(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ice_flush(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ice_pf", !7, i64 0, !12, i64 4}
!12 = !{!"ice_hw", !7, i64 0}
| linux_drivers_net_ethernet_intel_ice_extr_ice_main.c_ice_clean_mailboxq_subtask |
; ModuleID = 'AnghaBench/RetroArch/input/connect/extr_connect_wii.c_wiimote_send.c'
source_filename = "AnghaBench/RetroArch/input/connect/extr_connect_wii.c_wiimote_send.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.connect_wii_wiimote_t = type { i32, i32, ptr }
@WM_SET_REPORT = dso_local local_unnamed_addr global i32 0, align 4
@WM_BT_OUTPUT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wiimote_send], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wiimote_send(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca [32 x i32], align 16
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %5) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(128) %5, i8 0, i64 128, i1 false)
%6 = load i32, ptr @WM_SET_REPORT, align 4, !tbaa !5
%7 = load i32, ptr @WM_BT_OUTPUT, align 4, !tbaa !5
%8 = or i32 %7, %6
store i32 %8, ptr %5, align 16, !tbaa !5
%9 = getelementptr inbounds [32 x i32], ptr %5, i64 0, i64 1
store i32 %1, ptr %9, align 4, !tbaa !5
%10 = getelementptr inbounds i32, ptr %5, i64 2
%11 = call i32 @memcpy(ptr noundef nonnull %10, ptr noundef %2, i32 noundef %3) #4
%12 = getelementptr inbounds %struct.connect_wii_wiimote_t, ptr %0, i64 0, i32 2
%13 = load ptr, ptr %12, align 8, !tbaa !9
%14 = load ptr, ptr %13, align 8, !tbaa !12
%15 = getelementptr inbounds %struct.connect_wii_wiimote_t, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = add nsw i32 %3, 2
%18 = call i32 %14(i32 noundef %16, ptr noundef nonnull %5, i32 noundef %17) #4
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %5) #4
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"connect_wii_wiimote_t", !6, i64 0, !6, i64 4, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0}
!14 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/RetroArch/input/connect/extr_connect_wii.c_wiimote_send.c'
source_filename = "AnghaBench/RetroArch/input/connect/extr_connect_wii.c_wiimote_send.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WM_SET_REPORT = common local_unnamed_addr global i32 0, align 4
@WM_BT_OUTPUT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wiimote_send], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @wiimote_send(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca [32 x i32], align 4
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %5) #4
%6 = getelementptr inbounds i8, ptr %5, i64 8
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(128) %6, i8 0, i64 120, i1 false)
%7 = load i32, ptr @WM_SET_REPORT, align 4, !tbaa !6
%8 = load i32, ptr @WM_BT_OUTPUT, align 4, !tbaa !6
%9 = or i32 %8, %7
store i32 %9, ptr %5, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %1, ptr %10, align 4, !tbaa !6
%11 = call i32 @memcpy(ptr noundef nonnull %6, ptr noundef %2, i32 noundef %3) #4
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !10
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = add nsw i32 %3, 2
%18 = call i32 %14(i32 noundef %16, ptr noundef nonnull %5, i32 noundef %17) #4
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %5) #4
ret i32 1
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"connect_wii_wiimote_t", !7, i64 0, !7, i64 4, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_2__", !12, i64 0}
!15 = !{!11, !7, i64 4}
| RetroArch_input_connect_extr_connect_wii.c_wiimote_send |
; ModuleID = 'AnghaBench/jemalloc/test/unit/extr_hook.c_reset.c'
source_filename = "AnghaBench/jemalloc/test/unit/extr_hook.c_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@call_count = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @reset() #0 {
store i64 0, ptr @call_count, align 8, !tbaa !5
%1 = tail call i32 (...) @reset_args() #2
ret void
}
declare i32 @reset_args(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/jemalloc/test/unit/extr_hook.c_reset.c'
source_filename = "AnghaBench/jemalloc/test/unit/extr_hook.c_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@call_count = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @reset() #0 {
store i64 0, ptr @call_count, align 8, !tbaa !6
%1 = tail call i32 @reset_args() #2
ret void
}
declare i32 @reset_args(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| jemalloc_test_unit_extr_hook.c_reset |
; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_mxc_nand.c_send_addr_v3.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_mxc_nand.c_send_addr_v3.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NFC_V3_FLASH_ADDR0 = dso_local local_unnamed_addr global i32 0, align 4
@NFC_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@NFC_V3_LAUNCH = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @send_addr_v3], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @send_addr_v3(ptr noundef %0, i32 noundef %1, i32 %2) #0 {
%4 = load i32, ptr @NFC_V3_FLASH_ADDR0, align 4, !tbaa !5
%5 = tail call i32 @writel(i32 noundef %1, i32 noundef %4) #2
%6 = load i32, ptr @NFC_ADDR, align 4, !tbaa !5
%7 = load i32, ptr @NFC_V3_LAUNCH, align 4, !tbaa !5
%8 = tail call i32 @writel(i32 noundef %6, i32 noundef %7) #2
%9 = tail call i32 @wait_op_done(ptr noundef %0, i32 noundef 0) #2
ret void
}
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wait_op_done(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/mtd/nand/raw/extr_mxc_nand.c_send_addr_v3.c'
source_filename = "AnghaBench/linux/drivers/mtd/nand/raw/extr_mxc_nand.c_send_addr_v3.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NFC_V3_FLASH_ADDR0 = common local_unnamed_addr global i32 0, align 4
@NFC_ADDR = common local_unnamed_addr global i32 0, align 4
@NFC_V3_LAUNCH = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @send_addr_v3], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @send_addr_v3(ptr noundef %0, i32 noundef %1, i32 %2) #0 {
%4 = load i32, ptr @NFC_V3_FLASH_ADDR0, align 4, !tbaa !6
%5 = tail call i32 @writel(i32 noundef %1, i32 noundef %4) #2
%6 = load i32, ptr @NFC_ADDR, align 4, !tbaa !6
%7 = load i32, ptr @NFC_V3_LAUNCH, align 4, !tbaa !6
%8 = tail call i32 @writel(i32 noundef %6, i32 noundef %7) #2
%9 = tail call i32 @wait_op_done(ptr noundef %0, i32 noundef 0) #2
ret void
}
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wait_op_done(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_mtd_nand_raw_extr_mxc_nand.c_send_addr_v3 |
; ModuleID = 'AnghaBench/zfs/module/zfs/extr_arc.c_arc_hdr_l2hdr_destroy.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_arc.c_arc_hdr_l2hdr_destroy.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { i32, i32, i32, i32 }
@arcstat_l2_psize = dso_local local_unnamed_addr global i32 0, align 4
@arcstat_l2_lsize = dso_local local_unnamed_addr global i32 0, align 4
@ARC_FLAG_HAS_L2HDR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @arc_hdr_l2hdr_destroy], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @arc_hdr_l2hdr_destroy(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @HDR_GET_PSIZE(ptr noundef nonnull %0) #2
%4 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = tail call i32 @vdev_psize_to_asize(i32 noundef %5, i32 noundef %3) #2
%7 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 3
%8 = tail call i32 @MUTEX_HELD(ptr noundef nonnull %7) #2
%9 = tail call i32 @ASSERT(i32 noundef %8) #2
%10 = tail call i32 @HDR_HAS_L2HDR(ptr noundef nonnull %0) #2
%11 = tail call i32 @ASSERT(i32 noundef %10) #2
%12 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 2
%13 = tail call i32 @list_remove(ptr noundef nonnull %12, ptr noundef nonnull %0) #2
%14 = load i32, ptr @arcstat_l2_psize, align 4, !tbaa !13
%15 = sub nsw i32 0, %3
%16 = tail call i32 @ARCSTAT_INCR(i32 noundef %14, i32 noundef %15) #2
%17 = load i32, ptr @arcstat_l2_lsize, align 4, !tbaa !13
%18 = tail call i32 @HDR_GET_LSIZE(ptr noundef nonnull %0) #2
%19 = sub nsw i32 0, %18
%20 = tail call i32 @ARCSTAT_INCR(i32 noundef %17, i32 noundef %19) #2
%21 = load i32, ptr %4, align 4, !tbaa !10
%22 = sub nsw i32 0, %6
%23 = tail call i32 @vdev_space_update(i32 noundef %21, i32 noundef %22, i32 noundef 0, i32 noundef 0) #2
%24 = tail call i32 @arc_hdr_size(ptr noundef nonnull %0) #2
%25 = tail call i32 @zfs_refcount_remove_many(ptr noundef %2, i32 noundef %24, ptr noundef nonnull %0) #2
%26 = load i32, ptr @ARC_FLAG_HAS_L2HDR, align 4, !tbaa !13
%27 = tail call i32 @arc_hdr_clear_flags(ptr noundef nonnull %0, i32 noundef %26) #2
ret void
}
declare i32 @HDR_GET_PSIZE(ptr noundef) local_unnamed_addr #1
declare i32 @vdev_psize_to_asize(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
declare i32 @MUTEX_HELD(ptr noundef) local_unnamed_addr #1
declare i32 @HDR_HAS_L2HDR(ptr noundef) local_unnamed_addr #1
declare i32 @list_remove(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ARCSTAT_INCR(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @HDR_GET_LSIZE(ptr noundef) local_unnamed_addr #1
declare i32 @vdev_space_update(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @zfs_refcount_remove_many(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @arc_hdr_size(ptr noundef) local_unnamed_addr #1
declare i32 @arc_hdr_clear_flags(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_13__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 4}
!11 = !{!"TYPE_12__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/zfs/module/zfs/extr_arc.c_arc_hdr_l2hdr_destroy.c'
source_filename = "AnghaBench/zfs/module/zfs/extr_arc.c_arc_hdr_l2hdr_destroy.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@arcstat_l2_psize = common local_unnamed_addr global i32 0, align 4
@arcstat_l2_lsize = common local_unnamed_addr global i32 0, align 4
@ARC_FLAG_HAS_L2HDR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @arc_hdr_l2hdr_destroy], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @arc_hdr_l2hdr_destroy(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @HDR_GET_PSIZE(ptr noundef nonnull %0) #2
%4 = getelementptr inbounds i8, ptr %2, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = tail call i32 @vdev_psize_to_asize(i32 noundef %5, i32 noundef %3) #2
%7 = getelementptr inbounds i8, ptr %2, i64 12
%8 = tail call i32 @MUTEX_HELD(ptr noundef nonnull %7) #2
%9 = tail call i32 @ASSERT(i32 noundef %8) #2
%10 = tail call i32 @HDR_HAS_L2HDR(ptr noundef nonnull %0) #2
%11 = tail call i32 @ASSERT(i32 noundef %10) #2
%12 = getelementptr inbounds i8, ptr %2, i64 8
%13 = tail call i32 @list_remove(ptr noundef nonnull %12, ptr noundef nonnull %0) #2
%14 = load i32, ptr @arcstat_l2_psize, align 4, !tbaa !14
%15 = sub nsw i32 0, %3
%16 = tail call i32 @ARCSTAT_INCR(i32 noundef %14, i32 noundef %15) #2
%17 = load i32, ptr @arcstat_l2_lsize, align 4, !tbaa !14
%18 = tail call i32 @HDR_GET_LSIZE(ptr noundef nonnull %0) #2
%19 = sub nsw i32 0, %18
%20 = tail call i32 @ARCSTAT_INCR(i32 noundef %17, i32 noundef %19) #2
%21 = load i32, ptr %4, align 4, !tbaa !11
%22 = sub nsw i32 0, %6
%23 = tail call i32 @vdev_space_update(i32 noundef %21, i32 noundef %22, i32 noundef 0, i32 noundef 0) #2
%24 = tail call i32 @arc_hdr_size(ptr noundef nonnull %0) #2
%25 = tail call i32 @zfs_refcount_remove_many(ptr noundef %2, i32 noundef %24, ptr noundef nonnull %0) #2
%26 = load i32, ptr @ARC_FLAG_HAS_L2HDR, align 4, !tbaa !14
%27 = tail call i32 @arc_hdr_clear_flags(ptr noundef nonnull %0, i32 noundef %26) #2
ret void
}
declare i32 @HDR_GET_PSIZE(ptr noundef) local_unnamed_addr #1
declare i32 @vdev_psize_to_asize(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
declare i32 @MUTEX_HELD(ptr noundef) local_unnamed_addr #1
declare i32 @HDR_HAS_L2HDR(ptr noundef) local_unnamed_addr #1
declare i32 @list_remove(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ARCSTAT_INCR(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @HDR_GET_LSIZE(ptr noundef) local_unnamed_addr #1
declare i32 @vdev_space_update(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @zfs_refcount_remove_many(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @arc_hdr_size(ptr noundef) local_unnamed_addr #1
declare i32 @arc_hdr_clear_flags(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_13__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 4}
!12 = !{!"TYPE_12__", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
| zfs_module_zfs_extr_arc.c_arc_hdr_l2hdr_destroy |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_hfc_pci.c_hfcpci_fill_dfifo.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_hfc_pci.c_hfcpci_fill_dfifo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.IsdnCardState = type { i32, ptr, i32, %struct.TYPE_10__ }
%struct.TYPE_10__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { i64 }
%struct.TYPE_13__ = type { i64, i32, ptr, ptr }
%struct.TYPE_11__ = type { i32, i32 }
%struct.TYPE_14__ = type { i32, ptr }
@L1_DEB_ISAC = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [43 x i8] c"hfcpci_fill_Dfifo f1(%d) f2(%d) z1(f1)(%x)\00", align 1
@D_FREG_MASK = dso_local local_unnamed_addr global i64 0, align 8
@MAX_D_FRAMES = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [36 x i8] c"hfcpci_fill_Dfifo more as 14 frames\00", align 1
@D_FIFO_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [32 x i8] c"hfcpci_fill_Dfifo count(%ld/%d)\00", align 1
@.str.3 = private unnamed_addr constant [30 x i8] c"hfcpci_fill_Dfifo no fifo mem\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @hfcpci_fill_dfifo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @hfcpci_fill_dfifo(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.IsdnCardState, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %124, label %5
5: ; preds = %1
%6 = load i32, ptr %3, align 8, !tbaa !14
%7 = icmp slt i32 %6, 1
br i1 %7, label %124, label %8
8: ; preds = %5
%9 = getelementptr inbounds %struct.IsdnCardState, ptr %0, i64 0, i32 3
%10 = load i64, ptr %9, align 8, !tbaa !16
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %0, align 8, !tbaa !17
%13 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !18
%14 = and i32 %13, %12
%15 = icmp eq i32 %14, 0
br i1 %15, label %27, label %16
16: ; preds = %8
%17 = load i64, ptr %11, align 8, !tbaa !19
%18 = getelementptr inbounds %struct.TYPE_13__, ptr %11, i64 0, i32 1
%19 = load i32, ptr %18, align 8, !tbaa !21
%20 = getelementptr inbounds %struct.TYPE_13__, ptr %11, i64 0, i32 3
%21 = load ptr, ptr %20, align 8, !tbaa !22
%22 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !23
%23 = and i64 %22, %17
%24 = getelementptr inbounds %struct.TYPE_11__, ptr %21, i64 %23
%25 = load i32, ptr %24, align 4, !tbaa !24
%26 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str, i64 noundef %17, i32 noundef %19, i32 noundef %25) #3
br label %27
27: ; preds = %16, %8
%28 = load i64, ptr %11, align 8, !tbaa !19
%29 = getelementptr inbounds %struct.TYPE_13__, ptr %11, i64 0, i32 1
%30 = load i32, ptr %29, align 8, !tbaa !21
%31 = trunc i64 %28 to i32
%32 = sub i32 %31, %30
%33 = icmp slt i32 %32, 0
%34 = load i32, ptr @MAX_D_FRAMES, align 4
%35 = add nsw i32 %34, 1
%36 = select i1 %33, i32 %35, i32 0
%37 = add nsw i32 %36, %32
%38 = icmp slt i32 %37, %34
br i1 %38, label %46, label %39
39: ; preds = %27
%40 = load i32, ptr %0, align 8, !tbaa !17
%41 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !18
%42 = and i32 %41, %40
%43 = icmp eq i32 %42, 0
br i1 %43, label %124, label %44
44: ; preds = %39
%45 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #3
br label %124
46: ; preds = %27
%47 = getelementptr inbounds %struct.TYPE_13__, ptr %11, i64 0, i32 3
%48 = load ptr, ptr %47, align 8, !tbaa !22
%49 = sext i32 %30 to i64
%50 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !23
%51 = and i64 %50, %49
%52 = getelementptr inbounds %struct.TYPE_11__, ptr %48, i64 %51, i32 1
%53 = load i32, ptr %52, align 4, !tbaa !26
%54 = and i64 %50, %28
%55 = getelementptr inbounds %struct.TYPE_11__, ptr %48, i64 %54
%56 = load i32, ptr %55, align 4, !tbaa !24
%57 = xor i32 %56, -1
%58 = add i32 %53, %57
%59 = load i32, ptr @D_FIFO_SIZE, align 4
%60 = icmp sgt i32 %58, 0
%61 = select i1 %60, i32 0, i32 %59
%62 = add nsw i32 %61, %58
%63 = load i32, ptr %0, align 8, !tbaa !17
%64 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !18
%65 = and i32 %64, %63
%66 = icmp eq i32 %65, 0
%67 = load ptr, ptr %2, align 8, !tbaa !5
br i1 %66, label %72, label %68
68: ; preds = %46
%69 = load i32, ptr %67, align 8, !tbaa !14
%70 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str.2, i32 noundef %69, i32 noundef %62) #3
%71 = load ptr, ptr %2, align 8, !tbaa !5
br label %72
72: ; preds = %68, %46
%73 = phi ptr [ %71, %68 ], [ %67, %46 ]
%74 = load i32, ptr %73, align 8, !tbaa !14
%75 = icmp slt i32 %62, %74
br i1 %75, label %76, label %83
76: ; preds = %72
%77 = load i32, ptr %0, align 8, !tbaa !17
%78 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !18
%79 = and i32 %78, %77
%80 = icmp eq i32 %79, 0
br i1 %80, label %124, label %81
81: ; preds = %76
%82 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str.3) #3
br label %124
83: ; preds = %72
%84 = load ptr, ptr %47, align 8, !tbaa !22
%85 = load i64, ptr %11, align 8, !tbaa !19
%86 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !23
%87 = and i64 %86, %85
%88 = getelementptr inbounds %struct.TYPE_11__, ptr %84, i64 %87
%89 = load i32, ptr %88, align 4, !tbaa !24
%90 = add nsw i32 %89, %74
%91 = load i32, ptr @D_FIFO_SIZE, align 4, !tbaa !18
%92 = add nsw i32 %91, -1
%93 = and i32 %92, %90
%94 = add i64 %85, 1
%95 = and i64 %94, %86
%96 = add i64 %86, 1
%97 = or i64 %95, %96
%98 = getelementptr inbounds %struct.TYPE_14__, ptr %73, i64 0, i32 1
%99 = load ptr, ptr %98, align 8, !tbaa !27
%100 = getelementptr inbounds %struct.TYPE_13__, ptr %11, i64 0, i32 2
%101 = load ptr, ptr %100, align 8, !tbaa !28
%102 = sext i32 %89 to i64
%103 = getelementptr inbounds i64, ptr %101, i64 %102
%104 = sub nsw i32 %91, %89
%105 = tail call i32 @llvm.smin.i32(i32 %104, i32 %74)
%106 = tail call i32 @memcpy(ptr noundef %103, ptr noundef %99, i32 noundef %105) #3
%107 = icmp sgt i32 %74, %104
br i1 %107, label %108, label %114
108: ; preds = %83
%109 = sub nsw i32 %74, %105
%110 = load ptr, ptr %100, align 8, !tbaa !28
%111 = sext i32 %105 to i64
%112 = getelementptr inbounds i64, ptr %99, i64 %111
%113 = tail call i32 @memcpy(ptr noundef %110, ptr noundef %112, i32 noundef %109) #3
br label %114
114: ; preds = %108, %83
%115 = load ptr, ptr %47, align 8, !tbaa !22
%116 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !23
%117 = and i64 %116, %97
%118 = getelementptr inbounds %struct.TYPE_11__, ptr %115, i64 %117
store i32 %93, ptr %118, align 4, !tbaa !24
%119 = load i64, ptr %11, align 8, !tbaa !19
%120 = and i64 %119, %116
%121 = getelementptr inbounds %struct.TYPE_11__, ptr %115, i64 %120
store i32 %93, ptr %121, align 4, !tbaa !24
store i64 %97, ptr %11, align 8, !tbaa !19
%122 = load ptr, ptr %2, align 8, !tbaa !5
%123 = tail call i32 @dev_kfree_skb_any(ptr noundef %122) #3
store ptr null, ptr %2, align 8, !tbaa !5
br label %124
124: ; preds = %76, %81, %39, %44, %5, %1, %114
ret void
}
declare i32 @debugl1(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"IsdnCardState", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_10__", !12, i64 0}
!12 = !{!"TYPE_9__", !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_14__", !7, i64 0, !10, i64 8}
!16 = !{!6, !13, i64 24}
!17 = !{!6, !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !13, i64 0}
!20 = !{!"TYPE_13__", !13, i64 0, !7, i64 8, !10, i64 16, !10, i64 24}
!21 = !{!20, !7, i64 8}
!22 = !{!20, !10, i64 24}
!23 = !{!13, !13, i64 0}
!24 = !{!25, !7, i64 0}
!25 = !{!"TYPE_11__", !7, i64 0, !7, i64 4}
!26 = !{!25, !7, i64 4}
!27 = !{!15, !10, i64 8}
!28 = !{!20, !10, i64 16}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_hfc_pci.c_hfcpci_fill_dfifo.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/isdn/hisax/extr_hfc_pci.c_hfcpci_fill_dfifo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { i32, i32 }
@L1_DEB_ISAC = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [43 x i8] c"hfcpci_fill_Dfifo f1(%d) f2(%d) z1(f1)(%x)\00", align 1
@D_FREG_MASK = common local_unnamed_addr global i64 0, align 8
@MAX_D_FRAMES = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [36 x i8] c"hfcpci_fill_Dfifo more as 14 frames\00", align 1
@D_FIFO_SIZE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [32 x i8] c"hfcpci_fill_Dfifo count(%ld/%d)\00", align 1
@.str.3 = private unnamed_addr constant [30 x i8] c"hfcpci_fill_Dfifo no fifo mem\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @hfcpci_fill_dfifo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @hfcpci_fill_dfifo(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %124, label %5
5: ; preds = %1
%6 = load i32, ptr %3, align 8, !tbaa !15
%7 = icmp slt i32 %6, 1
br i1 %7, label %124, label %8
8: ; preds = %5
%9 = getelementptr inbounds i8, ptr %0, i64 24
%10 = load i64, ptr %9, align 8, !tbaa !17
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %0, align 8, !tbaa !18
%13 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !19
%14 = and i32 %13, %12
%15 = icmp eq i32 %14, 0
br i1 %15, label %27, label %16
16: ; preds = %8
%17 = load i64, ptr %11, align 8, !tbaa !20
%18 = getelementptr inbounds i8, ptr %11, i64 8
%19 = load i32, ptr %18, align 8, !tbaa !22
%20 = getelementptr inbounds i8, ptr %11, i64 24
%21 = load ptr, ptr %20, align 8, !tbaa !23
%22 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !24
%23 = and i64 %22, %17
%24 = getelementptr inbounds %struct.TYPE_11__, ptr %21, i64 %23
%25 = load i32, ptr %24, align 4, !tbaa !25
%26 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str, i64 noundef %17, i32 noundef %19, i32 noundef %25) #3
br label %27
27: ; preds = %16, %8
%28 = load i64, ptr %11, align 8, !tbaa !20
%29 = getelementptr inbounds i8, ptr %11, i64 8
%30 = load i32, ptr %29, align 8, !tbaa !22
%31 = trunc i64 %28 to i32
%32 = sub i32 %31, %30
%33 = icmp slt i32 %32, 0
%34 = load i32, ptr @MAX_D_FRAMES, align 4
%35 = add nsw i32 %34, 1
%36 = select i1 %33, i32 %35, i32 0
%37 = add nsw i32 %36, %32
%38 = icmp slt i32 %37, %34
br i1 %38, label %46, label %39
39: ; preds = %27
%40 = load i32, ptr %0, align 8, !tbaa !18
%41 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !19
%42 = and i32 %41, %40
%43 = icmp eq i32 %42, 0
br i1 %43, label %124, label %44
44: ; preds = %39
%45 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #3
br label %124
46: ; preds = %27
%47 = getelementptr inbounds i8, ptr %11, i64 24
%48 = load ptr, ptr %47, align 8, !tbaa !23
%49 = sext i32 %30 to i64
%50 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !24
%51 = and i64 %50, %49
%52 = getelementptr inbounds %struct.TYPE_11__, ptr %48, i64 %51, i32 1
%53 = load i32, ptr %52, align 4, !tbaa !27
%54 = and i64 %50, %28
%55 = getelementptr inbounds %struct.TYPE_11__, ptr %48, i64 %54
%56 = load i32, ptr %55, align 4, !tbaa !25
%57 = xor i32 %56, -1
%58 = add i32 %53, %57
%59 = load i32, ptr @D_FIFO_SIZE, align 4
%60 = icmp sgt i32 %58, 0
%61 = select i1 %60, i32 0, i32 %59
%62 = add nsw i32 %61, %58
%63 = load i32, ptr %0, align 8, !tbaa !18
%64 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !19
%65 = and i32 %64, %63
%66 = icmp eq i32 %65, 0
%67 = load ptr, ptr %2, align 8, !tbaa !6
br i1 %66, label %72, label %68
68: ; preds = %46
%69 = load i32, ptr %67, align 8, !tbaa !15
%70 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str.2, i32 noundef %69, i32 noundef %62) #3
%71 = load ptr, ptr %2, align 8, !tbaa !6
br label %72
72: ; preds = %68, %46
%73 = phi ptr [ %71, %68 ], [ %67, %46 ]
%74 = load i32, ptr %73, align 8, !tbaa !15
%75 = icmp slt i32 %62, %74
br i1 %75, label %76, label %83
76: ; preds = %72
%77 = load i32, ptr %0, align 8, !tbaa !18
%78 = load i32, ptr @L1_DEB_ISAC, align 4, !tbaa !19
%79 = and i32 %78, %77
%80 = icmp eq i32 %79, 0
br i1 %80, label %124, label %81
81: ; preds = %76
%82 = tail call i32 (ptr, ptr, ...) @debugl1(ptr noundef nonnull %0, ptr noundef nonnull @.str.3) #3
br label %124
83: ; preds = %72
%84 = load ptr, ptr %47, align 8, !tbaa !23
%85 = load i64, ptr %11, align 8, !tbaa !20
%86 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !24
%87 = and i64 %86, %85
%88 = getelementptr inbounds %struct.TYPE_11__, ptr %84, i64 %87
%89 = load i32, ptr %88, align 4, !tbaa !25
%90 = add nsw i32 %89, %74
%91 = load i32, ptr @D_FIFO_SIZE, align 4, !tbaa !19
%92 = add nsw i32 %91, -1
%93 = and i32 %92, %90
%94 = add i64 %85, 1
%95 = and i64 %94, %86
%96 = add i64 %86, 1
%97 = or i64 %95, %96
%98 = getelementptr inbounds i8, ptr %73, i64 8
%99 = load ptr, ptr %98, align 8, !tbaa !28
%100 = getelementptr inbounds i8, ptr %11, i64 16
%101 = load ptr, ptr %100, align 8, !tbaa !29
%102 = sext i32 %89 to i64
%103 = getelementptr inbounds i64, ptr %101, i64 %102
%104 = sub nsw i32 %91, %89
%105 = tail call i32 @llvm.smin.i32(i32 %104, i32 %74)
%106 = tail call i32 @memcpy(ptr noundef %103, ptr noundef %99, i32 noundef %105) #3
%107 = icmp sgt i32 %74, %104
br i1 %107, label %108, label %114
108: ; preds = %83
%109 = sub nsw i32 %74, %105
%110 = load ptr, ptr %100, align 8, !tbaa !29
%111 = sext i32 %105 to i64
%112 = getelementptr inbounds i64, ptr %99, i64 %111
%113 = tail call i32 @memcpy(ptr noundef %110, ptr noundef %112, i32 noundef %109) #3
br label %114
114: ; preds = %108, %83
%115 = load ptr, ptr %47, align 8, !tbaa !23
%116 = load i64, ptr @D_FREG_MASK, align 8, !tbaa !24
%117 = and i64 %116, %97
%118 = getelementptr inbounds %struct.TYPE_11__, ptr %115, i64 %117
store i32 %93, ptr %118, align 4, !tbaa !25
%119 = load i64, ptr %11, align 8, !tbaa !20
%120 = and i64 %119, %116
%121 = getelementptr inbounds %struct.TYPE_11__, ptr %115, i64 %120
store i32 %93, ptr %121, align 4, !tbaa !25
store i64 %97, ptr %11, align 8, !tbaa !20
%122 = load ptr, ptr %2, align 8, !tbaa !6
%123 = tail call i32 @dev_kfree_skb_any(ptr noundef %122) #3
store ptr null, ptr %2, align 8, !tbaa !6
br label %124
124: ; preds = %76, %81, %39, %44, %5, %1, %114
ret void
}
declare i32 @debugl1(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_kfree_skb_any(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"IsdnCardState", !8, i64 0, !11, i64 8, !8, i64 16, !12, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_10__", !13, i64 0}
!13 = !{!"TYPE_9__", !14, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"TYPE_14__", !8, i64 0, !11, i64 8}
!17 = !{!7, !14, i64 24}
!18 = !{!7, !8, i64 0}
!19 = !{!8, !8, i64 0}
!20 = !{!21, !14, i64 0}
!21 = !{!"TYPE_13__", !14, i64 0, !8, i64 8, !11, i64 16, !11, i64 24}
!22 = !{!21, !8, i64 8}
!23 = !{!21, !11, i64 24}
!24 = !{!14, !14, i64 0}
!25 = !{!26, !8, i64 0}
!26 = !{!"TYPE_11__", !8, i64 0, !8, i64 4}
!27 = !{!26, !8, i64 4}
!28 = !{!16, !11, i64 8}
!29 = !{!21, !11, i64 16}
| fastsocket_kernel_drivers_isdn_hisax_extr_hfc_pci.c_hfcpci_fill_dfifo |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/lib/extr_code-patching.c_instr_is_relative_branch.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/lib/extr_code-patching.c_instr_is_relative_branch.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BRANCH_ABSOLUTE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @instr_is_relative_branch(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @BRANCH_ABSOLUTE, align 4, !tbaa !5
%3 = and i32 %2, %0
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = tail call i64 @instr_is_branch_iform(i32 noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @instr_is_branch_bform(i32 noundef %0) #2
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %8, %1
%13 = phi i32 [ 0, %1 ], [ 1, %5 ], [ %11, %8 ]
ret i32 %13
}
declare i64 @instr_is_branch_iform(i32 noundef) local_unnamed_addr #1
declare i64 @instr_is_branch_bform(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/lib/extr_code-patching.c_instr_is_relative_branch.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/lib/extr_code-patching.c_instr_is_relative_branch.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BRANCH_ABSOLUTE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @instr_is_relative_branch(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @BRANCH_ABSOLUTE, align 4, !tbaa !6
%3 = and i32 %2, %0
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = tail call i64 @instr_is_branch_iform(i32 noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call i64 @instr_is_branch_bform(i32 noundef %0) #2
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %8, %1
%13 = phi i32 [ 0, %1 ], [ 1, %5 ], [ %11, %8 ]
ret i32 %13
}
declare i64 @instr_is_branch_iform(i32 noundef) local_unnamed_addr #1
declare i64 @instr_is_branch_bform(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_powerpc_lib_extr_code-patching.c_instr_is_relative_branch |
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_inline.c'
source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_inline.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i64 }
@.str = private unnamed_addr constant [13 x i8] c"=init_by_lua\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"init_by_lua\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @ngx_http_lua_init_by_inline(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = inttoptr i64 %5 to ptr
%7 = load i32, ptr %1, align 8, !tbaa !12
%8 = tail call i64 @luaL_loadbuffer(ptr noundef %2, ptr noundef %6, i32 noundef %7, ptr noundef nonnull @.str) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = tail call i64 @ngx_http_lua_do_call(ptr noundef %0, ptr noundef %2) #2
%12 = icmp ne i64 %11, 0
%13 = zext i1 %12 to i32
br label %14
14: ; preds = %10, %3
%15 = phi i32 [ 1, %3 ], [ %13, %10 ]
%16 = tail call i32 @ngx_http_lua_report(ptr noundef %0, ptr noundef %2, i32 noundef %15, ptr noundef nonnull @.str.1) #2
ret i32 %16
}
declare i64 @luaL_loadbuffer(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ngx_http_lua_do_call(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_report(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!6, !8, i64 0}
| ; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_inline.c'
source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_inline.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [13 x i8] c"=init_by_lua\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"init_by_lua\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ngx_http_lua_init_by_inline(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = inttoptr i64 %5 to ptr
%7 = load i32, ptr %1, align 8, !tbaa !13
%8 = tail call i64 @luaL_loadbuffer(ptr noundef %2, ptr noundef %6, i32 noundef %7, ptr noundef nonnull @.str) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = tail call i64 @ngx_http_lua_do_call(ptr noundef %0, ptr noundef %2) #2
%12 = icmp ne i64 %11, 0
%13 = zext i1 %12 to i32
br label %14
14: ; preds = %10, %3
%15 = phi i32 [ 1, %3 ], [ %13, %10 ]
%16 = tail call i32 @ngx_http_lua_report(ptr noundef %0, ptr noundef %2, i32 noundef %15, ptr noundef nonnull @.str.1) #2
ret i32 %16
}
declare i64 @luaL_loadbuffer(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ngx_http_lua_do_call(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_lua_report(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!7, !9, i64 0}
| tengine_modules_ngx_http_lua_module_src_extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_inline |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_ks8851_mll.c_ks_get_link.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_ks8851_mll.c_ks_get_link.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ks_get_link], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ks_get_link(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = tail call i32 @mii_link_ok(ptr noundef %2) #2
ret i32 %3
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @mii_link_ok(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_ks8851_mll.c_ks_get_link.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_ks8851_mll.c_ks_get_link.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ks_get_link], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ks_get_link(ptr noundef %0) #0 {
%2 = tail call ptr @netdev_priv(ptr noundef %0) #2
%3 = tail call i32 @mii_link_ok(ptr noundef %2) #2
ret i32 %3
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i32 @mii_link_ok(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_net_extr_ks8851_mll.c_ks_get_link |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ata/chipsets/extr_ata-promise.c_ata_promise_mio_command.c'
source_filename = "AnghaBench/freebsd/sys/dev/ata/chipsets/extr_ata-promise.c_ata_promise_mio_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ata_request = type { i32, ptr, %struct.TYPE_8__, i32 }
%struct.TYPE_8__ = type { %struct.TYPE_7__ }
%struct.TYPE_7__ = type { i32 }
%struct.ata_channel = type { i32, %struct.TYPE_10__ }
%struct.TYPE_10__ = type { i32, i64 }
%struct.ata_pci_controller = type { i32, ptr }
@PR_SATA2 = dso_local local_unnamed_addr global i64 0, align 8
@PR_CMBO2 = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ata_promise_mio_command], section "llvm.metadata"
@switch.table.ata_promise_mio_command = private unnamed_addr constant [4 x i32] [i32 65536, i32 65536, i32 65540, i32 65540], align 4
; Function Attrs: nounwind uwtable
define internal i32 @ata_promise_mio_command(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.ata_request, ptr %0, i64 0, i32 3
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = tail call i32 @device_get_parent(i32 noundef %3) #2
%5 = tail call ptr @device_get_softc(i32 noundef %4) #2
%6 = load i32, ptr %2, align 4, !tbaa !5
%7 = tail call ptr @device_get_softc(i32 noundef %6) #2
%8 = getelementptr inbounds %struct.ata_channel, ptr %7, i64 0, i32 1
%9 = getelementptr inbounds %struct.ata_channel, ptr %7, i64 0, i32 1, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %5, align 8, !tbaa !17
%13 = load i32, ptr %7, align 8, !tbaa !19
%14 = shl i32 %13, 2
%15 = add i32 %14, 4
%16 = tail call i32 @ATA_OUTL(i32 noundef %12, i32 noundef %15, i32 noundef 1) #2
%17 = getelementptr inbounds %struct.ata_pci_controller, ptr %5, i64 0, i32 1
%18 = load ptr, ptr %17, align 8, !tbaa !20
%19 = load i64, ptr %18, align 8, !tbaa !21
%20 = load i64, ptr @PR_SATA2, align 8, !tbaa !23
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %1
%23 = load i32, ptr %7, align 8, !tbaa !19
br label %30
24: ; preds = %1
%25 = load i64, ptr @PR_CMBO2, align 8, !tbaa !23
%26 = icmp eq i64 %19, %25
br i1 %26, label %27, label %38
27: ; preds = %24
%28 = load i32, ptr %7, align 8, !tbaa !19
%29 = icmp slt i32 %28, 2
br i1 %29, label %30, label %38
30: ; preds = %22, %27
%31 = phi i32 [ %23, %22 ], [ %28, %27 ]
%32 = load i32, ptr %5, align 8, !tbaa !17
%33 = shl i32 %31, 8
%34 = add nsw i32 %33, 1256
%35 = load i32, ptr %0, align 8, !tbaa !24
%36 = and i32 %35, 15
%37 = tail call i32 @ATA_OUTB(i32 noundef %32, i32 noundef %34, i32 noundef %36) #2
br label %38
38: ; preds = %30, %27, %24
%39 = getelementptr inbounds %struct.ata_request, ptr %0, i64 0, i32 2
%40 = load i32, ptr %39, align 8, !tbaa !25
%41 = add i32 %40, -128
%42 = icmp ult i32 %41, 4
br i1 %42, label %45, label %43
43: ; preds = %38
%44 = tail call i32 @ata_generic_command(ptr noundef nonnull %0) #2
br label %66
45: ; preds = %38
%46 = zext nneg i32 %41 to i64
%47 = getelementptr inbounds [4 x i32], ptr @switch.table.ata_promise_mio_command, i64 0, i64 %46
%48 = load i32, ptr %47, align 4
%49 = load i32, ptr %7, align 8, !tbaa !19
%50 = shl i32 %49, 16
%51 = add i32 %50, %48
%52 = tail call i64 @htole32(i32 noundef %51) #2
store i64 %52, ptr %11, align 8, !tbaa !23
%53 = getelementptr inbounds %struct.ata_request, ptr %0, i64 0, i32 1
%54 = load ptr, ptr %53, align 8, !tbaa !26
%55 = load i32, ptr %54, align 4, !tbaa !27
%56 = tail call i64 @htole32(i32 noundef %55) #2
%57 = getelementptr inbounds i64, ptr %11, i64 1
store i64 %56, ptr %57, align 8, !tbaa !23
%58 = getelementptr inbounds i64, ptr %11, i64 2
store i64 0, ptr %58, align 8, !tbaa !23
%59 = tail call i32 @ata_promise_apkt(ptr noundef nonnull %11, ptr noundef nonnull %0) #2
%60 = load i32, ptr %5, align 8, !tbaa !17
%61 = load i32, ptr %7, align 8, !tbaa !19
%62 = shl i32 %61, 7
%63 = add nsw i32 %62, 576
%64 = load i32, ptr %8, align 8, !tbaa !29
%65 = tail call i32 @ATA_OUTL(i32 noundef %60, i32 noundef %63, i32 noundef %64) #2
br label %66
66: ; preds = %45, %43
%67 = phi i32 [ %44, %43 ], [ 0, %45 ]
ret i32 %67
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @ATA_OUTL(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ATA_OUTB(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ata_generic_command(ptr noundef) local_unnamed_addr #1
declare i64 @htole32(i32 noundef) local_unnamed_addr #1
declare i32 @ata_promise_apkt(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 20}
!6 = !{!"ata_request", !7, i64 0, !10, i64 8, !11, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0}
!12 = !{!"TYPE_7__", !7, i64 0}
!13 = !{!14, !16, i64 16}
!14 = !{!"ata_channel", !7, i64 0, !15, i64 8}
!15 = !{!"TYPE_10__", !7, i64 0, !16, i64 8}
!16 = !{!"long", !8, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"ata_pci_controller", !7, i64 0, !10, i64 8}
!19 = !{!14, !7, i64 0}
!20 = !{!18, !10, i64 8}
!21 = !{!22, !16, i64 0}
!22 = !{!"TYPE_6__", !16, i64 0}
!23 = !{!16, !16, i64 0}
!24 = !{!6, !7, i64 0}
!25 = !{!6, !7, i64 16}
!26 = !{!6, !10, i64 8}
!27 = !{!28, !7, i64 0}
!28 = !{!"TYPE_9__", !7, i64 0}
!29 = !{!14, !7, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ata/chipsets/extr_ata-promise.c_ata_promise_mio_command.c'
source_filename = "AnghaBench/freebsd/sys/dev/ata/chipsets/extr_ata-promise.c_ata_promise_mio_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PR_SATA2 = common local_unnamed_addr global i64 0, align 8
@PR_CMBO2 = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @ata_promise_mio_command], section "llvm.metadata"
@switch.table.ata_promise_mio_command = private unnamed_addr constant [4 x i32] [i32 65536, i32 65536, i32 65540, i32 65540], align 4
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ata_promise_mio_command(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 20
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call i32 @device_get_parent(i32 noundef %3) #2
%5 = tail call ptr @device_get_softc(i32 noundef %4) #2
%6 = load i32, ptr %2, align 4, !tbaa !6
%7 = tail call ptr @device_get_softc(i32 noundef %6) #2
%8 = getelementptr inbounds i8, ptr %7, i64 8
%9 = getelementptr inbounds i8, ptr %7, i64 16
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = inttoptr i64 %10 to ptr
%12 = load i32, ptr %5, align 8, !tbaa !18
%13 = load i32, ptr %7, align 8, !tbaa !20
%14 = shl i32 %13, 2
%15 = add i32 %14, 4
%16 = tail call i32 @ATA_OUTL(i32 noundef %12, i32 noundef %15, i32 noundef 1) #2
%17 = getelementptr inbounds i8, ptr %5, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !21
%19 = load i64, ptr %18, align 8, !tbaa !22
%20 = load i64, ptr @PR_SATA2, align 8, !tbaa !24
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %24
22: ; preds = %1
%23 = load i32, ptr %7, align 8, !tbaa !20
br label %30
24: ; preds = %1
%25 = load i64, ptr @PR_CMBO2, align 8, !tbaa !24
%26 = icmp eq i64 %19, %25
br i1 %26, label %27, label %38
27: ; preds = %24
%28 = load i32, ptr %7, align 8, !tbaa !20
%29 = icmp slt i32 %28, 2
br i1 %29, label %30, label %38
30: ; preds = %22, %27
%31 = phi i32 [ %23, %22 ], [ %28, %27 ]
%32 = load i32, ptr %5, align 8, !tbaa !18
%33 = shl i32 %31, 8
%34 = add nsw i32 %33, 1256
%35 = load i32, ptr %0, align 8, !tbaa !25
%36 = and i32 %35, 15
%37 = tail call i32 @ATA_OUTB(i32 noundef %32, i32 noundef %34, i32 noundef %36) #2
br label %38
38: ; preds = %30, %27, %24
%39 = getelementptr inbounds i8, ptr %0, i64 16
%40 = load i32, ptr %39, align 8, !tbaa !26
%41 = add i32 %40, -128
%42 = icmp ult i32 %41, 4
br i1 %42, label %45, label %43
43: ; preds = %38
%44 = tail call i32 @ata_generic_command(ptr noundef nonnull %0) #2
br label %66
45: ; preds = %38
%46 = zext nneg i32 %41 to i64
%47 = getelementptr inbounds [4 x i32], ptr @switch.table.ata_promise_mio_command, i64 0, i64 %46
%48 = load i32, ptr %47, align 4
%49 = load i32, ptr %7, align 8, !tbaa !20
%50 = shl i32 %49, 16
%51 = add i32 %50, %48
%52 = tail call i64 @htole32(i32 noundef %51) #2
store i64 %52, ptr %11, align 8, !tbaa !24
%53 = getelementptr inbounds i8, ptr %0, i64 8
%54 = load ptr, ptr %53, align 8, !tbaa !27
%55 = load i32, ptr %54, align 4, !tbaa !28
%56 = tail call i64 @htole32(i32 noundef %55) #2
%57 = getelementptr inbounds i8, ptr %11, i64 8
store i64 %56, ptr %57, align 8, !tbaa !24
%58 = getelementptr inbounds i8, ptr %11, i64 16
store i64 0, ptr %58, align 8, !tbaa !24
%59 = tail call i32 @ata_promise_apkt(ptr noundef nonnull %11, ptr noundef nonnull %0) #2
%60 = load i32, ptr %5, align 8, !tbaa !18
%61 = load i32, ptr %7, align 8, !tbaa !20
%62 = shl i32 %61, 7
%63 = add nsw i32 %62, 576
%64 = load i32, ptr %8, align 8, !tbaa !30
%65 = tail call i32 @ATA_OUTL(i32 noundef %60, i32 noundef %63, i32 noundef %64) #2
br label %66
66: ; preds = %45, %43
%67 = phi i32 [ %44, %43 ], [ 0, %45 ]
ret i32 %67
}
declare ptr @device_get_softc(i32 noundef) local_unnamed_addr #1
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare i32 @ATA_OUTL(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ATA_OUTB(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ata_generic_command(ptr noundef) local_unnamed_addr #1
declare i64 @htole32(i32 noundef) local_unnamed_addr #1
declare i32 @ata_promise_apkt(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 20}
!7 = !{!"ata_request", !8, i64 0, !11, i64 8, !12, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0}
!13 = !{!"TYPE_7__", !8, i64 0}
!14 = !{!15, !17, i64 16}
!15 = !{!"ata_channel", !8, i64 0, !16, i64 8}
!16 = !{!"TYPE_10__", !8, i64 0, !17, i64 8}
!17 = !{!"long", !9, i64 0}
!18 = !{!19, !8, i64 0}
!19 = !{!"ata_pci_controller", !8, i64 0, !11, i64 8}
!20 = !{!15, !8, i64 0}
!21 = !{!19, !11, i64 8}
!22 = !{!23, !17, i64 0}
!23 = !{!"TYPE_6__", !17, i64 0}
!24 = !{!17, !17, i64 0}
!25 = !{!7, !8, i64 0}
!26 = !{!7, !8, i64 16}
!27 = !{!7, !11, i64 8}
!28 = !{!29, !8, i64 0}
!29 = !{!"TYPE_9__", !8, i64 0}
!30 = !{!15, !8, i64 8}
| freebsd_sys_dev_ata_chipsets_extr_ata-promise.c_ata_promise_mio_command |
; ModuleID = 'AnghaBench/linux/drivers/clk/extr_clk-gpio.c_clk_gpio_gate_enable.c'
source_filename = "AnghaBench/linux/drivers/clk/extr_clk-gpio.c_clk_gpio_gate_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @clk_gpio_gate_enable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @clk_gpio_gate_enable(ptr noundef %0) #0 {
%2 = tail call ptr @to_clk_gpio(ptr noundef %0) #2
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = tail call i32 @gpiod_set_value(i32 noundef %3, i32 noundef 1) #2
ret i32 0
}
declare ptr @to_clk_gpio(ptr noundef) local_unnamed_addr #1
declare i32 @gpiod_set_value(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"clk_gpio", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/clk/extr_clk-gpio.c_clk_gpio_gate_enable.c'
source_filename = "AnghaBench/linux/drivers/clk/extr_clk-gpio.c_clk_gpio_gate_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @clk_gpio_gate_enable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @clk_gpio_gate_enable(ptr noundef %0) #0 {
%2 = tail call ptr @to_clk_gpio(ptr noundef %0) #2
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = tail call i32 @gpiod_set_value(i32 noundef %3, i32 noundef 1) #2
ret i32 0
}
declare ptr @to_clk_gpio(ptr noundef) local_unnamed_addr #1
declare i32 @gpiod_set_value(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"clk_gpio", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_clk_extr_clk-gpio.c_clk_gpio_gate_enable |
; ModuleID = 'AnghaBench/freebsd/sys/mips/cavium/usb/extr_octusb.c_octusb_resume.c'
source_filename = "AnghaBench/freebsd/sys/mips/cavium/usb/extr_octusb.c_octusb_resume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @octusb_resume], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @octusb_resume(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/mips/cavium/usb/extr_octusb.c_octusb_resume.c'
source_filename = "AnghaBench/freebsd/sys/mips/cavium/usb/extr_octusb.c_octusb_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @octusb_resume], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @octusb_resume(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_mips_cavium_usb_extr_octusb.c_octusb_resume |
; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/function/extr_uvc_video.c_uvc_video_encode_header.c'
source_filename = "AnghaBench/linux/drivers/usb/gadget/function/extr_uvc_video.c_uvc_video_encode_header.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.uvc_video = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@UVC_STREAM_EOH = dso_local local_unnamed_addr global i32 0, align 4
@UVC_STREAM_EOF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uvc_video_encode_header], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal noundef i32 @uvc_video_encode_header(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3) #0 {
store i32 2, ptr %2, align 4, !tbaa !5
%5 = load i32, ptr @UVC_STREAM_EOH, align 4, !tbaa !5
%6 = load i32, ptr %0, align 4, !tbaa !9
%7 = or i32 %6, %5
%8 = getelementptr inbounds i32, ptr %2, i64 1
store i32 %7, ptr %8, align 4, !tbaa !5
%9 = load i32, ptr %1, align 4, !tbaa !12
%10 = getelementptr inbounds %struct.uvc_video, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = sub nsw i32 %9, %11
%13 = add nsw i32 %3, -2
%14 = icmp sgt i32 %12, %13
br i1 %14, label %18, label %15
15: ; preds = %4
%16 = load i32, ptr @UVC_STREAM_EOF, align 4, !tbaa !5
%17 = or i32 %16, %7
store i32 %17, ptr %8, align 4, !tbaa !5
br label %18
18: ; preds = %15, %4
ret i32 2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"uvc_video", !6, i64 0, !11, i64 4}
!11 = !{!"TYPE_2__", !6, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"uvc_buffer", !6, i64 0}
!14 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/function/extr_uvc_video.c_uvc_video_encode_header.c'
source_filename = "AnghaBench/linux/drivers/usb/gadget/function/extr_uvc_video.c_uvc_video_encode_header.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UVC_STREAM_EOH = common local_unnamed_addr global i32 0, align 4
@UVC_STREAM_EOF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uvc_video_encode_header], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @uvc_video_encode_header(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3) #0 {
store i32 2, ptr %2, align 4, !tbaa !6
%5 = load i32, ptr @UVC_STREAM_EOH, align 4, !tbaa !6
%6 = load i32, ptr %0, align 4, !tbaa !10
%7 = or i32 %6, %5
%8 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %7, ptr %8, align 4, !tbaa !6
%9 = load i32, ptr %1, align 4, !tbaa !13
%10 = getelementptr inbounds i8, ptr %0, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = sub nsw i32 %9, %11
%13 = add nsw i32 %3, -2
%14 = icmp sgt i32 %12, %13
br i1 %14, label %18, label %15
15: ; preds = %4
%16 = load i32, ptr @UVC_STREAM_EOF, align 4, !tbaa !6
%17 = or i32 %16, %7
store i32 %17, ptr %8, align 4, !tbaa !6
br label %18
18: ; preds = %15, %4
ret i32 2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"uvc_video", !7, i64 0, !12, i64 4}
!12 = !{!"TYPE_2__", !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"uvc_buffer", !7, i64 0}
!15 = !{!11, !7, i64 4}
| linux_drivers_usb_gadget_function_extr_uvc_video.c_uvc_video_encode_header |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/extr_virtio_scsi.c_virtscsi_req_done.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/extr_virtio_scsi.c_virtscsi_req_done.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@virtscsi_complete_cmd = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @virtscsi_req_done], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @virtscsi_req_done(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call ptr @virtio_scsi_host(i32 noundef %2) #2
%4 = tail call ptr @shost_priv(ptr noundef %3) #2
%5 = tail call i32 @spin_lock_irqsave(ptr noundef %4, i64 noundef undef) #2
%6 = load i32, ptr @virtscsi_complete_cmd, align 4, !tbaa !10
%7 = tail call i32 @virtscsi_vq_done(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = tail call i32 @spin_unlock_irqrestore(ptr noundef %4, i64 noundef undef) #2
ret void
}
declare ptr @virtio_scsi_host(i32 noundef) local_unnamed_addr #1
declare ptr @shost_priv(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @virtscsi_vq_done(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"virtqueue", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/extr_virtio_scsi.c_virtscsi_req_done.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/extr_virtio_scsi.c_virtscsi_req_done.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@virtscsi_complete_cmd = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @virtscsi_req_done], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @virtscsi_req_done(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call ptr @virtio_scsi_host(i32 noundef %2) #2
%4 = tail call ptr @shost_priv(ptr noundef %3) #2
%5 = tail call i32 @spin_lock_irqsave(ptr noundef %4, i64 noundef undef) #2
%6 = load i32, ptr @virtscsi_complete_cmd, align 4, !tbaa !11
%7 = tail call i32 @virtscsi_vq_done(ptr noundef nonnull %0, i32 noundef %6) #2
%8 = tail call i32 @spin_unlock_irqrestore(ptr noundef %4, i64 noundef undef) #2
ret void
}
declare ptr @virtio_scsi_host(i32 noundef) local_unnamed_addr #1
declare ptr @shost_priv(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @virtscsi_vq_done(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"virtqueue", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_scsi_extr_virtio_scsi.c_virtscsi_req_done |
; ModuleID = 'AnghaBench/linux/sound/pci/trident/extr_trident_main.c_snd_trident_pcm_pan_control_info.c'
source_filename = "AnghaBench/linux/sound/pci/trident/extr_trident_main.c_snd_trident_pcm_pan_control_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ctl_elem_info = type { i32, %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32, i64 }
@SNDRV_CTL_ELEM_TYPE_INTEGER = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_trident_pcm_pan_control_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define internal noundef i32 @snd_trident_pcm_pan_control_info(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_INTEGER, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 2
store i32 %3, ptr %4, align 8, !tbaa !9
store i32 1, ptr %1, align 8, !tbaa !14
%5 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1
%6 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1, i32 0, i32 1
store i64 0, ptr %6, align 8, !tbaa !15
store i32 127, ptr %5, align 8, !tbaa !16
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"snd_ctl_elem_info", !6, i64 0, !11, i64 8, !6, i64 24}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !6, i64 0, !13, i64 8}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !6, i64 0}
!15 = !{!10, !13, i64 16}
!16 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/sound/pci/trident/extr_trident_main.c_snd_trident_pcm_pan_control_info.c'
source_filename = "AnghaBench/linux/sound/pci/trident/extr_trident_main.c_snd_trident_pcm_pan_control_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SNDRV_CTL_ELEM_TYPE_INTEGER = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_trident_pcm_pan_control_info], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @snd_trident_pcm_pan_control_info(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_INTEGER, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %1, i64 24
store i32 %3, ptr %4, align 8, !tbaa !10
store i32 1, ptr %1, align 8, !tbaa !15
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = getelementptr inbounds i8, ptr %1, i64 16
store i64 0, ptr %6, align 8, !tbaa !16
store i32 127, ptr %5, align 8, !tbaa !17
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"snd_ctl_elem_info", !7, i64 0, !12, i64 8, !7, i64 24}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0, !14, i64 8}
!14 = !{!"long", !8, i64 0}
!15 = !{!11, !7, i64 0}
!16 = !{!11, !14, i64 16}
!17 = !{!11, !7, i64 8}
| linux_sound_pci_trident_extr_trident_main.c_snd_trident_pcm_pan_control_info |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/flower/extr_..nfp_port.h_nfp_port_is_vnic.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/flower/extr_..nfp_port.h_nfp_port_is_vnic.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NFP_PORT_PF_PORT = dso_local local_unnamed_addr global i64 0, align 8
@NFP_PORT_VF_PORT = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @nfp_port_is_vnic], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @nfp_port_is_vnic(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @NFP_PORT_PF_PORT, align 8, !tbaa !10
%4 = icmp eq i64 %2, %3
%5 = load i64, ptr @NFP_PORT_VF_PORT, align 8
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
%8 = zext i1 %7 to i32
ret i32 %8
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nfp_port", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/flower/extr_..nfp_port.h_nfp_port_is_vnic.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/flower/extr_..nfp_port.h_nfp_port_is_vnic.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NFP_PORT_PF_PORT = common local_unnamed_addr global i64 0, align 8
@NFP_PORT_VF_PORT = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @nfp_port_is_vnic], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @nfp_port_is_vnic(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @NFP_PORT_PF_PORT, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
%5 = load i64, ptr @NFP_PORT_VF_PORT, align 8
%6 = icmp eq i64 %2, %5
%7 = select i1 %4, i1 true, i1 %6
%8 = zext i1 %7 to i32
ret i32 %8
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nfp_port", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_net_ethernet_netronome_nfp_flower_extr_..nfp_port.h_nfp_port_is_vnic |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_pageout.c_upl_associated_upl.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_pageout.c_upl_associated_upl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @upl_associated_upl(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_pageout.c_upl_associated_upl.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_pageout.c_upl_associated_upl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @upl_associated_upl(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| darwin-xnu_osfmk_vm_extr_vm_pageout.c_upl_associated_upl |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_3590.c_tape_3590_erp_failed.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_3590.c_tape_3590_erp_failed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [30 x i8] c"Error Recovery failed for %s\0A\00", align 1
@tape_op_verbose = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @tape_3590_erp_failed], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal noundef i32 @tape_3590_erp_failed(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef returned %3) #0 {
%5 = load ptr, ptr @tape_op_verbose, align 8, !tbaa !5
%6 = load i64, ptr %1, align 8, !tbaa !9
%7 = getelementptr inbounds i32, ptr %5, i64 %6
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = tail call i32 @DBF_EVENT(i32 noundef 3, ptr noundef nonnull @.str, i32 noundef %8) #2
%10 = tail call i32 @tape_dump_sense_dbf(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2) #2
ret i32 %3
}
declare i32 @DBF_EVENT(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tape_dump_sense_dbf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"tape_request", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_3590.c_tape_3590_erp_failed.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/char/extr_tape_3590.c_tape_3590_erp_failed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [30 x i8] c"Error Recovery failed for %s\0A\00", align 1
@tape_op_verbose = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @tape_3590_erp_failed], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal noundef i32 @tape_3590_erp_failed(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef returned %3) #0 {
%5 = load ptr, ptr @tape_op_verbose, align 8, !tbaa !6
%6 = load i64, ptr %1, align 8, !tbaa !10
%7 = getelementptr inbounds i32, ptr %5, i64 %6
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = tail call i32 @DBF_EVENT(i32 noundef 3, ptr noundef nonnull @.str, i32 noundef %8) #2
%10 = tail call i32 @tape_dump_sense_dbf(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2) #2
ret i32 %3
}
declare i32 @DBF_EVENT(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tape_dump_sense_dbf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"tape_request", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
| fastsocket_kernel_drivers_s390_char_extr_tape_3590.c_tape_3590_erp_failed |
; ModuleID = 'AnghaBench/linux/arch/x86/events/amd/extr_..perf_event.h_intel_cpuc_finish.c'
source_filename = "AnghaBench/linux/arch/x86/events/amd/extr_..perf_event.h_intel_cpuc_finish.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_cpuc_finish], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @intel_cpuc_finish(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/arch/x86/events/amd/extr_..perf_event.h_intel_cpuc_finish.c'
source_filename = "AnghaBench/linux/arch/x86/events/amd/extr_..perf_event.h_intel_cpuc_finish.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @intel_cpuc_finish], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @intel_cpuc_finish(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_x86_events_amd_extr_..perf_event.h_intel_cpuc_finish |
; ModuleID = 'AnghaBench/linux/arch/powerpc/kvm/extr_booke.c_kvmppc_core_vcpu_create.c'
source_filename = "AnghaBench/linux/arch/powerpc/kvm/extr_booke.c_kvmppc_core_vcpu_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @kvmppc_core_vcpu_create(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = tail call ptr %4(ptr noundef nonnull %0, i32 noundef %1) #1
ret ptr %5
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"kvm", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_3__", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/powerpc/kvm/extr_booke.c_kvmppc_core_vcpu_create.c'
source_filename = "AnghaBench/linux/arch/powerpc/kvm/extr_booke.c_kvmppc_core_vcpu_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @kvmppc_core_vcpu_create(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !12
%5 = tail call ptr %4(ptr noundef nonnull %0, i32 noundef %1) #1
ret ptr %5
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"kvm", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !9, i64 0}
!13 = !{!"TYPE_3__", !9, i64 0}
| linux_arch_powerpc_kvm_extr_booke.c_kvmppc_core_vcpu_create |
; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_ov2680.c_ov2680_gain_get.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_ov2680.c_ov2680_gain_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@OV2680_REG_GAIN_PK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ov2680_gain_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ov2680_gain_get(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @OV2680_REG_GAIN_PK, align 4, !tbaa !5
%4 = call i32 @ov2680_read_reg16(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr %2, align 4
%7 = select i1 %5, i32 %6, i32 %4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %7
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ov2680_read_reg16(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/i2c/extr_ov2680.c_ov2680_gain_get.c'
source_filename = "AnghaBench/linux/drivers/media/i2c/extr_ov2680.c_ov2680_gain_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OV2680_REG_GAIN_PK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ov2680_gain_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ov2680_gain_get(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @OV2680_REG_GAIN_PK, align 4, !tbaa !6
%4 = call i32 @ov2680_read_reg16(ptr noundef %0, i32 noundef %3, ptr noundef nonnull %2) #3
%5 = icmp eq i32 %4, 0
%6 = load i32, ptr %2, align 4
%7 = select i1 %5, i32 %6, i32 %4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %7
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ov2680_read_reg16(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_media_i2c_extr_ov2680.c_ov2680_gain_get |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_set_gdbarch_pc_regnum.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_set_gdbarch_pc_regnum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @set_gdbarch_pc_regnum(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"gdbarch", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_set_gdbarch_pc_regnum.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_set_gdbarch_pc_regnum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define void @set_gdbarch_pc_regnum(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
store i32 %1, ptr %0, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"gdbarch", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_gdb_gdb_extr_gdbarch.c_set_gdbarch_pc_regnum |
; ModuleID = 'AnghaBench/redis/src/extr_server.c_version.c'
source_filename = "AnghaBench/redis/src/extr_server.c_version.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [58 x i8] c"Redis server v=%s sha=%s:%d malloc=%s bits=%d build=%llx\0A\00", align 1
@REDIS_VERSION = dso_local local_unnamed_addr global ptr null, align 8
@ZMALLOC_LIB = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: noreturn nounwind uwtable
define dso_local void @version() local_unnamed_addr #0 {
%1 = load ptr, ptr @REDIS_VERSION, align 8, !tbaa !5
%2 = tail call ptr (...) @redisGitSHA1() #3
%3 = tail call i32 (...) @redisGitDirty() #3
%4 = tail call i64 @atoi(i32 noundef %3) #3
%5 = icmp sgt i64 %4, 0
%6 = zext i1 %5 to i32
%7 = load ptr, ptr @ZMALLOC_LIB, align 8, !tbaa !5
%8 = tail call i64 (...) @redisBuildId() #3
%9 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef %1, ptr noundef %2, i32 noundef %6, ptr noundef %7, i32 noundef 64, i64 noundef %8) #3
%10 = tail call i32 @exit(i32 noundef 0) #4
unreachable
}
declare i32 @printf(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare ptr @redisGitSHA1(...) local_unnamed_addr #1
declare i64 @atoi(i32 noundef) local_unnamed_addr #1
declare i32 @redisGitDirty(...) local_unnamed_addr #1
declare i64 @redisBuildId(...) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/redis/src/extr_server.c_version.c'
source_filename = "AnghaBench/redis/src/extr_server.c_version.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [58 x i8] c"Redis server v=%s sha=%s:%d malloc=%s bits=%d build=%llx\0A\00", align 1
@REDIS_VERSION = common local_unnamed_addr global ptr null, align 8
@ZMALLOC_LIB = common local_unnamed_addr global ptr null, align 8
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @version() local_unnamed_addr #0 {
%1 = load ptr, ptr @REDIS_VERSION, align 8, !tbaa !6
%2 = tail call ptr @redisGitSHA1() #3
%3 = tail call i32 @redisGitDirty() #3
%4 = tail call i64 @atoi(i32 noundef %3) #3
%5 = icmp sgt i64 %4, 0
%6 = zext i1 %5 to i32
%7 = load ptr, ptr @ZMALLOC_LIB, align 8, !tbaa !6
%8 = tail call i64 @redisBuildId() #3
%9 = tail call i32 @printf(ptr noundef nonnull @.str, ptr noundef %1, ptr noundef %2, i32 noundef %6, ptr noundef %7, i32 noundef 64, i64 noundef %8) #3
%10 = tail call i32 @exit(i32 noundef 0) #4
unreachable
}
declare i32 @printf(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare ptr @redisGitSHA1(...) local_unnamed_addr #1
declare i64 @atoi(i32 noundef) local_unnamed_addr #1
declare i32 @redisGitDirty(...) local_unnamed_addr #1
declare i64 @redisBuildId(...) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| redis_src_extr_server.c_version |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sprite.c_ivb_disable_plane.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sprite.c_ivb_disable_plane.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.intel_plane = type { i32, i64 }
@SPRITE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ivb_disable_plane], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ivb_disable_plane(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = tail call ptr @to_intel_plane(ptr noundef nonnull %0) #2
%5 = load i32, ptr %4, align 8, !tbaa !12
%6 = load i32, ptr %3, align 4, !tbaa !16
%7 = tail call i32 @SPRCTL(i32 noundef %5) #2
%8 = tail call i32 @SPRCTL(i32 noundef %5) #2
%9 = tail call i32 @I915_READ(i32 noundef %8) #2
%10 = load i32, ptr @SPRITE_ENABLE, align 4, !tbaa !18
%11 = xor i32 %10, -1
%12 = and i32 %9, %11
%13 = tail call i32 @I915_WRITE(i32 noundef %7, i32 noundef %12) #2
%14 = getelementptr inbounds %struct.intel_plane, ptr %4, i64 0, i32 1
%15 = load i64, ptr %14, align 8, !tbaa !19
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %1
%18 = tail call i32 @SPRSCALE(i32 noundef %5) #2
%19 = tail call i32 @I915_WRITE(i32 noundef %18, i32 noundef 0) #2
br label %20
20: ; preds = %17, %1
%21 = tail call i32 @SPRSURF(i32 noundef %5) #2
%22 = tail call i32 @I915_MODIFY_DISPBASE(i32 noundef %21, i32 noundef 0) #2
%23 = tail call i32 @SPRSURF(i32 noundef %5) #2
%24 = tail call i32 @POSTING_READ(i32 noundef %23) #2
%25 = shl nuw i32 1, %5
%26 = xor i32 %25, -1
%27 = load i32, ptr %3, align 4, !tbaa !16
%28 = and i32 %27, %26
store i32 %28, ptr %3, align 4, !tbaa !16
%29 = icmp ne i32 %6, 0
%30 = icmp eq i32 %28, 0
%31 = select i1 %29, i1 %30, i1 false
br i1 %31, label %32, label %34
32: ; preds = %20
%33 = tail call i32 @intel_update_watermarks(ptr noundef nonnull %2) #2
br label %34
34: ; preds = %32, %20
ret void
}
declare ptr @to_intel_plane(ptr noundef) local_unnamed_addr #1
declare i32 @I915_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SPRCTL(i32 noundef) local_unnamed_addr #1
declare i32 @I915_READ(i32 noundef) local_unnamed_addr #1
declare i32 @SPRSCALE(i32 noundef) local_unnamed_addr #1
declare i32 @I915_MODIFY_DISPBASE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SPRSURF(i32 noundef) local_unnamed_addr #1
declare i32 @POSTING_READ(i32 noundef) local_unnamed_addr #1
declare i32 @intel_update_watermarks(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"drm_plane", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"drm_device", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"intel_plane", !14, i64 0, !15, i64 8}
!14 = !{!"int", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!17, !14, i64 0}
!17 = !{!"drm_i915_private", !14, i64 0}
!18 = !{!14, !14, i64 0}
!19 = !{!13, !15, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sprite.c_ivb_disable_plane.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_sprite.c_ivb_disable_plane.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SPRITE_ENABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ivb_disable_plane], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ivb_disable_plane(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !11
%4 = tail call ptr @to_intel_plane(ptr noundef nonnull %0) #2
%5 = load i32, ptr %4, align 8, !tbaa !13
%6 = load i32, ptr %3, align 4, !tbaa !17
%7 = tail call i32 @SPRCTL(i32 noundef %5) #2
%8 = tail call i32 @SPRCTL(i32 noundef %5) #2
%9 = tail call i32 @I915_READ(i32 noundef %8) #2
%10 = load i32, ptr @SPRITE_ENABLE, align 4, !tbaa !19
%11 = xor i32 %10, -1
%12 = and i32 %9, %11
%13 = tail call i32 @I915_WRITE(i32 noundef %7, i32 noundef %12) #2
%14 = getelementptr inbounds i8, ptr %4, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !20
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %1
%18 = tail call i32 @SPRSCALE(i32 noundef %5) #2
%19 = tail call i32 @I915_WRITE(i32 noundef %18, i32 noundef 0) #2
br label %20
20: ; preds = %17, %1
%21 = tail call i32 @SPRSURF(i32 noundef %5) #2
%22 = tail call i32 @I915_MODIFY_DISPBASE(i32 noundef %21, i32 noundef 0) #2
%23 = tail call i32 @SPRSURF(i32 noundef %5) #2
%24 = tail call i32 @POSTING_READ(i32 noundef %23) #2
%25 = shl nuw i32 1, %5
%26 = xor i32 %25, -1
%27 = load i32, ptr %3, align 4, !tbaa !17
%28 = and i32 %27, %26
store i32 %28, ptr %3, align 4, !tbaa !17
%29 = icmp ne i32 %6, 0
%30 = icmp eq i32 %28, 0
%31 = select i1 %29, i1 %30, i1 false
br i1 %31, label %32, label %34
32: ; preds = %20
%33 = tail call i32 @intel_update_watermarks(ptr noundef nonnull %2) #2
br label %34
34: ; preds = %32, %20
ret void
}
declare ptr @to_intel_plane(ptr noundef) local_unnamed_addr #1
declare i32 @I915_WRITE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SPRCTL(i32 noundef) local_unnamed_addr #1
declare i32 @I915_READ(i32 noundef) local_unnamed_addr #1
declare i32 @SPRSCALE(i32 noundef) local_unnamed_addr #1
declare i32 @I915_MODIFY_DISPBASE(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SPRSURF(i32 noundef) local_unnamed_addr #1
declare i32 @POSTING_READ(i32 noundef) local_unnamed_addr #1
declare i32 @intel_update_watermarks(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"drm_plane", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"drm_device", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"intel_plane", !15, i64 0, !16, i64 8}
!15 = !{!"int", !9, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!18, !15, i64 0}
!18 = !{!"drm_i915_private", !15, i64 0}
!19 = !{!15, !15, i64 0}
!20 = !{!14, !16, i64 8}
| fastsocket_kernel_drivers_gpu_drm_i915_extr_intel_sprite.c_ivb_disable_plane |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nfsd/extr_nfs4state.c_get_nfs4_file.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/nfsd/extr_nfs4state.c_get_nfs4_file.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_nfs4_file], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @get_nfs4_file(ptr noundef %0) #0 {
%2 = tail call i32 @atomic_inc(ptr noundef %0) #2
ret void
}
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/nfsd/extr_nfs4state.c_get_nfs4_file.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/nfsd/extr_nfs4state.c_get_nfs4_file.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @get_nfs4_file], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @get_nfs4_file(ptr noundef %0) #0 {
%2 = tail call i32 @atomic_inc(ptr noundef %0) #2
ret void
}
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_fs_nfsd_extr_nfs4state.c_get_nfs4_file |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/amj96/extr_matrix.c_init_rows.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/amj96/extr_matrix.c_init_rows.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PB1 = dso_local local_unnamed_addr global i32 0, align 4
@PB2 = dso_local local_unnamed_addr global i32 0, align 4
@PB3 = dso_local local_unnamed_addr global i32 0, align 4
@DDRB = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @init_rows], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define internal void @init_rows() #0 {
%1 = load i32, ptr @PB1, align 4, !tbaa !5
%2 = shl nuw i32 1, %1
%3 = load i32, ptr @PB2, align 4, !tbaa !5
%4 = shl nuw i32 1, %3
%5 = or i32 %4, %2
%6 = load i32, ptr @PB3, align 4, !tbaa !5
%7 = shl nuw i32 1, %6
%8 = or i32 %5, %7
%9 = load i32, ptr @DDRB, align 4, !tbaa !5
%10 = or i32 %8, %9
store i32 %10, ptr @DDRB, align 4, !tbaa !5
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/amj96/extr_matrix.c_init_rows.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/amj96/extr_matrix.c_init_rows.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PB1 = common local_unnamed_addr global i32 0, align 4
@PB2 = common local_unnamed_addr global i32 0, align 4
@PB3 = common local_unnamed_addr global i32 0, align 4
@DDRB = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @init_rows], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal void @init_rows() #0 {
%1 = load i32, ptr @PB1, align 4, !tbaa !6
%2 = shl nuw i32 1, %1
%3 = load i32, ptr @PB2, align 4, !tbaa !6
%4 = shl nuw i32 1, %3
%5 = or i32 %4, %2
%6 = load i32, ptr @PB3, align 4, !tbaa !6
%7 = shl nuw i32 1, %6
%8 = or i32 %5, %7
%9 = load i32, ptr @DDRB, align 4, !tbaa !6
%10 = or i32 %8, %9
store i32 %10, ptr @DDRB, align 4, !tbaa !6
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| qmk_firmware_keyboards_amj96_extr_matrix.c_init_rows |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_dcb.c_mlxsw_sp_port_dcb_init.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_dcb.c_mlxsw_sp_port_dcb_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlxsw_sp_port = type { ptr, %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
@MLXSW_REG_QPTS_TRUST_STATE_PCP = dso_local local_unnamed_addr global i32 0, align 4
@mlxsw_sp_dcbnl_ops = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @mlxsw_sp_port_dcb_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mlxsw_sp_port_ets_init(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %19
4: ; preds = %1
%5 = tail call i32 @mlxsw_sp_port_maxrate_init(ptr noundef %0) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = tail call i32 @mlxsw_sp_port_pfc_init(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32, ptr @MLXSW_REG_QPTS_TRUST_STATE_PCP, align 4, !tbaa !5
%12 = getelementptr inbounds %struct.mlxsw_sp_port, ptr %0, i64 0, i32 1
store i32 %11, ptr %12, align 8, !tbaa !9
%13 = load ptr, ptr %0, align 8, !tbaa !13
store ptr @mlxsw_sp_dcbnl_ops, ptr %13, align 8, !tbaa !14
br label %19
14: ; preds = %7
%15 = tail call i32 @mlxsw_sp_port_maxrate_fini(ptr noundef %0) #2
br label %16
16: ; preds = %4, %14
%17 = phi i32 [ %5, %4 ], [ %8, %14 ]
%18 = tail call i32 @mlxsw_sp_port_ets_fini(ptr noundef %0) #2
br label %19
19: ; preds = %1, %16, %10
%20 = phi i32 [ %17, %16 ], [ 0, %10 ], [ %2, %1 ]
ret i32 %20
}
declare i32 @mlxsw_sp_port_ets_init(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_maxrate_init(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_pfc_init(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_maxrate_fini(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_ets_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"mlxsw_sp_port", !11, i64 0, !12, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"TYPE_3__", !6, i64 0}
!13 = !{!10, !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_4__", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_dcb.c_mlxsw_sp_port_dcb_init.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_dcb.c_mlxsw_sp_port_dcb_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MLXSW_REG_QPTS_TRUST_STATE_PCP = common local_unnamed_addr global i32 0, align 4
@mlxsw_sp_dcbnl_ops = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mlxsw_sp_port_dcb_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mlxsw_sp_port_ets_init(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %19
4: ; preds = %1
%5 = tail call i32 @mlxsw_sp_port_maxrate_init(ptr noundef %0) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = tail call i32 @mlxsw_sp_port_pfc_init(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32, ptr @MLXSW_REG_QPTS_TRUST_STATE_PCP, align 4, !tbaa !6
%12 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %11, ptr %12, align 8, !tbaa !10
%13 = load ptr, ptr %0, align 8, !tbaa !14
store ptr @mlxsw_sp_dcbnl_ops, ptr %13, align 8, !tbaa !15
br label %19
14: ; preds = %7
%15 = tail call i32 @mlxsw_sp_port_maxrate_fini(ptr noundef %0) #2
br label %16
16: ; preds = %4, %14
%17 = phi i32 [ %5, %4 ], [ %8, %14 ]
%18 = tail call i32 @mlxsw_sp_port_ets_fini(ptr noundef %0) #2
br label %19
19: ; preds = %1, %16, %10
%20 = phi i32 [ %17, %16 ], [ 0, %10 ], [ %2, %1 ]
ret i32 %20
}
declare i32 @mlxsw_sp_port_ets_init(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_maxrate_init(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_pfc_init(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_maxrate_fini(ptr noundef) local_unnamed_addr #1
declare i32 @mlxsw_sp_port_ets_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"mlxsw_sp_port", !12, i64 0, !13, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0}
!14 = !{!11, !12, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_4__", !12, i64 0}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_dcb.c_mlxsw_sp_port_dcb_init |
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/vc/extr_mmal_vc_api.c_mmal_vc_port_set_format.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/vc/extr_mmal_vc_api.c_mmal_vc_port_set_format.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { i64, ptr }
%struct.TYPE_14__ = type { i32, ptr }
@MMAL_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [37 x i8] c"mmal_vc_port_info_set failed %p (%s)\00", align 1
@.str.1 = private unnamed_addr constant [37 x i8] c"mmal_vc_port_info_get failed %p (%s)\00", align 1
@MMAL_PORT_TYPE_INPUT = dso_local local_unnamed_addr global i64 0, align 8
@MMAL_PORT_TYPE_OUTPUT = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [37 x i8] c"mmal_vc_port_info_get failed %p (%i)\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mmal_vc_port_set_format], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @mmal_vc_port_set_format(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load ptr, ptr %4, align 8, !tbaa !13
%6 = tail call i64 @mmal_vc_port_info_set(ptr noundef %0) #2
%7 = load i64, ptr @MMAL_SUCCESS, align 8, !tbaa !15
%8 = icmp eq i64 %6, %7
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = tail call i64 @mmal_status_to_string(i64 noundef %6) #2
%11 = tail call i32 @LOG_ERROR(ptr noundef nonnull @.str, ptr noundef nonnull %0, i64 noundef %10) #2
br label %60
12: ; preds = %1
%13 = tail call i64 @mmal_vc_port_info_get(ptr noundef nonnull %0) #2
%14 = load i64, ptr @MMAL_SUCCESS, align 8, !tbaa !15
%15 = icmp eq i64 %13, %14
br i1 %15, label %19, label %16
16: ; preds = %12
%17 = tail call i64 @mmal_status_to_string(i64 noundef %13) #2
%18 = tail call i32 @LOG_ERROR(ptr noundef nonnull @.str.1, ptr noundef nonnull %0, i64 noundef %17) #2
br label %60
19: ; preds = %12
%20 = load i64, ptr %0, align 8, !tbaa !16
%21 = load i64, ptr @MMAL_PORT_TYPE_INPUT, align 8, !tbaa !15
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %60
23: ; preds = %19
%24 = load i32, ptr %5, align 8, !tbaa !17
%25 = icmp eq i32 %24, 0
br i1 %25, label %60, label %26
26: ; preds = %23
%27 = getelementptr inbounds %struct.TYPE_14__, ptr %5, i64 0, i32 1
%28 = load i64, ptr @MMAL_PORT_TYPE_OUTPUT, align 8, !tbaa !15
br label %29
29: ; preds = %26, %53
%30 = phi i64 [ %13, %26 ], [ %54, %53 ]
%31 = phi i32 [ %24, %26 ], [ %55, %53 ]
%32 = phi i64 [ %28, %26 ], [ %56, %53 ]
%33 = phi i64 [ 0, %26 ], [ %57, %53 ]
%34 = load ptr, ptr %27, align 8, !tbaa !20
%35 = getelementptr inbounds ptr, ptr %34, i64 %33
%36 = load ptr, ptr %35, align 8, !tbaa !21
%37 = load ptr, ptr %36, align 8, !tbaa !22
%38 = load i64, ptr %37, align 8, !tbaa !16
%39 = icmp eq i64 %38, %32
br i1 %39, label %40, label %53
40: ; preds = %29
%41 = tail call i64 @mmal_vc_port_info_get(ptr noundef nonnull %37) #2
%42 = load i64, ptr @MMAL_SUCCESS, align 8, !tbaa !15
%43 = icmp eq i64 %41, %42
br i1 %43, label %44, label %47
44: ; preds = %40
%45 = load i64, ptr @MMAL_PORT_TYPE_OUTPUT, align 8, !tbaa !15
%46 = load i32, ptr %5, align 8, !tbaa !17
br label %53
47: ; preds = %40
%48 = load ptr, ptr %27, align 8, !tbaa !20
%49 = getelementptr inbounds ptr, ptr %48, i64 %33
%50 = load ptr, ptr %49, align 8, !tbaa !21
%51 = load ptr, ptr %50, align 8, !tbaa !22
%52 = tail call i32 @LOG_ERROR(ptr noundef nonnull @.str.2, ptr noundef %51, i64 noundef %41) #2
br label %60
53: ; preds = %44, %29
%54 = phi i64 [ %41, %44 ], [ %30, %29 ]
%55 = phi i32 [ %46, %44 ], [ %31, %29 ]
%56 = phi i64 [ %45, %44 ], [ %32, %29 ]
%57 = add nuw nsw i64 %33, 1
%58 = zext i32 %55 to i64
%59 = icmp ult i64 %57, %58
br i1 %59, label %29, label %60, !llvm.loop !24
60: ; preds = %53, %19, %23, %47, %16, %9
%61 = phi i64 [ %6, %9 ], [ %13, %16 ], [ %41, %47 ], [ %13, %23 ], [ %13, %19 ], [ %54, %53 ]
ret i64 %61
}
declare i64 @mmal_vc_port_info_set(ptr noundef) local_unnamed_addr #1
declare i32 @LOG_ERROR(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @mmal_status_to_string(i64 noundef) local_unnamed_addr #1
declare i64 @mmal_vc_port_info_get(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_12__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_13__", !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_10__", !10, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!18, !19, i64 0}
!18 = !{!"TYPE_14__", !19, i64 0, !10, i64 8}
!19 = !{!"int", !8, i64 0}
!20 = !{!18, !10, i64 8}
!21 = !{!10, !10, i64 0}
!22 = !{!23, !10, i64 0}
!23 = !{!"TYPE_11__", !10, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/vc/extr_mmal_vc_api.c_mmal_vc_port_set_format.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/vc/extr_mmal_vc_api.c_mmal_vc_port_set_format.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MMAL_SUCCESS = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [37 x i8] c"mmal_vc_port_info_set failed %p (%s)\00", align 1
@.str.1 = private unnamed_addr constant [37 x i8] c"mmal_vc_port_info_get failed %p (%s)\00", align 1
@MMAL_PORT_TYPE_INPUT = common local_unnamed_addr global i64 0, align 8
@MMAL_PORT_TYPE_OUTPUT = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [37 x i8] c"mmal_vc_port_info_get failed %p (%i)\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mmal_vc_port_set_format], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @mmal_vc_port_set_format(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !12
%5 = load ptr, ptr %4, align 8, !tbaa !14
%6 = tail call i64 @mmal_vc_port_info_set(ptr noundef %0) #2
%7 = load i64, ptr @MMAL_SUCCESS, align 8, !tbaa !16
%8 = icmp eq i64 %6, %7
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = tail call i64 @mmal_status_to_string(i64 noundef %6) #2
%11 = tail call i32 @LOG_ERROR(ptr noundef nonnull @.str, ptr noundef nonnull %0, i64 noundef %10) #2
br label %60
12: ; preds = %1
%13 = tail call i64 @mmal_vc_port_info_get(ptr noundef nonnull %0) #2
%14 = load i64, ptr @MMAL_SUCCESS, align 8, !tbaa !16
%15 = icmp eq i64 %13, %14
br i1 %15, label %19, label %16
16: ; preds = %12
%17 = tail call i64 @mmal_status_to_string(i64 noundef %13) #2
%18 = tail call i32 @LOG_ERROR(ptr noundef nonnull @.str.1, ptr noundef nonnull %0, i64 noundef %17) #2
br label %60
19: ; preds = %12
%20 = load i64, ptr %0, align 8, !tbaa !17
%21 = load i64, ptr @MMAL_PORT_TYPE_INPUT, align 8, !tbaa !16
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %60
23: ; preds = %19
%24 = load i32, ptr %5, align 8, !tbaa !18
%25 = icmp eq i32 %24, 0
br i1 %25, label %60, label %26
26: ; preds = %23
%27 = getelementptr inbounds i8, ptr %5, i64 8
%28 = load i64, ptr @MMAL_PORT_TYPE_OUTPUT, align 8, !tbaa !16
br label %29
29: ; preds = %26, %53
%30 = phi i64 [ %13, %26 ], [ %54, %53 ]
%31 = phi i32 [ %24, %26 ], [ %55, %53 ]
%32 = phi i64 [ %28, %26 ], [ %56, %53 ]
%33 = phi i64 [ 0, %26 ], [ %57, %53 ]
%34 = load ptr, ptr %27, align 8, !tbaa !21
%35 = getelementptr inbounds ptr, ptr %34, i64 %33
%36 = load ptr, ptr %35, align 8, !tbaa !22
%37 = load ptr, ptr %36, align 8, !tbaa !23
%38 = load i64, ptr %37, align 8, !tbaa !17
%39 = icmp eq i64 %38, %32
br i1 %39, label %40, label %53
40: ; preds = %29
%41 = tail call i64 @mmal_vc_port_info_get(ptr noundef nonnull %37) #2
%42 = load i64, ptr @MMAL_SUCCESS, align 8, !tbaa !16
%43 = icmp eq i64 %41, %42
br i1 %43, label %44, label %47
44: ; preds = %40
%45 = load i64, ptr @MMAL_PORT_TYPE_OUTPUT, align 8, !tbaa !16
%46 = load i32, ptr %5, align 8, !tbaa !18
br label %53
47: ; preds = %40
%48 = load ptr, ptr %27, align 8, !tbaa !21
%49 = getelementptr inbounds ptr, ptr %48, i64 %33
%50 = load ptr, ptr %49, align 8, !tbaa !22
%51 = load ptr, ptr %50, align 8, !tbaa !23
%52 = tail call i32 @LOG_ERROR(ptr noundef nonnull @.str.2, ptr noundef %51, i64 noundef %41) #2
br label %60
53: ; preds = %44, %29
%54 = phi i64 [ %41, %44 ], [ %30, %29 ]
%55 = phi i32 [ %46, %44 ], [ %31, %29 ]
%56 = phi i64 [ %45, %44 ], [ %32, %29 ]
%57 = add nuw nsw i64 %33, 1
%58 = zext i32 %55 to i64
%59 = icmp ult i64 %57, %58
br i1 %59, label %29, label %60, !llvm.loop !25
60: ; preds = %53, %19, %23, %47, %16, %9
%61 = phi i64 [ %6, %9 ], [ %13, %16 ], [ %41, %47 ], [ %13, %23 ], [ %13, %19 ], [ %54, %53 ]
ret i64 %61
}
declare i64 @mmal_vc_port_info_set(ptr noundef) local_unnamed_addr #1
declare i32 @LOG_ERROR(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @mmal_status_to_string(i64 noundef) local_unnamed_addr #1
declare i64 @mmal_vc_port_info_get(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_12__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_13__", !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_10__", !11, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!7, !8, i64 0}
!18 = !{!19, !20, i64 0}
!19 = !{!"TYPE_14__", !20, i64 0, !11, i64 8}
!20 = !{!"int", !9, i64 0}
!21 = !{!19, !11, i64 8}
!22 = !{!11, !11, i64 0}
!23 = !{!24, !11, i64 0}
!24 = !{!"TYPE_11__", !11, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
| RetroArch_gfx_include_userland_interface_mmal_vc_extr_mmal_vc_api.c_mmal_vc_port_set_format |
; ModuleID = 'AnghaBench/darwin-xnu/bsd/kern/extr_uipc_domain.c_detach_proto.c'
source_filename = "AnghaBench/darwin-xnu/bsd/kern/extr_uipc_domain.c_detach_proto.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.protosw = type { i32, ptr, ptr }
@PR_ATTACHED = dso_local local_unnamed_addr global i32 0, align 4
@pr_entry = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @detach_proto], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @detach_proto(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 (...) @domain_proto_mtx_lock_assert_held() #3
%4 = load i32, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr @PR_ATTACHED, align 4, !tbaa !11
%6 = and i32 %5, %4
%7 = tail call i32 @VERIFY(i32 noundef %6) #3
%8 = getelementptr inbounds %struct.protosw, ptr %0, i64 0, i32 2
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = icmp eq ptr %9, %1
%11 = zext i1 %10 to i32
%12 = tail call i32 @VERIFY(i32 noundef %11) #3
%13 = getelementptr inbounds %struct.protosw, ptr %0, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = icmp eq ptr %14, %0
%16 = zext i1 %15 to i32
%17 = tail call i32 @VERIFY(i32 noundef %16) #3
%18 = load i32, ptr @pr_entry, align 4, !tbaa !11
%19 = tail call i32 @TAILQ_REMOVE(ptr noundef %1, ptr noundef nonnull %0, i32 noundef %18) #3
%20 = load i32, ptr @PR_ATTACHED, align 4, !tbaa !11
%21 = xor i32 %20, -1
%22 = load i32, ptr %0, align 8, !tbaa !5
%23 = and i32 %22, %21
store i32 %23, ptr %0, align 8, !tbaa !5
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %13, i8 0, i64 16, i1 false)
ret void
}
declare i32 @domain_proto_mtx_lock_assert_held(...) local_unnamed_addr #1
declare i32 @VERIFY(i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"protosw", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 16}
!13 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/darwin-xnu/bsd/kern/extr_uipc_domain.c_detach_proto.c'
source_filename = "AnghaBench/darwin-xnu/bsd/kern/extr_uipc_domain.c_detach_proto.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PR_ATTACHED = common local_unnamed_addr global i32 0, align 4
@pr_entry = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @detach_proto], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @detach_proto(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @domain_proto_mtx_lock_assert_held() #3
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr @PR_ATTACHED, align 4, !tbaa !12
%6 = and i32 %5, %4
%7 = tail call i32 @VERIFY(i32 noundef %6) #3
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = icmp eq ptr %9, %1
%11 = zext i1 %10 to i32
%12 = tail call i32 @VERIFY(i32 noundef %11) #3
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !14
%15 = icmp eq ptr %14, %0
%16 = zext i1 %15 to i32
%17 = tail call i32 @VERIFY(i32 noundef %16) #3
%18 = load i32, ptr @pr_entry, align 4, !tbaa !12
%19 = tail call i32 @TAILQ_REMOVE(ptr noundef %1, ptr noundef nonnull %0, i32 noundef %18) #3
%20 = load i32, ptr @PR_ATTACHED, align 4, !tbaa !12
%21 = xor i32 %20, -1
%22 = load i32, ptr %0, align 8, !tbaa !6
%23 = and i32 %22, %21
store i32 %23, ptr %0, align 8, !tbaa !6
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %13, i8 0, i64 16, i1 false)
ret void
}
declare i32 @domain_proto_mtx_lock_assert_held(...) local_unnamed_addr #1
declare i32 @VERIFY(i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"protosw", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !11, i64 8}
| darwin-xnu_bsd_kern_extr_uipc_domain.c_detach_proto |
; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cbuf_InsertText.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cbuf_InsertText.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32, ptr }
@cmd_text = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@.str = private unnamed_addr constant [28 x i8] c"Cbuf_InsertText overflowed\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @Cbuf_InsertText(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = add nsw i32 %2, 1
%4 = load i32, ptr @cmd_text, align 8, !tbaa !5
%5 = add nsw i32 %3, %4
%6 = load i32, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmd_text, i64 0, i32 1), align 4, !tbaa !11
%7 = icmp sgt i32 %5, %6
br i1 %7, label %25, label %8
8: ; preds = %1
%9 = icmp sgt i32 %4, 0
br i1 %9, label %10, label %46
10: ; preds = %8
%11 = zext nneg i32 %4 to i64
%12 = and i64 %11, 1
%13 = icmp eq i64 %12, 0
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = add nsw i64 %11, -1
%16 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmd_text, i64 0, i32 2), align 8, !tbaa !12
%17 = getelementptr inbounds i8, ptr %16, i64 %15
%18 = load i8, ptr %17, align 1, !tbaa !13
%19 = add i32 %2, %4
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, ptr %16, i64 %20
store i8 %18, ptr %21, align 1, !tbaa !13
br label %22
22: ; preds = %14, %10
%23 = phi i64 [ %11, %10 ], [ %15, %14 ]
%24 = icmp eq i32 %4, 1
br i1 %24, label %46, label %27
25: ; preds = %1
%26 = tail call i32 @Com_Printf(ptr noundef nonnull @.str) #2
br label %54
27: ; preds = %22, %27
%28 = phi i64 [ %37, %27 ], [ %23, %22 ]
%29 = add nsw i64 %28, -1
%30 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmd_text, i64 0, i32 2), align 8, !tbaa !12
%31 = getelementptr inbounds i8, ptr %30, i64 %29
%32 = load i8, ptr %31, align 1, !tbaa !13
%33 = trunc i64 %28 to i32
%34 = add i32 %2, %33
%35 = sext i32 %34 to i64
%36 = getelementptr inbounds i8, ptr %30, i64 %35
store i8 %32, ptr %36, align 1, !tbaa !13
%37 = add nsw i64 %28, -2
%38 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmd_text, i64 0, i32 2), align 8, !tbaa !12
%39 = getelementptr inbounds i8, ptr %38, i64 %37
%40 = load i8, ptr %39, align 1, !tbaa !13
%41 = trunc i64 %29 to i32
%42 = add i32 %2, %41
%43 = sext i32 %42 to i64
%44 = getelementptr inbounds i8, ptr %38, i64 %43
store i8 %40, ptr %44, align 1, !tbaa !13
%45 = icmp ugt i64 %29, 1
br i1 %45, label %27, label %46, !llvm.loop !14
46: ; preds = %22, %27, %8
%47 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmd_text, i64 0, i32 2), align 8, !tbaa !12
%48 = tail call i32 @Com_Memcpy(ptr noundef %47, ptr noundef %0, i32 noundef %2) #2
%49 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @cmd_text, i64 0, i32 2), align 8, !tbaa !12
%50 = sext i32 %2 to i64
%51 = getelementptr inbounds i8, ptr %49, i64 %50
store i8 10, ptr %51, align 1, !tbaa !13
%52 = load i32, ptr @cmd_text, align 8, !tbaa !5
%53 = add nsw i32 %52, %3
store i32 %53, ptr @cmd_text, align 8, !tbaa !5
br label %54
54: ; preds = %46, %25
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @Com_Printf(ptr noundef) local_unnamed_addr #1
declare i32 @Com_Memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !10, i64 8}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cbuf_InsertText.c'
source_filename = "AnghaBench/lab/engine/code/qcommon/extr_cmd.c_Cbuf_InsertText.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32, ptr }
@cmd_text = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@.str = private unnamed_addr constant [28 x i8] c"Cbuf_InsertText overflowed\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @Cbuf_InsertText(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = add nsw i32 %2, 1
%4 = load i32, ptr @cmd_text, align 8, !tbaa !6
%5 = add nsw i32 %3, %4
%6 = load i32, ptr getelementptr inbounds (i8, ptr @cmd_text, i64 4), align 4, !tbaa !12
%7 = icmp sgt i32 %5, %6
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = icmp sgt i32 %4, 0
br i1 %9, label %10, label %25
10: ; preds = %8
%11 = zext nneg i32 %4 to i64
br label %14
12: ; preds = %1
%13 = tail call i32 @Com_Printf(ptr noundef nonnull @.str) #2
br label %33
14: ; preds = %10, %14
%15 = phi i64 [ %11, %10 ], [ %16, %14 ]
%16 = add nsw i64 %15, -1
%17 = load ptr, ptr getelementptr inbounds (i8, ptr @cmd_text, i64 8), align 8, !tbaa !13
%18 = getelementptr inbounds i8, ptr %17, i64 %16
%19 = load i8, ptr %18, align 1, !tbaa !14
%20 = trunc nuw nsw i64 %15 to i32
%21 = add i32 %2, %20
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, ptr %17, i64 %22
store i8 %19, ptr %23, align 1, !tbaa !14
%24 = icmp ugt i64 %15, 1
br i1 %24, label %14, label %25, !llvm.loop !15
25: ; preds = %14, %8
%26 = load ptr, ptr getelementptr inbounds (i8, ptr @cmd_text, i64 8), align 8, !tbaa !13
%27 = tail call i32 @Com_Memcpy(ptr noundef %26, ptr noundef %0, i32 noundef %2) #2
%28 = load ptr, ptr getelementptr inbounds (i8, ptr @cmd_text, i64 8), align 8, !tbaa !13
%29 = sext i32 %2 to i64
%30 = getelementptr inbounds i8, ptr %28, i64 %29
store i8 10, ptr %30, align 1, !tbaa !14
%31 = load i32, ptr @cmd_text, align 8, !tbaa !6
%32 = add nsw i32 %31, %3
store i32 %32, ptr @cmd_text, align 8, !tbaa !6
br label %33
33: ; preds = %25, %12
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @Com_Printf(ptr noundef) local_unnamed_addr #1
declare i32 @Com_Memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !11, i64 8}
!14 = !{!9, !9, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| lab_engine_code_qcommon_extr_cmd.c_Cbuf_InsertText |
; ModuleID = 'AnghaBench/radare2/libr/util/extr_buf_file.c_buf_file_resize.c'
source_filename = "AnghaBench/radare2/libr/util/extr_buf_file.c_buf_file_resize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @buf_file_resize], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @buf_file_resize(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @get_priv_file(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = tail call i64 @r_sandbox_truncate(i32 noundef %4, i32 noundef %1) #2
%6 = icmp sgt i64 %5, -1
%7 = zext i1 %6 to i32
ret i32 %7
}
declare ptr @get_priv_file(ptr noundef) local_unnamed_addr #1
declare i64 @r_sandbox_truncate(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"buf_file_priv", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/radare2/libr/util/extr_buf_file.c_buf_file_resize.c'
source_filename = "AnghaBench/radare2/libr/util/extr_buf_file.c_buf_file_resize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @buf_file_resize], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @buf_file_resize(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @get_priv_file(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = tail call i64 @r_sandbox_truncate(i32 noundef %4, i32 noundef %1) #2
%6 = icmp sgt i64 %5, -1
%7 = zext i1 %6 to i32
ret i32 %7
}
declare ptr @get_priv_file(ptr noundef) local_unnamed_addr #1
declare i64 @r_sandbox_truncate(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"buf_file_priv", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| radare2_libr_util_extr_buf_file.c_buf_file_resize |
; ModuleID = 'AnghaBench/qmk_firmware/tmk_core/protocol/arm_atsam/extr_i2c_master.c_i2c0_transmit.c'
source_filename = "AnghaBench/qmk_firmware/tmk_core/protocol/arm_atsam/extr_i2c_master.c_i2c0_transmit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_15__ = type { %struct.TYPE_14__, %struct.TYPE_12__, %struct.TYPE_10__ }
%struct.TYPE_14__ = type { %struct.TYPE_13__ }
%struct.TYPE_13__ = type { i64 }
%struct.TYPE_12__ = type { %struct.TYPE_11__ }
%struct.TYPE_11__ = type { i64 }
%struct.TYPE_10__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { i32 }
@SERCOM0 = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @i2c0_transmit(i32 noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp eq i64 %2, 0
br i1 %5, label %28, label %6
6: ; preds = %4
%7 = tail call i32 @i2c0_start(i32 noundef %0) #2
%8 = load ptr, ptr @SERCOM0, align 8, !tbaa !5
%9 = getelementptr inbounds %struct.TYPE_15__, ptr %8, i64 0, i32 2
%10 = getelementptr inbounds %struct.TYPE_15__, ptr %8, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !9
%12 = icmp eq i64 %11, 0
br label %13
13: ; preds = %6, %22
%14 = phi i64 [ %2, %6 ], [ %24, %22 ]
%15 = phi ptr [ %1, %6 ], [ %23, %22 ]
%16 = load i32, ptr %15, align 4, !tbaa !20
store i32 %16, ptr %9, align 8, !tbaa !21
br i1 %12, label %17, label %18, !llvm.loop !22
17: ; preds = %13, %17
br label %17
18: ; preds = %13
%19 = load i64, ptr %8, align 8, !tbaa !24
%20 = icmp eq i64 %19, 0
br i1 %20, label %22, label %21, !llvm.loop !25
21: ; preds = %18, %21
br label %21
22: ; preds = %18
%23 = getelementptr inbounds i32, ptr %15, i64 1
%24 = add nsw i64 %14, -1
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %13, !llvm.loop !26
26: ; preds = %22
%27 = tail call i32 (...) @i2c0_stop() #2
br label %28
28: ; preds = %4, %26
%29 = phi i32 [ 1, %26 ], [ 0, %4 ]
ret i32 %29
}
declare i32 @i2c0_start(i32 noundef) local_unnamed_addr #1
declare i32 @i2c0_stop(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !14, i64 8}
!10 = !{!"TYPE_16__", !11, i64 0}
!11 = !{!"TYPE_15__", !12, i64 0, !15, i64 8, !17, i64 16}
!12 = !{!"TYPE_14__", !13, i64 0}
!13 = !{!"TYPE_13__", !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!"TYPE_12__", !16, i64 0}
!16 = !{!"TYPE_11__", !14, i64 0}
!17 = !{!"TYPE_10__", !18, i64 0}
!18 = !{!"TYPE_9__", !19, i64 0}
!19 = !{!"int", !7, i64 0}
!20 = !{!19, !19, i64 0}
!21 = !{!10, !19, i64 16}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!10, !14, i64 0}
!25 = distinct !{!25, !23}
!26 = distinct !{!26, !23}
| ; ModuleID = 'AnghaBench/qmk_firmware/tmk_core/protocol/arm_atsam/extr_i2c_master.c_i2c0_transmit.c'
source_filename = "AnghaBench/qmk_firmware/tmk_core/protocol/arm_atsam/extr_i2c_master.c_i2c0_transmit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SERCOM0 = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @i2c0_transmit(i32 noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp eq i64 %2, 0
br i1 %5, label %28, label %6
6: ; preds = %4
%7 = tail call i32 @i2c0_start(i32 noundef %0) #2
%8 = load ptr, ptr @SERCOM0, align 8, !tbaa !6
%9 = getelementptr inbounds i8, ptr %8, i64 16
%10 = getelementptr inbounds i8, ptr %8, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !10
%12 = icmp eq i64 %11, 0
br label %13
13: ; preds = %6, %22
%14 = phi i64 [ %2, %6 ], [ %24, %22 ]
%15 = phi ptr [ %1, %6 ], [ %23, %22 ]
%16 = load i32, ptr %15, align 4, !tbaa !21
store i32 %16, ptr %9, align 8, !tbaa !22
br i1 %12, label %17, label %18, !llvm.loop !23
17: ; preds = %13, %17
br label %17
18: ; preds = %13
%19 = load i64, ptr %8, align 8, !tbaa !25
%20 = icmp eq i64 %19, 0
br i1 %20, label %22, label %21, !llvm.loop !26
21: ; preds = %18, %21
br label %21
22: ; preds = %18
%23 = getelementptr inbounds i8, ptr %15, i64 4
%24 = add nsw i64 %14, -1
%25 = icmp eq i64 %24, 0
br i1 %25, label %26, label %13, !llvm.loop !27
26: ; preds = %22
%27 = tail call i32 @i2c0_stop() #2
br label %28
28: ; preds = %4, %26
%29 = phi i32 [ 1, %26 ], [ 0, %4 ]
ret i32 %29
}
declare i32 @i2c0_start(i32 noundef) local_unnamed_addr #1
declare i32 @i2c0_stop(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !15, i64 8}
!11 = !{!"TYPE_16__", !12, i64 0}
!12 = !{!"TYPE_15__", !13, i64 0, !16, i64 8, !18, i64 16}
!13 = !{!"TYPE_14__", !14, i64 0}
!14 = !{!"TYPE_13__", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!"TYPE_12__", !17, i64 0}
!17 = !{!"TYPE_11__", !15, i64 0}
!18 = !{!"TYPE_10__", !19, i64 0}
!19 = !{!"TYPE_9__", !20, i64 0}
!20 = !{!"int", !8, i64 0}
!21 = !{!20, !20, i64 0}
!22 = !{!11, !20, i64 16}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!11, !15, i64 0}
!26 = distinct !{!26, !24}
!27 = distinct !{!27, !24}
| qmk_firmware_tmk_core_protocol_arm_atsam_extr_i2c_master.c_i2c0_transmit |
; ModuleID = 'AnghaBench/libui/unix/extr_fontmatch.c_uiprivWeightToPangoWeight.c'
source_filename = "AnghaBench/libui/unix/extr_fontmatch.c_uiprivWeightToPangoWeight.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @uiprivWeightToPangoWeight(i32 noundef returned %0) local_unnamed_addr #0 {
ret i32 %0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/libui/unix/extr_fontmatch.c_uiprivWeightToPangoWeight.c'
source_filename = "AnghaBench/libui/unix/extr_fontmatch.c_uiprivWeightToPangoWeight.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @uiprivWeightToPangoWeight(i32 noundef returned %0) local_unnamed_addr #0 {
ret i32 %0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| libui_unix_extr_fontmatch.c_uiprivWeightToPangoWeight |
; ModuleID = 'AnghaBench/RetroArch/deps/discord-rpc/src/extr_discord_register_linux.c_Discord_RegisterSteamGame.c'
source_filename = "AnghaBench/RetroArch/deps/discord-rpc/src/extr_discord_register_linux.c_Discord_RegisterSteamGame.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [30 x i8] c"xdg-open steam://rungameid/%s\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @Discord_RegisterSteamGame(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca [256 x i8], align 16
call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %3) #3
%4 = call i32 @sprintf(ptr noundef nonnull %3, ptr noundef nonnull @.str, ptr noundef %1) #3
%5 = call i32 @Discord_Register(ptr noundef %0, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Discord_Register(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/RetroArch/deps/discord-rpc/src/extr_discord_register_linux.c_Discord_RegisterSteamGame.c'
source_filename = "AnghaBench/RetroArch/deps/discord-rpc/src/extr_discord_register_linux.c_Discord_RegisterSteamGame.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [30 x i8] c"xdg-open steam://rungameid/%s\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @Discord_RegisterSteamGame(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca [256 x i8], align 1
call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %3) #3
%4 = call i32 @sprintf(ptr noundef nonnull %3, ptr noundef nonnull @.str, ptr noundef %1) #3
%5 = call i32 @Discord_Register(ptr noundef %0, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @Discord_Register(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| RetroArch_deps_discord-rpc_src_extr_discord_register_linux.c_Discord_RegisterSteamGame |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_fence.c_amdgpu_fence_write.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_fence.c_amdgpu_fence_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @amdgpu_fence_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @amdgpu_fence_write(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @cpu_to_le32(i32 noundef %1) #2
%7 = load ptr, ptr %0, align 8, !tbaa !5
store i32 %6, ptr %7, align 4, !tbaa !10
br label %8
8: ; preds = %5, %2
ret void
}
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"amdgpu_fence_driver", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_fence.c_amdgpu_fence_write.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_amdgpu_fence.c_amdgpu_fence_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @amdgpu_fence_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @amdgpu_fence_write(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @cpu_to_le32(i32 noundef %1) #2
%7 = load ptr, ptr %0, align 8, !tbaa !6
store i32 %6, ptr %7, align 4, !tbaa !11
br label %8
8: ; preds = %5, %2
ret void
}
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"amdgpu_fence_driver", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
| linux_drivers_gpu_drm_amd_amdgpu_extr_amdgpu_fence.c_amdgpu_fence_write |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_mbo.c_mbo_attr_from_mbo_ie.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_mbo.c_mbo_attr_from_mbo_ie.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MBO_IE_HEADER = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @mbo_attr_from_mbo_ie(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i32, ptr %0, i64 1
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = load i32, ptr @MBO_IE_HEADER, align 4, !tbaa !5
%6 = add nsw i32 %5, -2
%7 = icmp slt i32 %4, %6
br i1 %7, label %14, label %8
8: ; preds = %2
%9 = sext i32 %5 to i64
%10 = getelementptr inbounds i32, ptr %0, i64 %9
%11 = add nsw i32 %4, 2
%12 = sub i32 %11, %5
%13 = tail call ptr @get_ie(ptr noundef %10, i32 noundef %12, i32 noundef %1) #2
br label %14
14: ; preds = %2, %8
%15 = phi ptr [ %13, %8 ], [ null, %2 ]
ret ptr %15
}
declare ptr @get_ie(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_mbo.c_mbo_attr_from_mbo_ie.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/wpa_supplicant/extr_mbo.c_mbo_attr_from_mbo_ie.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MBO_IE_HEADER = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @mbo_attr_from_mbo_ie(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = load i32, ptr @MBO_IE_HEADER, align 4, !tbaa !6
%6 = add nsw i32 %5, -2
%7 = icmp slt i32 %4, %6
br i1 %7, label %14, label %8
8: ; preds = %2
%9 = sext i32 %5 to i64
%10 = getelementptr inbounds i32, ptr %0, i64 %9
%11 = add nsw i32 %4, 2
%12 = sub i32 %11, %5
%13 = tail call ptr @get_ie(ptr noundef %10, i32 noundef %12, i32 noundef %1) #2
br label %14
14: ; preds = %2, %8
%15 = phi ptr [ %13, %8 ], [ null, %2 ]
ret ptr %15
}
declare ptr @get_ie(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_wpa_wpa_supplicant_extr_mbo.c_mbo_attr_from_mbo_ie |
; ModuleID = 'AnghaBench/freebsd/tests/sys/netinet/extr_ip_reass_test.c_update_cksum.c'
source_filename = "AnghaBench/freebsd/tests/sys/netinet/extr_ip_reass_test.c_update_cksum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @update_cksum], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @update_cksum(ptr nocapture noundef writeonly %0) #0 {
store i32 0, ptr %0, align 4, !tbaa !5
%2 = tail call i64 @ntohs(i32 noundef 0) #2
%3 = trunc i64 %2 to i32
%4 = ashr i32 %3, 16
%5 = and i32 %3, 65535
%6 = add nsw i32 %4, %5
%7 = ashr i32 %6, 16
%8 = add nsw i32 %7, %6
%9 = xor i32 %8, -1
%10 = tail call i32 @htons(i32 noundef %9) #2
store i32 %10, ptr %0, align 4, !tbaa !5
ret void
}
declare i64 @ntohs(i32 noundef) local_unnamed_addr #1
declare i32 @htons(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ip", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/tests/sys/netinet/extr_ip_reass_test.c_update_cksum.c'
source_filename = "AnghaBench/freebsd/tests/sys/netinet/extr_ip_reass_test.c_update_cksum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @update_cksum], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @update_cksum(ptr nocapture noundef writeonly %0) #0 {
store i32 0, ptr %0, align 4, !tbaa !6
%2 = tail call i64 @ntohs(i32 noundef 0) #2
%3 = trunc i64 %2 to i32
%4 = ashr i32 %3, 16
%5 = and i32 %3, 65535
%6 = add nsw i32 %4, %5
%7 = ashr i32 %6, 16
%8 = add nsw i32 %7, %6
%9 = xor i32 %8, -1
%10 = tail call i32 @htons(i32 noundef %9) #2
store i32 %10, ptr %0, align 4, !tbaa !6
ret void
}
declare i64 @ntohs(i32 noundef) local_unnamed_addr #1
declare i32 @htons(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ip", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_tests_sys_netinet_extr_ip_reass_test.c_update_cksum |
; ModuleID = 'AnghaBench/freebsd/contrib/netbsd-tests/net/bpfjit/extr_t_cop.c_retWL.c'
source_filename = "AnghaBench/freebsd/contrib/netbsd-tests/net/bpfjit/extr_t_cop.c_retWL.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @retWL], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @retWL(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, i32 %2) #0 {
%4 = load i32, ptr %1, align 4, !tbaa !5
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/netbsd-tests/net/bpfjit/extr_t_cop.c_retWL.c'
source_filename = "AnghaBench/freebsd/contrib/netbsd-tests/net/bpfjit/extr_t_cop.c_retWL.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @retWL], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @retWL(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, i32 %2) #0 {
%4 = load i32, ptr %1, align 4, !tbaa !6
ret i32 %4
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_netbsd-tests_net_bpfjit_extr_t_cop.c_retWL |
; ModuleID = 'AnghaBench/linux/arch/x86/kernel/fpu/extr_xstate.c_fpstate_sanitize_xstate.c'
source_filename = "AnghaBench/linux/arch/x86/kernel/fpu/extr_xstate.c_fpstate_sanitize_xstate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32 }
%struct.TYPE_7__ = type { %struct.TYPE_6__, %struct.fxregs_state }
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32 }
%struct.fxregs_state = type { i32, ptr, ptr, i64, i64, i64, i64, i64 }
@xfeatures_mask = dso_local local_unnamed_addr global i32 0, align 4
@XFEATURE_MASK_FP = dso_local local_unnamed_addr global i32 0, align 4
@XFEATURE_MASK_SSE = dso_local local_unnamed_addr global i32 0, align 4
@xstate_comp_offsets = dso_local local_unnamed_addr global ptr null, align 8
@xstate_sizes = dso_local local_unnamed_addr global ptr null, align 8
@init_fpstate = dso_local global %struct.TYPE_8__ zeroinitializer, align 4
; Function Attrs: nounwind uwtable
define dso_local void @fpstate_sanitize_xstate(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%3 = tail call i32 (...) @use_xsaveopt() #3
%4 = icmp eq i32 %3, 0
br i1 %4, label %54, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !5
%7 = load i32, ptr @xfeatures_mask, align 4, !tbaa !16
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, %7
br i1 %9, label %54, label %10
10: ; preds = %5
%11 = load i32, ptr @XFEATURE_MASK_FP, align 4, !tbaa !16
%12 = and i32 %11, %6
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %10
store i32 895, ptr %2, align 8, !tbaa !17
%15 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1, i32 3
%16 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1, i32 2
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %15, i8 0, i64 40, i1 false)
%17 = load ptr, ptr %16, align 8, !tbaa !18
%18 = tail call i32 @memset(ptr noundef %17, i32 noundef 0, i32 noundef 128) #3
br label %19
19: ; preds = %14, %10
%20 = load i32, ptr @XFEATURE_MASK_SSE, align 4, !tbaa !16
%21 = and i32 %20, %6
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1, i32 1
%25 = load ptr, ptr %24, align 8, !tbaa !19
%26 = tail call i32 @memset(ptr noundef %25, i32 noundef 0, i32 noundef 256) #3
br label %27
27: ; preds = %23, %19
%28 = load i32, ptr @xfeatures_mask, align 4, !tbaa !16
%29 = xor i32 %6, -1
%30 = and i32 %28, %29
%31 = icmp ult i32 %30, 4
br i1 %31, label %54, label %32
32: ; preds = %27
%33 = ashr i32 %30, 2
br label %34
34: ; preds = %32, %50
%35 = phi i64 [ 2, %32 ], [ %52, %50 ]
%36 = phi i32 [ %33, %32 ], [ %51, %50 ]
%37 = and i32 %36, 1
%38 = icmp eq i32 %37, 0
br i1 %38, label %50, label %39
39: ; preds = %34
%40 = load ptr, ptr @xstate_comp_offsets, align 8, !tbaa !20
%41 = getelementptr inbounds i32, ptr %40, i64 %35
%42 = load i32, ptr %41, align 4, !tbaa !16
%43 = load ptr, ptr @xstate_sizes, align 8, !tbaa !20
%44 = getelementptr inbounds i32, ptr %43, i64 %35
%45 = load i32, ptr %44, align 4, !tbaa !16
%46 = sext i32 %42 to i64
%47 = getelementptr inbounds i8, ptr %2, i64 %46
%48 = getelementptr inbounds i8, ptr @init_fpstate, i64 %46
%49 = tail call i32 @memcpy(ptr noundef nonnull %47, ptr noundef nonnull %48, i32 noundef %45) #3
br label %50
50: ; preds = %39, %34
%51 = ashr i32 %36, 1
%52 = add nuw i64 %35, 1
%53 = icmp ult i32 %36, 2
br i1 %53, label %54, label %34, !llvm.loop !21
54: ; preds = %50, %27, %5, %1
ret void
}
declare i32 @use_xsaveopt(...) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 0}
!6 = !{!"fpu", !7, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0, !13, i64 8}
!8 = !{!"TYPE_6__", !9, i64 0}
!9 = !{!"TYPE_5__", !10, i64 0}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"fxregs_state", !10, i64 0, !14, i64 8, !14, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !15, i64 56}
!14 = !{!"any pointer", !11, i64 0}
!15 = !{!"long", !11, i64 0}
!16 = !{!10, !10, i64 0}
!17 = !{!13, !10, i64 0}
!18 = !{!13, !14, i64 16}
!19 = !{!13, !14, i64 8}
!20 = !{!14, !14, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kernel/fpu/extr_xstate.c_fpstate_sanitize_xstate.c'
source_filename = "AnghaBench/linux/arch/x86/kernel/fpu/extr_xstate.c_fpstate_sanitize_xstate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_8__ = type { i32 }
@xfeatures_mask = common local_unnamed_addr global i32 0, align 4
@XFEATURE_MASK_FP = common local_unnamed_addr global i32 0, align 4
@XFEATURE_MASK_SSE = common local_unnamed_addr global i32 0, align 4
@xstate_comp_offsets = common local_unnamed_addr global ptr null, align 8
@xstate_sizes = common local_unnamed_addr global ptr null, align 8
@init_fpstate = common global %struct.TYPE_8__ zeroinitializer, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @fpstate_sanitize_xstate(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = tail call i32 @use_xsaveopt() #3
%4 = icmp eq i32 %3, 0
br i1 %4, label %54, label %5
5: ; preds = %1
%6 = load i32, ptr %0, align 8, !tbaa !6
%7 = load i32, ptr @xfeatures_mask, align 4, !tbaa !17
%8 = and i32 %7, %6
%9 = icmp eq i32 %8, %7
br i1 %9, label %54, label %10
10: ; preds = %5
%11 = load i32, ptr @XFEATURE_MASK_FP, align 4, !tbaa !17
%12 = and i32 %11, %6
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %10
store i32 895, ptr %2, align 8, !tbaa !18
%15 = getelementptr inbounds i8, ptr %0, i64 32
%16 = getelementptr inbounds i8, ptr %0, i64 24
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %15, i8 0, i64 40, i1 false)
%17 = load ptr, ptr %16, align 8, !tbaa !19
%18 = tail call i32 @memset(ptr noundef %17, i32 noundef 0, i32 noundef 128) #3
br label %19
19: ; preds = %14, %10
%20 = load i32, ptr @XFEATURE_MASK_SSE, align 4, !tbaa !17
%21 = and i32 %20, %6
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %27
23: ; preds = %19
%24 = getelementptr inbounds i8, ptr %0, i64 16
%25 = load ptr, ptr %24, align 8, !tbaa !20
%26 = tail call i32 @memset(ptr noundef %25, i32 noundef 0, i32 noundef 256) #3
br label %27
27: ; preds = %23, %19
%28 = load i32, ptr @xfeatures_mask, align 4, !tbaa !17
%29 = xor i32 %6, -1
%30 = and i32 %28, %29
%31 = icmp ult i32 %30, 4
br i1 %31, label %54, label %32
32: ; preds = %27
%33 = ashr i32 %30, 2
br label %34
34: ; preds = %32, %50
%35 = phi i64 [ 2, %32 ], [ %52, %50 ]
%36 = phi i32 [ %33, %32 ], [ %51, %50 ]
%37 = and i32 %36, 1
%38 = icmp eq i32 %37, 0
br i1 %38, label %50, label %39
39: ; preds = %34
%40 = load ptr, ptr @xstate_comp_offsets, align 8, !tbaa !21
%41 = getelementptr inbounds i32, ptr %40, i64 %35
%42 = load i32, ptr %41, align 4, !tbaa !17
%43 = load ptr, ptr @xstate_sizes, align 8, !tbaa !21
%44 = getelementptr inbounds i32, ptr %43, i64 %35
%45 = load i32, ptr %44, align 4, !tbaa !17
%46 = sext i32 %42 to i64
%47 = getelementptr inbounds i8, ptr %2, i64 %46
%48 = getelementptr inbounds i8, ptr @init_fpstate, i64 %46
%49 = tail call i32 @memcpy(ptr noundef nonnull %47, ptr noundef nonnull %48, i32 noundef %45) #3
br label %50
50: ; preds = %39, %34
%51 = ashr i32 %36, 1
%52 = add nuw nsw i64 %35, 1
%53 = icmp ult i32 %36, 2
br i1 %53, label %54, label %34, !llvm.loop !22
54: ; preds = %50, %27, %5, %1
ret void
}
declare i32 @use_xsaveopt(...) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 0}
!7 = !{!"fpu", !8, i64 0}
!8 = !{!"TYPE_7__", !9, i64 0, !14, i64 8}
!9 = !{!"TYPE_6__", !10, i64 0}
!10 = !{!"TYPE_5__", !11, i64 0}
!11 = !{!"int", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C/C++ TBAA"}
!14 = !{!"fxregs_state", !11, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !16, i64 48, !16, i64 56}
!15 = !{!"any pointer", !12, i64 0}
!16 = !{!"long", !12, i64 0}
!17 = !{!11, !11, i64 0}
!18 = !{!14, !11, i64 0}
!19 = !{!14, !15, i64 16}
!20 = !{!14, !15, i64 8}
!21 = !{!15, !15, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
| linux_arch_x86_kernel_fpu_extr_xstate.c_fpstate_sanitize_xstate |
; ModuleID = 'AnghaBench/linux/drivers/staging/qlge/extr_qlge_main.c_ql_clear_routing_entries.c'
source_filename = "AnghaBench/linux/drivers/staging/qlge/extr_qlge_main.c_ql_clear_routing_entries.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SEM_RT_IDX_MASK = dso_local local_unnamed_addr global i32 0, align 4
@ifup = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [50 x i8] c"Failed to init routing register for CAM packets.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ql_clear_routing_entries], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ql_clear_routing_entries(ptr noundef %0) #0 {
%2 = load i32, ptr @SEM_RT_IDX_MASK, align 4, !tbaa !5
%3 = tail call i32 @ql_sem_spinlock(ptr noundef %0, i32 noundef %2) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %62
5: ; preds = %1
%6 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %53
8: ; preds = %5
%9 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 1, i32 noundef 0, i32 noundef 0) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %53
11: ; preds = %8
%12 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 2, i32 noundef 0, i32 noundef 0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %53
14: ; preds = %11
%15 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 3, i32 noundef 0, i32 noundef 0) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %53
17: ; preds = %14
%18 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 4, i32 noundef 0, i32 noundef 0) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %53
20: ; preds = %17
%21 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 5, i32 noundef 0, i32 noundef 0) #2
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %53
23: ; preds = %20
%24 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 6, i32 noundef 0, i32 noundef 0) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %53
26: ; preds = %23
%27 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 7, i32 noundef 0, i32 noundef 0) #2
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %53
29: ; preds = %26
%30 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 8, i32 noundef 0, i32 noundef 0) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %53
32: ; preds = %29
%33 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 9, i32 noundef 0, i32 noundef 0) #2
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %53
35: ; preds = %32
%36 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 10, i32 noundef 0, i32 noundef 0) #2
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %53
38: ; preds = %35
%39 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 11, i32 noundef 0, i32 noundef 0) #2
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %53
41: ; preds = %38
%42 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 12, i32 noundef 0, i32 noundef 0) #2
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %53
44: ; preds = %41
%45 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 13, i32 noundef 0, i32 noundef 0) #2
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %44
%48 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 14, i32 noundef 0, i32 noundef 0) #2
%49 = icmp eq i32 %48, 0
br i1 %49, label %50, label %53
50: ; preds = %47
%51 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 15, i32 noundef 0, i32 noundef 0) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %58, label %53
53: ; preds = %50, %47, %44, %41, %38, %35, %32, %29, %26, %23, %20, %17, %14, %11, %8, %5
%54 = phi i32 [ %6, %5 ], [ %9, %8 ], [ %12, %11 ], [ %15, %14 ], [ %18, %17 ], [ %21, %20 ], [ %24, %23 ], [ %27, %26 ], [ %30, %29 ], [ %33, %32 ], [ %36, %35 ], [ %39, %38 ], [ %42, %41 ], [ %45, %44 ], [ %48, %47 ], [ %51, %50 ]
%55 = load i32, ptr @ifup, align 4, !tbaa !5
%56 = load i32, ptr %0, align 4, !tbaa !9
%57 = tail call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %55, i32 noundef %56, ptr noundef nonnull @.str) #2
br label %58
58: ; preds = %50, %53
%59 = phi i32 [ %54, %53 ], [ 0, %50 ]
%60 = load i32, ptr @SEM_RT_IDX_MASK, align 4, !tbaa !5
%61 = tail call i32 @ql_sem_unlock(ptr noundef %0, i32 noundef %60) #2
br label %62
62: ; preds = %1, %58
%63 = phi i32 [ %59, %58 ], [ %3, %1 ]
ret i32 %63
}
declare i32 @ql_sem_spinlock(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ql_set_routing_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @netif_err(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ql_sem_unlock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ql_adapter", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/qlge/extr_qlge_main.c_ql_clear_routing_entries.c'
source_filename = "AnghaBench/linux/drivers/staging/qlge/extr_qlge_main.c_ql_clear_routing_entries.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SEM_RT_IDX_MASK = common local_unnamed_addr global i32 0, align 4
@ifup = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [50 x i8] c"Failed to init routing register for CAM packets.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ql_clear_routing_entries], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ql_clear_routing_entries(ptr noundef %0) #0 {
%2 = load i32, ptr @SEM_RT_IDX_MASK, align 4, !tbaa !6
%3 = tail call i32 @ql_sem_spinlock(ptr noundef %0, i32 noundef %2) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %62
5: ; preds = %1
%6 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %53
8: ; preds = %5
%9 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 1, i32 noundef 0, i32 noundef 0) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %53
11: ; preds = %8
%12 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 2, i32 noundef 0, i32 noundef 0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %53
14: ; preds = %11
%15 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 3, i32 noundef 0, i32 noundef 0) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %53
17: ; preds = %14
%18 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 4, i32 noundef 0, i32 noundef 0) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %53
20: ; preds = %17
%21 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 5, i32 noundef 0, i32 noundef 0) #2
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %53
23: ; preds = %20
%24 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 6, i32 noundef 0, i32 noundef 0) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %53
26: ; preds = %23
%27 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 7, i32 noundef 0, i32 noundef 0) #2
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %53
29: ; preds = %26
%30 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 8, i32 noundef 0, i32 noundef 0) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %53
32: ; preds = %29
%33 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 9, i32 noundef 0, i32 noundef 0) #2
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %53
35: ; preds = %32
%36 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 10, i32 noundef 0, i32 noundef 0) #2
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %53
38: ; preds = %35
%39 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 11, i32 noundef 0, i32 noundef 0) #2
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %53
41: ; preds = %38
%42 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 12, i32 noundef 0, i32 noundef 0) #2
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %53
44: ; preds = %41
%45 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 13, i32 noundef 0, i32 noundef 0) #2
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %44
%48 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 14, i32 noundef 0, i32 noundef 0) #2
%49 = icmp eq i32 %48, 0
br i1 %49, label %50, label %53
50: ; preds = %47
%51 = tail call i32 @ql_set_routing_reg(ptr noundef %0, i32 noundef 15, i32 noundef 0, i32 noundef 0) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %58, label %53
53: ; preds = %50, %47, %44, %41, %38, %35, %32, %29, %26, %23, %20, %17, %14, %11, %8, %5
%54 = phi i32 [ %6, %5 ], [ %9, %8 ], [ %12, %11 ], [ %15, %14 ], [ %18, %17 ], [ %21, %20 ], [ %24, %23 ], [ %27, %26 ], [ %30, %29 ], [ %33, %32 ], [ %36, %35 ], [ %39, %38 ], [ %42, %41 ], [ %45, %44 ], [ %48, %47 ], [ %51, %50 ]
%55 = load i32, ptr @ifup, align 4, !tbaa !6
%56 = load i32, ptr %0, align 4, !tbaa !10
%57 = tail call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %55, i32 noundef %56, ptr noundef nonnull @.str) #2
br label %58
58: ; preds = %50, %53
%59 = phi i32 [ %54, %53 ], [ 0, %50 ]
%60 = load i32, ptr @SEM_RT_IDX_MASK, align 4, !tbaa !6
%61 = tail call i32 @ql_sem_unlock(ptr noundef %0, i32 noundef %60) #2
br label %62
62: ; preds = %1, %58
%63 = phi i32 [ %59, %58 ], [ %3, %1 ]
ret i32 %63
}
declare i32 @ql_sem_spinlock(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ql_set_routing_reg(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @netif_err(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ql_sem_unlock(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ql_adapter", !7, i64 0}
| linux_drivers_staging_qlge_extr_qlge_main.c_ql_clear_routing_entries |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_subr/extr_error.c_svn_error_dup.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_subr/extr_error.c_svn_error_dup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { ptr, ptr, ptr, ptr }
@SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8
@apr_pool_cleanup_null = dso_local local_unnamed_addr global i32 0, align 4
@err_abort = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_error_dup(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !5
br label %35
5: ; preds = %1
%6 = tail call ptr @svn_pool_create(ptr noundef null) #4
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 (...) @abort() #5
unreachable
10: ; preds = %5, %31
%11 = phi ptr [ %15, %31 ], [ null, %5 ]
%12 = phi ptr [ %19, %31 ], [ null, %5 ]
%13 = phi ptr [ %33, %31 ], [ %0, %5 ]
%14 = icmp eq ptr %12, null
%15 = tail call ptr @apr_palloc(ptr noundef nonnull %6, i32 noundef 32) #4
br i1 %14, label %18, label %16
16: ; preds = %10
%17 = getelementptr inbounds %struct.TYPE_6__, ptr %11, i64 0, i32 3
store ptr %15, ptr %17, align 8, !tbaa !9
br label %18
18: ; preds = %10, %16
%19 = phi ptr [ %12, %16 ], [ %15, %10 ]
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %15, ptr noundef nonnull align 8 dereferenceable(32) %13, i64 32, i1 false), !tbaa.struct !11
%20 = getelementptr inbounds %struct.TYPE_6__, ptr %15, i64 0, i32 2
store ptr %6, ptr %20, align 8, !tbaa !12
%21 = getelementptr inbounds %struct.TYPE_6__, ptr %15, i64 0, i32 1
%22 = load ptr, ptr %21, align 8, !tbaa !13
%23 = icmp eq ptr %22, null
br i1 %23, label %26, label %24
24: ; preds = %18
%25 = tail call ptr @apr_pstrdup(ptr noundef nonnull %6, ptr noundef nonnull %22) #4
store ptr %25, ptr %21, align 8, !tbaa !13
br label %26
26: ; preds = %24, %18
%27 = load ptr, ptr %15, align 8, !tbaa !14
%28 = icmp eq ptr %27, null
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = tail call ptr @apr_pstrdup(ptr noundef nonnull %6, ptr noundef nonnull %27) #4
store ptr %30, ptr %15, align 8, !tbaa !14
br label %31
31: ; preds = %26, %29
%32 = getelementptr inbounds %struct.TYPE_6__, ptr %13, i64 0, i32 3
%33 = load ptr, ptr %32, align 8, !tbaa !9
%34 = icmp eq ptr %33, null
br i1 %34, label %35, label %10, !llvm.loop !15
35: ; preds = %31, %3
%36 = phi ptr [ %4, %3 ], [ %19, %31 ]
ret ptr %36
}
declare ptr @svn_pool_create(ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @abort(...) local_unnamed_addr #2
declare ptr @apr_palloc(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
declare ptr @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"TYPE_6__", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!11 = !{i64 0, i64 8, !5, i64 8, i64 8, !5, i64 16, i64 8, !5, i64 24, i64 8, !5}
!12 = !{!10, !6, i64 16}
!13 = !{!10, !6, i64 8}
!14 = !{!10, !6, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_subr/extr_error.c_svn_error_dup.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_subr/extr_error.c_svn_error_dup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8
@apr_pool_cleanup_null = common local_unnamed_addr global i32 0, align 4
@err_abort = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_error_dup(ptr noundef readonly %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !6
br label %35
5: ; preds = %1
%6 = tail call ptr @svn_pool_create(ptr noundef null) #4
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @abort() #5
unreachable
10: ; preds = %5, %31
%11 = phi ptr [ %15, %31 ], [ null, %5 ]
%12 = phi ptr [ %19, %31 ], [ null, %5 ]
%13 = phi ptr [ %33, %31 ], [ %0, %5 ]
%14 = icmp eq ptr %12, null
%15 = tail call ptr @apr_palloc(ptr noundef nonnull %6, i32 noundef 32) #4
br i1 %14, label %18, label %16
16: ; preds = %10
%17 = getelementptr inbounds i8, ptr %11, i64 24
store ptr %15, ptr %17, align 8, !tbaa !10
br label %18
18: ; preds = %10, %16
%19 = phi ptr [ %12, %16 ], [ %15, %10 ]
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %15, ptr noundef nonnull align 8 dereferenceable(32) %13, i64 32, i1 false), !tbaa.struct !12
%20 = getelementptr inbounds i8, ptr %15, i64 16
store ptr %6, ptr %20, align 8, !tbaa !13
%21 = getelementptr inbounds i8, ptr %15, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !14
%23 = icmp eq ptr %22, null
br i1 %23, label %26, label %24
24: ; preds = %18
%25 = tail call ptr @apr_pstrdup(ptr noundef nonnull %6, ptr noundef nonnull %22) #4
store ptr %25, ptr %21, align 8, !tbaa !14
br label %26
26: ; preds = %24, %18
%27 = load ptr, ptr %15, align 8, !tbaa !15
%28 = icmp eq ptr %27, null
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = tail call ptr @apr_pstrdup(ptr noundef nonnull %6, ptr noundef nonnull %27) #4
store ptr %30, ptr %15, align 8, !tbaa !15
br label %31
31: ; preds = %26, %29
%32 = getelementptr inbounds i8, ptr %13, i64 24
%33 = load ptr, ptr %32, align 8, !tbaa !10
%34 = icmp eq ptr %33, null
br i1 %34, label %35, label %10, !llvm.loop !16
35: ; preds = %31, %3
%36 = phi ptr [ %4, %3 ], [ %19, %31 ]
ret ptr %36
}
declare ptr @svn_pool_create(ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @abort(...) local_unnamed_addr #2
declare ptr @apr_palloc(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3
declare ptr @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"TYPE_6__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24}
!12 = !{i64 0, i64 8, !6, i64 8, i64 8, !6, i64 16, i64 8, !6, i64 24, i64 8, !6}
!13 = !{!11, !7, i64 16}
!14 = !{!11, !7, i64 8}
!15 = !{!11, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_subversion_subversion_libsvn_subr_extr_error.c_svn_error_dup |
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_aggregator.c_aggregator_parameter_set.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_aggregator.c_aggregator_parameter_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [28 x i8] c"graph %p, port %p, param %p\00", align 1
@MMAL_ENOSYS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aggregator_parameter_set], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aggregator_parameter_set(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @MMAL_PARAM_UNUSED(ptr noundef %0) #2
%5 = tail call i32 @MMAL_PARAM_UNUSED(ptr noundef %1) #2
%6 = tail call i32 @MMAL_PARAM_UNUSED(ptr noundef %2) #2
%7 = tail call i32 @LOG_TRACE(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%8 = load i32, ptr @MMAL_ENOSYS, align 4, !tbaa !5
ret i32 %8
}
declare i32 @MMAL_PARAM_UNUSED(ptr noundef) local_unnamed_addr #1
declare i32 @LOG_TRACE(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_aggregator.c_aggregator_parameter_set.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/components/extr_aggregator.c_aggregator_parameter_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [28 x i8] c"graph %p, port %p, param %p\00", align 1
@MMAL_ENOSYS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aggregator_parameter_set], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @aggregator_parameter_set(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @MMAL_PARAM_UNUSED(ptr noundef %0) #2
%5 = tail call i32 @MMAL_PARAM_UNUSED(ptr noundef %1) #2
%6 = tail call i32 @MMAL_PARAM_UNUSED(ptr noundef %2) #2
%7 = tail call i32 @LOG_TRACE(ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%8 = load i32, ptr @MMAL_ENOSYS, align 4, !tbaa !6
ret i32 %8
}
declare i32 @MMAL_PARAM_UNUSED(ptr noundef) local_unnamed_addr #1
declare i32 @LOG_TRACE(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| RetroArch_gfx_include_userland_interface_mmal_components_extr_aggregator.c_aggregator_parameter_set |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.