docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* Check if DMA buffer transfer has been terminated. */
|
uint32_t crccu_get_dma_interrupt_status(Crccu *p_crccu)
|
/* Check if DMA buffer transfer has been terminated. */
uint32_t crccu_get_dma_interrupt_status(Crccu *p_crccu)
|
{
return p_crccu->CRCCU_DMA_ISR & CRCCU_DMA_ISR_DMAISR;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Creates a new variable serialization instance using the given binary representation of the variables to fill the new instance */
|
RETURN_STATUS EFIAPI SerializeVariablesNewInstanceFromBuffer(OUT EFI_HANDLE *Handle, IN VOID *Buffer, IN UINTN Size)
|
/* Creates a new variable serialization instance using the given binary representation of the variables to fill the new instance */
RETURN_STATUS EFIAPI SerializeVariablesNewInstanceFromBuffer(OUT EFI_HANDLE *Handle, IN VOID *Buffer, IN UINTN Size)
|
{
RETURN_STATUS Status;
Status = SerializeVariablesNewInstance (Handle);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = IterateVariablesInBuffer (
IterateVariablesCallbackNop,
NULL,
Buffer,
Size
);
if (RETURN_ERROR (Status)) {
SerializeVariablesFreeInstance (*Handle);
return Status;
}
Status = IterateVariablesInBuffer (
IterateVariablesCallbackSetInInstance,
(VOID *)*Handle,
Buffer,
Size
);
if (RETURN_ERROR (Status)) {
SerializeVariablesFreeInstance (*Handle);
return Status;
}
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* If this function returns, it means that the system does not support warm reset. */
|
VOID EFIAPI ResetWarm(VOID)
|
/* If this function returns, it means that the system does not support warm reset. */
VOID EFIAPI ResetWarm(VOID)
|
{
mInternalRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Do OR operation with the value of the specified SD/MMC host controller mmio register. */
|
EFI_STATUS EFIAPI SdMmcHcOrMmio(IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 BarIndex, IN UINT32 Offset, IN UINT8 Count, IN VOID *OrData)
|
/* Do OR operation with the value of the specified SD/MMC host controller mmio register. */
EFI_STATUS EFIAPI SdMmcHcOrMmio(IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 BarIndex, IN UINT32 Offset, IN UINT8 Count, IN VOID *OrData)
|
{
EFI_STATUS Status;
UINT64 Data;
UINT64 Or;
Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
return Status;
}
if (Count == 1) {
Or = *(UINT8 *)OrData;
} else if (Count == 2) {
Or = *(UINT16 *)OrData;
} else if (Count == 4) {
Or = *(UINT32 *)OrData;
} else if (Count == 8) {
Or = *(UINT64 *)OrData;
} else {
return EFI_INVALID_PARAMETER;
}
Data |= Or;
Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, FALSE, Count, &Data);
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Allocates and Initializes one Elliptic Curve Context for subsequent use with the NID. */
|
VOID* EFIAPI CryptoServiceEcNewByNid(IN UINTN Nid)
|
/* Allocates and Initializes one Elliptic Curve Context for subsequent use with the NID. */
VOID* EFIAPI CryptoServiceEcNewByNid(IN UINTN Nid)
|
{
return CALL_BASECRYPTLIB (Ec.Services.NewByNid, EcNewByNid, (Nid), NULL);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Parameters : pin_number : The GPIO Pin number to program the direction for from 0 to 31 pin_value : The Direction of the GPIO Pin under reference. 0 = Input direction 1 = Output direction */
|
int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, int pin_value)
|
/* Parameters : pin_number : The GPIO Pin number to program the direction for from 0 to 31 pin_value : The Direction of the GPIO Pin under reference. 0 = Input direction 1 = Output direction */
int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, int pin_value)
|
{
int status = 0;
u32 value = 0;
if (pin_number >= 32)
return -EINVAL;
if (pin_value == 0)
value = dev->gpio_dir & (~(1 << pin_number));
else
value = dev->gpio_dir | (1 << pin_number);
status = cx231xx_set_gpio_bit(dev, value, (u8 *) &dev->gpio_val);
dev->gpio_dir = value;
return status;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Routine used to register record end routine. The routine should only be registered when the dissector is used in the record, not in the proto_register_XXX function. */
|
void register_file_record_end_routine(packet_info *pinfo, void(*func)(void))
|
/* Routine used to register record end routine. The routine should only be registered when the dissector is used in the record, not in the proto_register_XXX function. */
void register_file_record_end_routine(packet_info *pinfo, void(*func)(void))
|
{
pinfo->frame_end_routines = g_slist_append(pinfo->frame_end_routines, (gpointer)func);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* nfs_clear_page_tag_locked - Clear request tag and wake up sleepers */
|
void nfs_clear_page_tag_locked(struct nfs_page *req)
|
/* nfs_clear_page_tag_locked - Clear request tag and wake up sleepers */
void nfs_clear_page_tag_locked(struct nfs_page *req)
|
{
struct inode *inode = req->wb_context->path.dentry->d_inode;
struct nfs_inode *nfsi = NFS_I(inode);
if (req->wb_page != NULL) {
spin_lock(&inode->i_lock);
radix_tree_tag_clear(&nfsi->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED);
nfs_unlock_request(req);
spin_unlock(&inode->i_lock);
} else
nfs_unlock_request(req);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Deinitializes the Alternate Functions (remap, event control and EXTI configuration) registers to their default reset values. */
|
void GPIO_AFIODeInit(void)
|
/* Deinitializes the Alternate Functions (remap, event control and EXTI configuration) registers to their default reset values. */
void GPIO_AFIODeInit(void)
|
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
}
|
gcallipo/RadioDSP-Stm32f103
|
C++
|
Common Creative - Attribution 3.0
| 51
|
/* The function calculates the monotonic clock from the realtime clock and the wall_to_monotonic offset and stores the result in normalized timespec format in the variable pointed to by @ts. */
|
void ktime_get_ts(struct timespec *ts)
|
/* The function calculates the monotonic clock from the realtime clock and the wall_to_monotonic offset and stores the result in normalized timespec format in the variable pointed to by @ts. */
void ktime_get_ts(struct timespec *ts)
|
{
struct timespec tomono;
unsigned long seq;
do {
seq = read_seqbegin(&xtime_lock);
getnstimeofday(ts);
tomono = wall_to_monotonic;
} while (read_seqretry(&xtime_lock, seq));
set_normalized_timespec(ts, ts->tv_sec + tomono.tv_sec,
ts->tv_nsec + tomono.tv_nsec);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* The hardware priority mechanism will only look at the upper N bits of the priority level (where N is 3 for the Stellaris family), so any prioritization must be performed in those bits. The remaining bits can be used to sub-prioritize the interrupt sources, and may be used by the hardware priority mechanism on a future part. This arrangement allows priorities to migrate to different NVIC implementations without changing the gross prioritization of the interrupts. */
|
void IntPrioritySet(unsigned long ulInterrupt, unsigned char ucPriority)
|
/* The hardware priority mechanism will only look at the upper N bits of the priority level (where N is 3 for the Stellaris family), so any prioritization must be performed in those bits. The remaining bits can be used to sub-prioritize the interrupt sources, and may be used by the hardware priority mechanism on a future part. This arrangement allows priorities to migrate to different NVIC implementations without changing the gross prioritization of the interrupts. */
void IntPrioritySet(unsigned long ulInterrupt, unsigned char ucPriority)
|
{
unsigned long ulTemp;
ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
ulTemp = HWREG(g_pulRegs[ulInterrupt >> 2]);
ulTemp &= ~(0xFF << (8 * (ulInterrupt & 3)));
ulTemp |= ucPriority << (8 * (ulInterrupt & 3));
HWREG(g_pulRegs[ulInterrupt >> 2]) = ulTemp;
}
|
watterott/WebRadio
|
C++
| null | 71
|
/* Closes a pipe of the Low Level Driver. */
|
USBH_StatusTypeDef USBH_LL_ClosePipe(USBH_HandleTypeDef *phost, uint8_t pipe)
|
/* Closes a pipe of the Low Level Driver. */
USBH_StatusTypeDef USBH_LL_ClosePipe(USBH_HandleTypeDef *phost, uint8_t pipe)
|
{
HAL_HCD_HC_Halt(phost->pData, pipe);
return USBH_OK;
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* This function is the same as 'ubifs_change_one_lp()' but @dirty is added to current dirty space, not substitutes it. */
|
int ubifs_update_one_lp(struct ubifs_info *c, int lnum, int free, int dirty, int flags_set, int flags_clean)
|
/* This function is the same as 'ubifs_change_one_lp()' but @dirty is added to current dirty space, not substitutes it. */
int ubifs_update_one_lp(struct ubifs_info *c, int lnum, int free, int dirty, int flags_set, int flags_clean)
|
{
int err = 0, flags;
const struct ubifs_lprops *lp;
ubifs_get_lprops(c);
lp = ubifs_lpt_lookup_dirty(c, lnum);
if (IS_ERR(lp)) {
err = PTR_ERR(lp);
goto out;
}
flags = (lp->flags | flags_set) & ~flags_clean;
lp = ubifs_change_lp(c, lp, free, lp->dirty + dirty, flags, 0);
if (IS_ERR(lp))
err = PTR_ERR(lp);
out:
ubifs_release_lprops(c);
return err;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Converts a text device path node to USB Print device path structure. */
|
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextUsbPrinter(CHAR16 *TextDeviceNode)
|
/* Converts a text device path node to USB Print device path structure. */
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextUsbPrinter(CHAR16 *TextDeviceNode)
|
{
USB_CLASS_TEXT UsbClassText;
UsbClassText.ClassExist = FALSE;
UsbClassText.Class = USB_CLASS_PRINTER;
UsbClassText.SubClassExist = TRUE;
return ConvertFromTextUsbClass (TextDeviceNode, &UsbClassText);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Flush all the hash buckets of the specified table. */
|
static void ip_vs_dh_flush(struct ip_vs_dh_bucket *tbl)
|
/* Flush all the hash buckets of the specified table. */
static void ip_vs_dh_flush(struct ip_vs_dh_bucket *tbl)
|
{
int i;
struct ip_vs_dh_bucket *b;
b = tbl;
for (i=0; i<IP_VS_DH_TAB_SIZE; i++) {
if (b->dest) {
atomic_dec(&b->dest->refcnt);
b->dest = NULL;
}
b++;
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Gets the states of the DTR and RTS modem control signals. */
|
uint32_t UARTModemControlGet(uint32_t ui32Base)
|
/* Gets the states of the DTR and RTS modem control signals. */
uint32_t UARTModemControlGet(uint32_t ui32Base)
|
{
ASSERT(ui32Base == UART1_BASE);
return(HWREG(ui32Base + UART_O_CTL) & (UART_OUTPUT_RTS | UART_OUTPUT_DTR));
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* Initialse an MPU-401 subdevice for MIDI support on the SoundScape. */
|
static int __devinit create_mpu401(struct snd_card *card, int devnum, unsigned long port, int irq)
|
/* Initialse an MPU-401 subdevice for MIDI support on the SoundScape. */
static int __devinit create_mpu401(struct snd_card *card, int devnum, unsigned long port, int irq)
|
{
struct soundscape *sscape = get_card_soundscape(card);
struct snd_rawmidi *rawmidi;
int err;
err = snd_mpu401_uart_new(card, devnum, MPU401_HW_MPU401, port,
MPU401_INFO_INTEGRATED, irq, IRQF_DISABLED,
&rawmidi);
if (err == 0) {
struct snd_mpu401 *mpu = rawmidi->private_data;
mpu->open_input = mpu401_open;
mpu->open_output = mpu401_open;
mpu->private_data = sscape;
initialise_mpu401(mpu);
}
return err;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Sets the smack pointer in the inode security blob */
|
static void smack_task_to_inode(struct task_struct *p, struct inode *inode)
|
/* Sets the smack pointer in the inode security blob */
static void smack_task_to_inode(struct task_struct *p, struct inode *inode)
|
{
struct inode_smack *isp = inode->i_security;
isp->smk_inode = task_security(p);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Must be called from probe to finish initialization of the device. Contains the common initialization code for both devices that declare gpio pins and devices that do not. It is either called directly from probe or from request_firmware_wait callback. */
|
static int goodix_configure_dev(struct goodix_ts_data *ts)
|
/* Must be called from probe to finish initialization of the device. Contains the common initialization code for both devices that declare gpio pins and devices that do not. It is either called directly from probe or from request_firmware_wait callback. */
static int goodix_configure_dev(struct goodix_ts_data *ts)
|
{
int error;
ts->swapped_x_y = false;
ts->inverted_x = false;
ts->inverted_y = false;
goodix_read_config(ts);
error = goodix_request_input_dev(ts);
if (error)
return error;
ts->irq_flags = goodix_irq_flags[ts->int_trigger_type] | IRQF_ONESHOT;
error = goodix_request_irq(ts);
if (error) {
dev_err(&ts->client->dev, "request IRQ failed: %d\n", error);
return error;
}
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Sets the timer match value for a 64-bit timer. */
|
void TimerMatchSet64(unsigned long ulBase, unsigned long long ullValue)
|
/* Sets the timer match value for a 64-bit timer. */
void TimerMatchSet64(unsigned long ulBase, unsigned long long ullValue)
|
{
ASSERT(TimerBaseValid(ulBase));
HWREG(ulBase + TIMER_O_TBMATCHR) = ullValue >> 32;
HWREG(ulBase + TIMER_O_TAMATCHR) = ullValue & 0xffffffff;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* USB Device Configure Function Parameters: cfg: Device Configure/Deconfigure Return Value: None */
|
void USBD_Configure(BOOL cfg)
|
/* USB Device Configure Function Parameters: cfg: Device Configure/Deconfigure Return Value: None */
void USBD_Configure(BOOL cfg)
|
{
if (cfg == __FALSE) {
FreeBufAddr = EP_BUF_ADDR;
FreeBufAddr += 2 * USBD_MAX_PACKET0;
}
}
|
ARMmbed/DAPLink
|
C++
|
Apache License 2.0
| 2,140
|
/* adi_move_bits() detects a possible 2-stream mode, and moves the bits accordingly. */
|
static void adi_move_bits(struct adi_port *port, int length)
|
/* adi_move_bits() detects a possible 2-stream mode, and moves the bits accordingly. */
static void adi_move_bits(struct adi_port *port, int length)
|
{
int i;
struct adi *adi = port->adi;
adi[0].idx = adi[1].idx = 0;
if (adi[0].ret <= 0 || adi[1].ret <= 0) return;
if (adi[0].data[0] & 0x20 || ~adi[1].data[0] & 0x20) return;
for (i = 1; i <= adi[1].ret; i++)
adi[0].data[((length - 1) >> 1) + i + 1] = adi[1].data[i];
adi[0].ret += adi[1].ret;
adi[1].ret = -1;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Any changes to the returned string will impact the original JSON value. */
|
CONST CHAR8* EFIAPI JsonValueGetString(IN EDKII_JSON_VALUE Json)
|
/* Any changes to the returned string will impact the original JSON value. */
CONST CHAR8* EFIAPI JsonValueGetString(IN EDKII_JSON_VALUE Json)
|
{
return json_string_value ((const json_t *)Json);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* convert raw pulse length expressed in timer ticks to protocol bit times */
|
static uint8_t rc5_get_pulse_length(uint16_t pulse_length)
|
/* convert raw pulse length expressed in timer ticks to protocol bit times */
static uint8_t rc5_get_pulse_length(uint16_t pulse_length)
|
{
if((pulse_length > rc5_mint) && (pulse_length < rc5_maxt)){
return (RC5_1T_TIME);
}else if((pulse_length > rc5_min2t) && (pulse_length < rc5_max2t)){
return (RC5_2T_TIME);
}
return RC5_WRONG_TIME;
}
|
liuxuming/trochili
|
C++
|
Apache License 2.0
| 132
|
/* Disable the SMC Bank2 or Bank3 NAND ECC feature. */
|
void SMC_DisableNANDECC(SMC_BANK_NAND_T bank)
|
/* Disable the SMC Bank2 or Bank3 NAND ECC feature. */
void SMC_DisableNANDECC(SMC_BANK_NAND_T bank)
|
{
if (bank == SMC_BANK2_NAND)
{
SMC_Bank2->CTRL2 &= 0x000FFFBF;
}
else
{
SMC_Bank3->CTRL3 &= 0x000FFFBF;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* We can tell the Host what interrupts we want blocked ready for using the lguest_data.interrupts bitmap, so disabling (aka "masking") them is as simple as setting a bit. We don't actually "ack" interrupts as such, we just mask and unmask them. I wonder if we should be cleverer? */
|
static void disable_lguest_irq(unsigned int irq)
|
/* We can tell the Host what interrupts we want blocked ready for using the lguest_data.interrupts bitmap, so disabling (aka "masking") them is as simple as setting a bit. We don't actually "ack" interrupts as such, we just mask and unmask them. I wonder if we should be cleverer? */
static void disable_lguest_irq(unsigned int irq)
|
{
set_bit(irq, lguest_data.blocked_interrupts);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Adds a dentry to the hash according to its name. */
|
void d_rehash(struct dentry *entry)
|
/* Adds a dentry to the hash according to its name. */
void d_rehash(struct dentry *entry)
|
{
spin_lock(&dcache_lock);
spin_lock(&entry->d_lock);
_d_rehash(entry);
spin_unlock(&entry->d_lock);
spin_unlock(&dcache_lock);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* If the volume is damaged because of an interrupted update this function just returns immediately with %-EBADF code. */
|
int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum)
|
/* If the volume is damaged because of an interrupted update this function just returns immediately with %-EBADF code. */
int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum)
|
{
struct ubi_volume *vol = desc->vol;
struct ubi_device *ubi = vol->ubi;
int err;
dbg_msg("erase LEB %d:%d", vol->vol_id, lnum);
if (desc->mode == UBI_READONLY || vol->vol_type == UBI_STATIC_VOLUME)
return -EROFS;
if (lnum < 0 || lnum >= vol->reserved_pebs)
return -EINVAL;
if (vol->upd_marker)
return -EBADF;
err = ubi_eba_unmap_leb(ubi, vol, lnum);
if (err)
return err;
return ubi_wl_flush(ubi);
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Get the samples per frame for this stream. */
|
int av_cold ff_wma_get_frame_len_bits(int sample_rate, int version, unsigned int decode_flags)
|
/* Get the samples per frame for this stream. */
int av_cold ff_wma_get_frame_len_bits(int sample_rate, int version, unsigned int decode_flags)
|
{
int frame_len_bits;
if (sample_rate <= 16000) {
frame_len_bits = 9;
} else if (sample_rate <= 22050 ||
(sample_rate <= 32000 && version == 1)) {
frame_len_bits = 10;
} else if (sample_rate <= 48000) {
frame_len_bits = 11;
} else if (sample_rate <= 96000) {
frame_len_bits = 12;
} else {
frame_len_bits = 13;
}
if (version == 3) {
int tmp = decode_flags & 0x6;
if (tmp == 0x2) {
++frame_len_bits;
} else if (tmp == 0x4) {
--frame_len_bits;
} else if (tmp == 0x6) {
frame_len_bits -= 2;
}
}
return frame_len_bits;
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* Returns sglq ponter = success, NULL = Failure. */
|
static struct lpfc_sglq* __lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
|
/* Returns sglq ponter = success, NULL = Failure. */
static struct lpfc_sglq* __lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
|
{
uint16_t adj_xri;
struct lpfc_sglq *sglq;
adj_xri = xritag - phba->sli4_hba.max_cfg_param.xri_base;
if (adj_xri > phba->sli4_hba.max_cfg_param.max_xri)
return NULL;
sglq = phba->sli4_hba.lpfc_sglq_active_list[adj_xri];
return sglq;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
|
u8_t zfQueryOppositeRate(zdev_t *dev, u8_t dst_mac[6], u8_t frameType)
|
/* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
u8_t zfQueryOppositeRate(zdev_t *dev, u8_t dst_mac[6], u8_t frameType)
|
{
zmw_get_wlan_dev(dev);
if ( wd->wlanMode == ZM_MODE_AP )
{
return 0;
}
if ( (frameType & 0x0c) == ZM_WLAN_DATA_FRAME )
{
if ( ZM_IS_MULTICAST(dst_mac) )
{
return wd->sta.mTxRate;
}
else
{
return wd->sta.uTxRate;
}
}
return wd->sta.mmTxRate;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Timer 3 Interrupt handler. This function is startup code handler entry. */
|
void TIMER3IntHandler(void)
|
/* Timer 3 Interrupt handler. This function is startup code handler entry. */
void TIMER3IntHandler(void)
|
{
if( g_pfnTimerHandlerCallbacks[3] != 0 )
{
g_pfnTimerHandlerCallbacks[3](0, 0, 0, 0);
}
else
{
while(1);
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* brief DMA instance 1, channel 10 IRQ handler. */
|
void EDMA_1_CH10_DriverIRQHandler(void)
|
/* brief DMA instance 1, channel 10 IRQ handler. */
void EDMA_1_CH10_DriverIRQHandler(void)
|
{
EDMA_DriverIRQHandler(1U, 10U);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Allocate DMA-coherent memory space and return both the kernel remapped virtual and bus address for that space. */
|
void* dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
|
/* Allocate DMA-coherent memory space and return both the kernel remapped virtual and bus address for that space. */
void* dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
|
{
void *memory;
if (dma_alloc_from_coherent(dev, size, handle, &memory))
return memory;
return __dma_alloc(dev, size, handle, gfp,
pgprot_dmacoherent(pgprot_kernel));
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Set up a USART in SPI master mode device.
The returned device descriptor structure must be passed to the driver whenever that device should be used as current slave device. */
|
void usart_spi_setup_device(volatile avr32_usart_t *p_usart, struct usart_spi_device *device, spi_flags_t flags, unsigned long baud_rate, board_spi_select_id_t sel_id)
|
/* Set up a USART in SPI master mode device.
The returned device descriptor structure must be passed to the driver whenever that device should be used as current slave device. */
void usart_spi_setup_device(volatile avr32_usart_t *p_usart, struct usart_spi_device *device, spi_flags_t flags, unsigned long baud_rate, board_spi_select_id_t sel_id)
|
{
usart_spi_options_t opt;
UNUSED(device);
UNUSED(sel_id);
opt.baudrate = baud_rate;
opt.charlength = 8;
opt.spimode = flags;
opt.channelmode = USART_NORMAL_CHMODE;
usart_init_spi_master(p_usart, &opt, sysclk_get_cpu_hz());
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Return: 0 on success or a negative error code on failure */
|
int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi)
|
/* Return: 0 on success or a negative error code on failure */
int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi)
|
{
ssize_t err;
err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_ON, NULL, 0);
if (err < 0)
return err;
return 0;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Send a master data transmit request when the master have obtained control of the bus.(Write Step2)
For this function returns immediately, it is always using in the interrupt hander. */
|
void I2CMasterWriteRequestS2(unsigned long ulBase, unsigned char ucData, xtBoolean bEndTransmition)
|
/* Send a master data transmit request when the master have obtained control of the bus.(Write Step2)
For this function returns immediately, it is always using in the interrupt hander. */
void I2CMasterWriteRequestS2(unsigned long ulBase, unsigned char ucData, xtBoolean bEndTransmition)
|
{
unsigned long ulStatus;
xASSERT((ulBase == I2C1_BASE) || (ulBase == I2C2_BASE));
xHWREG(ulBase + I2C_DR) = ucData;
if(bEndTransmition)
{
do
{
ulStatus = I2CStatusGet(ulBase);
if(xHWREG(ulBase + I2C_SR1) & 0x0F00)
break;
}
while(!(ulStatus == I2C_EVENT_MASTER_BYTE_TRANSMITTED));
I2CStopSend(ulBase);
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* irq_udc_reset - Handle IRQ "UDC Reset" @udc: udc device */
|
static void irq_udc_reset(struct pxa_udc *udc)
|
/* irq_udc_reset - Handle IRQ "UDC Reset" @udc: udc device */
static void irq_udc_reset(struct pxa_udc *udc)
|
{
u32 udccr = udc_readl(udc, UDCCR);
struct pxa_ep *ep = &udc->pxa_ep[0];
dev_info(udc->dev, "USB reset\n");
udc_writel(udc, UDCISR1, UDCISR1_IRRS);
udc->stats.irqs_reset++;
if ((udccr & UDCCR_UDA) == 0) {
dev_dbg(udc->dev, "USB reset start\n");
stop_activity(udc, udc->driver);
}
udc->gadget.speed = USB_SPEED_FULL;
memset(&udc->stats, 0, sizeof udc->stats);
nuke(ep, -EPROTO);
ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
ep0_idle(udc);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Reads and returns the identifiers of a NAND Flash chip. */
|
uint32_t nand_flash_raw_read_id(const struct nand_flash_raw *raw)
|
/* Reads and returns the identifiers of a NAND Flash chip. */
uint32_t nand_flash_raw_read_id(const struct nand_flash_raw *raw)
|
{
uint32_t chip_id;
smc_nfc_send_command(SMC,
NFCADDR_CMD_NFCCMD |
NFCADDR_CMD_NFC_READ |
0 |
NFCADDR_CMD_CSID(BOARD_NAND_CS) |
NFCADDR_CMD_ACYCLE_ONE |
(NAND_COMMAND_READID << 2),
0,
0
);
delay_us(1);
chip_id = READ_DATA8(raw);
chip_id |= (READ_DATA8(raw) << 8);
chip_id |= (READ_DATA8(raw) << 16);
chip_id |= (READ_DATA8(raw) << 24);
return chip_id;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* If this interface is not supported, then return zero. */
|
UINTN EFIAPI AesGetContextSize(VOID)
|
/* If this interface is not supported, then return zero. */
UINTN EFIAPI AesGetContextSize(VOID)
|
{
CALL_CRYPTO_SERVICE (AesGetContextSize, (), 0);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Check whether a provided iface uses the provided L2. */
|
static bool iface_uses_l2(struct net_if *iface, const struct net_l2 *l2)
|
/* Check whether a provided iface uses the provided L2. */
static bool iface_uses_l2(struct net_if *iface, const struct net_l2 *l2)
|
{
return (!l2 && net_if_offload(iface)) ||
(net_if_l2(iface) == l2);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Submit a USB set HID report idle request for the USB device specified by UsbIo, Interface, and ReportId, and set the idle rate to the value specified by Duration. If UsbIo is NULL, then ASSERT(). */
|
EFI_STATUS EFIAPI UsbSetIdleRequest(IN EFI_USB_IO_PROTOCOL *UsbIo, IN UINT8 Interface, IN UINT8 ReportId, IN UINT8 Duration)
|
/* Submit a USB set HID report idle request for the USB device specified by UsbIo, Interface, and ReportId, and set the idle rate to the value specified by Duration. If UsbIo is NULL, then ASSERT(). */
EFI_STATUS EFIAPI UsbSetIdleRequest(IN EFI_USB_IO_PROTOCOL *UsbIo, IN UINT8 Interface, IN UINT8 ReportId, IN UINT8 Duration)
|
{
UINT32 Status;
EFI_STATUS Result;
EFI_USB_DEVICE_REQUEST Request;
ASSERT (UsbIo != NULL);
Request.RequestType = USB_HID_CLASS_SET_REQ_TYPE;
Request.Request = EFI_USB_SET_IDLE_REQUEST;
Request.Value = (UINT16)((Duration << 8) | ReportId);
Request.Index = Interface;
Request.Length = 0;
Result = UsbIo->UsbControlTransfer (
UsbIo,
&Request,
EfiUsbNoData,
PcdGet32 (PcdUsbTransferTimeoutValue),
NULL,
0,
&Status
);
return Result;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Put the ssi to soft-reset mode, and then can be configured. */
|
static int32_t ssi_soft_reset(audio_ctrl_p ctrl)
|
/* Put the ssi to soft-reset mode, and then can be configured. */
static int32_t ssi_soft_reset(audio_ctrl_p ctrl)
|
{
uint32_t instance = ctrl->instance;
uint32_t val;
val = HW_SSI_SCR_RD(instance);
val &= ~BM_SSI_SCR_SSIEN;
HW_SSI_SCR_WR(instance, val);
return 0;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Setting the seed allows arbitrary accumulators and flexible XOR policy If your algorithm starts with ~0, then XOR with ~0 before you set the seed. */
|
static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key, unsigned int keylen)
|
/* Setting the seed allows arbitrary accumulators and flexible XOR policy If your algorithm starts with ~0, then XOR with ~0 before you set the seed. */
static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key, unsigned int keylen)
|
{
u32 *mctx = crypto_shash_ctx(hash);
if (keylen != sizeof(u32)) {
crypto_shash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
return -EINVAL;
}
*mctx = le32_to_cpup((__le32 *)key);
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Release dquots (and their references) if any. The inode should be locked EXCL except when this's called by xfs_ireclaim. */
|
void xfs_qm_dqdetach(xfs_inode_t *ip)
|
/* Release dquots (and their references) if any. The inode should be locked EXCL except when this's called by xfs_ireclaim. */
void xfs_qm_dqdetach(xfs_inode_t *ip)
|
{
if (!(ip->i_udquot || ip->i_gdquot))
return;
trace_xfs_dquot_dqdetach(ip);
ASSERT(ip->i_ino != ip->i_mount->m_sb.sb_uquotino);
ASSERT(ip->i_ino != ip->i_mount->m_sb.sb_gquotino);
if (ip->i_udquot) {
xfs_qm_dqrele(ip->i_udquot);
ip->i_udquot = NULL;
}
if (ip->i_gdquot) {
xfs_qm_dqrele(ip->i_gdquot);
ip->i_gdquot = NULL;
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Gets the value of the CC pull up resistor used when operating as a Source. */
|
static int ucpd_get_rp_value(const struct device *dev, enum tc_rp_value *rp)
|
/* Gets the value of the CC pull up resistor used when operating as a Source. */
static int ucpd_get_rp_value(const struct device *dev, enum tc_rp_value *rp)
|
{
struct tcpc_data *data = dev->data;
*rp = data->rp;
return 0;
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* this function is a POSIX compliant version, which shall perform a variety of control functions on devices. */
|
int ioctl(int fildes, int cmd,...)
|
/* this function is a POSIX compliant version, which shall perform a variety of control functions on devices. */
int ioctl(int fildes, int cmd,...)
|
{
void *arg;
va_list ap;
va_start(ap, cmd);
arg = va_arg(ap, void *);
va_end(ap);
return fcntl(fildes, cmd, arg);
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Pat the watchdog whenever device is written to. */
|
static ssize_t ks8695_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
|
/* Pat the watchdog whenever device is written to. */
static ssize_t ks8695_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
|
{
ks8695_wdt_reload();
return len;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Each of the lists is a queue. The list at @list is reinitialised */
|
static void list_splice_tail_init(struct list_head *list, struct list_head *head)
|
/* Each of the lists is a queue. The list at @list is reinitialised */
static void list_splice_tail_init(struct list_head *list, struct list_head *head)
|
{
if (!list_empty(list)) {
__list_splice(list, head->prev, head);
INIT_LIST_HEAD(list);
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This service enables PEIMs to discover sections of a given instance and type within a valid FFS file. */
|
EFI_STATUS EFIAPI PeiServicesFfsFindSectionData3(IN EFI_SECTION_TYPE SectionType, IN UINTN SectionInstance, IN EFI_PEI_FILE_HANDLE FileHandle, OUT VOID **SectionData, OUT UINT32 *AuthenticationStatus)
|
/* This service enables PEIMs to discover sections of a given instance and type within a valid FFS file. */
EFI_STATUS EFIAPI PeiServicesFfsFindSectionData3(IN EFI_SECTION_TYPE SectionType, IN UINTN SectionInstance, IN EFI_PEI_FILE_HANDLE FileHandle, OUT VOID **SectionData, OUT UINT32 *AuthenticationStatus)
|
{
CONST EFI_PEI_SERVICES **PeiServices;
PeiServices = GetPeiServicesTablePointer ();
return (*PeiServices)->FindSectionData3 (PeiServices, SectionType, SectionInstance, FileHandle, SectionData, AuthenticationStatus);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Write the Value object to a stream. Example Usage: $g++ streamWrite.cpp -ljsoncpp -std=c++11 -o streamWrite $./streamWrite { "Age" : 20, "Name" : "robin" }. */
|
int jsoncpp_comp_write_stream_example(int argc, char **argv)
|
/* Write the Value object to a stream. Example Usage: $g++ streamWrite.cpp -ljsoncpp -std=c++11 -o streamWrite $./streamWrite { "Age" : 20, "Name" : "robin" }. */
int jsoncpp_comp_write_stream_example(int argc, char **argv)
|
{
Json::Value root;
Json::StreamWriterBuilder builder;
const std::unique_ptr<Json::StreamWriter> writer(builder.newStreamWriter());
root["Name"] = "robin";
root["Age"] = 20;
writer->write(root, &std::cout);
return EXIT_SUCCESS;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* brief Initialize the SAI RX BCLK to given frequency. return Nothing */
|
void CLOCK_SetupSaiRxBclk(uint32_t id, uint32_t iFreq)
|
/* brief Initialize the SAI RX BCLK to given frequency. return Nothing */
void CLOCK_SetupSaiRxBclk(uint32_t id, uint32_t iFreq)
|
{
s_Sai_Rx_Bclk_Freq[id] = iFreq;
return;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Mask off any voltages we don't support and select the lowest voltage */
|
rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr)
|
/* Mask off any voltages we don't support and select the lowest voltage */
rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr)
|
{
int bit;
ocr &= host->valid_ocr;
bit = __rt_ffs(ocr);
if (bit)
{
bit -= 1;
ocr &= 3 << bit;
host->io_cfg.vdd = bit;
mmcsd_set_iocfg(host);
}
else
{
rt_kprintf("host doesn't support card's voltages\n");
ocr = 0;
}
return ocr;
}
|
armink/FreeModbus_Slave-Master-RTT-STM32
|
C++
|
Other
| 1,477
|
/* Enable or disable the specified hardware count up condition. */
|
void TMRA_HWCountUpCondCmd(CM_TMRA_TypeDef *TMRAx, uint16_t u16Cond, en_functional_state_t enNewState)
|
/* Enable or disable the specified hardware count up condition. */
void TMRA_HWCountUpCondCmd(CM_TMRA_TypeDef *TMRAx, uint16_t u16Cond, en_functional_state_t enNewState)
|
{
DDL_ASSERT(IS_TMRA_UNIT(TMRAx));
DDL_ASSERT(IS_TMRA_CNT_UP_COND(u16Cond));
DDL_ASSERT(IS_FUNCTIONAL_STATE(enNewState));
if (enNewState == ENABLE) {
SET_REG16_BIT(TMRAx->HCUPR, u16Cond);
} else {
CLR_REG16_BIT(TMRAx->HCUPR, u16Cond);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* write_page - Write one page to given swap location. @buf: Address we're writing. @offset: Offset of the swap page we're writing to. @bio_chain: Link the next write BIO here */
|
static int write_page(void *buf, sector_t offset, struct bio **bio_chain)
|
/* write_page - Write one page to given swap location. @buf: Address we're writing. @offset: Offset of the swap page we're writing to. @bio_chain: Link the next write BIO here */
static int write_page(void *buf, sector_t offset, struct bio **bio_chain)
|
{
void *src;
if (!offset)
return -ENOSPC;
if (bio_chain) {
src = (void *)__get_free_page(__GFP_WAIT | __GFP_HIGH);
if (src) {
memcpy(src, buf, PAGE_SIZE);
} else {
WARN_ON_ONCE(1);
bio_chain = NULL;
src = buf;
}
} else {
src = buf;
}
return bio_write_page(offset, src, bio_chain);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* ISR handler for a specific vector index in the interrupt vector table for linking the actual interrupts vectors to the one in the user program's vector table. */
|
void Vector23_handler(void)
|
/* ISR handler for a specific vector index in the interrupt vector table for linking the actual interrupts vectors to the one in the user program's vector table. */
void Vector23_handler(void)
|
{
asm
{
LDX(VCT_USER_PROGRAM_VECTOR_TABLE_STARTADDR + (23 * 2))
JMP 0,X
}
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* Set a single color register. The values supplied are already rounded down to the hardware's capabilities (according to the entries in the var structure). Return != 0 for invalid regno. */
|
static int ps3fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue, unsigned int transp, struct fb_info *info)
|
/* Set a single color register. The values supplied are already rounded down to the hardware's capabilities (according to the entries in the var structure). Return != 0 for invalid regno. */
static int ps3fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue, unsigned int transp, struct fb_info *info)
|
{
if (regno >= 16)
return 1;
red >>= 8;
green >>= 8;
blue >>= 8;
transp >>= 8;
((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 |
green << 8 | blue;
return 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Enables or disables the TIMx peripheral Preload register on CCR2. */
|
void TIM_OC2PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload)
|
/* Enables or disables the TIMx peripheral Preload register on CCR2. */
void TIM_OC2PreloadConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCPreload)
|
{
uint16_t tmpccmr1 = 0;
assert_param(IS_TIM_LIST2_PERIPH(TIMx));
assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
tmpccmr1 = TIMx->CCMR1;
tmpccmr1 &= (uint16_t)(~TIM_CCMR1_OC2PE);
tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8);
TIMx->CCMR1 = tmpccmr1;
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* tpm_chip_find_get - return tpm_chip for given chip number */
|
static struct tpm_chip* tpm_chip_find_get(int chip_num)
|
/* tpm_chip_find_get - return tpm_chip for given chip number */
static struct tpm_chip* tpm_chip_find_get(int chip_num)
|
{
struct tpm_chip *pos, *chip = NULL;
rcu_read_lock();
list_for_each_entry_rcu(pos, &tpm_chip_list, list) {
if (chip_num != TPM_ANY_NUM && chip_num != pos->dev_num)
continue;
if (try_module_get(pos->dev->driver->owner)) {
chip = pos;
break;
}
}
rcu_read_unlock();
return chip;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* rtas_pci_enable - enable MMIO or DMA transfers for this slot @pdn pci device node */
|
int rtas_pci_enable(struct pci_dn *pdn, int function)
|
/* rtas_pci_enable - enable MMIO or DMA transfers for this slot @pdn pci device node */
int rtas_pci_enable(struct pci_dn *pdn, int function)
|
{
int config_addr;
int rc;
config_addr = pdn->eeh_config_addr;
if (pdn->eeh_pe_config_addr)
config_addr = pdn->eeh_pe_config_addr;
rc = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
config_addr,
BUID_HI(pdn->phb->buid),
BUID_LO(pdn->phb->buid),
function);
if (rc)
printk(KERN_WARNING "EEH: Unexpected state change %d, err=%d dn=%s\n",
function, rc, pdn->node->full_name);
rc = eeh_wait_for_slot_status (pdn, PCI_BUS_RESET_WAIT_MSEC);
if ((rc == 4) && (function == EEH_THAW_MMIO))
return 0;
return rc;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* param base Quad Timer peripheral base address param channel Quad Timer channel number param mask The DMA to enable. This is a logical OR of members of the enumeration ::qtmr_dma_enable_t */
|
void QTMR_DisableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask)
|
/* param base Quad Timer peripheral base address param channel Quad Timer channel number param mask The DMA to enable. This is a logical OR of members of the enumeration ::qtmr_dma_enable_t */
void QTMR_DisableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask)
|
{
uint16_t reg;
reg = base->CHANNEL[channel].DMA;
if (mask & kQTMR_InputEdgeFlagDmaEnable)
{
reg &= ~TMR_DMA_IEFDE_MASK;
}
if (mask & kQTMR_ComparatorPreload1DmaEnable)
{
reg &= ~TMR_DMA_CMPLD1DE_MASK;
}
if (mask & kQTMR_ComparatorPreload2DmaEnable)
{
reg &= ~TMR_DMA_CMPLD2DE_MASK;
}
base->CHANNEL[channel].DMA = reg;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Set the source repeat size of the specified dma channel. */
|
en_result_t Dma_EnableSourceRload(en_dma_channel_t enCh)
|
/* Set the source repeat size of the specified dma channel. */
en_result_t Dma_EnableSourceRload(en_dma_channel_t enCh)
|
{
ASSERT(IS_VALID_CH(enCh));
if((!IS_VALID_CH(enCh)))
{
return ErrorInvalidParameter;
}
if(enCh == DmaCh0)
{
M0P_DMAC ->CONFB0_f.RS = 1;
}
else
{
M0P_DMAC ->CONFB1_f.RS = 1; }
return Ok;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* verify that ringbuffer can be placed in any user-controlled memory
Assumptions and Constraints: */
|
ZTEST(ringbuffer_api, test_ringbuffer_size_put_get_thread_isr)
|
/* verify that ringbuffer can be placed in any user-controlled memory
Assumptions and Constraints: */
ZTEST(ringbuffer_api, test_ringbuffer_size_put_get_thread_isr)
|
{
pbuf = &ringbuf_size;
tringbuf_put((const void *)0);
irq_offload(tringbuf_put, (const void *)1);
tringbuf_get((const void *)0);
irq_offload(tringbuf_get, (const void *)1);
tringbuf_put((const void *)2);
irq_offload(tringbuf_get, (const void *)2);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Append ErrorString in published HSTI table. This API will update the HSTI table with indicated Role and ImplementationID, NULL ImplementationID means to find the first HSTI table with indicated Role. */
|
EFI_STATUS EFIAPI HstiLibAppendErrorString(IN UINT32 Role, IN CHAR16 *ImplementationID OPTIONAL, IN CHAR16 *ErrorString)
|
/* Append ErrorString in published HSTI table. This API will update the HSTI table with indicated Role and ImplementationID, NULL ImplementationID means to find the first HSTI table with indicated Role. */
EFI_STATUS EFIAPI HstiLibAppendErrorString(IN UINT32 Role, IN CHAR16 *ImplementationID OPTIONAL, IN CHAR16 *ErrorString)
|
{
return InternalHstiRecordErrorString (
Role,
ImplementationID,
ErrorString,
TRUE
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This triggers the DRAM initialization. It performs sending the mode registers to the DRAM among other things. Very likely the ZQCL command is also getting executed (to do the initial impedance calibration on the DRAM side of the wire). The memory controller and the PHY must be already configured before calling this function. */
|
static void mctl_ddr3_initialize(void)
|
/* This triggers the DRAM initialization. It performs sending the mode registers to the DRAM among other things. Very likely the ZQCL command is also getting executed (to do the initial impedance calibration on the DRAM side of the wire). The memory controller and the PHY must be already configured before calling this function. */
static void mctl_ddr3_initialize(void)
|
{
struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
setbits_le32(&dram->ccr, DRAM_CCR_INIT);
await_bits_clear(&dram->ccr, DRAM_CCR_INIT);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* param base TMPSNS base pointer param mask The interrupts to disable from tmpsns_interrupt_status_enable_t. */
|
void TMPSNS_DisableInterrupt(TMPSNS_Type *base, uint32_t mask)
|
/* param base TMPSNS base pointer param mask The interrupts to disable from tmpsns_interrupt_status_enable_t. */
void TMPSNS_DisableInterrupt(TMPSNS_Type *base, uint32_t mask)
|
{
uint32_t tempRegVal;
tempRegVal = TMPSNS_AIReadAccess((uint32_t) & (base->CTRL1));
TMPSNS_AIWriteAccess((uint32_t) & (base->CTRL1), tempRegVal & (~mask));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Enable access to the embedded functions/sensor hub configuration registers.. */
|
int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx, lsm6dso_reg_access_t *val)
|
/* Enable access to the embedded functions/sensor hub configuration registers.. */
int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx, lsm6dso_reg_access_t *val)
|
{
lsm6dso_func_cfg_access_t reg;
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)®,
1);
switch (reg.reg_access) {
case LSM6DSO_USER_BANK:
*val = LSM6DSO_USER_BANK;
break;
case LSM6DSO_SENSOR_HUB_BANK:
*val = LSM6DSO_SENSOR_HUB_BANK;
break;
case LSM6DSO_EMBEDDED_FUNC_BANK:
*val = LSM6DSO_EMBEDDED_FUNC_BANK;
break;
default:
*val = LSM6DSO_USER_BANK;
break;
}
return ret;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* RCC Clear the Clock Security System Interrupt Flag. */
|
void rcc_css_int_clear(void)
|
/* RCC Clear the Clock Security System Interrupt Flag. */
void rcc_css_int_clear(void)
|
{
RCC_CIR |= RCC_CIR_CSSC;
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* This gets called as almost the first thing z_cstart() does, so it will happen before any calls to the _arch_irq_xxx() routines above. */
|
void soc_interrupt_init(void)
|
/* This gets called as almost the first thing z_cstart() does, so it will happen before any calls to the _arch_irq_xxx() routines above. */
void soc_interrupt_init(void)
|
{
EVENT_UNIT->INTPTPENDCLEAR = 0xFFFFFFFF;
(void)(EVENT_UNIT->INTPTPENDCLEAR);
EVENT_UNIT->EVTPENDCLEAR = 0xFFFFFFFF;
(void)(EVENT_UNIT->EVTPENDCLEAR);
if (IS_ENABLED(CONFIG_MULTI_LEVEL_INTERRUPTS)) {
dev_intmux = DEVICE_DT_GET(DT_INST(0, openisa_rv32m1_intmux));
}
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* On IA-64, we return the two file descriptors in ret0 and ret1 (r8 and r9) as this is faster than doing a copy_to_user(). */
|
asmlinkage long sys_ia64_pipe(void)
|
/* On IA-64, we return the two file descriptors in ret0 and ret1 (r8 and r9) as this is faster than doing a copy_to_user(). */
asmlinkage long sys_ia64_pipe(void)
|
{
struct pt_regs *regs = task_pt_regs(current);
int fd[2];
int retval;
retval = do_pipe_flags(fd, 0);
if (retval)
goto out;
retval = fd[0];
regs->r9 = fd[1];
out:
return retval;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* return the final target of a jump (skipping jumps to jumps) */
|
static int finaltarget(Instruction *code, int i)
|
/* return the final target of a jump (skipping jumps to jumps) */
static int finaltarget(Instruction *code, int i)
|
{
Instruction pc = code[i];
if (GET_OPCODE(pc) != OP_JMP)
break;
else
i += GETARG_sJ(pc) + 1;
}
return i;
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* Atomically swap in the new signal mask, and wait for a signal. */
|
asmlinkage long xtensa_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, long a2, long a3, long a4, long a5, struct pt_regs *regs)
|
/* Atomically swap in the new signal mask, and wait for a signal. */
asmlinkage long xtensa_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, long a2, long a3, long a4, long a5, struct pt_regs *regs)
|
{
sigset_t saveset, newset;
if (sigsetsize != sizeof(sigset_t))
return -EINVAL;
if (copy_from_user(&newset, unewset, sizeof(newset)))
return -EFAULT;
sigdelsetmask(&newset, ~_BLOCKABLE);
spin_lock_irq(¤t->sighand->siglock);
saveset = current->blocked;
current->blocked = newset;
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
regs->areg[2] = -EINTR;
while (1) {
current->state = TASK_INTERRUPTIBLE;
schedule();
if (do_signal(regs, &saveset))
return -EINTR;
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Check the status of the FIFO buffer of the specified SPI port. */
|
unsigned long SPIFIFOStatusGet(unsigned long ulBase)
|
/* Check the status of the FIFO buffer of the specified SPI port. */
unsigned long SPIFIFOStatusGet(unsigned long ulBase)
|
{
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE)||
(ulBase == SPI2_BASE)||(ulBase == SPI3_BASE) );
return (xHWREG(ulBase + SPI_STATUS) & (SPI_STATUS_TX_FULL) ||
(SPI_STATUS_RX_FULL) || (SPI_STATUS_TX_EMPTY) || (SPI_STATUS_RX_EMPTY));
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* DAC Channel DMA Disable.
Disable a digital to analog converter channel DMA mode. */
|
void dac_dma_disable(data_channel dac_channel)
|
/* DAC Channel DMA Disable.
Disable a digital to analog converter channel DMA mode. */
void dac_dma_disable(data_channel dac_channel)
|
{
switch (dac_channel) {
case CHANNEL_1:
DAC_CR &= ~DAC_CR_DMAEN1;
break;
case CHANNEL_2:
DAC_CR &= ~DAC_CR_DMAEN2;
break;
case CHANNEL_D:
DAC_CR &= ~(DAC_CR_DMAEN1 | DAC_CR_DMAEN2);
break;
}
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* Create a string from the zFromat argument and the va_list that follows. Store the string in memory obtained from sqliteMalloc() and make *pz point to that string. */
|
SQLITE_PRIVATE void sqlite3SetString(char **, sqlite3 *, const char *,...)
|
/* Create a string from the zFromat argument and the va_list that follows. Store the string in memory obtained from sqliteMalloc() and make *pz point to that string. */
SQLITE_PRIVATE void sqlite3SetString(char **, sqlite3 *, const char *,...)
|
{
va_list ap;
char *z;
va_start(ap, zFormat);
z = sqlite3VMPrintf(db, zFormat, ap);
va_end(ap);
sqlite3DbFree(db, *pz);
*pz = z;
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* Gets the error status of the I2C Master module. */
|
unsigned long I2CMasterErr(unsigned long ulBase)
|
/* Gets the error status of the I2C Master module. */
unsigned long I2CMasterErr(unsigned long ulBase)
|
{
unsigned long ulErr;
xASSERT((ulBase == I2C0_BASE));
ulErr = xHWREG(ulBase + I2C_CSR);
if(ulErr & (I2C_CSR_ARBLOS | I2C_CSR_RXNACK | I2C_CSR_BUSERR))
{
return(ulErr & (I2C_CSR_ARBLOS | I2C_CSR_RXNACK | I2C_CSR_BUSERR));
}
else
{
return(I2C_MASTER_ERR_NONE);
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Remove all the transmit requests queued on the ARP queue, then free it. */
|
VOID Ip4FreeArpQue(IN IP4_ARP_QUE *ArpQue, IN EFI_STATUS IoStatus)
|
/* Remove all the transmit requests queued on the ARP queue, then free it. */
VOID Ip4FreeArpQue(IN IP4_ARP_QUE *ArpQue, IN EFI_STATUS IoStatus)
|
{
NET_CHECK_SIGNATURE (ArpQue, IP4_FRAME_ARP_SIGNATURE);
Ip4CancelFrameArp (ArpQue, IoStatus, NULL, NULL);
gBS->CloseEvent (ArpQue->OnResolved);
FreePool (ArpQue);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Starts the timer running providing the timer has a counter configuration set. */
|
static void ali_start(void)
|
/* Starts the timer running providing the timer has a counter configuration set. */
static void ali_start(void)
|
{
u32 val;
spin_lock(&ali_lock);
pci_read_config_dword(ali_pci, 0xCC, &val);
val &= ~0x3F;
val |= (1 << 25) | ali_timeout_bits;
pci_write_config_dword(ali_pci, 0xCC, val);
spin_unlock(&ali_lock);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* TLSF utility functions. In most cases, these are direct translations of the documentation found in the white paper. */
|
static void mapping_insert(size_t size, int *fli, int *sli)
|
/* TLSF utility functions. In most cases, these are direct translations of the documentation found in the white paper. */
static void mapping_insert(size_t size, int *fli, int *sli)
|
{
int fl, sl;
if(size < SMALL_BLOCK_SIZE) {
fl = 0;
sl = tlsf_cast(int, size) / (SMALL_BLOCK_SIZE / SL_INDEX_COUNT);
}
else {
fl = tlsf_fls_sizet(size);
sl = tlsf_cast(int, size >> (fl - SL_INDEX_COUNT_LOG2)) ^ (1 << SL_INDEX_COUNT_LOG2);
fl -= (FL_INDEX_SHIFT - 1);
}
*fli = fl;
*sli = sl;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Configure the crystal type connected to the device.
Configure the crystal type connected between the OSCO and OSCI pins by writing the appropriate value to the XTAL field in SYSCTL_RCC. The PLL parameters are automatically adjusted in hardware to provide a PLL clock of 400MHz. */
|
void rcc_configure_xtal(enum xtal_t xtal)
|
/* Configure the crystal type connected to the device.
Configure the crystal type connected between the OSCO and OSCI pins by writing the appropriate value to the XTAL field in SYSCTL_RCC. The PLL parameters are automatically adjusted in hardware to provide a PLL clock of 400MHz. */
void rcc_configure_xtal(enum xtal_t xtal)
|
{
uint32_t reg32;
reg32 = SYSCTL_RCC;
reg32 &= ~SYSCTL_RCC_XTAL_MASK;
reg32 |= (xtal & SYSCTL_RCC_XTAL_MASK);
SYSCTL_RCC = reg32;
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
|
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
{
if(huart->Instance==USART3)
{
__HAL_RCC_USART3_CLK_DISABLE();
HAL_GPIO_DeInit(GPIOD, STLK_RX_Pin|STLK_TX_Pin);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Opens a file and copies its content to a buffer. */
|
uint32_t Storage_CheckBitmapFile(const char *BmpName, uint32_t *FileLen)
|
/* Opens a file and copies its content to a buffer. */
uint32_t Storage_CheckBitmapFile(const char *BmpName, uint32_t *FileLen)
|
{
uint32_t err = 0;
if(f_open(&MyFile, BmpName, FA_READ) != FR_OK)
{
err = 1;
}
else
{
if(f_close(&MyFile) != FR_OK)
{
err = 1;
}
}
return err;
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Read the cy8c4014lqi device ID, pre initialize I2C in case of need to be able to read the CY8C4014LQI device ID, and verify this is a CY8C4014LQI. */
|
uint16_t cy8c4014lqi_ReadID(uint16_t DeviceAddr)
|
/* Read the cy8c4014lqi device ID, pre initialize I2C in case of need to be able to read the CY8C4014LQI device ID, and verify this is a CY8C4014LQI. */
uint16_t cy8c4014lqi_ReadID(uint16_t DeviceAddr)
|
{
cy8c4014lqi_I2C_InitializeIfRequired();
return(TS_IO_Read(DeviceAddr, CY8C4014LQI_ADEVICE_ID));
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* This function is used to Start the DMA controller. */
|
unsigned char tls_dma_start(unsigned char ch, struct tls_dma_descriptor *dma_desc, unsigned char auto_reload)
|
/* This function is used to Start the DMA controller. */
unsigned char tls_dma_start(unsigned char ch, struct tls_dma_descriptor *dma_desc, unsigned char auto_reload)
|
{
if((ch > 7) && !dma_desc) return 1;
if ((dma_used_bit &(1<<ch)) == 0)
{
dma_used_bit |= (1<<ch);
}
DMA_SRCADDR_REG(ch) = dma_desc->src_addr;
DMA_DESTADDR_REG(ch) = dma_desc->dest_addr;
DMA_CTRL_REG(ch) = ((dma_desc->dma_ctrl & 0x7fffff) << 1) | (auto_reload ? 0x1: 0x0);
DMA_CHNLCTRL_REG(ch) |= DMA_CHNL_CTRL_CHNL_ON;
return 0;
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* param base LPUART peripheral base address. param handle LPUART handle pointer. param xfer LPUART transfer structure, see #lpuart_transfer_t. retval kStatus_Success Successfully start the data transmission. retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register. retval kStatus_InvalidArgument Invalid argument. */
|
status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer)
|
/* param base LPUART peripheral base address. param handle LPUART handle pointer. param xfer LPUART transfer structure, see #lpuart_transfer_t. retval kStatus_Success Successfully start the data transmission. retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register. retval kStatus_InvalidArgument Invalid argument. */
status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer)
|
{
assert(NULL != handle);
assert(NULL != xfer);
assert(NULL != xfer->data);
assert(0U != xfer->dataSize);
status_t status;
if ((uint8_t)kLPUART_TxBusy == handle->txState)
{
status = kStatus_LPUART_TxBusy;
}
else
{
handle->txData = xfer->data;
handle->txDataSize = xfer->dataSize;
handle->txDataSizeAll = xfer->dataSize;
handle->txState = (uint8_t)kLPUART_TxBusy;
LPUART_EnableInterrupts(base, (uint32_t)kLPUART_TxDataRegEmptyInterruptEnable);
status = kStatus_Success;
}
return status;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Add a specified length protocal header to the end of data buffer hold by specified rtk_buffer. This function extends used data area of the buffer at the buffer end. */
|
uint8_t* RtbAddTail(RTK_BUFFER *RtkBuffer, uint32_t Length)
|
/* Add a specified length protocal header to the end of data buffer hold by specified rtk_buffer. This function extends used data area of the buffer at the buffer end. */
uint8_t* RtbAddTail(RTK_BUFFER *RtkBuffer, uint32_t Length)
|
{
if ((uint32_t)(RtkBuffer->Tail - RtkBuffer->End) >= Length)
{
uint8_t* Tmp = RtkBuffer->End;
RtkBuffer->End += Length;
RtkBuffer->Length += Length;
return Tmp;
}
return NULL;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Return the number of items matching a filter in the cache */
|
void nfnl_queue_msg_set_verdict(struct nfnl_queue_msg *msg, unsigned int verdict)
|
/* Return the number of items matching a filter in the cache */
void nfnl_queue_msg_set_verdict(struct nfnl_queue_msg *msg, unsigned int verdict)
|
{
msg->queue_msg_verdict = verdict;
msg->ce_mask |= QUEUE_MSG_ATTR_VERDICT;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* returns 0 if fid got re-opened, 1 if not, < 0 on error */
|
static int v9fs_reopen_fid(V9fsPDU *pdu, V9fsFidState *f)
|
/* returns 0 if fid got re-opened, 1 if not, < 0 on error */
static int v9fs_reopen_fid(V9fsPDU *pdu, V9fsFidState *f)
|
{
int err = 1;
if (f->fid_type == P9_FID_FILE) {
if (f->fs.fd == -1) {
do {
err = v9fs_co_open(pdu, f, f->open_flags);
} while (err == -EINTR && !pdu->cancelled);
}
} else if (f->fid_type == P9_FID_DIR) {
if (f->fs.dir == NULL) {
do {
err = v9fs_co_opendir(pdu, f);
} while (err == -EINTR && !pdu->cancelled);
}
}
return err;
}
|
ve3wwg/teensy3_qemu
|
C++
|
Other
| 15
|
/* Display an arbitrary length MAC address in readable format. */
|
char* iw_mac_ntop(const unsigned char *mac, int maclen, char *buf, int buflen)
|
/* Display an arbitrary length MAC address in readable format. */
char* iw_mac_ntop(const unsigned char *mac, int maclen, char *buf, int buflen)
|
{
int i;
if(buflen < (maclen * 3 - 1 + 1))
return(NULL);
sprintf(buf, "%02X", mac[0]);
for(i = 1; i < maclen; i++)
sprintf(buf + (i * 3) - 1, ":%02X", mac[i]);
return(buf);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. The handler executes in an interrupt context, so it must minimize the amount of processing performed. One of the following status events is passed to the status handler. */
|
void XQspiPs_SetStatusHandler(XQspiPs *InstancePtr, void *CallBackRef, XQspiPs_StatusHandler FuncPtr)
|
/* Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. The handler executes in an interrupt context, so it must minimize the amount of processing performed. One of the following status events is passed to the status handler. */
void XQspiPs_SetStatusHandler(XQspiPs *InstancePtr, void *CallBackRef, XQspiPs_StatusHandler FuncPtr)
|
{
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(FuncPtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
InstancePtr->StatusHandler = FuncPtr;
InstancePtr->StatusRef = CallBackRef;
}
|
ua1arn/hftrx
|
C++
| null | 69
|
/* Count the number of each code length for a Huffman tree. */
|
STATIC VOID CountLen(IN INT32 i)
|
/* Count the number of each code length for a Huffman tree. */
STATIC VOID CountLen(IN INT32 i)
|
{
STATIC INT32 Depth = 0;
if (i < mN) {
mLenCnt[(Depth < 16) ? Depth : 16]++;
} else {
Depth++;
CountLen(mLeft [i]);
CountLen(mRight[i]);
Depth--;
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Extract device path for given HII handle and class guid. */
|
CHAR16* ExtractDevicePathFromHandle(IN EFI_HII_HANDLE Handle)
|
/* Extract device path for given HII handle and class guid. */
CHAR16* ExtractDevicePathFromHandle(IN EFI_HII_HANDLE Handle)
|
{
EFI_STATUS Status;
EFI_HANDLE DriverHandle;
ASSERT (Handle != NULL);
if (Handle == NULL) {
return NULL;
}
Status = gHiiDatabase->GetPackageListHandle (gHiiDatabase, Handle, &DriverHandle);
if (EFI_ERROR (Status)) {
return NULL;
}
return ConvertDevicePathToText (DevicePathFromHandle (DriverHandle), FALSE, FALSE);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The VLB IRQ number is found in bits 2 to 4 of the CfgLsw. It decodes as: 000: invalid 001: 10 010: 11 011: 12 100: invalid 101: 14 110: 15 111: invalid */
|
static unsigned int __devinit advansys_vlb_irq_no(PortAddr iop_base)
|
/* The VLB IRQ number is found in bits 2 to 4 of the CfgLsw. It decodes as: 000: invalid 001: 10 010: 11 011: 12 100: invalid 101: 14 110: 15 111: invalid */
static unsigned int __devinit advansys_vlb_irq_no(PortAddr iop_base)
|
{
unsigned short cfg_lsw = AscGetChipCfgLsw(iop_base);
unsigned int chip_irq = ((cfg_lsw >> 2) & 0x07) + 9;
if ((chip_irq < 10) || (chip_irq == 13) || (chip_irq > 15))
return 0;
return chip_irq;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Heuristically dissect a tvbuff containing a JXTA SCTP Stream */
|
static gboolean dissect_jxta_SCTP_heur(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, void *data _U_)
|
/* Heuristically dissect a tvbuff containing a JXTA SCTP Stream */
static gboolean dissect_jxta_SCTP_heur(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, void *data _U_)
|
{
int save_desegment_offset;
guint32 save_desegment_len;
int ret;
save_desegment_offset = pinfo->desegment_offset;
save_desegment_len = pinfo->desegment_len;
ret = dissect_jxta_stream(tvb, pinfo, tree, NULL);
if (ret < 0) {
pinfo->desegment_offset = save_desegment_offset;
pinfo->desegment_len = save_desegment_len;
return FALSE;
} else if (ret == 0) {
pinfo->desegment_offset = save_desegment_offset;
pinfo->desegment_len = save_desegment_len;
return FALSE;
} else {
return TRUE;
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Check if length including bad blocks fits into device. */
|
static size_t get_len_incl_bad(nand_info_t *nand, loff_t offset, const size_t length)
|
/* Check if length including bad blocks fits into device. */
static size_t get_len_incl_bad(nand_info_t *nand, loff_t offset, const size_t length)
|
{
size_t len_incl_bad = 0;
size_t len_excl_bad = 0;
size_t block_len;
while (len_excl_bad < length) {
block_len = nand->erasesize - (offset & (nand->erasesize - 1));
if (!nand_block_isbad (nand, offset & ~(nand->erasesize - 1)))
len_excl_bad += block_len;
len_incl_bad += block_len;
offset += block_len;
if (offset >= nand->size)
break;
}
return len_incl_bad;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Event handler for the USB_HostError event. This indicates that a hardware error occurred while in host mode. */
|
void EVENT_USB_Host_HostError(const uint8_t ErrorCode)
|
/* Event handler for the USB_HostError event. This indicates that a hardware error occurred while in host mode. */
void EVENT_USB_Host_HostError(const uint8_t ErrorCode)
|
{
USB_Disable();
printf_P(PSTR(ESC_FG_RED "Host Mode Error\r\n"
" -- Error Code %d\r\n" ESC_FG_WHITE), ErrorCode);
LEDs_SetAllLEDs(LEDMASK_USB_ERROR);
for(;;);
}
|
prusa3d/Prusa-Firmware-Buddy
|
C++
|
Other
| 1,019
|
/* SPI0 interrupt handler. Clear the SPI interrupt flag and execute the callback function. */
|
void SPI0IntHandler(void)
|
/* SPI0 interrupt handler. Clear the SPI interrupt flag and execute the callback function. */
void SPI0IntHandler(void)
|
{
unsigned long ulFIFOFlags, ulFlags;
unsigned long ulBase = SPI0_BASE;
ulFIFOFlags = xHWREG(ulBase + SPI_FSR);
ulFlags = xHWREG(ulBase + SPI_SR);
xHWREG(ulBase + SPI_FSR) &= ~ulFIFOFlags;
xHWREG(ulBase + SPI_SR) |= 0x78;
if(g_pfnSPIHandlerCallbacks[0])
{
g_pfnSPIHandlerCallbacks[0](0, 0, (ulFIFOFlags << 16) | ulFlags, 0);
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* ZSTD_getDictID_fromFrame() : Provides the dictID required to decompressed the frame stored within */
|
unsigned ZSTD_getDictID_fromFrame(const void *src, size_t srcSize)
|
/* ZSTD_getDictID_fromFrame() : Provides the dictID required to decompressed the frame stored within */
unsigned ZSTD_getDictID_fromFrame(const void *src, size_t srcSize)
|
{
ZSTD_frameParams zfp = {0, 0, 0, 0};
size_t const hError = ZSTD_getFrameParams(&zfp, src, srcSize);
if (ZSTD_isError(hError))
return 0;
return zfp.dictID;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Gets the GPIO instance according to the GPIO base. */
|
static uint32_t GPIO_GetInstance(GPIO_Type *base)
|
/* Gets the GPIO instance according to the GPIO base. */
static uint32_t GPIO_GetInstance(GPIO_Type *base)
|
{
uint32_t instance;
for (instance = 0U; instance < ARRAY_SIZE(s_gpioBases); instance++)
{
if (s_gpioBases[instance] == base)
{
break;
}
}
assert(instance < ARRAY_SIZE(s_gpioBases));
return instance;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* To add new items to the list, use _kqueue_thread_push_fd(). */
|
static void _kqueue_thread_collect_fds(kevents *events)
|
/* To add new items to the list, use _kqueue_thread_push_fd(). */
static void _kqueue_thread_collect_fds(kevents *events)
|
{
g_assert (events != NULL);
gint length = 0;
G_LOCK (pick_up_lock);
if ((length = g_queue_get_length (&pick_up_fds_queue)) != 0)
{
gpointer fdp = NULL;
kevents_extend_sz (events, length);
while ((fdp = g_queue_pop_head (&pick_up_fds_queue)) != NULL)
{
struct kevent *pevent = &events->memory[events->kq_size++];
EV_SET (pevent,
GPOINTER_TO_INT (fdp),
EVFILT_VNODE,
EV_ADD | EV_ENABLE | EV_ONESHOT,
KQUEUE_VNODE_FLAGS,
0,
0);
}
}
G_UNLOCK (pick_up_lock);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
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