docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* This request is used to configure device Ethernet packet filter settings. */
|
EFI_STATUS EFIAPI SetUsbEthPacketFilter(IN EDKII_USB_ETHERNET_PROTOCOL *This, IN UINT16 Value)
|
/* This request is used to configure device Ethernet packet filter settings. */
EFI_STATUS EFIAPI SetUsbEthPacketFilter(IN EDKII_USB_ETHERNET_PROTOCOL *This, IN UINT16 Value)
|
{
EFI_USB_DEVICE_REQUEST Request;
UINT32 TransStatus;
USB_ETHERNET_DRIVER *UsbEthDriver;
UINT16 CommandFilter;
UsbEthDriver = USB_ETHERNET_DEV_FROM_THIS (This);
CommandFilter = 0;
ConvertFilter (Value, &CommandFilter);
Request.RequestType = USB_ETHERNET_SET_REQ_TYPE;
Request.Request = SET_ETH_PACKET_FILTER_REQ;
Request.Value = CommandFilter;
Request.Index = UsbEthDriver->NumOfInterface;
Request.Length = USB_ETH_PACKET_FILTER_LENGTH;
return UsbEthDriver->UsbIo->UsbControlTransfer (
UsbEthDriver->UsbIo,
&Request,
EfiUsbNoData,
USB_ETHERNET_TRANSFER_TIMEOUT,
NULL,
USB_ETH_PACKET_FILTER_LENGTH,
&TransStatus
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Description: Adds a new NetLabel static label to be used when protocol provided labels are not present on incoming traffic. If @dev_name is NULL then the default interface will be used. Returns zero on success, negative values on failure. */
|
int netlbl_cfg_unlbl_static_add(struct net *net, const char *dev_name, const void *addr, const void *mask, u16 family, u32 secid, struct netlbl_audit *audit_info)
|
/* Description: Adds a new NetLabel static label to be used when protocol provided labels are not present on incoming traffic. If @dev_name is NULL then the default interface will be used. Returns zero on success, negative values on failure. */
int netlbl_cfg_unlbl_static_add(struct net *net, const char *dev_name, const void *addr, const void *mask, u16 family, u32 secid, struct netlbl_audit *audit_info)
|
{
u32 addr_len;
switch (family) {
case AF_INET:
addr_len = sizeof(struct in_addr);
break;
case AF_INET6:
addr_len = sizeof(struct in6_addr);
break;
default:
return -EPFNOSUPPORT;
}
return netlbl_unlhsh_add(net,
dev_name, addr, mask, addr_len,
secid, audit_info);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This routine is called when the user clicks the X at the top right end in the "Decode As:Show..." dialog window. This routine simply calls the ok routine as if the user had clicked the ok button. */
|
static gboolean decode_show_delete_cb(GtkWidget *win _U_, GdkEvent *event _U_, gpointer user_data _U_)
|
/* This routine is called when the user clicks the X at the top right end in the "Decode As:Show..." dialog window. This routine simply calls the ok routine as if the user had clicked the ok button. */
static gboolean decode_show_delete_cb(GtkWidget *win _U_, GdkEvent *event _U_, gpointer user_data _U_)
|
{
decode_show_ok_cb(NULL, decode_show_w);
return FALSE;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Manages the Smartcard transport layer: send APDU commands and receives the APDU response. */
|
static void SC_SendData(SC_ADPU_CommandsTypeDef *SCADPU, SC_ADPU_ResponseTypeDef *SC_ResponseStatus)
|
/* Manages the Smartcard transport layer: send APDU commands and receives the APDU response. */
static void SC_SendData(SC_ADPU_CommandsTypeDef *SCADPU, SC_ADPU_ResponseTypeDef *SC_ResponseStatus)
|
{
uint8_t i;
uint8_t SC_Command[5];
uint8_t SC_DATA[LC_MAX];
UNUSED(SCADPU);
for (i = 0U; i < LC_MAX; i++)
{
SC_ResponseStatus->Data[i] = 0U;
SC_DATA[i] = 0U;
}
USBD_CCID_If_fops.Send_Process((uint8_t *)&SC_Command, (uint8_t *)&SC_DATA);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Enables a GPIO pin as a trigger to start a DMA transaction. */
|
void GPIODMATriggerEnable(uint32_t ui32Port, uint8_t ui8Pins)
|
/* Enables a GPIO pin as a trigger to start a DMA transaction. */
void GPIODMATriggerEnable(uint32_t ui32Port, uint8_t ui8Pins)
|
{
ASSERT(_GPIOBaseValid(ui32Port));
HWREGB(ui32Port + GPIO_O_DMACTL) |= ui8Pins;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Returns the bit number to set in the MAC hash filter corresponding to a given MAC address. */
|
uint32_t EMACHashFilterBitCalculate(uint8_t *pui8MACAddr)
|
/* Returns the bit number to set in the MAC hash filter corresponding to a given MAC address. */
uint32_t EMACHashFilterBitCalculate(uint8_t *pui8MACAddr)
|
{
uint32_t ui32CRC, ui32Mask, ui32Loop;
ASSERT(pui8MACAddr);
ui32CRC = Crc32(0xFFFFFFFF, pui8MACAddr, 6);
ui32CRC ^= 0xFFFFFFFF;
ui32Mask = 0;
for (ui32Loop = 0; ui32Loop < 6; ui32Loop++)
{
ui32Mask <<= 1;
ui32Mask |= (ui32CRC & 1);
ui32CRC >>= 1;
}
return (ui32Mask);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* it's best to have buff aligned on a 32-bit boundary */
|
__wsum csum_partial(const void *buff, int len, __wsum sum)
|
/* it's best to have buff aligned on a 32-bit boundary */
__wsum csum_partial(const void *buff, int len, __wsum sum)
|
{
u64 result = do_csum(buff, len);
result += (__force u32)sum;
result = (result & 0xffffffff) + (result >> 32);
return (__force __wsum)result;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This function writes a char in the LCD RAM. */
|
void LCD_GLASS_DisplayString(uint8_t *ptr)
|
/* This function writes a char in the LCD RAM. */
void LCD_GLASS_DisplayString(uint8_t *ptr)
|
{
uint8_t i = 0x00;
while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET)
{
}
while ((*ptr != 0) & (i < 8))
{
LCD_GLASS_WriteChar(ptr, POINT_OFF, DOUBLEPOINT_OFF, i);
ptr++;
i++;
}
LCD_UpdateDisplayRequest();
}
|
avem-labs/Avem
|
C++
|
MIT License
| 1,752
|
/* This function updates the value of the selected variable, using the partner administrative parameter values. The administrative values are compared with the corresponding operational parameter values for the partner. If one or more of the comparisons shows that the administrative value(s) differ from the current operational values, then Selected is set to FALSE and actor_oper_port_state.synchronization is set to OUT_OF_SYNC. Otherwise, Selected remains unchanged. */
|
static void __update_default_selected(struct port *port)
|
/* This function updates the value of the selected variable, using the partner administrative parameter values. The administrative values are compared with the corresponding operational parameter values for the partner. If one or more of the comparisons shows that the administrative value(s) differ from the current operational values, then Selected is set to FALSE and actor_oper_port_state.synchronization is set to OUT_OF_SYNC. Otherwise, Selected remains unchanged. */
static void __update_default_selected(struct port *port)
|
{
if (port) {
const struct port_params *admin = &port->partner_admin;
const struct port_params *oper = &port->partner_oper;
if (admin->port_number != oper->port_number ||
admin->port_priority != oper->port_priority ||
MAC_ADDRESS_COMPARE(&admin->system, &oper->system) ||
admin->system_priority != oper->system_priority ||
admin->key != oper->key ||
(admin->port_state & AD_STATE_AGGREGATION)
!= (oper->port_state & AD_STATE_AGGREGATION)) {
port->sm_vars &= ~AD_PORT_SELECTED;
}
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* At the moment, since we have no VSYNC interrupt support, we simply set the palette entry directly. */
|
static void s3c_fb_update_palette(struct s3c_fb *sfb, struct s3c_fb_win *win, unsigned int reg, u32 value)
|
/* At the moment, since we have no VSYNC interrupt support, we simply set the palette entry directly. */
static void s3c_fb_update_palette(struct s3c_fb *sfb, struct s3c_fb_win *win, unsigned int reg, u32 value)
|
{
void __iomem *palreg;
u32 palcon;
palreg = sfb->regs + s3c_fb_pal_reg(win->index, reg);
dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
__func__, win->index, reg, palreg, value);
win->palette_buffer[reg] = value;
palcon = readl(sfb->regs + WPALCON);
writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
if (s3c_fb_pal_is16(win->index))
writew(value, palreg);
else
writel(value, palreg);
writel(palcon, sfb->regs + WPALCON);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Releases ownership of an inbound doorbell resource and removes callback from the doorbell event list. Returns 0 if the request has been satisfied. */
|
int rio_release_inb_dbell(struct rio_mport *mport, u16 start, u16 end)
|
/* Releases ownership of an inbound doorbell resource and removes callback from the doorbell event list. Returns 0 if the request has been satisfied. */
int rio_release_inb_dbell(struct rio_mport *mport, u16 start, u16 end)
|
{
int rc = 0, found = 0;
struct rio_dbell *dbell;
list_for_each_entry(dbell, &mport->dbells, node) {
if ((dbell->res->start == start) && (dbell->res->end == end)) {
found = 1;
break;
}
}
if (!found) {
rc = -EINVAL;
goto out;
}
list_del(&dbell->node);
rc = release_resource(dbell->res);
kfree(dbell);
out:
return rc;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Compute the hash value for two given address/port pairs if the match is to be exact. */
|
static guint conversation_hash_exact(gconstpointer v)
|
/* Compute the hash value for two given address/port pairs if the match is to be exact. */
static guint conversation_hash_exact(gconstpointer v)
|
{
const conversation_key *key = (const conversation_key *)v;
guint hash_val;
address tmp_addr;
hash_val = 0;
tmp_addr.len = 4;
hash_val = add_address_to_hash(hash_val, &key->addr1);
tmp_addr.data = &key->port1;
hash_val = add_address_to_hash(hash_val, &tmp_addr);
hash_val = add_address_to_hash(hash_val, &key->addr2);
tmp_addr.data = &key->port2;
hash_val = add_address_to_hash(hash_val, &tmp_addr);
hash_val += ( hash_val << 3 );
hash_val ^= ( hash_val >> 11 );
hash_val += ( hash_val << 15 );
return hash_val;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Checks if "bank1" and "bank2" are on the same chip. Returns 1 if they are and 0 otherwise. */
|
static unsigned char same_chip_banks(int bank1, int bank2)
|
/* Checks if "bank1" and "bank2" are on the same chip. Returns 1 if they are and 0 otherwise. */
static unsigned char same_chip_banks(int bank1, int bank2)
|
{
unsigned char same_chip[CONFIG_SYS_MAX_FLASH_BANKS][CONFIG_SYS_MAX_FLASH_BANKS] = {
{1, 1, 0, 0},
{1, 1, 0, 0},
{0, 0, 1, 1},
{0, 0, 1, 1}
};
return same_chip[bank1][bank2];
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore for some devices, or 0 if it does not. */
|
bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
|
/* Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore for some devices, or 0 if it does not. */
bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
|
{
return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Returns the copied size if successful, or a negative error code on failure. */
|
int snd_rawmidi_transmit(struct snd_rawmidi_substream *substream, unsigned char *buffer, int count)
|
/* Returns the copied size if successful, or a negative error code on failure. */
int snd_rawmidi_transmit(struct snd_rawmidi_substream *substream, unsigned char *buffer, int count)
|
{
if (!substream->opened)
return -EBADFD;
count = snd_rawmidi_transmit_peek(substream, buffer, count);
if (count < 0)
return count;
return snd_rawmidi_transmit_ack(substream, count);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Controls the state of the I2C Master module. */
|
void I2CMasterControl(unsigned long ulBase, unsigned long ulCmd)
|
/* Controls the state of the I2C Master module. */
void I2CMasterControl(unsigned long ulBase, unsigned long ulCmd)
|
{
ASSERT(I2CMasterBaseValid(ulBase));
ASSERT((ulCmd == I2C_MASTER_CMD_SINGLE_SEND) ||
(ulCmd == I2C_MASTER_CMD_SINGLE_RECEIVE) ||
(ulCmd == I2C_MASTER_CMD_BURST_SEND_START) ||
(ulCmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||
(ulCmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||
(ulCmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||
(ulCmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||
(ulCmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||
(ulCmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||
(ulCmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP));
HWREG(ulBase + I2C_O_MCS) = ulCmd;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Entry point of the DHCP driver to install various protocols. */
|
EFI_STATUS EFIAPI Dhcp4DriverEntryPoint(IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable)
|
/* Entry point of the DHCP driver to install various protocols. */
EFI_STATUS EFIAPI Dhcp4DriverEntryPoint(IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable)
|
{
return EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
SystemTable,
&gDhcp4DriverBinding,
ImageHandle,
&gDhcp4ComponentName,
&gDhcp4ComponentName2
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* See _g_freedesktop_dbus_call_list_names_sync() for the synchronous, blocking version of this method. */
|
void _g_freedesktop_dbus_call_list_names(_GFreedesktopDBus *proxy, GCancellable *cancellable, GAsyncReadyCallback callback, gpointer user_data)
|
/* See _g_freedesktop_dbus_call_list_names_sync() for the synchronous, blocking version of this method. */
void _g_freedesktop_dbus_call_list_names(_GFreedesktopDBus *proxy, GCancellable *cancellable, GAsyncReadyCallback callback, gpointer user_data)
|
{
g_dbus_proxy_call (G_DBUS_PROXY (proxy),
"ListNames",
g_variant_new ("()"),
G_DBUS_CALL_FLAGS_NONE,
-1,
cancellable,
callback,
user_data);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* fill in the fpe structure for a core dump... */
|
int dump_fpu(struct pt_regs *regs, struct user_fp *fp)
|
/* fill in the fpe structure for a core dump... */
int dump_fpu(struct pt_regs *regs, struct user_fp *fp)
|
{
struct thread_info *thread = current_thread_info();
int used_math = thread->used_cp[1] | thread->used_cp[2];
if (used_math)
memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
return used_math != 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* ubifs_destroy_size_tree - free resources related to the size tree. */
|
void ubifs_destroy_size_tree(struct ubifs_info *c)
|
/* ubifs_destroy_size_tree - free resources related to the size tree. */
void ubifs_destroy_size_tree(struct ubifs_info *c)
|
{
struct size_entry *e, *n;
rbtree_postorder_for_each_entry_safe(e, n, &c->size_tree, rb) {
if (e->inode)
iput(e->inode);
kfree(e);
}
c->size_tree = RB_ROOT;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* In TDX a serial of TdIoRead8 is invoked to read the I/O port fifo. */
|
VOID EFIAPI TdIoReadFifo8(IN UINTN Port, IN UINTN Count, OUT VOID *Buffer)
|
/* In TDX a serial of TdIoRead8 is invoked to read the I/O port fifo. */
VOID EFIAPI TdIoReadFifo8(IN UINTN Port, IN UINTN Count, OUT VOID *Buffer)
|
{
UINT8 *Buf8;
UINTN Index;
Buf8 = (UINT8 *)Buffer;
for (Index = 0; Index < Count; Index++) {
Buf8[Index] = TdIoRead8 (Port);
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Return with head node of the linked list */
|
void* lv_ll_get_head(const lv_ll_t *ll_p)
|
/* Return with head node of the linked list */
void* lv_ll_get_head(const lv_ll_t *ll_p)
|
{
void * head = NULL;
if(ll_p != NULL) {
head = ll_p->head;
}
return head;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Initialize sysfs entry for each controller. This sets up and registers the 'cciss#' directory for each individual controller under /sys/bus/pci/devices/<dev>/. */
|
static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
|
/* Initialize sysfs entry for each controller. This sets up and registers the 'cciss#' directory for each individual controller under /sys/bus/pci/devices/<dev>/. */
static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
|
{
device_initialize(&h->dev);
h->dev.type = &cciss_host_type;
h->dev.bus = &cciss_bus_type;
dev_set_name(&h->dev, "%s", h->devname);
h->dev.parent = &h->pdev->dev;
return device_add(&h->dev);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* offs: current offset within tvb header_length: length of meta header */
|
static gint32 evaluate_meta_items(guint16 schema, tvbuff_t *tvb, packet_info *pinfo, proto_tree *meta_tree, guint16 offs, gint32 header_length, struct atm_phdr *atm_info)
|
/* offs: current offset within tvb header_length: length of meta header */
static gint32 evaluate_meta_items(guint16 schema, tvbuff_t *tvb, packet_info *pinfo, proto_tree *meta_tree, guint16 offs, gint32 header_length, struct atm_phdr *atm_info)
|
{
gint16 item_len;
gint32 total_len = 0;
while (total_len < header_length) {
switch (schema) {
case META_SCHEMA_DXT:
item_len = evaluate_meta_item_dxt(meta_tree, tvb, pinfo, offs + total_len, atm_info);
break;
case META_SCHEMA_PCAP:
item_len = evaluate_meta_item_pcap(meta_tree, tvb, pinfo, offs + total_len);
break;
default:
item_len = skip_item(meta_tree, tvb, pinfo, offs + total_len);
}
if (item_len < 4) {
expert_add_info_format(pinfo, meta_tree, &ei_meta_malformed,
"Malformed Packet %s (wrong item encoding)", pinfo->current_proto);
return -1;
}
total_len += item_len;
}
return total_len;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Disable the ADC Watchdog monitor.
Disables the comparator to monitor the analog input. */
|
void ADCMoniDisable(unsigned long ulBase, unsigned long ulChanType)
|
/* Disable the ADC Watchdog monitor.
Disables the comparator to monitor the analog input. */
void ADCMoniDisable(unsigned long ulBase, unsigned long ulChanType)
|
{
xASSERT((ulBase == ADC1_BASE) || (ulBase == ADC2_BASE) || (ulBase == ADC3_BASE));
xASSERT((ulChanType == ADC_TYPE_REGULAR) || (ulChanType == ADC_TYPE_INJECTED) ||
(ulChanType == (ADC_TYPE_REGULAR|ADC_TYPE_INJECTED)));
if(ulChanType == ADC_TYPE_REGULAR)
{
xHWREG(ulBase + ADC_CR1) &= ~ADC_TYPE_REGULAR;
}
else if(ulChanType == ADC_TYPE_INJECTED)
{
xHWREG(ulBase + ADC_CR1) &= ~ADC_TYPE_INJECTED;
}
else
{
xHWREG(ulBase + ADC_CR1) &= ~(ADC_TYPE_REGULAR|ADC_TYPE_INJECTED);
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* release_firmware: - release the resource associated with a firmware image @fw: firmware resource to release */
|
void release_firmware(const struct firmware *fw)
|
/* release_firmware: - release the resource associated with a firmware image @fw: firmware resource to release */
void release_firmware(const struct firmware *fw)
|
{
struct builtin_fw *builtin;
if (fw) {
for (builtin = __start_builtin_fw; builtin != __end_builtin_fw;
builtin++) {
if (fw->data == builtin->data)
goto free_fw;
}
vfree(fw->data);
free_fw:
kfree(fw);
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* set the ETM channel value register per duty cycle and modulo for combine mode odd channel no must be provided and even channel value register is not changed.
@输入 pETM 指向三个ETM定时器其中一个的基址 @输入 ETM_Channel 奇通道数：1、3、5 @输入 dutyCycle 设置占空比，若DutyCycle为10,那么占空比就为10% */
|
void ETM_SetDutyCycleCombine(ETM_Type *pETM, uint8_t u8ETM_Channel, uint8_t u8DutyCycle)
|
/* set the ETM channel value register per duty cycle and modulo for combine mode odd channel no must be provided and even channel value register is not changed.
@输入 pETM 指向三个ETM定时器其中一个的基址 @输入 ETM_Channel 奇通道数：1、3、5 @输入 dutyCycle 设置占空比，若DutyCycle为10,那么占空比就为10% */
void ETM_SetDutyCycleCombine(ETM_Type *pETM, uint8_t u8ETM_Channel, uint8_t u8DutyCycle)
|
{
uint16_t cnv = pETM->CONTROLS[u8ETM_Channel-1].CnV;
uint16_t modulo = pETM->MOD;
ASSERT((1 == u8ETM_Channel) || (3 == u8ETM_Channel) || (5 == u8ETM_Channel));
cnv += (u8DutyCycle * (modulo+1)) / 100;
if(cnv > modulo)
{
cnv = modulo - 1;
}
pETM->CONTROLS[u8ETM_Channel].CnV = cnv ;
pETM->PWMLOAD |= ETM_PWMLOAD_LDOK_MASK | (1<<u8ETM_Channel);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* this function will read specified length data from a file descriptor to a buffer. */
|
ssize_t dfs_file_read(struct dfs_file *fd, void *buf, size_t len)
|
/* this function will read specified length data from a file descriptor to a buffer. */
ssize_t dfs_file_read(struct dfs_file *fd, void *buf, size_t len)
|
{
int result = 0;
if (fd == NULL)
{
return -EINVAL;
}
if (fd->vnode->fops->read == NULL)
{
return -ENOSYS;
}
if ((result = fd->vnode->fops->read(fd, buf, len)) < 0)
{
fd->flags |= DFS_F_EOF;
}
return result;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Just loops around incrementing the shared variable until the limit has been reached. Once the limit has been reached it suspends itself. */
|
static void vLimitedIncrementTask(void *pvParameters)
|
/* Just loops around incrementing the shared variable until the limit has been reached. Once the limit has been reached it suspends itself. */
static void vLimitedIncrementTask(void *pvParameters)
|
{
unsigned long *pulCounter;
pulCounter = ( unsigned long * ) pvParameters;
vTaskSuspend( NULL );
for( ;; )
{
( *pulCounter )++; if( *pulCounter >= priMAX_COUNT )
{
vTaskSuspend( NULL );
} }
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* use SLV0 for generic read to slave device */
|
static int lsm6dsl_shub_read_slave_reg(const struct device *dev, uint8_t slv_addr, uint8_t slv_reg, uint8_t *value, uint16_t len)
|
/* use SLV0 for generic read to slave device */
static int lsm6dsl_shub_read_slave_reg(const struct device *dev, uint8_t slv_addr, uint8_t slv_reg, uint8_t *value, uint16_t len)
|
{
struct lsm6dsl_data *data = dev->data;
uint8_t slave[3];
slave[0] = (slv_addr << 1) | LSM6DSL_EMBEDDED_SLVX_READ;
slave[1] = slv_reg;
slave[2] = (len & 0x7);
if (lsm6dsl_shub_write_embedded_regs(dev, LSM6DSL_EMBEDDED_SLV0_ADDR,
slave, 3) < 0) {
LOG_DBG("error writing embedded reg");
return -EIO;
}
lsm6dsl_shub_enable(dev);
lsm6dsl_shub_wait_completed(dev);
data->hw_tf->read_data(dev, LSM6DSL_REG_SENSORHUB1, value, len);
lsm6dsl_shub_disable(dev);
return 0;
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* gfs2_ail2_empty_one - Check whether or not a trans in the AIL has been synced @sdp: the filesystem @ai: the AIL entry */
|
static void gfs2_ail2_empty_one(struct gfs2_sbd *sdp, struct gfs2_ail *ai)
|
/* gfs2_ail2_empty_one - Check whether or not a trans in the AIL has been synced @sdp: the filesystem @ai: the AIL entry */
static void gfs2_ail2_empty_one(struct gfs2_sbd *sdp, struct gfs2_ail *ai)
|
{
struct list_head *head = &ai->ai_ail2_list;
struct gfs2_bufdata *bd;
while (!list_empty(head)) {
bd = list_entry(head->prev, struct gfs2_bufdata,
bd_ail_st_list);
gfs2_assert(sdp, bd->bd_ail == ai);
gfs2_remove_from_ail(bd);
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This file will be overwritten when reconfiguring your Atmel Start project. Please copy examples or other code you want to keep to a separate file to avoid losing it when reconfiguring. Example of using ADC_0 to generate waveform. */
|
void ADC_0_example(void)
|
/* This file will be overwritten when reconfiguring your Atmel Start project. Please copy examples or other code you want to keep to a separate file to avoid losing it when reconfiguring. Example of using ADC_0 to generate waveform. */
void ADC_0_example(void)
|
{
uint8_t buffer_ch10[2];
adc_sync_enable_channel(&ADC_0, CONF_ADC_0_CHANNEL_10);
while (1) {
adc_sync_read_channel(&ADC_0, CONF_ADC_0_CHANNEL_10, buffer_ch10, 2);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* UART Send Data Word with Blocking.
Blocks until the transmit data FIFO can accept the next data word for transmission. */
|
void uart_send_blocking(uint32_t uart, uint16_t data)
|
/* UART Send Data Word with Blocking.
Blocks until the transmit data FIFO can accept the next data word for transmission. */
void uart_send_blocking(uint32_t uart, uint16_t data)
|
{
uart_wait_send_ready(uart);
uart_send(uart, data);
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* If we see that FP is active we assume we have one. Otherwise we have a CRT display. User can override. */
|
static int __devinit is_flatpanel(struct tridentfb_par *par)
|
/* If we see that FP is active we assume we have one. Otherwise we have a CRT display. User can override. */
static int __devinit is_flatpanel(struct tridentfb_par *par)
|
{
if (fp)
return 1;
if (crt || !iscyber(par->chip_id))
return 0;
return (read3CE(par, FPConfig) & 0x10) ? 1 : 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* On detection of any fault during the transfer, processing of the entire message is aborted, and the device is deselected. Until returning from the associated message completion callback, no other spi_message queued to that device will be processed. (This rule applies equally to all the synchronous transfer calls, which are wrappers around this core asynchronous primitive.) */
|
int spi_async(struct spi_device *spi, struct spi_message *message)
|
/* On detection of any fault during the transfer, processing of the entire message is aborted, and the device is deselected. Until returning from the associated message completion callback, no other spi_message queued to that device will be processed. (This rule applies equally to all the synchronous transfer calls, which are wrappers around this core asynchronous primitive.) */
int spi_async(struct spi_device *spi, struct spi_message *message)
|
{
struct spi_master *master = spi->master;
if ((master->flags & SPI_MASTER_HALF_DUPLEX)
|| (spi->mode & SPI_3WIRE)) {
struct spi_transfer *xfer;
unsigned flags = master->flags;
list_for_each_entry(xfer, &message->transfers, transfer_list) {
if (xfer->rx_buf && xfer->tx_buf)
return -EINVAL;
if ((flags & SPI_MASTER_NO_TX) && xfer->tx_buf)
return -EINVAL;
if ((flags & SPI_MASTER_NO_RX) && xfer->rx_buf)
return -EINVAL;
}
}
message->spi = spi;
message->status = -EINPROGRESS;
return master->transfer(spi, message);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Returns either the enabled or raw stimer interrupt status.
The return value will be the logical OR of one or more of the following values: */
|
uint32_t am_hal_stimer_int_status_get(bool bEnabledOnly)
|
/* Returns either the enabled or raw stimer interrupt status.
The return value will be the logical OR of one or more of the following values: */
uint32_t am_hal_stimer_int_status_get(bool bEnabledOnly)
|
{
uint32_t ui32RetVal = AM_REGn(CTIMER, 0, STMINTSTAT);
if ( bEnabledOnly )
{
ui32RetVal &= AM_REGn(CTIMER, 0, STMINTEN);
}
return ui32RetVal;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Configure DAC (DAC instance: DAC1, DAC instance channel: channel1 ) and GPIO used by DAC channel. */
|
void Configure_DAC(void)
|
/* Configure DAC (DAC instance: DAC1, DAC instance channel: channel1 ) and GPIO used by DAC channel. */
void Configure_DAC(void)
|
{
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
NVIC_SetPriority(TIM6_DAC_IRQn, 0);
NVIC_EnableIRQ(TIM6_DAC_IRQn);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1);
LL_DAC_SetTriggerSource(DAC1, LL_DAC_CHANNEL_1, LL_DAC_TRIG_EXT_TIM6_TRGO);
LL_DAC_EnableDMAReq(DAC1, LL_DAC_CHANNEL_1);
LL_DAC_EnableIT_DMAUDR1(DAC1);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Writes the current value of MM4. This function is only available on IA32 and x64. */
|
VOID EFIAPI AsmWriteMm4(IN UINT64 Value)
|
/* Writes the current value of MM4. This function is only available on IA32 and x64. */
VOID EFIAPI AsmWriteMm4(IN UINT64 Value)
|
{
_asm {
movq mm4, qword ptr [Value]
emms
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Stall the Endpoint 0 in case of error. */
|
uint8_t USB_ProcessPost0(void)
|
/* Stall the Endpoint 0 in case of error. */
uint8_t USB_ProcessPost0(void)
|
{
USB_SetEpRxCnt(ENDP0, Device_Property.MaxPacketSize);
if (pInformation->CtrlState == Stalled)
{
vSetEPRxStatus(EP_RX_STALL);
vSetEPTxStatus(EP_TX_STALL);
}
return (pInformation->CtrlState == Pause);
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* There should not be any QPs still in use. Free memory for table. */
|
unsigned ipath_free_all_qps(struct ipath_qp_table *qpt)
|
/* There should not be any QPs still in use. Free memory for table. */
unsigned ipath_free_all_qps(struct ipath_qp_table *qpt)
|
{
unsigned long flags;
struct ipath_qp *qp;
u32 n, qp_inuse = 0;
spin_lock_irqsave(&qpt->lock, flags);
for (n = 0; n < qpt->max; n++) {
qp = qpt->table[n];
qpt->table[n] = NULL;
for (; qp; qp = qp->next)
qp_inuse++;
}
spin_unlock_irqrestore(&qpt->lock, flags);
for (n = 0; n < ARRAY_SIZE(qpt->map); n++)
if (qpt->map[n].page)
free_page((unsigned long) qpt->map[n].page);
return qp_inuse;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Write a data to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Step2)
This function is always used in thread mode. */
|
unsigned long I2CMasterWriteS2(unsigned long ulBase, unsigned char ucData, xtBoolean bEndTransmition)
|
/* Write a data to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Step2)
This function is always used in thread mode. */
unsigned long I2CMasterWriteS2(unsigned long ulBase, unsigned char ucData, xtBoolean bEndTransmition)
|
{
unsigned long ulStatus;
xASSERT((ulBase == I2C0_BASE) || (ulBase == I2C1_BASE));
I2CMasterWriteRequestS2(ulBase, ucData, xfalse);
do
{
ulStatus = I2CStatusGet(ulBase);
if(xHWREG(ulBase + I2C_CSR) & 0x0700)
break;
}
while(!(ulStatus == I2C_MASTER_TX_EMPTY));
if(bEndTransmition)
{
I2CStopSend(ulBase);
}
return (ulStatus & (I2C_CSR_ARBLOS | I2C_CSR_RXNACK));
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Set one bit of the operational register while keeping other bits. */
|
VOID XhcPeiSetOpRegBit(IN PEI_XHC_DEV *Xhc, IN UINT32 Offset, IN UINT32 Bit)
|
/* Set one bit of the operational register while keeping other bits. */
VOID XhcPeiSetOpRegBit(IN PEI_XHC_DEV *Xhc, IN UINT32 Offset, IN UINT32 Bit)
|
{
UINT32 Data;
Data = XhcPeiReadOpReg (Xhc, Offset);
Data |= Bit;
XhcPeiWriteOpReg (Xhc, Offset, Data);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Check whether the number of elapsed performance counter ticks required for a timeout condition has been reached. If Timeout is zero, which means infinity, return value is always FALSE. */
|
BOOLEAN CheckTimeout(IN OUT UINT64 *PreviousTime, IN UINT64 *TotalTime, IN UINT64 Timeout)
|
/* Check whether the number of elapsed performance counter ticks required for a timeout condition has been reached. If Timeout is zero, which means infinity, return value is always FALSE. */
BOOLEAN CheckTimeout(IN OUT UINT64 *PreviousTime, IN UINT64 *TotalTime, IN UINT64 Timeout)
|
{
UINT64 Start;
UINT64 End;
UINT64 CurrentTime;
INT64 Delta;
INT64 Cycle;
if (Timeout == 0) {
return FALSE;
}
GetPerformanceCounterProperties (&Start, &End);
Cycle = End - Start;
if (Cycle < 0) {
Cycle = -Cycle;
}
Cycle++;
CurrentTime = GetPerformanceCounter ();
Delta = (INT64)(CurrentTime - *PreviousTime);
if (Start > End) {
Delta = -Delta;
}
if (Delta < 0) {
Delta += Cycle;
}
*TotalTime += Delta;
*PreviousTime = CurrentTime;
if (*TotalTime > Timeout) {
return TRUE;
}
return FALSE;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Resets the RF Disable configuration.
Needs the I2C Password presentation to be effective. */
|
int32_t BSP_NFCTAG_ResetRFDisable(uint32_t Instance)
|
/* Resets the RF Disable configuration.
Needs the I2C Password presentation to be effective. */
int32_t BSP_NFCTAG_ResetRFDisable(uint32_t Instance)
|
{
UNUSED(Instance);
return ST25DV_ResetRFDisable(&NfcTagObj);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Set size of the ceil bucket of HTB class. */
|
void rtnl_htb_set_cbuffer(struct rtnl_class *class, uint32_t cbuffer)
|
/* Set size of the ceil bucket of HTB class. */
void rtnl_htb_set_cbuffer(struct rtnl_class *class, uint32_t cbuffer)
|
{
struct rtnl_htb_class *d = htb_class(class);
if (d == NULL)
return;
d->ch_cbuffer = cbuffer;
d->ch_mask |= SCH_HTB_HAS_CBUFFER;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Output: void, but we will add to proto tree if !NULL. */
|
void isis_dissect_instance_identifier_clv(proto_tree *tree, packet_info *pinfo, tvbuff_t *tvb, expert_field *expert, int hf_iid, int hf_supported_itid, int offset, int length)
|
/* Output: void, but we will add to proto tree if !NULL. */
void isis_dissect_instance_identifier_clv(proto_tree *tree, packet_info *pinfo, tvbuff_t *tvb, expert_field *expert, int hf_iid, int hf_supported_itid, int offset, int length)
|
{
length--;
if (length<=0) {
proto_tree_add_expert_format(tree, pinfo, expert, tvb, offset, -1,
"short address (no length for payload)");
return;
}
proto_tree_add_item(tree, hf_iid, tvb, offset, 2, ENC_BIG_ENDIAN);
offset += 2;
length -= 2;
while ( length > 0 ) {
proto_tree_add_item(tree, hf_supported_itid, tvb, offset, 2, ENC_BIG_ENDIAN);
offset += 2;
length -= 2;
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* fc_seq_start_next_locked() - Allocate a new sequence on the same exchange as the supplied sequence @sp: */
|
static struct fc_seq* fc_seq_start_next_locked(struct fc_seq *sp)
|
/* fc_seq_start_next_locked() - Allocate a new sequence on the same exchange as the supplied sequence @sp: */
static struct fc_seq* fc_seq_start_next_locked(struct fc_seq *sp)
|
{
struct fc_exch *ep = fc_seq_exch(sp);
sp = fc_seq_alloc(ep, ep->seq_id++);
FC_EXCH_DBG(ep, "f_ctl %6x seq %2x\n",
ep->f_ctl, sp->id);
return sp;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Similar to ARM's NVIC_ClearPendingIRQ clear a pending irq from SW */
|
void posix_sw_clear_pending_IRQ(unsigned int IRQn)
|
/* Similar to ARM's NVIC_ClearPendingIRQ clear a pending irq from SW */
void posix_sw_clear_pending_IRQ(unsigned int IRQn)
|
{
hw_irq_ctrl_clear_irq(IRQn);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Setting up the clock on the MIPS boards. */
|
void __init plat_time_init(void)
|
/* Setting up the clock on the MIPS boards. */
void __init plat_time_init(void)
|
{
mips_hpt_frequency = ar7_cpu_freq() / 2;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* If the current execution mode is not 32-bit protected mode with flat descriptors, then ASSERT(). If EntryPoint is 0, then ASSERT(). If NewStack is 0, then ASSERT(). */
|
VOID EFIAPI AsmEnablePaging64(IN UINT16 Cs, IN UINT64 EntryPoint, IN UINT64 Context1 OPTIONAL, IN UINT64 Context2 OPTIONAL, IN UINT64 NewStack)
|
/* If the current execution mode is not 32-bit protected mode with flat descriptors, then ASSERT(). If EntryPoint is 0, then ASSERT(). If NewStack is 0, then ASSERT(). */
VOID EFIAPI AsmEnablePaging64(IN UINT16 Cs, IN UINT64 EntryPoint, IN UINT64 Context1 OPTIONAL, IN UINT64 Context2 OPTIONAL, IN UINT64 NewStack)
|
{
ASSERT (EntryPoint != 0);
ASSERT (NewStack != 0);
InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The LED timer callback function. This does nothing but switch off the LED defined by the mainTIMER_CONTROLLED_LED constant. */
|
static void vLEDTimerCallback(xTimerHandle xTimer)
|
/* The LED timer callback function. This does nothing but switch off the LED defined by the mainTIMER_CONTROLLED_LED constant. */
static void vLEDTimerCallback(xTimerHandle xTimer)
|
{
FM3_GPIO->PDOR3 |= mainTIMER_CONTROLLED_LED;
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* Return usecs since last timer reload (timercount * (usecs perjiffie)) / (ticks per jiffie) */
|
unsigned long h720x_gettimeoffset(void)
|
/* Return usecs since last timer reload (timercount * (usecs perjiffie)) / (ticks per jiffie) */
unsigned long h720x_gettimeoffset(void)
|
{
return (CPU_REG (TIMER_VIRT, TM0_COUNT) * tick_usec) / LATCH;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* param base PWM peripheral base address param subModule PWM submodule to configure param mask The interrupts to enable. This is a logical OR of members of the enumeration ::pwm_interrupt_enable_t */
|
void PWM_EnableInterrupts(PWM_Type *base, pwm_submodule_t subModule, uint32_t mask)
|
/* param base PWM peripheral base address param subModule PWM submodule to configure param mask The interrupts to enable. This is a logical OR of members of the enumeration ::pwm_interrupt_enable_t */
void PWM_EnableInterrupts(PWM_Type *base, pwm_submodule_t subModule, uint32_t mask)
|
{
base->SM[subModule].INTEN |= ((uint16_t)mask & 0xFFFFU);
base->FCTRL |= ((uint16_t)(mask >> 16U) & PWM_FCTRL_FIE_MASK);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* If the vma has a ->close operation then the driver probably needs to release per-vma resources, so we don't attempt to merge those. */
|
static int is_mergeable_vma(struct vm_area_struct *vma, struct file *file, unsigned long vm_flags)
|
/* If the vma has a ->close operation then the driver probably needs to release per-vma resources, so we don't attempt to merge those. */
static int is_mergeable_vma(struct vm_area_struct *vma, struct file *file, unsigned long vm_flags)
|
{
if ((vma->vm_flags ^ vm_flags) & ~VM_CAN_NONLINEAR)
return 0;
if (vma->vm_file != file)
return 0;
if (vma->vm_ops && vma->vm_ops->close)
return 0;
return 1;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* USB_OTG_BSP_mDelay This function provides delay time in milli sec. */
|
void USB_OTG_BSP_mDelay(const uint32_t msec)
|
/* USB_OTG_BSP_mDelay This function provides delay time in milli sec. */
void USB_OTG_BSP_mDelay(const uint32_t msec)
|
{
USB_OTG_BSP_uDelay(msec * 1000);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* eeh_report_resume - tell device to resume normal operations */
|
static int eeh_report_resume(struct pci_dev *dev, void *userdata)
|
/* eeh_report_resume - tell device to resume normal operations */
static int eeh_report_resume(struct pci_dev *dev, void *userdata)
|
{
struct pci_driver *driver = dev->driver;
dev->error_state = pci_channel_io_normal;
if (!driver)
return 0;
eeh_enable_irq(dev);
if (!driver->err_handler ||
!driver->err_handler->resume)
return 0;
driver->err_handler->resume(dev);
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Returns a pointer to the start of the DMA transmit descriptor list. */
|
tEMACDMADescriptor* EMACTxDMADescriptorListGet(uint32_t ui32Base)
|
/* Returns a pointer to the start of the DMA transmit descriptor list. */
tEMACDMADescriptor* EMACTxDMADescriptorListGet(uint32_t ui32Base)
|
{
return((tEMACDMADescriptor *)HWREG(ui32Base + EMAC_O_TXDLADDR));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
|
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
{
if(huart->Instance==USART1)
{
__HAL_RCC_USART1_CLK_DISABLE();
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Heuristic to guess if this is a string or concatenated strings. */
|
static int is_printable_string(const void *data, int len)
|
/* Heuristic to guess if this is a string or concatenated strings. */
static int is_printable_string(const void *data, int len)
|
{
const char *s = data;
if (len == 0)
return 0;
if (s[len - 1] != '\0')
return 0;
while (((*s == '\0') || isprint(*s)) && (len > 0)) {
if (s[0] == '\0') {
if (len == 1)
return 1;
if (s[1] == '\0')
return 0;
}
s++;
len--;
}
if (*s != '\0' || (len != 0))
return 0;
return 1;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Reads the n-th register's value into an output buffer and sends it as a packet */
|
VOID ReadNthRegister(IN EFI_SYSTEM_CONTEXT SystemContext, IN CHAR8 *InBuffer)
|
/* Reads the n-th register's value into an output buffer and sends it as a packet */
VOID ReadNthRegister(IN EFI_SYSTEM_CONTEXT SystemContext, IN CHAR8 *InBuffer)
|
{
UINTN RegNumber;
CHAR8 OutBuffer[9];
CHAR8 *OutBufPtr;
RegNumber = AsciiStrHexToUintn (&InBuffer[1]);
if (RegNumber >= MaxRegisterCount ()) {
SendError (GDB_EINVALIDREGNUM);
return;
}
OutBufPtr = OutBuffer;
OutBufPtr = BasicReadRegister (SystemContext, RegNumber, OutBufPtr);
*OutBufPtr = '\0';
SendPacket (OutBuffer);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Must be called with target->scsi_host->host_lock held to protect req_lim and tx_head. Lock cannot be dropped between call here and call to __srp_post_send(). */
|
static struct srp_iu* __srp_get_tx_iu(struct srp_target_port *target, enum srp_request_type req_type)
|
/* Must be called with target->scsi_host->host_lock held to protect req_lim and tx_head. Lock cannot be dropped between call here and call to __srp_post_send(). */
static struct srp_iu* __srp_get_tx_iu(struct srp_target_port *target, enum srp_request_type req_type)
|
{
s32 min = (req_type == SRP_REQ_TASK_MGMT) ? 1 : 2;
if (target->tx_head - target->tx_tail >= SRP_SQ_SIZE)
return NULL;
if (target->req_lim < min) {
++target->zero_req_lim;
return NULL;
}
return target->tx_ring[target->tx_head & SRP_SQ_SIZE];
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Since ext2_try_to_allocate() will always allocate blocks within the reservation window range, if the window size is too small, multiple blocks allocation has to stop at the end of the reservation window. To make this more efficient, given the total number of blocks needed and the current size of the window, we try to expand the reservation window size if necessary on a best-effort basis before ext2_new_blocks() tries to allocate blocks. */
|
static void try_to_extend_reservation(struct ext2_reserve_window_node *my_rsv, struct super_block *sb, int size)
|
/* Since ext2_try_to_allocate() will always allocate blocks within the reservation window range, if the window size is too small, multiple blocks allocation has to stop at the end of the reservation window. To make this more efficient, given the total number of blocks needed and the current size of the window, we try to expand the reservation window size if necessary on a best-effort basis before ext2_new_blocks() tries to allocate blocks. */
static void try_to_extend_reservation(struct ext2_reserve_window_node *my_rsv, struct super_block *sb, int size)
|
{
struct ext2_reserve_window_node *next_rsv;
struct rb_node *next;
spinlock_t *rsv_lock = &EXT2_SB(sb)->s_rsv_window_lock;
if (!spin_trylock(rsv_lock))
return;
next = rb_next(&my_rsv->rsv_node);
if (!next)
my_rsv->rsv_end += size;
else {
next_rsv = rb_entry(next, struct ext2_reserve_window_node, rsv_node);
if ((next_rsv->rsv_start - my_rsv->rsv_end - 1) >= size)
my_rsv->rsv_end += size;
else
my_rsv->rsv_end = next_rsv->rsv_start - 1;
}
spin_unlock(rsv_lock);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Populates the Hash High register with the data supplied. This function is called when the Hash filtering is to be enabled. */
|
void synopGMAC_write_hash_table_high(synopGMACdevice *gmacdev, u32 data)
|
/* Populates the Hash High register with the data supplied. This function is called when the Hash filtering is to be enabled. */
void synopGMAC_write_hash_table_high(synopGMACdevice *gmacdev, u32 data)
|
{
synopGMACWriteReg(gmacdev->MacBase, GmacHashHigh, data);
return;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* passthrough sense and io sense are at the same offset */
|
static int megasas_build_sense(MegasasCmd *cmd, uint8_t *sense_ptr, uint8_t sense_len)
|
/* passthrough sense and io sense are at the same offset */
static int megasas_build_sense(MegasasCmd *cmd, uint8_t *sense_ptr, uint8_t sense_len)
|
{
uint32_t pa_hi = 0, pa_lo;
hwaddr pa;
if (sense_len > cmd->frame->header.sense_len) {
sense_len = cmd->frame->header.sense_len;
}
if (sense_len) {
pa_lo = le32_to_cpu(cmd->frame->pass.sense_addr_lo);
if (megasas_frame_is_sense64(cmd)) {
pa_hi = le32_to_cpu(cmd->frame->pass.sense_addr_hi);
}
pa = ((uint64_t) pa_hi << 32) | pa_lo;
cpu_physical_memory_write(pa, sense_ptr, sense_len);
cmd->frame->header.sense_len = sense_len;
}
return sense_len;
}
|
ve3wwg/teensy3_qemu
|
C++
|
Other
| 15
|
/* Converts a generic hardware text device path node to Hardware device path structure. */
|
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextHardwarePath(CHAR16 *TextDeviceNode)
|
/* Converts a generic hardware text device path node to Hardware device path structure. */
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextHardwarePath(CHAR16 *TextDeviceNode)
|
{
return DevPathFromTextGenericPath (HARDWARE_DEVICE_PATH, TextDeviceNode);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Reads and returns the current value of MM2. This function is only available on IA-32 and X64. */
|
UINT64 EFIAPI AsmReadMm2(VOID)
|
/* Reads and returns the current value of MM2. This function is only available on IA-32 and X64. */
UINT64 EFIAPI AsmReadMm2(VOID)
|
{
UINT64 Data;
__asm__ __volatile__ (
"push %%eax \n\t"
"push %%eax \n\t"
"movq %%mm2, (%%esp)\n\t"
"pop %%eax \n\t"
"pop %%edx \n\t"
: "=A" (Data)
);
return Data;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Return logical sector number of a given Short Allocation Descriptor. */
|
UINT64 GetShortAdLsn(IN UDF_VOLUME_INFO *Volume, IN UDF_PARTITION_DESCRIPTOR *PartitionDesc, IN UDF_SHORT_ALLOCATION_DESCRIPTOR *ShortAd)
|
/* Return logical sector number of a given Short Allocation Descriptor. */
UINT64 GetShortAdLsn(IN UDF_VOLUME_INFO *Volume, IN UDF_PARTITION_DESCRIPTOR *PartitionDesc, IN UDF_SHORT_ALLOCATION_DESCRIPTOR *ShortAd)
|
{
return (UINT64)PartitionDesc->PartitionStartingLocation -
Volume->MainVdsStartLocation + ShortAd->ExtentPosition;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* RETURN VALUE: zero if succeed, negative if error */
|
int snd_seq_kernel_client_enqueue_blocking(int client, struct snd_seq_event *ev, struct file *file, int atomic, int hop)
|
/* RETURN VALUE: zero if succeed, negative if error */
int snd_seq_kernel_client_enqueue_blocking(int client, struct snd_seq_event *ev, struct file *file, int atomic, int hop)
|
{
return kernel_client_enqueue(client, ev, file, 1, atomic, hop);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* USBD_CtlContinueRx continue receive data on the ctl pipe. */
|
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len)
|
/* USBD_CtlContinueRx continue receive data on the ctl pipe. */
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len)
|
{
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
return USBD_OK;
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* The following are the status flags for device mode: */
|
uint32_t USBEndpointStatus(uint32_t ui32Base, uint32_t ui32Endpoint)
|
/* The following are the status flags for device mode: */
uint32_t USBEndpointStatus(uint32_t ui32Base, uint32_t ui32Endpoint)
|
{
uint32_t ui32Status;
ASSERT(ui32Base == USB0_BASE);
ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
(ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
(ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
(ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
ui32Status = HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_TXCSRL1);
ui32Status |=
(((uint32_t)HWREGH(ui32Base + EP_OFFSET(ui32Endpoint) + USB_O_RXCSRL1)) <<
USB_RX_EPSTATUS_SHIFT);
return(ui32Status);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Enable LIN Function mode on the specified UART. */
|
void UARTEnableLIN(unsigned long ulBase)
|
/* Enable LIN Function mode on the specified UART. */
void UARTEnableLIN(unsigned long ulBase)
|
{
xASSERT(UARTBaseValid(ulBase));
xHWREG(ulBase + UART_FUN_SEL) |= (UART_FUN_SEL_LIN_EN);
xHWREG(ulBase + UART_FUN_SEL) &= ~(UART_FUN_SEL_IRDA_EN);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* We tell the Host the segment we want to use (__KERNEL_DS is the kernel data segment), the privilege level (we're privilege level 1, the Host is 0 and will not tolerate us trying to use that), the stack pointer, and the number of pages in the stack. */
|
static void lguest_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
|
/* We tell the Host the segment we want to use (__KERNEL_DS is the kernel data segment), the privilege level (we're privilege level 1, the Host is 0 and will not tolerate us trying to use that), the stack pointer, and the number of pages in the stack. */
static void lguest_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
|
{
lazy_hcall3(LHCALL_SET_STACK, __KERNEL_DS | 0x1, thread->sp0,
THREAD_SIZE / PAGE_SIZE);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* unlink the module with the whole machine is stopped with interrupts off */
|
static int __unlink_module(void *_mod)
|
/* unlink the module with the whole machine is stopped with interrupts off */
static int __unlink_module(void *_mod)
|
{
struct module *mod = _mod;
list_del(&mod->list);
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Rewrites 'm' to 'm' && MODULES, so that it evaluates to 'n' when running without modules */
|
static struct expr* rewrite_m(struct expr *e)
|
/* Rewrites 'm' to 'm' && MODULES, so that it evaluates to 'n' when running without modules */
static struct expr* rewrite_m(struct expr *e)
|
{
if (!e)
return e;
switch (e->type) {
case E_NOT:
e->left.expr = rewrite_m(e->left.expr);
break;
case E_OR:
case E_AND:
e->left.expr = rewrite_m(e->left.expr);
e->right.expr = rewrite_m(e->right.expr);
break;
case E_SYMBOL:
if (e->left.sym == &symbol_mod)
return expr_alloc_and(e, expr_alloc_symbol(modules_sym));
break;
default:
break;
}
return e;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Measures the analog voltage or thermistor temperature from the Si7013 sensor */
|
sl_status_t sl_si7013_measure_analog_voltage(sl_i2cspm_t *i2cspm, uint8_t addr, int32_t *vData)
|
/* Measures the analog voltage or thermistor temperature from the Si7013 sensor */
sl_status_t sl_si7013_measure_analog_voltage(sl_i2cspm_t *i2cspm, uint8_t addr, int32_t *vData)
|
{
sl_status_t retval;
uint8_t device_id;
sl_si70xx_present(i2cspm, addr, &device_id);
if (device_id != SI7013_DEVICE_ID) {
return SL_STATUS_FAIL;
}
sl_si70xx_write_user_register_2(i2cspm, addr, 0x0e);
retval = sl_si70xx_send_command(i2cspm, addr, (uint32_t *) vData, SI7013_READ_VIN);
if (retval != SL_STATUS_OK) {
return retval;
}
sl_si70xx_write_user_register_2(i2cspm, addr, 0x09);
return retval;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Get the current core clock frequency.
Calculate and get the current core clock frequency based on the current configuration. Assuming that the SystemCoreClock global variable is maintained, the core clock frequency is stored in that variable as well. This function will however calculate the core clock based on actual HW configuration. It will also update the SystemCoreClock global variable. */
|
uint32_t SystemCoreClockGet(void)
|
/* Get the current core clock frequency.
Calculate and get the current core clock frequency based on the current configuration. Assuming that the SystemCoreClock global variable is maintained, the core clock frequency is stored in that variable as well. This function will however calculate the core clock based on actual HW configuration. It will also update the SystemCoreClock global variable. */
uint32_t SystemCoreClockGet(void)
|
{
uint32_t ret;
uint32_t presc;
ret = SystemHFClockGet();
presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK)
>> _CMU_HFCOREPRESC_PRESC_SHIFT;
ret /= presc + 1U;
SystemCoreClock = ret;
return ret;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Decodes the result of scsi WRITE 10 command. */
|
static void uhi_msc_scsi_write_10_done(bool b_cbw_succes)
|
/* Decodes the result of scsi WRITE 10 command. */
static void uhi_msc_scsi_write_10_done(bool b_cbw_succes)
|
{
if ((!b_cbw_succes) || (uhi_msc_csw.bCSWStatus != USB_CSW_STATUS_PASS)
|| uhi_msc_csw.dCSWDataResidue) {
uhi_msc_lun_sel->status = LUN_FAIL;
uhi_msc_scsi_callback(false);
return;
}
uhi_msc_scsi_callback(true);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Disable a module clock derived from the PBA clock. */
|
void sysclk_disable_pba_module(uint32_t module_index)
|
/* Disable a module clock derived from the PBA clock. */
void sysclk_disable_pba_module(uint32_t module_index)
|
{
irqflags_t flags;
sysclk_priv_disable_module(PM_CLK_GRP_PBA, module_index);
flags = cpu_irq_save();
if (PM->PM_PBAMASK == 0) {
sysclk_disable_hsb_module(SYSCLK_PBA_BRIDGE);
}
cpu_irq_restore(flags);
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Unlinks the specified driver from the internal USB driver list. */
|
void usb_deregister_device_driver(struct usb_device_driver *udriver)
|
/* Unlinks the specified driver from the internal USB driver list. */
void usb_deregister_device_driver(struct usb_device_driver *udriver)
|
{
pr_info("%s: deregistering device driver %s\n",
usbcore_name, udriver->name);
driver_unregister(&udriver->drvwrap.driver);
usbfs_update_special();
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Enables or disables the specified I2C dual addressing mode. */
|
void I2C_DualAddressCmd(I2C_TypeDef *i2c, FunctionalState state)
|
/* Enables or disables the specified I2C dual addressing mode. */
void I2C_DualAddressCmd(I2C_TypeDef *i2c, FunctionalState state)
|
{
(state) ? (i2c->IC_TAR |= IC_TAR_ENDUAL_Set) : (i2c->IC_TAR &= IC_TAR_ENDUAL_Reset);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Tell the application it should update its timers, if it subscribes to the update timer callback. */
|
static int update_timer(struct Curl_multi *multi)
|
/* Tell the application it should update its timers, if it subscribes to the update timer callback. */
static int update_timer(struct Curl_multi *multi)
|
{
long timeout_ms;
if(!multi->timer_cb)
return 0;
if(multi_timeout(multi, &timeout_ms)) {
return -1;
}
if(timeout_ms < 0) {
static const struct curltime none = {0, 0};
if(Curl_splaycomparekeys(none, multi->timer_lastcall)) {
multi->timer_lastcall = none;
return multi->timer_cb(multi, -1, multi->timer_userp);
}
return 0;
}
if(Curl_splaycomparekeys(multi->timetree->key, multi->timer_lastcall) == 0)
return 0;
multi->timer_lastcall = multi->timetree->key;
return multi->timer_cb(multi, timeout_ms, multi->timer_userp);
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Sets the specified data holding register value for dual channel DAC. */
|
void DAC_ConfigDualChannelData(DAC_DATA_ALIGN_T dataAlign, uint16_t data2, uint16_t data1)
|
/* Sets the specified data holding register value for dual channel DAC. */
void DAC_ConfigDualChannelData(DAC_DATA_ALIGN_T dataAlign, uint16_t data2, uint16_t data1)
|
{
uint32_t data = 0, tmp = 0;
if (dataAlign == DAC_ALIGN_8B_R)
{
data = ((uint32_t)data2 << 8) | data1;
}
else
{
data = ((uint32_t)data2 << 16) | data1;
}
tmp = (uint32_t)DAC_BASE;
tmp += DH12RD_OFFSET + dataAlign;
*(__IO uint32_t *)tmp = data;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* @field: an initialized field @value: a string of values (i.e. "10b234a") */
|
int eeprom_field_update_bin(struct eeprom_field *field, char *value)
|
/* @field: an initialized field @value: a string of values (i.e. "10b234a") */
int eeprom_field_update_bin(struct eeprom_field *field, char *value)
|
{
return __eeprom_field_update_bin(field, value, false);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Allocate an IPC message from the statically-allocated array. */
|
static rt_ipc_msg_t _ipc_msg_alloc(void)
|
/* Allocate an IPC message from the statically-allocated array. */
static rt_ipc_msg_t _ipc_msg_alloc(void)
|
{
rt_ipc_msg_t p = (rt_ipc_msg_t)RT_NULL;
rt_base_t level;
level = rt_spin_lock_irqsave(&_msg_list_lock);
if (_ipc_msg_free_list)
{
p = _ipc_msg_free_list;
_ipc_msg_free_list = (rt_ipc_msg_t)p->msg.sender;
}
else if (rt_ipc_msg_used < RT_CH_MSG_MAX_NR)
{
p = &ipc_msg_pool[rt_ipc_msg_used];
rt_ipc_msg_used++;
}
rt_spin_unlock_irqrestore(&_msg_list_lock, level);
return p;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Assume the winbond 82c105 is the IDE controller on a p610/p615/p630. We should probably be more careful in case someone tries to plug in a similar adapter. */
|
static void fixup_winbond_82c105(struct pci_dev *dev)
|
/* Assume the winbond 82c105 is the IDE controller on a p610/p615/p630. We should probably be more careful in case someone tries to plug in a similar adapter. */
static void fixup_winbond_82c105(struct pci_dev *dev)
|
{
int i;
unsigned int reg;
if (!machine_is(pseries))
return;
printk("Using INTC for W82c105 IDE controller.\n");
pci_read_config_dword(dev, 0x40, ®);
pci_write_config_dword(dev, 0x40, reg | (1<<11));
for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
if (dev->resource[i].flags & IORESOURCE_IO
&& dev->bus->number == 0 && dev->devfn == 0x81)
dev->resource[i].flags &= ~IORESOURCE_IO;
if (dev->resource[i].start == 0 && dev->resource[i].end) {
dev->resource[i].flags = 0;
dev->resource[i].end = 0;
}
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Update the record referred to by cur to the value given. This either works (return 0) or gets an EFSCORRUPTED error. */
|
STATIC int xfs_inobt_update(struct xfs_btree_cur *cur, xfs_inobt_rec_incore_t *irec)
|
/* Update the record referred to by cur to the value given. This either works (return 0) or gets an EFSCORRUPTED error. */
STATIC int xfs_inobt_update(struct xfs_btree_cur *cur, xfs_inobt_rec_incore_t *irec)
|
{
union xfs_btree_rec rec;
rec.inobt.ir_startino = cpu_to_be32(irec->ir_startino);
rec.inobt.ir_freecount = cpu_to_be32(irec->ir_freecount);
rec.inobt.ir_free = cpu_to_be64(irec->ir_free);
return xfs_btree_update(cur, &rec);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Deinitializes ADC1 peripheral registers to their default reset values. */
|
void ADC_DeInit(ADC_TypeDef *ADCx)
|
/* Deinitializes ADC1 peripheral registers to their default reset values. */
void ADC_DeInit(ADC_TypeDef *ADCx)
|
{
assert_param(IS_ADC_ALL_PERIPH(ADCx));
if(ADCx == ADC1)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
}
}
|
avem-labs/Avem
|
C++
|
MIT License
| 1,752
|
/* Mainly used after a return to the D0 (full-power) state from a lower state. */
|
void et131x_tx_dma_enable(struct et131x_adapter *etdev)
|
/* Mainly used after a return to the D0 (full-power) state from a lower state. */
void et131x_tx_dma_enable(struct et131x_adapter *etdev)
|
{
writel(ET_TXDMA_SNGL_EPKT|(PARM_DMA_CACHE_DEF << ET_TXDMA_CACHE_SHIFT),
&etdev->regs->txdma.csr);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Reset the timer by placing the timer back into it's default reset configuration. */
|
void TimerReset(void)
|
/* Reset the timer by placing the timer back into it's default reset configuration. */
void TimerReset(void)
|
{
TIMER->tie = 0;
TIMER->tscr1 = 0;
TIMER->tscr2 = 0;
TIMER->tios = 0;
TIMER->ttov = 0;
TIMER->tctl1 = 0;
TIMER->tctl2 = 0;
TIMER->tctl3 = 0;
TIMER->tctl4 = 0;
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues @adapter: board private structure */
|
static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
|
/* ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues @adapter: board private structure */
static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
|
{
int i;
for (i = 0; i < adapter->num_rx_queues; i++)
ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Convert wake-up controller (WUC) group to the corresponding wake-up edge mode register (WUEMR). Return pointer to the register. */
|
static volatile uint8_t* wuemr(uint8_t grp)
|
/* Convert wake-up controller (WUC) group to the corresponding wake-up edge mode register (WUEMR). Return pointer to the register. */
static volatile uint8_t* wuemr(uint8_t grp)
|
{
return (grp <= 4) ?
(volatile uint8_t *)(IT8XXX2_WUC_WUEMR1 + grp-1) :
(volatile uint8_t *)(IT8XXX2_WUC_WUEMR5 + 4*(grp-5));
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* This function will do USB_REQ_GET_DESCRIPTOR request for the device instance to get usb hub descriptor. */
|
rt_err_t rt_usb_hub_get_descriptor(uinst_t uinst, rt_uint8_t *buffer, rt_size_t nbytes)
|
/* This function will do USB_REQ_GET_DESCRIPTOR request for the device instance to get usb hub descriptor. */
rt_err_t rt_usb_hub_get_descriptor(uinst_t uinst, rt_uint8_t *buffer, rt_size_t nbytes)
|
{
struct ureqest setup;
int timeout = 100;
RT_ASSERT(uinst != RT_NULL);
setup.request_type = USB_REQ_TYPE_DIR_IN | USB_REQ_TYPE_CLASS |
USB_REQ_TYPE_DEVICE;
setup.request = USB_REQ_GET_DESCRIPTOR;
setup.index = 0;
setup.length = nbytes;
setup.value = USB_DESC_TYPE_HUB << 8;
if(rt_usb_hcd_control_xfer(uinst->hcd, uinst, &setup, buffer, nbytes,
timeout) == nbytes) return RT_EOK;
else return -RT_FALSE;
}
|
armink/FreeModbus_Slave-Master-RTT-STM32
|
C++
|
Other
| 1,477
|
/* The maximum interval of time (1 LSB = 1/ODR) that can elapse after the end of the latency interval in which the click-detection procedure can start, in cases where the device is configured for double-click detection.. */
|
int32_t lis2dh12_double_tap_timeout_set(stmdev_ctx_t *ctx, uint8_t val)
|
/* The maximum interval of time (1 LSB = 1/ODR) that can elapse after the end of the latency interval in which the click-detection procedure can start, in cases where the device is configured for double-click detection.. */
int32_t lis2dh12_double_tap_timeout_set(stmdev_ctx_t *ctx, uint8_t val)
|
{
lis2dh12_time_window_t time_window;
int32_t ret;
ret = lis2dh12_read_reg(ctx, LIS2DH12_TIME_WINDOW,
(uint8_t *)&time_window, 1);
if (ret == 0)
{
time_window.tw = val;
ret = lis2dh12_write_reg(ctx, LIS2DH12_TIME_WINDOW,
(uint8_t *)&time_window, 1);
}
return ret;
}
|
prusa3d/Prusa-Firmware-Buddy
|
C++
|
Other
| 1,019
|
/* DESCRIPTION: The IBM VGA standard allows protection of certain VGA registers. */
|
static void i810_protect_regs(u8 __iomem *mmio, int mode)
|
/* DESCRIPTION: The IBM VGA standard allows protection of certain VGA registers. */
static void i810_protect_regs(u8 __iomem *mmio, int mode)
|
{
u8 reg;
i810_writeb(CR_INDEX_CGA, mmio, CR11);
reg = i810_readb(CR_DATA_CGA, mmio);
reg = (mode == OFF) ? reg & ~0x80 :
reg | 0x80;
i810_writeb(CR_INDEX_CGA, mmio, CR11);
i810_writeb(CR_DATA_CGA, mmio, reg);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Return non-zero if the CPU has been warm reset */
|
int cpu_has_been_warmreset(void)
|
/* Return non-zero if the CPU has been warm reset */
int cpu_has_been_warmreset(void)
|
{
return readl(&reset_manager_base->status) &
RSTMGR_L4WD_MPU_WARMRESET_MASK;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* bsec_read_SP_lock() - read SP lock (program Lock) @base: base address of bsec IP @otp: otp number (0 - BSEC_OTP_MAX_VALUE) Return: true if locked else false */
|
static bool bsec_read_SP_lock(u32 base, u32 otp)
|
/* bsec_read_SP_lock() - read SP lock (program Lock) @base: base address of bsec IP @otp: otp number (0 - BSEC_OTP_MAX_VALUE) Return: true if locked else false */
static bool bsec_read_SP_lock(u32 base, u32 otp)
|
{
return bsec_read_lock(base + BSEC_SPLOCK_OFF, otp);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* This function releases GTM timer so others may request it. */
|
void gtm_put_timer16(struct gtm_timer *tmr)
|
/* This function releases GTM timer so others may request it. */
void gtm_put_timer16(struct gtm_timer *tmr)
|
{
gtm_stop_timer16(tmr);
spin_lock_irq(&tmr->gtm->lock);
tmr->requested = false;
spin_unlock_irq(&tmr->gtm->lock);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Disable PHY interrupts. The mirror of the above ... */
|
static int ael2020_intr_disable(struct cphy *phy)
|
/* Disable PHY interrupts. The mirror of the above ... */
static int ael2020_intr_disable(struct cphy *phy)
|
{
struct reg_val regs[] = {
{ MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL,
0xffff, 0xb << (AEL2020_GPIO_LSTAT*4) },
{ MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL,
0xffff, 0x1 << (AEL2020_GPIO_MODDET*4) },
{ 0, 0, 0, 0 }
};
int err;
err = set_phy_regs(phy, regs);
if (err)
return err;
return t3_phy_lasi_intr_disable(phy);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Parse a octal encoded character starting at index i in string s. The resulting character will be returned and the index i will be updated to point at the character directly after the end of the encoding, this may be the '\0' terminator of the string. */
|
static char get_oct_char(const char *s, int *i)
|
/* Parse a octal encoded character starting at index i in string s. The resulting character will be returned and the index i will be updated to point at the character directly after the end of the encoding, this may be the '\0' terminator of the string. */
static char get_oct_char(const char *s, int *i)
|
{
char x[4];
char *endx;
long val;
x[3] = '\0';
strncpy(x, s + *i, 3);
val = strtol(x, &endx, 8);
assert(endx > x);
(*i) += endx - x;
return val;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Sets the UART hardware flow control mode to be used. */
|
void xUARTFlowControlSet(unsigned long ulBase, unsigned long ulMode)
|
/* Sets the UART hardware flow control mode to be used. */
void xUARTFlowControlSet(unsigned long ulBase, unsigned long ulMode)
|
{
xASSERT((ulBase == UART0_BASE) ||(ulBase == UART1_BASE));
xASSERT((ulMode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0);
xHWREG(ulBase + UART_IER) = ((xHWREG(ulBase + UART_IER) &
~(UART_FLOWCONTROL_TX |
UART_FLOWCONTROL_RX)) | ulMode);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
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