docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* TIM_Base MSP Initialization This function configures the hardware resources used in this example. */
|
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base)
|
/* TIM_Base MSP Initialization This function configures the hardware resources used in this example. */
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base)
|
{
if(htim_base->Instance==TIM2)
{
__HAL_RCC_TIM2_CLK_ENABLE();
}
else if(htim_base->Instance==TIM3)
{
__HAL_RCC_TIM3_CLK_ENABLE();
}
else if(htim_base->Instance==TIM7)
{
__HAL_RCC_TIM7_CLK_ENABLE();
}
else if(htim_base->Instance==TIM16)
{
__HAL_RCC_TIM16_CLK_ENABLE();
}
else if(htim_base->Instance==TIM17)
{
__HAL_RCC_TIM17_CLK_ENABLE();
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Enable endpoint interrupts on a given USB controller. */
|
void USBIntEnableEndpoint(unsigned long ulBase, unsigned long ulFlags)
|
/* Enable endpoint interrupts on a given USB controller. */
void USBIntEnableEndpoint(unsigned long ulBase, unsigned long ulFlags)
|
{
ASSERT(ulBase == USB0_BASE);
HWREGH(ulBase + USB_O_TXIE) |=
ulFlags & (USB_INTEP_HOST_OUT | USB_INTEP_DEV_IN | USB_INTEP_0);
HWREGH(ulBase + USB_O_RXIE) |=
((ulFlags & (USB_INTEP_HOST_IN | USB_INTEP_DEV_OUT)) >>
USB_INTEP_RX_SHIFT);
}
|
watterott/WebRadio
|
C++
| null | 71
|
/* Get child dentry flag into synch with parent inode. Flag should always be clear for negative dentrys. */
|
static void set_dentry_child_flags(struct inode *inode, int watched)
|
/* Get child dentry flag into synch with parent inode. Flag should always be clear for negative dentrys. */
static void set_dentry_child_flags(struct inode *inode, int watched)
|
{
struct dentry *alias;
spin_lock(&dcache_lock);
list_for_each_entry(alias, &inode->i_dentry, d_alias) {
struct dentry *child;
list_for_each_entry(child, &alias->d_subdirs, d_u.d_child) {
if (!child->d_inode)
continue;
spin_lock(&child->d_lock);
if (watched)
child->d_flags |= DCACHE_INOTIFY_PARENT_WATCHED;
else
child->d_flags &=~DCACHE_INOTIFY_PARENT_WATCHED;
spin_unlock(&child->d_lock);
}
}
spin_unlock(&dcache_lock);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This function returns the FSP entry stack pointer from address of the first API parameter. */
|
VOID* EFIAPI GetFspEntryStack(VOID)
|
/* This function returns the FSP entry stack pointer from address of the first API parameter. */
VOID* EFIAPI GetFspEntryStack(VOID)
|
{
FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer ();
return (VOID *)(FspData->CoreStack + CONTEXT_STACK_OFFSET (ApiParam[0]));
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* HAL_PCDEx_BCD_Callback : Send BCD message to user layer. */
|
void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg)
|
/* HAL_PCDEx_BCD_Callback : Send BCD message to user layer. */
void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg)
|
{
switch(msg)
{
case PCD_BCD_STD_DOWNSTREAM_PORT:
BSP_LED_On(LED3);
break;
case PCD_BCD_CHARGING_DOWNSTREAM_PORT:
BSP_LED_On(LED4);
break;
case PCD_BCD_DEDICATED_CHARGING_PORT:
BSP_LED_On(LED3);
BSP_LED_On(LED4);
break;
case PCD_BCD_DISCOVERY_COMPLETED:
USBD_Start(&USBD_Device);
break;
case PCD_BCD_ERROR:
default:
break;
}
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Routine: twl4030_regulator_set_mode Description: Set twl4030 regulator mode over i2c powerbus. */
|
static void twl4030_regulator_set_mode(u8 id, u8 mode)
|
/* Routine: twl4030_regulator_set_mode Description: Set twl4030 regulator mode over i2c powerbus. */
static void twl4030_regulator_set_mode(u8 id, u8 mode)
|
{
u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Transport Layer Uninitialization.
Free static memory previously allocated to the transport layer */
|
ADI_BLE_TRANSPORT_RESULT adi_tal_Uninit(void)
|
/* Transport Layer Uninitialization.
Free static memory previously allocated to the transport layer */
ADI_BLE_TRANSPORT_RESULT adi_tal_Uninit(void)
|
{
ADI_GPIO_RESULT eGpioResult;
ADI_SPI_RESULT eSpiResult;
eSpiResult = adi_spi_Close(pTransportData->hDevice);
RETURN_ERROR(eSpiResult, ADI_SPI_SUCCESS, ADI_BLE_TRANSPORT_FAILED_CLOSE);
eGpioResult = adi_gpio_UnInit();
RETURN_ERROR(eGpioResult, ADI_GPIO_SUCCESS, ADI_BLE_TRANSPORT_FAILED_GPIO);
return (ADI_BLE_TRANSPORT_SUCCESS);
}
|
analogdevicesinc/EVAL-ADICUP3029
|
C++
|
Other
| 36
|
/* GetReport is called by the agent after a CloseReport but before an EndReport to get the stats generated by the reporter thread. */
|
Transfer_Info* GetReport(ReportHeader *agent)
|
/* GetReport is called by the agent after a CloseReport but before an EndReport to get the stats generated by the reporter thread. */
Transfer_Info* GetReport(ReportHeader *agent)
|
{
thread_rest();
index = agent->reporterindex;
}
return &agent->report.info;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* This API is used to set the nvm program ready in the register bit 2. */
|
BMA2x2_RETURN_FUNCTION_TYPE bma2x2_get_nvmprog_remain(u8 *nvprog_remain_u8)
|
/* This API is used to set the nvm program ready in the register bit 2. */
BMA2x2_RETURN_FUNCTION_TYPE bma2x2_get_nvmprog_remain(u8 *nvprog_remain_u8)
|
{
BMA2x2_RETURN_FUNCTION_TYPE com_rslt = ERROR;
u8 data_u8 = BMA2x2_INIT_VALUE;
if (BMA2x2_NULL == p_bma2x2)
{
com_rslt = E_BMA2x2_NULL_PTR;
}
else
{
com_rslt = p_bma2x2->BMA2x2_BUS_READ_FUNC
(p_bma2x2->dev_addr,
BMA2x2_EE_REMAIN_REG, &data_u8,
BMA2x2_GEN_READ_WRITE_LENGTH);
*nvprog_remain_u8 = BMA2x2_GET_BITSLICE
(data_u8, BMA2x2_EE_REMAIN);
}
return com_rslt;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Attempt to release the private state associated with a page */
|
static int nfs_release_page(struct page *page, gfp_t gfp)
|
/* Attempt to release the private state associated with a page */
static int nfs_release_page(struct page *page, gfp_t gfp)
|
{
dfprintk(PAGECACHE, "NFS: release_page(%p)\n", page);
if (gfp & __GFP_WAIT)
nfs_wb_page(page->mapping->host, page);
if (PagePrivate(page))
return 0;
return nfs_fscache_release_page(page, gfp);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This should be called for each AT24 device that needs to be emulated. It registers it with the I2C emulation controller. */
|
static int emul_atmel_at24_init(const struct emul *target, const struct device *parent)
|
/* This should be called for each AT24 device that needs to be emulated. It registers it with the I2C emulation controller. */
static int emul_atmel_at24_init(const struct emul *target, const struct device *parent)
|
{
const struct at24_emul_cfg *cfg = target->cfg;
struct at24_emul_data *data = target->data;
data->emul.api = &bus_api;
data->emul.addr = cfg->addr;
data->emul.target = target;
data->i2c = parent;
data->cur_reg = 0;
memset(cfg->buf, 0xff, cfg->size);
return 0;
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Set the address of the tsb in the specified tcw. */
|
void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb)
|
/* Set the address of the tsb in the specified tcw. */
void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb)
|
{
tcw->tsb = (u64) ((addr_t) tsb);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* DeInitialize the mfxstm32l152 and unconfigure the needed hardware resources. */
|
int32_t MFXSTM32L152_DeInit(MFXSTM32L152_Object_t *pObj)
|
/* DeInitialize the mfxstm32l152 and unconfigure the needed hardware resources. */
int32_t MFXSTM32L152_DeInit(MFXSTM32L152_Object_t *pObj)
|
{
if (pObj->IsInitialized == 1U)
{
pObj->IO.DeInit();
pObj->IsInitialized = 0U;
}
return MFXSTM32L152_OK;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Enables access to the RTC and backup registers. */
|
void SysCtlBackupAccessEnable(void)
|
/* Enables access to the RTC and backup registers. */
void SysCtlBackupAccessEnable(void)
|
{
xHWREG(PWR_CR) |= PWR_CR_DBP;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Checks whether the specified FLASH flag is set or not. */
|
FlagStatus FLASH_GetFlagSTS(uint32_t FLASH_FLAG)
|
/* Checks whether the specified FLASH flag is set or not. */
FlagStatus FLASH_GetFlagSTS(uint32_t FLASH_FLAG)
|
{
FlagStatus bitstatus = RESET;
assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG));
if (FLASH_FLAG == FLASH_FLAG_OBERR)
{
if ((FLASH->OB & FLASH_FLAG_OBERR) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
else
{
if ((FLASH->STS & FLASH_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
return bitstatus;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* libc/string/strncasecmp.c Compares the two strings s1 and s2, ignoring the case of the characters */
|
int strncasecmp(const char *s1, const char *s2, size_t n)
|
/* libc/string/strncasecmp.c Compares the two strings s1 and s2, ignoring the case of the characters */
int strncasecmp(const char *s1, const char *s2, size_t n)
|
{
int c1, c2;
do {
c1 = tolower(*s1++);
c2 = tolower(*s2++);
} while ((--n > 0) && c1 == c2 && c1 != 0);
return c1 - c2;
}
|
xboot/xboot
|
C++
|
MIT License
| 779
|
/* Multiply an integer by the 'A24' constant (121665). Partial reduction is performed (down to less than twice the modulus). */
|
static void f255_mul_a24(uint32_t *d, const uint32_t *a)
|
/* Multiply an integer by the 'A24' constant (121665). Partial reduction is performed (down to less than twice the modulus). */
static void f255_mul_a24(uint32_t *d, const uint32_t *a)
|
{
int i;
uint32_t cc, w;
cc = 0;
for (i = 0; i < 20; i ++) {
w = MUL15(a[i], 121665) + cc;
d[i] = w & 0x1FFF;
cc = w >> 13;
}
cc = MUL15(w >> 8, 19);
d[19] &= 0xFF;
for (i = 0; i < 20; i ++) {
w = d[i] + cc;
d[i] = w & 0x1FFF;
cc = w >> 13;
}
}
|
RavenSystem/esp-homekit-devices
|
C++
|
Other
| 2,577
|
/* USB Device Remote Wakeup Configuration Function Parameters: cfg: Device Enable/Disable Return Value: None */
|
void USBD_WakeUpCfg(BOOL cfg)
|
/* USB Device Remote Wakeup Configuration Function Parameters: cfg: Device Enable/Disable Return Value: None */
void USBD_WakeUpCfg(BOOL cfg)
|
{
} else {
UDPHS->UDPHS_CTRL &= ~UDPHS_CTRL_REWAKEUP;
UDPHS->UDPHS_IEN &= ~UDPHS_IEN_UPSTR_RES;
}
}
|
ARMmbed/DAPLink
|
C++
|
Apache License 2.0
| 2,140
|
/* Start DAC ouput. Initialize DAC, set clock and timing, and set DAC to given mode. */
|
static void start_dac(void)
|
/* Start DAC ouput. Initialize DAC, set clock and timing, and set DAC to given mode. */
static void start_dac(void)
|
{
sysclk_enable_peripheral_clock(DACC);
dacc_reset(DACC);
dacc_set_transfer_mode(DACC, 0);
dacc_set_timing(DACC, 0x10, 0x60);
dacc_enable(DACC);
dacc_write_conversion_data(DACC, 255);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* For a dissector handle, print on the stream described by output, the filter name (which is what's used in the "-d" option) and the full name for the protocol that corresponds to this handle. */
|
static void display_dissector_names(const gchar *table _U_, gpointer handle, gpointer output)
|
/* For a dissector handle, print on the stream described by output, the filter name (which is what's used in the "-d" option) and the full name for the protocol that corresponds to this handle. */
static void display_dissector_names(const gchar *table _U_, gpointer handle, gpointer output)
|
{
int proto_id;
const gchar *proto_filter_name;
const gchar *proto_ui_name;
proto_id = dissector_handle_get_protocol_index((dissector_handle_t)handle);
if (proto_id != -1) {
proto_filter_name = proto_get_protocol_filter_name(proto_id);
proto_ui_name = proto_get_protocol_name(proto_id);
g_assert(proto_filter_name != NULL);
g_assert(proto_ui_name != NULL);
if ((prev_display_dissector_name == NULL) ||
(strcmp(prev_display_dissector_name, proto_filter_name) != 0)) {
fprintf((FILE *)output, "\t%s (%s)\n",
proto_filter_name,
proto_ui_name);
prev_display_dissector_name = proto_filter_name;
}
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Calculates the appropriate TCP checksum, consisting of the addition of the one's compliment of each word, complimented. */
|
static uint16_t TCP_Checksum16(void *TCPHeaderOutStart, const IP_Address_t *SourceAddress, const IP_Address_t *DestinationAddress, uint16_t TCPOutSize)
|
/* Calculates the appropriate TCP checksum, consisting of the addition of the one's compliment of each word, complimented. */
static uint16_t TCP_Checksum16(void *TCPHeaderOutStart, const IP_Address_t *SourceAddress, const IP_Address_t *DestinationAddress, uint16_t TCPOutSize)
|
{
uint32_t Checksum = 0;
Checksum += ((uint16_t*)SourceAddress)[0];
Checksum += ((uint16_t*)SourceAddress)[1];
Checksum += ((uint16_t*)DestinationAddress)[0];
Checksum += ((uint16_t*)DestinationAddress)[1];
Checksum += SwapEndian_16(PROTOCOL_TCP);
Checksum += SwapEndian_16(TCPOutSize);
for (uint16_t CurrWord = 0; CurrWord < (TCPOutSize >> 1); CurrWord++)
Checksum += ((uint16_t*)TCPHeaderOutStart)[CurrWord];
if (TCPOutSize & 0x01)
Checksum += (((uint16_t*)TCPHeaderOutStart)[TCPOutSize >> 1] & 0x00FF);
while (Checksum & 0xFFFF0000)
Checksum = ((Checksum & 0xFFFF) + (Checksum >> 16));
return ~Checksum;
}
|
prusa3d/Prusa-Firmware-Buddy
|
C++
|
Other
| 1,019
|
/* Changing the baud clock source changes the data rate generated by the SSI. Therefore, the data rate should be reconfigured after any change to the SSI clock source. */
|
void SSIClockSourceSet(uint32_t ui32Base, uint32_t ui32Source)
|
/* Changing the baud clock source changes the data rate generated by the SSI. Therefore, the data rate should be reconfigured after any change to the SSI clock source. */
void SSIClockSourceSet(uint32_t ui32Base, uint32_t ui32Source)
|
{
ASSERT(_SSIBaseValid(ui32Base));
ASSERT((ui32Source == SSI_CLOCK_SYSTEM) ||
(ui32Source == SSI_CLOCK_PIOSC));
HWREG(ui32Base + SSI_O_CC) = ui32Source;
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* If 64-bit I/O port operations are not supported, then ASSERT(). */
|
UINT64 EFIAPI S3IoAnd64(IN UINTN Port, IN UINT64 AndData)
|
/* If 64-bit I/O port operations are not supported, then ASSERT(). */
UINT64 EFIAPI S3IoAnd64(IN UINTN Port, IN UINT64 AndData)
|
{
return InternalSaveIoWrite64ValueToBootScript (Port, IoAnd64 (Port, AndData));
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* If List is NULL, then ASSERT(). If Node is NULL, then ASSERT(). If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or */
|
BOOLEAN EFIAPI IsNodeAtEnd(IN CONST LIST_ENTRY *List, IN CONST LIST_ENTRY *Node)
|
/* If List is NULL, then ASSERT(). If Node is NULL, then ASSERT(). If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or */
BOOLEAN EFIAPI IsNodeAtEnd(IN CONST LIST_ENTRY *List, IN CONST LIST_ENTRY *Node)
|
{
ASSERT_VERIFY_NODE_IN_VALID_LIST (List, Node, TRUE);
return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Print normalized SCSI sense header with device information and a prefix. */
|
void scsi_cmd_print_sense_hdr(struct scsi_cmnd *scmd, const char *desc, struct scsi_sense_hdr *sshdr)
|
/* Print normalized SCSI sense header with device information and a prefix. */
void scsi_cmd_print_sense_hdr(struct scsi_cmnd *scmd, const char *desc, struct scsi_sense_hdr *sshdr)
|
{
scmd_printk(KERN_INFO, scmd, "%s: ", desc);
scsi_show_sense_hdr(sshdr);
scmd_printk(KERN_INFO, scmd, "%s: ", desc);
scsi_show_extd_sense(sshdr->asc, sshdr->ascq);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* stts751_enable_int - enable selected int pin to generate interrupt */
|
static int stts751_enable_int(const struct device *dev, int enable)
|
/* stts751_enable_int - enable selected int pin to generate interrupt */
static int stts751_enable_int(const struct device *dev, int enable)
|
{
struct stts751_data *stts751 = dev->data;
uint8_t en = (enable) ? 0 : 1;
return stts751_pin_event_route_set(stts751->ctx, en);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* This function is used to delete the timer. */
|
void tls_timer_destroy(u8 timer_id)
|
/* This function is used to delete the timer. */
void tls_timer_destroy(u8 timer_id)
|
{
if (!(wm_timer_bitmap & BIT(timer_id)))
return;
tls_timer_stop(timer_id);
timer_context[timer_id].callback = NULL;
timer_context[timer_id].arg = NULL;
wm_timer_bitmap &= ~BIT(timer_id);
if (wm_timer_bitmap == 0)
{
tls_close_peripheral_clock(TLS_PERIPHERAL_TYPE_TIMER);
}
return;
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* This also helps to limit the peak amount of pinned userspace memory. */
|
static int dio_bio_reap(struct dio *dio)
|
/* This also helps to limit the peak amount of pinned userspace memory. */
static int dio_bio_reap(struct dio *dio)
|
{
int ret = 0;
if (dio->reap_counter++ >= 64) {
while (dio->bio_list) {
unsigned long flags;
struct bio *bio;
int ret2;
spin_lock_irqsave(&dio->bio_lock, flags);
bio = dio->bio_list;
dio->bio_list = bio->bi_private;
spin_unlock_irqrestore(&dio->bio_lock, flags);
ret2 = dio_bio_complete(dio, bio);
if (ret == 0)
ret = ret2;
}
dio->reap_counter = 0;
}
return ret;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Only do anything when DOIT is set, otherwise just free the list (this is used for clean pages which do not need killing) Also when FAIL is set do a force kill because something went wrong earlier. */
|
static void kill_procs_ao(struct list_head *to_kill, int doit, int trapno, int fail, unsigned long pfn)
|
/* Only do anything when DOIT is set, otherwise just free the list (this is used for clean pages which do not need killing) Also when FAIL is set do a force kill because something went wrong earlier. */
static void kill_procs_ao(struct list_head *to_kill, int doit, int trapno, int fail, unsigned long pfn)
|
{
struct to_kill *tk, *next;
list_for_each_entry_safe (tk, next, to_kill, nd) {
if (doit) {
if (fail || tk->addr_valid == 0) {
printk(KERN_ERR
"MCE %#lx: forcibly killing %s:%d because of failure to unmap corrupted page\n",
pfn, tk->tsk->comm, tk->tsk->pid);
force_sig(SIGKILL, tk->tsk);
}
else if (kill_proc_ao(tk->tsk, tk->addr, trapno,
pfn) < 0)
printk(KERN_ERR
"MCE %#lx: Cannot send advisory machine check signal to %s:%d\n",
pfn, tk->tsk->comm, tk->tsk->pid);
}
put_task_struct(tk->tsk);
kfree(tk);
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* runs a program on the hash register engine. */
|
static int hre_run_program(struct udevice *tpm, const uint8_t *code, size_t code_size)
|
/* runs a program on the hash register engine. */
static int hre_run_program(struct udevice *tpm, const uint8_t *code, size_t code_size)
|
{
size_t code_left;
const uint8_t *ip = code;
code_left = code_size;
hre_tpm_err = 0;
hre_err = HRE_E_OK;
while (code_left > 0)
if (!hre_execute_op(tpm, &ip, &code_left))
return -1;
return hre_err;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Return address of mapped table Check for common case that we can re-use mapping to SYST, which requires syst_pa, syst_va to be initialized. */
|
struct sfi_table_header* sfi_map_table(u64 pa)
|
/* Return address of mapped table Check for common case that we can re-use mapping to SYST, which requires syst_pa, syst_va to be initialized. */
struct sfi_table_header* sfi_map_table(u64 pa)
|
{
struct sfi_table_header *th;
u32 length;
if (!TABLE_ON_PAGE(syst_pa, pa, sizeof(struct sfi_table_header)))
th = sfi_map_memory(pa, sizeof(struct sfi_table_header));
else
th = (void *)syst_va + (pa - syst_pa);
if (TABLE_ON_PAGE(th, th, th->len))
return th;
length = th->len;
if (!TABLE_ON_PAGE(syst_pa, pa, sizeof(struct sfi_table_header)))
sfi_unmap_memory(th, sizeof(struct sfi_table_header));
return sfi_map_memory(pa, length);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Flushes an endpoint of the Low Level Driver. */
|
USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
/* Flushes an endpoint of the Low Level Driver. */
USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
{
HAL_StatusTypeDef hal_status = HAL_OK;
USBD_StatusTypeDef usb_status = USBD_OK;
hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
usb_status = USBD_Get_USB_Status(hal_status);
return usb_status;
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* brief Return Frequency of PLLClkDiv return Frequency of PLLClkDiv */
|
uint32_t CLOCK_GetPllClkDivFreq(void)
|
/* brief Return Frequency of PLLClkDiv return Frequency of PLLClkDiv */
uint32_t CLOCK_GetPllClkDivFreq(void)
|
{
uint32_t freq = 0U;
switch (SYSCON->PLLCLKDIVSEL)
{
case 0U:
freq = CLOCK_GetPll0OutFreq();
break;
case 1U:
freq = CLOCK_GetPll1OutFreq() / (((SYSCON->PLL1CLK0DIV) & 0xffU) + 1U);
break;
default:
freq = 0U;
break;
}
return freq / ((SYSCON->PLLCLKDIV & SYSCON_PLLCLKDIV_DIV_MASK) + 1U);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* get_pad_len - return the length of padding in a buffer. */
|
static int get_pad_len(const struct ubifs_info *c, uint8_t *buf, int len)
|
/* get_pad_len - return the length of padding in a buffer. */
static int get_pad_len(const struct ubifs_info *c, uint8_t *buf, int len)
|
{
int offs, pad_len;
if (c->min_io_size == 1)
return 0;
offs = c->leb_size - len;
pad_len = ALIGN(offs, c->min_io_size) - offs;
return pad_len;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* If we created resource files for @dev, remove them from sysfs and free their resources. */
|
void pci_remove_resource_files(struct pci_dev *pdev)
|
/* If we created resource files for @dev, remove them from sysfs and free their resources. */
void pci_remove_resource_files(struct pci_dev *pdev)
|
{
int i;
for (i = 0; i < PCI_ROM_RESOURCE; i++) {
struct bin_attribute *res_attr;
res_attr = pdev->res_attr[i];
if (res_attr) {
sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
kfree(res_attr);
}
res_attr = pdev->res_attr_wc[i];
if (res_attr) {
sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
kfree(res_attr);
}
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Deinitializes the SDIO peripheral registers to their default reset values. */
|
void SDIO_DeInit(void)
|
/* Deinitializes the SDIO peripheral registers to their default reset values. */
void SDIO_DeInit(void)
|
{
SDIO->PWRCTRL = 0x00000000;
SDIO->CLKCTRL = 0x00000000;
SDIO->CMDARG = 0x00000000;
SDIO->CMDCTRL = 0x00000000;
SDIO->DTIMER = 0x00000000;
SDIO->DATLEN = 0x00000000;
SDIO->DATCTRL = 0x00000000;
SDIO->INTCLR = 0x00C007FF;
SDIO->INTEN = 0x00000000;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Copy across the serial console cflag setting into the termios settings for the initial open of the port. This allows continuity between the kernel settings, and the settings init adopts when it opens the port for the first time. */
|
static void uart_update_termios(struct uart_state *state)
|
/* Copy across the serial console cflag setting into the termios settings for the initial open of the port. This allows continuity between the kernel settings, and the settings init adopts when it opens the port for the first time. */
static void uart_update_termios(struct uart_state *state)
|
{
struct tty_struct *tty = state->port.tty;
struct uart_port *port = state->uart_port;
if (uart_console(port) && port->cons->cflag) {
tty->termios->c_cflag = port->cons->cflag;
port->cons->cflag = 0;
}
if (!(tty->flags & (1 << TTY_IO_ERROR))) {
uart_change_speed(state, NULL);
if (tty->termios->c_cflag & CBAUD)
uart_set_mctrl(port, TIOCM_DTR | TIOCM_RTS);
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Checks if ther ARM64 SoC ID SMC call is supported */
|
BOOLEAN HasSmcArm64SocId(VOID)
|
/* Checks if ther ARM64 SoC ID SMC call is supported */
BOOLEAN HasSmcArm64SocId(VOID)
|
{
INT32 SmcCallStatus;
BOOLEAN Arm64SocIdSupported;
UINTN SmcParam;
Arm64SocIdSupported = FALSE;
SmcCallStatus = ArmCallSmc0 (SMCCC_VERSION, NULL, NULL, NULL);
if ((SmcCallStatus < 0) || ((SmcCallStatus >> 16) >= 1)) {
SmcParam = SMCCC_ARCH_SOC_ID;
SmcCallStatus = ArmCallSmc1 (SMCCC_ARCH_FEATURES, &SmcParam, NULL, NULL);
if (SmcCallStatus >= 0) {
Arm64SocIdSupported = TRUE;
}
}
return Arm64SocIdSupported;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* One byte configuration write on PSII. Currently fixes destination PCI bus to PCI2, onboard pci. */
|
static int psII_read_config_byte(struct pci_controller *hose, pci_dev_t dev, int reg, u8 *val)
|
/* One byte configuration write on PSII. Currently fixes destination PCI bus to PCI2, onboard pci. */
static int psII_read_config_byte(struct pci_controller *hose, pci_dev_t dev, int reg, u8 *val)
|
{
write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 |
(PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3));
*val = read1 (PSII_CONFIG_DATA + (reg & 0x03));
return (0);
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* This function will suspends execution of the calling thread until one of the signals in the given set is pending. If none of the signals specified are pending, it will wait for the specified time interval. */
|
int sigtimedwait(const sigset_t *set, siginfo_t *info, const struct timespec *timeout)
|
/* This function will suspends execution of the calling thread until one of the signals in the given set is pending. If none of the signals specified are pending, it will wait for the specified time interval. */
int sigtimedwait(const sigset_t *set, siginfo_t *info, const struct timespec *timeout)
|
{
int ret = 0;
int tick = RT_WAITING_FOREVER;
if (timeout)
{
tick = timeout->tv_sec * RT_TICK_PER_SECOND + timeout->tv_nsec * RT_TICK_PER_SECOND / NANOSECOND_PER_SECOND;
}
ret = rt_signal_wait(set, info, tick);
if (ret == 0) return 0;
errno = ret;
return -1;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Simple function to replace printf with float formatting. */
|
static void print_float(float temp)
|
/* Simple function to replace printf with float formatting. */
static void print_float(float temp)
|
{
uint8_t i;
int32_t j;
float f;
f = 100.00 * temp;
j = (int32_t)f;
if (temp > 0) {
i = j - (int32_t)temp * 100;
} else {
i = (int32_t)temp * 100 - j;
}
j = j / 100;
printf("%d.%d mv \n\r", (int32_t)j, (int32_t)i);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Copy pixels from SRAM to the screen.
Limits have to be set prior to calling this function, e.g.: */
|
void ili9325_copy_pixels_to_screen(const ili9325_color_t *pixels, uint32_t count)
|
/* Copy pixels from SRAM to the screen.
Limits have to be set prior to calling this function, e.g.: */
void ili9325_copy_pixels_to_screen(const ili9325_color_t *pixels, uint32_t count)
|
{
Assert(count > 0);
LCD_IR(0);
LCD_IR(ILI9325_GRAM_DATA_REG);
while (count--) {
LCD_WD((*pixels >> 16) & 0xFF);
LCD_WD((*pixels >> 8) & 0xFF);
LCD_WD(*pixels & 0xFF);
pixels++;
}
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* read CSP register return < 0 -> error */
|
static int read_register(struct snd_sb *chip, unsigned char reg)
|
/* read CSP register return < 0 -> error */
static int read_register(struct snd_sb *chip, unsigned char reg)
|
{
unsigned char dsp_cmd[2];
dsp_cmd[0] = 0x0f;
dsp_cmd[1] = reg;
command_seq(chip, dsp_cmd, 2);
return snd_sbdsp_get_byte(chip);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Get service by {proto,addr,port} in the service table. */
|
static struct ip_vs_service* __ip_vs_service_get(int af, __u16 protocol, const union nf_inet_addr *vaddr, __be16 vport)
|
/* Get service by {proto,addr,port} in the service table. */
static struct ip_vs_service* __ip_vs_service_get(int af, __u16 protocol, const union nf_inet_addr *vaddr, __be16 vport)
|
{
unsigned hash;
struct ip_vs_service *svc;
hash = ip_vs_svc_hashkey(af, protocol, vaddr, vport);
list_for_each_entry(svc, &ip_vs_svc_table[hash], s_list){
if ((svc->af == af)
&& ip_vs_addr_equal(af, &svc->addr, vaddr)
&& (svc->port == vport)
&& (svc->protocol == protocol)) {
atomic_inc(&svc->usecnt);
return svc;
}
}
return NULL;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Deinitialize the DAC peripheral registers to their default reset values. */
|
int32_t DAC_DeInit(CM_DAC_TypeDef *DACx)
|
/* Deinitialize the DAC peripheral registers to their default reset values. */
int32_t DAC_DeInit(CM_DAC_TypeDef *DACx)
|
{
int32_t i32Ret = LL_OK;
__IO uint32_t *u32DADRx;
WRITE_REG16(DACx->DACR, 0x0000UL);
WRITE_REG16(DACx->DAOCR, 0x0000UL);
WRITE_REG16(DACx->DAADPCR, 0x0000UL);
u32DADRx = (__IO uint32_t *)(uint32_t)(&DACx->DADR1);
WRITE_REG32(*u32DADRx, 0x0000UL);
return i32Ret;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Returns the FLASH Write Protection Option Bytes Register value. */
|
uint32_t FLASH_GetWriteProtectionOB(void)
|
/* Returns the FLASH Write Protection Option Bytes Register value. */
uint32_t FLASH_GetWriteProtectionOB(void)
|
{
return (uint32_t)(FLASH->WRP);
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Fills each InitStruct member with its default value. */
|
void ISO7816_StructInit(ISO7816_InitType *InitStruct)
|
/* Fills each InitStruct member with its default value. */
void ISO7816_StructInit(ISO7816_InitType *InitStruct)
|
{
InitStruct->ACKLen = ISO7816_ACKLEN_1;
InitStruct->Baudrate = 9600;
InitStruct->FirstBit = ISO7816_FIRSTBIT_MSB;
InitStruct->Parity = ISO7816_PARITY_EVEN;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* This code checks if the FileSuffix is one of the possible DER/PEM-encoded certificate suffix. */
|
BOOLEAN IsDerPemEncodeCertificate(IN CONST CHAR16 *FileSuffix)
|
/* This code checks if the FileSuffix is one of the possible DER/PEM-encoded certificate suffix. */
BOOLEAN IsDerPemEncodeCertificate(IN CONST CHAR16 *FileSuffix)
|
{
UINTN Index;
for (Index = 0; mDerPemEncodedSuffix[Index] != NULL; Index++) {
if (StrCmp (FileSuffix, mDerPemEncodedSuffix[Index]) == 0) {
return TRUE;
}
}
return FALSE;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* param base Pointer to FLEXIO_I2S_Type structure. param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state param xfer Pointer to flexio_i2s_transfer_t structure retval kStatus_Success Successfully start the data receive. retval kStatus_FLEXIO_I2S_RxBusy Previous receive still not finished. retval kStatus_InvalidArgument The input parameter is invalid. */
|
status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)
|
/* param base Pointer to FLEXIO_I2S_Type structure. param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state param xfer Pointer to flexio_i2s_transfer_t structure retval kStatus_Success Successfully start the data receive. retval kStatus_FLEXIO_I2S_RxBusy Previous receive still not finished. retval kStatus_InvalidArgument The input parameter is invalid. */
status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)
|
{
assert(handle != NULL);
if (handle->queue[handle->queueUser].data != NULL)
{
return kStatus_FLEXIO_I2S_QueueFull;
}
if ((xfer->dataSize == 0U) || (xfer->data == NULL))
{
return kStatus_InvalidArgument;
}
handle->queue[handle->queueUser].data = xfer->data;
handle->queue[handle->queueUser].dataSize = xfer->dataSize;
handle->transferSize[handle->queueUser] = xfer->dataSize;
handle->queueUser = (handle->queueUser + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
handle->state = (uint32_t)kFLEXIO_I2S_Busy;
FLEXIO_I2S_EnableInterrupts(base, kFLEXIO_I2S_RxDataRegFullInterruptEnable);
FLEXIO_I2S_Enable(base, true);
return kStatus_Success;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Acknowledge that data was read from the specified endpoint's FIFO in host mode. */
|
void USBHostEndpointDataAck(uint32_t ui32Base, uint32_t ui32Endpoint)
|
/* Acknowledge that data was read from the specified endpoint's FIFO in host mode. */
void USBHostEndpointDataAck(uint32_t ui32Base, uint32_t ui32Endpoint)
|
{
ASSERT(ui32Base == USB0_BASE);
ASSERT((ui32Endpoint == USB_EP_0) || (ui32Endpoint == USB_EP_1) ||
(ui32Endpoint == USB_EP_2) || (ui32Endpoint == USB_EP_3) ||
(ui32Endpoint == USB_EP_4) || (ui32Endpoint == USB_EP_5) ||
(ui32Endpoint == USB_EP_6) || (ui32Endpoint == USB_EP_7));
if (ui32Endpoint == USB_EP_0)
{
HWREGB(ui32Base + USB_O_CSRL0) &= ~USB_CSRL0_RXRDY;
}
else
{
HWREGB(ui32Base + USB_O_RXCSRL1 + EP_OFFSET(ui32Endpoint)) &=
~(USB_RXCSRL1_RXRDY);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* brief Restores the LPSPI peripheral to reset state. Note that this function sets all registers to reset state. As a result, the LPSPI module can't work after calling this API. param base LPSPI peripheral address. */
|
void LPSPI_Reset(LPSPI_Type *base)
|
/* brief Restores the LPSPI peripheral to reset state. Note that this function sets all registers to reset state. As a result, the LPSPI module can't work after calling this API. param base LPSPI peripheral address. */
void LPSPI_Reset(LPSPI_Type *base)
|
{
base->CR |= LPSPI_CR_RST_MASK;
base->CR |= LPSPI_CR_RRF_MASK | LPSPI_CR_RTF_MASK;
base->CR = 0x00U;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Returns the specified DMA Rx Desc frame length. */
|
uint32_t ETH_GetDmaRxDescFrameLen(__IO ETH_DMADescType *DMARxDesc)
|
/* Returns the specified DMA Rx Desc frame length. */
uint32_t ETH_GetDmaRxDescFrameLen(__IO ETH_DMADescType *DMARxDesc)
|
{
return ((DMARxDesc->Status & ETH_DMA_RX_DESC_FL) >> ETH_DMA_RX_DESC_FRAME_LEN_SHIFT);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Command response callback function for sd_ble_gattc_primary_services_discover BLE command.
Callback for decoding the command response return code. */
|
static uint32_t gattc_primary_services_discover_rsp_dec(const uint8_t *p_buffer, uint16_t length)
|
/* Command response callback function for sd_ble_gattc_primary_services_discover BLE command.
Callback for decoding the command response return code. */
static uint32_t gattc_primary_services_discover_rsp_dec(const uint8_t *p_buffer, uint16_t length)
|
{
uint32_t result_code;
const uint32_t err_code = ble_gattc_primary_services_discover_rsp_dec(p_buffer,
length,
&result_code);
APP_ERROR_CHECK(err_code);
return result_code;
}
|
labapart/polymcu
|
C++
| null | 201
|
/* drbd_socket_okay() - Free the socket if its connection is not okay @mdev: DRBD device. @sock: pointer to the pointer to the socket. */
|
static int drbd_socket_okay(struct drbd_conf *mdev, struct socket **sock)
|
/* drbd_socket_okay() - Free the socket if its connection is not okay @mdev: DRBD device. @sock: pointer to the pointer to the socket. */
static int drbd_socket_okay(struct drbd_conf *mdev, struct socket **sock)
|
{
int rr;
char tb[4];
if (!*sock)
return FALSE;
rr = drbd_recv_short(mdev, *sock, tb, 4, MSG_DONTWAIT | MSG_PEEK);
if (rr > 0 || rr == -EAGAIN) {
return TRUE;
} else {
sock_release(*sock);
*sock = NULL;
return FALSE;
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Programs a half word (16-bit) at a specified address. */
|
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
/* Programs a half word (16-bit) at a specified address. */
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
{
FLASH_Status status = FLASH_COMPLETE;
assert_param(IS_FLASH_ADDRESS(Address));
status = FLASH_WaitForLastOperation();
if(status == FLASH_COMPLETE)
{
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= FLASH_PSIZE_HALF_WORD;
FLASH->CR |= FLASH_CR_PG;
*(__IO uint16_t*)Address = Data;
status = FLASH_WaitForLastOperation();
FLASH->CR &= (~FLASH_CR_PG);
}
return status;
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* It is called with ipc_ids.rw_mutex and ipcp->lock held. */
|
static int ipc_check_perms(struct kern_ipc_perm *ipcp, struct ipc_ops *ops, struct ipc_params *params)
|
/* It is called with ipc_ids.rw_mutex and ipcp->lock held. */
static int ipc_check_perms(struct kern_ipc_perm *ipcp, struct ipc_ops *ops, struct ipc_params *params)
|
{
int err;
if (ipcperms(ipcp, params->flg))
err = -EACCES;
else {
err = ops->associate(ipcp, params->flg);
if (!err)
err = ipcp->id;
}
return err;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Print out the results of a single counter: */
|
static void print_counter(int counter)
|
/* Print out the results of a single counter: */
static void print_counter(int counter)
|
{
double avg = avg_stats(&event_res_stats[counter][0]);
int scaled = event_scaled[counter];
if (scaled == -1) {
fprintf(stderr, " %14s %-24s\n",
"<not counted>", event_name(counter));
return;
}
if (nsec_counter(counter))
nsec_printout(counter, avg);
else
abs_printout(counter, avg);
print_noise(counter, avg);
if (scaled) {
double avg_enabled, avg_running;
avg_enabled = avg_stats(&event_res_stats[counter][1]);
avg_running = avg_stats(&event_res_stats[counter][2]);
fprintf(stderr, " (scaled from %.2f%%)",
100 * avg_running / avg_enabled);
}
fprintf(stderr, "\n");
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). */
|
UINT8 EFIAPI PciSegmentBitFieldRead8(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit)
|
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). */
UINT8 EFIAPI PciSegmentBitFieldRead8(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit)
|
{
return BitFieldRead8 (PciSegmentRead8 (Address), StartBit, EndBit);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* skip a sequence '=*]' and return its number of '='s or -1 if sequence is malformed */
|
static int skip_sep(LexState *ls)
|
/* skip a sequence '=*]' and return its number of '='s or -1 if sequence is malformed */
static int skip_sep(LexState *ls)
|
{
save_and_next(ls);
count++;
}
return (ls->current == s) ? count : (-count) - 1;
}
|
opentx/opentx
|
C++
|
GNU General Public License v2.0
| 2,025
|
/* Reads a number of bytes from adapter to system memory. */
|
static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data, unsigned short Address, int Length)
|
/* Reads a number of bytes from adapter to system memory. */
static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data, unsigned short Address, int Length)
|
{
int i;
unsigned short old_sifadx, old_sifadr, InWord;
old_sifadx = SIFREADW(SIFADX);
old_sifadr = SIFREADW(SIFADR);
SIFWRITEW(0x0001, SIFADX);
SIFWRITEW(Address, SIFADR);
i = 0;
for(;;)
{
InWord = SIFREADW(SIFINC);
*(Data + i) = HIBYTE(InWord);
if(++i == Length)
break;
*(Data + i) = LOBYTE(InWord);
if (++i == Length)
break;
}
SIFWRITEW(old_sifadx, SIFADX);
SIFWRITEW(old_sifadr, SIFADR);
return;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Sets the attribute value to the given unsigned 32-bit integer. */
|
void _g_file_attribute_value_set_uint32(GFileAttributeValue *attr, guint32 value)
|
/* Sets the attribute value to the given unsigned 32-bit integer. */
void _g_file_attribute_value_set_uint32(GFileAttributeValue *attr, guint32 value)
|
{
g_return_if_fail (attr != NULL);
_g_file_attribute_value_clear (attr);
attr->type = G_FILE_ATTRIBUTE_TYPE_UINT32;
attr->u.uint32 = value;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* I2C MSP Initialization This function configures the hardware resources used in this example. */
|
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
|
/* I2C MSP Initialization This function configures the hardware resources used in this example. */
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
|
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hi2c->Instance==I2C1)
{
__HAL_RCC_GPIOB_CLK_ENABLE();
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
__HAL_RCC_I2C1_CLK_ENABLE();
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Configures the TIMx Output Compare 6 Fast feature. */
|
void TIM_ConfigOc6Fast(TIM_Module *TIMx, uint16_t TIM_OCFast)
|
/* Configures the TIMx Output Compare 6 Fast feature. */
void TIM_ConfigOc6Fast(TIM_Module *TIMx, uint16_t TIM_OCFast)
|
{
uint16_t tmpccmr3 = 0;
assert_param(IsTimList1Module(TIMx));
assert_param(IsTimOcFastState(TIM_OCFast));
tmpccmr3 = TIMx->CCMOD3;
tmpccmr3 &= (uint16_t) ~((uint16_t)TIM_CCMOD3_OC6FEN);
tmpccmr3 |= (uint16_t)(TIM_OCFast << 8);
TIMx->CCMOD3 = tmpccmr3;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Set the current state of the TX state machine. */
|
static void ucpd_set_tx_state(const struct device *dev, enum ucpd_state state)
|
/* Set the current state of the TX state machine. */
static void ucpd_set_tx_state(const struct device *dev, enum ucpd_state state)
|
{
struct tcpc_data *data = dev->data;
data->ucpd_tx_state = state;
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Checks whether the specified LPUART flag is set or not. */
|
FlagStatus LPUART_GetFlagStatus(uint16_t LPUART_FLAG)
|
/* Checks whether the specified LPUART flag is set or not. */
FlagStatus LPUART_GetFlagStatus(uint16_t LPUART_FLAG)
|
{
FlagStatus bitstatus = RESET;
assert_param(IS_LPUART_FLAG(LPUART_FLAG));
if ((LPUART->STS & LPUART_FLAG) != (uint16_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Add a socket to the bound sockets list. */
|
static void rose_insert_socket(struct sock *sk)
|
/* Add a socket to the bound sockets list. */
static void rose_insert_socket(struct sock *sk)
|
{
spin_lock_bh(&rose_list_lock);
sk_add_node(sk, &rose_list);
spin_unlock_bh(&rose_list_lock);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* STUSB1602 checks the VCONN power switch Over Current Protection Fault on CC1 (bit3 0x13 */
|
VCONN_SW_OCP_Fault_CC1_TypeDef STUSB1602_VCONN_SW_OCP_Fault_CC1_Get(uint8_t Addr)
|
/* STUSB1602 checks the VCONN power switch Over Current Protection Fault on CC1 (bit3 0x13 */
VCONN_SW_OCP_Fault_CC1_TypeDef STUSB1602_VCONN_SW_OCP_Fault_CC1_Get(uint8_t Addr)
|
{
STUSB1602_HW_FAULT_STATUS_RegTypeDef reg;
STUSB1602_ReadReg(®.d8, Addr, STUSB1602_HW_FAULT_STATUS_REG, 1);
return (VCONN_SW_OCP_Fault_CC1_TypeDef)(reg.b.VCONN_SW_OCP_FAULT_CC1);
}
|
st-one/X-CUBE-USB-PD
|
C++
| null | 110
|
/* Checks if the Backup DRx registers values are correct or not. */
|
uint8_t CheckBackupReg(uint16_t FirstBackupData)
|
/* Checks if the Backup DRx registers values are correct or not. */
uint8_t CheckBackupReg(uint16_t FirstBackupData)
|
{
uint32_t index = 0;
for (index = 0; index < BKP_DR_NUMBER; index++)
{
if (BKP_ReadBackupRegister(BKPDataReg[index]) != (FirstBackupData + (index * 0x5A)))
{
return (index + 1);
}
}
return 0;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Checks whether the specified I2C flag is set or not. */
|
FlagStatus I2C_GetFlagStatus(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
|
/* Checks whether the specified I2C flag is set or not. */
FlagStatus I2C_GetFlagStatus(I2C_TypeDef *I2Cx, uint32_t I2C_FLAG)
|
{
uint32_t tmpreg = 0;
FlagStatus bitstatus = RESET;
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
tmpreg = I2Cx->ISR;
tmpreg &= I2C_FLAG;
if(tmpreg != 0)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
|
ajhc/demo-cortex-m3
|
C++
| null | 38
|
/* Sets the address that the I2C Master will place on the bus. */
|
void I2CMasterSlaveAddrSet(unsigned long ulBase, unsigned char ucSlaveAddr, tBoolean bReceive)
|
/* Sets the address that the I2C Master will place on the bus. */
void I2CMasterSlaveAddrSet(unsigned long ulBase, unsigned char ucSlaveAddr, tBoolean bReceive)
|
{
ASSERT((ulBase == I2C0_MASTER_BASE) || (ulBase == I2C1_MASTER_BASE));
ASSERT(!(ucSlaveAddr & 0x80));
HWREG(ulBase + I2C_O_MSA) = (ucSlaveAddr << 1) | bReceive;
}
|
watterott/WebRadio
|
C++
| null | 71
|
/* Returns the current SAI Block x FIFO filled level. */
|
uint32_t SAI_GetFIFOStatus(SAI_Block_TypeDef *SAI_Block_x)
|
/* Returns the current SAI Block x FIFO filled level. */
uint32_t SAI_GetFIFOStatus(SAI_Block_TypeDef *SAI_Block_x)
|
{
uint32_t tmpreg = 0;
assert_param(IS_SAI_BLOCK_PERIPH(SAI_Block_x));
tmpreg = (uint32_t)((SAI_Block_x->SR & SAI_xSR_FLVL));
return tmpreg;
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
|
UINT8 EFIAPI S3PciSegmentBitFieldOr8(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
|
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT8 EFIAPI S3PciSegmentBitFieldOr8(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
|
{
return InternalSavePciSegmentWrite8ValueToBootScript (Address, PciSegmentBitFieldOr8 (Address, StartBit, EndBit, OrData));
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The ->payload, ->tot_len and ->len fields are adjusted. */
|
u8_t pbuf_header(struct pbuf *p, s16_t header_size_increment)
|
/* The ->payload, ->tot_len and ->len fields are adjusted. */
u8_t pbuf_header(struct pbuf *p, s16_t header_size_increment)
|
{
return pbuf_header_impl(p, header_size_increment, 0);
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* The GetModeData()function reads the current operational settings of this EFI MTFTPv4 Protocol driver instance. */
|
EFI_STATUS EFIAPI EfiMtftp4GetModeData(IN EFI_MTFTP4_PROTOCOL *This, OUT EFI_MTFTP4_MODE_DATA *ModeData)
|
/* The GetModeData()function reads the current operational settings of this EFI MTFTPv4 Protocol driver instance. */
EFI_STATUS EFIAPI EfiMtftp4GetModeData(IN EFI_MTFTP4_PROTOCOL *This, OUT EFI_MTFTP4_MODE_DATA *ModeData)
|
{
MTFTP4_PROTOCOL *Instance;
EFI_TPL OldTpl;
if ((This == NULL) || (ModeData == NULL)) {
return EFI_INVALID_PARAMETER;
}
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
Instance = MTFTP4_PROTOCOL_FROM_THIS (This);
CopyMem (&ModeData->ConfigData, &Instance->Config, sizeof (Instance->Config));
ModeData->SupportedOptionCount = MTFTP4_SUPPORTED_OPTIONS;
ModeData->SupportedOptoins = (UINT8 **)mMtftp4SupportedOptions;
ModeData->UnsupportedOptionCount = 0;
ModeData->UnsupportedOptoins = NULL;
gBS->RestoreTPL (OldTpl);
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Returns: TRUE on success, FALSE if there was an error */
|
gboolean g_output_stream_printf(GOutputStream *stream, gsize *bytes_written, GCancellable *cancellable, GError **error, const gchar *format,...)
|
/* Returns: TRUE on success, FALSE if there was an error */
gboolean g_output_stream_printf(GOutputStream *stream, gsize *bytes_written, GCancellable *cancellable, GError **error, const gchar *format,...)
|
{
va_list args;
gboolean success;
va_start (args, format);
success = g_output_stream_vprintf (stream, bytes_written, cancellable,
error, format, args);
va_end (args);
return success;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* This function is used to display a string on console, normally, it's invoked by rt_kprintf */
|
void rt_hw_console_output(const char *str)
|
/* This function is used to display a string on console, normally, it's invoked by rt_kprintf */
void rt_hw_console_output(const char *str)
|
{
while (*str)
{
if (*str=='\n')
{
while (!(U0LSR & 0x20));
U0THR = '\r';
}
while (!(U0LSR & 0x20));
U0THR = *str;
str ++;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Check if a HID is a valid PNP ID. */
|
BOOLEAN IsValidPnpId(IN CONST CHAR8 *Hid)
|
/* Check if a HID is a valid PNP ID. */
BOOLEAN IsValidPnpId(IN CONST CHAR8 *Hid)
|
{
UINTN Index;
if (AsciiStrLen (Hid) != 7) {
return FALSE;
}
for (Index = 0; Index < 3; Index++) {
if (!IS_UPPER_CHAR (Hid[Index])) {
return FALSE;
}
}
for (Index = 3; Index < 7; Index++) {
if (!IS_UPPER_HEX (Hid[Index])) {
return FALSE;
}
}
return TRUE;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Checks RTC peripheral is enabled for programming to its registers */
|
bool XMC_RTC_IsEnabled(void)
|
/* Checks RTC peripheral is enabled for programming to its registers */
bool XMC_RTC_IsEnabled(void)
|
{
return XMC_SCU_HIB_IsHibernateDomainEnabled();
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Configures the SDIO Command and send the command. */
|
void SDIO_TxCommand(SDIO_CmdConfig_T *cmdConfig)
|
/* Configures the SDIO Command and send the command. */
void SDIO_TxCommand(SDIO_CmdConfig_T *cmdConfig)
|
{
uint32_t tmpreg = 0;
SDIO->ARG = cmdConfig->argument;
tmpreg = SDIO->CMD;
tmpreg &= 0xFFFFF800;
tmpreg |= (uint32_t)cmdConfig->cmdIndex | cmdConfig->response
| cmdConfig->wait | cmdConfig->CPSM;
SDIO->CMD = tmpreg;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Convert a signed value in milliseconds to a string, giving time in days, hours, minutes, and seconds, and put the result into a buffer. */
|
gchar* signed_time_msecs_to_str(wmem_allocator_t *scope, gint32 time_val)
|
/* Convert a signed value in milliseconds to a string, giving time in days, hours, minutes, and seconds, and put the result into a buffer. */
gchar* signed_time_msecs_to_str(wmem_allocator_t *scope, gint32 time_val)
|
{
wmem_strbuf_t *buf;
int msecs;
if (time_val == 0) {
return wmem_strdup(scope, "0 seconds");
}
buf = wmem_strbuf_sized_new(scope, TIME_SECS_LEN+1+3+1, TIME_SECS_LEN+1+3+1);
if (time_val<0) {
time_val= -time_val;
msecs = time_val % 1000;
time_val /= 1000;
time_val= -time_val;
} else {
msecs = time_val % 1000;
time_val /= 1000;
}
signed_time_secs_to_str_buf(time_val, msecs, FALSE, buf);
return wmem_strbuf_finalize(buf);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Starts the counter of a timer operating in basic time base mode. */
|
void HRTIM_SimpleBaseStart(HRTIM_TypeDef *HRTIMx, uint32_t TimerIdx)
|
/* Starts the counter of a timer operating in basic time base mode. */
void HRTIM_SimpleBaseStart(HRTIM_TypeDef *HRTIMx, uint32_t TimerIdx)
|
{
assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
__HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* This function is called by the USB core when an interrupt occurs */
|
static irqreturn_t _dwc2_hcd_irq(struct usb_hcd *hcd)
|
/* This function is called by the USB core when an interrupt occurs */
static irqreturn_t _dwc2_hcd_irq(struct usb_hcd *hcd)
|
{
struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
return dwc2_handle_hcd_intr(hsotg);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Stop on FIFO watermark. Enable FIFO watermark level use.. */
|
int32_t lps22hb_stop_on_fifo_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
|
/* Stop on FIFO watermark. Enable FIFO watermark level use.. */
int32_t lps22hb_stop_on_fifo_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
|
{
lps22hb_ctrl_reg2_t ctrl_reg2;
int32_t ret;
ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1);
if(ret == 0){
ctrl_reg2.stop_on_fth = val;
ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1);
}
return ret;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* @buffer: start of memory to be freed Return: status code */
|
efi_status_t efi_free_pool(void *buffer)
|
/* @buffer: start of memory to be freed Return: status code */
efi_status_t efi_free_pool(void *buffer)
|
{
efi_status_t ret;
struct efi_pool_allocation *alloc;
if (!buffer)
return EFI_INVALID_PARAMETER;
ret = efi_check_allocated((uintptr_t)buffer, true);
if (ret != EFI_SUCCESS)
return ret;
alloc = container_of(buffer, struct efi_pool_allocation, data);
if (((uintptr_t)alloc & EFI_PAGE_MASK) ||
alloc->checksum != checksum(alloc)) {
printf("%s: illegal free 0x%p\n", __func__, buffer);
return EFI_INVALID_PARAMETER;
}
alloc->checksum = 0;
ret = efi_free_pages((uintptr_t)alloc, alloc->num_pages);
return ret;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* This function validates the ID Mapping array count for the Performance Monitoring Counter Group (PMCG) node. */
|
STATIC VOID EFIAPI ValidatePmcgIdMappingCount(IN UINT8 *Ptr, IN VOID *Context)
|
/* This function validates the ID Mapping array count for the Performance Monitoring Counter Group (PMCG) node. */
STATIC VOID EFIAPI ValidatePmcgIdMappingCount(IN UINT8 *Ptr, IN VOID *Context)
|
{
if (*(UINT32 *)Ptr > 1) {
IncrementErrorCount ();
Print (L"\nERROR: IORT ID Mapping count must not be greater than 1.");
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* RNG MSP De-Initialization This function freeze the hardware resources used in this example. */
|
void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng)
|
/* RNG MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng)
|
{
if(hrng->Instance==RNG2)
{
__HAL_RCC_RNG2_CLK_DISABLE();
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* For Td guest TDVMCALL_IO is invoked to write I/O port. */
|
UINT8 EFIAPI IoWrite8(IN UINTN Port, IN UINT8 Value)
|
/* For Td guest TDVMCALL_IO is invoked to write I/O port. */
UINT8 EFIAPI IoWrite8(IN UINTN Port, IN UINT8 Value)
|
{
BOOLEAN Flag;
Flag = FilterBeforeIoWrite (FilterWidth8, Port, &Value);
if (Flag) {
if (IsTdxGuest ()) {
TdIoWrite8 (Port, Value);
} else {
__asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port));
}
}
FilterAfterIoWrite (FilterWidth8, Port, &Value);
return Value;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The write_* functions store information in swqe which is used by the hardware to calculate the ip/tcp/udp checksum */
|
static void write_ip_start_end(struct ehea_swqe *swqe, const struct sk_buff *skb)
|
/* The write_* functions store information in swqe which is used by the hardware to calculate the ip/tcp/udp checksum */
static void write_ip_start_end(struct ehea_swqe *swqe, const struct sk_buff *skb)
|
{
swqe->ip_start = skb_network_offset(skb);
swqe->ip_end = (u8)(swqe->ip_start + ip_hdrlen(skb) - 1);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
|
UINT8 EFIAPI S3PciBitFieldAnd8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
|
/* If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT8 EFIAPI S3PciBitFieldAnd8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
|
{
return InternalSavePciWrite8ValueToBootScript (Address, PciBitFieldAnd8 (Address, StartBit, EndBit, AndData));
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Below keeps track of whether the "once per power-on" initialization has been done, because uC code Version or higher allows the uC to be reset at will, and Automatic Equalization may require it. So the state of the reset "pin", as reflected in was_reset parameter to ipath_sd7220_init() is no longer valid. Instead, we check for the actual uC code having been loaded. */
|
static int ipath_ibsd_ucode_loaded(struct ipath_devdata *dd)
|
/* Below keeps track of whether the "once per power-on" initialization has been done, because uC code Version or higher allows the uC to be reset at will, and Automatic Equalization may require it. So the state of the reset "pin", as reflected in was_reset parameter to ipath_sd7220_init() is no longer valid. Instead, we check for the actual uC code having been loaded. */
static int ipath_ibsd_ucode_loaded(struct ipath_devdata *dd)
|
{
if (!dd->serdes_first_init_done && (ipath_sd7220_ib_vfy(dd) > 0))
dd->serdes_first_init_done = 1;
return dd->serdes_first_init_done;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Returns the old value of the registration function */
|
xmlRegisterNodeFunc xmlRegisterNodeDefault(xmlRegisterNodeFunc func)
|
/* Returns the old value of the registration function */
xmlRegisterNodeFunc xmlRegisterNodeDefault(xmlRegisterNodeFunc func)
|
{
xmlRegisterNodeFunc old = xmlRegisterNodeDefaultValue;
__xmlRegisterCallbacks = 1;
xmlRegisterNodeDefaultValue = func;
return(old);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Initializes the DCMI peripheral CROP mode according to the specified parameters in the DCMI_CROPInitStruct. */
|
void DCMI_CROPConfig(DCMI_CROPInitTypeDef *DCMI_CROPInitStruct)
|
/* Initializes the DCMI peripheral CROP mode according to the specified parameters in the DCMI_CROPInitStruct. */
void DCMI_CROPConfig(DCMI_CROPInitTypeDef *DCMI_CROPInitStruct)
|
{
DCMI->CWSTRTR = (uint32_t)((uint32_t)DCMI_CROPInitStruct->DCMI_HorizontalOffsetCount |
((uint32_t)DCMI_CROPInitStruct->DCMI_VerticalStartLine << 16));
DCMI->CWSIZER = (uint32_t)(DCMI_CROPInitStruct->DCMI_CaptureCount |
((uint32_t)DCMI_CROPInitStruct->DCMI_VerticalLineCount << 16));
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* set up SPI callback routines to be called by interrupt service routine. */
|
void SPI_SetCallback(SPI_Type *pSPI, SPI_CallbackType pfnCallback)
|
/* set up SPI callback routines to be called by interrupt service routine. */
void SPI_SetCallback(SPI_Type *pSPI, SPI_CallbackType pfnCallback)
|
{
uint32_t u32Port = ((uint32_t)pSPI-(uint32_t)SPI0)>>12;
ASSERT(u32Port <2);
SPI_Callback[u32Port] = pfnCallback;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* This function is called from common code after relocation and sets up the clock information. */
|
int set_cpu_clk_info(void)
|
/* This function is called from common code after relocation and sets up the clock information. */
int set_cpu_clk_info(void)
|
{
struct clk clk;
struct udevice *dev;
ulong rate;
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_GET_DRIVER(zynq_clk), &dev);
if (ret)
return ret;
for (i = 0; i < 2; i++) {
clk.id = i ? ddr3x_clk : cpu_6or4x_clk;
ret = clk_request(dev, &clk);
if (ret < 0)
return ret;
rate = clk_get_rate(&clk) / 1000000;
if (i)
gd->bd->bi_ddr_freq = rate;
else
gd->bd->bi_arm_freq = rate;
clk_free(&clk);
}
gd->bd->bi_dsp_freq = 0;
return 0;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* SPI0 interrupt handler. Clear the SPI interrupt flag and execute the callback function. */
|
void SPI0IntHandler(void)
|
/* SPI0 interrupt handler. Clear the SPI interrupt flag and execute the callback function. */
void SPI0IntHandler(void)
|
{
unsigned long ulFIFOFlags, ulFlags;
unsigned long ulBase = SPI0_BASE;
ulFIFOFlags = xHWREG(ulBase + SPI_FSR);
ulFlags = xHWREG(ulBase + SPI_SR);
xHWREG(ulBase + SPI_FSR) &= ~ulFIFOFlags;
xHWREG(ulBase + SPI_SR) |= 0xff;
if(g_pfnSPIHandlerCallbacks[0])
{
g_pfnSPIHandlerCallbacks[0](0, 0, (ulFIFOFlags << 16) | ulFlags, 0);
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Simple routine to convert an ASCII hex string to binary data Requires ASCII hex data and buffer to populate with binary data */
|
static gboolean iseries_parse_hex_string(const char *ascii, guint8 *buf, size_t len)
|
/* Simple routine to convert an ASCII hex string to binary data Requires ASCII hex data and buffer to populate with binary data */
static gboolean iseries_parse_hex_string(const char *ascii, guint8 *buf, size_t len)
|
{
size_t i;
int byte;
gint hexvalue;
guint8 bytevalue;
byte = 0;
for (i = 0; i < len; i++)
{
hexvalue = g_ascii_xdigit_value(ascii[i]);
i++;
if (hexvalue == -1)
return FALSE;
bytevalue = (guint8)(hexvalue << 4);
if (i >= len)
return FALSE;
hexvalue = g_ascii_xdigit_value(ascii[i]);
if (hexvalue == -1)
return FALSE;
bytevalue |= (guint8) hexvalue;
buf[byte] = bytevalue;
byte++;
}
return TRUE;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Remove PCI Express port service devices associated with given port and disable MSI-X or MSI for the port. */
|
void pcie_port_device_remove(struct pci_dev *dev)
|
/* Remove PCI Express port service devices associated with given port and disable MSI-X or MSI for the port. */
void pcie_port_device_remove(struct pci_dev *dev)
|
{
device_for_each_child(&dev->dev, NULL, remove_iter);
cleanup_service_irqs(dev);
pci_disable_device(dev);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1) / (X2IPD + 1) / 2^PS */
|
static ulong get_PLLCLK(uint32_t *pllreg)
|
/* PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1) / (X2IPD + 1) / 2^PS */
static ulong get_PLLCLK(uint32_t *pllreg)
|
{
uint8_t i;
const uint32_t clkset = readl(pllreg);
uint64_t rate = CONFIG_SYS_CLK_FREQ;
rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1;
rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1;
do_div(rate, (clkset & 0x1f) + 1);
for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++)
rate >>= 1;
return (ulong)rate;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Fills each init_struct member with its default value. */
|
void COMP_StructInit(COMP_InitTypeDef *init_struct)
|
/* Fills each init_struct member with its default value. */
void COMP_StructInit(COMP_InitTypeDef *init_struct)
|
{
init_struct->Invert = COMP_InvertingInput_IO1;
init_struct->NonInvert = COMP_NonInvertingInput_IO1;
init_struct->Output = COMP_Output_None;
init_struct->BlankingSrce = COMP_BlankingSrce_None;
init_struct->OutputPol = COMP_NonInverted;
init_struct->Hysteresis = COMP_Hysteresis_No;
init_struct->Mode = COMP_Mode_UltraLowPower;
init_struct->OFLT = COMP_Filter_4_Period;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* If any reserved bits in StartAddress are set, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). */
|
UINTN EFIAPI S3PciSegmentReadBuffer(IN UINT64 StartAddress, IN UINTN Size, OUT VOID *Buffer)
|
/* If any reserved bits in StartAddress are set, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). */
UINTN EFIAPI S3PciSegmentReadBuffer(IN UINT64 StartAddress, IN UINTN Size, OUT VOID *Buffer)
|
{
RETURN_STATUS Status;
Status = S3BootScriptSavePciCfg2Write (
S3BootScriptWidthUint8,
RShiftU64 (StartAddress, 32) & 0xffff,
PCI_SEGMENT_LIB_ADDRESS_TO_S3_BOOT_SCRIPT_PCI_ADDRESS (StartAddress),
PciSegmentReadBuffer (StartAddress, Size, Buffer),
Buffer
);
ASSERT_RETURN_ERROR (Status);
return Size;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
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