docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* Write a data to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Step2)
Then users can call this function to continue transmit data to slave. Users call also call xI2CMasterStop() to terminate this transmition and release the I2C bus. */
|
void I2CMasterWriteS2(unsigned long ulBase, unsigned long ulData, xtBoolean bEndTransmition)
|
/* Write a data to the slave, when the master have obtained control of the bus, and waiting for all bus transmiton complete.(Write Step2)
Then users can call this function to continue transmit data to slave. Users call also call xI2CMasterStop() to terminate this transmition and release the I2C bus. */
void I2CMasterWriteS2(unsigned long ulBase, unsigned long ulData, xtBoolean bEndTransmition)
|
{
I2CMasterWriteRequestS2(ulBase, ulData, bEndTransmition);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* This function adds an entry in specified register table, with given register type, register index, bit section and value. */
|
VOID EFIAPI PreSmmCpuRegisterTableWrite(IN UINTN ProcessorNumber, IN REGISTER_TYPE RegisterType, IN UINT64 Index, IN UINT64 ValueMask, IN UINT64 Value)
|
/* This function adds an entry in specified register table, with given register type, register index, bit section and value. */
VOID EFIAPI PreSmmCpuRegisterTableWrite(IN UINTN ProcessorNumber, IN REGISTER_TYPE RegisterType, IN UINT64 Index, IN UINT64 ValueMask, IN UINT64 Value)
|
{
UINT8 Start;
UINT8 End;
UINT8 Length;
Start = (UINT8)LowBitSet64 (ValueMask);
End = (UINT8)HighBitSet64 (ValueMask);
Length = End - Start + 1;
CpuRegisterTableWriteWorker (TRUE, ProcessorNumber, RegisterType, Index, Start, Length, Value, FALSE);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Register the Service C.2 and all its Characteristics... */
|
void service_c_2_2_init(void)
|
/* Register the Service C.2 and all its Characteristics... */
void service_c_2_2_init(void)
|
{
bt_gatt_service_register(&service_c_2_2_svc);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Take the relevant locks and then invoke the actual isr processing code under the lock. */
|
static irqreturn_t i91u_intr(int irqno, void *dev_id)
|
/* Take the relevant locks and then invoke the actual isr processing code under the lock. */
static irqreturn_t i91u_intr(int irqno, void *dev_id)
|
{
struct Scsi_Host *dev = dev_id;
unsigned long flags;
int r;
spin_lock_irqsave(dev->host_lock, flags);
r = initio_isr((struct initio_host *)dev->hostdata);
spin_unlock_irqrestore(dev->host_lock, flags);
if (r)
return IRQ_HANDLED;
else
return IRQ_NONE;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Push the promiscuity flag down to appropriate slaves */
|
static int bond_set_promiscuity(struct bonding *bond, int inc)
|
/* Push the promiscuity flag down to appropriate slaves */
static int bond_set_promiscuity(struct bonding *bond, int inc)
|
{
int err = 0;
if (USES_PRIMARY(bond->params.mode)) {
if (bond->curr_active_slave) {
err = dev_set_promiscuity(bond->curr_active_slave->dev,
inc);
}
} else {
struct slave *slave;
int i;
bond_for_each_slave(bond, slave, i) {
err = dev_set_promiscuity(slave->dev, inc);
if (err)
return err;
}
}
return err;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Two board variants whith adc channel 3 is for board id v10: 1024, v11: 512 v10: adc channel 0 for dnl key v11: adc channel 1 for dnl key */
|
int rockchip_dnl_key_pressed(void)
|
/* Two board variants whith adc channel 3 is for board id v10: 1024, v11: 512 v10: adc channel 0 for dnl key v11: adc channel 1 for dnl key */
int rockchip_dnl_key_pressed(void)
|
{
unsigned int key_val, id_val;
int key_ch;
if (adc_channel_single_shot("saradc", 3, &id_val)) {
printf("%s read board id failed\n", __func__);
return false;
}
if (abs(id_val - 1024) <= 30)
key_ch = 0;
else
key_ch = 1;
if (adc_channel_single_shot("saradc", key_ch, &key_val)) {
printf("%s read adc key val failed\n", __func__);
return false;
}
if (key_val >= KEY_DOWN_MIN_VAL && key_val <= KEY_DOWN_MAX_VAL)
return true;
else
return false;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Note: the tcal field of the tccb header will be updated to reflect added content. */
|
struct dcw* itcw_add_dcw(struct itcw *itcw, u8 cmd, u8 flags, void *cd, u8 cd_count, u32 count)
|
/* Note: the tcal field of the tccb header will be updated to reflect added content. */
struct dcw* itcw_add_dcw(struct itcw *itcw, u8 cmd, u8 flags, void *cd, u8 cd_count, u32 count)
|
{
return tccb_add_dcw(tcw_get_tccb(itcw->tcw), TCCB_MAX_SIZE, cmd,
flags, cd, cd_count, count);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* You can use this function to map the 16.16 signed values to any format required. Do note that the output buffer is 8-bit, so only use an 8-bit format for */
|
map_fixed_to_sdf(FT_16D16 dist, FT_16D16 max_value)
|
/* You can use this function to map the 16.16 signed values to any format required. Do note that the output buffer is 8-bit, so only use an 8-bit format for */
map_fixed_to_sdf(FT_16D16 dist, FT_16D16 max_value)
|
{
FT_SDFFormat out;
FT_16D16 udist;
dist = FT_DivFix( dist, max_value );
udist = dist < 0 ? -dist : dist;
udist >>= 9;
if ( dist > 0 && udist > 127 )
udist = 127;
if ( dist < 0 && udist > 128 )
udist = 128;
out = dist < 0 ? 128 - (FT_SDFFormat)udist
: (FT_SDFFormat)udist + 128;
return out;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* The function reads the requested number of blocks from the device. All the blocks are read, or an error is returned. If there is no media in the device, the function returns EFI_NO_MEDIA. */
|
EFI_STATUS EFIAPI BotReadBlocks2(IN EFI_PEI_SERVICES **PeiServices, IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This, IN UINTN DeviceIndex, IN EFI_PEI_LBA StartLBA, IN UINTN BufferSize, OUT VOID *Buffer)
|
/* The function reads the requested number of blocks from the device. All the blocks are read, or an error is returned. If there is no media in the device, the function returns EFI_NO_MEDIA. */
EFI_STATUS EFIAPI BotReadBlocks2(IN EFI_PEI_SERVICES **PeiServices, IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This, IN UINTN DeviceIndex, IN EFI_PEI_LBA StartLBA, IN UINTN BufferSize, OUT VOID *Buffer)
|
{
PEI_BOT_DEVICE *PeiBotDev;
EFI_STATUS Status;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
}
Status = EFI_SUCCESS;
PeiBotDev = PEI_BOT_DEVICE2_FROM_THIS (This);
Status = BotReadBlocks (
PeiServices,
&PeiBotDev->BlkIoPpi,
DeviceIndex,
StartLBA,
BufferSize,
Buffer
);
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* ppc440spe_adma_prep_dma_xor_zero_sum - prepare CDB group for XOR ZERO_SUM operation */
|
static struct dma_async_tx_descriptor* ppc440spe_adma_prep_dma_xor_zero_sum(struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, size_t len, enum sum_check_flags *result, unsigned long flags)
|
/* ppc440spe_adma_prep_dma_xor_zero_sum - prepare CDB group for XOR ZERO_SUM operation */
static struct dma_async_tx_descriptor* ppc440spe_adma_prep_dma_xor_zero_sum(struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, size_t len, enum sum_check_flags *result, unsigned long flags)
|
{
struct dma_async_tx_descriptor *tx;
dma_addr_t pq[2];
pq[0] = src[0];
pq[1] = 0;
flags |= DMA_PREP_PQ_DISABLE_Q;
tx = ppc440spe_adma_prep_dma_pqzero_sum(chan, pq, &src[1],
src_cnt - 1, 0, len,
result, flags);
return tx;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Unregisters an interrupt handler for the AES module. */
|
void AESIntUnregister(uint32_t ui32Base)
|
/* Unregisters an interrupt handler for the AES module. */
void AESIntUnregister(uint32_t ui32Base)
|
{
ASSERT(ui32Base == AES_BASE);
IntDisable(INT_AES);
IntUnregister(INT_AES);
}
|
micropython/micropython
|
C++
|
Other
| 18,334
|
/* Enables or Disables the RTC TimeStamp functionality with the specified time stamp pin stimulating edge. */
|
void RTC_EnableTimeStamp(uint32_t RTC_TimeStampEdge, FunctionalState Cmd)
|
/* Enables or Disables the RTC TimeStamp functionality with the specified time stamp pin stimulating edge. */
void RTC_EnableTimeStamp(uint32_t RTC_TimeStampEdge, FunctionalState Cmd)
|
{
uint32_t tmpregister = 0;
assert_param(IS_RTC_TIMESTAMP_EDGE_MODE(RTC_TimeStampEdge));
assert_param(IS_FUNCTIONAL_STATE(Cmd));
tmpregister = (uint32_t)(RTC->CTRL & (uint32_t) ~(RTC_CTRL_TSPOL | RTC_CTRL_TSEN));
if (Cmd != DISABLE)
{
tmpregister |= (uint32_t)(RTC_TimeStampEdge | RTC_CTRL_TSEN);
}
else
{
tmpregister |= (uint32_t)(RTC_TimeStampEdge);
}
RTC->WRP = 0xCA;
RTC->WRP = 0x53;
RTC->CTRL = (uint32_t)tmpregister;
RTC->WRP = 0xFF;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* param base Pointer to the FLEXIO_SPI_Type structure. param direction Shift direction of MSB first or LSB first. param buffer The buffer to store the received bytes. param size The number of data bytes to be received. param direction Shift direction of MSB first or LSB first. */
|
void FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)
|
/* param base Pointer to the FLEXIO_SPI_Type structure. param direction Shift direction of MSB first or LSB first. param buffer The buffer to store the received bytes. param size The number of data bytes to be received. param direction Shift direction of MSB first or LSB first. */
void FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)
|
{
assert(buffer);
assert(size);
while (size--)
{
while (!(FLEXIO_SPI_GetStatusFlags(base) & kFLEXIO_SPI_RxBufferFullFlag))
{
}
*buffer++ = FLEXIO_SPI_ReadData(base, direction);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Retrieves the size in bytes of a specific block within a firmware volume. */
|
EFI_STATUS EFIAPI FwVolBlockGetBlockSize(IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, IN CONST EFI_LBA Lba, IN OUT UINTN *BlockSize, IN OUT UINTN *NumberOfBlocks)
|
/* Retrieves the size in bytes of a specific block within a firmware volume. */
EFI_STATUS EFIAPI FwVolBlockGetBlockSize(IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, IN CONST EFI_LBA Lba, IN OUT UINTN *BlockSize, IN OUT UINTN *NumberOfBlocks)
|
{
UINTN TotalBlocks;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
if (Lba >= FvbDevice->NumBlocks) {
return EFI_INVALID_PARAMETER;
}
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)((UINTN)FvbDevice->BaseAddress);
PtrBlockMapEntry = FwVolHeader->BlockMap;
TotalBlocks = 0;
while ((PtrBlockMapEntry->NumBlocks != 0) || (PtrBlockMapEntry->Length != 0)) {
TotalBlocks += PtrBlockMapEntry->NumBlocks;
if (Lba < TotalBlocks) {
break;
}
PtrBlockMapEntry++;
}
*BlockSize = PtrBlockMapEntry->Length;
*NumberOfBlocks = TotalBlocks - (UINTN)Lba;
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Find the reserved window which includes the goal, or the previous one if the goal is not in any window. Returns NULL if there are no windows or if all windows start after the goal. */
|
static struct ext2_reserve_window_node* search_reserve_window(struct rb_root *root, ext2_fsblk_t goal)
|
/* Find the reserved window which includes the goal, or the previous one if the goal is not in any window. Returns NULL if there are no windows or if all windows start after the goal. */
static struct ext2_reserve_window_node* search_reserve_window(struct rb_root *root, ext2_fsblk_t goal)
|
{
struct rb_node *n = root->rb_node;
struct ext2_reserve_window_node *rsv;
if (!n)
return NULL;
do {
rsv = rb_entry(n, struct ext2_reserve_window_node, rsv_node);
if (goal < rsv->rsv_start)
n = n->rb_left;
else if (goal > rsv->rsv_end)
n = n->rb_right;
else
return rsv;
} while (n);
if (rsv->rsv_start > goal) {
n = rb_prev(&rsv->rsv_node);
rsv = rb_entry(n, struct ext2_reserve_window_node, rsv_node);
}
return rsv;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). */
|
UINT32 EFIAPI S3PciSegmentOr32(IN UINT64 Address, IN UINT32 OrData)
|
/* If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). */
UINT32 EFIAPI S3PciSegmentOr32(IN UINT64 Address, IN UINT32 OrData)
|
{
return InternalSavePciSegmentWrite32ValueToBootScript (Address, PciSegmentOr32 (Address, OrData));
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Enable the SPI interrupt of the specified SPI port. */
|
void xSPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
|
/* Enable the SPI interrupt of the specified SPI port. */
void xSPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
|
{
SPIIntEnable(ulBase, ulIntFlags);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* De-multiplex the packet. the packet delivery is processed in two passes. The first pass will enqueue a shared copy of the packet to each IP6 child that accepts the packet. The second pass will deliver a non-shared copy of the packet to each IP6 child that has pending receive requests. Data is copied if more than one child wants to consume the packet, because each IP child needs its own copy of the packet to make changes. */
|
EFI_STATUS Ip6Demultiplex(IN IP6_SERVICE *IpSb, IN EFI_IP6_HEADER *Head, IN NET_BUF *Packet)
|
/* De-multiplex the packet. the packet delivery is processed in two passes. The first pass will enqueue a shared copy of the packet to each IP6 child that accepts the packet. The second pass will deliver a non-shared copy of the packet to each IP6 child that has pending receive requests. Data is copied if more than one child wants to consume the packet, because each IP child needs its own copy of the packet to make changes. */
EFI_STATUS Ip6Demultiplex(IN IP6_SERVICE *IpSb, IN EFI_IP6_HEADER *Head, IN NET_BUF *Packet)
|
{
LIST_ENTRY *Entry;
IP6_INTERFACE *IpIf;
INTN Enqueued;
Enqueued = 0;
NET_LIST_FOR_EACH (Entry, &IpSb->Interfaces) {
IpIf = NET_LIST_USER_STRUCT (Entry, IP6_INTERFACE, Link);
if (IpIf->Configured) {
Enqueued += Ip6InterfaceEnquePacket (IpSb, Head, Packet, IpIf);
}
}
NetbufFree (Packet);
Packet = NULL;
if (Enqueued == 0) {
return EFI_NOT_FOUND;
}
NET_LIST_FOR_EACH (Entry, &IpSb->Interfaces) {
IpIf = NET_LIST_USER_STRUCT (Entry, IP6_INTERFACE, Link);
if (IpIf->Configured) {
Ip6InterfaceDeliverPacket (IpSb, IpIf);
}
}
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Computes 3-bytes hamming codes for a data block whose size is multiple of 256 bytes. Each 256 bytes block gets its own code. */
|
void hamming_compute_256x(const uint8_t *puc_data, uint32_t dw_size, uint8_t *puc_code)
|
/* Computes 3-bytes hamming codes for a data block whose size is multiple of 256 bytes. Each 256 bytes block gets its own code. */
void hamming_compute_256x(const uint8_t *puc_data, uint32_t dw_size, uint8_t *puc_code)
|
{
while (dw_size > 0) {
compute256(puc_data, puc_code);
puc_data += 256;
puc_code += 3;
dw_size -= 256;
}
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Disables I2C 10-bit addressing mode for the master. */
|
void I2C_Disable10BitAddressingMode(I2C_T *i2c)
|
/* Disables I2C 10-bit addressing mode for the master. */
void I2C_Disable10BitAddressingMode(I2C_T *i2c)
|
{
i2c->CTRL2_B.SADDRLEN = BIT_RESET;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Change Logs: Date Author Notes zylx first version. */
|
rt_err_t rt_qspi_configure(struct rt_qspi_device *device, struct rt_qspi_configuration *cfg)
|
/* Change Logs: Date Author Notes zylx first version. */
rt_err_t rt_qspi_configure(struct rt_qspi_device *device, struct rt_qspi_configuration *cfg)
|
{
RT_ASSERT(device != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)device;
rt_err_t result = RT_EOK;
qspi_device->config.parent.mode = cfg->parent.mode;
qspi_device->config.parent.max_hz = cfg->parent.max_hz;
qspi_device->config.parent.data_width = cfg->parent.data_width;
qspi_device->config.parent.reserved = cfg->parent.reserved;
qspi_device->config.medium_size = cfg->medium_size;
qspi_device->config.ddr_mode = cfg->ddr_mode;
qspi_device->config.qspi_dl_width = cfg->qspi_dl_width;
result = rt_spi_configure(&device->parent, &cfg->parent);
return result;
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* IPv6 library code, needed by static components when full IPv6 support is not configured or static. find out if nexthdr is a well-known extension header or a protocol */
|
int ipv6_ext_hdr(u8 nexthdr)
|
/* IPv6 library code, needed by static components when full IPv6 support is not configured or static. find out if nexthdr is a well-known extension header or a protocol */
int ipv6_ext_hdr(u8 nexthdr)
|
{
return ( (nexthdr == NEXTHDR_HOP) ||
(nexthdr == NEXTHDR_ROUTING) ||
(nexthdr == NEXTHDR_FRAGMENT) ||
(nexthdr == NEXTHDR_AUTH) ||
(nexthdr == NEXTHDR_NONE) ||
(nexthdr == NEXTHDR_DEST) );
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* If the return value of the notifier can be and'ed with NOTIFY_STOP_MASK then srcu_notifier_call_chain() will return immediately, with the return value of the notifier function which halted execution. Otherwise the return value is the return value of the last notifier function called. */
|
int __srcu_notifier_call_chain(struct srcu_notifier_head *nh, unsigned long val, void *v, int nr_to_call, int *nr_calls)
|
/* If the return value of the notifier can be and'ed with NOTIFY_STOP_MASK then srcu_notifier_call_chain() will return immediately, with the return value of the notifier function which halted execution. Otherwise the return value is the return value of the last notifier function called. */
int __srcu_notifier_call_chain(struct srcu_notifier_head *nh, unsigned long val, void *v, int nr_to_call, int *nr_calls)
|
{
int ret;
int idx;
idx = srcu_read_lock(&nh->srcu);
ret = notifier_call_chain(&nh->head, val, v, nr_to_call, nr_calls);
srcu_read_unlock(&nh->srcu, idx);
return ret;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Reads the number of empty slots in the write transaction FIFO. */
|
uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base)
|
/* Reads the number of empty slots in the write transaction FIFO. */
uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base)
|
{
ASSERT(ui32Base == EPI0_BASE);
return(HWREG(ui32Base + EPI_O_WFIFOCNT));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Internal helper function which will signal the caller event and clean up resources. */
|
VOID EFIAPI SignalCallerEvent(IN UFS_PASS_THRU_PRIVATE_DATA *Private, IN UFS_PASS_THRU_TRANS_REQ *TransReq)
|
/* Internal helper function which will signal the caller event and clean up resources. */
VOID EFIAPI SignalCallerEvent(IN UFS_PASS_THRU_PRIVATE_DATA *Private, IN UFS_PASS_THRU_TRANS_REQ *TransReq)
|
{
EDKII_UFS_HOST_CONTROLLER_PROTOCOL *UfsHc;
EFI_EVENT CallerEvent;
ASSERT ((Private != NULL) && (TransReq != NULL));
UfsHc = Private->UfsHostController;
CallerEvent = TransReq->CallerEvent;
RemoveEntryList (&TransReq->TransferList);
UfsHc->Flush (UfsHc);
UfsStopExecCmd (Private, TransReq->Slot);
UfsReconcileDataTransferBuffer (Private, TransReq);
if (TransReq->CmdDescMapping != NULL) {
UfsHc->Unmap (UfsHc, TransReq->CmdDescMapping);
}
if (TransReq->CmdDescHost != NULL) {
UfsHc->FreeBuffer (
UfsHc,
EFI_SIZE_TO_PAGES (TransReq->CmdDescSize),
TransReq->CmdDescHost
);
}
FreePool (TransReq);
gBS->SignalEvent (CallerEvent);
return;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Returns CR_OK if a prop/decl pair has been found, CR_VALUE_NOT_FOUND_ERROR if not, or an error code if something bad happens. */
|
enum CRStatus cr_prop_list_lookup_prop(CRPropList *a_this, CRString *a_prop, CRPropList **a_pair)
|
/* Returns CR_OK if a prop/decl pair has been found, CR_VALUE_NOT_FOUND_ERROR if not, or an error code if something bad happens. */
enum CRStatus cr_prop_list_lookup_prop(CRPropList *a_this, CRString *a_prop, CRPropList **a_pair)
|
{
CRPropList *cur = NULL;
g_return_val_if_fail (a_prop && a_pair, CR_BAD_PARAM_ERROR);
if (!a_this)
return CR_VALUE_NOT_FOUND_ERROR;
g_return_val_if_fail (PRIVATE (a_this), CR_BAD_PARAM_ERROR);
for (cur = a_this; cur; cur = PRIVATE (cur)->next) {
if (PRIVATE (cur)->prop
&& PRIVATE (cur)->prop->stryng
&& PRIVATE (cur)->prop->stryng->str
&& a_prop->stryng
&& a_prop->stryng->str
&& !strcmp (PRIVATE (cur)->prop->stryng->str,
a_prop->stryng->str))
break;
}
if (cur) {
*a_pair = cur;
return CR_OK;
}
return CR_VALUE_NOT_FOUND_ERROR;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Returns the last element in the list, or NULL */
|
xmlLinkPtr xmlListEnd(xmlListPtr l)
|
/* Returns the last element in the list, or NULL */
xmlLinkPtr xmlListEnd(xmlListPtr l)
|
{
if (l == NULL)
return(NULL);
return (l->sentinel->prev);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* This function will get the first network interface device with the flags in network interface device list. */
|
struct netdev* netdev_get_first_by_flags(uint16_t flags)
|
/* This function will get the first network interface device with the flags in network interface device list. */
struct netdev* netdev_get_first_by_flags(uint16_t flags)
|
{
rt_base_t level;
rt_slist_t *node = RT_NULL;
struct netdev *netdev = RT_NULL;
if (netdev_list == RT_NULL)
{
return RT_NULL;
}
level = rt_spin_lock_irqsave(&_spinlock);
for (node = &(netdev_list->list); node; node = rt_slist_next(node))
{
netdev = rt_slist_entry(node, struct netdev, list);
if (netdev && (netdev->flags & flags) != 0)
{
rt_spin_unlock_irqrestore(&_spinlock, level);
return netdev;
}
}
rt_spin_unlock_irqrestore(&_spinlock, level);
return RT_NULL;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* User can (and should) define the platform from U-Boot */
|
static int __init m2s_platform_parse(char *s)
|
/* User can (and should) define the platform from U-Boot */
static int __init m2s_platform_parse(char *s)
|
{
if (!strcmp(s, "g4m-vb"))
m2s_platform = PLATFORM_G4M_VB;
else if (!strcmp(s, "m2s-som"))
m2s_platform = PLATFORM_M2S_SOM;
else if (!strcmp(s, "sf2-dev-kit"))
m2s_platform = PLATFORM_SF2_DEV_KIT;
else if (!strcmp(s, "m2s-fg484-som"))
m2s_platform = PLATFORM_M2S_FG484_SOM;
return 1;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* returns SUCCESS if it successfully copied message into the buffer */
|
static s32 igb_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size, u16 vf_number)
|
/* returns SUCCESS if it successfully copied message into the buffer */
static s32 igb_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size, u16 vf_number)
|
{
s32 ret_val;
u16 i;
ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
if (ret_val)
goto out_no_write;
igb_check_for_msg_pf(hw, vf_number);
igb_check_for_ack_pf(hw, vf_number);
for (i = 0; i < size; i++)
array_wr32(E1000_VMBMEM(vf_number), i, msg[i]);
wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS);
hw->mbx.stats.msgs_tx++;
out_no_write:
return ret_val;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* \classmethod mapper() Get or set the pin mapper function. */
|
STATIC mp_obj_t pin_mapper(size_t n_args, const mp_obj_t *args)
|
/* \classmethod mapper() Get or set the pin mapper function. */
STATIC mp_obj_t pin_mapper(size_t n_args, const mp_obj_t *args)
|
{
MP_STATE_PORT(pin_class_mapper) = args[1];
return mp_const_none;
}
return MP_STATE_PORT(pin_class_mapper);
}
|
micropython/micropython
|
C++
|
Other
| 18,334
|
/* Unlock program memory itself. Writes the magic sequence to unlock the program memory you must have already unlocked access to this register! */
|
void flash_unlock_progmem(void)
|
/* Unlock program memory itself. Writes the magic sequence to unlock the program memory you must have already unlocked access to this register! */
void flash_unlock_progmem(void)
|
{
FLASH_PRGKEYR = FLASH_PRGKEYR_PRGKEY1;
FLASH_PRGKEYR = FLASH_PRGKEYR_PRGKEY2;
}
|
libopencm3/libopencm3
|
C++
|
GNU General Public License v3.0
| 2,931
|
/* If the conversion results in an overflow or an underflow condition, then Result is set to INTN_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
|
RETURN_STATUS EFIAPI SafeUint32ToIntn(IN UINT32 Operand, OUT INTN *Result)
|
/* If the conversion results in an overflow or an underflow condition, then Result is set to INTN_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeUint32ToIntn(IN UINT32 Operand, OUT INTN *Result)
|
{
return SafeUint32ToInt32 (Operand, (INT32 *)Result);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function sets poll/final bit in LLC header (based on type of PDU). in I or S pdus, p/f bit is right bit of fourth byte in header. in U pdus p/f bit is fifth bit of third byte. */
|
void llc_pdu_set_pf_bit(struct sk_buff *skb, u8 bit_value)
|
/* This function sets poll/final bit in LLC header (based on type of PDU). in I or S pdus, p/f bit is right bit of fourth byte in header. in U pdus p/f bit is fifth bit of third byte. */
void llc_pdu_set_pf_bit(struct sk_buff *skb, u8 bit_value)
|
{
u8 pdu_type;
struct llc_pdu_sn *pdu;
llc_pdu_decode_pdu_type(skb, &pdu_type);
pdu = llc_pdu_sn_hdr(skb);
switch (pdu_type) {
case LLC_PDU_TYPE_I:
case LLC_PDU_TYPE_S:
pdu->ctrl_2 = (pdu->ctrl_2 & 0xFE) | bit_value;
break;
case LLC_PDU_TYPE_U:
pdu->ctrl_1 |= (pdu->ctrl_1 & 0xEF) | (bit_value << 4);
break;
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* toggle the led every 500ms
, V1.0.0, firmware for GD32F1x0(x=3,5) , V2.0.0, firmware for GD32F1x0(x=3,5,7,9) , V3.0.0, firmware update for GD32F1x0(x=3,5,7,9) */
|
void led_spark(void)
|
/* toggle the led every 500ms
, V1.0.0, firmware for GD32F1x0(x=3,5) , V2.0.0, firmware for GD32F1x0(x=3,5,7,9) , V3.0.0, firmware update for GD32F1x0(x=3,5,7,9) */
void led_spark(void)
|
{
static __IO uint32_t timingdelaylocal = 0;
if(timingdelaylocal) {
if(timingdelaylocal < 500) {
gd_eval_ledon(LED2);
} else {
gd_eval_ledoff(LED2);
}
timingdelaylocal--;
} else {
timingdelaylocal = 1000;
}
}
|
liuxuming/trochili
|
C++
|
Apache License 2.0
| 132
|
/* Completes an AIO request (calls the callback and frees the ACB). */
|
static void qemu_laio_process_completion(struct qemu_laio_state *s, struct qemu_laiocb *laiocb)
|
/* Completes an AIO request (calls the callback and frees the ACB). */
static void qemu_laio_process_completion(struct qemu_laio_state *s, struct qemu_laiocb *laiocb)
|
{
int ret;
ret = laiocb->ret;
if (ret != -ECANCELED) {
if (ret == laiocb->nbytes) {
ret = 0;
} else if (ret >= 0) {
if (laiocb->is_read) {
qemu_iovec_memset(laiocb->qiov, ret, 0,
laiocb->qiov->size - ret);
} else {
ret = -EINVAL;
}
}
laiocb->common.cb(laiocb->common.opaque, ret);
}
qemu_aio_release(laiocb);
}
|
ve3wwg/teensy3_qemu
|
C++
|
Other
| 15
|
/* qt2_boxsethw_flowctl - Turn hardware (RTS/CTS) flow control on and off for a hardware UART. */
|
static int qt2_boxsethw_flowctl(struct usb_serial *serial, unsigned int UartNumber, bool bSet)
|
/* qt2_boxsethw_flowctl - Turn hardware (RTS/CTS) flow control on and off for a hardware UART. */
static int qt2_boxsethw_flowctl(struct usb_serial *serial, unsigned int UartNumber, bool bSet)
|
{
__u8 MCR_Value = 0;
__u8 MSR_Value = 0;
__u16 MOUT_Value = 0;
if (bSet == true) {
MCR_Value = QT2_SERIAL_MCR_RTS;
} else {
MCR_Value = 0;
}
MOUT_Value = MCR_Value << 8;
if (bSet == true) {
MSR_Value = QT2_SERIAL_MSR_CTS;
} else {
MSR_Value = 0;
}
MOUT_Value |= MSR_Value;
return usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
QT2_HW_FLOW_CONTROL_MASK, 0x40, MOUT_Value, UartNumber,
NULL, 0, 300);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Return values: 0 - success -EINVAL - backing format specified, but no file -ENOSPC - can't update the backing file because no space is left in the image file header -ENOTSUP - format driver doesn't support changing the backing file */
|
int bdrv_change_backing_file(BlockDriverState *bs, const char *backing_file, const char *backing_fmt)
|
/* Return values: 0 - success -EINVAL - backing format specified, but no file -ENOSPC - can't update the backing file because no space is left in the image file header -ENOTSUP - format driver doesn't support changing the backing file */
int bdrv_change_backing_file(BlockDriverState *bs, const char *backing_file, const char *backing_fmt)
|
{
BlockDriver *drv = bs->drv;
int ret;
if (backing_fmt && !backing_file) {
return -EINVAL;
}
if (drv->bdrv_change_backing_file != NULL) {
ret = drv->bdrv_change_backing_file(bs, backing_file, backing_fmt);
} else {
ret = -ENOTSUP;
}
if (ret == 0) {
pstrcpy(bs->backing_file, sizeof(bs->backing_file), backing_file ?: "");
pstrcpy(bs->backing_format, sizeof(bs->backing_format), backing_fmt ?: "");
}
return ret;
}
|
ve3wwg/teensy3_qemu
|
C
|
Other
| 15
|
/* This API write the data to the given register. */
|
BMG160_RETURN_FUNCTION_TYPE bmg160_write_register(u8 v_addr_u8, u8 *v_data_u8, u8 v_len_u8)
|
/* This API write the data to the given register. */
BMG160_RETURN_FUNCTION_TYPE bmg160_write_register(u8 v_addr_u8, u8 *v_data_u8, u8 v_len_u8)
|
{
BMG160_RETURN_FUNCTION_TYPE comres = ERROR;
if (p_bmg160 == BMG160_NULL)
{
return E_BMG160_NULL_PTR;
}
else
{
comres = p_bmg160->BMG160_BUS_WRITE_FUNC
(p_bmg160->dev_addr, v_addr_u8, v_data_u8, v_len_u8);
}
return comres;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Disable the ETH DMA Rx Desc receive interrupt. */
|
void ETH_DisableDMARxDescReceiveInterrupt(ETH_DMADescConfig_T *DMARxDesc)
|
/* Disable the ETH DMA Rx Desc receive interrupt. */
void ETH_DisableDMARxDescReceiveInterrupt(ETH_DMADescConfig_T *DMARxDesc)
|
{
DMARxDesc->ControlBufferSize |= ETH_DMARXDESC_DINTC;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Set Direction for USB Device Control Endpoint Parameters: dir: Out (dir == 0), In (dir <> 0) Return Value: None */
|
void USBD_DirCtrlEP(uint32_t dir)
|
/* Set Direction for USB Device Control Endpoint Parameters: dir: Out (dir == 0), In (dir <> 0) Return Value: None */
void USBD_DirCtrlEP(uint32_t dir)
|
{
ep0_dir = 0U;
} else {
ep0_dir = 1U;
}
}
|
ARMmbed/DAPLink
|
C++
|
Apache License 2.0
| 2,140
|
/* Writes and returns a new value to DR5. This function is only available on IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. */
|
UINTN EFIAPI AsmWriteDr5(IN UINTN Value)
|
/* Writes and returns a new value to DR5. This function is only available on IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64. */
UINTN EFIAPI AsmWriteDr5(IN UINTN Value)
|
{
_asm {
mov eax, Value
_emit 0x0f
_emit 0x23
_emit 0xe8
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Description: Free all of the memory in the NetLabel fields of a sk_security_struct. */
|
void selinux_netlbl_sk_security_free(struct sk_security_struct *ssec)
|
/* Description: Free all of the memory in the NetLabel fields of a sk_security_struct. */
void selinux_netlbl_sk_security_free(struct sk_security_struct *ssec)
|
{
if (ssec->nlbl_secattr != NULL)
netlbl_secattr_free(ssec->nlbl_secattr);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Enables or disables the specified DMAy Channelx interrupts. */
|
void DMA_ConfigInt(DMA_ChannelType *DMAyChx, uint32_t DMAInt, FunctionalState Cmd)
|
/* Enables or disables the specified DMAy Channelx interrupts. */
void DMA_ConfigInt(DMA_ChannelType *DMAyChx, uint32_t DMAInt, FunctionalState Cmd)
|
{
assert_param(IS_DMA_ALL_PERIPH(DMAyChx));
assert_param(IS_DMA_CONFIG_INT(DMAInt));
assert_param(IS_FUNCTIONAL_STATE(Cmd));
if (Cmd != DISABLE)
{
DMAyChx->CHCFG |= DMAInt;
}
else
{
DMAyChx->CHCFG &= ~DMAInt;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Change size of area pointed to by 'ptr' to 'size'. If 'ptr' is NULL, then its a malloc(). If 'size' is 0, then its a free(). 'ptr' must be NULL or a pointer to a non-freed area previously returned by simple_realloc() or simple_malloc(). */
|
static void* simple_realloc(void *ptr, unsigned long size)
|
/* Change size of area pointed to by 'ptr' to 'size'. If 'ptr' is NULL, then its a malloc(). If 'size' is 0, then its a free(). 'ptr' must be NULL or a pointer to a non-freed area previously returned by simple_realloc() or simple_malloc(). */
static void* simple_realloc(void *ptr, unsigned long size)
|
{
struct alloc_info *p;
void *new;
if (size == 0) {
simple_free(ptr);
return NULL;
}
if (ptr == NULL)
return simple_malloc(size);
p = simple_find_entry(ptr);
if (p == NULL)
return NULL;
if (size <= p->size)
return ptr;
new = simple_malloc(size);
memcpy(new, ptr, p->size);
simple_free(ptr);
return new;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* send the setup packet to the USB device */
|
usbh_status usbh_ctlsetup_send(usb_core_driver *udev, uint8_t *buf, uint8_t pp_num)
|
/* send the setup packet to the USB device */
usbh_status usbh_ctlsetup_send(usb_core_driver *udev, uint8_t *buf, uint8_t pp_num)
|
{
usb_pipe *pp = &udev->host.pipe[pp_num];
pp->DPID = PIPE_DPID_SETUP;
pp->xfer_buf = buf;
pp->xfer_len = USB_SETUP_PACKET_LEN;
return (usbh_status)usbh_request_submit (udev, pp_num);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Reads the value of the data transfer timeout count. */
|
u32 SDIO_GetTimeOutCounter(void)
|
/* Reads the value of the data transfer timeout count. */
u32 SDIO_GetTimeOutCounter(void)
|
{
return (SDIO->MMC_TIMEOUTCNT & 0xFF);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* USART Disable Half-duplex.
@This bit field can only be written when the USART is disabled. */
|
void usart_disable_halfduplex(uint32_t usart)
|
/* USART Disable Half-duplex.
@This bit field can only be written when the USART is disabled. */
void usart_disable_halfduplex(uint32_t usart)
|
{
USART_CR3(usart) &= ~USART_CR3_HDSEL;
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* Enable the periodic schedule then wait EHC to actually enable it. */
|
EFI_STATUS EhcEnablePeriodSchd(IN USB2_HC_DEV *Ehc, IN UINT32 Timeout)
|
/* Enable the periodic schedule then wait EHC to actually enable it. */
EFI_STATUS EhcEnablePeriodSchd(IN USB2_HC_DEV *Ehc, IN UINT32 Timeout)
|
{
EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_PERIOD);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_PERIOD_ENABLED, TRUE, Timeout);
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Description: This function frees all of the memory associated with a DOI definition. */
|
void cipso_v4_doi_free(struct cipso_v4_doi *doi_def)
|
/* Description: This function frees all of the memory associated with a DOI definition. */
void cipso_v4_doi_free(struct cipso_v4_doi *doi_def)
|
{
if (doi_def == NULL)
return;
switch (doi_def->type) {
case CIPSO_V4_MAP_TRANS:
kfree(doi_def->map.std->lvl.cipso);
kfree(doi_def->map.std->lvl.local);
kfree(doi_def->map.std->cat.cipso);
kfree(doi_def->map.std->cat.local);
break;
}
kfree(doi_def);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* set slave device's address witdh on target I2C channel */
|
aos_status_t aos_i2c_addr_width_set(i2c_dev_handle_t dev_h, uint32_t addr_width)
|
/* set slave device's address witdh on target I2C channel */
aos_status_t aos_i2c_addr_width_set(i2c_dev_handle_t dev_h, uint32_t addr_width)
|
{
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return -EINVAL;
}
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
status = aos_mutex_lock(&slave->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
return -EIO;
}
slave->config.addr_width = addr_width;
status = aos_mutex_unlock(&slave->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
}
return status;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* If 16-bit MMIO register operations are not supported, then ASSERT(). */
|
UINT16 EFIAPI MmioWrite16(IN UINTN Address, IN UINT16 Value)
|
/* If 16-bit MMIO register operations are not supported, then ASSERT(). */
UINT16 EFIAPI MmioWrite16(IN UINTN Address, IN UINT16 Value)
|
{
BOOLEAN Flag;
ASSERT ((Address & 1) == 0);
Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value);
if (Flag) {
*(volatile UINT16 *)Address = Value;
}
FilterAfterMmIoWrite (FilterWidth16, Address, &Value);
return Value;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Add a copy of platform specific data to the platform device's platform_data pointer. The memory associated with the platform data will be freed when the platform device is released. */
|
int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size)
|
/* Add a copy of platform specific data to the platform device's platform_data pointer. The memory associated with the platform data will be freed when the platform device is released. */
int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size)
|
{
void *d = kmemdup(data, size, GFP_KERNEL);
if (d) {
pdev->dev.platform_data = d;
return 0;
}
return -ENOMEM;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* We then sleep until the card has notified us that both rx and tx have been suspended. */
|
static void mc32_halt_transceiver(struct net_device *dev)
|
/* We then sleep until the card has notified us that both rx and tx have been suspended. */
static void mc32_halt_transceiver(struct net_device *dev)
|
{
struct mc32_local *lp = netdev_priv(dev);
int ioaddr = dev->base_addr;
mc32_ready_poll(dev);
lp->rx_box->mbox=0;
outb(HOST_CMD_SUSPND_RX, ioaddr+HOST_CMD);
wait_for_completion(&lp->xceiver_cmd);
mc32_ready_poll(dev);
lp->tx_box->mbox=0;
outb(HOST_CMD_SUSPND_TX, ioaddr+HOST_CMD);
wait_for_completion(&lp->xceiver_cmd);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* R1 (8bit) = R1 R2 (8bit) = R2 R (temp) = min((R1 + R2)/2, 255) DCT (16bit)= C - R C (8bit) = R */
|
void transfer_8to16sub2_c(int16_t *const dct, uint8_t *const cur, const uint8_t *ref1, const uint8_t *ref2, const uint32_t stride)
|
/* R1 (8bit) = R1 R2 (8bit) = R2 R (temp) = min((R1 + R2)/2, 255) DCT (16bit)= C - R C (8bit) = R */
void transfer_8to16sub2_c(int16_t *const dct, uint8_t *const cur, const uint8_t *ref1, const uint8_t *ref2, const uint32_t stride)
|
{
uint32_t i, j;
for (j = 0; j < 8; j++) {
for (i = 0; i < 8; i++) {
const uint8_t c = cur[j * stride + i];
const uint8_t r = (ref1[j * stride + i] + ref2[j * stride + i] + 1) >> 1;
cur[j * stride + i] = r;
dct[j * 8 + i] = (int16_t) c - (int16_t) r;
}
}
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* Disables the RTC used to display the help message. */
|
static void ui_display_disable_rtc(void)
|
/* Disables the RTC used to display the help message. */
static void ui_display_disable_rtc(void)
|
{
rtc_disable_interrupt(&AVR32_RTC);
rtc_disable(&AVR32_RTC);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Enables SIR (IrDA) mode on the specified UART. */
|
void xUARTIrDAEnable(unsigned long ulBase)
|
/* Enables SIR (IrDA) mode on the specified UART. */
void xUARTIrDAEnable(unsigned long ulBase)
|
{
xASSERT(UARTBaseValid(ulBase));
xHWREG(ulBase + UART_FUN_SEL) |= (UART_FUN_SEL_IRDA_EN);
xHWREG(ulBase + UART_FUN_SEL) &= ~(UART_FUN_SEL_LIN_EN);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* get the FMC erase/program protection and D-bus read protection option bytes value */
|
uint16_t ob_drp1_get(void)
|
/* get the FMC erase/program protection and D-bus read protection option bytes value */
uint16_t ob_drp1_get(void)
|
{
if(FMC_OBCTL0 & FMC_OBCTL0_DRP) {
return (uint16_t)(((uint16_t)(FMC_OBCTL1 >> 16U)) & 0x0FFFU);
} else {
return 0xF000U;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Set up the SPI controller for a specified SPI slave device */
|
static int spi_stm32_setup(struct spi_device *s)
|
/* Set up the SPI controller for a specified SPI slave device */
static int spi_stm32_setup(struct spi_device *s)
|
{
struct spi_stm32 *c = spi_master_get_devdata(s->master);
int ret = 0;
if (c->stopping) {
ret = -ESHUTDOWN;
goto Done;
}
if (spi_stm32_hw_bt_check(c, s->bits_per_word)) {
dev_err(&s->dev, "unsupported bits per word %d\n",
s->bits_per_word);
ret = -EINVAL;
goto Done;
}
spi_stm32_release_slave(c, s);
Done:
d_printk(1, "slv=%s,spd=%d,cs=%d,bt=%d,md=0x%x,ret=%d\n",
dev_name(&s->dev), s->max_speed_hz,
s->chip_select, s->bits_per_word, s->mode, ret);
return ret;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Release all the asynchronous transfers on the lsit. */
|
VOID UhciFreeAllAsyncReq(IN USB_HC_DEV *Uhc)
|
/* Release all the asynchronous transfers on the lsit. */
VOID UhciFreeAllAsyncReq(IN USB_HC_DEV *Uhc)
|
{
LIST_ENTRY *Head;
UHCI_ASYNC_REQUEST *AsyncReq;
UhciRecycleAsyncReq (Uhc);
UhciRecycleAsyncReq (Uhc);
Head = &(Uhc->AsyncIntList);
if (IsListEmpty (Head)) {
return;
}
while (!IsListEmpty (Head)) {
AsyncReq = UHCI_ASYNC_INT_FROM_LINK (Head->ForwardLink);
UhciUnlinkAsyncReq (Uhc, AsyncReq, TRUE);
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This routine can be used from both task and interrupt context. */
|
atomic_val_t rhino_atomic_nand(atomic_t *target, atomic_val_t value)
|
/* This routine can be used from both task and interrupt context. */
atomic_val_t rhino_atomic_nand(atomic_t *target, atomic_val_t value)
|
{
CPSR_ALLOC();
atomic_val_t old_value;
RHINO_CPU_INTRPT_DISABLE();
old_value = *target;
*target = ~(*target & value);
RHINO_CPU_INTRPT_ENABLE();
return old_value;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Execute the simulator for at least the specified timeout, then return. Note that this does not affect event timing, so the "next
event" may be significantly after the request if the hardware has not been configured to e.g. send an interrupt when expected. */
|
void nsi_exec_for(uint64_t us)
|
/* Execute the simulator for at least the specified timeout, then return. Note that this does not affect event timing, so the "next
event" may be significantly after the request if the hardware has not been configured to e.g. send an interrupt when expected. */
void nsi_exec_for(uint64_t us)
|
{
uint64_t start = nsi_hws_get_time();
do {
nsi_hws_one_event();
} while (nsi_hws_get_time() < (start + us));
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Converts a text device path node to Hardware PCI device path structure. */
|
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextPci(IN CHAR16 *TextDeviceNode)
|
/* Converts a text device path node to Hardware PCI device path structure. */
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextPci(IN CHAR16 *TextDeviceNode)
|
{
CHAR16 *FunctionStr;
CHAR16 *DeviceStr;
PCI_DEVICE_PATH *Pci;
DeviceStr = GetNextParamStr (&TextDeviceNode);
FunctionStr = GetNextParamStr (&TextDeviceNode);
Pci = (PCI_DEVICE_PATH *)CreateDeviceNode (
HARDWARE_DEVICE_PATH,
HW_PCI_DP,
(UINT16)sizeof (PCI_DEVICE_PATH)
);
Pci->Function = (UINT8)Strtoi (FunctionStr);
Pci->Device = (UINT8)Strtoi (DeviceStr);
return (EFI_DEVICE_PATH_PROTOCOL *)Pci;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Enables or Disables the TimeStamp on Tamper Detection Event. */
|
void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState)
|
/* Enables or Disables the TimeStamp on Tamper Detection Event. */
void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState)
|
{
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
RTC->TMPCFG |= (uint32_t)RTC_TMPCFG_TPTS;
}
else
{
RTC->TMPCFG &= (uint32_t)~RTC_TMPCFG_TPTS;
}
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* hvc_iucv_cleanup() - Clean up and reset a z/VM IUCV HVC instance. @priv: Pointer to the struct */
|
static void hvc_iucv_cleanup(struct hvc_iucv_private *priv)
|
/* hvc_iucv_cleanup() - Clean up and reset a z/VM IUCV HVC instance. @priv: Pointer to the struct */
static void hvc_iucv_cleanup(struct hvc_iucv_private *priv)
|
{
destroy_tty_buffer_list(&priv->tty_outqueue);
destroy_tty_buffer_list(&priv->tty_inqueue);
priv->tty_state = TTY_CLOSED;
priv->iucv_state = IUCV_DISCONN;
priv->sndbuf_len = 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* return The SEMC clock frequency value in hertz. */
|
uint32_t CLOCK_GetSemcFreq(void)
|
/* return The SEMC clock frequency value in hertz. */
uint32_t CLOCK_GetSemcFreq(void)
|
{
uint32_t freq;
if ((CCM->CBCDR & CCM_CBCDR_SEMC_CLK_SEL_MASK) != 0UL)
{
if ((CCM->CBCDR & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK) != 0UL)
{
freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1);
}
else
{
freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
}
}
else
{
freq = CLOCK_GetPeriphClkFreq();
}
freq /= (((CCM->CBCDR & CCM_CBCDR_SEMC_PODF_MASK) >> CCM_CBCDR_SEMC_PODF_SHIFT) + 1U);
return freq;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Waiting the specified bit in the register change to SET/RESET. */
|
ald_status_t ald_wait_flag(uint32_t *reg, uint32_t bit, flag_status_t status, uint32_t timeout)
|
/* Waiting the specified bit in the register change to SET/RESET. */
ald_status_t ald_wait_flag(uint32_t *reg, uint32_t bit, flag_status_t status, uint32_t timeout)
|
{
uint32_t tick = ald_get_tick();
assert_param(timeout > 0);
if (status == SET) {
while (!(IS_BIT_SET(*reg, bit))) {
if (((ald_get_tick()) - tick) > timeout)
return ALD_TIMEOUT;
}
}
else {
while ((IS_BIT_SET(*reg, bit))) {
if (((ald_get_tick()) - tick) > timeout)
return ALD_TIMEOUT;
}
}
return ALD_OK;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* SPI Set Data Frame Format to 8 bits. */
|
void spi_set_dff_8bit(uint32_t spi)
|
/* SPI Set Data Frame Format to 8 bits. */
void spi_set_dff_8bit(uint32_t spi)
|
{
SPI_CR1(spi) &= ~SPI_CR1_DFF;
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* Function to reject the passkey.
Function to reject the passkey following a passkey request event or during the passkey display event */
|
ADI_BLER_RESULT adi_radio_RejectPasskey(uint16_t nConnHandle)
|
/* Function to reject the passkey.
Function to reject the passkey following a passkey request event or during the passkey display event */
ADI_BLER_RESULT adi_radio_RejectPasskey(uint16_t nConnHandle)
|
{
ADI_BLER_RESULT bleResult;
ADI_BLE_LOGEVENT(LOGID_CMD_BLESMP_REJECT_PASSKEY);
ADI_BLE_RADIO_CMD_START(CMD_BLESMP_REJECT_PASSKEY);
memcpy(&pBLERadio->cmdPkt[ADI_RADIO_CMD_HEADER_LEN], &nConnHandle, 2u);
bleResult = bler_process_cmd(CMD_BLESMP_REJECT_PASSKEY, 2u, NULL, 0u);
if(bleResult == ADI_BLER_SUCCESS){
bleResult = ADI_BLE_WAIT_FOR_COMPLETION(ADI_EVENT_FLAG_RESP_SUCCESS,ADI_BLER_CMD_TIMEOUT);
}
ADI_BLE_RADIO_CMD_END();
return (bleResult);
}
|
analogdevicesinc/EVAL-ADICUP3029
|
C++
|
Other
| 36
|
/* Function for configuring SPI slave module.
This function will configure the SPI slave module with the SERCOM module to be used and pinmux settings */
|
static void configure_spi(void)
|
/* Function for configuring SPI slave module.
This function will configure the SPI slave module with the SERCOM module to be used and pinmux settings */
static void configure_spi(void)
|
{
struct spi_config config_spi;
spi_get_config_defaults(&config_spi);
config_spi.mode = SPI_MODE_SLAVE;
config_spi.mux_setting = BOOT_SPI_MUX;
config_spi.mode_specific.slave.preload_enable = true;
config_spi.mode_specific.slave.frame_format = SPI_FRAME_FORMAT_SPI_FRAME;
config_spi.pinmux_pad0 = BOOT_SPI_PAD0;
config_spi.pinmux_pad1 = BOOT_SPI_PAD1;
config_spi.pinmux_pad2 = BOOT_SPI_PAD2;
config_spi.pinmux_pad3 = BOOT_SPI_PAD3;
spi_init(&slave, BOOT_SERCOM, &config_spi);
spi_enable(&slave);
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Set the the LCD entry mode.
The parameter of ucCursorMoveDirection can be: */
|
void HD44780EntryModeSet(unsigned char ucCursorMoveDirection, xtBoolean bDisplayShift)
|
/* Set the the LCD entry mode.
The parameter of ucCursorMoveDirection can be: */
void HD44780EntryModeSet(unsigned char ucCursorMoveDirection, xtBoolean bDisplayShift)
|
{
unsigned char ucDisplayShiftCmd;
xASSERT((ucCursorMoveDirection == HD44780_MOVE_DIRECTION_INC) ||
(ucCursorMoveDirection == HD44780_MOVE_DIRECTION_DEC));
ucDisplayShiftCmd = (bDisplayShift ? HD44780_ENTRY_MODE_SET_S : 0);
while(HD44780Busy());
HD44780WriteCmd(HD44780_CMD_ENTRY_MODE_SET(ucCursorMoveDirection |
ucDisplayShiftCmd));
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Configures the alternate function of a GPIO pin. */
|
void GPIOPinConfigure(unsigned long ulPinConfig)
|
/* Configures the alternate function of a GPIO pin. */
void GPIOPinConfigure(unsigned long ulPinConfig)
|
{
unsigned long ulBase, ulShift;
xASSERT(((ulPinConfig >> 12) & 0xf) <= 4 );
ulBase = g_pulIPRSTRegs[(ulPinConfig >> 12) & 0xf];
ulShift = (ulPinConfig >> 8) & 0xf;
if(ulPinConfig & 0x1)
{
xHWREG(ulBase) |= (0x1 << ulShift);
}
else
{
xHWREG(ulBase) &= ~(0x1 << ulShift);
}
if(ulPinConfig & 0x10)
{
xHWREG(ulBase) |= (0x1 << (ulShift + 8));
}
else
{
xHWREG(ulBase) &= ~(0x1 << (ulShift + 8));
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* This function will attempt to write BufferSize bytes data from the Buffer to the TLS object. */
|
INTN EFIAPI TlsCtrlTrafficIn(IN VOID *Tls, IN VOID *Buffer, IN UINTN BufferSize)
|
/* This function will attempt to write BufferSize bytes data from the Buffer to the TLS object. */
INTN EFIAPI TlsCtrlTrafficIn(IN VOID *Tls, IN VOID *Buffer, IN UINTN BufferSize)
|
{
TLS_CONNECTION *TlsConn;
TlsConn = (TLS_CONNECTION *)Tls;
if ((TlsConn == NULL) || (TlsConn->InBio == 0)) {
return -1;
}
return BIO_write (TlsConn->InBio, Buffer, (UINT32)BufferSize);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Device-specific wrappers around i2c_write_dt and i2c_write_read_dt. These wrappers handle the case where the GT911 did not accept the requested I2C address, and the alternate I2C address is used. */
|
static int gt911_i2c_write(const struct device *dev, const uint8_t *buf, uint32_t num_bytes)
|
/* Device-specific wrappers around i2c_write_dt and i2c_write_read_dt. These wrappers handle the case where the GT911 did not accept the requested I2C address, and the alternate I2C address is used. */
static int gt911_i2c_write(const struct device *dev, const uint8_t *buf, uint32_t num_bytes)
|
{
const struct gt911_config *config = dev->config;
struct gt911_data *data = dev->data;
return i2c_write(config->bus.bus, buf, num_bytes, data->actual_address);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Returns number of selectors, or negative errno. Selectors are numbered starting at zero, and typically correspond to bitfields in hardware registers. */
|
int regulator_count_voltages(struct regulator *regulator)
|
/* Returns number of selectors, or negative errno. Selectors are numbered starting at zero, and typically correspond to bitfields in hardware registers. */
int regulator_count_voltages(struct regulator *regulator)
|
{
struct regulator_dev *rdev = regulator->rdev;
return rdev->desc->n_voltages ? : -EINVAL;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* A small shim to dev_queue_xmit to add the KISS control byte, and do any packet forwarding in operation. */
|
void ax25_queue_xmit(struct sk_buff *skb, struct net_device *dev)
|
/* A small shim to dev_queue_xmit to add the KISS control byte, and do any packet forwarding in operation. */
void ax25_queue_xmit(struct sk_buff *skb, struct net_device *dev)
|
{
unsigned char *ptr;
skb->protocol = ax25_type_trans(skb, ax25_fwd_dev(dev));
ptr = skb_push(skb, 1);
*ptr = 0x00;
dev_queue_xmit(skb);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Verifies push a data in the full stack. */
|
ZTEST(stack_fail, test_stack_push_full)
|
/* Verifies push a data in the full stack. */
ZTEST(stack_fail, test_stack_push_full)
|
{
stack_data_t tx_data[STACK_LEN] = {0};
stack_data_t data_tmp = 0;
k_stack_init(&stack, data, STACK_LEN);
for (int i = 0; i < STACK_LEN; i++) {
zassert_true(k_stack_push(&stack, tx_data[i]) == 0, "push data into stack failed");
}
zassert_true(k_stack_push(&stack, data_tmp) == -ENOMEM, "push data successful");
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Report additional information for an error in command-line arguments. */
|
static void failure_message_cont(const char *msg_format, va_list ap)
|
/* Report additional information for an error in command-line arguments. */
static void failure_message_cont(const char *msg_format, va_list ap)
|
{
vfprintf(stderr, msg_format, ap);
fprintf(stderr, "\n");
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Close an INI config file and free the context. */
|
VOID EFIAPI CloseIniFile(IN VOID *Context)
|
/* Close an INI config file and free the context. */
VOID EFIAPI CloseIniFile(IN VOID *Context)
|
{
INI_PARSING_LIB_CONTEXT *IniContext;
if (Context == NULL) {
return;
}
IniContext = Context;
FreeAllList (IniContext->SectionHead, IniContext->CommentHead);
return;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* RTC driver for XMC microcontroller family.
Initialize the RTC peripheral */
|
XMC_RTC_STATUS_t XMC_RTC_Init(const XMC_RTC_CONFIG_t *const config)
|
/* RTC driver for XMC microcontroller family.
Initialize the RTC peripheral */
XMC_RTC_STATUS_t XMC_RTC_Init(const XMC_RTC_CONFIG_t *const config)
|
{
if (XMC_RTC_IsRunning() == false)
{
if (XMC_RTC_IsEnabled() == false)
{
XMC_RTC_Enable();
}
XMC_RTC_SetPrescaler(config->prescaler);
while ((XMC_SCU_GetMirrorStatus() & (SCU_GENERAL_MIRRSTS_RTC_TIM0_Msk | SCU_GENERAL_MIRRSTS_RTC_TIM1_Msk)) != 0U)
{
}
RTC->TIM0 = config->time.raw0;
RTC->TIM1 = config->time.raw1;
while ((XMC_SCU_GetMirrorStatus() & (SCU_GENERAL_MIRRSTS_RTC_ATIM0_Msk | SCU_GENERAL_MIRRSTS_RTC_ATIM1_Msk)) != 0U)
{
}
RTC->ATIM0 = config->alarm.raw0; RTC->ATIM1 = config->alarm.raw1;
}
return XMC_RTC_STATUS_OK;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* ZigBee Device Profile dissector for the bind response. */
|
void dissect_zbee_zdp_rsp_bind(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
|
/* ZigBee Device Profile dissector for the bind response. */
void dissect_zbee_zdp_rsp_bind(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
|
{
guint offset = 0;
guint8 status;
status = zdp_parse_status(tree, tvb, &offset);
zbee_append_info(tree, pinfo, ", Status: %s", zdp_status_name(status));
zdp_dump_excess(tvb, offset, pinfo, tree);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Compute the authentication tag. The value written in 'tag' must still be CTR-encrypted. */
|
static void do_tag(br_sslrec_gcm_context *cc, int record_type, unsigned version, void *data, size_t len, void *tag)
|
/* Compute the authentication tag. The value written in 'tag' must still be CTR-encrypted. */
static void do_tag(br_sslrec_gcm_context *cc, int record_type, unsigned version, void *data, size_t len, void *tag)
|
{
unsigned char header[13];
unsigned char footer[16];
br_enc64be(header, cc->seq ++);
header[8] = (unsigned char)record_type;
br_enc16be(header + 9, version);
br_enc16be(header + 11, len);
br_enc64be(footer, (uint64_t)(sizeof header) << 3);
br_enc64be(footer + 8, (uint64_t)len << 3);
memset(tag, 0, 16);
cc->gh(tag, cc->h, header, sizeof header);
cc->gh(tag, cc->h, data, len);
cc->gh(tag, cc->h, footer, sizeof footer);
}
|
RavenSystem/esp-homekit-devices
|
C++
|
Other
| 2,577
|
/* Writes a value to an extended PHY register in MMD address space. */
|
void EMACPHYMMDWrite(uint32_t ui32Base, uint8_t ui8PhyAddr, uint16_t ui16RegAddr, uint16_t ui16Data)
|
/* Writes a value to an extended PHY register in MMD address space. */
void EMACPHYMMDWrite(uint32_t ui32Base, uint8_t ui8PhyAddr, uint16_t ui16RegAddr, uint16_t ui16Data)
|
{
ASSERT(ui8PhyAddr < 32);
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL, DEV_ADDR(ui16RegAddr));
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_ADDAR, REG_ADDR(ui16RegAddr));
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
(0x4000 | DEV_ADDR(ui16RegAddr)));
EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL, ui16Data);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Clear "dump in progress" flag and notify waiting processes. */
|
void line6_dump_finished(struct line6_dump_request *l6dr)
|
/* Clear "dump in progress" flag and notify waiting processes. */
void line6_dump_finished(struct line6_dump_request *l6dr)
|
{
l6dr->in_progress = LINE6_DUMP_NONE;
wake_up_interruptible(&l6dr->wait);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* param base RTC peripheral base address param datetime Pointer to structure where the alarm date and time details are stored. */
|
void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)
|
/* param base RTC peripheral base address param datetime Pointer to structure where the alarm date and time details are stored. */
void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)
|
{
assert(datetime);
uint32_t alarmSeconds = 0;
alarmSeconds = base->MATCH;
RTC_ConvertSecondsToDatetime(alarmSeconds, datetime);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Determine if action frame is p2p public action type */
|
static bool brcmf_p2p_is_pub_action(void *frame, u32 frame_len)
|
/* Determine if action frame is p2p public action type */
static bool brcmf_p2p_is_pub_action(void *frame, u32 frame_len)
|
{
struct brcmf_p2p_pub_act_frame *pact_frm;
if (frame == NULL)
return false;
pact_frm = (struct brcmf_p2p_pub_act_frame *)frame;
if (frame_len < sizeof(struct brcmf_p2p_pub_act_frame) - 1)
return false;
if (pact_frm->category == P2P_PUB_AF_CATEGORY &&
pact_frm->action == P2P_PUB_AF_ACTION &&
pact_frm->oui_type == P2P_VER &&
memcmp(pact_frm->oui, P2P_OUI, P2P_OUI_LEN) == 0)
return true;
return false;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* There is much more than just the AC97 mixer... */
|
static int __devinit snd_vortex_mixer(vortex_t *vortex)
|
/* There is much more than just the AC97 mixer... */
static int __devinit snd_vortex_mixer(vortex_t *vortex)
|
{
struct snd_ac97_bus *pbus;
struct snd_ac97_template ac97;
int err;
static struct snd_ac97_bus_ops ops = {
.write = vortex_codec_write,
.read = vortex_codec_read,
};
if ((err = snd_ac97_bus(vortex->card, 0, &ops, NULL, &pbus)) < 0)
return err;
memset(&ac97, 0, sizeof(ac97));
ac97.private_data = vortex;
ac97.scaps = AC97_SCAP_NO_SPDIF;
err = snd_ac97_mixer(pbus, &ac97, &vortex->codec);
vortex->isquad = ((vortex->codec == NULL) ? 0 : (vortex->codec->ext_id&0x80));
return err;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Initialization differs a bit between KN02 and KN03/KN05, so we need two variants. Once set up, all systems can be handled the same way. */
|
static void dec_kn02_be_init(void)
|
/* Initialization differs a bit between KN02 and KN03/KN05, so we need two variants. Once set up, all systems can be handled the same way. */
static void dec_kn02_be_init(void)
|
{
volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);
cached_kn02_csr = *csr | KN02_CSR_LEDS;
cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN);
cached_kn02_csr |= KN02_CSR_CORRECT;
*csr = cached_kn02_csr;
iob();
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* if the return value is not NULL it must be caller freed. */
|
CHAR16* GetFullyQualifiedPath(IN CONST CHAR16 *Path)
|
/* if the return value is not NULL it must be caller freed. */
CHAR16* GetFullyQualifiedPath(IN CONST CHAR16 *Path)
|
{
CHAR16 *PathToReturn;
UINTN Size;
CONST CHAR16 *CurDir;
PathToReturn = NULL;
Size = 0;
ASSERT ((PathToReturn == NULL && Size == 0) || (PathToReturn != NULL));
if (StrStr (Path, L":") == NULL) {
CurDir = gEfiShellProtocol->GetCurDir (NULL);
StrnCatGrow (&PathToReturn, &Size, CurDir, 0);
StrnCatGrow (&PathToReturn, &Size, L"\\", 0);
if (*Path == L'\\') {
Path++;
}
}
StrnCatGrow (&PathToReturn, &Size, Path, 0);
PathCleanUpDirectories (PathToReturn);
if (PathToReturn == NULL) {
return NULL;
}
while (PathToReturn[StrLen (PathToReturn)-1] == L'*') {
PathToReturn[StrLen (PathToReturn)-1] = CHAR_NULL;
}
return (PathToReturn);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Reads the adapter's MAC address from the EEPROM hw - Struct containing variables accessed by shared code */
|
static s32 atl1_read_mac_addr(struct atl1_hw *hw)
|
/* Reads the adapter's MAC address from the EEPROM hw - Struct containing variables accessed by shared code */
static s32 atl1_read_mac_addr(struct atl1_hw *hw)
|
{
u16 i;
if (atl1_get_permanent_address(hw))
random_ether_addr(hw->perm_mac_addr);
for (i = 0; i < ETH_ALEN; i++)
hw->mac_addr[i] = hw->perm_mac_addr[i];
return 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Note: Can only be called from embedded SW threads Calling it from a HW thread is a programming error. */
|
void nce_halt_cpu(void *this_arg)
|
/* Note: Can only be called from embedded SW threads Calling it from a HW thread is a programming error. */
void nce_halt_cpu(void *this_arg)
|
{
struct nce_status_t *this = (struct nce_status_t *)this_arg;
if (this->cpu_halted == true) {
nsi_print_error_and_exit("Programming error on: %s ",
"This CPU was already halted\n");
}
change_cpu_state_and_wait(this, true);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Delay number of tick Systicks (happens every 1 ms). */
|
static void delay_ms(uint32_t ul_dly_ticks)
|
/* Delay number of tick Systicks (happens every 1 ms). */
static void delay_ms(uint32_t ul_dly_ticks)
|
{
uint32_t ul_cur_ticks;
ul_cur_ticks = gs_ul_ms_ticks;
while ((gs_ul_ms_ticks - ul_cur_ticks) < ul_dly_ticks) {
}
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* This function gets the status of the alarm output enables in the Configuration Register 1. */
|
u16 XAdcPs_GetAlarmEnables(XAdcPs *InstancePtr)
|
/* This function gets the status of the alarm output enables in the Configuration Register 1. */
u16 XAdcPs_GetAlarmEnables(XAdcPs *InstancePtr)
|
{
u32 RegValue;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
RegValue = XAdcPs_ReadInternalReg(InstancePtr,
XADCPS_CFR1_OFFSET) & XADCPS_CFR1_ALM_ALL_MASK;
return (u16) (~RegValue & XADCPS_CFR1_ALM_ALL_MASK);
}
|
ua1arn/hftrx
|
C++
| null | 69
|
/* Analog output routine. Selects single channel conversion, selects correct channel, converts from 2's compliment to offset binary if necessary, loads the data into the DAC data register, and performs the conversion. */
|
static int dt282x_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data)
|
/* Analog output routine. Selects single channel conversion, selects correct channel, converts from 2's compliment to offset binary if necessary, loads the data into the DAC data register, and performs the conversion. */
static int dt282x_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data)
|
{
data[0] = devpriv->ao[CR_CHAN(insn->chanspec)];
return 1;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Writes a pre-processed HMAC key to the digest registers in the SHA/MD5 module. */
|
void SHAMD5HMACPPKeySet(uint32_t ui32Base, uint32_t *pui32Src)
|
/* Writes a pre-processed HMAC key to the digest registers in the SHA/MD5 module. */
void SHAMD5HMACPPKeySet(uint32_t ui32Base, uint32_t *pui32Src)
|
{
uint32_t ui32Idx;
ASSERT(ui32Base == SHAMD5_BASE);
for(ui32Idx = 0; ui32Idx < 64; ui32Idx += 4)
{
HWREG(ui32Base + SHAMD5_O_ODIGEST_A + ui32Idx) = *pui32Src++;
}
HWREG(ui32Base + SHAMD5_O_MODE) |= (SHAMD5_MODE_HMAC_OUTER_HASH |
SHAMD5_MODE_CLOSE_HASH);
HWREG(ui32Base + SHAMD5_O_DIGEST_COUNT) = 64;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Retrieves the PCD protocol from the handle database. */
|
PCD_PROTOCOL* EFIAPI GetPcdProtocol(VOID)
|
/* Retrieves the PCD protocol from the handle database. */
PCD_PROTOCOL* EFIAPI GetPcdProtocol(VOID)
|
{
EFI_STATUS Status;
if (mPcd == NULL) {
Status = gBS->LocateProtocol (&gPcdProtocolGuid, NULL, (VOID **)&mPcd);
ASSERT_EFI_ERROR (Status);
ASSERT (mPcd != NULL);
}
return mPcd;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Walk all heuristic dissector tables calling a user supplied function on each table. */
|
void dissector_all_heur_tables_foreach_table(DATFunc_heur_table func, gpointer user_data, GCompareFunc compare_key_func)
|
/* Walk all heuristic dissector tables calling a user supplied function on each table. */
void dissector_all_heur_tables_foreach_table(DATFunc_heur_table func, gpointer user_data, GCompareFunc compare_key_func)
|
{
heur_dissector_foreach_table_info_t info;
GList *list;
info.caller_data = user_data;
info.caller_func = func;
if (compare_key_func != NULL)
{
list = g_hash_table_get_keys(dissector_tables);
list = g_list_sort(list, compare_key_func);
g_list_foreach(list, dissector_all_heur_tables_foreach_list_func, &info);
g_list_free(list);
}
else
{
g_hash_table_foreach(heur_dissector_lists, dissector_all_heur_tables_foreach_table_func, &info);
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Usually follows a call to hpsb_create_hostinfo, where the size is 0. */
|
int hpsb_set_hostinfo(struct hpsb_highlevel *hl, struct hpsb_host *host, void *data)
|
/* Usually follows a call to hpsb_create_hostinfo, where the size is 0. */
int hpsb_set_hostinfo(struct hpsb_highlevel *hl, struct hpsb_host *host, void *data)
|
{
struct hl_host_info *hi;
hi = hl_get_hostinfo(hl, host);
if (hi) {
if (!hi->size && !hi->data) {
hi->data = data;
return 0;
} else
HPSB_ERR("%s called hpsb_set_hostinfo when hostinfo "
"already has data", hl->name);
} else
HPSB_ERR("%s called hpsb_set_hostinfo when no hostinfo exists",
hl->name);
return -EINVAL;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Internal worker function that transfers control to an enabled periodic SMI handler on the specified logical CPU. This worker function is only called using the SMM Services Table function SmmStartupThisAp() to execute the periodic SMI handler on a logical CPU that is different than the one that is running the SMM Foundation. When the periodic SMI handler returns, a lock is released to notify the CPU that is running the SMM Foundation that the periodic SMI handler execution has finished its execution. */
|
VOID EFIAPI PeriodicSmiDispatchFunctionWithLock(IN OUT VOID *Buffer)
|
/* Internal worker function that transfers control to an enabled periodic SMI handler on the specified logical CPU. This worker function is only called using the SMM Services Table function SmmStartupThisAp() to execute the periodic SMI handler on a logical CPU that is different than the one that is running the SMM Foundation. When the periodic SMI handler returns, a lock is released to notify the CPU that is running the SMM Foundation that the periodic SMI handler execution has finished its execution. */
VOID EFIAPI PeriodicSmiDispatchFunctionWithLock(IN OUT VOID *Buffer)
|
{
PERIODIC_SMI_LIBRARY_HANDLER_CONTEXT *PeriodicSmiLibraryHandler;
PeriodicSmiLibraryHandler = (PERIODIC_SMI_LIBRARY_HANDLER_CONTEXT *)Buffer;
PeriodicSmiDispatchFunctionOnCpu (PeriodicSmiLibraryHandler);
ReleaseSpinLock (&PeriodicSmiLibraryHandler->DispatchLock);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The inodes to be written are parked on bdi->b_io. They are moved back onto bdi->b_dirty as they are selected for writing. This way, none can be missed on the writer throttling path, and we get decent balancing between many throttled threads: we don't want them all piling up on inode_sync_wait. */
|
static void wait_sb_inodes(struct super_block *sb)
|
/* The inodes to be written are parked on bdi->b_io. They are moved back onto bdi->b_dirty as they are selected for writing. This way, none can be missed on the writer throttling path, and we get decent balancing between many throttled threads: we don't want them all piling up on inode_sync_wait. */
static void wait_sb_inodes(struct super_block *sb)
|
{
struct inode *inode, *old_inode = NULL;
WARN_ON(!rwsem_is_locked(&sb->s_umount));
spin_lock(&inode_lock);
list_for_each_entry(inode, &sb->s_inodes, i_sb_list) {
struct address_space *mapping;
if (inode->i_state & (I_FREEING|I_CLEAR|I_WILL_FREE|I_NEW))
continue;
mapping = inode->i_mapping;
if (mapping->nrpages == 0)
continue;
__iget(inode);
spin_unlock(&inode_lock);
iput(old_inode);
old_inode = inode;
filemap_fdatawait(mapping);
cond_resched();
spin_lock(&inode_lock);
}
spin_unlock(&inode_lock);
iput(old_inode);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.