docstring stringlengths 22 576 | signature stringlengths 9 317 | prompt stringlengths 57 886 | code stringlengths 20 1.36k | repository stringclasses 49
values | language stringclasses 2
values | license stringclasses 9
values | stars int64 15 21.3k |
|---|---|---|---|---|---|---|---|
/* The control element is supposed to have the private_value field set up via HDA_COMPOSE_AMP_VAL*() or related macros. */ | int snd_hda_mixer_amp_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) | /* The control element is supposed to have the private_value field set up via HDA_COMPOSE_AMP_VAL*() or related macros. */
int snd_hda_mixer_amp_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) | {
int chs = get_amp_channels(kcontrol);
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = chs == 3 ? 2 : 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 1;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* this function calls the 'stop' function on all other CPUs in the system. */ | void smp_send_stop(void) | /* this function calls the 'stop' function on all other CPUs in the system. */
void smp_send_stop(void) | {
send_IPI_allbutself(IPI_CPU_STOP);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* This function will return the type of object without RT_Object_Class_Static flag. */ | rt_uint8_t rt_object_get_type(rt_object_t object) | /* This function will return the type of object without RT_Object_Class_Static flag. */
rt_uint8_t rt_object_get_type(rt_object_t object) | {
RT_ASSERT(object != RT_NULL);
return object->type & ~RT_Object_Class_Static;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Get the I2C time out flag of the specified I2C port.
The */ | xtBoolean I2CTimeoutFlagGet(unsigned long ulBase) | /* Get the I2C time out flag of the specified I2C port.
The */
xtBoolean I2CTimeoutFlagGet(unsigned long ulBase) | {
xASSERT((ulBase == I2C0_BASE) || (ulBase == I2C1_BASE));
return ((xHWREG(ulBase + I2C_CSR) & I2C_CSR_TOUTF) ? xtrue : xfalse);
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Set the fields of structure stc_tmr6_emb_config_t to default values. */ | int32_t TMR6_EMBConfigStructInit(stc_tmr6_emb_config_t *pstcEmbConfig) | /* Set the fields of structure stc_tmr6_emb_config_t to default values. */
int32_t TMR6_EMBConfigStructInit(stc_tmr6_emb_config_t *pstcEmbConfig) | {
int32_t i32Ret = LL_ERR_INVD_PARAM;
if (NULL != pstcEmbConfig) {
pstcEmbConfig->u32PinStatus = TMR6_EMB_PIN_NORMAL;
i32Ret = LL_OK;
}
return i32Ret;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* param base DCP peripheral base address param handle Handle used for this request. param ciphertext Input plain text to encrypt param plaintext Output cipher text param size Size of input and output data in bytes. Must be multiple of 16 bytes. return Status from decrypt operation */ | status_t DCP_AES_DecryptEcb(DCP_Type *base, dcp_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size) | /* param base DCP peripheral base address param handle Handle used for this request. param ciphertext Input plain text to encrypt param plaintext Output cipher text param size Size of input and output data in bytes. Must be multiple of 16 bytes. return Status from decrypt operation */
status_t DCP_AES_DecryptEcb(DCP_Type *base, dcp_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size) | {
status_t completionStatus = kStatus_Fail;
dcp_work_packet_t dcpWork = {0};
do
{
completionStatus = DCP_AES_DecryptEcbNonBlocking(base, handle, &dcpWork, ciphertext, plaintext, size);
} while (completionStatus == kStatus_DCP_Again);
if (completionStatus != kStatus_Success)
{
return completionStatus;
}
return DCP_WaitForChannelComplete(base, handle);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This function handles EXTI line 0 and 1 interrupts. */ | void EXTI0_1_IRQHandler(void) | /* This function handles EXTI line 0 and 1 interrupts. */
void EXTI0_1_IRQHandler(void) | {
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
gyro_data_ready_cb();
} | Luos-io/luos_engine | C++ | MIT License | 496 |
/* Configures the type of transfer request for the master. */ | void I2C_ConfigMasterRequest(I2C_T *i2c, I2C_DIRECTION_T direction) | /* Configures the type of transfer request for the master. */
void I2C_ConfigMasterRequest(I2C_T *i2c, I2C_DIRECTION_T direction) | {
i2c->CTRL2_B.TXDIR = direction ;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* ip6_tnl_dev_init - initializer for all non fallback tunnel devices @dev: virtual device associated with tunnel */ | static void ip6_tnl_dev_init(struct net_device *dev) | /* ip6_tnl_dev_init - initializer for all non fallback tunnel devices @dev: virtual device associated with tunnel */
static void ip6_tnl_dev_init(struct net_device *dev) | {
struct ip6_tnl *t = netdev_priv(dev);
ip6_tnl_dev_init_gen(dev);
ip6_tnl_link_config(t);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Return the string to be used as a prompt by the interpreter. Leave the string (or nil, if using the default value) on the stack, to keep it anchored. */ | static const char* get_prompt(lua_State *L, int firstline) | /* Return the string to be used as a prompt by the interpreter. Leave the string (or nil, if using the default value) on the stack, to keep it anchored. */
static const char* get_prompt(lua_State *L, int firstline) | {
const char *p = luaL_tolstring(L, -1, NULL);
lua_remove(L, -2);
return p;
}
} | Nicholas3388/LuaNode | C++ | Other | 1,055 |
/* Initializes the ADCs peripherals according to the specified parameters in the ADC_CommonInitStruct. */ | void ADC_CommonInit(ADC_CommonInitTypeDef *ADC_CommonInitStruct) | /* Initializes the ADCs peripherals according to the specified parameters in the ADC_CommonInitStruct. */
void ADC_CommonInit(ADC_CommonInitTypeDef *ADC_CommonInitStruct) | {
uint32_t tmpreg = 0;
assert_param(IS_ADC_PRESCALER(ADC_CommonInitStruct->ADC_Prescaler));
tmpreg = ADC->CCR;
tmpreg &= CR_CLEAR_MASK;
tmpreg |= (uint32_t)(ADC_CommonInitStruct->ADC_Prescaler);
ADC->CCR = tmpreg;
} | avem-labs/Avem | C++ | MIT License | 1,752 |
/* Remove all events that have been submitted for a given object, be it serio port or driver. */ | static void serio_remove_pending_events(void *object) | /* Remove all events that have been submitted for a given object, be it serio port or driver. */
static void serio_remove_pending_events(void *object) | {
struct list_head *node, *next;
struct serio_event *event;
unsigned long flags;
spin_lock_irqsave(&serio_event_lock, flags);
list_for_each_safe(node, next, &serio_event_list) {
event = list_entry(node, struct serio_event, node);
if (event->object == object) {
list_del_init(node);
serio_free_event(event);
}
}
spin_unlock_irqrestore(&serio_event_lock, flags);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Read bytes from SDIO fifo.
Reads bytes from SDIO register, treating it as a fifo. Reads will all be done from same address. */ | int sdio_read_fifo(struct sdio_func *func, uint32_t reg, uint8_t *data, uint32_t len) | /* Read bytes from SDIO fifo.
Reads bytes from SDIO register, treating it as a fifo. Reads will all be done from same address. */
int sdio_read_fifo(struct sdio_func *func, uint32_t reg, uint8_t *data, uint32_t len) | {
int ret;
if ((func->card->type != CARD_SDIO) && (func->card->type != CARD_COMBO)) {
LOG_WRN("Card does not support SDIO commands");
return -ENOTSUP;
}
ret = k_mutex_lock(&func->card->lock, K_MSEC(CONFIG_SD_DATA_TIMEOUT));
if (ret) {
LOG_WRN("Could not get SD card mutex");
return -EBUSY;
}
ret = sdio_io_rw_extended_helper(func, SDIO_IO_READ, reg, false,
data, len);
k_mutex_unlock(&func->card->lock);
return ret;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Find a single attribute in a stream of attributes. */ | struct nlattr* nla_find(struct nlattr *head, int len, int attrtype) | /* Find a single attribute in a stream of attributes. */
struct nlattr* nla_find(struct nlattr *head, int len, int attrtype) | {
struct nlattr *nla;
int rem;
nla_for_each_attr(nla, head, len, rem)
if (nla_type(nla) == attrtype)
return nla;
return NULL;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Routine: misc_init_r Description: Configure zoom board specific configurations */ | int misc_init_r(void) | /* Routine: misc_init_r Description: Configure zoom board specific configurations */
int misc_init_r(void) | {
zoom2_identify();
twl4030_power_init();
twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
dieid_num_r();
if (ZOOM2_REVISION_PRODUCTION <= zoom2_get_revision())
twl4030_power_reset_init();
return 0;
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* Read a MLS level structure from a policydb binary representation file. */ | static int mls_read_level(struct mls_level *lp, void *fp) | /* Read a MLS level structure from a policydb binary representation file. */
static int mls_read_level(struct mls_level *lp, void *fp) | {
__le32 buf[1];
int rc;
memset(lp, 0, sizeof(*lp));
rc = next_entry(buf, fp, sizeof buf);
if (rc < 0) {
printk(KERN_ERR "SELinux: mls: truncated level\n");
goto bad;
}
lp->sens = le32_to_cpu(buf[0]);
if (ebitmap_read(&lp->cat, fp)) {
printk(KERN_ERR "SELinux: mls: error reading level "
"categories\n");
goto bad;
}
return 0;
bad:
return -EINVAL;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Get the local APIC ID of the executing processor. */ | UINT32 EFIAPI GetApicId(VOID) | /* Get the local APIC ID of the executing processor. */
UINT32 EFIAPI GetApicId(VOID) | {
UINT32 ApicId;
UINT32 InitApicId;
ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
ApicId = ((InitApicId = GetInitialApicId ()) < 0x100) ? (ApicId >> 24) : InitApicId;
}
return ApicId;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Process the ICMP query message. If it is an ICMP echo request, answer it. Otherwise deliver it to upper layer. */ | EFI_STATUS Ip4ProcessIcmpQuery(IN IP4_SERVICE *IpSb, IN IP4_HEAD *Head, IN NET_BUF *Packet) | /* Process the ICMP query message. If it is an ICMP echo request, answer it. Otherwise deliver it to upper layer. */
EFI_STATUS Ip4ProcessIcmpQuery(IN IP4_SERVICE *IpSb, IN IP4_HEAD *Head, IN NET_BUF *Packet) | {
IP4_ICMP_QUERY_HEAD Icmp;
if (Packet->TotalSize < sizeof (Icmp)) {
NetbufFree (Packet);
return EFI_INVALID_PARAMETER;
}
NetbufCopy (Packet, 0, sizeof (Icmp), (UINT8 *)&Icmp);
if (Icmp.Head.Type == ICMP_ECHO_REQUEST) {
return Ip4IcmpReplyEcho (IpSb, Head, Packet);
}
return Ip4Demultiplex (IpSb, Head, Packet, NULL, 0);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* GNU Indent formatting options for this file: -kr -i8 -npsl -pcs If a hyphen was found in get_option, this will handle the range of numbers, M-N. This will expand the range and insert the values into the ints array in get_options. */ | static int get_range(char **str, int *pint) | /* GNU Indent formatting options for this file: -kr -i8 -npsl -pcs If a hyphen was found in get_option, this will handle the range of numbers, M-N. This will expand the range and insert the values into the ints array in get_options. */
static int get_range(char **str, int *pint) | {
int x, inc_counter, upper_range;
(*str)++;
upper_range = simple_strtol((*str), NULL, 0);
inc_counter = upper_range - *pint;
for (x = *pint; x < upper_range; x++)
*pint++ = x;
return inc_counter;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Ported from Intel released Quark UEFI BIOS QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei Enable HTE to detect all possible errors for the given training parameters (per-bit or full byte lane). */ | static void hte_enable_all_errors(void) | /* Ported from Intel released Quark UEFI BIOS QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei Enable HTE to detect all possible errors for the given training parameters (per-bit or full byte lane). */
static void hte_enable_all_errors(void) | {
msg_port_write(HTE, 0x000200a2, 0xffffffff);
msg_port_write(HTE, 0x000200a3, 0x000000ff);
msg_port_write(HTE, 0x000200a4, 0x00000000);
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Checks whether this tx descriptor is last tx descriptor. This returns true if it is last descriptor either in ring mode or in chain mode. */ | bool synopGMAC_is_last_tx_desc(synopGMACdevice *gmacdev, DmaDesc *desc) | /* Checks whether this tx descriptor is last tx descriptor. This returns true if it is last descriptor either in ring mode or in chain mode. */
bool synopGMAC_is_last_tx_desc(synopGMACdevice *gmacdev, DmaDesc *desc) | {
return (((desc->status & TxDescEndOfRing) == TxDescEndOfRing));
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* ks_inblk - read a block of data from QMU. This is called after sudo DMA mode enabled. @ks: The chip state @wptr: buffer address to save data @len: length in byte to read */ | static void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len) | /* ks_inblk - read a block of data from QMU. This is called after sudo DMA mode enabled. @ks: The chip state @wptr: buffer address to save data @len: length in byte to read */
static void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len) | {
len >>= 1;
while (len--)
*wptr++ = readw(dev->iobase);
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Check the status of the Tx buffer of the specified SPI port. */ | xtBoolean SPIIsTxEmpty(unsigned long ulBase) | /* Check the status of the Tx buffer of the specified SPI port. */
xtBoolean SPIIsTxEmpty(unsigned long ulBase) | {
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE));
return ((xHWREG(ulBase + SPI_CNTRL) & SPI_CNTRL_TX_EMPTY)? xtrue : xfalse);
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* This code gets the pointer to the variable name. */ | CHAR16* GetVariableNamePtr(IN VARIABLE_HEADER *Variable, IN BOOLEAN AuthFormat) | /* This code gets the pointer to the variable name. */
CHAR16* GetVariableNamePtr(IN VARIABLE_HEADER *Variable, IN BOOLEAN AuthFormat) | {
return (CHAR16 *)((UINTN)Variable + GetVariableHeaderSize (AuthFormat));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Receive a piece of data in non-blocking way. */ | static void SAI_ReadNonBlocking(I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t endChannel, uint32_t bitWidth, uint8_t *buffer, uint32_t size) | /* Receive a piece of data in non-blocking way. */
static void SAI_ReadNonBlocking(I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t endChannel, uint32_t bitWidth, uint8_t *buffer, uint32_t size) | {
uint32_t i = 0;
uint8_t j = 0, m = 0;
uint8_t bytesPerWord = bitWidth / 8U;
uint32_t data = 0;
for (i = 0; i < size / bytesPerWord; i++)
{
for (j = channel; j <= endChannel; j++)
{
if ((1U << j) & channelMask)
{
data = base->RDR[j];
for (m = 0; m < bytesPerWord; m++)
{
*buffer = (data >> (8U * m)) & 0xFF;
buffer++;
}
}
}
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If Length > 0 and Buffer is NULL, then ASSERT(). If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). */ | VOID* EFIAPI ZeroMem(OUT VOID *Buffer, IN UINTN Length) | /* If Length > 0 and Buffer is NULL, then ASSERT(). If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). */
VOID* EFIAPI ZeroMem(OUT VOID *Buffer, IN UINTN Length) | {
if (Length == 0) {
return Buffer;
}
ASSERT (Buffer != NULL);
ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
return InternalMemZeroMem (Buffer, Length);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* set the SSL verify depth of the SSL context */ | void SSL_CTX_set_verify_depth(SSL_CTX *ctx, int depth) | /* set the SSL verify depth of the SSL context */
void SSL_CTX_set_verify_depth(SSL_CTX *ctx, int depth) | {
SSL_ASSERT3(ctx);
ctx->param.depth = depth;
} | retro-esp32/RetroESP32 | C++ | Creative Commons Attribution Share Alike 4.0 International | 581 |
/* Checks whether the specified ADC flag is set or not. */ | FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef *ADCx, uint32_t ADC_FLAG) | /* Checks whether the specified ADC flag is set or not. */
FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef *ADCx, uint32_t ADC_FLAG) | {
uint32_t tmpreg1 = 0;
FlagStatus bitstatus = RESET;
assert_param(IS_ADC_ALL_PERIPH(ADCx));
assert_param(IS_ADC_GET_COMMONFLAG(ADC_FLAG));
if((ADCx == ADC1) || (ADCx == ADC2))
{
tmpreg1 = ADC1_2->CSR;
}
else
{
tmpreg1 = ADC3_4->CSR;
}
if ((tmpreg1 & ADC_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
} | ajhc/demo-cortex-m3 | C++ | null | 38 |
/* retval kStatusSuccess Success to Switch SRAM powered by VBAT. retval kStatus_VBAT_Fro16kNotEnabled Fail to switch SRAM powered by VBAT due to FRO16K not enabled previously. */ | status_t VBAT_SwitchSRAMPowerByLDOSRAM(VBAT_Type *base) | /* retval kStatusSuccess Success to Switch SRAM powered by VBAT. retval kStatus_VBAT_Fro16kNotEnabled Fail to switch SRAM powered by VBAT due to FRO16K not enabled previously. */
status_t VBAT_SwitchSRAMPowerByLDOSRAM(VBAT_Type *base) | {
status_t status = kStatus_Success;
status = VBAT_EnableBandgap(base, true);
if (status == kStatus_Success)
{
VBAT_EnableBandgapRefreshMode(base, true);
(void)VBAT_EnableBackupSRAMRegulator(base, true);
base->LDORAMC |= VBAT_LDORAMC_ISO_MASK;
base->LDORAMC |= VBAT_LDORAMC_SWI_MASK;
}
return status;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If 16-bit I/O port operations are not supported, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */ | UINT16 EFIAPI S3IoBitFieldAnd16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData) | /* If 16-bit I/O port operations are not supported, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT16 EFIAPI S3IoBitFieldAnd16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData) | {
return InternalSaveIoWrite16ValueToBootScript (Port, IoBitFieldAnd16 (Port, StartBit, EndBit, AndData));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* The layout of the device page is a "struct lguest_device_desc" followed by a number of virtqueue descriptors, then two sets of feature bits, then an array of configuration bytes. This routine returns the configuration pointer. */ | static u8* device_config(const struct device *dev) | /* The layout of the device page is a "struct lguest_device_desc" followed by a number of virtqueue descriptors, then two sets of feature bits, then an array of configuration bytes. This routine returns the configuration pointer. */
static u8* device_config(const struct device *dev) | {
return (void *)(dev->desc + 1)
+ dev->num_vq * sizeof(struct lguest_vqconfig)
+ dev->feature_len * 2;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Put utf8 character to tty flip buffer. UTF-8 is defined for words of up to 31 bits, but we need only 16 bits here */ | static void to_utf8(struct tty_struct *tty, ushort c) | /* Put utf8 character to tty flip buffer. UTF-8 is defined for words of up to 31 bits, but we need only 16 bits here */
static void to_utf8(struct tty_struct *tty, ushort c) | {
if (c < 0x80)
kbd_put_queue(tty, c);
else if (c < 0x800) {
kbd_put_queue(tty, 0xc0 | (c >> 6));
kbd_put_queue(tty, 0x80 | (c & 0x3f));
} else {
kbd_put_queue(tty, 0xe0 | (c >> 12));
kbd_put_queue(tty, 0x80 | ((c >> 6) & 0x3f));
kbd_put_queue(tty, 0x80 | (c & 0x3f));
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* DMA Channel Enable Memory Increment after Transfer.
Following each transfer the current memory address is incremented by 1, 2 or 4 depending on the data size set in */ | void dma_enable_memory_increment_mode(uint32_t dma, uint8_t channel) | /* DMA Channel Enable Memory Increment after Transfer.
Following each transfer the current memory address is incremented by 1, 2 or 4 depending on the data size set in */
void dma_enable_memory_increment_mode(uint32_t dma, uint8_t channel) | {
DMA_CCR(dma, channel) |= DMA_CCR_MINC;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* The function is used to read/write UFS device descriptors. The consumer of this API is responsible for allocating the data buffer pointed by Descriptor. */ | EFI_STATUS EFIAPI UfsRwUfsDescriptor(IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This, IN BOOLEAN Read, IN UINT8 DescId, IN UINT8 Index, IN UINT8 Selector, IN OUT UINT8 *Descriptor, IN OUT UINT32 *DescSize) | /* The function is used to read/write UFS device descriptors. The consumer of this API is responsible for allocating the data buffer pointed by Descriptor. */
EFI_STATUS EFIAPI UfsRwUfsDescriptor(IN EFI_UFS_DEVICE_CONFIG_PROTOCOL *This, IN BOOLEAN Read, IN UINT8 DescId, IN UINT8 Index, IN UINT8 Selector, IN OUT UINT8 *Descriptor, IN OUT UINT32 *DescSize) | {
EFI_STATUS Status;
UFS_PASS_THRU_PRIVATE_DATA *Private;
Private = UFS_PASS_THRU_PRIVATE_DATA_FROM_DEV_CONFIG (This);
if ((This == NULL) || (Descriptor == NULL) || (DescSize == NULL)) {
return EFI_INVALID_PARAMETER;
}
Status = UfsRwDeviceDesc (
Private,
Read,
DescId,
Index,
Selector,
Descriptor,
DescSize
);
if (Status == EFI_TIMEOUT) {
Status = EFI_DEVICE_ERROR;
}
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* V2I name comparison function: returns zero if 'name' matches cmp or cmp.* */ | int name_cmp(const char *name, const char *cmp) | /* V2I name comparison function: returns zero if 'name' matches cmp or cmp.* */
int name_cmp(const char *name, const char *cmp) | {
int len, ret;
char c;
len = strlen(cmp);
if ((ret = strncmp(name, cmp, len)))
return ret;
c = name[len];
if (!c || (c == '.'))
return 0;
return 1;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Get the bitmap and summary inodes into the mount structure at mount time. */ | int xfs_rtmount_inodes(xfs_mount_t *mp) | /* Get the bitmap and summary inodes into the mount structure at mount time. */
int xfs_rtmount_inodes(xfs_mount_t *mp) | {
int error;
xfs_sb_t *sbp;
sbp = &mp->m_sb;
if (sbp->sb_rbmino == NULLFSINO)
return 0;
error = xfs_iget(mp, NULL, sbp->sb_rbmino, 0, 0, &mp->m_rbmip, 0);
if (error)
return error;
ASSERT(mp->m_rbmip != NULL);
ASSERT(sbp->sb_rsumino != NULLFSINO);
error = xfs_iget(mp, NULL, sbp->sb_rsumino, 0, 0, &mp->m_rsumip, 0);
if (error) {
IRELE(mp->m_rbmip);
return error;
}
ASSERT(mp->m_rsumip != NULL);
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* allocates a new chunk of X nodes, and links them all together as a list. Uses the cnode->next and cnode->prev pointers returns NULL on failure */ | static struct reiserfs_journal_cnode* allocate_cnodes(int num_cnodes) | /* allocates a new chunk of X nodes, and links them all together as a list. Uses the cnode->next and cnode->prev pointers returns NULL on failure */
static struct reiserfs_journal_cnode* allocate_cnodes(int num_cnodes) | {
struct reiserfs_journal_cnode *head;
int i;
if (num_cnodes <= 0) {
return NULL;
}
head = vmalloc(num_cnodes * sizeof(struct reiserfs_journal_cnode));
if (!head) {
return NULL;
}
memset(head, 0, num_cnodes * sizeof(struct reiserfs_journal_cnode));
head[0].prev = NULL;
head[0].next = head + 1;
for (i = 1; i < num_cnodes; i++) {
head[i].prev = head + (i - 1);
head[i].next = head + (i + 1);
}
head[num_cnodes - 1].next = NULL;
return head;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns: The index of the region on success, else negative on error. */ | int generic_get_free_region(unsigned long base, unsigned long size, int replace_reg) | /* Returns: The index of the region on success, else negative on error. */
int generic_get_free_region(unsigned long base, unsigned long size, int replace_reg) | {
unsigned long lbase, lsize;
mtrr_type ltype;
int i, max;
max = num_var_ranges;
if (replace_reg >= 0 && replace_reg < max)
return replace_reg;
for (i = 0; i < max; ++i) {
mtrr_if->get(i, &lbase, &lsize, <ype);
if (lsize == 0)
return i;
}
return -ENOSPC;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Clean up the dynamic opcode at label and form specified by both LabelId. */ | VOID CleanUpPage(IN UINT16 LabelId, IN TLS_AUTH_CONFIG_PRIVATE_DATA *PrivateData) | /* Clean up the dynamic opcode at label and form specified by both LabelId. */
VOID CleanUpPage(IN UINT16 LabelId, IN TLS_AUTH_CONFIG_PRIVATE_DATA *PrivateData) | {
RefreshUpdateData ();
mStartLabel->Number = LabelId;
HiiUpdateForm (
PrivateData->RegisteredHandle,
&gTlsAuthConfigGuid,
LabelId,
mStartOpCodeHandle,
mEndOpCodeHandle
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Calculate the corresponding pci bus address according to the Mem parameter. */ | EFI_PHYSICAL_ADDRESS UsbHcGetPciAddressForHostMem(IN USBHC_MEM_POOL *Pool, IN VOID *Mem, IN UINTN Size) | /* Calculate the corresponding pci bus address according to the Mem parameter. */
EFI_PHYSICAL_ADDRESS UsbHcGetPciAddressForHostMem(IN USBHC_MEM_POOL *Pool, IN VOID *Mem, IN UINTN Size) | {
USBHC_MEM_BLOCK *Head;
USBHC_MEM_BLOCK *Block;
UINTN AllocSize;
EFI_PHYSICAL_ADDRESS PhyAddr;
UINTN Offset;
Head = Pool->Head;
AllocSize = USBHC_MEM_ROUND (Size);
if (Mem == NULL) {
return 0;
}
for (Block = Head; Block != NULL; Block = Block->Next) {
if ((Block->BufHost <= (UINT8 *)Mem) && (((UINT8 *)Mem + AllocSize) <= (Block->BufHost + Block->BufLen))) {
break;
}
}
ASSERT ((Block != NULL));
if (Block == NULL) {
return 0;
}
Offset = (UINT8 *)Mem - Block->BufHost;
PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)(Block->Buf + Offset);
return PhyAddr;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Allocate and initialize an quotaoff item of the correct quota type(s). */ | xfs_qoff_logitem_t* xfs_qm_qoff_logitem_init(struct xfs_mount *mp, xfs_qoff_logitem_t *start, uint flags) | /* Allocate and initialize an quotaoff item of the correct quota type(s). */
xfs_qoff_logitem_t* xfs_qm_qoff_logitem_init(struct xfs_mount *mp, xfs_qoff_logitem_t *start, uint flags) | {
xfs_qoff_logitem_t *qf;
qf = (xfs_qoff_logitem_t*) kmem_zalloc(sizeof(xfs_qoff_logitem_t), KM_SLEEP);
qf->qql_item.li_type = XFS_LI_QUOTAOFF;
if (start)
qf->qql_item.li_ops = &xfs_qm_qoffend_logitem_ops;
else
qf->qql_item.li_ops = &xfs_qm_qoff_logitem_ops;
qf->qql_item.li_mountp = mp;
qf->qql_format.qf_type = XFS_LI_QUOTAOFF;
qf->qql_format.qf_flags = flags;
qf->qql_start_lip = start;
return (qf);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Handles an incoming ATT error response for the specified find-included-services proc. */ | static void ble_gattc_find_inc_svcs_err(struct ble_gattc_proc *proc, int status, uint16_t att_handle) | /* Handles an incoming ATT error response for the specified find-included-services proc. */
static void ble_gattc_find_inc_svcs_err(struct ble_gattc_proc *proc, int status, uint16_t att_handle) | {
ble_gattc_dbg_assert_proc_not_inserted(proc);
if (proc->find_inc_svcs.cur_start == 0 &&
status == BLE_HS_ATT_ERR(BLE_ATT_ERR_ATTR_NOT_FOUND)) {
status = BLE_HS_EDONE;
}
ble_gattc_find_inc_svcs_cb(proc, status, att_handle, NULL);
} | Nicholas3388/LuaNode | C++ | Other | 1,055 |
/* Checks if the linked list with block nodes is empty. So when it does not contain any nodes. */ | static uint8_t TbxMemPoolBlockListIsEmpty(tBlockList const *listPtr) | /* Checks if the linked list with block nodes is empty. So when it does not contain any nodes. */
static uint8_t TbxMemPoolBlockListIsEmpty(tBlockList const *listPtr) | {
uint8_t result = TBX_FALSE;
TBX_ASSERT(listPtr != NULL);
if (listPtr != NULL)
{
if (*listPtr == NULL)
{
result = TBX_TRUE;
}
}
return result;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Get current setting for a pin in a GPIO port data out register. */ | unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port, unsigned int pin) | /* Get current setting for a pin in a GPIO port data out register. */
unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port, unsigned int pin) | {
EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_PIN_VALID(pin));
return((unsigned int)((GPIO->P[port].DOUT >> pin) & 0x1));
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Disables interrupts for the specified PWM generator block. */ | void PWMGenIntTrigDisable(unsigned long ulBase, unsigned long ulGen, unsigned long ulIntTrig) | /* Disables interrupts for the specified PWM generator block. */
void PWMGenIntTrigDisable(unsigned long ulBase, unsigned long ulGen, unsigned long ulIntTrig) | {
ASSERT(ulBase == PWM_BASE);
ASSERT(PWMGenValid(ulGen));
ASSERT((ulIntTrig & ~(PWM_INT_CNT_ZERO | PWM_INT_CNT_LOAD |
PWM_INT_CNT_AU | PWM_INT_CNT_AD | PWM_INT_CNT_BU |
PWM_INT_CNT_BD | PWM_TR_CNT_ZERO | PWM_TR_CNT_LOAD |
PWM_TR_CNT_AU | PWM_TR_CNT_AD | PWM_TR_CNT_BU |
PWM_TR_CNT_BD)) == 0);
HWREG(PWM_GEN_BADDR(ulBase, ulGen) + PWM_O_X_INTEN) &= ~(ulIntTrig);
} | watterott/WebRadio | C++ | null | 71 |
/* This function creates a new TLS object for a connection. The new object inherits the setting of the underlying context TlsCtx: connection method, options, verification setting. */ | VOID* EFIAPI TlsNew(IN VOID *TlsCtx) | /* This function creates a new TLS object for a connection. The new object inherits the setting of the underlying context TlsCtx: connection method, options, verification setting. */
VOID* EFIAPI TlsNew(IN VOID *TlsCtx) | {
CALL_CRYPTO_SERVICE (TlsNew, (TlsCtx), NULL);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Initialize a specific IRQ and register the handler.
This function set vector mode, trigger mode and polarity, interrupt level and priority, assign handler for specific IRQn. */ | int32_t ECLIC_Register_IRQ(IRQn_Type IRQn, uint8_t shv, ECLIC_TRIGGER_Type trig_mode, uint8_t lvl, uint8_t priority, void *handler) | /* Initialize a specific IRQ and register the handler.
This function set vector mode, trigger mode and polarity, interrupt level and priority, assign handler for specific IRQn. */
int32_t ECLIC_Register_IRQ(IRQn_Type IRQn, uint8_t shv, ECLIC_TRIGGER_Type trig_mode, uint8_t lvl, uint8_t priority, void *handler) | {
if ((IRQn > SOC_INT_MAX) || (shv > ECLIC_VECTOR_INTERRUPT) \
|| (trig_mode > ECLIC_NEGTIVE_EDGE_TRIGGER)) {
return -1;
}
ECLIC_SetShvIRQ(IRQn, shv);
ECLIC_SetTrigIRQ(IRQn, trig_mode);
ECLIC_SetLevelIRQ(IRQn, lvl);
ECLIC_SetPriorityIRQ(IRQn, priority);
if (handler != NULL) {
ECLIC_SetVector(IRQn, (rv_csr_t)handler);
}
ECLIC_EnableIRQ(IRQn);
return 0;
}
/** @} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* This function will calculate the tick from millisecond. */ | rt_tick_t rt_tick_from_millisecond(rt_uint32_t ms) | /* This function will calculate the tick from millisecond. */
rt_tick_t rt_tick_from_millisecond(rt_uint32_t ms) | {
return (RT_TICK_PER_SECOND * ms + 999) / 1000;
} | armink/FreeModbus_Slave-Master-RTT-STM32 | C++ | Other | 1,477 |
/* See _g_freedesktop_dbus_call_get_connection_selinux_security_context_sync() for the synchronous, blocking version of this method. */ | void _g_freedesktop_dbus_call_get_connection_selinux_security_context(_GFreedesktopDBus *proxy, const gchar *arg_name, GCancellable *cancellable, GAsyncReadyCallback callback, gpointer user_data) | /* See _g_freedesktop_dbus_call_get_connection_selinux_security_context_sync() for the synchronous, blocking version of this method. */
void _g_freedesktop_dbus_call_get_connection_selinux_security_context(_GFreedesktopDBus *proxy, const gchar *arg_name, GCancellable *cancellable, GAsyncReadyCallback callback, gpointer user_data) | {
g_dbus_proxy_call (G_DBUS_PROXY (proxy),
"GetConnectionSELinuxSecurityContext",
g_variant_new ("(s)",
arg_name),
G_DBUS_CALL_FLAGS_NONE,
-1,
cancellable,
callback,
user_data);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* param base The IRTC peripheral base address param integralValue Compensation integral value; twos complement value of the integer part param fractionValue Compensation fraction value expressed as number of clock cycles of a fixed 4.194304Mhz clock that have to be added. param accumulateFractional Flag indicating if we want to add to previous fractional part; true: Add to previously accumulated fractional part, false: Start afresh and overwrite current value */ | void IRTC_SetFineCompensation(RTC_Type *base, uint8_t integralValue, uint8_t fractionValue, bool accumulateFractional) | /* param base The IRTC peripheral base address param integralValue Compensation integral value; twos complement value of the integer part param fractionValue Compensation fraction value expressed as number of clock cycles of a fixed 4.194304Mhz clock that have to be added. param accumulateFractional Flag indicating if we want to add to previous fractional part; true: Add to previously accumulated fractional part, false: Start afresh and overwrite current value */
void IRTC_SetFineCompensation(RTC_Type *base, uint8_t integralValue, uint8_t fractionValue, bool accumulateFractional) | {
if (!accumulateFractional)
{
base->CTRL &= ~(((uint16_t)1U << RTC_CTRL_COMP_EN_SHIFT) | ((uint16_t)1U << RTC_CTRL_FINEEN_SHIFT));
}
base->COMPEN = ((uint16_t)fractionValue & 0x7FU) | (((uint16_t)integralValue & 0xFU) << 12U);
base->CTRL |= (RTC_CTRL_COMP_EN_MASK | RTC_CTRL_FINEEN_MASK);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Returns pointer to current request descriptor to produce */ | STATIC PVSCSI_RING_REQ_DESC* PvScsiGetCurrentRequest(IN CONST PVSCSI_DEV *Dev) | /* Returns pointer to current request descriptor to produce */
STATIC PVSCSI_RING_REQ_DESC* PvScsiGetCurrentRequest(IN CONST PVSCSI_DEV *Dev) | {
PVSCSI_RINGS_STATE *RingState;
UINT32 ReqNumEntries;
RingState = Dev->RingDesc.RingState;
ReqNumEntries = 1U << RingState->ReqNumEntriesLog2;
return Dev->RingDesc.RingReqs +
(RingState->ReqProdIdx & (ReqNumEntries - 1));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Fills each DAC_ConfigStruct_T member with its default value. */ | void DAC_ConfigStructInit(DAC_ConfigStruct_T *configStruct) | /* Fills each DAC_ConfigStruct_T member with its default value. */
void DAC_ConfigStructInit(DAC_ConfigStruct_T *configStruct) | {
configStruct->trigger = DAC_TRIGGER_NONE;
configStruct->waveGeneration = DAC_WAVE_GENERATION_NONE;
configStruct->maskAmplitudeSelect = DAC_LFSR_MASK_BIT11_1;
configStruct->outputBuffer = DAC_OUTPUT_BUFFER_ENBALE;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* This function sets the specified Channel Sequencer Mode in the Configuration Register 1 : */ | void XAdcPs_SetSequencerMode(XAdcPs *InstancePtr, u8 SequencerMode) | /* This function sets the specified Channel Sequencer Mode in the Configuration Register 1 : */
void XAdcPs_SetSequencerMode(XAdcPs *InstancePtr, u8 SequencerMode) | {
u32 RegValue;
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid((SequencerMode <= XADCPS_SEQ_MODE_SIMUL_SAMPLING) ||
(SequencerMode == XADCPS_SEQ_MODE_INDEPENDENT));
RegValue = XAdcPs_ReadInternalReg(InstancePtr,
XADCPS_CFR1_OFFSET);
RegValue &= (~ XADCPS_CFR1_SEQ_VALID_MASK);
RegValue |= (((u32)SequencerMode << XADCPS_CFR1_SEQ_SHIFT) &
XADCPS_CFR1_SEQ_VALID_MASK);
XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR1_OFFSET,
RegValue);
} | ua1arn/hftrx | C++ | null | 69 |
/* This relies on HAVE_UNSTABLE_SCHED_CLOCK. If it can't be defined, something similar logic should be implemented here. Xen sched_clock implementation. Returns the number of unstolen nanoseconds, which is nanoseconds the VCPU spent in RUNNING+BLOCKED states. */ | static unsigned long long xen_sched_clock(void) | /* This relies on HAVE_UNSTABLE_SCHED_CLOCK. If it can't be defined, something similar logic should be implemented here. Xen sched_clock implementation. Returns the number of unstolen nanoseconds, which is nanoseconds the VCPU spent in RUNNING+BLOCKED states. */
static unsigned long long xen_sched_clock(void) | {
struct vcpu_runstate_info runstate;
unsigned long long now;
unsigned long long offset;
unsigned long long ret;
preempt_disable();
now = ia64_native_sched_clock();
get_runstate_snapshot(&runstate);
WARN_ON(runstate.state != RUNSTATE_running);
offset = 0;
if (now > runstate.state_entry_time)
offset = now - runstate.state_entry_time;
ret = runstate.time[RUNSTATE_blocked] +
runstate.time[RUNSTATE_running] +
offset;
preempt_enable();
return ret;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* In a multiprocessor x86-64 system, this function gets called once for each CPU. */ | static u64 amd64_configure(struct pci_dev *hammer, u64 gatt_table) | /* In a multiprocessor x86-64 system, this function gets called once for each CPU. */
static u64 amd64_configure(struct pci_dev *hammer, u64 gatt_table) | {
u64 aperturebase;
u32 tmp;
u64 aper_base;
pci_read_config_dword(hammer, AMD64_GARTAPERTUREBASE, &tmp);
aperturebase = tmp << 25;
aper_base = (aperturebase & PCI_BASE_ADDRESS_MEM_MASK);
enable_gart_translation(hammer, gatt_table);
return aper_base;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Handle a fatal parser error, i.e. violating Well-Formedness constraints */ | static void xmlFatalErrMsg(xmlParserCtxtPtr ctxt, xmlParserErrors error, const char *msg, const xmlChar *str1, const xmlChar *str2) | /* Handle a fatal parser error, i.e. violating Well-Formedness constraints */
static void xmlFatalErrMsg(xmlParserCtxtPtr ctxt, xmlParserErrors error, const char *msg, const xmlChar *str1, const xmlChar *str2) | {
if ((ctxt != NULL) && (ctxt->disableSAX != 0) &&
(ctxt->instate == XML_PARSER_EOF))
return;
if (ctxt != NULL)
ctxt->errNo = error;
__xmlRaiseError(NULL, NULL, NULL, ctxt, NULL, XML_FROM_PARSER, error,
XML_ERR_FATAL, NULL, 0,
(const char *) str1, (const char *) str2,
NULL, 0, 0, msg, str1, str2);
if (ctxt != NULL) {
ctxt->wellFormed = 0;
ctxt->valid = 0;
if (ctxt->recovery == 0)
ctxt->disableSAX = 1;
}
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Returns: TRUE if the pointer is removed, FALSE if the pointer is not found in the array */ | gboolean g_ptr_array_remove(GPtrArray *array, gpointer data) | /* Returns: TRUE if the pointer is removed, FALSE if the pointer is not found in the array */
gboolean g_ptr_array_remove(GPtrArray *array, gpointer data) | {
guint i;
g_return_val_if_fail (array, FALSE);
for (i = 0; i < array->len; i += 1)
{
if (array->pdata[i] == data)
{
g_ptr_array_remove_index (array, i);
return TRUE;
}
}
return FALSE;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Thru this function the IRQ controller can raise an immediate interrupt which will interrupt the SW itself (this function should only be called from the HW model code, from SW threads) */ | void posix_irq_handler_im_from_sw(void) | /* Thru this function the IRQ controller can raise an immediate interrupt which will interrupt the SW itself (this function should only be called from the HW model code, from SW threads) */
void posix_irq_handler_im_from_sw(void) | {
if (hw_irq_ctrl_get_highest_prio_irq(CONFIG_NATIVE_SIMULATOR_MCU_N) != -1) {
if (!posix_is_cpu_running()) {
posix_print_error_and_exit("programming error: %s "
"called from a HW model thread\n",
__func__);
}
posix_irq_handler();
}
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Return if this capsule is a capsule name capsule, based upon CapsuleHeader. */ | BOOLEAN IsCapsuleNameCapsule(IN EFI_CAPSULE_HEADER *CapsuleHeader) | /* Return if this capsule is a capsule name capsule, based upon CapsuleHeader. */
BOOLEAN IsCapsuleNameCapsule(IN EFI_CAPSULE_HEADER *CapsuleHeader) | {
return CompareGuid (&CapsuleHeader->CapsuleGuid, &gEdkiiCapsuleOnDiskNameGuid);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* sfi_un/map_memory calls early_ioremap/iounmap which is a __init function and introduces section mismatch. So use __ref to make it calm. */ | static void __iomem* __ref sfi_map_memory(u64 phys, u32 size) | /* sfi_un/map_memory calls early_ioremap/iounmap which is a __init function and introduces section mismatch. So use __ref to make it calm. */
static void __iomem* __ref sfi_map_memory(u64 phys, u32 size) | {
if (!phys || !size)
return NULL;
if (sfi_use_ioremap)
return ioremap(phys, size);
else
return early_ioremap(phys, size);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This API read the Fast offset enable v_axis_u8(X,Y and Z) in the register 0x32. */ | BMG160_RETURN_FUNCTION_TYPE bmg160_get_fast_offset_enable_axis(u8 *v_fast_offset_u8) | /* This API read the Fast offset enable v_axis_u8(X,Y and Z) in the register 0x32. */
BMG160_RETURN_FUNCTION_TYPE bmg160_get_fast_offset_enable_axis(u8 *v_fast_offset_u8) | {
BMG160_RETURN_FUNCTION_TYPE comres = ERROR;
u8 v_data_u8 = BMG160_INIT_VALUE;
if (p_bmg160 == BMG160_NULL)
{
return E_BMG160_NULL_PTR;
}
else
{
comres = p_bmg160->BMG160_BUS_READ_FUNC
(p_bmg160->dev_addr,
BMG160_FAST_OFFSET_ENABLE_XYZ__REG,
&v_data_u8, BMG160_GEN_READ_WRITE_DATA_LENGTH);
*v_fast_offset_u8 = BMG160_GET_BITSLICE(v_data_u8,
BMG160_FAST_OFFSET_ENABLE_XYZ);
}
return comres;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* 'what should we do if we get a hw irq event on an illegal vector'. each architecture has to answer this themselves. */ | void ack_bad_irq(unsigned int irq) | /* 'what should we do if we get a hw irq event on an illegal vector'. each architecture has to answer this themselves. */
void ack_bad_irq(unsigned int irq) | {
smtc_im_ack_irq(irq);
printk("unexpected IRQ # %d\n", irq);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Fills each SDIO_InitStruct member with its default value. */ | void SDIO_StructInit(SDIO_InitTypeDef *SDIO_InitStruct) | /* Fills each SDIO_InitStruct member with its default value. */
void SDIO_StructInit(SDIO_InitTypeDef *SDIO_InitStruct) | {
SDIO_InitStruct->SDIO_MDEN = 0;
SDIO_InitStruct->SDIO_DATWT = 0;
SDIO_InitStruct->SDIO_SelPTSM = 0;
SDIO_InitStruct->SDIO_CLKSP = 0;
SDIO_InitStruct->SDIO_OUTM = 0;
SDIO_InitStruct->SDIO_SelSM = 0;
SDIO_InitStruct->SDIO_OPMSel = 0;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Resets the internal counter of batching events for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.. */ | int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val) | /* Resets the internal counter of batching events for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.. */
int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val) | {
lsm6dso_counter_bdr_reg1_t reg;
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®,
1);
*val = reg.rst_counter_bdr;
return ret;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Returns: a signed 32-bit integer from the attribute. */ | gint32 g_file_info_get_attribute_int32(GFileInfo *info, const char *attribute) | /* Returns: a signed 32-bit integer from the attribute. */
gint32 g_file_info_get_attribute_int32(GFileInfo *info, const char *attribute) | {
GFileAttributeValue *value;
g_return_val_if_fail (G_IS_FILE_INFO (info), 0);
g_return_val_if_fail (attribute != NULL && *attribute != '\0', 0);
value = g_file_info_find_value_by_name (info, attribute);
return _g_file_attribute_value_get_int32 (value);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Read data from a given memory address and length. */ | static int gdb_mem_read(uint8_t *buf, size_t buf_len, uintptr_t addr, size_t len) | /* Read data from a given memory address and length. */
static int gdb_mem_read(uint8_t *buf, size_t buf_len, uintptr_t addr, size_t len) | {
uint8_t align;
int ret;
if ((len * 2) > buf_len) {
ret = -1;
goto out;
}
if (!gdb_mem_can_read(addr, len, &align)) {
ret = -1;
goto out;
}
if (align > 1) {
ret = gdb_mem_read_aligned(buf, buf_len,
addr, len,
align);
} else {
ret = gdb_mem_read_unaligned(buf, buf_len,
addr, len);
}
out:
return ret;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* return kStatus_Success: success in setting the SNVS SRTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed or is beyond resolution */ | status_t SNVS_LP_SRTC_SetAlarm(SNVS_Type *base, const snvs_lp_srtc_datetime_t *alarmTime) | /* return kStatus_Success: success in setting the SNVS SRTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed or is beyond resolution */
status_t SNVS_LP_SRTC_SetAlarm(SNVS_Type *base, const snvs_lp_srtc_datetime_t *alarmTime) | {
assert(alarmTime != NULL);
uint32_t alarmSeconds = 0U;
uint32_t currSeconds = 0U;
uint32_t tmp = base->LPCR;
if (!(SNVS_LP_CheckDatetimeFormat(alarmTime)))
{
return kStatus_InvalidArgument;
}
alarmSeconds = SNVS_LP_ConvertDatetimeToSeconds(alarmTime);
currSeconds = SNVS_LP_SRTC_GetSeconds(base);
if (alarmSeconds <= currSeconds)
{
return kStatus_Fail;
}
base->LPCR &= ~SNVS_LPCR_LPTA_EN_MASK;
while ((base->LPCR & SNVS_LPCR_LPTA_EN_MASK) != 0U)
{
}
base->LPTAR = alarmSeconds;
base->LPCR = tmp;
return kStatus_Success;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Set the periodic handler depending on broadcast on/off */ | void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast) | /* Set the periodic handler depending on broadcast on/off */
void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast) | {
if (!broadcast)
dev->event_handler = tick_handle_periodic;
else
dev->event_handler = tick_handle_periodic_broadcast;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Return the index of the N-th non-switch argument. Return -1 if N is out of range. */ | static int argindex(int n) | /* Return the index of the N-th non-switch argument. Return -1 if N is out of range. */
static int argindex(int n) | {
int i;
int dashdash = 0;
if( argv!=0 && *argv!=0 ){
for(i=1; argv[i]; i++){
if( dashdash || !ISOPT(argv[i]) ){
if( n==0 ) return i;
n--;
}
if( strcmp(argv[i],"--")==0 ) dashdash = 1;
}
}
return -1;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Panic if no interrupt service routine is installed in the interrupt vector. */ | void isr_none(int vector_number) | /* Panic if no interrupt service routine is installed in the interrupt vector. */
void isr_none(int vector_number) | {
sys_panic(FSTR("unhandled interrupt %d"), vector_number);
} | eerimoq/simba | C++ | Other | 337 |
/* SYSCTRL IIR1 Bus&Function Clock Enable and Reset Release. */ | void LL_SYSCTRL_IIR1_ClkEnRstRelease(void) | /* SYSCTRL IIR1 Bus&Function Clock Enable and Reset Release. */
void LL_SYSCTRL_IIR1_ClkEnRstRelease(void) | {
__LL_SYSCTRL_CTRLReg_Unlock(SYSCTRL);
__LL_SYSCTRL_IIR1BusClk_En(SYSCTRL);
__LL_SYSCTRL_IIR1FunClk_En(SYSCTRL);
__LL_SYSCTRL_IIR1SoftRst_Release(SYSCTRL);
__LL_SYSCTRL_Reg_Lock(SYSCTRL);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Set the power saving mode for the WILC1000. */ | NMI_API sint8 m2m_wifi_set_sleep_mode(uint8 PsTyp, uint8 BcastEn) | /* Set the power saving mode for the WILC1000. */
NMI_API sint8 m2m_wifi_set_sleep_mode(uint8 PsTyp, uint8 BcastEn) | {
sint8 ret = M2M_SUCCESS;
tstrM2mPsType* pstrPs = &guCtrlStruct.strM2mPsType;
pstrPs->u8PsType = PsTyp;
pstrPs->u8BcastEn = BcastEn;
ret = hif_send(M2M_REQ_GRP_WIFI, M2M_WIFI_REQ_SLEEP, (uint8*)pstrPs,sizeof(tstrM2mPsType), NULL, 0, 0);
M2M_INFO("POWER SAVE %d\n",PsTyp);
hif_set_sleep_mode(PsTyp);
return ret;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Create 4G page table for STM. 4M Non-PAE page table in IA32 version. */ | VOID StmGen4GPageTable(IN UINTN PageTableBase) | /* Create 4G page table for STM. 4M Non-PAE page table in IA32 version. */
VOID StmGen4GPageTable(IN UINTN PageTableBase) | {
UINTN Index;
UINT32 *Pte;
UINT32 Address;
Pte = (UINT32 *)(UINTN)PageTableBase;
Address = 0;
for (Index = 0; Index < SIZE_4KB / sizeof (*Pte); Index++) {
*Pte = Address | IA32_PG_PS | IA32_PG_RW | IA32_PG_P;
Pte++;
Address += SIZE_4MB;
}
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base CMP peripheral base address. param mask Mask value for interrupts. See "_cmp_interrupt_enable". */ | void CMP_EnableInterrupts(CMP_Type *base, uint32_t mask) | /* param base CMP peripheral base address. param mask Mask value for interrupts. See "_cmp_interrupt_enable". */
void CMP_EnableInterrupts(CMP_Type *base, uint32_t mask) | {
uint8_t tmp8 = base->SCR & ~(CMP_SCR_CFR_MASK | CMP_SCR_CFF_MASK);
if (0U != (kCMP_OutputRisingInterruptEnable & mask))
{
tmp8 |= CMP_SCR_IER_MASK;
}
if (0U != (kCMP_OutputFallingInterruptEnable & mask))
{
tmp8 |= CMP_SCR_IEF_MASK;
}
base->SCR = tmp8;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Find the bridge that the resource is associated with. */ | static struct vme_bridge* find_bridge(struct vme_resource *resource) | /* Find the bridge that the resource is associated with. */
static struct vme_bridge* find_bridge(struct vme_resource *resource) | {
switch (resource->type) {
case VME_MASTER:
return list_entry(resource->entry, struct vme_master_resource,
list)->parent;
break;
case VME_SLAVE:
return list_entry(resource->entry, struct vme_slave_resource,
list)->parent;
break;
case VME_DMA:
return list_entry(resource->entry, struct vme_dma_resource,
list)->parent;
break;
case VME_LM:
return list_entry(resource->entry, struct vme_lm_resource,
list)->parent;
break;
default:
printk(KERN_ERR "Unknown resource type\n");
return NULL;
break;
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function will set an interface to the usb device. */ | rt_err_t rt_usb_set_interface(uinst_t uinst, int intf) | /* This function will set an interface to the usb device. */
rt_err_t rt_usb_set_interface(uinst_t uinst, int intf) | {
struct ureqest setup;
int timeout = 100;
RT_ASSERT(uinst != RT_NULL);
setup.request_type = USB_REQ_TYPE_DIR_OUT | USB_REQ_TYPE_STANDARD |
USB_REQ_TYPE_INTERFACE;
setup.request = USB_REQ_SET_INTERFACE;
setup.index = 0;
setup.length = 0;
setup.value = intf;
if(rt_usb_hcd_control_xfer(uinst->hcd, uinst, &setup, RT_NULL, 0,
timeout) != 0) return -RT_EIO;
return RT_EOK;
} | armink/FreeModbus_Slave-Master-RTT-STM32 | C++ | Other | 1,477 |
/* Trigger the hardware to transfer one frame from DMA buffer based on sync signal. */ | void lcdc_mcu_dma_trigger(lcdc_t *obj) | /* Trigger the hardware to transfer one frame from DMA buffer based on sync signal. */
void lcdc_mcu_dma_trigger(lcdc_t *obj) | {
( void ) obj;
LCDC_MCUDMATrigger(LCDC);
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* Returns third word of the unique device identifier (UID based on 96 bits) */ | uint32_t HAL_GetUIDw2(void) | /* Returns third word of the unique device identifier (UID based on 96 bits) */
uint32_t HAL_GetUIDw2(void) | {
return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
} | ua1arn/hftrx | C++ | null | 69 |
/* Returns the current interrupt status of the DES module. */ | uint32_t DESIntStatus(uint32_t ui32Base, bool bMasked) | /* Returns the current interrupt status of the DES module. */
uint32_t DESIntStatus(uint32_t ui32Base, bool bMasked) | {
uint32_t ui32IntStatus;
ASSERT(ui32Base == DES_BASE);
if(bMasked)
{
ui32IntStatus = HWREG(ui32Base + DES_O_IRQSTATUS);
ui32IntStatus &= HWREG(ui32Base + DES_O_IRQENABLE);
ui32IntStatus |= ((HWREG(DTHE_BASE + DTHE_O_DES_MIS) & 0x7) << 16);
return(ui32IntStatus);
}
else
{
ui32IntStatus = HWREG(ui32Base + DES_O_IRQSTATUS);
ui32IntStatus |= ((HWREG(DTHE_BASE + DTHE_O_DES_MIS) & 0xD) << 16);
return(ui32IntStatus);
}
} | micropython/micropython | C++ | Other | 18,334 |
/* Returns current source and destination addresses for a particular parameter RAM slot. Its channel should not be active when this is called. */ | void edma_get_position(unsigned slot, rt_uint32_t *src, rt_uint32_t *dst) | /* Returns current source and destination addresses for a particular parameter RAM slot. Its channel should not be active when this is called. */
void edma_get_position(unsigned slot, rt_uint32_t *src, rt_uint32_t *dst) | {
struct edmacc_param temp;
unsigned ctlr;
ctlr = EDMA_CTLR(slot);
slot = EDMA_CHAN_SLOT(slot);
edma_read_slot(EDMA_CTLR_CHAN(ctlr, slot), &temp);
if (src != RT_NULL)
*src = temp.src;
if (dst != RT_NULL)
*dst = temp.dst;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Callback function which provided by user to remove one node in NetDestroyLinkList process. */ | EFI_STATUS EFIAPI MnpDestroyServiceDataEntry(IN LIST_ENTRY *Entry, IN VOID *Context) | /* Callback function which provided by user to remove one node in NetDestroyLinkList process. */
EFI_STATUS EFIAPI MnpDestroyServiceDataEntry(IN LIST_ENTRY *Entry, IN VOID *Context) | {
MNP_SERVICE_DATA *MnpServiceData;
MnpServiceData = MNP_SERVICE_DATA_FROM_LINK (Entry);
return MnpDestroyServiceData (MnpServiceData);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base FLEXSPI peripheral base address. param index From which index start to update. It could be any index of the LUT table, which also allows user to update command content inside a command. Each command consists of up to 8 instructions and occupy 4*32-bit memory. param cmd Command sequence array. param count Number of sequences. */ | void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count) | /* param base FLEXSPI peripheral base address. param index From which index start to update. It could be any index of the LUT table, which also allows user to update command content inside a command. Each command consists of up to 8 instructions and occupy 4*32-bit memory. param cmd Command sequence array. param count Number of sequences. */
void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count) | {
assert(index < 64U);
uint8_t i = 0;
volatile uint32_t *lutBase;
while (!FLEXSPI_GetBusIdleStatus(base))
{
}
base->LUTKEY = FLEXSPI_LUT_KEY_VAL;
base->LUTCR = 0x02;
lutBase = &base->LUT[index];
for (i = 0; i < count; i++)
{
*lutBase++ = *cmd++;
}
base->LUTKEY = FLEXSPI_LUT_KEY_VAL;
base->LUTCR = 0x01;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* pci_enable_acs - enable ACS if hardware support it @dev: the PCI device */ | void pci_enable_acs(struct pci_dev *dev) | /* pci_enable_acs - enable ACS if hardware support it @dev: the PCI device */
void pci_enable_acs(struct pci_dev *dev) | {
int pos;
u16 cap;
u16 ctrl;
if (!pci_acs_enable)
return;
if (!pci_is_pcie(dev))
return;
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS);
if (!pos)
return;
pci_read_config_word(dev, pos + PCI_ACS_CAP, &cap);
pci_read_config_word(dev, pos + PCI_ACS_CTRL, &ctrl);
ctrl |= (cap & PCI_ACS_SV);
ctrl |= (cap & PCI_ACS_RR);
ctrl |= (cap & PCI_ACS_CR);
ctrl |= (cap & PCI_ACS_UF);
pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Handler for the CMD_SIGN_ON command, returning the programmer ID string to the host. */ | static void V2Protocol_SignOn(void) | /* Handler for the CMD_SIGN_ON command, returning the programmer ID string to the host. */
static void V2Protocol_SignOn(void) | {
Endpoint_ClearOUT();
Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR);
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
Endpoint_Write_8(CMD_SIGN_ON);
Endpoint_Write_8(STATUS_CMD_OK);
Endpoint_Write_8(sizeof(PROGRAMMER_ID) - 1);
Endpoint_Write_Stream_LE(PROGRAMMER_ID, (sizeof(PROGRAMMER_ID) - 1), NULL);
Endpoint_ClearIN();
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* ccw_device_resume() calls rsch on @cdev's subchannel. Returns: %0 on success, -ENODEV on device not operational, -EINVAL on invalid device state, -EBUSY on device busy or interrupt pending. Context: Interrupts disabled, ccw device lock held */ | int ccw_device_resume(struct ccw_device *cdev) | /* ccw_device_resume() calls rsch on @cdev's subchannel. Returns: %0 on success, -ENODEV on device not operational, -EINVAL on invalid device state, -EBUSY on device busy or interrupt pending. Context: Interrupts disabled, ccw device lock held */
int ccw_device_resume(struct ccw_device *cdev) | {
struct subchannel *sch;
if (!cdev || !cdev->dev.parent)
return -ENODEV;
sch = to_subchannel(cdev->dev.parent);
if (!sch->schib.pmcw.ena)
return -EINVAL;
if (cdev->private->state == DEV_STATE_NOT_OPER)
return -ENODEV;
if (cdev->private->state != DEV_STATE_ONLINE ||
!(sch->schib.scsw.cmd.actl & SCSW_ACTL_SUSPENDED))
return -EINVAL;
return cio_resume(sch);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Read the state of the wdt interrupt status. */ | uint32_t am_hal_wdt_int_status_get(bool bEnabledOnly) | /* Read the state of the wdt interrupt status. */
uint32_t am_hal_wdt_int_status_get(bool bEnabledOnly) | {
if (bEnabledOnly)
{
uint32_t u32RetVal = AM_REG(WDT, INTSTAT);
return u32RetVal & AM_REG(WDT, INTEN);
}
else
{
return AM_REG(WDT, INTSTAT);
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* s e t u p C o n s t r a i n t */ | returnValue Constraints_setupConstraint(Constraints *_THIS, int number, SubjectToStatus _status) | /* s e t u p C o n s t r a i n t */
returnValue Constraints_setupConstraint(Constraints *_THIS, int number, SubjectToStatus _status) | {
if ( ( number < 0 ) || ( number >= _THIS->n ) )
return THROWERROR( RET_INDEX_OUT_OF_BOUNDS );
switch ( _status )
{
case ST_INACTIVE:
if ( Constraints_addIndex( _THIS,Constraints_getInactive( _THIS ),number,_status ) != SUCCESSFUL_RETURN )
return THROWERROR( RET_SETUP_CONSTRAINT_FAILED );
break;
case ST_LOWER:
if ( Constraints_addIndex( _THIS,Constraints_getActive( _THIS ),number,_status ) != SUCCESSFUL_RETURN )
return THROWERROR( RET_SETUP_CONSTRAINT_FAILED );
break;
case ST_UPPER:
if ( Constraints_addIndex( _THIS,Constraints_getActive( _THIS ),number,_status ) != SUCCESSFUL_RETURN )
return THROWERROR( RET_SETUP_CONSTRAINT_FAILED );
break;
default:
return THROWERROR( RET_INVALID_ARGUMENTS );
}
return SUCCESSFUL_RETURN;
} | DanielMartensson/EmbeddedLapack | C++ | MIT License | 129 |
/* unregister_dca_provider - remove a dca provider @dca - struct created by alloc_dca_provider() */ | void unregister_dca_provider(struct dca_provider *dca, struct device *dev) | /* unregister_dca_provider - remove a dca provider @dca - struct created by alloc_dca_provider() */
void unregister_dca_provider(struct dca_provider *dca, struct device *dev) | {
unsigned long flags;
struct pci_bus *pci_rc;
struct dca_domain *domain;
blocking_notifier_call_chain(&dca_provider_chain,
DCA_PROVIDER_REMOVE, NULL);
spin_lock_irqsave(&dca_lock, flags);
list_del(&dca->node);
pci_rc = dca_pci_rc_from_dev(dev);
domain = dca_find_domain(pci_rc);
if (list_empty(&domain->dca_providers))
dca_free_domain(domain);
spin_unlock_irqrestore(&dca_lock, flags);
dca_sysfs_remove_provider(dca);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* @tag: The first part of the response @response: Pointer to fastboot response buffer @format: printf style format string */ | void fastboot_response(const char *tag, char *response, const char *format,...) | /* @tag: The first part of the response @response: Pointer to fastboot response buffer @format: printf style format string */
void fastboot_response(const char *tag, char *response, const char *format,...) | {
va_list args;
strlcpy(response, tag, FASTBOOT_RESPONSE_LEN);
if (format) {
va_start(args, format);
vsnprintf(response + strlen(response),
FASTBOOT_RESPONSE_LEN - strlen(response) - 1,
format, args);
va_end(args);
}
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* This API is used to get the sleep duration of the sensor in the register 0x11 Register 0x11 - bit from 0 to 3. */ | BMA2x2_RETURN_FUNCTION_TYPE bma2x2_get_sleep_durn(u8 *sleep_durn_u8) | /* This API is used to get the sleep duration of the sensor in the register 0x11 Register 0x11 - bit from 0 to 3. */
BMA2x2_RETURN_FUNCTION_TYPE bma2x2_get_sleep_durn(u8 *sleep_durn_u8) | {
u8 data_u8 = BMA2x2_INIT_VALUE;
BMA2x2_RETURN_FUNCTION_TYPE com_rslt = ERROR;
if (p_bma2x2 == BMA2x2_NULL)
{
return E_BMA2x2_NULL_PTR;
}
else
{
com_rslt = p_bma2x2->BMA2x2_BUS_READ_FUNC
(p_bma2x2->dev_addr, BMA2x2_SLEEP_DURN_REG,
&data_u8, BMA2x2_GEN_READ_WRITE_LENGTH);
*sleep_durn_u8 = BMA2x2_GET_BITSLICE
(data_u8, BMA2x2_SLEEP_DURN);
}
return com_rslt;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* appends uint32_t in a packet, incrementing the index */ | static uint8_t _mdns_append_u32(uint8_t *packet, uint16_t *index, uint32_t value) | /* appends uint32_t in a packet, incrementing the index */
static uint8_t _mdns_append_u32(uint8_t *packet, uint16_t *index, uint32_t value) | {
if ((*index + 3) >= MDNS_MAX_PACKET_SIZE) {
return 0;
}
_mdns_append_u8(packet, index, (value >> 24) & 0xFF);
_mdns_append_u8(packet, index, (value >> 16) & 0xFF);
_mdns_append_u8(packet, index, (value >> 8) & 0xFF);
_mdns_append_u8(packet, index, value & 0xFF);
return 4;
} | retro-esp32/RetroESP32 | C++ | Creative Commons Attribution Share Alike 4.0 International | 581 |
/* Function for executing the finalization procedure for the command executed.
Function for executing the finalization procedure for command executed, which includes notifying the application of command completion, consuming the command queue element, and changing the internal state. */ | static void command_end_procedure_run(void) | /* Function for executing the finalization procedure for the command executed.
Function for executing the finalization procedure for command executed, which includes notifying the application of command completion, consuming the command queue element, and changing the internal state. */
static void command_end_procedure_run(void) | {
app_notify(NRF_SUCCESS, &m_cmd_queue.cmd[m_cmd_queue.rp]);
command_queue_element_consume();
sm_state_change(STATE_IDLE);
} | labapart/polymcu | C++ | null | 201 |
/* Return the value of the trigger type register for the IRQ.
In the event edge irq is enable this will return the trigger value of the irq. In the event edge irq is not supported this routine will return 0 */ | static uint32_t __maybe_unused riscv_plic_irq_trig_val(const struct device *dev, uint32_t local_irq) | /* Return the value of the trigger type register for the IRQ.
In the event edge irq is enable this will return the trigger value of the irq. In the event edge irq is not supported this routine will return 0 */
static uint32_t __maybe_unused riscv_plic_irq_trig_val(const struct device *dev, uint32_t local_irq) | {
if (!IS_ENABLED(PLIC_SUPPORTS_TRIG_TYPE)) {
return PLIC_TRIG_LEVEL;
}
const struct plic_config *config = dev->config;
mem_addr_t trig_addr = config->trig + local_irq_to_reg_offset(local_irq);
uint32_t offset = local_irq * PLIC_REG_TRIG_TYPE_WIDTH;
return sys_read32(trig_addr) & GENMASK(offset + PLIC_REG_TRIG_TYPE_WIDTH - 1, offset);
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on. */ | void GPIOPinIntEnable(unsigned long ulPort, unsigned char ucPins) | /* The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on. */
void GPIOPinIntEnable(unsigned long ulPort, unsigned char ucPins) | {
ASSERT(GPIOBaseValid(ulPort));
HWREG(ulPort + GPIO_O_IM) |= ucPins;
} | watterott/WebRadio | C++ | null | 71 |
/* Finds the request corresponding to the RPC xid and invokes the common tcp read code to read the data. */ | static int xs_tcp_read_reply(struct rpc_xprt *xprt, struct xdr_skb_reader *desc) | /* Finds the request corresponding to the RPC xid and invokes the common tcp read code to read the data. */
static int xs_tcp_read_reply(struct rpc_xprt *xprt, struct xdr_skb_reader *desc) | {
struct sock_xprt *transport =
container_of(xprt, struct sock_xprt, xprt);
struct rpc_rqst *req;
dprintk("RPC: read reply XID %08x\n", ntohl(transport->tcp_xid));
spin_lock(&xprt->transport_lock);
req = xprt_lookup_rqst(xprt, transport->tcp_xid);
if (!req) {
dprintk("RPC: XID %08x request not found!\n",
ntohl(transport->tcp_xid));
spin_unlock(&xprt->transport_lock);
return -1;
}
xs_tcp_read_common(xprt, desc, req);
if (!(transport->tcp_flags & TCP_RCV_COPY_DATA))
xprt_complete_rqst(req->rq_task, transport->tcp_copied);
spin_unlock(&xprt->transport_lock);
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Enables CPU interrupts for the smallest window required to capture any pending interrupts. */ | VOID EFIAPI EnableDisableInterrupts(VOID) | /* Enables CPU interrupts for the smallest window required to capture any pending interrupts. */
VOID EFIAPI EnableDisableInterrupts(VOID) | {
_asm {
sti
nop
nop
cli
}
} | tianocore/edk2 | C++ | Other | 4,240 |
/* According to USB HID Specification, report descriptors are composed of pieces of information. Each piece of information is called an Item. This function retrieves each item from the report descriptor and updates USB_MOUSE_ABSOLUTE_POINTER_DEV. */ | EFI_STATUS ParseMouseReportDescriptor(OUT USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointer, IN UINT8 *ReportDescriptor, IN UINTN ReportSize) | /* According to USB HID Specification, report descriptors are composed of pieces of information. Each piece of information is called an Item. This function retrieves each item from the report descriptor and updates USB_MOUSE_ABSOLUTE_POINTER_DEV. */
EFI_STATUS ParseMouseReportDescriptor(OUT USB_MOUSE_ABSOLUTE_POINTER_DEV *UsbMouseAbsolutePointer, IN UINT8 *ReportDescriptor, IN UINTN ReportSize) | {
UINT8 *DescriptorEnd;
UINT8 *Ptr;
HID_ITEM HidItem;
DescriptorEnd = ReportDescriptor + ReportSize;
Ptr = GetNextHidItem (ReportDescriptor, DescriptorEnd, &HidItem);
while (Ptr != NULL) {
if (HidItem.Format != HID_ITEM_FORMAT_SHORT) {
return EFI_UNSUPPORTED;
}
ParseHidItem (UsbMouseAbsolutePointer, &HidItem);
Ptr = GetNextHidItem (Ptr, DescriptorEnd, &HidItem);
}
UsbMouseAbsolutePointer->NumberOfButtons = (UINT8)(UsbMouseAbsolutePointer->PrivateData.ButtonMaxIndex - UsbMouseAbsolutePointer->PrivateData.ButtonMinIndex + 1);
UsbMouseAbsolutePointer->XLogicMax = 1023;
UsbMouseAbsolutePointer->YLogicMax = 1023;
UsbMouseAbsolutePointer->XLogicMin = -1023;
UsbMouseAbsolutePointer->YLogicMin = -1023;
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* When the kernel calls this it has masked interrupt by setting NVIC BASEPRI equal to a value equal to the highest Zephyr ISR priority. Only NVIC exceptions will be served. */ | static void z_power_soc_sleep(void) | /* When the kernel calls this it has masked interrupt by setting NVIC BASEPRI equal to a value equal to the highest Zephyr ISR priority. Only NVIC exceptions will be served. */
static void z_power_soc_sleep(void) | {
struct pcr_regs *pcr = PCR_XEC_REG_BASE;
__disable_irq();
SCB->SCR &= ~BIT(2);
pcr->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_LIGHT;
pcr->OSC_ID = pcr->SYS_SLP_CTRL;
__set_BASEPRI(0);
__WFI();
__NOP();
__NOP();
pcr->SYS_SLP_CTRL = 0U;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Called after the bus reset interrupt - this function readies all the end points for communication. */ | static void prvResetEndPoints(void) | /* Called after the bus reset interrupt - this function readies all the end points for communication. */
static void prvResetEndPoints(void) | {
unsigned long ulTemp;
eDriverState = eJUST_RESET;
AT91C_BASE_UDP->UDP_RSTEP = usbEND_POINT_RESET_MASK;
AT91C_BASE_UDP->UDP_RSTEP = ( unsigned long ) 0x00;
AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN;
portENTER_CRITICAL();
{
ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
usbCSR_SET_BIT( &ulTemp, ( ( unsigned long ) ( AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL ) ) );
AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
AT91F_UDP_EnableIt( AT91C_BASE_UDP, AT91C_UDP_EPINT0 );
}
portEXIT_CRITICAL();
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* Insert specific documentation section from a file. Call kernel-doc with the following parameters: kernel-doc -docbook -function "doc section" filename */ | static void docsect(char *filename, char *line) | /* Insert specific documentation section from a file. Call kernel-doc with the following parameters: kernel-doc -docbook -function "doc section" filename */
static void docsect(char *filename, char *line) | {
char *vec[6];
char *s;
for (s = line; *s; s++)
if (*s == '\n')
*s = '\0';
vec[0] = KERNELDOC;
vec[1] = DOCBOOK;
vec[2] = FUNCTION;
vec[3] = line;
vec[4] = filename;
vec[5] = NULL;
exec_kernel_doc(vec);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
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