docstring stringlengths 22 576 | signature stringlengths 9 317 | prompt stringlengths 57 886 | code stringlengths 20 1.36k | repository stringclasses 49
values | language stringclasses 2
values | license stringclasses 9
values | stars int64 15 21.3k |
|---|---|---|---|---|---|---|---|
/* Starts the PWM output signal generation on the designed timer output. */ | void HRTIM_SimplePWMStart(HRTIM_TypeDef *HRTIMx, uint32_t TimerIdx, uint32_t PWMChannel) | /* Starts the PWM output signal generation on the designed timer output. */
void HRTIM_SimplePWMStart(HRTIM_TypeDef *HRTIMx, uint32_t TimerIdx, uint32_t PWMChannel) | {
assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
HRTIMx->HRTIM_COMMON.OENR |= PWMChannel;
__HRTIM_ENABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Returns true if a command queue has enough available descriptors that we can resume Tx operation after temporarily disabling its packet queue. */ | static int enough_free_Tx_descs(const struct cmdQ *q) | /* Returns true if a command queue has enough available descriptors that we can resume Tx operation after temporarily disabling its packet queue. */
static int enough_free_Tx_descs(const struct cmdQ *q) | {
unsigned int r = q->processed - q->cleaned;
return q->in_use - r < (q->size >> 1);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Called on failure; free up any blocks from the inode PA for this context. We don't need this for MB_GROUP_PA because we only change pa_free in ext4_mb_release_context(), but on failure, we've already zeroed out ac->ac_b_ex.fe_len, so group_pa->pa_free is not changed. */ | static void ext4_discard_allocated_blocks(struct ext4_allocation_context *ac) | /* Called on failure; free up any blocks from the inode PA for this context. We don't need this for MB_GROUP_PA because we only change pa_free in ext4_mb_release_context(), but on failure, we've already zeroed out ac->ac_b_ex.fe_len, so group_pa->pa_free is not changed. */
static void ext4_discard_allocated_blocks(struct ext4_allocation_context *ac) | {
struct ext4_prealloc_space *pa = ac->ac_pa;
int len;
if (pa && pa->pa_type == MB_INODE_PA) {
len = ac->ac_b_ex.fe_len;
pa->pa_free += len;
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* channel = IDMA channel number from 0 to 3 destAddr = Destination address sourceAddr = Source address size = Size in bytes command = See MV datasheet */ | int mvDmaTransfer(int, ulong, ulong, ulong, ulong) | /* channel = IDMA channel number from 0 to 3 destAddr = Destination address sourceAddr = Source address size = Size in bytes command = See MV datasheet */
int mvDmaTransfer(int, ulong, ulong, ulong, ulong) | {
ulong engOffReg = 0;
if (size > 0xffff)
command = command | BIT31;
command = command | ((command >> 6) & 0x7);
engOffReg = channel * 4;
GT_REG_WRITE (MV64460_DMA_CHANNEL0_BYTE_COUNT + engOffReg, size);
GT_REG_WRITE (MV64460_DMA_CHANNEL0_SOURCE_ADDR + engOffReg, sourceAddr);
GT_REG_WRITE (MV64460_DMA_CHANNEL0_DESTINATION_ADDR + engOffReg, destAddr);
command = command |
BIT12 |
BIT9;
GT_REG_WRITE (MV64460_DMA_CHANNEL0_CONTROL + engOffReg, command);
return 1;
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* Helper dissector for ZCL attribute set and bag types. */ | static void dissect_zcl_set_type(tvbuff_t *tvb, proto_tree *tree, guint *offset, guint8 elements_type, guint16 elements_num) | /* Helper dissector for ZCL attribute set and bag types. */
static void dissect_zcl_set_type(tvbuff_t *tvb, proto_tree *tree, guint *offset, guint8 elements_type, guint16 elements_num) | {
proto_tree *sub_tree;
guint tvb_len;
guint i = 1;
tvb_len = tvb_captured_length(tvb);
while ( (*offset < tvb_len) && (elements_num != 0) ) {
if (i < ZBEE_ZCL_NUM_ARRAY_ELEM_ETT-1)
sub_tree = proto_tree_add_subtree(tree, tvb, *offset, 0,
ett_zbee_zcl_array_elements[i], NULL, "Element");
else
sub_tree = proto_tree_add_subtree(tree, tvb, *offset, 0,
ett_zbee_zcl_array_elements[ZBEE_ZCL_NUM_ARRAY_ELEM_ETT-1], NULL, "Element");
dissect_zcl_attr_data(tvb, sub_tree, offset, elements_type);
elements_num--;
i++;
}
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Note: Only AF_INET client addresses are passed in, since nfsctl_client.cl_addrlist contains only in_addr fields for addresses. */ | static ssize_t write_add(struct file *file, char *buf, size_t size) | /* Note: Only AF_INET client addresses are passed in, since nfsctl_client.cl_addrlist contains only in_addr fields for addresses. */
static ssize_t write_add(struct file *file, char *buf, size_t size) | {
struct nfsctl_client *data;
if (size < sizeof(*data))
return -EINVAL;
data = (struct nfsctl_client *)buf;
return exp_addclient(data);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Append a zero cluster to the current OFile. */ | STATIC EFI_STATUS FatExpandODir(IN FAT_OFILE *OFile) | /* Append a zero cluster to the current OFile. */
STATIC EFI_STATUS FatExpandODir(IN FAT_OFILE *OFile) | {
return FatExpandOFile (OFile, OFile->FileSize + OFile->Volume->ClusterSize);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* For each heuristic dissector table, dump list of dissectors (filter_names) for that table */ | void dissector_dump_heur_decodes(void) | /* For each heuristic dissector table, dump list of dissectors (filter_names) for that table */
void dissector_dump_heur_decodes(void) | {
dissector_all_heur_tables_foreach_table(dissector_dump_heur_decodes_display, NULL, NULL);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* ADC Disable an External Trigger for Injected Channels. */ | void adc_disable_external_trigger_injected(uint32_t adc) | /* ADC Disable an External Trigger for Injected Channels. */
void adc_disable_external_trigger_injected(uint32_t adc) | {
ADC_JSQR(adc) &= ~ADC_JSQR_JEXTEN_MASK;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* User can (and should) define the platform from U-Boot */ | static int __init lpc18xx_platform_parse(char *s) | /* User can (and should) define the platform from U-Boot */
static int __init lpc18xx_platform_parse(char *s) | {
if (!strcmp(s, "hitex-lpc4350"))
lpc18xx_platform = PLATFORM_LPC18XX_HITEX_LPC4350_EVAL;
else if (!strcmp(s, "hitex-lpc1850"))
lpc18xx_platform = PLATFORM_LPC18XX_HITEX_LPC1850_EVAL;
return 1;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Checks whether the DCMI interrupt has occurred or not. */ | ITStatus DCMI_GetITStatus(uint16_t DCMI_IT) | /* Checks whether the DCMI interrupt has occurred or not. */
ITStatus DCMI_GetITStatus(uint16_t DCMI_IT) | {
ITStatus bitstatus = RESET;
uint32_t itstatus = 0;
assert_param(IS_DCMI_GET_IT(DCMI_IT));
itstatus = DCMI->MISR & DCMI_IT;
if ((itstatus != (uint16_t)RESET))
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* Given a pathname, return a string containing everything but the last component. NOTE: this overwrites the pathname handed into it.... */ | char* get_dirname(char *path) | /* Given a pathname, return a string containing everything but the last component. NOTE: this overwrites the pathname handed into it.... */
char* get_dirname(char *path) | {
char *separator;
g_assert(path != NULL);
separator = find_last_pathname_separator(path);
if (separator == NULL) {
return NULL;
}
*separator = '\0';
return path;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Toggles the LED at a fixed time interval. */ | void LedToggle(void) | /* Toggles the LED at a fixed time interval. */
void LedToggle(void) | {
static unsigned char led_toggle_state = 0;
static unsigned long timer_counter_last = 0;
unsigned long timer_counter_now;
timer_counter_now = TimerGet();
if ( (timer_counter_now - timer_counter_last) < LED_TOGGLE_MS)
{
return;
}
if (led_toggle_state == 0)
{
led_toggle_state = 1;
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3, GPIO_PIN_SET);
}
else
{
led_toggle_state = 0;
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3, GPIO_PIN_RESET);
}
timer_counter_last = timer_counter_now;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Clears or safeguards the OCREF4 signal on an external event. */ | void TMR_ClearOC4Ref(TMR_T *tmr, TMR_OC_CLEAR_T OCClear) | /* Clears or safeguards the OCREF4 signal on an external event. */
void TMR_ClearOC4Ref(TMR_T *tmr, TMR_OC_CLEAR_T OCClear) | {
tmr->CCM2_COMPARE_B.OC4CEN = OCClear;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* ADC Enable an External Trigger for Injected Channels.
This enables an external trigger for set of defined injected channels, and sets the polarity of the trigger event: rising or falling edge or both. */ | void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, uint32_t polarity) | /* ADC Enable an External Trigger for Injected Channels.
This enables an external trigger for set of defined injected channels, and sets the polarity of the trigger event: rising or falling edge or both. */
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, uint32_t polarity) | {
uint32_t reg32 = ADC_JSQR(adc);
reg32 &= ~(ADC_JSQR_JEXTSEL_MASK | ADC_JSQR_JEXTEN_MASK);
reg32 |= (trigger | polarity);
ADC_JSQR(adc) = reg32;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* Like TIFFSetField, but taking a varargs parameter list. This routine is useful for building higher-level interfaces on top of the library. */ | int TIFFVSetField(TIFF *tif, uint32 tag, va_list ap) | /* Like TIFFSetField, but taking a varargs parameter list. This routine is useful for building higher-level interfaces on top of the library. */
int TIFFVSetField(TIFF *tif, uint32 tag, va_list ap) | {
return OkToChangeTag(tif, tag) ?
(*tif->tif_tagmethods.vsetfield)(tif, tag, ap) : 0;
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* param base Pointer to FLEXIO_I2S_Type structure param format Pointer to FlexIO I2S audio data format structure. param srcClock_Hz I2S master clock source frequency in Hz. */ | void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz) | /* param base Pointer to FLEXIO_I2S_Type structure param format Pointer to FlexIO I2S audio data format structure. param srcClock_Hz I2S master clock source frequency in Hz. */
void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz) | {
uint32_t timDiv = srcClock_Hz / (format->sampleRate_Hz * format->bitWidth * 2U);
uint32_t bclkDiv = 0;
if ((timDiv % 2UL) != 0UL)
{
timDiv += 1U;
}
base->flexioBase->TIMCMP[base->fsTimerIndex] = FLEXIO_TIMCMP_CMP(format->bitWidth * timDiv - 1U);
bclkDiv = ((timDiv / 2U - 1U) | ((format->bitWidth * 2UL - 1UL) << 8U));
base->flexioBase->TIMCMP[base->bclkTimerIndex] = FLEXIO_TIMCMP_CMP(bclkDiv);
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Returns CR_OK upon succesful completion, an error code otherwise. */ | enum CRStatus cr_font_size_set_absolute_font_size(CRFontSize *a_this, enum CRNumType a_num_type, gdouble a_value) | /* Returns CR_OK upon succesful completion, an error code otherwise. */
enum CRStatus cr_font_size_set_absolute_font_size(CRFontSize *a_this, enum CRNumType a_num_type, gdouble a_value) | {
g_return_val_if_fail (a_this, CR_BAD_PARAM_ERROR) ;
g_return_val_if_fail (a_num_type >= NUM_AUTO
&& a_num_type < NB_NUM_TYPE,
CR_BAD_PARAM_ERROR) ;
a_this->type = ABSOLUTE_FONT_SIZE ;
cr_num_set (&a_this->value.absolute,
a_value, a_num_type) ;
return CR_OK ;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Returns true if the send queue length is lower than the message limit. Always returns true if the socket is not connected (no iucv path for checking the message limit). */ | static int iucv_below_msglim(struct sock *sk) | /* Returns true if the send queue length is lower than the message limit. Always returns true if the socket is not connected (no iucv path for checking the message limit). */
static int iucv_below_msglim(struct sock *sk) | {
struct iucv_sock *iucv = iucv_sk(sk);
if (sk->sk_state != IUCV_CONNECTED)
return 1;
return (skb_queue_len(&iucv->send_skb_q) < iucv->path->msglim);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Retrieve the SMM FVB protocol interface by HANDLE. */ | EFI_STATUS GetFvbByHandle(IN EFI_HANDLE FvBlockHandle, OUT EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL **FvBlock) | /* Retrieve the SMM FVB protocol interface by HANDLE. */
EFI_STATUS GetFvbByHandle(IN EFI_HANDLE FvBlockHandle, OUT EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL **FvBlock) | {
return gMmst->MmHandleProtocol (
FvBlockHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
(VOID **)FvBlock
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This function deletes PEB @pnum from the protection queue and returns zero in case of success and %-ENODEV if the PEB was not found. */ | static int prot_queue_del(struct ubi_device *ubi, int pnum) | /* This function deletes PEB @pnum from the protection queue and returns zero in case of success and %-ENODEV if the PEB was not found. */
static int prot_queue_del(struct ubi_device *ubi, int pnum) | {
struct ubi_wl_entry *e;
e = ubi->lookuptbl[pnum];
if (!e)
return -ENODEV;
if (self_check_in_pq(ubi, e))
return -ENODEV;
list_del(&e->u.list);
dbg_wl("deleted PEB %d from the protection queue", e->pnum);
return 0;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Insert a previously allocated call_single_data element for execution on the given CPU. data must already have ->func, ->info, and ->flags set. */ | static void generic_exec_single(int cpu, struct call_single_data *data, int wait) | /* Insert a previously allocated call_single_data element for execution on the given CPU. data must already have ->func, ->info, and ->flags set. */
static void generic_exec_single(int cpu, struct call_single_data *data, int wait) | {
struct call_single_queue *dst = &per_cpu(call_single_queue, cpu);
unsigned long flags;
int ipi;
raw_spin_lock_irqsave(&dst->lock, flags);
ipi = list_empty(&dst->list);
list_add_tail(&data->list, &dst->list);
raw_spin_unlock_irqrestore(&dst->lock, flags);
if (ipi)
arch_send_call_function_single_ipi(cpu);
if (wait)
csd_lock_wait(data);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Attribute read call back for the Value V1 attribute. */ | static ssize_t read_value_v1(struct bt_conn *conn, const struct bt_gatt_attr *attr, void *buf, uint16_t len, uint16_t offset) | /* Attribute read call back for the Value V1 attribute. */
static ssize_t read_value_v1(struct bt_conn *conn, const struct bt_gatt_attr *attr, void *buf, uint16_t len, uint16_t offset) | {
const uint8_t *value = attr->user_data;
return bt_gatt_attr_read(conn, attr, buf, len, offset, value,
sizeof(value_v1_value));
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* copy_from_eeprom - copy MAC address in eeprom to address registers */ | static void copy_from_eeprom(struct eth_device *dev) | /* copy_from_eeprom - copy MAC address in eeprom to address registers */
static void copy_from_eeprom(struct eth_device *dev) | {
ulong addrl =
read_eeprom_reg(dev, 0x01) |
read_eeprom_reg(dev, 0x02) << 8 |
read_eeprom_reg(dev, 0x03) << 16 |
read_eeprom_reg(dev, 0x04) << 24;
ulong addrh =
read_eeprom_reg(dev, 0x05) |
read_eeprom_reg(dev, 0x06) << 8;
smc911x_set_mac_csr(dev, ADDRL, addrl);
smc911x_set_mac_csr(dev, ADDRH, addrh);
puts("EEPROM contents copied to MAC\n");
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* Optimised routine to draw a horizontal line faster than setting individual pixels. */ | void lcdDrawHLine(uint16_t x0, uint16_t x1, uint16_t y, uint16_t color) | /* Optimised routine to draw a horizontal line faster than setting individual pixels. */
void lcdDrawHLine(uint16_t x0, uint16_t x1, uint16_t y, uint16_t color) | {
uint16_t x, pixels;
if (x1 < x0)
{
x = x1;
x1 = x0;
x0 = x;
}
if (x1 >= lcdGetWidth())
{
x1 = lcdGetWidth() - 1;
}
if (x0 >= lcdGetWidth())
{
x0 = lcdGetWidth() - 1;
}
ili9328SetCursor(x0, y);
ili9328WriteCmd(ILI9328_COMMANDS_WRITEDATATOGRAM);
for (pixels = 0; pixels < x1 - x0 + 1; pixels++)
{
ili9328WriteData(color);
}
} | microbuilder/LPC1343CodeBase | C++ | Other | 73 |
/* Sets a value to the pins of pcf857x. */ | static int pcf857x_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, gpio_port_value_t value) | /* Sets a value to the pins of pcf857x. */
static int pcf857x_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, gpio_port_value_t value) | {
return pcf857x_port_set_raw(dev, (uint16_t)mask, (uint16_t)value, 0);
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* CRC-8: the poly is 0x31 (x^8 + x^5 + x^4 + 1) */ | static uint8_t calc_crc8(uint8_t *buf, uint16_t length) | /* CRC-8: the poly is 0x31 (x^8 + x^5 + x^4 + 1) */
static uint8_t calc_crc8(uint8_t *buf, uint16_t length) | {
uint8_t crc = 0x00;
uint8_t i = 0;
while (length--) {
crc ^= *buf++;
for (i = 8; i > 0; i--) {
if (crc & 0x80) {
crc = (crc << 1) ^ 0x31;
} else {
crc <<= 1;
}
}
}
return crc;
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* Configures the Edge for which a transition is detectable for the the selected pin. */ | uint8_t IOE_IOEdgeConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Edge) | /* Configures the Edge for which a transition is detectable for the the selected pin. */
uint8_t IOE_IOEdgeConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Edge) | {
uint8_t tmp1 = 0, tmp2 = 0;
tmp1 = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_FE);
tmp2 = I2C_ReadDeviceRegister(DeviceAddr, IOE_REG_GPIO_RE);
tmp1 &= ~(uint8_t)IO_Pin;
tmp2 &= ~(uint8_t)IO_Pin;
if (Edge & EDGE_FALLING)
{
tmp1 |= (uint8_t)IO_Pin;
}
if (Edge & EDGE_RISING)
{
tmp2 |= (uint8_t)IO_Pin;
}
I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_FE, tmp1);
I2C_WriteDeviceRegister(DeviceAddr, IOE_REG_GPIO_RE, tmp2);
return IOE_OK;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* ECCxxxOther does ECC calcs on arbitrary n bytes of data */ | void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes, struct yaffs_ecc_other *ecc_other) | /* ECCxxxOther does ECC calcs on arbitrary n bytes of data */
void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes, struct yaffs_ecc_other *ecc_other) | {
unsigned int i;
unsigned char col_parity = 0;
unsigned line_parity = 0;
unsigned line_parity_prime = 0;
unsigned char b;
for (i = 0; i < n_bytes; i++) {
b = column_parity_table[*data++];
col_parity ^= b;
if (b & 0x01) {
line_parity ^= i;
line_parity_prime ^= ~i;
}
}
ecc_other->col_parity = (col_parity >> 2) & 0x3f;
ecc_other->line_parity = line_parity;
ecc_other->line_parity_prime = line_parity_prime;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* param base FlexCAN peripheral base address. param sourceClock_Hz Source Clock in Hz. param bitRate_Bps Bit rate in Bps. return kStatus_Success - Set CAN baud rate (only Nominal phase) successfully. */ | status_t FLEXCAN_SetBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRate_Bps) | /* param base FlexCAN peripheral base address. param sourceClock_Hz Source Clock in Hz. param bitRate_Bps Bit rate in Bps. return kStatus_Success - Set CAN baud rate (only Nominal phase) successfully. */
status_t FLEXCAN_SetBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRate_Bps) | {
flexcan_timing_config_t timingCfg;
status_t result = kStatus_Fail;
if (FLEXCAN_CalculateImprovedTimingValues(base, bitRate_Bps, sourceClock_Hz, &timingCfg))
{
FLEXCAN_SetTimingConfig(base, &timingCfg);
result = kStatus_Success;
}
return result;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Initialize the memory management pool for the host controller. */ | EFI_STATUS EmmcPeimInitMemPool(IN EMMC_PEIM_HC_PRIVATE_DATA *Private) | /* Initialize the memory management pool for the host controller. */
EFI_STATUS EmmcPeimInitMemPool(IN EMMC_PEIM_HC_PRIVATE_DATA *Private) | {
EMMC_PEIM_MEM_POOL *Pool;
EFI_STATUS Status;
VOID *TempPtr;
TempPtr = NULL;
Pool = NULL;
Status = PeiServicesAllocatePool (sizeof (EMMC_PEIM_MEM_POOL), &TempPtr);
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_POOL));
Pool = (EMMC_PEIM_MEM_POOL *)((UINTN)TempPtr);
Pool->Head = EmmcPeimAllocMemBlock (EMMC_PEIM_MEM_DEFAULT_PAGES);
if (Pool->Head == NULL) {
return EFI_OUT_OF_RESOURCES;
}
Private->Pool = Pool;
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Move all CQEs from the HWCQ into the SWCQ. */ | void cxio_flush_hw_cq(struct t3_cq *cq) | /* Move all CQEs from the HWCQ into the SWCQ. */
void cxio_flush_hw_cq(struct t3_cq *cq) | {
struct t3_cqe *cqe, *swcqe;
PDBG("%s cq %p cqid 0x%x\n", __func__, cq, cq->cqid);
cqe = cxio_next_hw_cqe(cq);
while (cqe) {
PDBG("%s flushing hwcq rptr 0x%x to swcq wptr 0x%x\n",
__func__, cq->rptr, cq->sw_wptr);
swcqe = cq->sw_queue + Q_PTR2IDX(cq->sw_wptr, cq->size_log2);
*swcqe = *cqe;
swcqe->header |= cpu_to_be32(V_CQE_SWCQE(1));
cq->sw_wptr++;
cq->rptr++;
cqe = cxio_next_hw_cqe(cq);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This file is part of the Simba project. */ | int mock_write_nmea_encode(char *dst_p, struct nmea_sentence_t *src_p, ssize_t res) | /* This file is part of the Simba project. */
int mock_write_nmea_encode(char *dst_p, struct nmea_sentence_t *src_p, ssize_t res) | {
harness_mock_write("nmea_encode(): return (dst_p)",
dst_p,
strlen(dst_p) + 1);
harness_mock_write("nmea_encode(src_p)",
src_p,
sizeof(*src_p));
harness_mock_write("nmea_encode(): return (res)",
&res,
sizeof(res));
return (0);
} | eerimoq/simba | C++ | Other | 337 |
/* Clear bits in the HOST side IOINTCTL register.
This function may be used to clear an interrupt bit to the host. */ | void am_hal_ios_host_int_clear(uint32_t ui32Interrupt) | /* Clear bits in the HOST side IOINTCTL register.
This function may be used to clear an interrupt bit to the host. */
void am_hal_ios_host_int_clear(uint32_t ui32Interrupt) | {
AM_REG(IOSLAVE, IOINTCTL) = AM_REG_IOSLAVE_IOINTCTL_IOINTCLR(ui32Interrupt);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* UART MSP Initialization This function configures the hardware resources used in this example. */ | void HAL_UART_MspInit(UART_HandleTypeDef *huart) | /* UART MSP Initialization This function configures the hardware resources used in this example. */
void HAL_UART_MspInit(UART_HandleTypeDef *huart) | {
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART2)
{
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF1_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Task watchdog timer callback.
If all task watchdogs have longer timeouts than the hardware watchdog, this function is called regularly (via the background channel). This should be avoided by setting CONFIG_TASK_WDT_MIN_TIMEOUT to the minimum task watchdog timeout used in the application. */ | static void task_wdt_trigger(struct k_timer *timer_id) | /* Task watchdog timer callback.
If all task watchdogs have longer timeouts than the hardware watchdog, this function is called regularly (via the background channel). This should be avoided by setting CONFIG_TASK_WDT_MIN_TIMEOUT to the minimum task watchdog timeout used in the application. */
static void task_wdt_trigger(struct k_timer *timer_id) | {
uintptr_t channel_id = (uintptr_t)k_timer_user_data_get(timer_id);
bool bg_channel = IS_ENABLED(CONFIG_TASK_WDT_HW_FALLBACK) &&
(channel_id == TASK_WDT_BACKGROUND_CHANNEL);
if (bg_channel || channels[channel_id].reload_period == 0) {
schedule_next_timeout(sys_clock_tick_get());
return;
}
if (channels[channel_id].callback) {
channels[channel_id].callback(channel_id,
channels[channel_id].user_data);
} else {
sys_reboot(SYS_REBOOT_COLD);
}
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Set the LCDCA fine contrast.
Transfer function: VLCD = 3.0V + (fcont * 0.016V) */ | void lcdca_set_contrast(int8_t contrast) | /* Set the LCDCA fine contrast.
Transfer function: VLCD = 3.0V + (fcont * 0.016V) */
void lcdca_set_contrast(int8_t contrast) | {
uint32_t cfg = LCDCA->LCDCA_CFG;
uint32_t fcst_filed;
int8_t fcst_val_msk = (LCDCA_CFG_FCST_Msk >> (LCDCA_CFG_FCST_Pos + 1));
int8_t fcst_sign_msk = ((LCDCA_CFG_FCST_Msk >> LCDCA_CFG_FCST_Pos) + 1) >> 1;
cfg &= ~LCDCA_CFG_FCST_Msk;
fcst_filed = (contrast & fcst_val_msk);
if (contrast < 0) {
fcst_filed |= fcst_sign_msk;
}
LCDCA->LCDCA_CFG = cfg | LCDCA_CFG_FCST(fcst_filed);
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Sets the LCD orientation to horizontal and vertical. */ | void lcdSetOrientation(lcdOrientation_t orientation) | /* Sets the LCD orientation to horizontal and vertical. */
void lcdSetOrientation(lcdOrientation_t orientation) | {
uint16_t entryMode = 0x1030;
uint16_t outputControl = 0x0100;
switch (orientation)
{
case LCD_ORIENTATION_PORTRAIT:
entryMode = 0x1030;
outputControl = 0x0100;
break;
case LCD_ORIENTATION_LANDSCAPE:
entryMode = 0x1028;
outputControl = 0x0000;
break;
}
ili9325Command(ILI9325_COMMANDS_ENTRYMODE, entryMode);
ili9325Command(ILI9325_COMMANDS_DRIVEROUTPUTCONTROL1, outputControl);
lcdOrientation = orientation;
ili9325SetCursor(0, 0);
} | microbuilder/LPC1343CodeBase | C++ | Other | 73 |
/* Called by memory hotplug when all memory in a node is offlined. */ | void kswapd_stop(int nid) | /* Called by memory hotplug when all memory in a node is offlined. */
void kswapd_stop(int nid) | {
struct task_struct *kswapd = NODE_DATA(nid)->kswapd;
if (kswapd)
kthread_stop(kswapd);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Just to make matters somewhat more interesting on MIPS systems with multiple host bridge each will have it's own ioport address space. */ | static void __iomem* ioport_map_legacy(unsigned long port, unsigned int nr) | /* Just to make matters somewhat more interesting on MIPS systems with multiple host bridge each will have it's own ioport address space. */
static void __iomem* ioport_map_legacy(unsigned long port, unsigned int nr) | {
return (void __iomem *) (mips_io_port_base + port);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Write a string of bytes through the software UART. */ | int32_t swuart_write_string(struct swuart_dev *dev, uint8_t *string, uint32_t size) | /* Write a string of bytes through the software UART. */
int32_t swuart_write_string(struct swuart_dev *dev, uint8_t *string, uint32_t size) | {
uint32_t i;
int32_t check;
for(i = 0; i < size; i++) {
check = swuart_write_char(dev, &string[i]);
if(check != 0)
return check;
swuart_delay(dev, dev->half_period);
swuart_delay(dev, dev->half_period);
}
return check;
} | analogdevicesinc/EVAL-ADICUP3029 | C++ | Other | 36 |
/* Return the list of field names as a table on top of the stack. */ | static int cur_getcolnames(lua_State *L) | /* Return the list of field names as a table on top of the stack. */
static int cur_getcolnames(lua_State *L) | {
int i;
lua_newtable (L);
for (i = 1; i <= cur->numcols; i++) {
column_data *col = &(cur->cols[i-1]);
lua_pushlstring (L, col->name, col->namelen);
lua_rawseti (L, -2, i);
}
lua_pushvalue (L, -1);
cur->colnames = luaL_ref (L, LUA_REGISTRYINDEX);
}
return 1;
} | DC-SWAT/DreamShell | C++ | null | 404 |
/* snd_hda_input_mux_info_put - Put callback helper for the input-mux enum */ | int snd_hda_input_mux_put(struct hda_codec *codec, const struct hda_input_mux *imux, struct snd_ctl_elem_value *ucontrol, hda_nid_t nid, unsigned int *cur_val) | /* snd_hda_input_mux_info_put - Put callback helper for the input-mux enum */
int snd_hda_input_mux_put(struct hda_codec *codec, const struct hda_input_mux *imux, struct snd_ctl_elem_value *ucontrol, hda_nid_t nid, unsigned int *cur_val) | {
unsigned int idx;
if (!imux->num_items)
return 0;
idx = ucontrol->value.enumerated.item[0];
if (idx >= imux->num_items)
idx = imux->num_items - 1;
if (*cur_val == idx)
return 0;
snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_CONNECT_SEL,
imux->items[idx].index);
*cur_val = idx;
return 1;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Callback function for AFEC enter compasion window interrupt. */ | static void afec_set_comp_flag(void) | /* Callback function for AFEC enter compasion window interrupt. */
static void afec_set_comp_flag(void) | {
is_comp_event_flag = true;
afec_disable_interrupt(AFEC0, AFEC_INTERRUPT_COMP_ERROR);
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* The dev_link structure is initialized, but we don't actually configure the card at this point */ | static int if_cs_ioprobe(struct pcmcia_device *p_dev, cistpl_cftable_entry_t *cfg, cistpl_cftable_entry_t *dflt, unsigned int vcc, void *priv_data) | /* The dev_link structure is initialized, but we don't actually configure the card at this point */
static int if_cs_ioprobe(struct pcmcia_device *p_dev, cistpl_cftable_entry_t *cfg, cistpl_cftable_entry_t *dflt, unsigned int vcc, void *priv_data) | {
p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
p_dev->io.BasePort1 = cfg->io.win[0].base;
p_dev->io.NumPorts1 = cfg->io.win[0].len;
if (cfg->irq.IRQInfo1)
p_dev->conf.Attributes |= CONF_ENABLE_IRQ;
if (cfg->io.nwin != 1) {
lbs_pr_err("wrong CIS (check number of IO windows)\n");
return -ENODEV;
}
return pcmcia_request_io(p_dev, &p_dev->io);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Configure the external 32KHz oscillator clock failure detect.
Configures the external 32KHz oscillator clock failure detect with the given configuration settings. */ | static void system_clock_source_xosc32k_set_failure_detect(struct system_clock_failure_detect *const config) | /* Configure the external 32KHz oscillator clock failure detect.
Configures the external 32KHz oscillator clock failure detect with the given configuration settings. */
static void system_clock_source_xosc32k_set_failure_detect(struct system_clock_failure_detect *const config) | {
if (config->cfd_enable) {
OSC32KCTRL->CFDCTRL.reg |= OSC32KCTRL_CFDCTRL_CFDEN;
OSC32KCTRL->CFDCTRL.bit.CFDPRESC = config->cfd_divider;
OSC32KCTRL->EVCTRL.reg = OSC32KCTRL_EVCTRL_CFDEO;
} else {
OSC32KCTRL->CFDCTRL.reg &= ~OSC32KCTRL_CFDCTRL_CFDEN;
}
} | memfault/zero-to-main | C++ | null | 200 |
/* This is yet another James Morris contribution (I'm an IP-level guy, so I dislike bridging), and I just try not to break it. */ | static void add_to_bridge(int fd, const char *if_name, const char *br_name) | /* This is yet another James Morris contribution (I'm an IP-level guy, so I dislike bridging), and I just try not to break it. */
static void add_to_bridge(int fd, const char *if_name, const char *br_name) | {
int ifidx;
struct ifreq ifr;
if (!*br_name)
errx(1, "must specify bridge name");
ifidx = if_nametoindex(if_name);
if (!ifidx)
errx(1, "interface %s does not exist!", if_name);
strncpy(ifr.ifr_name, br_name, IFNAMSIZ);
ifr.ifr_name[IFNAMSIZ-1] = '\0';
ifr.ifr_ifindex = ifidx;
if (ioctl(fd, SIOCBRADDIF, &ifr) < 0)
err(1, "can't add %s to bridge %s", if_name, br_name);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* If 16-bit I/O port operations are not supported, then ASSERT(). */ | VOID EFIAPI IoWriteFifo16(IN UINTN Port, IN UINTN Count, IN VOID *Buffer) | /* If 16-bit I/O port operations are not supported, then ASSERT(). */
VOID EFIAPI IoWriteFifo16(IN UINTN Port, IN UINTN Count, IN VOID *Buffer) | {
ASSERT ((Port & 1) == 0);
IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Dissect GlusterFS/NFS NFSv3 File Handle - glusterfs-3.3+ The filehandle is always 32 bytes and first 4 bytes of ident ":OGL" */ | static int dissect_fhandle_data_GLUSTER(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree, void *data _U_) | /* Dissect GlusterFS/NFS NFSv3 File Handle - glusterfs-3.3+ The filehandle is always 32 bytes and first 4 bytes of ident ":OGL" */
static int dissect_fhandle_data_GLUSTER(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree, void *data _U_) | {
guint16 offset=0;
guint16 fhlen;
char *ident;
if (!tree)
return tvb_captured_length(tvb);
fhlen = tvb_reported_length(tvb);
if (fhlen != 36)
return tvb_captured_length(tvb);
ident = tvb_get_string_enc(wmem_packet_scope(), tvb, offset, 4, ENC_ASCII);
if (strncmp(":OGL", ident, 4))
return 4;
offset += 4;
proto_tree_add_item(tree, hf_nfs_fh_exportid, tvb, offset, 16, ENC_NA);
offset += 16;
proto_tree_add_item(tree, hf_nfs_fh_gfid, tvb, offset, 16, ENC_NA);
offset += 16;
return offset;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* This function calculates and returns current UBIFS liability, i.e. the amount of bytes UBIFS has "promised" to write to the media. */ | static long long get_liability(struct ubifs_info *c) | /* This function calculates and returns current UBIFS liability, i.e. the amount of bytes UBIFS has "promised" to write to the media. */
static long long get_liability(struct ubifs_info *c) | {
long long liab;
spin_lock(&c->space_lock);
liab = c->bi.idx_growth + c->bi.data_growth + c->bi.dd_growth;
spin_unlock(&c->space_lock);
return liab;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* snp_get_mctrl - get contorl line info, we just return a static value @port: port to operate on - we only have one port so we ignore this */ | static unsigned int snp_get_mctrl(struct uart_port *port) | /* snp_get_mctrl - get contorl line info, we just return a static value @port: port to operate on - we only have one port so we ignore this */
static unsigned int snp_get_mctrl(struct uart_port *port) | {
return TIOCM_CAR | TIOCM_RNG | TIOCM_DSR | TIOCM_CTS;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* For a reassembled-packet hash table entry, free the fragment data to which the value refers and also the key itself. */ | static gboolean free_all_reassembled_fragments(gpointer key_arg _U_, gpointer value, gpointer user_data) | /* For a reassembled-packet hash table entry, free the fragment data to which the value refers and also the key itself. */
static gboolean free_all_reassembled_fragments(gpointer key_arg _U_, gpointer value, gpointer user_data) | {
GPtrArray *allocated_fragments = (GPtrArray *) user_data;
fragment_head *fd_head;
for (fd_head = (fragment_head *)value; fd_head != NULL; fd_head = fd_head->next) {
if (fd_head->flags != FD_VISITED_FREE) {
if (fd_head->flags & FD_SUBSET_TVB)
fd_head->tvb_data = NULL;
g_ptr_array_add(allocated_fragments, fd_head);
fd_head->flags = FD_VISITED_FREE;
}
}
return TRUE;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* can_remove_receive(PktP,P) returns non-zero if PKT_IN_USE is set for the next packet on the queue. It will also set PktP to point to the relevant packet, . If PKT_IN_USE is clear, then can_remove_receive() returns 0. */ | int can_remove_receive(struct PKT __iomem **PktP, struct Port *PortP) | /* can_remove_receive(PktP,P) returns non-zero if PKT_IN_USE is set for the next packet on the queue. It will also set PktP to point to the relevant packet, . If PKT_IN_USE is clear, then can_remove_receive() returns 0. */
int can_remove_receive(struct PKT __iomem **PktP, struct Port *PortP) | {
if (readw(PortP->RxRemove) & PKT_IN_USE) {
*PktP = (struct PKT __iomem *) RIO_PTR(PortP->Caddr, readw(PortP->RxRemove) & ~PKT_IN_USE);
return 1;
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* ixgbe_atr_get_dst_ipv4_82599 - Gets the destination IPv4 address @input: input stream to search @dst_addr: the IP address to load */ | static s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr) | /* ixgbe_atr_get_dst_ipv4_82599 - Gets the destination IPv4 address @input: input stream to search @dst_addr: the IP address to load */
static s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr) | {
*dst_addr = input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET];
*dst_addr |= input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET + 1] << 8;
*dst_addr |= input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET + 2] << 16;
*dst_addr |= input->byte_stream[IXGBE_ATR_DST_IPV4_OFFSET + 3] << 24;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Write one byte into the RX buffer.
This function will write one byte into the array index specified by the write pointer and increment the write index. If the write index exceeds the max buffer size, then it will roll over to zero. */ | bool fifo_write(fifo_t *f, void const *p_data) | /* Write one byte into the RX buffer.
This function will write one byte into the array index specified by the write pointer and increment the write index. If the write index exceeds the max buffer size, then it will roll over to zero. */
bool fifo_write(fifo_t *f, void const *p_data) | {
if ( !is_fifo_initalized(f) || (fifo_isFull(f) && !f->overwritable) )
{
return false;
}
mutex_lock(f);
memcpy( f->buffer + (f->wr_idx * f->item_size),
p_data,
f->item_size);
f->wr_idx = (f->wr_idx + 1) % f->depth;
if (fifo_isFull(f))
{
f->rd_idx = f->wr_idx;
}else
{
f->count++;
}
mutex_unlock(f);
return true;
} | microbuilder/LPC11U_LPC13U_CodeBase | C++ | Other | 54 |
/* Shall be calle under atomic context... to avoid possible racing condition... */ | struct wlan_network* rtw_find_network(_queue *scanned_queue, u8 *addr) | /* Shall be calle under atomic context... to avoid possible racing condition... */
struct wlan_network* rtw_find_network(_queue *scanned_queue, u8 *addr) | {
struct wlan_network *pnetwork = _rtw_find_network(scanned_queue, addr);
return pnetwork;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* USB device configuration changed event call back. Here we reconfigure the USB end points. */ | void EVENT_USB_Device_ConfigurationChanged() | /* USB device configuration changed event call back. Here we reconfigure the USB end points. */
void EVENT_USB_Device_ConfigurationChanged() | {
uint8_t i;
for (i = 1;i < USB_runtime.usbd_max_num_eps;i++)
{
device.Endpoints[i].IsConfigured = 0;
}
USBD_SetEndpointBuffer(WinUSBInfo.Config.InEndpoint.Address,tx_buf,TX_BUF_SIZE);
USBD_SetEndpointBuffer(WinUSBInfo.Config.OutEndpoint.Address,rx_buf,RX_BUF_SIZE);
USBD_WINUSB_ConfigureEndpoints(&WinUSBInfo);
for (i = 1;i < USB_runtime.usbd_max_num_eps;i++)
{
USBD_Endpoint_t *ep = &device.Endpoints[i];
if ((0U == ep->IsConfigured) && (1U == ep->IsEnabled))
{
device.Driver->EndpointUnconfigure(ep->Number);
}
}
device.IsConfigured = 1;
USB_DeviceState = DEVICE_STATE_Configured;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Nothing fancy, just initialize lists and locks and counters. */ | void fsnotify_init_mark(struct fsnotify_mark_entry *entry, void(*free_mark)(struct fsnotify_mark_entry *entry)) | /* Nothing fancy, just initialize lists and locks and counters. */
void fsnotify_init_mark(struct fsnotify_mark_entry *entry, void(*free_mark)(struct fsnotify_mark_entry *entry)) | {
spin_lock_init(&entry->lock);
atomic_set(&entry->refcnt, 1);
INIT_HLIST_NODE(&entry->i_list);
entry->group = NULL;
entry->mask = 0;
entry->inode = NULL;
entry->free_mark = free_mark;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Note that the "notify" signals are queued and only emitted (in reverse order) after all properties have been set. See g_object_freeze_notify(). */ | void g_object_set(gpointer _object, const gchar *first_property_name,...) | /* Note that the "notify" signals are queued and only emitted (in reverse order) after all properties have been set. See g_object_freeze_notify(). */
void g_object_set(gpointer _object, const gchar *first_property_name,...) | {
GObject *object = _object;
va_list var_args;
g_return_if_fail (G_IS_OBJECT (object));
va_start (var_args, first_property_name);
g_object_set_valist (object, first_property_name, var_args);
va_end (var_args);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Programs a half word at a specified Option Byte Data address. */ | FMC_STATE_T FMC_ProgramOptionByteData(uint32_t addr, uint8_t data) | /* Programs a half word at a specified Option Byte Data address. */
FMC_STATE_T FMC_ProgramOptionByteData(uint32_t addr, uint8_t data) | {
FMC_STATE_T state;
state = FMC_WaitForReady(FMC_DELAY_ERASE);
if (state == FMC_STATE_COMPLETE)
{
FMC->CTRL2_B.OBP = BIT_SET;
*(__IO uint16_t*)addr = data;
state = FMC_WaitForReady(FMC_DELAY_ERASE);
if (state != FMC_STATE_TIMEOUT)
{
FMC->CTRL2_B.OBP = BIT_RESET;
}
}
return state;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Forces the TIMx output 2 waveform to active or inactive level. */ | void TIM_ForcedOC2Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction) | /* Forces the TIMx output 2 waveform to active or inactive level. */
void TIM_ForcedOC2Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction) | {
uint32_t tmpccmr1 = 0;
assert_param(IS_TIM_LIST2_PERIPH(TIMx));
assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
tmpccmr1 = TIMx->CCMR1;
tmpccmr1 &= (uint32_t)~TIM_CCMR1_OC2M;
tmpccmr1 |= (uint32_t)(TIM_ForcedAction << 8);
TIMx->CCMR1 = tmpccmr1;
} | ajhc/demo-cortex-m3 | C++ | null | 38 |
/* Configures the transmitter of a SSC peripheral. Several macros can be used to compute the values of the Transmit Clock Mode Register (TCMR) and the Transmit Frame Mode Register (TFMR) (see "SSC configuration macros"). */ | void SSC_ConfigureTransmitter(AT91S_SSC *ssc, unsigned int tcmr, unsigned int tfmr) | /* Configures the transmitter of a SSC peripheral. Several macros can be used to compute the values of the Transmit Clock Mode Register (TCMR) and the Transmit Frame Mode Register (TFMR) (see "SSC configuration macros"). */
void SSC_ConfigureTransmitter(AT91S_SSC *ssc, unsigned int tcmr, unsigned int tfmr) | {
ssc->SSC_TCMR = tcmr;
ssc->SSC_TFMR = tfmr;
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* This function stops a network interface. This call is only valid if the network interface is in the started state. If the network interface was successfully stopped, then EFI_SUCCESS will be returned. */ | EFI_STATUS EFIAPI SnpUndi32Stop(IN EFI_SIMPLE_NETWORK_PROTOCOL *This) | /* This function stops a network interface. This call is only valid if the network interface is in the started state. If the network interface was successfully stopped, then EFI_SUCCESS will be returned. */
EFI_STATUS EFIAPI SnpUndi32Stop(IN EFI_SIMPLE_NETWORK_PROTOCOL *This) | {
SNP_DRIVER *Snp;
EFI_TPL OldTpl;
EFI_STATUS Status;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
}
Snp = EFI_SIMPLE_NETWORK_DEV_FROM_THIS (This);
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
switch (Snp->Mode.State) {
case EfiSimpleNetworkStarted:
break;
case EfiSimpleNetworkStopped:
Status = EFI_NOT_STARTED;
goto ON_EXIT;
default:
Status = EFI_DEVICE_ERROR;
goto ON_EXIT;
}
Status = PxeStop (Snp);
ON_EXIT:
gBS->RestoreTPL (OldTpl);
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Seek the address of the first byte of the option header. */ | UINT8* PxeBcDhcp6SeekOption(IN UINT8 *Buf, IN UINT32 SeekLen, IN UINT16 OptType) | /* Seek the address of the first byte of the option header. */
UINT8* PxeBcDhcp6SeekOption(IN UINT8 *Buf, IN UINT32 SeekLen, IN UINT16 OptType) | {
UINT8 *Cursor;
UINT8 *Option;
UINT16 DataLen;
UINT16 OpCode;
Option = NULL;
Cursor = Buf;
while (Cursor < Buf + SeekLen) {
OpCode = ReadUnaligned16 ((UINT16 *)Cursor);
if (OpCode == HTONS (OptType)) {
Option = Cursor;
break;
}
DataLen = NTOHS (ReadUnaligned16 ((UINT16 *)(Cursor + 2)));
Cursor += (DataLen + 4);
}
return Option;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Write current date/time or alarm date/time to RTC setting.
The */ | void RTCTimeWrite(tTime *tTime, unsigned long ulTimeAlarm) | /* Write current date/time or alarm date/time to RTC setting.
The */
void RTCTimeWrite(tTime *tTime, unsigned long ulTimeAlarm) | {
unsigned long ulTemp;
xASSERT((ulTimeAlarm == RTC_TIME_CURRENT) ||
(ulTimeAlarm == RTC_TIME_ALARM));
xASSERT((tTime->ulYear >= RTC_YEAR_OFFSET) &&
(tTime->ulYear <= RTC_YEAR_OFFSET + 99));
xASSERT((tTime->ulMonth >= 1) &&
(tTime->ulMonth <= 12));
xASSERT((tTime->ulMDay >= 1) &&
(tTime->ulMDay <= 31));
xASSERT((tTime->ulHour >= 0) &&
(tTime->ulHour <= 23));
RTCStop();
ulTemp = xRTCConvertTimeToCounter((xtTime *)tTime);
if (ulTimeAlarm == RTC_TIME_CURRENT)
{
SysCtlBackupRegWrite(0, ulTemp);
}
else
{
SysCtlBackupRegWrite(1, ulTemp);
}
RTCStart();
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Submit writting buffer to the UART driver.
Data from the buffer is sent over the UART, the function returns immediately. */ | int32_t uart_write_nonblocking(struct uart_desc *desc, const uint8_t *data, uint32_t bytes_number) | /* Submit writting buffer to the UART driver.
Data from the buffer is sent over the UART, the function returns immediately. */
int32_t uart_write_nonblocking(struct uart_desc *desc, const uint8_t *data, uint32_t bytes_number) | {
struct aducm_uart_desc *extra;
uint32_t to_write;
if (!desc || !data || !bytes_number)
return FAILURE;
extra = desc->extra;
if (extra->write_desc.is_nonblocking)
return FAILURE;
extra->write_desc.is_nonblocking = true;
to_write = min(bytes_number, MAX_BYTES);
extra->write_desc.pending = bytes_number - to_write;
extra->write_desc.buff = (uint8_t *)data + to_write;
adi_uart_SubmitTxBuffer(
(ADI_UART_HANDLE const)extra->uart_handler,
(void *const)data,
(uint32_t const)to_write,
to_write > 4 ? true : false);
return SUCCESS;
} | analogdevicesinc/EVAL-ADICUP3029 | C++ | Other | 36 |
/* Add a socket to the bound sockets list. */ | static void nr_insert_socket(struct sock *sk) | /* Add a socket to the bound sockets list. */
static void nr_insert_socket(struct sock *sk) | {
spin_lock_bh(&nr_list_lock);
sk_add_node(sk, &nr_list);
spin_unlock_bh(&nr_list_lock);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Checks whether the contents of a buffer are all zeros. */ | BOOLEAN EFIAPI InternalMemIsZeroBuffer(IN CONST VOID *Buffer, IN UINTN Length) | /* Checks whether the contents of a buffer are all zeros. */
BOOLEAN EFIAPI InternalMemIsZeroBuffer(IN CONST VOID *Buffer, IN UINTN Length) | {
CONST UINT8 *BufferData;
UINTN Index;
BufferData = Buffer;
for (Index = 0; Index < Length; Index++) {
if (BufferData[Index] != 0) {
return FALSE;
}
}
return TRUE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* TIM_PWM MSP De-Initialization This function freeze the hardware resources used in this example. */ | void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim_pwm) | /* TIM_PWM MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim_pwm) | {
if(htim_pwm->Instance==TIM2)
{
__HAL_RCC_TIM2_CLK_DISABLE();
}
else if(htim_pwm->Instance==TIM3)
{
__HAL_RCC_TIM3_CLK_DISABLE();
}
else if(htim_pwm->Instance==TIM4)
{
__HAL_RCC_TIM4_CLK_DISABLE();
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Show that boot threads belong to the default memory domain.
Static threads and the main thread are supposed to start as members of the default memory domain. Prove this is the case by examining the memory domain membership of z_main_thread and a static thread. */ | ZTEST(mem_protect_domain, test_mem_domain_boot_threads) | /* Show that boot threads belong to the default memory domain.
Static threads and the main thread are supposed to start as members of the default memory domain. Prove this is the case by examining the memory domain membership of z_main_thread and a static thread. */
ZTEST(mem_protect_domain, test_mem_domain_boot_threads) | {
zassert_true(zzz_thread->mem_domain_info.mem_domain ==
&k_mem_domain_default, "unexpected mem domain %p",
zzz_thread->mem_domain_info.mem_domain);
zassert_true(z_main_thread.mem_domain_info.mem_domain ==
&k_mem_domain_default, "unexpected mem domain %p",
z_main_thread.mem_domain_info.mem_domain);
k_thread_abort(zzz_thread);
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Return value: 1 on success / 0 already queued / < 0 for error */ | static int fc_queue_devloss_work(struct Scsi_Host *shost, struct delayed_work *work, unsigned long delay) | /* Return value: 1 on success / 0 already queued / < 0 for error */
static int fc_queue_devloss_work(struct Scsi_Host *shost, struct delayed_work *work, unsigned long delay) | {
if (unlikely(!fc_host_devloss_work_q(shost))) {
printk(KERN_ERR
"ERROR: FC host '%s' attempted to queue work, "
"when no workqueue created.\n", shost->hostt->name);
dump_stack();
return -EINVAL;
}
return queue_delayed_work(fc_host_devloss_work_q(shost), work, delay);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* CAN driver event callback function that gets called each time a CAN message was received. */ | static void XcpTpCanEventMessageReceived(tCanMsg const *msg) | /* CAN driver event callback function that gets called each time a CAN message was received. */
static void XcpTpCanEventMessageReceived(tCanMsg const *msg) | {
uint32_t tpCanRxId = tpCanSettings.receiveId;
if (tpCanSettings.useExtended)
{
tpCanRxId |= CAN_MSG_EXT_ID_MASK;
}
if (msg->id == tpCanRxId)
{
UtilCriticalSectionEnter();
tpCanResponseMessage.id = msg->id;
tpCanResponseMessage.dlc = msg->dlc;
for (uint8_t idx = 0; idx < msg->dlc; idx++)
{
tpCanResponseMessage.data[idx] = msg->data[idx];
}
tpCanResponseMessageReceived = true;
UtilCriticalSectionExit();
}
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* mx3fb_set_par() - set framebuffer parameters and change the operating mode. */ | static int mx3fb_set_par(void) | /* mx3fb_set_par() - set framebuffer parameters and change the operating mode. */
static int mx3fb_set_par(void) | {
int ret;
ret = sdc_init_panel(XRES, YRES, PIXEL_FMT);
if (ret < 0)
return ret;
reg_write((H_START_WIDTH << 16) | V_START_WIDTH, SDC_BG_POS);
return 0;
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* If no format string is specified the Format must be NULL. */ | VOID EFIAPI Dump8Chars(IN CONST CHAR16 *Format OPTIONAL, IN UINT8 *Ptr) | /* If no format string is specified the Format must be NULL. */
VOID EFIAPI Dump8Chars(IN CONST CHAR16 *Format OPTIONAL, IN UINT8 *Ptr) | {
Print (
(Format != NULL) ? Format : L"%c%c%c%c%c%c%c%c",
Ptr[0],
Ptr[1],
Ptr[2],
Ptr[3],
Ptr[4],
Ptr[5],
Ptr[6],
Ptr[7]
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This function will register an usb class driver to the class driver manager. */ | rt_err_t rt_usb_class_driver_register(ucd_t drv) | /* This function will register an usb class driver to the class driver manager. */
rt_err_t rt_usb_class_driver_register(ucd_t drv) | {
if (drv == RT_NULL) return -RT_ERROR;
rt_list_insert_after(&_driver_list, &(drv->list));
return RT_EOK;
} | armink/FreeModbus_Slave-Master-RTT-STM32 | C++ | Other | 1,477 |
/* Get the last point of an input device (for LV_INDEV_TYPE_POINTER and LV_INDEV_TYPE_BUTTON) */ | void lv_indev_get_point(const lv_indev_t *indev, lv_point_t *point) | /* Get the last point of an input device (for LV_INDEV_TYPE_POINTER and LV_INDEV_TYPE_BUTTON) */
void lv_indev_get_point(const lv_indev_t *indev, lv_point_t *point) | {
if(indev->driver.type != LV_INDEV_TYPE_POINTER && indev->driver.type != LV_INDEV_TYPE_BUTTON) {
point->x = -1;
point->y = -1;
} else {
point->x = indev->proc.act_point.x;
point->y = indev->proc.act_point.y;
}
} | RavenSystem/esp-homekit-devices | C++ | Other | 2,577 |
/* initialize the chip - used by resume callback, too */ | static void snd_es1938_chip_init(struct es1938 *chip) | /* initialize the chip - used by resume callback, too */
static void snd_es1938_chip_init(struct es1938 *chip) | {
snd_es1938_reset(chip);
pci_set_master(chip->pci);
pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
outb(0xf0, SLIO_REG(chip, IRQCONTROL));
outb(0, SLDM_REG(chip, DMACLEAR));
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Return nonzero if we know a priori this clockid_t value is bogus. */ | static int invalid_clockid(const clockid_t which_clock) | /* Return nonzero if we know a priori this clockid_t value is bogus. */
static int invalid_clockid(const clockid_t which_clock) | {
if (which_clock < 0) return 0;
if ((unsigned) which_clock >= MAX_CLOCKS)
return 1;
if (posix_clocks[which_clock].clock_getres != NULL)
return 0;
if (posix_clocks[which_clock].res != 0)
return 0;
return 1;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* can_rx_delete_device - rcu callback for dev_rcv_lists structure removal */ | static void can_rx_delete_device(struct rcu_head *rp) | /* can_rx_delete_device - rcu callback for dev_rcv_lists structure removal */
static void can_rx_delete_device(struct rcu_head *rp) | {
struct dev_rcv_lists *d = container_of(rp, struct dev_rcv_lists, rcu);
kfree(d);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* add_ref_cm_node - destroy an instance of a cm node */ | static int add_ref_cm_node(struct nes_cm_node *) | /* add_ref_cm_node - destroy an instance of a cm node */
static int add_ref_cm_node(struct nes_cm_node *) | {
atomic_inc(&cm_node->ref_count);
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Initialize the timer(default is Systick) used as delay timer. */ | __WEAK void FL_DelayInit(void) | /* Initialize the timer(default is Systick) used as delay timer. */
__WEAK void FL_DelayInit(void) | {
SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk;
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Performs read operation to Atlas analog register specified. */ | static s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val) | /* Performs read operation to Atlas analog register specified. */
static s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val) | {
u32 atlas_ctl;
IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL,
IXGBE_ATLASCTL_WRITE_CMD | (reg << 8));
IXGBE_WRITE_FLUSH(hw);
udelay(10);
atlas_ctl = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
*val = (u8)atlas_ctl;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* show_affected_cpus - show the CPUs affected by each transition */ | static ssize_t show_affected_cpus(struct cpufreq_policy *policy, char *buf) | /* show_affected_cpus - show the CPUs affected by each transition */
static ssize_t show_affected_cpus(struct cpufreq_policy *policy, char *buf) | {
return show_cpus(policy->cpus, buf);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Return non-zero if FCF fcoe_size has been validated. */ | static int fcoe_ctlr_mtu_valid(const struct fcoe_fcf *fcf) | /* Return non-zero if FCF fcoe_size has been validated. */
static int fcoe_ctlr_mtu_valid(const struct fcoe_fcf *fcf) | {
return (fcf->flags & FIP_FL_SOL) != 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Read or write specified attribute of a UFS device. */ | EFI_STATUS UfsRwAttributes(IN UFS_PASS_THRU_PRIVATE_DATA *Private, IN BOOLEAN Read, IN UINT8 AttrId, IN UINT8 Index, IN UINT8 Selector, IN OUT UINT32 *Attributes) | /* Read or write specified attribute of a UFS device. */
EFI_STATUS UfsRwAttributes(IN UFS_PASS_THRU_PRIVATE_DATA *Private, IN BOOLEAN Read, IN UINT8 AttrId, IN UINT8 Index, IN UINT8 Selector, IN OUT UINT32 *Attributes) | {
UFS_DEVICE_MANAGEMENT_REQUEST_PACKET Packet;
ZeroMem (&Packet, sizeof (UFS_DEVICE_MANAGEMENT_REQUEST_PACKET));
if (Read) {
Packet.DataDirection = UfsDataIn;
Packet.Opcode = UtpQueryFuncOpcodeRdAttr;
} else {
Packet.DataDirection = UfsDataOut;
Packet.Opcode = UtpQueryFuncOpcodeWrAttr;
}
Packet.DataBuffer = Attributes;
Packet.DescId = AttrId;
Packet.Index = Index;
Packet.Selector = Selector;
Packet.Timeout = UFS_TIMEOUT;
return UfsSendDmRequest (Private, &Packet);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Reset LEDs which BIOS might have left on. For now, just NumLock (0x01). */ | static int hid_find_field_early(struct hid_device *hid, unsigned int page, unsigned int hid_code, struct hid_field **pfield) | /* Reset LEDs which BIOS might have left on. For now, just NumLock (0x01). */
static int hid_find_field_early(struct hid_device *hid, unsigned int page, unsigned int hid_code, struct hid_field **pfield) | {
struct hid_report *report;
struct hid_field *field;
struct hid_usage *usage;
int i, j;
list_for_each_entry(report, &hid->report_enum[HID_OUTPUT_REPORT].report_list, list) {
for (i = 0; i < report->maxfield; i++) {
field = report->field[i];
for (j = 0; j < field->maxusage; j++) {
usage = &field->usage[j];
if ((usage->hid & HID_USAGE_PAGE) == page &&
(usage->hid & 0xFFFF) == hid_code) {
*pfield = field;
return j;
}
}
}
}
return -1;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns the number of bytes available in the FIFO. */ | uint32_t dev_ringbuf_avail(dev_ringbuf_t *fifo) | /* Returns the number of bytes available in the FIFO. */
uint32_t dev_ringbuf_avail(dev_ringbuf_t *fifo) | {
return ringbuffer_size(fifo) - dev_ringbuf_len(fifo);
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* Retrieves the next byte from the host in the CDC data OUT endpoint, and clears the endpoint bank if needed to allow reception of the next data packet from the host. */ | static uint8_t FetchNextCommandByte(void) | /* Retrieves the next byte from the host in the CDC data OUT endpoint, and clears the endpoint bank if needed to allow reception of the next data packet from the host. */
static uint8_t FetchNextCommandByte(void) | {
Endpoint_SelectEndpoint(CDC_RX_EPADDR);
while (!(Endpoint_IsReadWriteAllowed()))
{
Endpoint_ClearOUT();
while (!(Endpoint_IsOUTReceived()))
{
if (USB_DeviceState == DEVICE_STATE_Unattached)
return 0;
}
}
return Endpoint_Read_8();
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* If fewer than three regions are requested, then the region list is terminated with a region of size 0. */ | void mpc83xx_pci_init(int num_buses, struct pci_region **reg) | /* If fewer than three regions are requested, then the region list is terminated with a region of size 0. */
void mpc83xx_pci_init(int num_buses, struct pci_region **reg) | {
volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
int i;
if (num_buses > MAX_BUSES) {
printf("%d PCI buses requested, %d supported\n",
num_buses, MAX_BUSES);
num_buses = MAX_BUSES;
}
pci_num_buses = num_buses;
udelay(100000);
for (i = 0; i < num_buses; i++)
immr->pci_ctrl[i].gcr = 1;
udelay(1020000);
for (i = 0; i < num_buses; i++)
pci_init_bus(i, reg[i]);
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Returns 0 in case of success, -1 otherwise */ | int xmlSwitchToEncoding(xmlParserCtxtPtr ctxt, xmlCharEncodingHandlerPtr handler) | /* Returns 0 in case of success, -1 otherwise */
int xmlSwitchToEncoding(xmlParserCtxtPtr ctxt, xmlCharEncodingHandlerPtr handler) | {
return (xmlSwitchToEncodingInt(ctxt, handler, -1));
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Replace a per-inode cookie due to revalidation detecting a file having changed on the server. */ | void nfs_fscache_reset_inode_cookie(struct inode *inode) | /* Replace a per-inode cookie due to revalidation detecting a file having changed on the server. */
void nfs_fscache_reset_inode_cookie(struct inode *inode) | {
struct nfs_inode *nfsi = NFS_I(inode);
struct nfs_server *nfss = NFS_SERVER(inode);
struct fscache_cookie *old = nfsi->fscache;
nfs_fscache_inode_lock(inode);
if (nfsi->fscache) {
fscache_relinquish_cookie(nfsi->fscache, 1);
nfsi->fscache = fscache_acquire_cookie(
nfss->nfs_client->fscache,
&nfs_fscache_inode_object_def,
nfsi);
dfprintk(FSCACHE,
"NFS: revalidation new cookie (0x%p/0x%p/0x%p/0x%p)\n",
nfss, nfsi, old, nfsi->fscache);
}
nfs_fscache_inode_unlock(inode);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Given a group, destroy all of the marks associated with that group. */ | void fsnotify_clear_marks_by_group(struct fsnotify_group *group) | /* Given a group, destroy all of the marks associated with that group. */
void fsnotify_clear_marks_by_group(struct fsnotify_group *group) | {
struct fsnotify_mark_entry *lentry, *entry;
LIST_HEAD(free_list);
spin_lock(&group->mark_lock);
list_for_each_entry_safe(entry, lentry, &group->mark_entries, g_list) {
list_add(&entry->free_g_list, &free_list);
list_del_init(&entry->g_list);
fsnotify_get_mark(entry);
}
spin_unlock(&group->mark_lock);
list_for_each_entry_safe(entry, lentry, &free_list, free_g_list) {
fsnotify_destroy_mark_by_entry(entry);
fsnotify_put_mark(entry);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* For Standby Exit, or any other mode in which the DRAM is in SR, this bit must be set to 0. */ | void perform_ddr_reset(struct mrc_params *mrc_params) | /* For Standby Exit, or any other mode in which the DRAM is in SR, this bit must be set to 0. */
void perform_ddr_reset(struct mrc_params *mrc_params) | {
ENTERFN();
mrc_write_mask(MEM_CTLR, DRMC, DRMC_COLDWAKE, DRMC_COLDWAKE);
dram_wake_command();
msg_port_write(MEM_CTLR, DRMC,
mrc_params->rd_odt_value == 0 ? DRMC_ODTMODE : 0);
LEAVEFN();
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Initialize DMA config structure. Fill each pstcDmaInit with default value. */ | int32_t DMA_StructInit(stc_dma_init_t *pstcDmaInit) | /* Initialize DMA config structure. Fill each pstcDmaInit with default value. */
int32_t DMA_StructInit(stc_dma_init_t *pstcDmaInit) | {
int32_t i32Ret = LL_OK;
if (NULL == pstcDmaInit) {
i32Ret = LL_ERR_INVD_PARAM;
} else {
pstcDmaInit->u32IntEn = DMA_INT_DISABLE;
pstcDmaInit->u32SrcAddr = 0x00UL;
pstcDmaInit->u32DestAddr = 0x00UL;
pstcDmaInit->u32DataWidth = DMA_DATAWIDTH_8BIT;
pstcDmaInit->u32BlockSize = 0x01UL;
pstcDmaInit->u32TransCount = 0x00UL;
pstcDmaInit->u32SrcAddrInc = DMA_SRC_ADDR_FIX;
pstcDmaInit->u32DestAddrInc = DMA_DEST_ADDR_FIX;
}
return i32Ret;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This function checks VarOffset and VarWidth is in the block range. */ | BOOLEAN BlockArrayCheck(IN IFR_BLOCK_DATA *RequestBlockArray, IN UINT16 VarOffset, IN UINT16 VarWidth, IN BOOLEAN IsNameValueType, IN EFI_HII_HANDLE HiiHandle) | /* This function checks VarOffset and VarWidth is in the block range. */
BOOLEAN BlockArrayCheck(IN IFR_BLOCK_DATA *RequestBlockArray, IN UINT16 VarOffset, IN UINT16 VarWidth, IN BOOLEAN IsNameValueType, IN EFI_HII_HANDLE HiiHandle) | {
LIST_ENTRY *Link;
IFR_BLOCK_DATA *BlockData;
EFI_STRING Name;
if (RequestBlockArray == NULL) {
return TRUE;
}
for (Link = RequestBlockArray->Entry.ForwardLink; Link != &RequestBlockArray->Entry; Link = Link->ForwardLink) {
BlockData = BASE_CR (Link, IFR_BLOCK_DATA, Entry);
if (IsNameValueType) {
Name = InternalGetString (HiiHandle, VarOffset);
ASSERT (Name != NULL);
if (StrnCmp (BlockData->Name, Name, StrLen (Name)) == 0) {
FreePool (Name);
return TRUE;
}
FreePool (Name);
} else {
if ((VarOffset >= BlockData->Offset) && ((VarOffset + VarWidth) <= (BlockData->Offset + BlockData->Width))) {
return TRUE;
}
}
}
return FALSE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */ | UINT32 EFIAPI PciExpressBitFieldOr32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData) | /* If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT32 EFIAPI PciExpressBitFieldOr32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData) | {
ASSERT_INVALID_PCI_ADDRESS (Address);
if (Address >= PcdPciExpressBaseSize ()) {
return (UINT32)-1;
}
return MmioBitFieldOr32 (
(UINTN)GetPciExpressBaseAddress () + Address,
StartBit,
EndBit,
OrData
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* The digit counter callback function, as described at the top of this file. */ | static void prvDigitCounterTimerCallback(xTimerHandle xTimer) | /* The digit counter callback function, as described at the top of this file. */
static void prvDigitCounterTimerCallback(xTimerHandle xTimer) | {
static const unsigned short usNumbersPatterns[] = { 0x8004, 0xF204, 0x4804, 0x6004, 0x3204, 0x2404, 0x0404, 0xF104, 0x0004, 0x2004 };
static long lCounter = 0L;
const long lNumberOfDigits = 10L;
unsigned short usCheckLEDState;
usCheckLEDState = ( FM3_GPIO->PDOR3 & mainCHECK_LED );
FM3_GPIO->PDOR3 = usNumbersPatterns[ lCounter ] | usCheckLEDState; lCounter++;
if( lCounter >= lNumberOfDigits )
{
lCounter = 0L;
}
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* This function updates mtime and ctime of the inode if it is not equivalent to current time. Returns zero in case of success and a negative error code in case of failure. */ | static int update_mctime(struct ubifs_info *c, struct inode *inode) | /* This function updates mtime and ctime of the inode if it is not equivalent to current time. Returns zero in case of success and a negative error code in case of failure. */
static int update_mctime(struct ubifs_info *c, struct inode *inode) | {
struct timespec now = ubifs_current_time(inode);
struct ubifs_inode *ui = ubifs_inode(inode);
if (mctime_update_needed(inode, &now)) {
int err, release;
struct ubifs_budget_req req = { .dirtied_ino = 1,
.dirtied_ino_d = ALIGN(ui->data_len, 8) };
err = ubifs_budget_space(c, &req);
if (err)
return err;
mutex_lock(&ui->ui_mutex);
inode->i_mtime = inode->i_ctime = ubifs_current_time(inode);
release = ui->dirty;
mark_inode_dirty_sync(inode);
mutex_unlock(&ui->ui_mutex);
if (release)
ubifs_release_budget(c, &req);
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function parse the value got from TPM2_GetCapability and return the LockoutInterval. */ | EFI_STATUS EFIAPI Tpm2GetCapabilityLockoutInterval(OUT UINT32 *LockoutInterval) | /* This function parse the value got from TPM2_GetCapability and return the LockoutInterval. */
EFI_STATUS EFIAPI Tpm2GetCapabilityLockoutInterval(OUT UINT32 *LockoutInterval) | {
TPMS_CAPABILITY_DATA TpmCap;
TPMI_YES_NO MoreData;
EFI_STATUS Status;
Status = Tpm2GetCapability (
TPM_CAP_TPM_PROPERTIES,
TPM_PT_LOCKOUT_INTERVAL,
1,
&MoreData,
&TpmCap
);
if (EFI_ERROR (Status)) {
return Status;
}
*LockoutInterval = SwapBytes32 (TpmCap.data.tpmProperties.tpmProperty->value);
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL is returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. */ | VOID* EFIAPI AllocatePages(IN UINTN Pages) | /* Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL is returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. */
VOID* EFIAPI AllocatePages(IN UINTN Pages) | {
return InternalAllocatePages (EfiBootServicesData, Pages);
} | tianocore/edk2 | C++ | Other | 4,240 |
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