LLM_to_Silicon: bulk run artifacts

Large outputs of an independent, analytical reproduction study inspired by From LLM to Silicon: RL-Driven ASIC Architecture Exploration for On-Device AI Inference (Ganti and Xu, arXiv:2604.07526). The code, configurations, documentation and the small evidence files of every run (manifests, reports, resolved settings, Pareto frontiers) live in the companion GitHub repository skr3178/FPGA_Accelerator (private). This repository holds only the files too large for git.

Everything here is an analytical prediction under declared, mostly assumed coefficients. Nothing is a silicon measurement, and nothing reproduces the paper's reported numbers.

Contents

The layout mirrors runs/<run_id>/ in the GitHub repository, so the files drop into place.

Files	Count	What they are
runs/*/metrics.csv	31	One row per evaluator request: design, feasibility, throughput, power, area, cost and, for RL runs, reward components
*.zip in run folders	70	Stable-Baselines3 SAC policies (reduced design environment); 63 under checkpoints/
*.pt in run folders	41	Custom hybrid SAC policies (categorical mesh head plus continuous controls); 35 under checkpoints/
runs/*/*.json.gz	2	Full tile placements from the decode-mapping gates

Produced 2026-10-06 to 2026-10-08 on an Apple M4 MacBook Air (CPU only). Each run folder's manifest.json on GitHub records its seeds, settings and source revision; rerunning a configuration with the same seeds regenerates these files.

Restore into a checkout

From the root of a checkout of the GitHub repository:

hf download sangramrout/LLM_to_Silicon --include "runs/*" --local-dir .

run_artifacts.sha256 in the GitHub repository (docs/run_artifacts.sha256) lists the SHA-256 of every file here.