author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
1,801 | 18.10.2022 15:17:29 | -7,200 | 2c6685bc28e6ff99351d54eeab484a95d6544af6 | Fix of the ReadOnlySequenceStream Seek method
Seek from the SeekOrigin.End with a negative offset now functions correctly. | [
{
"change_type": "MODIFY",
"old_path": "src/Nerdbank.Streams/ReadOnlySequenceStream.cs",
"new_path": "src/Nerdbank.Streams/ReadOnlySequenceStream.cs",
"diff": "@@ -143,7 +143,7 @@ namespace Nerdbank.Streams\nelse\n{\nrelativeTo = this.readOnlySequence.Start;\n- offset += this.Position;\n+ offset += ... | C# | MIT License | aarnott/nerdbank.streams | Fix of the ReadOnlySequenceStream Seek method
Seek from the SeekOrigin.End with a negative offset now functions correctly. |
1,799 | 22.11.2022 10:57:02 | 25,200 | ba7036c43c8d7c0b9a56e6dd07ab8838861db5a0 | Avoid deprecated `new Buffer` | [
{
"change_type": "MODIFY",
"old_path": "src/nerdbank-streams/src/MultiplexingStreamFormatters.ts",
"new_path": "src/nerdbank-streams/src/MultiplexingStreamFormatters.ts",
"diff": "@@ -83,7 +83,7 @@ export class MultiplexingStreamV1Formatter extends MultiplexingStreamFormatter {\n/**\n* The magic num... | C# | MIT License | aarnott/nerdbank.streams | Avoid deprecated `new Buffer` |
1,799 | 05.12.2022 09:42:03 | 25,200 | 63594c8cf97d1d376365842c804154a8c2040b0e | Add contributing doc to nerdbank-streams | [
{
"change_type": "MODIFY",
"old_path": "CONTRIBUTING.md",
"new_path": "CONTRIBUTING.md",
"diff": "@@ -37,4 +37,9 @@ to the feeds that packages for this repo come from, if any.\nBuilding, testing, and packing this repository can be done by using the standard dotnet CLI commands (e.g. `dotnet build`, ... | C# | MIT License | aarnott/nerdbank.streams | Add contributing doc to nerdbank-streams |
1,809 | 10.12.2022 11:55:16 | 25,200 | e242a99bc4f7e7f38da558e06f8207f1dbd407fc | Add test demonstrating spinning hang
Reproduces | [
{
"change_type": "MODIFY",
"old_path": "src/nerdbank-streams/src/tests/FullDuplexStream.spec.ts",
"new_path": "src/nerdbank-streams/src/tests/FullDuplexStream.spec.ts",
"diff": "@@ -2,6 +2,7 @@ import { PassThrough, Readable, Writable } from \"stream\";\nimport { Deferred } from \"../Deferred\";\nim... | C# | MIT License | aarnott/nerdbank.streams | Add test demonstrating spinning hang
Reproduces #557 |
1,809 | 10.12.2022 12:31:55 | 25,200 | d5ffbe7289c54a5ebd508bb835dfd7b3eedb3b77 | Fix memory leaks in event handlers | [
{
"change_type": "MODIFY",
"old_path": "src/nerdbank-streams/src/MultiplexingStreamFormatters.ts",
"new_path": "src/nerdbank-streams/src/MultiplexingStreamFormatters.ts",
"diff": "@@ -299,11 +299,17 @@ export class MultiplexingStreamV2Formatter extends MultiplexingStreamFormatter {\nconst readObject... | C# | MIT License | aarnott/nerdbank.streams | Fix memory leaks in event handlers |
1,803 | 17.12.2022 16:10:38 | 25,200 | a2a13d4f14def7142fce7981af2049ff8983b1d3 | Include an error message payload alongside ChannelTerminated frames | [
{
"change_type": "ADD",
"old_path": ".DS_Store",
"new_path": ".DS_Store",
"diff": "Binary files /dev/null and b/.DS_Store differ\n"
},
{
"change_type": "MODIFY",
"old_path": "src/Nerdbank.Streams/MultiplexingStream.Channel.cs",
"new_path": "src/Nerdbank.Streams/MultiplexingStream.Cha... | C# | MIT License | aarnott/nerdbank.streams | Include an error message payload alongside ChannelTerminated frames |
1,799 | 17.12.2022 16:19:43 | 25,200 | 728409065ba795bc55a51a4e69617ddd03ef5863 | Touch-up on Devesh's pull request | [
{
"change_type": "DELETE",
"old_path": ".DS_Store",
"new_path": ".DS_Store",
"diff": "Binary files a/.DS_Store and /dev/null differ\n"
},
{
"change_type": "MODIFY",
"old_path": "src/Nerdbank.Streams/MultiplexingStream.Channel.cs",
"new_path": "src/Nerdbank.Streams/MultiplexingStream.... | C# | MIT License | aarnott/nerdbank.streams | Touch-up on Devesh's pull request |
1,799 | 10.01.2023 06:13:56 | 25,200 | 47e26d9ccef078fd45e4294b64f951c2757ca55a | Use `nextTickAsync` in unit test | [
{
"change_type": "MODIFY",
"old_path": "src/nerdbank-streams/src/tests/MultiplexingStream.spec.ts",
"new_path": "src/nerdbank-streams/src/tests/MultiplexingStream.spec.ts",
"diff": "@@ -126,7 +126,7 @@ import { nextTick } from \"process\";\n// Give time for the termination fram to arrive *before* we... | C# | MIT License | aarnott/nerdbank.streams | Use `nextTickAsync` in unit test |
136,372 | 29.12.2016 20:35:22 | 25,200 | fd498b77c5adb8ac4b17770b99797ab6ce90d0d7 | stm32: Remove unused struct definitions
The code that referenced these structure definitions was removed
months ago. GCC 6.2 warns about the structures being definte but
not used.
BRANCH=none
TEST=Build tested only | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/adc-stm32f3.c",
"new_path": "chip/stm32/adc-stm32f3.c",
"diff": "@@ -30,11 +30,6 @@ struct mutex adc_lock;\nstatic int watchdog_ain_id;\n-static const struct dma_option dma_adc_option = {\n- STM32_DMAC_ADC, (void *)&STM32_ADC_DR,\n- STM32_DMA_CCR_MS... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stm32: Remove unused struct definitions
The code that referenced these structure definitions was removed
months ago. GCC 6.2 warns about the structures being definte but
not used.
BRANCH=none
BUG=none
TEST=Build tested only
Change-Id: I68de7cc351667b3fb51aa9004dfc86d936f4a9cc
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424432
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,234 | 21.12.2016 16:27:09 | 28,800 | 66ea614158975f7db9c0eeb141bb54c935a4ed61 | smart_battery: Cleanup smart battery & SB users code
BRANCH=none
TEST=Manually tested on Reef. Battery info works.
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/eve/battery.c",
"new_path": "board/eve/battery.c",
"diff": "@@ -66,16 +66,13 @@ enum battery_disconnect_state battery_get_disconnect_state(void)\nif (extpower_is_present()) {\n/* Check if battery charging + discharging is disabled. */\n- rv = sb_write(SB... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | smart_battery: Cleanup smart battery & SB users code
BUG=chrome-os-partner:61173
BRANCH=none
TEST=Manually tested on Reef. Battery info works.
Change-Id: I6e867eee38885186f8e63a934f52e826f0cf72fd
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/422998
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,234 | 30.12.2016 08:54:42 | 28,800 | bcffec7fdc50e959cb298d094d8af472777dba75 | reef: Cleanup battery code
Removed redundant code and clubbed variables.
BRANCH=none
TEST=Battery info works.
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/reef/battery.c",
"new_path": "board/reef/battery.c",
"diff": "@@ -35,13 +35,17 @@ enum temp_range {\nTEMP_RANGE_4,\n};\n+struct ship_mode_info {\n+ const int ship_mode_reg;\n+ const int ship_mode_data;\n+ int (*batt_init)(void);\n+};\n+\nstruct board_bat... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | reef: Cleanup battery code
Removed redundant code and clubbed variables.
BUG=chrome-os-partner:61173
BRANCH=none
TEST=Battery info works.
Change-Id: I8d53df0d98aa5607db7cdc62223dc804b452dc59
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/424321
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,340 | 03.01.2017 14:33:04 | 28,800 | 0c7b7f222c59726edca80b1a01f8f217cc5cfcf7 | driver: als: Add error code UNCHANGED
This error code is used to indicates the data has not changed.
Motion sense task will therefore not add any entry in the sensor FIFO.
TEST=make -j buildall
BRANCH=reef | [
{
"change_type": "MODIFY",
"old_path": "driver/als_si114x.c",
"new_path": "driver/als_si114x.c",
"diff": "@@ -141,7 +141,7 @@ static int si114x_read_results(struct motion_sensor_t *s, int nb)\nbreak;\n}\nif (i == nb)\n- return EC_SUCCESS;\n+ return EC_ERROR_UNCHANGED;\n#ifdef CONFIG_ACCEL_FIFO\nvect... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | driver: als: Add error code UNCHANGED
This error code is used to indicates the data has not changed.
Motion sense task will therefore not add any entry in the sensor FIFO.
BUG=chrome-os-partner:59423
TEST=make -j buildall
BRANCH=reef
Change-Id: I58b9be5675d8949bd682d8c89dadea1dfff9bf2e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424856
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,396 | 05.01.2017 14:54:23 | 28,800 | a59b978317cee5acee51b4e09f91e0fb4dffff99 | cr50: enable use malloc/free
In preparation to adding new features, switch cr50 to using shared
memory allocator allowing concurrently allocated buffers.
BRANCH=none
TEST=verified that cr50 works fine and could be updated on a reef. | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/board.h",
"new_path": "board/cr50/board.h",
"diff": "/* Go to sleep when nothing else is happening */\n#define CONFIG_LOW_POWER_IDLE\n+/* Allow multiple concurrent memory allocations. */\n+#define CONFIG_MALLOC\n+\n/* Detect the states of other devi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: enable use malloc/free
In preparation to adding new features, switch cr50 to using shared
memory allocator allowing concurrently allocated buffers.
BRANCH=none
BUG=chrome-os-partner:59873
TEST=verified that cr50 works fine and could be updated on a reef.
Change-Id: I87656cbd1f6d4928f25396dbcc59cc3f43984d85
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424850
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,234 | 06.01.2017 08:53:55 | 28,800 | 8a681c8e60159dfd23047346ac93e585420b4146 | skylake: Reuse the sleep event code from the common code
BRANCH=none
TEST=make buildall -j
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/chell/board.h",
"new_path": "board/chell/board.h",
"diff": "#define CONFIG_POWER_BUTTON_X86\n#define CONFIG_POWER_COMMON\n#define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30\n+#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE\n#define CONFIG_POWER_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | skylake: Reuse the sleep event code from the common code
BUG=chrome-os-partner:59141
BRANCH=none
TEST=make buildall -j
Change-Id: I881b92215f24ea047ec4fc3109b174ff1615de29
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/425486
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,234 | 06.01.2017 09:22:54 | 28,800 | 4fa1c8b9e3dd89bb069ce0d2478dc12b542ba66b | apollolake: Add support to enable eSPI signals
BRANCH=none
TEST=make buildall -j
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "power/apollolake.c",
"new_path": "power/apollolake.c",
"diff": "@@ -46,6 +46,32 @@ static int throttle_cpu; /* Throttle CPU? */\nstatic int forcing_coldreset; /* Forced coldreset in progress? */\nstatic int power_s5_up; /* Chipset is sequencing up or down */\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | apollolake: Add support to enable eSPI signals
BUG=chrome-os-partner:59141
BRANCH=none
TEST=make buildall -j
Change-Id: I6d90d647a6e19c627aa68ddd8a203d6be8b2e32d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/425820
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,396 | 08.01.2017 16:13:08 | 28,800 | 618b127c4903a171731730b4b53472f8c645e543 | nvmem_vars: use dynamic memory allocation
To avoid SRAM footprint, let's use dynamic memory allocation in
nvram_vars. No one is using this module yet, but the cr50 use case is
coming up.
BRANCH=none
TEST=make buildall -j passes | [
{
"change_type": "MODIFY",
"old_path": "common/nvmem_vars.c",
"new_path": "common/nvmem_vars.c",
"diff": "#include \"nvmem.h\"\n#include \"nvmem_vars.h\"\n#include \"printf.h\"\n+#include \"shared_mem.h\"\n#include \"util.h\"\n/************************************************************************... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nvmem_vars: use dynamic memory allocation
To avoid SRAM footprint, let's use dynamic memory allocation in
nvram_vars. No one is using this module yet, but the cr50 use case is
coming up.
BRANCH=none
BUG=chrome-os-partner:61107
TEST=make buildall -j passes
Change-Id: I21534430217ad387a3787fcc127da596a1b48e03
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/426088
Reviewed-by: Bill Richardson <wfrichar@chromium.org> |
136,396 | 10.01.2017 12:47:10 | 28,800 | 3d1706f8b43e7e8584adda607d5baca03e4a178b | cr50: prepare for releasing rw version 0.0.14
Which is coming soon.
BRANCH=none
TEST=built a new image, verified that its rw version is 0.0.13 | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 13, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare for releasing rw version 0.0.14
Which is coming soon.
BRANCH=none
BUG=none
TEST=built a new image, verified that its rw version is 0.0.13
Change-Id: Iddd00f901a74e3b4f6d5796a8092aa39676fc3b3
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/425854
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,236 | 04.01.2017 19:21:34 | -28,800 | 302431a288531dc884e70f88c00fa0b117e22d5b | Electro: Add battery hint message
Showing which battery is useful when debug.
BRANCH=master
TEST=power on EC can see prompt
Commit-Ready: Ryan Zhang
Tested-by: Ryan Zhang | [
{
"change_type": "MODIFY",
"old_path": "board/reef/battery.c",
"new_path": "board/reef/battery.c",
"diff": "#include \"i2c.h\"\n#include \"util.h\"\n+#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args)\n+\nenum battery_type {\nBATTERY_SONY_CORP,\nBATTERY_SMP_COS4870,\n@@ -306,7 +30... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Electro: Add battery hint message
Showing which battery is useful when debug.
BUG=None
BRANCH=master
TEST=power on EC can see prompt
Change-Id: Ic83d667ae377dc787a776116e41b09f21ee5a3be
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/425212
Commit-Ready: Ryan Zhang <ryan.zhang.quanta@gmail.com>
Tested-by: Ryan Zhang <ryan.zhang.quanta@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,340 | 10.01.2017 16:34:47 | 28,800 | dabc580d7e421e5bb3eb115b72d75dffa268604d | poppy: Add ARC++ sensor support.
Very similar to CL:424846, enable sensor FIFO, accel interrupt.
TEST=Not test on actual hardware.
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.h",
"new_path": "board/poppy/board.h",
"diff": "/* TODO(crosbug.com/p/61098): Is this the correct thermistor? */\n#define CONFIG_THERMISTOR_NCP15WB\n+#define CONFIG_MKBP_EVENT\n+#define CONFIG_MKBP_USE_HOST_EVENT\n#define CONFIG_ACCELGYRO_BMI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Add ARC++ sensor support.
Very similar to CL:424846, enable sensor FIFO, accel interrupt.
BUG=chrome-os-partner:61098
TEST=Not test on actual hardware.
BRANCH=none
Change-Id: Ie5c7304fcc00919cce62ed47a548104e8d0ac454
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/426880
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,200 | 12.01.2017 17:18:36 | -28,800 | dac33aadfff14e1a79eb557135d4b539f2cedd54 | Basking: Fix cannot power on when resume from battery cutoff.
BRANCH=reef
TEST=1. DC mode, enter battery cutoff.
2. After system shutdown, wait 10sec.
3. Plug in AC to check system power on. | [
{
"change_type": "MODIFY",
"old_path": "board/reef/battery.c",
"new_path": "board/reef/battery.c",
"diff": "@@ -52,6 +52,7 @@ struct board_batt_params {\n#define DEFAULT_BATTERY_TYPE BATTERY_SONY_CORP\n#define SONY_DISCHARGE_DISABLE_FET_BIT (0x01 << 13)\n+#define C22N1626_DISCHARGE_ENABLE_FET_BIT (0... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Basking: Fix cannot power on when resume from battery cutoff.
BRANCH=reef
BUG=chrome-os-partner:61849
TEST=1. DC mode, enter battery cutoff.
2. After system shutdown, wait 10sec.
3. Plug in AC to check system power on.
Change-Id: I5f4cf023fa70cff42c2d1cc888b1d2ee39226af4
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/427441
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,413 | 13.01.2017 10:26:30 | -19,080 | 3e6fea630387c83bea9dc25d0e6046262a4f756d | poppy: WWAN: Drive PP3300_DX_LTE high to enable LTE
BRANCH=none
TEST=Boot and verify lsusb to see wwan devices
Commit-Ready: Jenny Tc
Tested-by: Jenny Tc | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/gpio.inc",
"new_path": "board/poppy/gpio.inc",
"diff": "@@ -62,7 +62,7 @@ GPIO(PP3300_DX_CAM, PIN(1, 0), GPIO_OUTPUT)\nGPIO(CAM_PMIC_RST_L, PIN(0, 7), GPIO_OUTPUT)\nGPIO(WLAN_PE_RST, PIN(1, 2), GPIO_OUTPUT)\n-GPIO(PP3300_DX_LTE, PIN(0, 5), GPIO_OUT... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: WWAN: Drive PP3300_DX_LTE high to enable LTE
BRANCH=none
BUG=chrome-os-partner:61098
TEST=Boot and verify lsusb to see wwan devices
Change-Id: I69ed791400d81c16a605d71cd25c58e0229a066c
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/427353
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Reviewed-by: Jenny Tc <jenny.tc@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,219 | 11.01.2017 12:50:36 | 25,200 | 9fd2736d90c598b335d689d8db5ad727194a1991 | Makefile: Suppress unwanted tpm output
Use the 'echo' command to suppress unwanted build output when V=0.
BRANCH=none
TEST=V=0 emerge-reef chromeos-ec; See that the tpm output is gone | [
{
"change_type": "MODIFY",
"old_path": "test/tpm_test/Makefile",
"new_path": "test/tpm_test/Makefile",
"diff": "# Use of this source code is governed by a BSD-style license that can be\n# found in the LICENSE file.\n+# V unset for normal output, V=1 for verbose output, V=0 for silent build\n+# (warn... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Makefile: Suppress unwanted tpm output
Use the 'echo' command to suppress unwanted build output when V=0.
Signed-off-by: Simon Glass <sjg@chromium.org>
BUG=chromium:680243
BRANCH=none
TEST=V=0 emerge-reef chromeos-ec; See that the tpm output is gone
Change-Id: Ia742b0b5270b969ec4f51967810e616348e39dbd
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427365
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,200 | 16.01.2017 14:38:36 | -28,800 | cc86aabcf9f88ce01c149d6fc60527d721f536c9 | Basking: Add Basking battery parameters for charger profile override.
BRANCH=reef
TEST=Observed correct charging profile is selected with Basking two battery. | [
{
"change_type": "MODIFY",
"old_path": "board/reef/battery.c",
"new_path": "board/reef/battery.c",
"diff": "@@ -177,6 +177,96 @@ const struct battery_info batt_info_sonycorp = {\n.discharging_max_c = 75,\n};\n+static const struct fast_charge_profile fast_charge_smp_c22n1626_info[] = {\n+ /* < 1C */\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Basking: Add Basking battery parameters for charger profile override.
BRANCH=reef
BUG=chrome-os-partner:60899
TEST=Observed correct charging profile is selected with Basking two battery.
Change-Id: I2b030bf2c52e4717bec269d79dbab4c0f0126852
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/428612
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,396 | 17.11.2016 22:03:16 | 28,800 | 144615c19cb1858eec868a44ab3c80c60dc331d9 | cr50: describe GPIO assignment
Just a clean up patch attempting to make it easier to new users to
come up to speed with cr50 use of H1 GPIO subsystem.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/gpio.inc",
"new_path": "board/cr50/gpio.inc",
"diff": "* found in the LICENSE file.\n*/\n+/*\n+ * This file describes GPIO mapping for the cr50 code running on the H1 chip.\n+ *\n+ * For the purposes of this file H1 core has the following logical an... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: describe GPIO assignment
Just a clean up patch attempting to make it easier to new users to
come up to speed with cr50 use of H1 GPIO subsystem.
BRANCH=none
BUG=none
TEST=none
Change-Id: I539e7629ee94ddef26ae1616dc6eb5c151e9d97e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/412412
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,197 | 14.01.2017 17:54:29 | -28,800 | 78b9a4877932540bc0ab56456eaf121d5b0a6b37 | poppy: Add support for recovery mode
poppy enters recovery mode by pressing volume up+down keys
BRANCH=none
TEST=Press Power+Volume Up+Volume Down, poppy enters recovery
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.c",
"new_path": "board/poppy/board.c",
"diff": "@@ -283,10 +283,10 @@ struct als_t als[] = {\nBUILD_ASSERT(ARRAY_SIZE(als) == ALS_COUNT);\nconst struct button_config buttons[CONFIG_BUTTON_COUNT] = {\n- {\"Volume Down\", KEYBOARD_BUTTON_VOLUME... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Add support for recovery mode
poppy enters recovery mode by pressing volume up+down keys
BRANCH=none
BUG=chrome-os-partner:61930
TEST=Press Power+Volume Up+Volume Down, poppy enters recovery
Change-Id: I052277a3107b2133bdec46b1219cfc6ff6c54680
Reviewed-on: https://chromium-review.googlesource.com/428531
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,228 | 17.01.2017 23:25:55 | 28,800 | e4f2da5004cc2a8bb27521401bbb258749b5ef67 | chip/npcx: Add support for chip_save_reset_flags
Add and export chip_save_reset_flags to allow boards to use this
function when required.
BRANCH=None
TEST=Compiles successfully for poppy. | [
{
"change_type": "MODIFY",
"old_path": "chip/npcx/system.c",
"new_path": "chip/npcx/system.c",
"diff": "@@ -156,6 +156,11 @@ void system_set_rtc(uint32_t seconds)\nudelay(MTC_TTC_LOAD_DELAY_US);\n}\n+void chip_save_reset_flags(int flags)\n+{\n+ bbram_data_write(BBRM_DATA_INDEX_SAVED_RESET_FLAGS, fla... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/npcx: Add support for chip_save_reset_flags
Add and export chip_save_reset_flags to allow boards to use this
function when required.
BUG=chrome-os-partner:61883
BRANCH=None
TEST=Compiles successfully for poppy.
Change-Id: I6f96bc61135fc4e3abb62a01d47c2cba8eb45b60
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431191
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,396 | 22.01.2017 09:06:04 | 28,800 | 60f3d31fddec474d6d43a37d08201f176765dd4b | g: fix dcrypto key context initialization
mempy should be using size of the object, not size of the pointer.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "chip/g/dcrypto/app_key.c",
"new_path": "chip/g/dcrypto/app_key.c",
"diff": "@@ -22,7 +22,7 @@ int DCRYPTO_appkey_init(enum dcrypto_appid appid, struct APPKEY_CTX *ctx)\nif (appid >= ARRAY_SIZE(dcrypto_app_names))\nreturn 0;\n- memset(ctx, 0, sizeof(ctx));\n+ m... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | g: fix dcrypto key context initialization
mempy should be using size of the object, not size of the pointer.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I1ccb8ca4c313da8dad45b19375f390cfb346ac65
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431106
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Nagendra Modadugu <ngm@google.com> |
136,409 | 22.01.2017 17:12:31 | 28,800 | 66828807afb81d6687fac6319a2d8340e82cef3d | eve: Discharge on AC until charger is detected
To avoid inrush current from the external charger, enable
discharge on AC until the new charger is detected and
charge detect delay has passed.
BRANCH=none
TEST=multiple ramp resets | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.c",
"new_path": "board/eve/board.c",
"diff": "@@ -448,6 +448,14 @@ int board_set_active_charge_port(int charge_port)\ncase CHARGE_PORT_NONE:\nbd9995x_port_select = 0;\nbd9995x_port = BD9995X_CHARGE_PORT_BOTH;\n+\n+ /*\n+ * To avoid inrush curre... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Discharge on AC until charger is detected
To avoid inrush current from the external charger, enable
discharge on AC until the new charger is detected and
charge detect delay has passed.
BUG=chrome-os-partner:60547
BRANCH=none
TEST=multiple ramp resets
Change-Id: I9dbb028bc149589ac586e8ff1f5d4cc11ad4bb3f
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/431138
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,228 | 20.01.2017 13:00:46 | 28,800 | 625925d725301069d2d2630370e0b6974d3b9491 | poppy: Select CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
Also program EC_PLATFORM_RST as an out signal from the EC.
BRANCH=None
TEST=Verified that reboot on EC console works fine for poppy. Board is
no longer stuck in G3. | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.h",
"new_path": "board/poppy/board.h",
"diff": "/* SOC */\n#define CONFIG_CHIPSET_SKYLAKE\n+#define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET\n#define CONFIG_CHIPSET_RESET_HOOK\n#define CONFIG_ESPI\n#define CONFIG_ESPI_VW_SIGNALS\n"
},
{
... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Select CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
Also program EC_PLATFORM_RST as an out signal from the EC.
BUG=chrome-os-partner:61883
BRANCH=None
TEST=Verified that reboot on EC console works fine for poppy. Board is
no longer stuck in G3.
Change-Id: I0a2b052790fec2d55417e32f5aea53a7438a038f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431193
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,228 | 20.01.2017 13:05:19 | 28,800 | 38c5661f14f8a4be018e4b6e1641071c5f1fe866 | eve: Select CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
Also program EC_PLATFORM_RST as an out signal from the EC.
BRANCH=None
TEST=Compiles successfully for eve. | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.h",
"new_path": "board/eve/board.h",
"diff": "/* SOC */\n#define CONFIG_CHIPSET_SKYLAKE\n+#define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET\n#define CONFIG_CHIPSET_RESET_HOOK\n#define CONFIG_ESPI\n#define CONFIG_ESPI_VW_SIGNALS\n"
},
{
"ch... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Select CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
Also program EC_PLATFORM_RST as an out signal from the EC.
BUG=chrome-os-partner:61883
BRANCH=None
TEST=Compiles successfully for eve.
Change-Id: I41486e6050727ca822a27054244da3fed5ee3b7a
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431194
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,197 | 19.01.2017 21:05:35 | -28,800 | 26618037db336045afb1f654f059eb4703696d9f | poppy: Fix ADC_AMON_BMON range
BRANCH=none
TEST="amon" in EC consoles, values make sense.
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.c",
"new_path": "board/poppy/board.c",
"diff": "@@ -182,9 +182,12 @@ const struct adc_t adc_channels[] = {\nADC_MAX_VOLT, ADC_READ_MAX+1, 0},\n/* Vbus sensing (10x voltage divider). */\n[ADC_VBUS] = {\"VBUS\", NPCX_ADC_CH2, ADC_MAX_VOLT*10, A... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Fix ADC_AMON_BMON range
BRANCH=none
BUG=chrome-os-partner:61098
TEST="amon" in EC consoles, values make sense.
Change-Id: Id1299aff3a6a24c306c8990c5eaf523aa0c27e45
Reviewed-on: https://chromium-review.googlesource.com/430475
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,197 | 25.01.2017 09:27:21 | -28,800 | 09fca7bddbc4785c5f0d5f4590cdf9d09b3d5471 | flash: Fix ccprintf parameters in flasherase/write
Both these functions had a superfluous offset parameter.
BRANCH=none
TEST=flasherase/write
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "common/flash.c",
"new_path": "common/flash.c",
"diff": "@@ -723,7 +723,7 @@ static int command_flash_erase(int argc, char **argv)\nif (rv)\nreturn rv;\n- ccprintf(\"Erasing %d bytes at 0x%x...\\n\", size, offset, offset);\n+ ccprintf(\"Erasing %d bytes at 0x%x... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | flash: Fix ccprintf parameters in flasherase/write
Both these functions had a superfluous offset parameter.
BRANCH=none
BUG=chrome-os-partner:61671
TEST=flasherase/write
Change-Id: I2973490e472c2e658440b56a0b76ec9f2aab749a
Reviewed-on: https://chromium-review.googlesource.com/432176
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,234 | 25.01.2017 14:29:52 | 28,800 | 325c93fa94dc8ffbd15386d66c45dc0aaca262bb | reef: Disable Trackpad in S5 to save power
BRANCH=reef
TEST=gpioget EN_P3300_TRACKPAD_ODL is 1 in S5 & below, 0 otherwise.
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/reef/board.c",
"new_path": "board/reef/board.c",
"diff": "@@ -687,6 +687,9 @@ static void board_chipset_startup(void)\n/* Enable USB-A port. */\ngpio_set_level(GPIO_USB1_ENABLE, 1);\n+ /* Enable Trackpad */\n+ gpio_set_level(GPIO_EN_P3300_TRACKPAD_ODL, 0... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | reef: Disable Trackpad in S5 to save power
BUG=chrome-os-partner:59712
BRANCH=reef
TEST=gpioget EN_P3300_TRACKPAD_ODL is 1 in S5 & below, 0 otherwise.
Change-Id: Iee55325c20df53aaa7f65c8c3091e343698d70fb
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/433083
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,203 | 26.01.2017 14:11:42 | -28,800 | 7736c887d786c8ee2374dcc2b7fe4a4fc066c9bb | pyro: Add battery firmware update support.
Add battery firmware update support.
BRANCH=reef
TEST=check ec_sb_firmware_update tool can work.
Commit-Ready: Keith Tzeng
Tested-by: Keith Tzeng | [
{
"change_type": "MODIFY",
"old_path": "board/pyro/board.h",
"new_path": "board/pyro/board.h",
"diff": "#define CONFIG_BATTERY_SMART\n#define CONFIG_BATTERY_VENDOR_PARAM\n+/* battery firmware update */\n+#define CONFIG_CRC8\n+#define CONFIG_SB_FIRMWARE_UPDATE\n+#define CONFIG_SMBUS\n+\n/* Charger */... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pyro: Add battery firmware update support.
Add battery firmware update support.
BUG=chrome-os-partner:59517
BRANCH=reef
TEST=check ec_sb_firmware_update tool can work.
Change-Id: I02fc91974ebf30d0b6177c45985ce879b92d7066
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/433477
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,203 | 25.01.2017 19:55:32 | -28,800 | 479b74223d598b415226914a6947a9e2536dcf57 | pyro/snappy: add console command to read ManufactureAccess() data
Follow reef setting.
BRANCH=reef
TEST=make buildall
Commit-Ready: Keith Tzeng
Tested-by: Keith Tzeng | [
{
"change_type": "MODIFY",
"old_path": "board/pyro/board.h",
"new_path": "board/pyro/board.h",
"diff": "/* EC console commands */\n#define CONFIG_CMD_ACCELS\n#define CONFIG_CMD_ACCEL_INFO\n+#define CONFIG_CMD_BATT_MFG_ACCESS\n#define CONFIG_CMD_CHARGER_ADC_AMON_BMON\n#define CONFIG_CHARGER_SENSE_RES... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pyro/snappy: add console command to read ManufactureAccess() data
Follow reef setting.
BUG=none
BRANCH=reef
TEST=make buildall
Change-Id: I2e98ccfcc152963dbe8bdd0a412d347147b38414
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/433258
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,377 | 27.01.2017 12:48:24 | 28,800 | 39a41bd665e5abe758be36bd5b5bbf4fe8e43778 | tpm: rename tpm_reset to tpm_reset_request
tpm_reset just requests a tpm reset it doesn't reset the tpm. Rename the
function to reflect that.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/board.c",
"new_path": "board/cr50/board.c",
"diff": "@@ -592,11 +592,11 @@ void tpm_rst_asserted(enum gpio_signal signal)\n* Reset TPM and wait to completion to make sure nvmem is\n* committed before reboot.\n*/\n- tpm_reset(1, 0);\n+ tpm_reset_requ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tpm: rename tpm_reset to tpm_reset_request
tpm_reset just requests a tpm reset it doesn't reset the tpm. Rename the
function to reflect that.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I6f4763b5de578a8cf263b2fac98fad3af2c25d65
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/434245
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,282 | 06.02.2017 17:29:14 | -28,800 | a3b0d7c8979fab5e3fe7f0151ff5d3e221e6531b | pyro: Defer sensor switching rate in S3
BRANCH=reef
TEST=Put the device in S5 and observed no I2C errors printed
on the EC console.
Commit-Ready: Keith Tzeng | [
{
"change_type": "MODIFY",
"old_path": "board/pyro/board.h",
"new_path": "board/pyro/board.h",
"diff": "#define CONFIG_WLAN_POWER_ACTIVE_LOW\n#define WIRELESS_GPIO_WLAN_POWER GPIO_WIRELESS_GPIO_WLAN_POWER\n+/*\n+ *During shutdown sequence TPS65094x PMIC turns off the sensor rails\n+ *asynchronously ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pyro: Defer sensor switching rate in S3
BUG=none
BRANCH=reef
TEST=Put the device in S5 and observed no I2C errors printed
on the EC console.
Change-Id: I15e3eedd05c7f8d5c67ee01d78afc3b4c072f1c1
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/438077
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,396 | 06.02.2017 17:06:06 | 28,800 | 97ef3f6a4f1420cbdc1485365ff81fabe4d4c38f | cr50: prepare to release rw 0.0.15
Update both prod and dev manifests.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 14, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release rw 0.0.15
Update both prod and dev manifests.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ie07bb00005461a22e263ee448fac7c77b25060ee
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/438687
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,203 | 06.02.2017 10:49:25 | -28,800 | 4c97751ca37ad46625b311cacd99057a5433551d | snappy: limit max input current for safety
Max = Max * 89%
BRANCH=reef
TEST=make buildall
Commit-Ready: Bruce Wan
Tested-by: Bruce Wan | [
{
"change_type": "MODIFY",
"old_path": "board/snappy/board.c",
"new_path": "board/snappy/board.c",
"diff": "@@ -606,6 +606,7 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,\nif (bd9995x_bc12_enable_charging(port, bc12_enable))\nreturn;\n+ charge_ma = (charge_ma * 89) / 100;\nch... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | snappy: limit max input current for safety
Max = Max * 89%
BUG=none
BRANCH=reef
TEST=make buildall
Change-Id: I7c37ce8ca25411b9c29f33e18899ccddd5b5979b
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/438205
Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,197 | 20.01.2017 11:04:08 | -28,800 | 047f41b9782da861c440eb62d3a504be83a7cc41 | hammer: Update pin layout
Previous layout was temporary, on an evaluation board.
BRANCH=none
TEST=make BOARD=hammer
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/gpio.inc",
"new_path": "board/hammer/gpio.inc",
"diff": "/* Declare symbolic names for all the GPIOs that we care about.\n* Note: Those with interrupt handlers must be declared first. */\n-GPIO_INT(TOUCHPAD_INT, PIN(A, 1), GPIO_INT_FALLING | GPIO_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Update pin layout
Previous layout was temporary, on an evaluation board.
BRANCH=none
BUG=chrome-os-partner:59083
TEST=make BOARD=hammer
Change-Id: I14478b9613e4e481bbdc71e595d218d585fbd8e5
Reviewed-on: https://chromium-review.googlesource.com/430574
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 17.11.2016 18:12:59 | -28,800 | 358bc0a7fde4ab84bec1e7e04030124780987173 | hammer: Enable PWM output for keyboard backlight
BRANCH=none
TEST=make BOARD=hammer -j
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.c",
"new_path": "board/hammer/board.c",
"diff": "#include \"hooks.h\"\n#include \"i2c.h\"\n#include \"keyboard_raw.h\"\n+#include \"pwm.h\"\n+#include \"pwm_chip.h\"\n#include \"registers.h\"\n#include \"task.h\"\n#include \"update_fw.h\"\n@... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Enable PWM output for keyboard backlight
BRANCH=none
BUG=chrome-os-partner:59083
TEST=make BOARD=hammer -j
Change-Id: Ibbf82c6c0f8115cbf611c74fc0585e97850d2019
Reviewed-on: https://chromium-review.googlesource.com/430575
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,409 | 06.02.2017 16:27:47 | 28,800 | 9aadad932f465bc0e23041d15afdacc6b6782061 | eve: LED changes
Use amber for charge when in suspend/off states and leave red
to indicate something is wrong.
Blink non-charging LED in S0ix/S3 states.
BRANCH=none
TEST=verify led operation in s3/s5 while charging | [
{
"change_type": "MODIFY",
"old_path": "board/eve/led.c",
"new_path": "board/eve/led.c",
"diff": "@@ -136,14 +136,21 @@ static void eve_led_set_power_battery(void)\n/* Suspend or Standby state */\nif (chipset_in_state(CHIPSET_STATE_SUSPEND) ||\nchipset_in_state(CHIPSET_STATE_STANDBY)) {\n- if (chg_s... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: LED changes
- Use amber for charge when in suspend/off states and leave red
to indicate something is wrong.
- Blink non-charging LED in S0ix/S3 states.
BUG=chrome-os-partner:60797
BRANCH=none
TEST=verify led operation in s3/s5 while charging
Change-Id: I16660942bf93f7cf6c951c19548c1c6838aabb72
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/438707
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,455 | 27.01.2017 10:34:38 | 28,800 | 8e4bcd49c05cc9859a10d170477e240403718979 | tcpm: it83xx: Add support for TYPEC_CC_OPEN
BRANCH=None
TEST=Verify compilation on it83xx w/ IT83XX_PD_EVB = 1.
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "driver/tcpm/it83xx.c",
"new_path": "driver/tcpm/it83xx.c",
"diff": "@@ -234,6 +234,14 @@ static void it83xx_enable_vconn(enum usbpd_port port, int enabled)\n}\n}\n+static void it83xx_enable_cc(enum usbpd_port port, int enable)\n+{\n+ if (enable)\n+ CLEAR_MASK(... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tcpm: it83xx: Add support for TYPEC_CC_OPEN
BUG=chrome-os-partner:62281
BRANCH=None
TEST=Verify compilation on it83xx w/ IT83XX_PD_EVB = 1.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Id82387e7d4782ed1a5e07f7968475988ff6da9d5
Reviewed-on: https://chromium-review.googlesource.com/434077
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,402 | 07.02.2017 15:48:03 | -28,800 | b6c5e8e7a2edee6f167fe1282db6e1263fa6988e | snappy: Disable Trackpad in S5 to save power
Follow CL:433083, integrate this to children.
BRANCH=reef
TEST=gpioget EN_P3300_TRACKPAD_ODL is 1 in S5 & below, 0 otherwise. | [
{
"change_type": "MODIFY",
"old_path": "board/snappy/board.c",
"new_path": "board/snappy/board.c",
"diff": "@@ -689,6 +689,9 @@ static void board_chipset_startup(void)\n/* Enable USB-A port. */\ngpio_set_level(GPIO_USB1_ENABLE, 1);\n+ /* Enable Trackpad */\n+ gpio_set_level(GPIO_EN_P3300_TRACKPAD_OD... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | snappy: Disable Trackpad in S5 to save power
Follow CL:433083, integrate this to children.
BUG=chrome-os-partner:59712,chrome-os-partner:62641
BRANCH=reef
TEST=gpioget EN_P3300_TRACKPAD_ODL is 1 in S5 & below, 0 otherwise.
Change-Id: I86716e95d7a32c44df9fe46419dccd842eb7dd48
Signed-off-by: Harry Pan <harry.pan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/438779
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,255 | 12.01.2017 09:50:05 | -28,800 | 9316ec321ab0708334f035c9e6090e592b0a8077 | rowan: config SPI pins
Configure B12/B13/B14/B15 as SPI pins.
BRANCH=master
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec
Commit-Ready: Patrick Berny
Tested-by: Patrick Berny | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/board.c",
"new_path": "board/rowan/board.c",
"diff": "@@ -421,10 +421,8 @@ static void board_chipset_pre_init(void)\ngpio_config_module(MODULE_SPI_MASTER, 1);\n/* Set all four SPI pins to high speed */\n- /* pins D0/D1/D3/D4 */\n- STM32_GPIO_OSPEED... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: config SPI pins
Configure B12/B13/B14/B15 as SPI pins.
BRANCH=master
BUG=chrome-os-partner:62673
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec
Change-Id: Ia7aad9ba0e15a8e6b623a8ae37f76db3f8f7c7a5
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/427563
Commit-Ready: Patrick Berny <pberny@chromium.org>
Tested-by: Patrick Berny <pberny@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org> |
136,255 | 12.01.2017 11:42:04 | -28,800 | c09c1ad72701986203a3bdbfc7e20ff409188c63 | rowan: Add ISL29035
Add ambient light sensor support for rowan.
BRANCH=master
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec
Commit-Ready: Patrick Berny
Tested-by: Patrick Berny | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/board.c",
"new_path": "board/rowan/board.c",
"diff": "#include \"adc.h\"\n#include \"adc_chip.h\"\n+#include \"als.h\"\n#include \"atomic.h\"\n#include \"battery.h\"\n#include \"charge_manager.h\"\n#include \"console.h\"\n#include \"driver/accel_ki... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: Add ISL29035
Add ambient light sensor support for rowan.
BRANCH=master
BUG=chrome-os-partner:62673
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec
Change-Id: Idfc34bd7977c96ac245a6d06cab064e65b8bf72a
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/427564
Commit-Ready: Patrick Berny <pberny@chromium.org>
Tested-by: Patrick Berny <pberny@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org> |
136,255 | 12.01.2017 12:41:27 | -28,800 | 11c0c9e86d9f52a71b6a252366ad0ec3f775f858 | rowan: enable CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT
BRANCH=master
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec
Commit-Ready: Patrick Berny
Tested-by: Patrick Berny | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/board.h",
"new_path": "board/rowan/board.h",
"diff": "#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BAT_PRESENT_L\n#define CONFIG_BATTERY_SMART\n#define CONFIG_CHARGE_MANAGER\n+#define CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT\n#define CONFIG_CHARGER\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: enable CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT
BRANCH=master
BUG=chrome-os-partner:62673
TEST=EC_FIRMWARE=rowan emerge-rowan chromeos-ec
Change-Id: I16b5584380abac7f32aecd9bcf87ec5dc0123107
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/427565
Commit-Ready: Patrick Berny <pberny@chromium.org>
Tested-by: Patrick Berny <pberny@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org> |
136,340 | 09.02.2017 11:07:59 | 28,800 | 16ce25ce44d2d74c08d33f6277b8528793d7389d | motion_lid: Fix merge of cl/430344
Fix merging that would send 2 hook_notify when tablet
mode changes.
BRANCH=none
TEST=buidall | [
{
"change_type": "MODIFY",
"old_path": "common/motion_lid.c",
"new_path": "common/motion_lid.c",
"diff": "@@ -354,9 +354,6 @@ static int calculate_lid_angle(const vector_3_t base, const vector_3_t lid,\ntablet_mode_debounce_cnt =\nTABLET_MODE_DEBOUNCE_COUNT;\ntablet_set_mode(new_tablet_mode);\n- CPR... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | motion_lid: Fix merge of cl/430344
Fix merging that would send 2 hook_notify when tablet
mode changes.
BUG=none
BRANCH=none
TEST=buidall
Change-Id: Ibf19cbbdf3ce28abe3314c0ce2c41a210c86d153
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/440404
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,405 | 10.02.2017 12:50:20 | 28,800 | 9985a2e3889dac9caac98c8d90550e807f1ff21e | Reef-ish: Remove extra newline after board version
This removes the extra newline character after the board version
from EC's debug output.
BRANCH=none
TEST=Boot Electro. | [
{
"change_type": "MODIFY",
"old_path": "board/pyro/board.c",
"new_path": "board/pyro/board.c",
"diff": "@@ -1047,7 +1047,7 @@ int board_get_version(void)\n}\n}\n- CPRINTS(\"Board version: %d\\n\", version);\n+ CPRINTS(\"Board version: %d\", version);\nreturn version;\n}\n"
},
{
"change_type"... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Reef-ish: Remove extra newline after board version
This removes the extra newline character after the board version
from EC's debug output.
BUG=none
BRANCH=none
TEST=Boot Electro.
Change-Id: If6e365a7f175c7e8f2c8db5adbf1780f6715d615
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441265
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,409 | 09.02.2017 09:54:04 | 28,800 | f51fdf223dd846341a489b00c8f43db92a37ce37 | eve: Revert trackpad interrupt changes
The trackpad interrupt is input only to the EC and should not ever
be driven from here.
BRANCH=none
TEST=build and boot on eve p1 | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.c",
"new_path": "board/eve/board.c",
"diff": "@@ -573,7 +573,6 @@ void lid_angle_peripheral_enable(int enable)\nif (tablet_get_mode() || chipset_in_state(CHIPSET_STATE_ANY_OFF))\nenable = 0;\nkeyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANG... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Revert trackpad interrupt changes
The trackpad interrupt is input only to the EC and should not ever
be driven from here.
BUG=chrome-os-partner:58666
BRANCH=none
TEST=build and boot on eve p1
Change-Id: I3ffa2ddb4990550b57c9191b5d721ab0ba206aca
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/439829 |
136,197 | 10.02.2017 11:43:54 | -28,800 | 47e60b44bdcd17a2414276802f74faac720c5ecb | hammer: Do not use a dedicated pstate bank.
BRANCH=none
TEST=Boot hammer, flashinfo/flashwp work as intended.
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.h",
"new_path": "board/hammer/board.h",
"diff": "/* TODO: Remove CONFIG_SYSTEM_UNLOCKED prior to building MP FW. */\n#define CONFIG_SYSTEM_UNLOCKED\n+/* Do not use a dedicated PSTATE bank */\n+#undef CONFIG_FLASH_PSTATE_BANK\n+\n/* 48 MHz SY... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Do not use a dedicated pstate bank.
BRANCH=none
BUG=chrome-os-partner:61671
TEST=Boot hammer, flashinfo/flashwp work as intended.
Change-Id: Ib316e036af613519f4b5f58b3a05bab5a880ce84
Reviewed-on: https://chromium-review.googlesource.com/441547
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,455 | 14.02.2017 10:30:19 | 28,800 | fb063a39b3af97240bcc34af73ae29ba9a761e9d | gru: Remove console commands to free yet more code RAM
BRANCH=gru
TEST=With subsequent patches, verify charge_ramp success with a variety
of BC1.2 chargers.
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "#undef CONFIG_CONSOLE_HISTORY\n#undef CONFIG_EC_CMD_PD_CHIP_INFO\n+/* Gru is especially limited on code space */\n+#ifdef BOARD_GRU\n+#undef CONFIG_CMD_I2C_XFER\n+#undef CONFIG_CMD_SHMEM\n+#endi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | gru: Remove console commands to free yet more code RAM
BUG=chrome-os-partner:54099
BRANCH=gru
TEST=With subsequent patches, verify charge_ramp success with a variety
of BC1.2 chargers.
Change-Id: I461c736710b4d877988ae54c1059b30808ca5e16
Reviewed-on: https://chromium-review.googlesource.com/442166
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,455 | 31.01.2017 14:39:32 | 28,800 | df2f085c16167f3afa2dbc4c34ef3c638b4f4f45 | kevin / gru: Add BC1.2 charge ramp
BRANCH=reef, gru
TEST=Verify charge_ramp success with a variety of BC1.2 chargers.
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "/* USB PD config */\n#define CONFIG_CASE_CLOSED_DEBUG_EXTERNAL\n#define CONFIG_CHARGE_MANAGER\n+#define CONFIG_CHARGE_RAMP\n#define CONFIG_USB_POWER_DELIVERY\n#define CONFIG_USB_PD_ALT_MODE\n#de... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kevin / gru: Add BC1.2 charge ramp
BUG=chrome-os-partner:54099
BRANCH=reef, gru
TEST=Verify charge_ramp success with a variety of BC1.2 chargers.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0e8bbd063e0933893a4a7f48a15a391c0ad9898a
Reviewed-on: https://chromium-review.googlesource.com/435562
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,405 | 10.02.2017 14:11:54 | 28,800 | c9ea4bddbc45ef9b0104d5afc8a1d2a811cad372 | pdchipinfo: Increase compatibility of fw_version
The firmware version formats may vary chip to chip. fw_version field is
changed to a union of a 8 byte string and an 64-bit integer.
BRANCH=none
TEST=ectool pdchipinfo 0/1 on Electro | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_protocol.c",
"new_path": "common/usb_pd_protocol.c",
"diff": "@@ -1649,9 +1649,9 @@ void pd_task(void)\nif (!res) {\nstruct ec_response_pd_chip_info *info;\ntcpm_get_chip_info(port, &info);\n- CPRINTS(\"TCPC p%d VID:0x%x PID:0x%x DID:0x%x FWV:0x%... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pdchipinfo: Increase compatibility of fw_version
The firmware version formats may vary chip to chip. fw_version field is
changed to a union of a 8 byte string and an 64-bit integer.
BUG=chrome-os-partner:62383
BRANCH=none
TEST=ectool pdchipinfo 0/1 on Electro
Change-Id: Id51e66c44338a09ed897ee61f54cd6a394400e63
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441270 |
136,202 | 02.02.2017 18:48:03 | 28,800 | 69c3fc2378ee9026277c1cbaf6e8aff0b99ecf46 | builtin: Expands string.h / stdint.h
Declares UINT8_MAX, INT8_MAX and defines strnlen(), strncpy(), strncmp() &
memchr(). Needed by a module I'm integrating into cr51.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "builtin/stdint.h",
"new_path": "builtin/stdint.h",
"diff": "@@ -23,6 +23,13 @@ typedef unsigned int uintptr_t;\ntypedef uint8_t uint_least8_t;\n+#ifndef UINT8_MAX\n+#define UINT8_MAX (255U)\n+#endif\n+#ifndef INT8_MAX\n+#define INT8_MAX (127U)\n+#endif\n+\n#if... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | builtin: Expands string.h / stdint.h
Declares UINT8_MAX, INT8_MAX and defines strnlen(), strncpy(), strncmp() &
memchr(). Needed by a module I'm integrating into cr51.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I894b0297216df1b945b36fc77cd3bc5c4ef8aa2b
Signed-off-by: Nadim Taha <ntaha@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/436786
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,455 | 15.02.2017 16:59:01 | 28,800 | 0cc39b214a64eb77e776529cfcb80cdd0712546d | lucid: Add CONFIG_HOSTCMD_ALIGNED
Add CONFIG_HOSTCMD_ALIGNED for flash savings.
TEST=Build with subsequent commit that increases flash usage slightly.
BRANCH=None
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/lucid/board.h",
"new_path": "board/lucid/board.h",
"diff": "#define CONFIG_EXTPOWER_GPIO\n#define CONFIG_FORCE_CONSOLE_RESUME\n#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP2)\n+#define CONFIG_HOSTCMD_ALIGNED\n#define CONFIG_HW_CRC\n#define CON... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | lucid: Add CONFIG_HOSTCMD_ALIGNED
Add CONFIG_HOSTCMD_ALIGNED for flash savings.
BUG=None
TEST=Build with subsequent commit that increases flash usage slightly.
BRANCH=None
Change-Id: I6cfe93f42070d1454bde99d382f0799993516d1f
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/443355
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,455 | 16.02.2017 11:12:13 | 28,800 | 2062c99cd2bfe1642433b2cae33c617e02c27cdd | cleanup: Move chip/g-specific system() prototypes to system_chip.h
BRANCH=None
TEST=`make buildall -j`
Commit-Ready: Aseda Aboagye
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/board.c",
"new_path": "board/cr50/board.c",
"diff": "#include \"signed_header.h\"\n#include \"spi.h\"\n#include \"system.h\"\n+#include \"system_chip.h\"\n#include \"task.h\"\n#include \"tpm_registers.h\"\n#include \"trng.h\"\n"
},
{
"change... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: Move chip/g-specific system() prototypes to system_chip.h
BUG=chromium:693148
BRANCH=None
TEST=`make buildall -j`
Change-Id: I7a758e6b5a04721d0422cfe8b767d85abddb1ad2
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/444264
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,244 | 15.02.2017 10:57:10 | 28,800 | 6f75a681f47582ad897cd4dd548fce6dea432c39 | BRANCH=None
TEST=None
Commit-Ready: Ningning Xia
Tested-by: Ningning Xia | [
{
"change_type": "MODIFY",
"old_path": "COMMIT-QUEUE.ini",
"new_path": "COMMIT-QUEUE.ini",
"diff": "# chromeos-ec. We use the no-vmtest-pre-cq configs since the tests won't\n# actually test against our EC changes. (That's what FAFT is for)\npre-cq-configs: gru-no-vmtest-pre-cq reef-no-vmtest-pre-cq ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | COMMIT-QUEUE.ini: add strago-no-vmtest-pre-cq
BRANCH=None
BUG=chromium:692659
TEST=None
Change-Id: I8a7a822cfe57afbfc1d185ae6dfcadc879e342cb
Reviewed-on: https://chromium-review.googlesource.com/443286
Commit-Ready: Ningning Xia <nxia@chromium.org>
Tested-by: Ningning Xia <nxia@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,405 | 22.02.2017 11:32:33 | 28,800 | 3ce5e5d8b3ebdd9abf9d182082a81e29bd899d2b | Reef: Name USB port numbers appropriately
Some USB PD port numbers are not named. Some numbers are named using
I2C port names. This patch fixes them
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/reef/board.c",
"new_path": "board/reef/board.c",
"diff": "#define IN_PGOOD_PP3300 POWER_SIGNAL_MASK(X86_PGOOD_PP3300)\n#define IN_PGOOD_PP5000 POWER_SIGNAL_MASK(X86_PGOOD_PP5000)\n+#define USB_PD_PORT_ANX74XX 0\n+#define USB_PD_PORT_PS8751 1\n+\nstatic v... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Reef: Name USB port numbers appropriately
Some USB PD port numbers are not named. Some numbers are named using
I2C port names. This patch fixes them
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I0c413d2112f8ad5b584d7037519c74cd8cebf54a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/445866
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> |
136,396 | 23.02.2017 07:57:30 | 28,800 | 3cf2d9047ab798de9eb74ac73dcb3cd7b612f455 | cr50: preapare to release 0.0.16
BRANCH=none
TEST=none
Tested-by: Vadim Bendebury
Trybot-Ready: Vadim Bendebury | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 15, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: preapare to release 0.0.16
BRANCH=none
BUG=none
TEST=none
Change-Id: I69d46d25601ffedb68d3f87e873dc8c502f10810
Reviewed-on: https://chromium-review.googlesource.com/445874
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Trybot-Ready: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,197 | 17.02.2017 08:19:04 | -28,800 | 416cdfd36e99eac9b985ad054e36e1742ea970b2 | hammer: Change PWM frequency to 10 kHz
backlight driver required frequency between 5-100 kHz, let's pick
10 kHz.
BRANCH=none
TEST=Backlight works, scope output shows correct frequency.
Commit-Ready: Nicolas Boichat
Tested-by: Toshak Singhal | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.c",
"new_path": "board/hammer/board.c",
"diff": "@@ -51,7 +51,7 @@ const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);\n/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */\nconst struct pwm_t pwm_channels[] =... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Change PWM frequency to 10 kHz
backlight driver required frequency between 5-100 kHz, let's pick
10 kHz.
BRANCH=none
BUG=chrome-os-partner:63010
TEST=Backlight works, scope output shows correct frequency.
Change-Id: I8355ea87824f368a76236c97b9e4b7d40eca5612
Reviewed-on: https://chromium-review.googlesource.com/444484
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Toshak Singhal <toshak@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,236 | 17.02.2017 14:16:20 | -28,800 | 26a2ff77d09d6c8846267d9f908a913aaf63f737 | Basking: Add CPT battery config
update CPT's config
BRANCH=firmware-reef-9042.B
TEST=`make -j BOARD=reef`
Tested-by: David Huang | [
{
"change_type": "MODIFY",
"old_path": "board/reef/battery.c",
"new_path": "board/reef/battery.c",
"diff": "@@ -313,40 +313,64 @@ static const struct fast_charge_params fast_chg_params_smp_c22n1626 = {\n};\nstatic const struct fast_charge_profile fast_charge_cpt_c22n1626_info[] = {\n- /* < 0C */\n+ ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Basking: Add CPT battery config
update CPT's config
BUG=chrome-os-partner:60899
BRANCH=firmware-reef-9042.B
TEST=`make -j BOARD=reef`
Change-Id: I1f5f46af6ebf6c53a257f1508756414471f58368
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/443715
Tested-by: David Huang <David.Huang@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: David Huang <David.Huang@quantatw.com> |
136,274 | 13.02.2017 18:14:13 | 28,800 | a1e96d8c00b770fd91f74a8a505a0c5023688d52 | ec3po: less chatty debug print
ec3po had very, very chatty debug printing.
Reduce some of this so that -d is a bit easier to read.
BRANCH=None
TEST=sudo servod -b electro -d
Commit-Ready: Nick Sanders
Tested-by: Nick Sanders | [
{
"change_type": "MODIFY",
"old_path": "util/ec3po/console.py",
"new_path": "util/ec3po/console.py",
"diff": "@@ -517,7 +517,7 @@ class Console(object):\n# Reset the input buffer.\nself.input_buffer = ''\nself.input_buffer_pos = 0\n- self.logger.debug('Reset input buffer.')\n+ self.logger.log(1, 'Re... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ec3po: less chatty debug print
ec3po had very, very chatty debug printing.
Reduce some of this so that -d is a bit easier to read.
BUG=None
BRANCH=None
TEST=sudo servod -b electro -d
Change-Id: I163e1362dd1e90f374ca3c37e1f1e0aa7fd7a1e2
Reviewed-on: https://chromium-review.googlesource.com/441919
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,197 | 22.02.2017 16:46:53 | -28,800 | 3cdc5f55a445229612c4c751abb1cb3f3ae4d36d | hammer: Enable USB suspend and remote wake-up config options
BRANCH=none
TEST=See CLs that enables USB suspend and remote wake-up option.
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.h",
"new_path": "board/hammer/board.h",
"diff": "#undef CONFIG_USB_MAXPOWER_MA\n#define CONFIG_USB_MAXPOWER_MA 100\n+#define CONFIG_USB_REMOTE_WAKEUP\n+#define CONFIG_USB_SUSPEND\n+\n#define CONFIG_USB_SERIALNO\n/* TODO(drinkcat): Replace th... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Enable USB suspend and remote wake-up config options
BRANCH=none
BUG=chrome-os-partner:62325
TEST=See CLs that enables USB suspend and remote wake-up option.
Change-Id: I424897028bca646edc927544a8d2f0cef306f8e7
Reviewed-on: https://chromium-review.googlesource.com/446241
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,409 | 24.02.2017 10:31:54 | 28,800 | 1c16a8040c406bc47d9bc42e34270d601a95a4e3 | eve: Remove MP2949 workaround
Remove the MP2949 workaround as it was only needed for P0 boards.
The fix is "sticky" so any P0 board will already have fixed
values in the MP2949 EEPROM.
BRANCH=none
TEST=build and boot on Eve P1 | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.c",
"new_path": "board/eve/board.c",
"diff": "@@ -385,68 +385,6 @@ static void board_init(void)\n}\nDECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);\n-#define MP2949_PAGE_SELECT 0x00 /* Select rail/page */\n-#define MP2949_STORE_USER_ALL... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Remove MP2949 workaround
Remove the MP2949 workaround as it was only needed for P0 boards.
The fix is "sticky" so any P0 board will already have fixed
values in the MP2949 EEPROM.
BUG=chrome-os-partner:58666
BRANCH=none
TEST=build and boot on Eve P1
Change-Id: I2cb13a6c5ff5ec521e75d51e31fb8356a5081193
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/446594
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,396 | 28.02.2017 13:41:01 | 28,800 | ef6f6c5edfe8817d31ee32e5acb1e687d60f23fd | g: reformat signing manifests
The json parser used by the signer is perfectly capable of parsing
multiline contents.
Let's reformat signer manifests to make it easier to see the entire
file in one terminal window.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "},\n// Rollback state.\n\"info\": {\n-\"0\": -1,\n-\"1\": -1,\n-\"2\": -1,\n-\"3\": -1,\n-\"4\": -1,\n-\"5\": -1,\n-\"6\": -1,\n-\"7\": -1,\n-\"8\": -1,\n-\"9\": ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | g: reformat signing manifests
The json parser used by the signer is perfectly capable of parsing
multiline contents.
Let's reformat signer manifests to make it easier to see the entire
file in one terminal window.
BRANCH=none
BUG=b:35774863
TEST=none
Change-Id: I41d69ad11f07521f68a7a50227dc843872613127
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/447841
Reviewed-by: Marius Schilder <mschilder@chromium.org> |
136,228 | 06.03.2017 14:53:33 | 28,800 | ee263101a9b3b9b1c6133235aeb1a9801df685a1 | poppy: Enable MKBP keyboard protocol
This is used for passing button information from EC to AP.
BRANCH=None
TEST=Verified using evtest that kernel is able to see button
press/release information. | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.h",
"new_path": "board/poppy/board.h",
"diff": "/* TODO(crosbug.com/p/61098): Is this the correct thermistor? */\n#define CONFIG_THERMISTOR_NCP15WB\n+#define CONFIG_KEYBOARD_PROTOCOL_MKBP\n#define CONFIG_MKBP_EVENT\n#define CONFIG_MKBP_USE_HO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Enable MKBP keyboard protocol
This is used for passing button information from EC to AP.
BUG=b:3577493
BRANCH=None
TEST=Verified using evtest that kernel is able to see button
press/release information.
Change-Id: Ifcad417c232c4e6e27e1024d2bed27133250fa07
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450937
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,203 | 07.03.2017 17:13:48 | -28,800 | ff4f39d90618557cf81bd324ddc9ec2477d379fe | snappy: limit max input current for safety
Cancel snappy total power spec (adapter - 5W), follow reef setting.
Max = Max * 95%
BRANCH=reef
TEST=make buildall
Commit-Ready: Bruce Wan
Tested-by: Bruce Wan | [
{
"change_type": "MODIFY",
"old_path": "board/snappy/board.c",
"new_path": "board/snappy/board.c",
"diff": "@@ -612,7 +612,7 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,\nif (bd9995x_bc12_enable_charging(port, bc12_enable))\nreturn;\n- charge_ma = (charge_ma * 89) / 100;\n+ ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | snappy: limit max input current for safety
Cancel snappy total power spec (adapter - 5W), follow reef setting.
Max = Max * 95%
BUG=b:35937839
BRANCH=reef
TEST=make buildall
Change-Id: I2bf8ef8856a6ac93efee3f5a53fdd5e99d6d68dd
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/451080
Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,396 | 08.03.2017 10:31:00 | 28,800 | 154868ed90bdcc7ed5850a4b5f367f961e935282 | cr50: prepare to release rw 0.0.17
Update both prod and dev manifests.
BRANCH=none
TEST=none
Commit-Ready: Vadim Bendebury
Tested-by: Vadim Bendebury | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 16, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release rw 0.0.17
Update both prod and dev manifests.
BRANCH=none
BUG=none
TEST=none
Change-Id: I07b0c188cdc22539dc368900c0acade7c582a0eb
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450956
Commit-Ready: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@google.com>
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,409 | 07.03.2017 09:41:02 | 28,800 | 06fbe70e50e99ef3d15d749049318049a0dbd48e | eve: Reduce max battery charge voltage for 0.5% margin
Limit battery charge voltage to prevent battery over-charge due to
regulation inaccuracy.
(ported from reef board)
BRANCH=none
TEST=build and boot on reef and ensure charging is still functional | [
{
"change_type": "MODIFY",
"old_path": "board/eve/battery.c",
"new_path": "board/eve/battery.c",
"diff": "@@ -47,7 +47,7 @@ static enum battery_type board_battery_type = BATTERY_TYPE_COUNT;\n* limits are given by discharging_min/max_c.\n*/\nstatic const struct battery_info batt_info_lg = {\n- .volta... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Reduce max battery charge voltage for 0.5% margin
Limit battery charge voltage to prevent battery over-charge due to
regulation inaccuracy.
(ported from reef board)
BUG=b:36024657
BRANCH=none
TEST=build and boot on reef and ensure charging is still functional
Change-Id: I90dd8bda3d67a6c50aa39bbd096239565c73b7c5
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/450950
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,409 | 07.03.2017 09:45:37 | 28,800 | cf015d1e31c1cfd6e1ff707dbb87b5fce1f6af01 | eve: Adjust charging parameters for eve board
Limit max input current to 95% for safety.
(changes ported from reef)
BRANCH=none
TEST=manual testing on Eve P1b board | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.c",
"new_path": "board/eve/board.c",
"diff": "@@ -487,6 +487,7 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,\nif (bd9995x_bc12_enable_charging(port, bc12_enable))\nreturn;\n+ charge_ma = (charge_ma * 95) / 100;\ncharge_s... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | eve: Adjust charging parameters for eve board
Limit max input current to 95% for safety.
(changes ported from reef)
BUG=b:36024657
BRANCH=none
TEST=manual testing on Eve P1b board
Change-Id: I6beb3fc4ac62e40bb7c8dfc8463e6a0d177997d9
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/450952
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,203 | 08.03.2017 20:41:21 | -28,800 | 876157085e0ce53de870f23993a6badc5683f16d | snappy: Add state for discharge + full
Follow reef setting.
When battery is fully charged, light white.
BRANCH=reef
TEST=Fully charge. Plug in charger. LED lights white.
Commit-Ready: Bruce Wan
Tested-by: Bruce Wan | [
{
"change_type": "MODIFY",
"old_path": "board/snappy/board.h",
"new_path": "board/snappy/board.h",
"diff": "#define CONFIG_WIRELESS_SUSPEND EC_WIRELESS_SWITCH_WLAN_POWER\n#define CONFIG_WLAN_POWER_ACTIVE_LOW\n#define WIRELESS_GPIO_WLAN_POWER GPIO_WIRELESS_GPIO_WLAN_POWER\n+#define CONFIG_PWR_STATE_D... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | snappy: Add state for discharge + full
Follow reef setting.
When battery is fully charged, light white.
BUG=none
BRANCH=reef
TEST=Fully charge. Plug in charger. LED lights white.
Change-Id: I1096fe616ab5ec5954eea142e28fad08f16731ed
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/451228
Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,340 | 10.03.2017 08:45:36 | 28,800 | d265f6ff93efb063db210616abcfb2802e8fd232 | poppy: Fix sensors location
Sensors are in the lid, behind the screen.
Similar changes were done for scarlet in c/433222.
BRANCH=none
TEST=Compile.
Tested-by: Rajat Jain | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.c",
"new_path": "board/poppy/board.c",
"diff": "@@ -625,7 +625,7 @@ struct motion_sensor_t motion_sensors[] = {\n.active_mask = SENSOR_ACTIVE_S0,\n.chip = MOTIONSENSE_CHIP_BMI160,\n.type = MOTIONSENSE_TYPE_ACCEL,\n- .location = MOTIONSENSE_LO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Fix sensors location
Sensors are in the lid, behind the screen.
Similar changes were done for scarlet in c/433222.
BUG=b:35978189
BRANCH=none
TEST=Compile.
Change-Id: I39d7da15ce0b441ec0cac9ad77b0c000225aacc5
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/452793
Tested-by: Rajat Jain <rajatja@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,203 | 10.03.2017 14:17:22 | -28,800 | 67ce1579a8892c2f30d8f54d3c8fcb9d72d6c56a | snappy: Disable MPU
Follow reef setting.
BRANCH=reef
TEST=Boot to OS
Commit-Ready: Bruce Wan
Tested-by: Bruce Wan | [
{
"change_type": "MODIFY",
"old_path": "board/snappy/board.h",
"new_path": "board/snappy/board.h",
"diff": "#undef CONFIG_EXTPOWER_DEBOUNCE_MS\n#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000\n#define CONFIG_FPU\n+/* Region sizes are not power of 2 so we can't use MPU */\n+#undef CONFIG_MPU\n#define CONFIG... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | snappy: Disable MPU
Follow reef setting.
BUG=none
BRANCH=reef
TEST=Boot to OS
Change-Id: I510b7375dd492882e99fdc7fabeac016455c212c
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/452399
Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,409 | 13.03.2017 09:47:25 | 25,200 | 35387474a1a03209aee02463ad53e300b4d1d938 | led: Add options for left and right led
Add LED types for left and right so they can be addressed
properly with ectool.
BRANCH=none
TEST=manual testing of 'ectool led <left|right> <color>' behavior | [
{
"change_type": "MODIFY",
"old_path": "include/ec_commands.h",
"new_path": "include/ec_commands.h",
"diff": "@@ -1712,6 +1712,10 @@ enum ec_led_id {\nEC_LED_ID_POWER_LED,\n/* LED on power adapter or its plug */\nEC_LED_ID_ADAPTER_LED,\n+ /* LED to indicate left side */\n+ EC_LED_ID_LEFT_LED,\n+ /* ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | led: Add options for left and right led
Add LED types for left and right so they can be addressed
properly with ectool.
BUG=b:36150361
BRANCH=none
TEST=manual testing of 'ectool led <left|right> <color>' behavior
Change-Id: Iea25cc69db2d35416e787dcb5a324d2e2cf5d3a6
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/453126
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,248 | 11.02.2017 15:40:18 | -28,800 | 9b2fe6349f7030a3c99381fce6968d35489eb911 | rowan: change battery profile to 2 cell
Rowan use 2 cell battery.
TEST=manual
load into rowan and see if EC complains about battery low.
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/battery.c",
"new_path": "board/rowan/battery.c",
"diff": "#define SB_SHUTDOWN_DATA 0xC574\nstatic const struct battery_info info = {\n- .voltage_max = 13200,\n- .voltage_normal = 11550,\n- .voltage_min = 9100,\n+ .voltage_max = 8800,\n+ .voltage_no... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: change battery profile to 2 cell
Rowan use 2 cell battery.
BUG=chrome-os-partner:62673
TEST=manual
load into rowan and see if EC complains about battery low.
BRANCH=none
Change-Id: I6d9006ee37e1e3ecc3d2965619a31f1774580cf0
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441484
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,248 | 11.02.2017 11:49:40 | -28,800 | df1f500864fe17ddd313d69933de4c61c19cb2a2 | rowan: enable SPI and GPIO console commands
Enable more hardware related console commands to help hardware
validation.
TEST=manual
build and load into Rowan
check console commands:
gpioget
spixfer
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/board.h",
"new_path": "board/rowan/board.h",
"diff": "/*\n* Allow dangerous commands.\n- * TODO: Remove this config engineering velidation.\n+ * TODO: Remove this config engineering validation.\n*/\n#define CONFIG_SYSTEM_UNLOCKED\n+#define CONFIG_C... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: enable SPI and GPIO console commands
Enable more hardware related console commands to help hardware
validation.
BUG=chrome-os-partner:62673
TEST=manual
build and load into Rowan
check console commands:
gpioget
spixfer
BRANCH=none
Change-Id: I86d3b74cef77ed9244a140290241a9fac6af3f84
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441486
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,203 | 14.03.2017 14:03:58 | -28,800 | 2a1cbf87821f311d98dd5d75707877b92b1d6df2 | pyro: limit max input current for safety
Max = Max * 95%
Follow reef setting.
BRANCH=reef
TEST=make buildall
Commit-Ready: Keith Tzeng
Tested-by: Keith Tzeng | [
{
"change_type": "MODIFY",
"old_path": "board/pyro/board.c",
"new_path": "board/pyro/board.c",
"diff": "@@ -625,6 +625,7 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,\nif (bd9995x_bc12_enable_charging(port, bc12_enable))\nreturn;\n+ charge_ma = (charge_ma * 95) / 100;\ncharge... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pyro: limit max input current for safety
Max = Max * 95%
Follow reef setting.
BUG=none
BRANCH=reef
TEST=make buildall
Change-Id: Ifa57171114f38640fbe868e7042b3962eab284e0
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/454360
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> |
136,230 | 20.03.2017 12:24:05 | 25,200 | e78307e2424d182814775a24b6fea78278475a91 | console: ensure "Console is enabled" string is intact
BRANCH=none
TEST=boot 10 times on kevin, and
see the complete string "Console is enabled..."
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "common/console.c",
"new_path": "common/console.c",
"diff": "@@ -269,11 +269,13 @@ command_has_error:\nstatic void console_init(void)\n{\n*input_buf = '\\0';\n+ cflush();\n#ifdef CONFIG_EXPERIMENTAL_CONSOLE\nccprintf(\"Enhanced Console is enabled (v1.0.0); type... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | console: ensure "Console is enabled" string is intact
BUG=chromium:687228
BRANCH=none
TEST=boot 10 times on kevin, and
see the complete string "Console is enabled..."
Change-Id: I9bb7358eb0a3d8172b5584329b9837cf62def635
Reviewed-on: https://chromium-review.googlesource.com/457421
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,248 | 14.02.2017 09:59:10 | -28,800 | 781398046af9cb6a957002ae78be6af2727e38f3 | rowan: add support for recovery mode
Rowan enters recovery mode by pressing volume up + volume down keys.
TEST=press POWER+VOL_UP+VOL_DOWN, rowan enters recovery
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/board.c",
"new_path": "board/rowan/board.c",
"diff": "#include \"als.h\"\n#include \"atomic.h\"\n#include \"battery.h\"\n+#include \"button.h\"\n#include \"charge_manager.h\"\n#include \"charge_state.h\"\n#include \"charger.h\"\n@@ -155,6 +156,13 @... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: add support for recovery mode
Rowan enters recovery mode by pressing volume up + volume down keys.
BUG=chrome-os-partner:62673
TEST=press POWER+VOL_UP+VOL_DOWN, rowan enters recovery
BRANCH=none
Change-Id: I7be33a7e4d820568e7d31dc8a17af7fa96b2d3ac
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/442344
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,248 | 13.02.2017 12:10:10 | -28,800 | c107c9c9887820061c9ba49be5e9c90a6b661c3d | rowan: correct battery LED color
Rowan is using red and green LEDs.
TEST=manual
ectool led battery red
ectool led battery green
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/led.c",
"new_path": "board/rowan/led.c",
"diff": "@@ -27,19 +27,19 @@ const enum ec_led_id supported_led_ids[] = {\nconst int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);\nenum led_color {\n- BAT_LED_BLUE = 0,\n- BAT_LED_ORANGE,\n+ BAT_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: correct battery LED color
Rowan is using red and green LEDs.
BUG=chrome-os-partner:62673
TEST=manual
ectool led battery red
ectool led battery green
BRANCH=None
Change-Id: Ifd0e7a6c3d30d260a86ad5c41ef360d50579f56d
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441568
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,255 | 01.03.2017 11:26:59 | -28,800 | f55d659c0804320b82975e4a23bc9fa716d7242e | rowan: gpio: Change SUSPEND_L to PIN(C, 11)
BRANCH=none
TEST=none
Commit-Ready: Rong Chang
Tested-by: Rong Chang | [
{
"change_type": "MODIFY",
"old_path": "board/rowan/gpio.inc",
"new_path": "board/rowan/gpio.inc",
"diff": "GPIO_INT(AC_PRESENT, PIN(C, 6), GPIO_INT_BOTH, extpower_interrupt)\nGPIO_INT(LID_OPEN, PIN(C, 9), GPIO_INT_BOTH, lid_interrupt) /* LID switch detection */\n-GPIO_INT(SUSPEND_L, PIN(C, 3), GPIO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rowan: gpio: Change SUSPEND_L to PIN(C, 11)
BRANCH=none
BUG=chrome-os-partner:63142
TEST=none
Change-Id: I20cafc51bd16856599271503f96a4cbf40e2d6af
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/451177
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,248 | 06.02.2017 18:32:01 | -28,800 | e388e9c74673d7c64cb791437858978bf2a3a142 | rose: add stm32f4 family support
This change applys config-stm32f446.h to stm32f4 family.
TEST=boots on stm32f401 and stm32f412 dev boards
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/config_chip.h",
"new_path": "chip/stm32/config_chip.h",
"diff": "#include \"config-stm32l100.h\"\n#elif defined(CHIP_VARIANT_STM32L442)\n#include \"config-stm32l442.h\"\n-#elif defined(CHIP_VARIANT_STM32F446)\n+#elif defined(CHIP_FAMILY_STM32F4)\n+/... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rose: add stm32f4 family support
This change applys config-stm32f446.h to stm32f4 family.
BUG=chromium:688979
TEST=boots on stm32f401 and stm32f412 dev boards
BRANCH=none
Change-Id: I939fd17f29f4b431d9c1358c184166c67fef18d3
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/438908
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,271 | 28.03.2017 18:25:47 | 25,200 | 333043bc8f2a04c058af10200948076611a6dfb0 | Kevin: enable CONFIG_CHARGER_DISCHARGE_ON_AC
This enables CONFIG_CHARGER_DISCHARGE_ON_AC so the
ectool chargecontrol discharge command will work.
BRANCH=none
TEST=run 'ectool chargecontrol discharge' | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "#define CONFIG_CHARGER_BD99956\n#define CONFIG_CHARGER_INPUT_CURRENT 512\n#define CONFIG_CHARGER_MAINTAIN_VBAT\n+#define CONFIG_CHARGER_DISCHARGE_ON_AC\n#define CONFIG_CHARGER_V2\n#define CONFIG... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Kevin: enable CONFIG_CHARGER_DISCHARGE_ON_AC
This enables CONFIG_CHARGER_DISCHARGE_ON_AC so the
ectool chargecontrol discharge command will work.
BUG=b:35563925
BRANCH=none
TEST=run 'ectool chargecontrol discharge'
Change-Id: I3a4acd83f131ccd050739e68d156f8facf4a93cc
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/462464 |
136,312 | 06.04.2017 13:39:23 | 25,200 | 6277174bff831f7fae8958dfdab131893cc43dcc | usb_updater: /dev/tmp0 -> /dev/tpm0
That's a typo.
TEST=none
BRANCH=none | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/usb_updater.c",
"new_path": "extra/usb_updater/usb_updater.c",
"diff": "@@ -335,7 +335,7 @@ static void usage(int errs)\n\" -f,--fwver Report running firmware versions.\\n\"\n\" -h,--help Show this message\\n\"\n\" -p,--post_reset Request pos... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_updater: /dev/tmp0 -> /dev/tpm0
That's a typo.
BUG=none
TEST=none
BRANCH=none
Change-Id: I4577a746c113b6c1d2c6745975272532909c8a8a
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/470507
Reviewed-by: Andrey Pronin <apronin@chromium.org> |
136,385 | 17.02.2017 18:57:20 | 28,800 | a8e6b070cbd107d8c2f44f44ae8231a4f4efea90 | pd: prefer CD pin assignments over EF for USBC->USBC case.
BRANCH=samus,glados,oak,gru,reef
TEST=manual, connect samus to USB-C monitor via cable and see it
select pin assigmnent 'C'
Commit-Ready: Todd Broch
Tested-by: Todd Broch | [
{
"change_type": "MODIFY",
"old_path": "common/usb_pd_policy.c",
"new_path": "common/usb_pd_policy.c",
"diff": "@@ -496,8 +496,8 @@ static void dfp_consume_attention(int port, uint32_t *payload)\n}\n/*\n- * This algorithm defaults to choosing higher pin config over lower ones. Pin\n- * configs are o... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pd: prefer CD pin assignments over EF for USBC->USBC case.
BRANCH=samus,glados,oak,gru,reef
BUG=chromium:694597
TEST=manual, connect samus to USB-C monitor via cable and see it
select pin assigmnent 'C'
Change-Id: Iddad5b654715bd30ba081c62f8fb53e07816498c
Reviewed-on: https://chromium-review.googlesource.com/465379
Commit-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,274 | 23.03.2017 19:10:35 | 25,200 | fc12f29363bef32e9d6b857b5de87a145260721c | tigertail: bugfix mux select
Don't clobber uart autodetect settings on detect.
BRANCH=None
TEST=ran on tigertail
Commit-Ready: Nick Sanders
Tested-by: Nick Sanders | [
{
"change_type": "MODIFY",
"old_path": "board/tigertail/board.c",
"new_path": "board/tigertail/board.c",
"diff": "@@ -260,7 +260,8 @@ void uart_sbu_tick(void)\nif (debounce > 4) {\ndebounce = 0;\nCPRINTS(\"UART autoenable\\n\");\n- set_uart_state(state);\n+ uart_state = state;\n+ set_uart_gpios(stat... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tigertail: bugfix mux select
Don't clobber uart autodetect settings on detect.
BRANCH=None
BUG=b:35849284
TEST=ran on tigertail
Change-Id: I608705b933272a902d5fff05c1b1a77162bf4c3c
Reviewed-on: https://chromium-review.googlesource.com/461325
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,197 | 05.04.2017 17:02:32 | -28,800 | 0e5497db696aef756cdf14e9a1aa532a98caddd6 | hammer: Verify RW signature in a separate task
About 864 bytes of stack is necessary for rwsig verification,
so 1024 bytes should be enough.
BRANCH=none
TEST=Flash hammer, board boots to RW after 1s
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/ec.tasklist",
"new_path": "board/hammer/ec.tasklist",
"diff": "* 's' is the stack size in bytes; must be a multiple of 8\n*/\n#define CONFIG_TASK_LIST \\\n+ TASK_ALWAYS(RWSIG, rwsig_task, NULL, 1024) \\\nTASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Verify RW signature in a separate task
About 864 bytes of stack is necessary for rwsig verification,
so 1024 bytes should be enough.
BRANCH=none
BUG=b:35587171
TEST=Flash hammer, board boots to RW after 1s
Change-Id: If71fb04ec16f16881d14fca2721303744fbce75a
Reviewed-on: https://chromium-review.googlesource.com/468710
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 07.11.2016 08:25:45 | -28,800 | 26c325d15e2fa47bbe26636939fb29779d02bc57 | hammer: Enable I2C passthrough
This interface will be used to update the trackpad firmware.
BRANCH=none
TEST=make BOARD=hammer -j; flash hammer; lsusb -v -v shows I2C interface
Commit-Ready: Nicolas Boichat
Tested-by: Nicolas Boichat | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.c",
"new_path": "board/hammer/board.c",
"diff": "#include \"usart_tx_dma.h\"\n#include \"usart_rx_dma.h\"\n#include \"usb_descriptor.h\"\n+#include \"usb_i2c.h\"\n#include \"util.h\"\n#include \"gpio_list.h\"\n@@ -33,13 +34,15 @@ const void ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Enable I2C passthrough
This interface will be used to update the trackpad firmware.
BRANCH=none
BUG=b:35587174
TEST=make BOARD=hammer -j; flash hammer; lsusb -v -v shows I2C interface
Change-Id: Ia4533c758f80eb786bd6dbb9f35feb66eb631793
Reviewed-on: https://chromium-review.googlesource.com/474667
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Chun-ta Lin <itspeter@chromium.org> |
136,230 | 06.04.2017 17:43:16 | 25,200 | 20c439be209a9cc0bb949ad21f289c453126395f | system: Shutdown AP before entering hibernate mode
BRANCH=none
TEST=manually test on gru: confirm
'Alt+VolUp+h' puts gru in hibernate mode and
AC plug-in wakes it up.
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "chip/host/system.c",
"new_path": "chip/host/system.c",
"diff": "@@ -150,7 +150,7 @@ test_mockable void system_reset(int flags)\nemulator_reboot();\n}\n-test_mockable void system_hibernate(uint32_t seconds, uint32_t microseconds)\n+void chip_hibernate(uint32_t ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | system: Shutdown AP before entering hibernate mode
BUG=chromium:702451
BRANCH=none
TEST=manually test on gru: confirm
'Alt+VolUp+h' puts gru in hibernate mode and
AC plug-in wakes it up.
Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096
Reviewed-on: https://chromium-review.googlesource.com/470787
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,408 | 13.04.2017 09:36:09 | 25,200 | c9d4c1cd6dd1082bd8ae7b2997cb4516315d648d | ec: add initial soraka related files
For now use the files from poppy. To be changed later on.
TEST=emerge-soraka chromeos-ec
Commit-Ready: YH Lin
Tested-by: YH Lin | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/soraka/battery.c",
"diff": "+../poppy/battery.c\n\\ No newline at end of file\n"
},
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/soraka/board.c",
"diff": "+../poppy/board.c\n\\ No newline at end of file\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ec: add initial soraka related files
For now use the files from poppy. To be changed later on.
BUG=b:36995255
TEST=emerge-soraka chromeos-ec
Change-Id: Iaf0b2a359586dd4cfdba483a6836eefee06f82c1
Reviewed-on: https://chromium-review.googlesource.com/476934
Commit-Ready: YH Lin <yueherngl@chromium.org>
Tested-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,228 | 12.04.2017 12:24:00 | 25,200 | c5332f6fe7d4d5197ac2154319f5e7dd4436d62a | power_button_x86: Fix power button pulse enabling/disabling
BRANCH=None
TEST=Verified that wake from power button works in S3. Also, verified
that menu selection works fine with this change. | [
{
"change_type": "MODIFY",
"old_path": "common/power_button_x86.c",
"new_path": "common/power_button_x86.c",
"diff": "@@ -113,7 +113,7 @@ static const char * const state_names[] = {\nstatic uint64_t tnext_state;\n/*\n- * Determines whether to execute initial SMI pulse (t0 stage)\n+ * Determines whet... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | power_button_x86: Fix power button pulse enabling/disabling
BUG=b:37277943
BRANCH=None
TEST=Verified that wake from power button works in S3. Also, verified
that menu selection works fine with this change.
Change-Id: I8e644af3fb7fbc0147f1acb12b6df945815b5e73
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/475974
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,405 | 25.03.2017 17:39:10 | 25,200 | 81596da3d0143dea4ea8818976f3c3003387f927 | Fizz: Add Fizz to flash_ec
This patch also fixes years and board names in the comments.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/battery.c",
"new_path": "board/fizz/battery.c",
"diff": "-/* Copyright 2016 The Chromium OS Authors. All rights reserved.\n+/* Copyright 2017 The Chromium OS Authors. All rights reserved.\n* Use of this source code is governed by a BSD-style license... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Add Fizz to flash_ec
This patch also fixes years and board names in the comments.
BUG=b:37271713
BRANCH=none
TEST=none
Change-Id: Ib9595a7e091c70680333a02ba2fdde3f24c0f4e6
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/475210
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,405 | 17.04.2017 10:08:15 | 25,200 | 60d1bc789121fc3be998b48e8e93cafe8ec84069 | USB: Remove usb_charge_ports_enabled
usb_charge_ports_enabled is not used.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "common/usb_port_power_smart.c",
"new_path": "common/usb_port_power_smart.c",
"diff": "@@ -99,25 +99,6 @@ static void usb_charge_all_ports_ctrl(enum usb_charge_mode mode)\nusb_charge_set_mode(i, mode);\n}\n-int usb_charge_ports_enabled(void)\n-{\n- int mask = 0... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | USB: Remove usb_charge_ports_enabled
usb_charge_ports_enabled is not used.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I9465b65e9fab2603a4258adc4ae5f16d6bfc93c4
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/481076
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,274 | 23.03.2017 19:10:35 | 25,200 | 5eaf807dcdbc023d2d2cf12d6d150ca7b7b2fb9f | tigertail: fix USB timing
Add some disconnect time between mux selections.
This ensures that USB VBUS will fall and a USB
disconenct will happen.
BRANCH=None
TEST=ran on tigertail
Commit-Ready: Nick Sanders
Tested-by: Nick Sanders | [
{
"change_type": "MODIFY",
"old_path": "board/tigertail/board.c",
"new_path": "board/tigertail/board.c",
"diff": "@@ -310,10 +310,16 @@ void set_mux_state(int state)\ngpio_set_level(GPIO_SEL_RELAY_A, 0);\ngpio_set_level(GPIO_SEL_RELAY_B, 0);\n- /* Reconnect in the requested direction. */\n+ /* Let U... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tigertail: fix USB timing
Add some disconnect time between mux selections.
This ensures that USB VBUS will fall and a USB
disconenct will happen.
BRANCH=None
BUG=b:35849284
TEST=ran on tigertail
Change-Id: I6cdbf8ce908f20213c7f8d1f4437ffe2b624be02
Reviewed-on: https://chromium-review.googlesource.com/459219
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,248 | 06.02.2017 18:39:08 | -28,800 | 86397ec144dcad7f23635b0f1397ae4a015162bb | rose: enable stm32f4 EXTI IRQs
This change copied gpio_init() from stm32f373 driver.
TEST=load on dev board and check button interrupt
BRANCH=none
Commit-Ready: Wei-Ning Huang
Tested-by: Wei-Ning Huang | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/gpio-stm32f4.c",
"new_path": "chip/stm32/gpio-stm32f4.c",
"diff": "#include \"clock.h\"\n#include \"common.h\"\n+#include \"gpio.h\"\n+#include \"hooks.h\"\n#include \"registers.h\"\n+#include \"task.h\"\n+#include \"util.h\"\nvoid gpio_enable_clock... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | rose: enable stm32f4 EXTI IRQs
This change copied gpio_init() from stm32f373 driver.
BUG=chromium:688979
TEST=load on dev board and check button interrupt
BRANCH=none
Change-Id: I9dc12ffc02899211b6d07a640682899654c2bbed
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/438909
Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org>
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,405 | 01.05.2017 13:39:04 | 25,200 | 47b7e566afd6e3adfdbf6ca2877d353134b8dd24 | Remove board_print_tcpc_fw_version declaration
board_print_tcpc_fw_version is no longer called or defined.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "board/eve/board.h",
"new_path": "board/eve/board.h",
"diff": "@@ -287,7 +287,6 @@ enum adc_channel {\nint board_get_version(void);\nvoid board_reset_pd_mcu(void);\nvoid board_set_tcpc_power_mode(int port, int mode);\n-void board_print_tcpc_fw_version(int port)... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Remove board_print_tcpc_fw_version declaration
board_print_tcpc_fw_version is no longer called or defined.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I11b625156c999eb811cc0298a1f2cad1a838088a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/491988
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,340 | 30.03.2017 15:11:37 | 25,200 | f9e04b0dfb5079d9f90e6adbcbbcb5f728307ef1 | config: Remove duplicate ST defines.
Removed unwanted replicated define in configuration file.
BRANCH=none
TEST=Tested on discovery BOARD with sensor connected on
EC i2c master bus. Device tested is lis2dh.
Commit-Ready: mario tesi
Tested-by: mario tesi | [
{
"change_type": "MODIFY",
"old_path": "include/config.h",
"new_path": "include/config.h",
"diff": "#undef CONFIG_ACCELGYRO_LSM6DS0\n#undef CONFIG_ACCELGYRO_BMI160\n#undef CONFIG_ACCELGYRO_LSM6DSM\n-#undef CONFIG_ACCEL_LIS2DH\n/* Specify barometer attached */\n#undef CONFIG_BARO_BMP280\n-/*\n- * Def... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | config: Remove duplicate ST defines.
Removed unwanted replicated define in configuration file.
BUG=none
BRANCH=none
TEST=Tested on discovery BOARD with sensor connected on
EC i2c master bus. Device tested is lis2dh.
Change-Id: If81da53a044b82fe8f47c113c7ca5d57d7dcb9fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/465374
Commit-Ready: mario tesi <mario.tesi@st.com>
Tested-by: mario tesi <mario.tesi@st.com> |
136,368 | 09.05.2017 08:38:04 | 25,200 | b5fcb6a82231aa560fd8644828f3c927918e581b | pd: Make build of VIF utility less verbose
BRANCH=none
TEST=make -j buildall
Commit-Ready: Sam Hurst
Tested-by: Sam Hurst | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -77,6 +77,8 @@ cmd_c_to_build = $(BUILDCC) $(BUILD_CFLAGS) \\\n$(sort $(foreach c,$($(*F)-objs),util/$(c:%.o=%.c)) $*.c) \\\n$(BUILD_LDFLAGS) \\\n-MMD -MF $@.d -o $@\n+cmd_c_to_vif = $(BUILDCC) $(BUILD... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pd: Make build of VIF utility less verbose
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I37be7abde31d20e0f4227db97e6751c2998f418b
Reviewed-on: https://chromium-review.googlesource.com/499871
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,405 | 20.04.2017 17:44:38 | 25,200 | 9c488952251502b5f56e4b2d5181a332a27f8639 | button: Allow board to define recovery buttons
This patch declares recovery_buttons array, where each board
lists recovery buttons. Pressing those while the board reboots
makes the system enter recovery mode.
BRANCH=none
TEST=buildall | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/board.h",
"new_path": "board/fizz/board.h",
"diff": "#define CONFIG_ADC\n#define CONFIG_BOARD_VERSION\n#define CONFIG_BUTTON_COUNT 2\n-#define CONFIG_BUTTON_RECOVERY\n#define CONFIG_CASE_CLOSED_DEBUG_EXTERNAL\n#define CONFIG_DPTF\n#define CONFIG_FLA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | button: Allow board to define recovery buttons
This patch declares recovery_buttons array, where each board
lists recovery buttons. Pressing those while the board reboots
makes the system enter recovery mode.
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I1f204156efbd6d2a507d67ba90f75ce857b03559
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/486944 |
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