author int64 658 755k | date stringlengths 19 19 | timezone int64 -46,800 43.2k | hash stringlengths 40 40 | message stringlengths 5 490 | mods list | language stringclasses 20 values | license stringclasses 3 values | repo stringlengths 5 68 | original_message stringlengths 12 491 |
|---|---|---|---|---|---|---|---|---|---|
136,455 | 31.07.2017 15:37:29 | 25,200 | 9663bdca5cae0d2d67d6e9cf422a6b6119a24926 | timer: Add note about `forcetime` command being unsafe
TEST=None
BRANCH=None
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "common/timer.c",
"new_path": "common/timer.c",
"diff": "@@ -275,6 +275,11 @@ DECLARE_CONSOLE_COMMAND(waitms, command_wait,\n#endif\n#ifdef CONFIG_CMD_FORCETIME\n+/*\n+ * Force the hwtimer to a given time. This may have undesired consequences,\n+ * especially w... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | timer: Add note about `forcetime` command being unsafe
BUG=b:63909040
TEST=None
BRANCH=None
Change-Id: If1022655bc283377fa804e524d36ca0cca716250
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/595042
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,455 | 01.09.2017 16:48:46 | 25,200 | 902706a2ebc1c51767b882279f558dd2c799e601 | cleanup: Remove duplicate BD9995X CONFIGs
BRANCH=None
TEST=`make buildall -j`
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/coral/board.h",
"new_path": "board/coral/board.h",
"diff": "#define CONFIG_CHARGE_RAMP\n#define CONFIG_CHARGER\n#define CONFIG_CHARGER_V2\n-#define CONFIG_CHARGER_BD99956\n+#define CONFIG_CHARGER_BD9995X\n#define CONFIG_CHARGER_BD9995X_CHGEN\n#define CON... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: Remove duplicate BD9995X CONFIGs
BUG=chromium:700933
BRANCH=None
TEST=`make buildall -j`
Change-Id: Id76fe93612fcd1ef924d7fa94479c45a52db046b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/648566
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,197 | 28.08.2017 16:52:44 | -28,800 | 588320d4b840e4466775815496f266e003586f9d | stack_analyzer: Use board/$BOARD/analyzestack.yaml by default
BRANCH=none
TEST=make BOARD=hammer analyzestack | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -541,6 +541,7 @@ newsizes:\n# them first is because elf dependencies will cause the elf files be rebuilt for\n# updating date, which shouldn't happen when analyzing the existing firmwares.\n.PHONY: ana... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | stack_analyzer: Use board/$BOARD/analyzestack.yaml by default
BRANCH=none
BUG=chromium:648840
TEST=make BOARD=hammer analyzestack
Change-Id: Id05fee7e085a02dd4c2d36880f6891c3eb86b404
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/637550
Reviewed-by: Che-yu Wu <cheyuw@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,234 | 07.09.2017 16:35:55 | 25,200 | 1623f192e865709a1071bde37819963dd5d0e17c | GLKRVP: Enable Volume buttons
BRANCH=glkrvp
TEST=Volume button notification can scroll in the UI.
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/glkrvp/board.c",
"new_path": "board/glkrvp/board.c",
"diff": "/* Intel GLK-RVP board-specific configuration */\n+#include \"button.h\"\n#include \"chipset.h\"\n#include \"console.h\"\n#include \"extpower.h\"\n@@ -71,6 +72,24 @@ const enum gpio_signal hib... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | GLKRVP: Enable Volume buttons
BUG=b:65461918
BRANCH=glkrvp
TEST=Volume button notification can scroll in the UI.
Change-Id: I9229e0fd0613bd672eff22e4cc087ad447d8d795
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/656530
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,197 | 08.09.2017 09:15:52 | -28,800 | 9b9189669dcfc3996c35516fd3728e96119d9a19 | poppy: Enable optimized SHA256 implementation
BRANCH=none
TEST=Boot soraka, hash done time goes down from ~1.30s to ~1.16s,
with a ~750 bytes code size increase. | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.h",
"new_path": "board/poppy/board.h",
"diff": "#define CONFIG_SPI_FLASH_W25X40\n#define CONFIG_UART_HOST 0\n#define CONFIG_VBOOT_HASH\n+#define CONFIG_SHA256_UNROLLED\n#define CONFIG_VSTORE\n#define CONFIG_VSTORE_SLOT_COUNT 1\n#define CONFIG... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Enable optimized SHA256 implementation
BRANCH=none
BUG=b:64196191
TEST=Boot soraka, hash done time goes down from ~1.30s to ~1.16s,
with a ~750 bytes code size increase.
Change-Id: I36c4253c4e89f35e13943041c9a0ddb61a314df8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/656877
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,282 | 05.09.2017 20:15:10 | -28,800 | a52cfbc80c060d9883aee9de4e764e0b250d184a | common: add host command to push AP SKU ID to ec
add host command to set AP SKU ID to ec.
BRANCH=reef
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "common/system.c",
"new_path": "common/system.c",
"diff": "@@ -101,6 +101,47 @@ static enum ec_reboot_cmd reboot_at_shutdown;\n/* On-going actions preventing going into deep-sleep mode */\nuint32_t sleep_mask;\n+#ifdef CONFIG_HOSTCMD_AP_SET_SKUID\n+static uint3... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: add host command to push AP SKU ID to ec
add host command to set AP SKU ID to ec.
BUG=b:65359225
BRANCH=reef
TEST=make buildall -j
Change-Id: I76ffa4485be4de996b001097fa3f5a371f3a92ce
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/650277
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,396 | 12.09.2017 11:21:54 | 25,200 | f6ac5711533ef12864481cd047e702ccc716604d | pp: remove superfluous newline character
Messages generated using the CPRINTS macro include a newline in the
end by design, no need to explicitly include it in the message.
BRANCH=cr50
TEST=verified that the message is printed without the extra newline | [
{
"change_type": "MODIFY",
"old_path": "common/physical_presence.c",
"new_path": "common/physical_presence.c",
"diff": "@@ -134,7 +134,7 @@ static void physical_detect_check_press(void)\nmutex_lock(&pp_mutex);\n- CPRINTS(\"PP press dt=%.6ld\\n\", dt);\n+ CPRINTS(\"PP press dt=%.6ld\", dt);\n/* If we... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | pp: remove superfluous newline character
Messages generated using the CPRINTS macro include a newline in the
end by design, no need to explicitly include it in the message.
BRANCH=cr50
BUG=none
TEST=verified that the message is printed without the extra newline
Change-Id: I01994bcb95c78e2deaa2dc3617bea9ca8a6d1381
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/663668
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,396 | 12.09.2017 12:25:02 | 25,200 | 092040b0b7b34f73f4099ea9a5003fd5db6a9ad4 | cr50: prepare to release 0.0.24
There are upcoming releases from different branches.
BRANCH=cr50
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 23, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release 0.0.24
There are upcoming releases from different branches.
BRANCH=cr50
BUG=b:65128360
TEST=none
Change-Id: I1abf4fe4df90b1b0f93d5d13a8b7e361ba9b2240
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/663425
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,405 | 13.09.2017 12:10:18 | 25,200 | d94ed695bdbf41f736733cc205fdcf41a2dede9e | Add USB_CHG_TYPE_DEDICATED
This patch adds USB_CHG_TYPE_DEDICATED to enum usb_chg_type. It's
for dedicated AC adapters like a barrel jack adapter used for Fizz.
BRANCH=none
TEST=make buildall | [
{
"change_type": "MODIFY",
"old_path": "common/charge_manager.c",
"new_path": "common/charge_manager.c",
"diff": "@@ -267,7 +267,6 @@ static void charge_manager_fill_power_info(int port,\nconst int use_ramp_current = 0;\n#endif\n- /* TODO: Handle CHARGE_SUPPLIER_DEDICATED */\nswitch (sup) {\ncase CH... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Add USB_CHG_TYPE_DEDICATED
This patch adds USB_CHG_TYPE_DEDICATED to enum usb_chg_type. It's
for dedicated AC adapters like a barrel jack adapter used for Fizz.
BUG=b:65591971
BRANCH=none
TEST=make buildall
Change-Id: Ib883c97eb5e468753c73453d7dedd228547ae025
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/665327
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,377 | 13.09.2017 15:12:43 | 25,200 | af4c8ebcf4cea8b713b9757a5f91219332737a52 | ccd_config: fix ccd_testlab print statement
BRANCH=cr50
TEST=ccd testlab enable/disable works ok | [
{
"change_type": "MODIFY",
"old_path": "common/ccd_config.c",
"new_path": "common/ccd_config.c",
"diff": "@@ -605,7 +605,7 @@ static void ccd_testlab_toggle(void)\nmutex_unlock(&ccd_config_mutex);\nif (ccd_save_config() == EC_SUCCESS)\n- CPRINTS(\"CCD test lab mode %sbled\", v ? \"ena\" : \"dis\");\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ccd_config: fix ccd_testlab print statement
BUG=none
BRANCH=cr50
TEST=ccd testlab enable/disable works ok
Change-Id: I2414c8b588d7ba78926e7a7aef3459ac7b974d42
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/665991
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,431 | 11.09.2017 09:33:21 | -28,800 | 3c2adda3267c9d1ba9d04f6a10fec09de45e1a4f | battery/max17055: update battery remaining capacity message dynamic
kernel will get the battery info through command "ectool battery",
so we need to get the remaining capacity dynamic.
BRANCH=none
TEST=run "ectool battery" in kernel, and get the battery info. | [
{
"change_type": "MODIFY",
"old_path": "driver/battery/max17055.c",
"new_path": "driver/battery/max17055.c",
"diff": "@@ -101,7 +101,9 @@ static int max17055_probe(void)\nint battery_device_name(char *device_name, int buf_size)\n{\n- return EC_ERROR_UNIMPLEMENTED;\n+ strzcpy(device_name, \"<BATT>\",... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | battery/max17055: update battery remaining capacity message dynamic
kernel will get the battery info through command "ectool battery",
so we need to get the remaining capacity dynamic.
BUG=b:65494883
BRANCH=none
TEST=run "ectool battery" in kernel, and get the battery info.
Change-Id: Idf824f6dc1e72acd17156c03d81c0ca87adc109f
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/658160
Reviewed-by: Philip Chen <philipchen@chromium.org> |
136,407 | 13.09.2017 14:42:08 | 25,200 | 0697132df7ffc36ab697ce4de134f585f1644097 | zoombini: Add support for sensor i2c bus.
BRANCH=None
TEST=make -j buildall.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -94,6 +94,7 @@ BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);\nconst struct i2c_port_t i2c_ports[] = {\n{\"power\", I2C_PORT_POWER, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Add support for sensor i2c bus.
BUG=None
BRANCH=None
TEST=make -j buildall.
Change-Id: I7f79e01fe2d2004a3e9df733852f25bd89033d58
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/666289
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,396 | 14.09.2017 12:56:15 | 25,200 | 4fdccb6de5131475fb6ccd3402812e008091afa3 | util: fix bug in tagbranch
After mulptiple edits of the script, there is a case when bash
variable is not properly quoted, let's fix it.
BRANCH=cr50
TEST=verified proper tag description set by git | [
{
"change_type": "MODIFY",
"old_path": "util/tagbranch.sh",
"new_path": "util/tagbranch.sh",
"diff": "@@ -67,7 +67,8 @@ TAG=\"v1.${TAG_BASE}.0\"\nBASE_SHA=\"$(git rev-list --ancestry-path \"${BRANCH_POINT}\"..\"${UPSTREAM}\" |\ntail -1)\"\n-if git tag -a -m 'firmware branch ${TAG}' \"${TAG}\" \"${BA... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | util: fix bug in tagbranch
After mulptiple edits of the script, there is a case when bash
variable is not properly quoted, let's fix it.
BRANCH=cr50
BUG=b:64698702
TEST=verified proper tag description set by git
Change-Id: I5847437cde717bb6e1f4b672fe6008b8e6e6f4e3
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/667917
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,197 | 13.09.2017 12:57:13 | -28,800 | 4bb651b27b34b8fb1f498c5f5fba2ef4d1d37d18 | hammer: Include hashes in EC image (CONFIG_TOUCHPAD_HASH_FW)
BRANCH=none
TEST=make TOUCHPAD_FW=SA459C-1211_ForGoogleHammer_3.0.bin \
BOARD=hammer -j
CQ-DEPEND=CL:641736 | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.h",
"new_path": "board/hammer/board.h",
"diff": "/* Virtual address for touchpad FW in USB updater. */\n#define CONFIG_TOUCHPAD_VIRTUAL_OFF 0x80000000\n+/* Include touchpad FW hashes in image */\n+#define CONFIG_TOUCHPAD_HASH_FW\n+\n/* Touch... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hammer: Include hashes in EC image (CONFIG_TOUCHPAD_HASH_FW)
BRANCH=none
BUG=b:63993173
TEST=make TOUCHPAD_FW=SA459C-1211_ForGoogleHammer_3.0.bin \
BOARD=hammer -j
CQ-DEPEND=CL:641736
Change-Id: Ib9eadfb6be8022f774b770a03480cf8c319a8a5a
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/664501
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,199 | 30.08.2017 17:32:49 | -28,800 | 73b314c1d04a5c860f0893f76c7e3141e0d445b0 | Kahlee: Optimize g-sensor setting
Since we only have one g-sensor, leave it in suspend mode.
And we only use it when we need it
BRANCH=none
TEST=none
Commit-Ready: Daniel Kurtz
Tested-by: Lin Cloud | [
{
"change_type": "MODIFY",
"old_path": "board/kahlee/board.c",
"new_path": "board/kahlee/board.c",
"diff": "@@ -570,14 +570,12 @@ struct motion_sensor_t motion_sensors[] = {\n.odr = 0,\n.ec_rate = 0,\n},\n- /* EC use accel for angle detection */\n[SENSOR_CONFIG_EC_S0] = {\n- .odr = 10000 | ROUND_UP_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Kahlee: Optimize g-sensor setting
Since we only have one g-sensor, leave it in suspend mode.
And we only use it when we need it
BRANCH=none
BUG=b:62029360
TEST=none
Signed-off-by: cloud lin <cloud_lin@compal.com>
Change-Id: I7ceca0e2b6a4035d6564ac33ab43edeeeca65652
Reviewed-on: https://chromium-review.googlesource.com/643026
Commit-Ready: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Lin Cloud <cloud_lin@compal.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org> |
136,405 | 15.09.2017 11:49:06 | 25,200 | 2f951e9a86f3dcc6b927894898d1ae3e6c0254aa | Fizz: Blink power LED in suspend state
BRANCH=none
TEST=Verify green LED blink in S3 on Fizz proto3. | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/led.c",
"new_path": "board/fizz/led.c",
"diff": "@@ -65,10 +65,19 @@ static int led_set_color(enum ec_led_id id, enum led_color color)\nstatic void led_set_power(void)\n{\n- if (chipset_in_state(CHIPSET_STATE_ON)) {\n+ static uint8_t suspend_ticks;\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Blink power LED in suspend state
BUG=b:37646390
BRANCH=none
TEST=Verify green LED blink in S3 on Fizz proto3.
Change-Id: I055a271e2bb8fd8454d9940c90d5f71cc9025e50
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/669772 |
136,230 | 15.09.2017 18:26:34 | 25,200 | 253fe7adc3d07e234ce97b6352bf0ff78fabfd58 | scarlet: Disable TRY_SRC
BRANCH=none
TEST=manually on scarlet:
Sink: can be charged with PD charger or 'PD charger through USB-C hub'
Source: can power a usb stick
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/scarlet/board.h",
"new_path": "board/scarlet/board.h",
"diff": "#define CONFIG_USB_PD_TCPM_FUSB302\n#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0\n#define CONFIG_USB_PD_VBUS_DETECT_CHARGER\n-#define CONFIG_USB_PD_TRY_SRC\n#define CONFIG_US... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | scarlet: Disable TRY_SRC
BUG=b:65698085
BRANCH=none
TEST=manually on scarlet:
Sink: can be charged with PD charger or 'PD charger through USB-C hub'
Source: can power a usb stick
Change-Id: I7a6541cdc3fdd721ae9529c7dbe422adb0dc3000
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/669904
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,405 | 15.09.2017 13:43:46 | 25,200 | d8612351ea07a406adc998d74d4015da41672c51 | Fizz: Pulse LED
This change makes the power LEDs pulse using PWM.
S0: solid green.
S3: pulsing amber (= mix of green and red)
S5: off
BRANCH=none
TEST=Verify LED behavior described above on Proto3 | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/board.c",
"new_path": "board/fizz/board.c",
"diff": "#include \"driver/tcpm/ps8xxx.h\"\n#include \"driver/tcpm/tcpci.h\"\n#include \"driver/tcpm/tcpm.h\"\n+#include \"espi.h\"\n#include \"extpower.h\"\n#include \"gpio.h\"\n#include \"hooks.h\"\n#inc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Pulse LED
This change makes the power LEDs pulse using PWM.
S0: solid green.
S3: pulsing amber (= mix of green and red)
S5: off
BUG=b:64975836
BRANCH=none
TEST=Verify LED behavior described above on Proto3
Change-Id: I696cf8279dd762236b7b7f000a316820d58916bf
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/669773
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,407 | 13.09.2017 18:25:02 | 25,200 | 692033ad6fd3d5acadb7b161d43e715f865c4709 | zoombini: Change TCPC ports to match schematics.
BRANCH=None
TEST=Verify that the TCPC ports correspond to the schematic.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -95,9 +95,9 @@ const struct i2c_port_t i2c_ports[] = {\n{\"power\", I2C_PORT_POWER, 400, GPIO_I2C0_SCL, GPIO_I2C0_SDA},\n{\"pmic\", I2C_PORT_PMIC, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA},\n{... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Change TCPC ports to match schematics.
BUG=None
BRANCH=None
TEST=Verify that the TCPC ports correspond to the schematic.
Change-Id: Ic05448b6144754162ced26993948599930307786
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/665893
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,407 | 14.09.2017 13:19:36 | 25,200 | d738db7ededf63babff7668e940d129ad6c1497d | zoombini: Change battery i2c bus speed to 100KHz.
BRANCH=none
TEST=flash zoombini; verify that smart battery shows up on i2c bus.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -92,7 +92,7 @@ BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);\n/* I2C port map. */\nconst struct i2c_port_t i2c_ports[] = {\n- {\"power\", I2C_PORT_POWER, 400, GPIO_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Change battery i2c bus speed to 100KHz.
BUG=b:65681152
BRANCH=none
TEST=flash zoombini; verify that smart battery shows up on i2c bus.
Change-Id: Icc38c153b3c140d221e1981cf97dc1ca935d65e2
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/667940
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,197 | 22.09.2017 15:59:53 | -28,800 | 877842889c678b8340abe9cac74566529d8bc3f4 | charge_state_v2: dump_charge_state: Add cflush
The dump_charge_state (chgstate console command) is quite large,
and may get truncated, let's add 2 cflush at approximately
each third of the output.
BRANCH=none
TEST=On wand, type chgstate in EC console | [
{
"change_type": "MODIFY",
"old_path": "common/charge_state_v2.c",
"new_path": "common/charge_state_v2.c",
"diff": "@@ -297,6 +297,7 @@ static void dump_charge_state(void)\nDUMP_CHG(status, \"0x%x\");\nDUMP_CHG(option, \"0x%x\");\nDUMP_CHG(flags, \"0x%x\");\n+ cflush();\nccprintf(\"batt.*:\\n\");\nc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charge_state_v2: dump_charge_state: Add cflush
The dump_charge_state (chgstate console command) is quite large,
and may get truncated, let's add 2 cflush at approximately
each third of the output.
BRANCH=none
BUG=b:66575472
TEST=On wand, type chgstate in EC console
Change-Id: Iaa87a6a77b9b6edb0bd8235a87297f8d63fe3085
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/678755
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,340 | 20.09.2017 12:37:35 | 25,200 | 2faae86c0828a8772ca73854e8346a8630b8e61a | Kahlee: FIXUP: Optimize g-sensor setting
Kionix Accel does not have FIFO, enable force mode for it.
Chrome needs sensor for screen orientation, set to to 10Hz
in S0 in the EC.
BRANCH=none
TEST=none
Tested-by: Gwendal Grignou | [
{
"change_type": "MODIFY",
"old_path": "board/kahlee/board.c",
"new_path": "board/kahlee/board.c",
"diff": "@@ -570,8 +570,9 @@ struct motion_sensor_t motion_sensors[] = {\n.odr = 0,\n.ec_rate = 0,\n},\n+ /* Setup for AP for rotation detection */\n[SENSOR_CONFIG_EC_S0] = {\n- .odr = 0,\n+ .odr = 100... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Kahlee: FIXUP: Optimize g-sensor setting
Kionix Accel does not have FIFO, enable force mode for it.
Chrome needs sensor for screen orientation, set to to 10Hz
in S0 in the EC.
BRANCH=none
BUG=b:62029360
TEST=none
Change-Id: I5545580f2073e9d1145bd86cfcd594164119cae7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/675575
Tested-by: Gwendal Grignou <gwendal@google.com>
Reviewed-by: Gwendal Grignou <gwendal@google.com> |
136,396 | 25.09.2017 13:50:08 | 25,200 | aeea9974b207d8bde78d2e78e71bb7dd3d708a8c | g: dcrypto: add debug function to print primes
When compilation is enabled, this function prints all prime numbers
generated using the PRIME_DELTAS array.
BRANCH=cr50
TEST=verified that prime numbers are printed out when running rsa_test.py | [
{
"change_type": "MODIFY",
"old_path": "chip/g/dcrypto/bn.c",
"new_path": "chip/g/dcrypto/bn.c",
"diff": "* found in the LICENSE file.\n*/\n+#ifdef PRINT_PRIMES\n+#include \"console.h\"\n+#endif\n+\n#include \"dcrypto.h\"\n#include \"internal.h\"\n@@ -1210,6 +1214,27 @@ static int bn_probable_prime(... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | g: dcrypto: add debug function to print primes
When compilation is enabled, this function prints all prime numbers
generated using the PRIME_DELTAS array.
BRANCH=cr50
BUG=none
TEST=verified that prime numbers are printed out when running rsa_test.py
Change-Id: I37961aad146c4aeecca9a84550f313450e6c5853
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/683074
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,202 | 30.08.2017 13:54:08 | 25,200 | be96cd65ed78a15c843e513cebd4345a29e6b2fa | g: Provide a pinhold interface
This change is required to reboot the chip without bringing down the
entire platform on boards where GPIOs are wired to external active reset
signals.
BRANCH=none
TEST=Scoped a pin across a reset. | [
{
"change_type": "MODIFY",
"old_path": "chip/g/system.c",
"new_path": "chip/g/system.c",
"diff": "#include \"task.h\"\n#include \"version.h\"\n+static uint8_t pinhold_on_reset;\n+\nstatic void check_reset_cause(void)\n{\nuint32_t g_rstsrc = GR_PMU_RSTSRC;\n@@ -86,6 +88,21 @@ void system_pre_init(voi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | g: Provide a pinhold interface
This change is required to reboot the chip without bringing down the
entire platform on boards where GPIOs are wired to external active reset
signals.
BRANCH=none
BUG=none
TEST=Scoped a pin across a reset.
Change-Id: I58d93697d39a8adcdac9324d5dd9da00745aec9a
Signed-off-by: Nadim Taha <ntaha@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/644179
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,197 | 29.08.2017 10:14:08 | -28,800 | 86d5eb9b0a4c60fd47db2956b80d92b2fa922160 | poppy: cleanup GPIOs
Deprecate poppy rev0.
Remove FP_INT_L
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.c",
"new_path": "board/poppy/board.c",
"diff": "@@ -1026,9 +1026,6 @@ DECLARE_HOOK(HOOK_INIT, board_sensor_init, HOOK_PRIO_DEFAULT);\nstatic void board_chipset_resume(void)\n{\ngpio_set_level(GPIO_ENABLE_BACKLIGHT, 1);\n-#ifdef POPPY_REV0\n- ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: cleanup GPIOs
- Deprecate poppy rev0.
- Remove FP_INT_L
BRANCH=none
BUG=b:65104436
TEST=make buildall -j
Change-Id: Ie2afae95a4fed43e8c2dc9e18031cf3e82eb3536
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/689817
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,455 | 13.09.2017 10:47:37 | 25,200 | c781609bfd19b16737bec5482da5c1a021a6afa6 | charge_manager: Support no-BC1.2 configuration
If BC1.2 isn't supported, don't waste space + time checking for inputs
that don't exist.
BRANCH=None
TEST=`make buildall -j`
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/board.c",
"new_path": "board/fizz/board.c",
"diff": "#include \"button.h\"\n#include \"charge_manager.h\"\n#include \"charge_state.h\"\n-#include \"charge_ramp.h\"\n#include \"charger.h\"\n#include \"chipset.h\"\n#include \"console.h\"\n"
},
{
... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charge_manager: Support no-BC1.2 configuration
If BC1.2 isn't supported, don't waste space + time checking for inputs
that don't exist.
BUG=chromium:759880
BRANCH=None
TEST=`make buildall -j`
Change-Id: I47e81451abd79a67a666d1859faf2610ee5c941a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/663838
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,230 | 19.09.2017 19:05:49 | 25,200 | 78f485465fa28c6e669e834b2e6b862acff82226 | chip/stm32/clock: Wakeup AP when rtc alarm goes off
BRANCH=none
TEST='powerd_dbus_suspend --wakeup_timeout=10' and see
AP do S0->S3(10 secs)->S0
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "chip/stm32/clock-f.c",
"new_path": "chip/stm32/clock-f.c",
"diff": "@@ -72,6 +72,8 @@ static uint32_t sec_to_rtc_tr(uint32_t sec)\n}\n#ifdef CONFIG_HOSTCMD_RTC\n+static uint8_t host_rtc_alarm_set;\n+\nstatic uint32_t rtc_dr_to_sec(uint32_t rtc_dr)\n{\nstruct c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/stm32/clock: Wakeup AP when rtc alarm goes off
BUG=b:63908519
BRANCH=none
TEST='powerd_dbus_suspend --wakeup_timeout=10' and see
AP do S0->S3(10 secs)->S0
Change-Id: I35e248627e2f3b68b0ed3f27d6bae65eb73a745b
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/674054
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,274 | 20.09.2017 20:04:44 | 25,200 | 55c90fe6fe186d026c683899786830a176b8ec14 | tigertool: add serial number check
Add --check_serial to check serial number.
BRANCH=None
TEST=check serial number. | [
{
"change_type": "MODIFY",
"old_path": "extra/tigertool/tigertool.py",
"new_path": "extra/tigertool/tigertool.py",
"diff": "@@ -71,6 +71,25 @@ def do_version(pty):\nreturn True\n+def do_check_serial(pty):\n+ \"\"\"Check serial via ec console 'pty'.\n+\n+ Args:\n+ pty: a pty object connected to tiger... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | tigertool: add serial number check
Add --check_serial to check serial number.
BRANCH=None
BUG=b:35849284
TEST=check serial number.
Change-Id: I1e2d5617bcf65e2388b88aca7ed63b9cdc096d87
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/676723
Reviewed-by: Wai-Hong Tam <waihong@google.com> |
136,228 | 23.09.2017 01:13:08 | 25,200 | 4f5f2dd1b7e6ec2dcd3a89229368df8bd5d31235 | power: Add flag to disable power signal at boot
Add a new flag to allow boards to indicate if a power signal has to be
enabled/disabled at boot.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "include/power.h",
"new_path": "include/power.h",
"diff": "@@ -44,7 +44,9 @@ enum power_state {\n* +------------------------------------------------------+\n* | 0 | Active level (low/high) |\n* +------------------------------------------------------+\n- * | 1 :... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | power: Add flag to disable power signal at boot
Add a new flag to allow boards to indicate if a power signal has to be
enabled/disabled at boot.
BUG=b:65421825
BRANCH=None
TEST=make -j buildall
Change-Id: Ibe7ab74e8191c58433087d8024b344d7e845f17e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/679981
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,420 | 05.10.2017 15:35:23 | -7,200 | f1e6af516c87623f475900f8fc85cb9c40668092 | util/ectool.c: Make sure device_name is NUL terminated
BRANCH=none
TEST=none
Found-by: Coverity Scan
Commit-Ready: Patrick Georgi
Tested-by: Patrick Georgi | [
{
"change_type": "MODIFY",
"old_path": "util/ectool.c",
"new_path": "util/ectool.c",
"diff": "@@ -7337,7 +7337,7 @@ int main(int argc, char *argv[])\nconst struct command *cmd;\nint dev = 0;\nint interfaces = COMM_ALL;\n- char device_name[40] = CROS_EC_DEV_NAME;\n+ char device_name[41] = CROS_EC_DEV... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | util/ectool.c: Make sure device_name is NUL terminated
BRANCH=none
BUG=none
TEST=none
Found-by: Coverity Scan #144116
Change-Id: I9ec030c1a3820af7d08c2a83e3c1f4c3ee7a3f0a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/702302
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Chris Ching <chingcodes@chromium.org> |
136,405 | 11.10.2017 10:28:23 | 25,200 | 465de629d3f627fb6378649330189bf033f645ad | Fizz: Set proper PD source voltage and current
Fizz allocates 15W to the type-c port. This patch allows the port
to use it.
BRANCH=none
TEST=Verify 5V 3A PDO is offered. | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/usb_pd_policy.c",
"new_path": "board/fizz/usb_pd_policy.c",
"diff": "#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\\\nPDO_FIXED_COMM_CAP)\n-/* TODO(crosbug.com/p/61098): fill in correct source and sink capabilities */\nconst u... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Set proper PD source voltage and current
Fizz allocates 15W to the type-c port. This patch allows the port
to use it.
BUG=b:67682343
BRANCH=none
TEST=Verify 5V 3A PDO is offered.
Change-Id: I1560c0c7cb04379f5e4c9893753afe4a7f0cefe4
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/713583
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,455 | 11.10.2017 09:16:15 | 25,200 | 7f472114fb3c0c2cc48ec4490ec9cc3d5b41eeef | cleanup: Use CONFIG_BATTERY to indicate whether a board has a battery
BRANCH=None
TEST=`make buildall -j`
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/samus/board.h",
"new_path": "board/samus/board.h",
"diff": "#define CONFIG_POWER_BUTTON_X86\n/* Note: not CONFIG_BACKLIGHT_LID. It's handled specially for Samus. */\n#define CONFIG_BACKLIGHT_REQ_GPIO GPIO_PCH_BL_EN\n-#define CONFIG_BATTERY_SAMUS\n/* TODO... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cleanup: Use CONFIG_BATTERY to indicate whether a board has a battery
BUG=b:35528297
BRANCH=None
TEST=`make buildall -j`
Change-Id: I9e4814b4172f20711f7edd691c9569f9130aec8e
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/713395
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,234 | 14.10.2017 14:14:14 | 25,200 | b2d6bf0ada32042692bfec9ae03586ff0eefe0b7 | GLKRVP: Correct GPIO assignment for PCH_WAKE_L
BRANCH=glkrvp
TEST=In S3, toggling PCH_WAKE_L wakes system to S0.
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/glkrvp/gpio.inc",
"new_path": "board/glkrvp/gpio.inc",
"diff": "@@ -28,7 +28,7 @@ GPIO_INT(EC_VOLDN_BTN_ODL, PIN(3, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_inter\nGPIO(PCH_SMI_L, PIN(C, 6), GPIO_ODR_HIGH) /* EC_SMI_ODL */\nGPIO(PCH_SCI_L, PIN(7, 6), GPI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | GLKRVP: Correct GPIO assignment for PCH_WAKE_L
BUG=b:67797598
BRANCH=glkrvp
TEST=In S3, toggling PCH_WAKE_L wakes system to S0.
Change-Id: If4d6786d8b24488c11f7894499c7e19f43a9b7f8
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/719486
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,234 | 13.10.2017 14:17:31 | 25,200 | 08210d0a344f66300f90f25bb831849b36e75cb3 | GLKRVP: Enable verified boot support
BRANCH=glkrvp
TEST=EC console command 'hash' can print the vboot hash
calculated values.
Commit-Ready: Vijay P Hiremath
Tested-by: Vijay P Hiremath | [
{
"change_type": "MODIFY",
"old_path": "board/glkrvp/board.h",
"new_path": "board/glkrvp/board.h",
"diff": "#define CONFIG_SPI_FLASH_REGS\n#define CONFIG_SPI_FLASH_W25Q40\n+/* Verified boot */\n+#define CONFIG_SHA256_UNROLLED\n+#define CONFIG_VBOOT_HASH\n/*\n* Enable 1 slot of secure temporary stora... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | GLKRVP: Enable verified boot support
BUG=b:67780603
BRANCH=glkrvp
TEST=EC console command 'hash' can print the vboot hash
calculated values.
Change-Id: I3d9efa7b6c57f8a862676929a1af9ae21b5c9b2d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/719881
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,405 | 12.10.2017 17:56:53 | 25,200 | 20c94b726e548c47a5237d60ac78c6f1e166e97b | EFS: Sysjump to active copy
In EFS, EC needs to sysjump to the active copy, which is hashed
and validated by the AP.
BRANCH=none
TEST=Verify Depthcharge makes EC jump to RW. | [
{
"change_type": "MODIFY",
"old_path": "common/system.c",
"new_path": "common/system.c",
"diff": "@@ -844,7 +844,7 @@ static int handle_pending_reboot(enum ec_reboot_cmd cmd)\ncase EC_REBOOT_JUMP_RO:\nreturn system_run_image_copy(SYSTEM_IMAGE_RO);\ncase EC_REBOOT_JUMP_RW:\n- return system_run_image_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | EFS: Sysjump to active copy
In EFS, EC needs to sysjump to the active copy, which is hashed
and validated by the AP.
BUG=b:67748602
BRANCH=none
TEST=Verify Depthcharge makes EC jump to RW.
Change-Id: I2ca893f7691ad776a791f2044dd7a0983d06e3c5
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/717676 |
136,405 | 16.10.2017 13:57:12 | 25,200 | 465eaf4d7ec68bd19b6f1ab9d7e50bb0ed2f0c9e | Fizz: Add EC_RW_B in FMAP
This patch adds EC_RW_B entry in the FMAP. This allows FAFT to locate
the RW_B image and manipulate it.
BRANCH=none
TEST=Run futility dump_fmap ec.bin. | [
{
"change_type": "MODIFY",
"old_path": "common/fmap.c",
"new_path": "common/fmap.c",
"diff": "@@ -73,10 +73,16 @@ struct fmap_area_header {\n#else\n#define NUM_EC_FMAP_AREAS_ROLLBACK 0\n#endif\n+#ifdef CONFIG_RW_B\n+#define NUM_EC_FMAP_AREAS_RW_B 1\n+#else\n+#define NUM_EC_FMAP_AREAS_RW_B 0\n+#endif... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Add EC_RW_B in FMAP
This patch adds EC_RW_B entry in the FMAP. This allows FAFT to locate
the RW_B image and manipulate it.
BUG=b:64614832,b:67748602
BRANCH=none
TEST=Run futility dump_fmap ec.bin.
Change-Id: I03aec945e0c8c3e08fc629a34ea6e5183bcccb61
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722024
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,350 | 13.10.2017 12:34:08 | 25,200 | 38d23e4af0fe502f67367dd87af4755551988435 | keyboard_8042: ensure key scanning on when keyboard enabled
BRANCH=none
TEST=Boot Windows in legacy mode and observe keyboard is working.
Tested-by: Stefan Reinauer | [
{
"change_type": "MODIFY",
"old_path": "common/keyboard_8042.c",
"new_path": "common/keyboard_8042.c",
"diff": "@@ -692,6 +692,8 @@ static int handle_keyboard_command(uint8_t command, uint8_t *output)\ncase I8042_ENA_KB:\nupdate_ctl_ram(0, read_ctl_ram(0) & ~I8042_KBD_DIS);\n+ keystroke_enable(1);\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | keyboard_8042: ensure key scanning on when keyboard enabled
BRANCH=none
BUG=none
TEST=Boot Windows in legacy mode and observe keyboard is working.
Change-Id: Id203a8804b86e0fcfbb9974658f66e9bd2602151
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722123
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org> |
136,197 | 02.10.2017 08:14:22 | -28,800 | 7501654d201199fe12d351a6ae0ffecdb3ca7933 | chip/stm32/usart: Add flags to usart_config
Allows setting TXINV/RXINV bits.
BRANCH=none
TEST=make BOARD=wand -j | [
{
"change_type": "MODIFY",
"old_path": "board/discovery-stm32f072/board.c",
"new_path": "board/discovery-stm32f072/board.c",
"diff": "@@ -65,6 +65,7 @@ static struct usart_config const loopback_usart =\nloopback_rx_dma.usart_rx,\nloopback_tx_dma.usart_tx,\n115200,\n+ 0,\nloopback_queue,\nloopback_qu... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | chip/stm32/usart: Add flags to usart_config
Allows setting TXINV/RXINV bits.
BRANCH=none
BUG=b:65697962
TEST=make BOARD=wand -j
Change-Id: Ib1bb290cd9758c53b98c8fc1ca1a9369c8cff39e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/694561
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,228 | 14.10.2017 14:47:03 | 25,200 | 05d59d14c9d89a567bbdaede79f8b1d81e5e7c42 | host_command: Add flags1 to host_command_get_features
There are two entries in feature flags array. Report back flags1 along
with flag0 while responding to host queries.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "common/host_command.c",
"new_path": "common/host_command.c",
"diff": "@@ -715,6 +715,7 @@ static int host_command_get_features(struct host_cmd_handler_args *args)\nmemset(r, 0, sizeof(*r));\nr->flags[0] = get_feature_flags0();\n+ r->flags[1] = get_feature_flag... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | host_command: Add flags1 to host_command_get_features
There are two entries in feature flags array. Report back flags1 along
with flag0 while responding to host queries.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: I7e92c9558a5ddee0515e026ea51eb70f1e26eafc
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/719487
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,197 | 19.10.2017 14:52:39 | -28,800 | b6547eda9b90face1a5df01ecd65e10d2c03c5ca | staff: Adjust touchpad dimensions
BRANCH=none
TEST=Flash staff, no more *** TP mismatch error. | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.h",
"new_path": "board/hammer/board.h",
"diff": "/* Touchpad firmware size and dimension difference */\n#ifdef BOARD_STAFF\n-/* TODO(b:38277869): Adjust values to match hardware. */\n-#define CONFIG_USB_HID_TOUCHPAD_LOGICAL_MAX_X 3214\n-#def... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | staff: Adjust touchpad dimensions
BRANCH=none
BUG=b:67982128
TEST=Flash staff, no more *** TP mismatch error.
Change-Id: I8f9aee68bc81a550eae176b9903add2a4f26b700
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/727390
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,420 | 13.10.2017 17:45:49 | -7,200 | 87dbec5dfa4e0341d6714ec42c2648448bfec1f7 | util/misc_util: Fix unchecked error
It's unlikely, but let's check for ftell() errors.
BRANCH=none
TEST=none
Found-by: Coverity Scan
Commit-Ready: Patrick Georgi
Tested-by: Patrick Georgi | [
{
"change_type": "MODIFY",
"old_path": "util/misc_util.c",
"new_path": "util/misc_util.c",
"diff": "@@ -48,7 +48,10 @@ char *read_file(const char *filename, int *size)\nfseek(f, 0, SEEK_END);\n*size = ftell(f);\nrewind(f);\n- if (*size > 0x100000) {\n+ if ((*size > 0x100000) || (*size < 0)) {\n+ if ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | util/misc_util: Fix unchecked error
It's unlikely, but let's check for ftell() errors.
BUG=b:64477774
BRANCH=none
TEST=none
Change-Id: I3690da60f756ab056e852e9f485b3c439c82e67b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Found-by: Coverity Scan #58158
Reviewed-on: https://chromium-review.googlesource.com/719196
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org> |
136,197 | 18.10.2017 10:05:56 | -28,800 | ccfc005fa414a6faa45a4168e27669b62abe1d5d | isl9238: Add support for providing power using OTG
BRANCH=none
TEST=Flash lux and wand, wand can provide power to lux. | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/isl923x.c",
"new_path": "driver/charger/isl923x.c",
"diff": "@@ -97,6 +97,49 @@ int charger_get_input_current(int *input_current)\nreturn EC_SUCCESS;\n}\n+#ifdef CONFIG_CHARGER_ISL9238\n+int charger_enable_otg_power(int enabled)\n+{\n+ int rv, c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | isl9238: Add support for providing power using OTG
BRANCH=none
BUG=b:66575472
TEST=Flash lux and wand, wand can provide power to lux.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I59091c509b78bacf9f382550ab380a77fbf68ba9
Reviewed-on: https://chromium-review.googlesource.com/725122
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,248 | 17.10.2017 11:16:39 | -28,800 | 67c8adc817c1153eb32e6f1a81ebe2f7782415ef | hana: Add EC console USART internal pull-up
This change prevents the floating RX console pin from entering unwanted
commands.
BRANCH=oak
TEST=manual
load on hana and probe USART RX pin | [
{
"change_type": "MODIFY",
"old_path": "board/elm/gpio.inc",
"new_path": "board/elm/gpio.inc",
"diff": "@@ -106,7 +106,7 @@ GPIO(SPI2_NSS_DB, PIN(F, 6), GPIO_OUT_HIGH) /* daughterboard */\n/* sensor power control */\nGPIO(SENSOR_PWR_EN_L, PIN(D, 11), GPIO_OUT_LOW)\n-ALTERNATE(PIN_MASK(A, 0x0600), 1,... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hana: Add EC console USART internal pull-up
This change prevents the floating RX console pin from entering unwanted
commands.
BRANCH=oak
BUG=b:67033247
TEST=manual
load on hana and probe USART RX pin
Change-Id: I6dc05e03f82dcc71ea6f957f93c5fe7c6b65d2bf
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722381
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,340 | 17.10.2017 09:58:28 | 25,200 | a3931810fed99d345c54bd9db08e345459b95f07 | scarlet: Add min/max frequencies for sensors
As part of new interface MOTIONSENSE_CMD_INFO, we need to provide
sensors min and max frequency.
BRANCH=none
TEST=compile | [
{
"change_type": "MODIFY",
"old_path": "board/scarlet/board.c",
"new_path": "board/scarlet/board.c",
"diff": "@@ -456,6 +456,8 @@ struct motion_sensor_t motion_sensors[] = {\n.addr = BMI160_SET_SPI_ADDRESS(CONFIG_SPI_ACCEL_PORT),\n.rot_standard_ref = &base_standard_ref,\n.default_range = 2, /* g, en... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | scarlet: Add min/max frequencies for sensors
As part of new interface MOTIONSENSE_CMD_INFO, we need to provide
sensors min and max frequency.
BUG=none
BRANCH=none
TEST=compile
Change-Id: I8bcd4e2287a79ac17b0dce58ad7704876e89bcdb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/723601 |
136,407 | 21.09.2017 16:03:00 | 25,200 | 6c995e7e882e6693acb283a5042e40368c9aaf53 | zoombini: Change PD_MAX_POWER to 60W.
BRANCH=None
TEST=Flash zoombini; Verify can pull 60W with zinger.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.h",
"new_path": "board/zoombini/board.h",
"diff": "/* Define typical operating power and max power. */\n#define PD_MAX_VOLTAGE_MV 20000\n#define PD_MAX_CURRENT_MA 3000\n-#define PD_MAX_POWER_MW 45000\n+#define PD_MAX_POWER_MW 60000\n#defin... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Change PD_MAX_POWER to 60W.
BUG=None
BRANCH=None
TEST=Flash zoombini; Verify can pull 60W with zinger.
Change-Id: I24e5777679ab9c5546c0c4261037662d440693e4
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/677876
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,407 | 22.09.2017 10:28:30 | 25,200 | ddaee8e666f37ec37f3db392a91b6eeca018afd7 | zoombini: Temporarily use GPIOs for SLP signals.
This commit can be reverted when Si arrives.
BRANCH=None
TEST=Flash zoombini; EC comes up okay.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.h",
"new_path": "board/zoombini/board.h",
"diff": "/* EC Modules */\n#define CONFIG_ADC\n#define CONFIG_ESPI\n-#define CONFIG_ESPI_VW_SIGNALS\n+/* TODO(aaboagye): Uncomment when Si arrives. */\n+/* #define CONFIG_ESPI_VW_SIGNALS */\n#defin... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Temporarily use GPIOs for SLP signals.
This commit can be reverted when Si arrives.
BUG=None
BRANCH=None
TEST=Flash zoombini; EC comes up okay.
Change-Id: I372d736591196eb5066e5c61b947d6990311f0ea
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/678837
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,396 | 23.10.2017 18:27:10 | 25,200 | 9eac4de2efaf253ba9e89b822f430c060e59bf6b | cr50: prepare to release 0.0.25
Let's make CCD and RMA auth features available on pre-PVT decvices.
BRANCH=cr50
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 24, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release 0.0.25
Let's make CCD and RMA auth features available on pre-PVT decvices.
BRANCH=cr50
BUG=b:68161393
TEST=none
Change-Id: Ic4ced2ba0e44b620bfeef9aa11f4676667c3176f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/734762
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,197 | 25.10.2017 10:03:47 | -28,800 | c49d32a265ea76d9af55ccbcbda90e27748de1a3 | poppy: Update LED behaviour
According to spec, blink when charge is lower than 10%.
BRANCH=none
TEST=Flash soraka, LED behave as intended. | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/led.c",
"new_path": "board/poppy/led.c",
"diff": "@@ -102,12 +102,8 @@ static void board_led_set_battery(void)\nset_active_port_color(LED_AMBER);\nbreak;\ncase PWR_STATE_DISCHARGE:\n- /*\n- * TODO(b/37970194): Do we really want to blink on low batt... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Update LED behaviour
According to spec, blink when charge is lower than 10%.
BRANCH=none
BUG=b:37970194
TEST=Flash soraka, LED behave as intended.
Change-Id: Ifaab76bb1a92f060eb81f06deab84b45509ad40d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/737170
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,274 | 14.09.2017 16:16:10 | 25,200 | 28a5ad1646b2994853e310354b604547950a55c0 | servo: add usb updater
This updater combines console and firmware update commands to
update both RO and RW sections of servo_v4 and servo_micro.
BRANCH=None
TEST=updated firmware | [
{
"change_type": "MODIFY",
"old_path": "extra/tigertool/ecusb/stm32uart.py",
"new_path": "extra/tigertool/ecusb/stm32uart.py",
"diff": "\"\"\"Allow creation of uart/console interface via stm32 usb endpoint.\"\"\"\n+from __future__ import print_function\n+\nimport os\nimport select\nimport sys\n@@ -3... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo: add usb updater
This updater combines console and firmware update commands to
update both RO and RW sections of servo_v4 and servo_micro.
BRANCH=None
BUG=b:37513705
TEST=updated firmware
Change-Id: I9f585c90f5849f8dd7c9d2e08111ffbd5770fd54
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/668156
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,407 | 24.10.2017 16:21:53 | 25,200 | 12b7b5ae5c13cb6ae389083b294a6c8a32445133 | zoombini: Update GPIO settings.
GPIOs A0 and A2 need to be configured to open drain.
BRANCH=None
TEST=flash zoombini; verify EC boots up okay.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/gpio.inc",
"new_path": "board/zoombini/gpio.inc",
"diff": "@@ -64,8 +64,8 @@ GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT)\nGPIO(BAT_PRESENT_L, PIN(E, 5), GPIO_INPUT)\nGPIO(USB_PD_RST_L, PIN(F, 1), GPIO_ODR_HIGH)\n-GPIO(USB_A_5V_EN, PIN(A, 0), GPIO_OUT_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Update GPIO settings.
GPIOs A0 and A2 need to be configured to open drain.
BUG=b:67020486
BRANCH=None
TEST=flash zoombini; verify EC boots up okay.
Change-Id: I0fe0cb363eeca96322ff02d668f008799078a76d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/736818
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,274 | 13.10.2017 19:19:10 | 25,200 | 18f4a483f073b3a8f64f1da2e1089f658e1dbba6 | cr50: add rollback command
In DEV, it's necessary to rollback to reenter prod signed
images. Let's make this reasonably easy.
BRANCH=cr50
TEST=CR50_DEV fw does roll back to prod.. | [
{
"change_type": "MODIFY",
"old_path": "board/cr50/board.c",
"new_path": "board/cr50/board.c",
"diff": "@@ -1504,3 +1504,17 @@ int chip_factory_mode(void)\nreturn mode_set & 1;\n}\n+\n+#ifdef CR50_DEV\n+static int command_rollback(int argc, char **argv)\n+{\n+ system_ensure_rollback();\n+ ccprintf(\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: add rollback command
In DEV, it's necessary to rollback to reenter prod signed
images. Let's make this reasonably easy.
BUG=None
BRANCH=cr50
TEST=CR50_DEV fw does roll back to prod..
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: Id39c3e501782da3f088760ec27d09f1ffc7b7f58
Reviewed-on: https://chromium-review.googlesource.com/734840
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
136,230 | 31.10.2017 01:27:08 | 25,200 | 5b0c48bc294577944a5537fad24083977035036c | nautilus: Correct the year in the headers
This is a 2017 project.
BRANCH=none
TEST=build Nautilus
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/battery.c",
"new_path": "board/nautilus/battery.c",
"diff": "-/* Copyright 2016 The Chromium OS Authors. All rights reserved.\n+/* Copyright 2017 The Chromium OS Authors. All rights reserved.\n* Use of this source code is governed by a BSD-style... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Correct the year in the headers
This is a 2017 project.
BUG=none
BRANCH=none
TEST=build Nautilus
Change-Id: I46db0cd84379f98f3170d4aa426ec58b75f9a129
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/746581
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,228 | 31.10.2017 08:56:29 | 25,200 | f83866c7aaf73fbffea6714a98180c7474d6e540 | poppy/nautilus: Increase port80 buffer size
Bump up port80 buffer size to 256.
BRANCH=None
TEST=Verified that all port80 messages from a boot-up or S3 resume are
present in port80 history buffer. | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.h",
"new_path": "board/nautilus/board.h",
"diff": "#define CONFIG_CMD_ACCEL_INFO\n#define CONFIG_CMD_BUTTON\n+/* Port80 */\n+#undef CONFIG_PORT80_HISTORY_LEN\n+#define CONFIG_PORT80_HISTORY_LEN 256\n+\n/* SOC */\n#define CONFIG_CHIPSET_SKY... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy/nautilus: Increase port80 buffer size
Bump up port80 buffer size to 256.
BUG=None
BRANCH=None
TEST=Verified that all port80 messages from a boot-up or S3 resume are
present in port80 history buffer.
Change-Id: I76c95f308eaa30cc3789b93e59235a2dac0f632f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/747121
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,230 | 21.10.2017 00:55:20 | 25,200 | bca028445de353ae38c7956234b3d530a70762a8 | charger/rt946x: Implement VBUS measurement
BRANCH=none
TEST=Plug in guppy on Scarlet rev2, 'ectool usbpdpower' on console,
and see VBUS is measured as 4975mV
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/rt946x.c",
"new_path": "driver/charger/rt946x.c",
"diff": "@@ -60,6 +60,11 @@ enum rt946x_ilmtsel {\nRT946X_ILMTSEL_LOWER_LEVEL, /* lower of above two */\n};\n+enum rt946x_adc_in_sel {\n+ RT946X_ADC_VBUS_DIV5 = 1,\n+ RT946X_ADC_VBUS_DIV2,\n+};\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charger/rt946x: Implement VBUS measurement
BUG=b:67991345
BRANCH=none
TEST=Plug in guppy on Scarlet rev2, 'ectool usbpdpower' on console,
and see VBUS is measured as 4975mV
Change-Id: I960290745a343ef597fa32575491d936269ae628
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/732084
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,455 | 31.10.2017 17:30:17 | 25,200 | 0deaaaa00302252c34f7c40bc6cf9aff13d5b9e8 | servo_v4: Fix buffer overflow
src_pdo_charge[] size may exceed 2, but remove it instead.
TEST=On servo_v4, verify DTS always works.
BRANCH=servo
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/servo_v4/usb_pd_policy.c",
"new_path": "board/servo_v4/usb_pd_policy.c",
"diff": "@@ -59,7 +59,6 @@ struct vbus_prop {\nint ma;\n};\nstatic struct vbus_prop vbus[CONFIG_USB_PD_PORT_COUNT];\n-static struct vbus_prop src_pdo_charge[2];\nstatic int active_c... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_v4: Fix buffer overflow
src_pdo_charge[] size may exceed 2, but remove it instead.
BUG=None
TEST=On servo_v4, verify DTS always works.
BRANCH=servo
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I2a4e75a5939cab82d508408b961361bde9f207ea
Reviewed-on: https://chromium-review.googlesource.com/748272
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,230 | 31.10.2017 02:11:55 | 25,200 | 7d76175df7e00f9fa0a20fcea4c12b9033573042 | nautilus: Support keyboard matrix
Also fix the strapping pins for board id.
BRANCH=none
TEST=build Nautilus
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.c",
"new_path": "board/nautilus/board.c",
"diff": "@@ -807,36 +807,6 @@ void board_hibernate(void)\n;\n}\n-int board_get_version(void)\n-{\n- static int ver = -1;\n- uint8_t id4;\n-\n- if (ver != -1)\n- return ver;\n-\n- ver = 0;\n-\n- /* ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Support keyboard matrix
Also fix the strapping pins for board id.
BUG=b:68684486
BRANCH=none
TEST=build Nautilus
Change-Id: I9e9b5fe73efc85456f87355524de3e7ff7a592fb
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/746562
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,427 | 02.11.2017 17:44:12 | 21,600 | c7914f2ec03e94b871052b6893da0ef088bccb40 | kahlee: Don't hold pwrbtn=LOW in G3
Change chipset_force_shutdown() to not call power_button_pch_press()
when called from POWER_S5G3 state, so that we don't set pwrbtn=LOW
when entering G3.
BRANCH=none
TEST=push kahlee power button | [
{
"change_type": "MODIFY",
"old_path": "power/stoney.c",
"new_path": "power/stoney.c",
"diff": "@@ -34,7 +34,7 @@ void chipset_force_shutdown(void)\n{\nCPRINTS(\"%s()\", __func__);\n- if (!chipset_in_state(CHIPSET_STATE_HARD_OFF)) {\n+ if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) {\nforcing_shutdow... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kahlee: Don't hold pwrbtn=LOW in G3
Change chipset_force_shutdown() to not call power_button_pch_press()
when called from POWER_S5G3 state, so that we don't set pwrbtn=LOW
when entering G3.
BUG=b:68760602
BRANCH=none
TEST=push kahlee power button
Change-Id: I931fc73f2386f8124f1e082cccb095e3863cbb99
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/752682
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,405 | 07.11.2017 12:34:44 | 28,800 | 66546f8d3491bf961898eb981f2261220bb0ca2c | Fizz: Blink LED faster when requesting more power
Fizz blinks the power LED to alert a user when power supply isn't
enough. This patch makes the blinking speed twice as fast (on:1sec,
off:1sec).
BRANCH=none
TEST=Verify the LED blinks as intended. | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/led.c",
"new_path": "board/fizz/led.c",
"diff": "@@ -161,7 +161,7 @@ void led_alert(int enable)\n{\nif (enable) {\n/* Overwrite the current signal */\n- CONFIG_TICK(LED_PULSE_US, LED_RED);\n+ config_tick(1 * SECOND, 100, LED_RED);\nled_tick();\n} el... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Blink LED faster when requesting more power
Fizz blinks the power LED to alert a user when power supply isn't
enough. This patch makes the blinking speed twice as fast (on:1sec,
off:1sec).
BUG=b:37646390
BRANCH=none
TEST=Verify the LED blinks as intended.
Change-Id: I017eaf36b91d987f4b03308b1e9ac8781e5f217d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/757557
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,420 | 07.11.2017 03:31:10 | 18,000 | 063fc26720afce30fd72e6b2a112416d5264321a | Enable it83xx based boards
They build with coreboot-sdk.
BRANCH=none
TEST=building with coreboot-sdk's compiler succeeds
CQ-DEPEND=CL:757439
Commit-Ready: Patrick Georgi
Tested-by: Patrick Georgi | [
{
"change_type": "MODIFY",
"old_path": "Makefile.rules",
"new_path": "Makefile.rules",
"diff": "@@ -17,7 +17,7 @@ build-srcs := $(foreach u,$(build-util-bin),$(sort $($(u)-objs:%.o=util/%.c) uti\nhost-srcs := $(foreach u,$(host-util-bin),$(sort $($(u)-objs:%.o=util/%.c) util/$(u).c))\n# Don't do a b... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Enable it83xx based boards
They build with coreboot-sdk.
BRANCH=none
BUG=b:35572628
TEST=building with coreboot-sdk's compiler succeeds
CQ-DEPEND=CL:757439
Change-Id: I9d81eeff4c75f22d6b9f20acc5be2a64effd04a1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/756698
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org> |
136,200 | 09.11.2017 16:08:56 | -28,800 | a7c8b19aca80412c1c40f75eb208e383a53cafe3 | Coral: Fix LED name for factory control led by ectool
Correct the LED name in led_set_brightness().
BRANCH=none
TEST=Use ectool led battery amber/blue/green/red to check LED status | [
{
"change_type": "MODIFY",
"old_path": "board/coral/led.c",
"new_path": "board/coral/led.c",
"diff": "@@ -161,13 +161,13 @@ void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)\nint led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)\n{\nif (brightness[EC_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Coral: Fix LED name for factory control led by ectool
Correct the LED name in led_set_brightness().
BRANCH=none
BUG=none
TEST=Use ectool led battery amber/blue/green/red to check LED status
Change-Id: I3de34000f9fa516d386aba6ebe42dd69cacd50c7
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/760182
Reviewed-by: Scott Collyer <scollyer@chromium.org> |
136,197 | 06.11.2017 08:31:33 | 28,800 | fe69abf6c326dbfd054d6b498c7ad3669e9c681a | board: Add support for whiskers board
A hammer derivative.
BRANCH=none
TEST=make BOARD=whiskers -j | [
{
"change_type": "MODIFY",
"old_path": "board/hammer/board.h",
"new_path": "board/hammer/board.h",
"diff": "/* USB Configuration */\n#define CONFIG_USB\n-#ifdef BOARD_STAFF\n-#define CONFIG_USB_PID 0x502b\n-#elif defined(BOARD_HAMMER)\n+#ifdef BOARD_HAMMER\n#define CONFIG_USB_PID 0x5022\n+#elif defi... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | board: Add support for whiskers board
A hammer derivative.
BRANCH=none
BUG=b:68934906
TEST=make BOARD=whiskers -j
Change-Id: I8df5156d622bf518f647addf2fcea6342b2d6f2b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/754078
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,455 | 09.11.2017 11:17:16 | 28,800 | dedd0ab913cf779791695e75b34771f9d273e325 | gru: Remove `flashinfo` command for RAM savings
TEST=`make buildall -j`
BRANCH=None
Commit-Ready: Shawn N
Tested-by: Shawn N | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "/* Gru is especially limited on code space */\n#ifdef BOARD_GRU\n#undef CONFIG_CMD_ACCELSPOOF\n+#undef CONFIG_CMD_FLASHINFO\n#undef CONFIG_CMD_I2C_XFER\n#undef CONFIG_CMD_SHMEM\n#undef CONFIG_CM... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | gru: Remove `flashinfo` command for RAM savings
BUG=None
TEST=`make buildall -j`
BRANCH=None
Change-Id: Ibfbb6875327dfc13dcba57933d39fd207f382ac1
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/761299
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,407 | 08.11.2017 18:33:36 | 28,800 | 9975e07e3f12ec4a4e0e73bf53eeeea38b7cb56a | zoombini: Set default input ILIM to 128 mA.
The charger can regulate around 128 mA reasonably.
BRANCH=None
TEST=make -j buildall
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.h",
"new_path": "board/zoombini/board.h",
"diff": "#define CONFIG_CHARGER\n#define CONFIG_CHARGER_V2\n#define CONFIG_CHARGE_MANAGER\n-#define CONFIG_CHARGER_INPUT_CURRENT 512\n+#define CONFIG_CHARGER_INPUT_CURRENT 128\n#define CONFIG_CHARG... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | zoombini: Set default input ILIM to 128 mA.
The charger can regulate around 128 mA reasonably.
BUG=b:67120928
BRANCH=None
TEST=make -j buildall
Change-Id: I8e4b37dd3d95fa55cf76a686a32a378daa398d80
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/759956
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,197 | 09.11.2017 16:38:32 | 28,800 | 54588e40a7bd2b94a5fe96c2eecd435bdc4db110 | usb_updater2: Add support for touchpad debugging feature
Add support for touchpad debugging in usb_updater2, allowing an
arbitrary parameter to be passed.
BRANCH=none
TEST=./usb_updater2 -g 00 -d 18d1:502b | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/usb_updater2.c",
"new_path": "extra/usb_updater/usb_updater2.c",
"diff": "@@ -72,13 +72,14 @@ static struct first_response_pdu targ;\nstatic uint16_t protocol_version;\nstatic uint16_t header_type;\nstatic char *progname;\n-static char *short... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | usb_updater2: Add support for touchpad debugging feature
Add support for touchpad debugging in usb_updater2, allowing an
arbitrary parameter to be passed.
BRANCH=none
BUG=b:63993891
TEST=./usb_updater2 -g 00 -d 18d1:502b
Change-Id: I1242e3bab9dc69ec3a92dd158c85606211e40f21
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/763575
Reviewed-by: Chun-ta Lin <itspeter@chromium.org> |
136,228 | 13.11.2017 12:07:49 | 28,800 | 2a62a3dfca91a3d8f755c1cf31fb3289f1511af3 | nautilus: Change USB_C{0,1}_PD_RST_L to be GPIO_ODR_HIGH
Similar to coral and poppy/soraka devices, configure
USB_C{0,1}_PD_RST_L to be GPIO_ODR_HIGH since nautilus uses parade
TCPC on both ports.
BRANCH=None
TEST=make -j BOARD=nautilus | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/gpio.inc",
"new_path": "board/nautilus/gpio.inc",
"diff": "@@ -95,8 +95,8 @@ GPIO(USB_C0_CHARGE_L, PIN(C, 0), GPIO_OUT_LOW) /* C0 Charge enable */\nGPIO(USB_C1_5V_EN, PIN(B, 1), GPIO_OUT_LOW) /* C1 5V Enable */\nGPIO(USB_C1_3A_EN, PIN(3, 5), GPI... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Change USB_C{0,1}_PD_RST_L to be GPIO_ODR_HIGH
Similar to coral and poppy/soraka devices, configure
USB_C{0,1}_PD_RST_L to be GPIO_ODR_HIGH since nautilus uses parade
TCPC on both ports.
BUG=b:69198785
BRANCH=None
TEST=make -j BOARD=nautilus
Change-Id: If76cf0588744b3adcfd75f4e2ebe0ea9e721683d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767071
Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
136,230 | 07.11.2017 19:13:38 | 28,800 | 49b0f33e186ae5c65dd490ad0d304868608c9f1d | scarlet: Remove barometer bmp280
BRANCH=none
TEST=manually boot Dru and verify no complaint about baro init failure
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/scarlet/board.c",
"new_path": "board/scarlet/board.c",
"diff": "#include \"ec_commands.h\"\n#include \"driver/accelgyro_bmi160.h\"\n#include \"driver/charger/rt946x.h\"\n-#include \"driver/baro_bmp280.h\"\n#include \"driver/tcpm/fusb302.h\"\n#include \"d... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | scarlet: Remove barometer bmp280
BUG=b:69011927
BRANCH=none
TEST=manually boot Dru and verify no complaint about baro init failure
Change-Id: I35fd5636ac833bad81ce91969cdf94a79833486f
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/757938
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,274 | 13.11.2017 14:57:41 | 28,800 | 5cee174602d8ea851cc434a2f07b71e21cbaa214 | servo_updater: allow differing console enpoints
servo_micro has the console on intf 3, while servo_v4
has it's console on intf 0. Abstract this into the
config file rather than hardcoding.
BRANCH=None
TEST=update servo_micro | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/servo_micro.json",
"new_path": "extra/usb_updater/servo_micro.json",
"diff": "\"board\": \"servo micro\",\n\"vid\": \"0x18d1\",\n\"pid\": \"0x501a\",\n+ \"console\": \"3\",\n\"Comment on flash\": \"This is the base address of writeable flash\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_updater: allow differing console enpoints
servo_micro has the console on intf 3, while servo_v4
has it's console on intf 0. Abstract this into the
config file rather than hardcoding.
BUG=b:37513705
BRANCH=None
TEST=update servo_micro
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: I0090a0d081e001e62ffa7235eebbd6131ea00dcf
Reviewed-on: https://chromium-review.googlesource.com/769794
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> |
136,396 | 15.11.2017 11:09:13 | 28,800 | 9c090eb0c9fb898f7624fac068070cabe6dc52a6 | cr50: prepare to release 0.0.26
The new release will include fixes for SPI problems discovered when
debugging Fizz.
BRANCH=cr50
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "util/signer/ec_RW-manifest-dev.json",
"new_path": "util/signer/ec_RW-manifest-dev.json",
"diff": "\"timestamp\": 0,\n\"epoch\": 0, // FWR diversification contributor, 32 bits.\n\"major\": 0, // FW2_HIK_CHAIN counter.\n- \"minor\": 25, // Mostly harmless versio... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | cr50: prepare to release 0.0.26
The new release will include fixes for SPI problems discovered when
debugging Fizz.
BRANCH=cr50
BUG=none
TEST=none
Change-Id: I4ac2ab762ec86957a7555b0aaa41235f44a54d47
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/772738
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,340 | 03.11.2017 17:20:30 | 25,200 | c5c061f9b5707205bb32abdac15dc14a9af14800 | poppy: Lower sensor max ODR
EC seems to miss sample while providing sensor data at 200Hz.
Limit sensors ODR to 100Hz.
BRANCH=none
TEST=compile, tbd
Commit-Ready: Li1 Feng
Tested-by: Li1 Feng | [
{
"change_type": "MODIFY",
"old_path": "board/poppy/board.h",
"new_path": "board/poppy/board.h",
"diff": "#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4)\n#define BMM150_I2C_ADDRESS BMM150_ADDR0 /* 8-bit address */\n#define CONFIG_MAG_CALIBRATE\n+/* Lower maximal ODR to 100Hz */\n+#de... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | poppy: Lower sensor max ODR
EC seems to miss sample while providing sensor data at 200Hz.
Limit sensors ODR to 100Hz.
BUG=b:67112751
BRANCH=none
TEST=compile, tbd
Change-Id: Ic324c3d989854ae8b7f6b27bf6338266ce01ceda
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/753434
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,228 | 15.11.2017 09:47:16 | 28,800 | 8c9f5147ad186560aab9dadab3cf26bd3863fe5f | kevin: Claim some more space by disabling some configs
Disable ACCELSPOOF and FLASHINFO to save some space. This is required
to support 64-bit host events.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "#undef CONFIG_CONSOLE_HISTORY\n#undef CONFIG_EC_CMD_PD_CHIP_INFO\n-/* Gru is especially limited on code space */\n-#ifdef BOARD_GRU\n#undef CONFIG_CMD_ACCELSPOOF\n#undef CONFIG_CMD_FLASHINFO\n+\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | kevin: Claim some more space by disabling some configs
Disable ACCELSPOOF and FLASHINFO to save some space. This is required
to support 64-bit host events.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I364adb1e224c2084398b4ee5bb9fd24a1c542e0e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771997
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,407 | 15.11.2017 12:59:26 | 28,800 | fe02a5658bb3129cd674835d445ba962457434b7 | meowth: zoombini: Annotate ifdefs.
This commit just adds comments to the ifdefs introduced for
BOARD_ZOOMBINI.
BRANCH=None
TEST=make -j buildall
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -57,7 +57,7 @@ const enum gpio_signal hibernate_wake_pins[] = {\n};\nconst int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);\n-/* TODO(aaboagye): Add the additional Mewoth... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: zoombini: Annotate ifdefs.
This commit just adds comments to the ifdefs introduced for
BOARD_ZOOMBINI.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: I036d18bc5b1fb4ebbf0943e630e4931c03b60aa5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772909
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,407 | 10.11.2017 14:09:23 | 28,800 | 2fa3e47d9c4ea2fe1c087d30d2e68f1fe8fbae90 | meowth: Add battery pack information.
BRANCH=None
TEST=make -j buildall.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/battery.c",
"new_path": "board/zoombini/battery.c",
"diff": "/* Battery info for proto */\nstatic const struct battery_info info = {\n+#ifdef BOARD_ZOOMBINI\n.voltage_max = 13200,\n.voltage_normal = 11250,\n.voltage_min = 9000,\n@@ -19,6 +20,32 ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: Add battery pack information.
BUG=b:69138843
BRANCH=None
TEST=make -j buildall.
Change-Id: Ia3aa76e03c7551dc34041631e8f8d1b16c1771e3
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772911
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,274 | 15.11.2017 15:42:28 | 28,800 | 26090a142b922dfe728a24241b60d47c50112b15 | servo: add usb_console to chroot
add usb_console, console.py to chroot install.
This tool allows directly accessing the usb
console of servo v4, servo micro, cr50, etc.
BRANCH=None
TEST=usb_console -d 18d1:501b | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_serial/console.py",
"new_path": "extra/usb_serial/console.py",
"diff": "@@ -242,7 +242,14 @@ parser.add_argument('-s', '--serialno', type=str,\nhelp=\"serial number of device\", default=\"\")\n-def main():\n+def runconsole():\n+ \"\"\"Run the usb con... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo: add usb_console to chroot
add usb_console, console.py to chroot install.
This tool allows directly accessing the usb
console of servo v4, servo micro, cr50, etc.
BUG=b:69016431
BRANCH=None
TEST=usb_console -d 18d1:501b
Change-Id: If9d5d49cf31d785ea9a7cec0a4eeeb34abae9cd1
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/773400 |
136,340 | 07.11.2017 13:54:06 | 28,800 | 2590ce95385346b27366b4bce22e71d87c54eaa6 | common: Add software CTZ implementation when needeed
CTZ - Count Trailing Zero - is not implemented in hardware on cortex0 or
nds32.
Used in ST sensor drivers.
BRANCH=none
TEST=compile
Commit-Ready: Ely Vazquez | [
{
"change_type": "MODIFY",
"old_path": "common/build.mk",
"new_path": "common/build.mk",
"diff": "@@ -91,6 +91,7 @@ common-$(CONFIG_SHA1)+= sha1.o\ncommon-$(CONFIG_SHA256)+=sha256.o\ncommon-$(CONFIG_SMBUS)+= smbus.o\ncommon-$(CONFIG_SOFTWARE_CLZ)+=clz.o\n+common-$(CONFIG_SOFTWARE_CTZ)+=ctz.o\ncommon... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | common: Add software CTZ implementation when needeed
CTZ - Count Trailing Zero - is not implemented in hardware on cortex0 or
nds32.
Used in ST sensor drivers.
BUG=none
BRANCH=none
TEST=compile
Change-Id: I2d62fd60f05169189b24ba2a3308bec69ed9de9c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767609
Commit-Ready: Ely Vazquez <nadia198877@gmail.com>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,407 | 15.11.2017 16:50:25 | 28,800 | 14b985ff9ff1e77223608c0802882af04ed3c040 | meowth: Add temp sensor ADC channels.
Additionally, meowth has GPIOs for sleep signals, therefore remove the
"ifndef" for eSPI VW.
BRANCH=None
TEST=make -j buildall
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.c",
"new_path": "board/zoombini/board.c",
"diff": "@@ -57,8 +57,8 @@ const enum gpio_signal hibernate_wake_pins[] = {\n};\nconst int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);\n-/* TODO(aaboagye): Add the additional Meowth... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: Add temp sensor ADC channels.
Additionally, meowth has GPIOs for sleep signals, therefore remove the
"ifndef" for eSPI VW.
BUG=b:69138817
BRANCH=None
TEST=make -j buildall
Change-Id: Ib78a8c5ff8037022adcaf690157836fd2db1ef0d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/775080
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,407 | 16.11.2017 11:20:15 | 28,800 | b0857952ec5792a6c1550ae4a5d25c5a5d20b549 | meowth: Enable MKBP support for events.
Button and switch events will be reported using MKBP.
BRANCH=None
TEST=make -j buildall
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/board.h",
"new_path": "board/zoombini/board.h",
"diff": "#define CONFIG_SWITCH\n#endif /* defined(BOARD_ZOOMBINI) */\n+/* TODO(aaboagye): Eventually, enable MKBP for zoombini as well. */\n+#ifdef BOARD_MEOWTH\n+#define CONFIG_MKBP_EVENT\n+#defin... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: Enable MKBP support for events.
Button and switch events will be reported using MKBP.
BUG=b:6914039
BRANCH=None
TEST=make -j buildall
Change-Id: Ieff75fa563ed91c2d33b18caf8942038ab7100bd
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/775477
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,228 | 16.11.2017 14:22:13 | 28,800 | ab2ce0a0ef38a701a9cc6622ccb41ba55d6b4984 | gru: Make more code space by disabling configs
Disable CMD_IDLE_STATS and USB_PD_LOGGING for gru in order to make
more code space for upcoming 64-bit host event support
BRANCH=None
TEST=make -j BOARD=gru | [
{
"change_type": "MODIFY",
"old_path": "board/kevin/board.h",
"new_path": "board/kevin/board.h",
"diff": "/* Gru is especially limited on code space */\n#ifdef BOARD_GRU\n+#undef CONFIG_CMD_IDLE_STATS\n#undef CONFIG_CMD_I2C_XFER\n+#undef CONFIG_USB_PD_LOGGING\n#undef CONFIG_CMD_SHMEM\n#undef CONFIG_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | gru: Make more code space by disabling configs
Disable CMD_IDLE_STATS and USB_PD_LOGGING for gru in order to make
more code space for upcoming 64-bit host event support
BUG=b:69329196
BRANCH=None
TEST=make -j BOARD=gru
Change-Id: I5fca66d13224e077b157b0768ba0264948ab6a0d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/775876
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,428 | 17.11.2017 17:39:08 | 28,800 | 3b80b4e827f9bb2e82656fa74748954a06050b48 | meowth: zoombini: Removed 5V enable pins.
Not needed since we're using the SN5S330.
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/gpio.inc",
"new_path": "board/zoombini/gpio.inc",
"diff": "@@ -182,9 +182,6 @@ GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT)\nGPIO(BAT_PRESENT_L, PIN(E, 5), GPIO_INPUT)\nGPIO(USB_PD_RST_L, PIN(6, 2), GPIO_INPUT)\n-GPIO(USB_C0_5V_EN, PIN(6, 7), GPIO_OUT_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: zoombini: Removed 5V enable pins.
Not needed since we're using the SN5S330.
BUG=b:69140019
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors
Change-Id: Id8fa17e1e20ac805405fc6e48e481ceade1a1981
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/777823
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,322 | 21.11.2017 23:06:46 | -32,400 | 6834e2bfaff706729ee32be7dc2f3eeb057019ef | nautilus: remove base-related code.
BRANCH=none
TEST=build/flash on nautilus. Check boot. | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.c",
"new_path": "board/nautilus/board.c",
"diff": "@@ -107,177 +107,6 @@ void usb1_evt(enum gpio_signal signal)\ntask_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0);\n}\n-/*\n- * Base detection and debouncing\n- *\n- * TODO(b/3558539... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: remove base-related code.
BUG=b:69389497
BRANCH=none
TEST=build/flash on nautilus. Check boot.
Change-Id: I02677109a99f57e48a62355e82ca31c8445b6849
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/781261
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
136,228 | 21.11.2017 23:00:49 | 28,800 | bff4bb76829cc76e32fef4ad9f8074f48e2fdb6f | nautilus: Remove CONFIG_BUTTON_RECOVERY
Nautilus does not use buttons to trigger recovery. Remove
CONFIG_BUTTON_RECOVERY.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.c",
"new_path": "board/nautilus/board.c",
"diff": "@@ -269,12 +269,6 @@ const struct temp_sensor_t temp_sensors[] = {\n};\nBUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);\n-const struct button_config *recovery_buttons[] = {\n-... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus: Remove CONFIG_BUTTON_RECOVERY
Nautilus does not use buttons to trigger recovery. Remove
CONFIG_BUTTON_RECOVERY.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: Ic9bdbd60bebb511963439844d09d5260617c77ec
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784774
Reviewed-by: Philip Chen <philipchen@chromium.org> |
136,228 | 27.11.2017 15:54:43 | 28,800 | c5dfb7945c5b4a76781665cf059382b4c11a1622 | hostevents: Reclaim EC_HOST_EVENT_EXTENDED bit
Now that we have support for 64-bit events, there is no need to
reserve a bit in lower 32 bits for extended events.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "include/ec_commands.h",
"new_path": "include/ec_commands.h",
"diff": "@@ -582,12 +582,6 @@ enum host_event_code {\n/* Keyboard recovery combo with hardware reinitialization */\nEC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,\n- /*\n- * Reserve this last bit to... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | hostevents: Reclaim EC_HOST_EVENT_EXTENDED bit
Now that we have support for 64-bit events, there is no need to
reserve a bit in lower 32 bits for extended events.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: Ide02c4384c2b3ab4a63b028f126c48b73d6cd269
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791863
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,228 | 27.11.2017 14:46:44 | 28,800 | d33eb02aef288b1eb52363c68c20b5b0087ad5f6 | sb_fw_update: Get rid of CONFIG_SB_FIRMWARE_UPDATE
CONFIG_SB_FIRMWARE_UPDATE is dead on ToT. So, get rid it completely.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "common/charge_state_v2.c",
"new_path": "common/charge_state_v2.c",
"diff": "#include \"i2c.h\"\n#include \"math_util.h\"\n#include \"printf.h\"\n-#include \"sb_fw_update.h\"\n#include \"system.h\"\n#include \"task.h\"\n#include \"timer.h\"\n@@ -655,13 +654,6 @... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | sb_fw_update: Get rid of CONFIG_SB_FIRMWARE_UPDATE
CONFIG_SB_FIRMWARE_UPDATE is dead on ToT. So, get rid it completely.
BUG=b:69695376
BRANCH=None
TEST=make -j buildall
Change-Id: Ic1eedff21d82f729a73ec9a7c1d554b6b571e827
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/792013
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,248 | 04.09.2017 14:01:59 | -28,800 | cf0153224ebe3acd6264fb15c514184b282e78bb | coffeecake: initial commit
Clone HoHo board to CoffeeCake.
BRANCH=none
TEST=make BOARD=coffeecake -j | [
{
"change_type": "ADD",
"old_path": null,
"new_path": "board/coffeecake/board.c",
"diff": "+/* Copyright 2017 The Chromium OS Authors. All rights reserved.\n+ * Use of this source code is governed by a BSD-style license that can be\n+ * found in the LICENSE file.\n+ */\n+/* Coffeecake dock configura... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | coffeecake: initial commit
Clone HoHo board to CoffeeCake.
BRANCH=none
BUG=none
TEST=make BOARD=coffeecake -j
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I62b4bf92a2eaffbc145197c7f36cfb7a29722bf5
Reviewed-on: https://chromium-review.googlesource.com/673963
Reviewed-by: Benson Leung <bleung@chromium.org> |
136,248 | 20.09.2017 06:13:20 | -28,800 | 96bc7cd9b5fcc45322eb818c6b012c82b13683c3 | charger: add sy21612 buck-boost converter driver
SY21612 is buck-boost converter with selectable source/sink mode.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "driver/build.mk",
"new_path": "driver/build.mk",
"diff": "@@ -56,6 +56,7 @@ driver-$(CONFIG_CHARGER_ISL9237)+=charger/isl923x.o\ndriver-$(CONFIG_CHARGER_ISL9238)+=charger/isl923x.o\ndriver-$(CONFIG_CHARGER_RT9466)+=charger/rt946x.o\ndriver-$(CONFIG_CHARGER_RT9... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | charger: add sy21612 buck-boost converter driver
SY21612 is buck-boost converter with selectable source/sink mode.
BRANCH=none
BUG=none
TEST=none
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I71248eedd9be775790d71010f69dfae41cd64a27
Reviewed-on: https://chromium-review.googlesource.com/673964
Reviewed-by: Benson Leung <bleung@chromium.org> |
136,248 | 20.09.2017 06:17:49 | -28,800 | 6d2066aa3942a62b856d32483cf93772412b132d | coffeecake: enable dual role
This change applies the diff between hoho and coffeecake. I2C master
configuration is added to control buck-boost converter.
BRANCH=none
TEST=make buildall -j | [
{
"change_type": "MODIFY",
"old_path": "board/coffeecake/board.c",
"new_path": "board/coffeecake/board.c",
"diff": "#include \"adc.h\"\n#include \"adc_chip.h\"\n+#include \"charger/sy21612.h\"\n+#include \"clock.h\"\n#include \"common.h\"\n#include \"ec_commands.h\"\n#include \"ec_version.h\"\n#incl... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | coffeecake: enable dual role
This change applies the diff between hoho and coffeecake. I2C master
configuration is added to control buck-boost converter.
BRANCH=none
BUG=none
TEST=make buildall -j
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: Ia700404ccc4e8d2bd8368a823a0cae911257cf7d
Reviewed-on: https://chromium-review.googlesource.com/673965
Reviewed-by: Benson Leung <bleung@chromium.org> |
136,248 | 08.11.2017 16:57:44 | -28,800 | d39678345b93b37ce83630ac41ddc7e9c35b64d0 | coffeecake: Workaround P0 EN_USB_PD leakage
EN_USB_PD leaks ~1V to C0_VBUS. This change turns on PD_DISCHARGE when
C0_VBUS is low.
BRANCH=none
TEST=manual
load on coffeecake, boot into SRC mode, check C0_VBUS voltage. | [
{
"change_type": "MODIFY",
"old_path": "board/coffeecake/board.c",
"new_path": "board/coffeecake/board.c",
"diff": "@@ -27,6 +27,7 @@ static volatile uint64_t hpd_prev_ts;\nstatic volatile int hpd_prev_level;\nvoid hpd_event(enum gpio_signal signal);\n+void vbus_event(enum gpio_signal signal);\n#inc... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | coffeecake: Workaround P0 EN_USB_PD leakage
EN_USB_PD leaks ~1V to C0_VBUS. This change turns on PD_DISCHARGE when
C0_VBUS is low.
BRANCH=none
BUG=b:67910512
TEST=manual
load on coffeecake, boot into SRC mode, check C0_VBUS voltage.
Change-Id: Ia650ee83c8fef4228d3bb2f7ec5f9eab3e16bf4d
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/758318
Reviewed-by: Benson Leung <bleung@chromium.org> |
136,228 | 28.11.2017 19:52:53 | 28,800 | 0fd88135208873cb08eb89cc4f017feeb5ee9caf | software_panic: Add a new software panic type for PMIC fault
This change adds a new software panic type PANIC_SW_PMIC_FAULT that
can be used to report any PMIC faults during previous boot.
BRANCH=None
TEST=make -j buildall | [
{
"change_type": "MODIFY",
"old_path": "include/software_panic.h",
"new_path": "include/software_panic.h",
"diff": "#define PANIC_SW_ASSERT (PANIC_SW_BASE + 3)\n#define PANIC_SW_WATCHDOG (PANIC_SW_BASE + 4)\n#define PANIC_SW_BAD_RNG (PANIC_SW_BASE + 5)\n+#define PANIC_SW_PMIC_FAULT (PANIC_SW_BASE + ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | software_panic: Add a new software panic type for PMIC fault
This change adds a new software panic type PANIC_SW_PMIC_FAULT that
can be used to report any PMIC faults during previous boot.
BUG=b:65732924,b:69334392
BRANCH=None
TEST=make -j buildall
Change-Id: I218b5d01ee145bb02a773495046f4255f1ec8986
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/797910
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,396 | 30.11.2017 19:50:03 | 28,800 | 3bb08ed694d9c41538988668d8a6ef7874601116 | gsctool: fix error processing logic
The error processing logic is reversed, which results in missing error
values when errors actually happen.
BRANCH=none
TEST=verified that errors values are now reported properly. | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/gsctool.c",
"new_path": "extra/usb_updater/gsctool.c",
"diff": "@@ -1596,7 +1596,7 @@ static void process_password(struct transfer_descriptor *td)\nreturn;\nfprintf(stderr, \"Error setting password: rv %d, response %d\\n\",\n- rv, response_si... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | gsctool: fix error processing logic
The error processing logic is reversed, which results in missing error
values when errors actually happen.
BRANCH=none
BUG=none
TEST=verified that errors values are now reported properly.
Change-Id: I282920d35e978a704e8c2728a8aa71a5f1da9a00
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/802994
Reviewed-by: Mary Ruthven <mruthven@chromium.org> |
136,405 | 01.12.2017 08:50:05 | 28,800 | 7bc2486f8d83e1cb5f7211be4d3aa4cb57dac1ad | Fizz: Remove AMON_BMON
Fizz EC doesn't have IADP_ACMON_BMON. So, this ADC channel can't
be used.
BRANCH=none
TEST=none | [
{
"change_type": "MODIFY",
"old_path": "board/fizz/board.c",
"new_path": "board/fizz/board.c",
"diff": "@@ -153,12 +153,6 @@ const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);\nconst struct adc_t adc_channels[] = {\n/* Vbus sensing (1/10 voltage divider). */\n[ADC_VBUS] = {\"VBUS\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | Fizz: Remove AMON_BMON
Fizz EC doesn't have IADP_ACMON_BMON. So, this ADC channel can't
be used.
BUG=none
BRANCH=none
TEST=none
Change-Id: I13a4fd4cbb638af731d5bbe3404bfa6a97a2950d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/803895
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,407 | 27.11.2017 11:11:14 | 28,800 | 9c4008e35c291017c7a0ffbe96e1e5d9df8a0e5a | ppc: Add common APIs.
It'll be easier to add support for new PPCs if we make a generic API.
BRANCH=None
TEST=make -j buildall
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "common/usb_charger.c",
"new_path": "common/usb_charger.c",
"diff": "#include \"task.h\"\n#include \"usb_charge.h\"\n#include \"usb_pd.h\"\n+#include \"usbc_ppc.h\"\nstatic void update_vbus_supplier(int port, int vbus_level)\n{\n@@ -38,11 +39,15 @@ static void ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | ppc: Add common APIs.
It'll be easier to add support for new PPCs if we make a generic API.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: I9aac1750eb4c163eb2b94aa8975c797f86d0a25a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/791499
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,274 | 01.12.2017 18:19:46 | 28,800 | 5ab0c9fcefd40212feb9b91aa4ab3d7db8c7ed9b | servo_updater: add version checks
This adds a check for the current and new versions,
and will not update if they are matched.
BRANCH=None
TEST=sudo ./servo_updater.py -b servo_micro | [
{
"change_type": "MODIFY",
"old_path": "extra/usb_updater/servo_micro.json",
"new_path": "extra/usb_updater/servo_micro.json",
"diff": "{\n\"Comment\": \"This file describes the updateable sections of the flash.\",\n- \"board\": \"servo micro\",\n+ \"board\": \"servo_micro\",\n\"vid\": \"0x18d1\",\n... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_updater: add version checks
This adds a check for the current and new versions,
and will not update if they are matched.
BUG=b:69016431
BRANCH=None
TEST=sudo ./servo_updater.py -b servo_micro
Change-Id: I3462099a086278dc1589609d76facf11a64bd3bc
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/804716
Reviewed-by: Wai-Hong Tam <waihong@google.com> |
136,274 | 06.12.2017 16:04:00 | 28,800 | ee3cb8c898268edcc869288a3dd318c0fefcd636 | servo_micro: default to UART3 enabled
This sets power on defaults for UART3 to be routed to
the glados style uart-on-jtag pinout. This is pretty
standardized going forward.
BRANCH=servo-9040.b
TEST=miniterm.py /dev/google/Servo_Micro-2-1.2/serial/Servo_UART3 | [
{
"change_type": "MODIFY",
"old_path": "board/servo_micro/board.c",
"new_path": "board/servo_micro/board.c",
"diff": "@@ -271,5 +271,22 @@ static void board_init(void)\n/* Structured enpoints */\nusb_spi_enable(&usb_spi, 1);\n+\n+ /* Enable UARTs by default. */\n+ gpio_set_level(GPIO_UART1_EN_L, 0);... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | servo_micro: default to UART3 enabled
This sets power on defaults for UART3 to be routed to
the glados style uart-on-jtag pinout. This is pretty
standardized going forward.
BUG=None
BRANCH=servo-9040.b
TEST=miniterm.py /dev/google/Servo_Micro-2-1.2/serial/Servo_UART3
Change-Id: I397df8fc09da681eba28cae489e2f6eaef8a87d0
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/813180
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> |
136,297 | 07.12.2017 13:48:16 | -32,400 | 9133a1313fb02dff14fa245e9d9603a253c44c21 | nautilus : change sensor i2c level
Level of sensor's i2c and interrupt is changed to 1.8V on rev 2.
BRANCH=none
TEST=build/flash nautilus rev1, sensor operates well.
Commit-Ready: YongBeum Ha
Tested-by: YongBeum Ha | [
{
"change_type": "MODIFY",
"old_path": "board/nautilus/board.c",
"new_path": "board/nautilus/board.c",
"diff": "@@ -431,6 +431,14 @@ static void board_init(void)\ngpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L);\ngpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L);\n+ /* Level of sensor's I2C and interrupt ... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | nautilus : change sensor i2c level
Level of sensor's i2c and interrupt is changed to 1.8V on rev 2.
BUG=b:70299498
BRANCH=none
TEST=build/flash nautilus rev1, sensor operates well.
Change-Id: Ibee990de76f5a77517994a08474f577e4a92ae83
Reviewed-on: https://chromium-review.googlesource.com/812589
Commit-Ready: YongBeum Ha <ybha@samsung.com>
Tested-by: YongBeum Ha <ybha@samsung.com>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,427 | 07.12.2017 17:48:30 | 25,200 | 7c96395355a6f483767be44776ae3cc5afa72fcf | grunt: Remove I2C pull ups
Don't need internal I2C pull ups since we have external.
BRANCH=none
TEST=make BOARD=grunt | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/gpio.inc",
"new_path": "board/grunt/gpio.inc",
"diff": "@@ -87,11 +87,11 @@ GPIO(SKU_ID2, PIN(4, 1), GPIO_INPUT)\n/* Alternate functions GPIO definitions */\nALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, GPIO_PULL_UP) /* UART from EC to Servo */\n-A... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Remove I2C pull ups
Don't need internal I2C pull ups since we have external.
BUG=b:64935726
BRANCH=none
TEST=make BOARD=grunt
Change-Id: I2f7e57d968622f87427534b2eb296009d68bf757
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/816065
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,230 | 08.12.2017 19:09:29 | 28,800 | 8c75d42d426b83673f38eec14a244cd54eace94a | scarlet: Enable button command
We'll need button command for FAFT.
BRANCH=none
TEST=confirm 'button' command is in 'help' command list
Commit-Ready: Philip Chen
Tested-by: Philip Chen | [
{
"change_type": "MODIFY",
"old_path": "board/scarlet/board.h",
"new_path": "board/scarlet/board.h",
"diff": "#define CONFIG_FORCE_CONSOLE_RESUME\n#define CONFIG_HOST_COMMAND_STATUS\n+/* Required for FAFT */\n+#define CONFIG_CMD_BUTTON\n+\n/* By default, set hcdebug to off */\n#undef CONFIG_HOSTCMD_... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | scarlet: Enable button command
We'll need button command for FAFT.
BUG=b:65596735
BRANCH=none
TEST=confirm 'button' command is in 'help' command list
Change-Id: Ib7ca97a643b3789278d629ac04d6ec01751cd46f
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/818572
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
136,197 | 24.11.2017 10:28:33 | -28,800 | f60de076e1bbc4c9c02650555849f0e405aed100 | isl923x: Use ccprintf in print_amon_bmon
Makes sure output is still shown even when we set "chan 0".
BRANCH=none
TEST=chan 0; amon => data is printed. | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/isl923x.c",
"new_path": "driver/charger/isl923x.c",
"diff": "@@ -557,7 +557,7 @@ static int print_amon_bmon(enum amon_bmon amon, int direction,\nadc = adc_read_channel(ADC_AMON_BMON);\ncurr = adc / resistor;\n- CPRINTF(\"%s: %d uV, %d mA\\n\", t... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | isl923x: Use ccprintf in print_amon_bmon
Makes sure output is still shown even when we set "chan 0".
BRANCH=none
BUG=none
TEST=chan 0; amon => data is printed.
Change-Id: Ic2bf525174b451e3f25868a0a77e0174687b6262
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/818850
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,197 | 28.11.2017 18:17:27 | -28,800 | 48cb289e0cd1d78e600508b5f2e9ba0d250f7052 | isl923x: Add support for reverse AMON ("OTG")
Also refactor amon_bmon command to save a bit of flash space.
BRANCH=none
TEST=amon in EC console | [
{
"change_type": "MODIFY",
"old_path": "driver/charger/isl923x.c",
"new_path": "driver/charger/isl923x.c",
"diff": "@@ -516,7 +516,7 @@ DECLARE_CONSOLE_COMMAND(psys, console_command_psys,\nenum amon_bmon { AMON, BMON };\nstatic int print_amon_bmon(enum amon_bmon amon, int direction,\n- int resistor,... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | isl923x: Add support for reverse AMON ("OTG")
Also refactor amon_bmon command to save a bit of flash space.
BUG=b:66575472
BRANCH=none
TEST=amon in EC console
Change-Id: I8badcab1ccf14fd413c6713e418cc71f123754c8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/818851
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,264 | 06.12.2017 10:11:36 | 25,200 | b23fdca572d5078c3722616a37d76963b68e0f33 | grunt: Add keyboard backlight
This gets the pins set up. Not yet sure if we may need additional
support for the LM3630A or if it will use the generic PWM support.
TEST=make -j buildall
BRANCH=None | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/board.c",
"new_path": "board/grunt/board.c",
"diff": "#include \"lid_switch.h\"\n#include \"power.h\"\n#include \"power_button.h\"\n+#include \"pwm.h\"\n+#include \"pwm_chip.h\"\n#include \"registers.h\"\n#include \"switch.h\"\n#include \"system.h\... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Add keyboard backlight
This gets the pins set up. Not yet sure if we may need additional
support for the LM3630A or if it will use the generic PWM support.
BUG=b:69379749
TEST=make -j buildall
BRANCH=None
Change-Id: I80a1a10818483666461bf47500e3956880dcc1fc
Signed-off-by: Benjamin Gordon <bmgordon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/812064
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,427 | 08.12.2017 12:33:07 | 25,200 | 359b98c312521bdaee2e4065e1d39ae7ab70f1c4 | grunt: Update battery info
Adjust values to match the datasheet.
BRANCH=none
TEST=make BOARD=grunt
Commit-Ready: ChromeOS CL Exonerator Bot | [
{
"change_type": "MODIFY",
"old_path": "board/grunt/battery.c",
"new_path": "board/grunt/battery.c",
"diff": "static const struct battery_info info = {\n.voltage_max = 13200, /* mV */\n- .voltage_normal = 11400,\n+ .voltage_normal = 11550,\n.voltage_min = 9000,\n.precharge_current = 256, /* mA */\n.... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | grunt: Update battery info
Adjust values to match the datasheet.
BUG=b:69683279
BRANCH=none
TEST=make BOARD=grunt
Change-Id: Ic95e9f2ccf2316f342d014f6042fb7b0f7108357
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/817876
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
136,407 | 29.11.2017 17:29:33 | 28,800 | 552ca1ec4982db07a42e6d974a9f12a50a4dbc1c | meowth: zoombini: Remove slp signal pulldowns.
BRANCH=None
TEST=Flash meowth; verify it boots to S0.
Commit-Ready: Aseda Aboagye
Tested-by: Aseda Aboagye | [
{
"change_type": "MODIFY",
"old_path": "board/zoombini/gpio.inc",
"new_path": "board/zoombini/gpio.inc",
"diff": "@@ -24,12 +24,12 @@ GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_int\nGPIO_INT(AC_PRESENT, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)\n/*... | C | BSD 3-Clause New or Revised License | coreboot/chrome-ec | meowth: zoombini: Remove slp signal pulldowns.
BUG=b:68992066
BRANCH=None
TEST=Flash meowth; verify it boots to S0.
Change-Id: I378e1831bd98112da333e9723408c9b5b5359cd3
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/807631
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org> |
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