name string | code string | asm string | file string |
|---|---|---|---|
llvm::SmallVectorTemplateBase<std::vector<llvm::DomainValue*, std::allocator<llvm::DomainValue*>>, false>::grow(unsigned long) | void SmallVectorTemplateBase<T, TriviallyCopyable>::grow(size_t MinSize) {
size_t NewCapacity;
T *NewElts = mallocForGrow(MinSize, NewCapacity);
moveElementsForGrow(NewElts);
takeAllocationForGrow(NewElts, NewCapacity);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rdx
movq %rdi, %rbx
leaq 0x10(%rdi), %r15
movq %rsp, %r12
movl $0x18, %ecx
movq %r15, %rsi
movq %r12, %r8
callq 0x1cba3de
movq %rax, %r14
movq %rbx, %rdi
movq %rax, %rsi
callq 0x1702db0
movq (%r12), %r12
movq (%rbx), %rdi
cmpq %r15, %rdi
je 0x1702d9c
ca... | /llvm/ADT/SmallVector.h |
llvm::SmallVectorTemplateBase<(anonymous namespace)::MemCmpExpansion::LoadEntry, true>::push_back((anonymous namespace)::MemCmpExpansion::LoadEntry) | void push_back(ValueParamT Elt) {
const T *EltPtr = reserveForParamAndGetAddress(Elt);
memcpy(reinterpret_cast<void *>(this->end()), EltPtr, sizeof(T));
this->set_size(this->size() + 1);
} | pushq %rbp
pushq %r14
pushq %rbx
movq %rdx, %rbx
movl %esi, %ebp
movq %rdi, %r14
movl 0x8(%rdi), %edx
cmpl 0xc(%rdi), %edx
jae 0x1704d60
movq (%r14), %rax
movl 0x8(%r14), %ecx
shlq $0x4, %rcx
movl %ebp, (%rax,%rcx)
movq %rbx, 0x8(%rax,%rcx)
incl 0x8(%r14)
popq %rbx
popq %r14
popq %rbp
retq
incq %rdx
leaq 0x10(%r14), %r... | /llvm/ADT/SmallVector.h |
(anonymous namespace)::GlobalMergeImpl::doMerge(llvm::SmallVectorImpl<llvm::GlobalVariable*>&, llvm::Module&, bool, unsigned int) const | bool GlobalMergeImpl::doMerge(SmallVectorImpl<GlobalVariable *> &Globals,
Module &M, bool isConst,
unsigned AddrSpace) const {
auto &DL = M.getDataLayout();
// FIXME: Find better heuristics
llvm::stable_sort(
Globals, [&DL](const GlobalVariable *GV... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xf8, %rsp
movl %r8d, 0x24(%rsp)
movl %ecx, 0x20(%rsp)
movq %rdx, %r12
movq %rdi, 0x28(%rsp)
movq %rsi, 0x8(%rsp)
movl 0x8(%rsi), %edi
testq %rdi, %rdi
je 0x170a6ed
leaq 0x120(%r12), %rbx
movq 0x8(%rsp), %rax
movq (%rax), %rbp
leaq (,%rdi,8), %r13
... | /CodeGen/GlobalMerge.cpp |
llvm::HardwareLoopsPass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) | PreservedAnalyses HardwareLoopsPass::run(Function &F,
FunctionAnalysisManager &AM) {
auto &LI = AM.getResult<LoopAnalysis>(F);
auto &SE = AM.getResult<ScalarEvolutionAnalysis>(F);
auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
auto &TTI = AM.getResult<TargetIRAnalysi... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movq %rcx, %r13
movq %rdx, %r14
movq %rsi, 0x20(%rsp)
movq %rdi, %rbx
leaq 0x42107d8(%rip), %rsi # 0x591f958
movq %rcx, %rdi
callq 0x1a7f6e0
addq $0x8, %rax
movq %rax, 0x18(%rsp)
leaq 0x42131f8(%rip), %rsi # 0x5922390
movq %r13, %rdi... | /CodeGen/HardwareLoops.cpp |
llvm::Instruction** llvm::SmallVectorImpl<llvm::Instruction*>::insert<llvm::ShuffleVectorInst**, void>(llvm::Instruction**, llvm::ShuffleVectorInst**, llvm::ShuffleVectorInst**) | iterator insert(iterator I, ItTy From, ItTy To) {
// Convert iterator to elt# to avoid invalidating iterator when we reserve()
size_t InsertElt = I - this->begin();
if (I == this->end()) { // Important special case for empty vector.
append(From, To);
return this->begin()+InsertElt;
}
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %r15
movq %rdx, %rbx
movq %rdi, %r13
movq (%rdi), %rax
movq %rsi, %r12
subq %rax, %r12
movl 0x8(%rdi), %edx
leaq (%rax,%rdx,8), %rax
cmpq %rsi, %rax
je 0x171aeac
movq %r15, %rbp
subq %rbx, %rbp
sarq $0x3, %rbp
addq %rbp, %rdx
movl 0... | /llvm/ADT/SmallVector.h |
void llvm::SmallVectorImpl<llvm::Instruction*>::append<llvm::ShuffleVectorInst**, void>(llvm::ShuffleVectorInst**, llvm::ShuffleVectorInst**) | void append(ItTy in_start, ItTy in_end) {
this->assertSafeToAddRange(in_start, in_end);
size_type NumInputs = std::distance(in_start, in_end);
this->reserve(this->size() + NumInputs);
this->uninitialized_copy(in_start, in_end, this->end());
this->set_size(this->size() + NumInputs);
} | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %rbx
movq %rsi, %r15
movq %rdi, %r14
subq %rsi, %rbx
sarq $0x3, %rbx
movl 0x8(%rdi), %edx
movl 0xc(%rdi), %eax
addq %rbx, %rdx
cmpq %rax, %rdx
jbe 0x171af5e
leaq 0x10(%r14), %rsi
movl $0x8, %ecx
movq %r14, %rdi
callq 0x1cba528
movl 0x8(%r14), %eax
testq %rbx, %rbx
jle 0x171af... | /llvm/ADT/SmallVector.h |
llvm::SmallVectorImpl<llvm::IntervalMapImpl::NodeRef>::swap(llvm::SmallVectorImpl<llvm::IntervalMapImpl::NodeRef>&) | void SmallVectorImpl<T>::swap(SmallVectorImpl<T> &RHS) {
if (this == &RHS) return;
// We can only avoid copying elements if neither vector is small.
if (!this->isSmall() && !RHS.isSmall()) {
std::swap(this->BeginX, RHS.BeginX);
std::swap(this->Size, RHS.Size);
std::swap(this->Capacity, RHS.Capacity);... | cmpq %rsi, %rdi
je 0x1728d06
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %rax
leaq 0x10(%rdi), %rsi
cmpq %rsi, %rax
je 0x1728c21
movq (%rbx), %rcx
leaq 0x10(%rbx), %rdx
cmpq %rdx, %rcx
je 0x1728c21
movq %rcx, (%r14)
movq %rax, (%rbx)
movl 0x8(%r14), %eax
movl 0x8(... | /llvm/ADT/SmallVector.h |
(anonymous namespace)::operator!=((anonymous namespace)::DbgVariableValue const&, (anonymous namespace)::DbgVariableValue const&) | inline bool operator==(const DbgVariableValue &LHS,
const DbgVariableValue &RHS) {
if (std::tie(LHS.LocNoCount, LHS.WasIndirect, LHS.WasList,
LHS.Expression) !=
std::tie(RHS.LocNoCount, RHS.WasIndirect, RHS.WasList, RHS.Expression))
return false;
re... | movb 0x8(%rdi), %cl
movl %ecx, %edx
andb $0x3f, %dl
movb 0x8(%rsi), %al
movl %eax, %r8d
andb $0x3f, %r8b
cmpb %r8b, %dl
setne %r8b
xorb %cl, %al
cmpb $0x40, %al
setae %r9b
movb $0x1, %al
orb %r8b, %r9b
jne 0x172a23f
movq 0x10(%rdi), %r8
cmpq 0x10(%rsi), %r8
je 0x172a240
retq
testb %dl, %dl
je 0x172a260
pushq %rax
movq ... | /CodeGen/LiveDebugVariables.cpp |
llvm::IntervalMap<llvm::SlotIndex, (anonymous namespace)::DbgVariableValue, 4u, llvm::IntervalMapInfo<llvm::SlotIndex>>::iterator::canCoalesceLeft(llvm::SlotIndex, (anonymous namespace)::DbgVariableValue) | bool IntervalMap<KeyT, ValT, N, Traits>::
iterator::canCoalesceLeft(KeyT Start, ValT Value) {
using namespace IntervalMapImpl;
Path &P = this->path;
if (!this->branched()) {
unsigned i = P.leafOffset();
RootLeaf &Node = P.leaf<RootLeaf>();
return i && Node.value(i-1) == Value &&
Traits... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %r14
movq %rsi, %rbx
movq (%rdi), %rcx
movq 0x8(%rdi), %rdx
movl 0x10(%rdi), %esi
movq %rsi, %r8
shlq $0x4, %r8
leaq (%rdx,%r8), %rax
cmpl $0x0, 0xa0(%rcx)
movl -0x4(%rdx,%r8), %r15d
je 0x172b101
testl %r15d, %r15d
jne 0x172b106
addq $0x8, %rdi
decl %esi... | /llvm/ADT/IntervalMap.h |
llvm::SmallVectorTemplateBase<std::pair<unsigned int, llvm::LiveInterval*>, true>::push_back(std::pair<unsigned int, llvm::LiveInterval*>) | void push_back(ValueParamT Elt) {
const T *EltPtr = reserveForParamAndGetAddress(Elt);
memcpy(reinterpret_cast<void *>(this->end()), EltPtr, sizeof(T));
this->set_size(this->size() + 1);
} | pushq %rbp
pushq %r14
pushq %rbx
movq %rdx, %rbx
movl %esi, %ebp
movq %rdi, %r14
movl 0x8(%rdi), %edx
cmpl 0xc(%rdi), %edx
jae 0x172b46c
movq (%r14), %rax
movl 0x8(%r14), %ecx
shlq $0x4, %rcx
movl %ebp, (%rax,%rcx)
movq %rbx, 0x8(%rax,%rcx)
incl 0x8(%r14)
popq %rbx
popq %r14
popq %rbp
retq
incq %rdx
leaq 0x10(%r14), %r... | /llvm/ADT/SmallVector.h |
llvm::SmallVectorTemplateBase<std::pair<llvm::SlotIndex, (anonymous namespace)::DbgVariableValue>, false>::grow(unsigned long) | void SmallVectorTemplateBase<T, TriviallyCopyable>::grow(size_t MinSize) {
size_t NewCapacity;
T *NewElts = mallocForGrow(MinSize, NewCapacity);
moveElementsForGrow(NewElts);
takeAllocationForGrow(NewElts, NewCapacity);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rdx
movq %rdi, %rbx
leaq 0x10(%rdi), %r14
movq %rsp, %r8
movl $0x20, %ecx
movq %r14, %rsi
callq 0x1cba3de
movq %rax, %r15
movl 0x8(%rbx), %r12d
testq %r12, %r12
je 0x172ba15
movq (%rbx), %r13
shlq $0x5, %r12
addq %r13, %r12
xorl %e... | /llvm/ADT/SmallVector.h |
llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, std::pair<llvm::LiveRange*, llvm::VNInfo const*>, 4u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, std::pair<llvm::LiveRange*, llvm::VNInfo const*>>>, unsigned int, std::pair<llvm::LiveRange*, llvm::VNInfo const*>, llvm::DenseMapIn... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq 0x8(%rdi), %rcx
andl $0x1, (%rdi)
movl $0x0, 0x4(%rdi)
cmoveq 0x8(%rdi), %rcx
movl $0x4, %eax
cmovel 0x10(%rdi), %eax
testl %eax, %eax
je 0x172bfa3
movl %eax, %eax
leaq (%rax,%rax,2), %rax
leaq -0x18(,%rax,8), %r... | /llvm/ADT/DenseMap.h |
llvm::SmallDenseMap<unsigned int, llvm::SmallVector<std::pair<llvm::LiveInterval*, llvm::VNInfo const*>, 4u>, 4u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SmallVector<std::pair<llvm::LiveInterval*, llvm::VNInfo const*>, 4u>>>::grow(unsigned int) | void grow(unsigned AtLeast) {
if (AtLeast > InlineBuckets)
AtLeast = std::max<unsigned>(64, NextPowerOf2(AtLeast-1));
if (Small) {
// First move the inline buckets into a temporary storage.
AlignedCharArrayUnion<BucketT[InlineBuckets]> TmpStorage;
BucketT *TmpBegin = reinterpret_cast<Bu... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x168, %rsp # imm = 0x168
movl %esi, %ebp
movq %rdi, %rbx
cmpl $0x5, %esi
jb 0x172c494
decl %ebp
movl %ebp, %eax
shrl %eax
orl %ebp, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl ... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, llvm::SmallVector<std::pair<llvm::LiveInterval*, llvm::VNInfo const*>, 4u>, 4u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SmallVector<std::pair<llvm::LiveInterval*, llvm::VNInfo const*>, 4u>>>, unsigned int, llvm::SmallVec... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq 0x8(%rdi), %rcx
andl $0x1, (%rdi)
movl $0x0, 0x4(%rdi)
cmoveq 0x8(%rdi), %rcx
movl $0x4, %eax
cmovel 0x10(%rdi), %eax
testl %eax, %eax
je 0x172c6f9
movl %eax, %eax
imulq $0x58, %rax, %rax
addq $-... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, llvm::SmallVector<std::pair<llvm::LiveInterval*, llvm::VNInfo const*>, 4u>, 4u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SmallVector<std::pair<llvm::LiveInterval*, llvm::VNInfo const*>, 4u>>>, unsigned int, llvm::SmallVec... | void destroyAll() {
if (getNumBuckets() == 0) // Nothing to do.
return;
const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey();
for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) {
if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) &&
!KeyInfoT::isEqual(P->... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl (%rdi), %ecx
movl $0x4, %eax
testb $0x1, %cl
jne 0x172c8c2
movl 0x10(%rbx), %eax
testl %eax, %eax
je 0x172c8fd
testb $0x1, %cl
jne 0x172c8d1
movq 0x8(%rbx), %rbx
jmp 0x172c8d5
addq $0x8, %rbx
movl %eax, %eax
imulq $0x58, %rax, %r14
addq $0x18, %rbx
cmpl $-0x3, -0x18... | /llvm/ADT/DenseMap.h |
llvm::LiveIntervals::computeVirtRegs() | void LiveIntervals::computeVirtRegs() {
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
Register Reg = Register::index2VirtReg(i);
if (MRI->reg_nodbg_empty(Reg))
continue;
LiveInterval &LI = createEmptyInterval(Reg);
bool NeedSplit = computeVirtRegInterval(LI);
if (NeedSplit) ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq 0x8(%rdi), %rax
movl 0x40(%rax), %r12d
testl %r12d, %r12d
je 0x1730182
movq %rdi, %rbx
xorl %r13d, %r13d
leaq 0x18(%rsp), %r14
movl %r13d, %ebp
orl $0x80000000, %ebp # imm = 0x80000000
movq 0x8(%rbx), %rdi
movl %ebp, %esi
call... | /CodeGen/LiveIntervals.cpp |
llvm::LiveRangeUpdater::~LiveRangeUpdater() | ~LiveRangeUpdater() { flush(); } | pushq %rbx
movq %rdi, %rbx
callq 0x1736ec6
movq 0x20(%rbx), %rdi
addq $0x30, %rbx
cmpq %rbx, %rdi
je 0x1736194
popq %rbx
jmp 0x751980
popq %rbx
retq
| /llvm/CodeGen/LiveInterval.h |
llvm::DenseMapBase<llvm::DenseMap<unsigned int, std::pair<unsigned int, llvm::MachineInstr*>, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, std::pair<unsigned int, llvm::MachineInstr*>>>, unsigned int, std::pair<unsigned int, llvm::MachineInstr*>, llvm::DenseMapInfo<unsigned int, void... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq $0x0, 0x8(%rdi)
movl 0x10(%rdi), %eax
testq %rax, %rax
je 0x173cf72
movq (%r15), %rcx
leaq (%rax,%rax,2), %rax
leaq -0x18(,%rax,8), %rax
movabsq $-0x5555555555555555, %rdx # imm = 0xAAAAAAAAAAAAAAAB
mulq %rdx
mov... | /llvm/ADT/DenseMap.h |
llvm::LiveRegMatrix::isPhysRegUsed(llvm::MCRegister) const | bool LiveRegMatrix::isPhysRegUsed(MCRegister PhysReg) const {
for (MCRegUnit Unit : TRI->regunits(PhysReg)) {
if (!Matrix[Unit].empty())
return true;
}
return false;
} | movq 0x38(%rdi), %rcx
movq 0x38(%rcx), %r8
testq %r8, %r8
setne %al
je 0x173d696
movq 0x8(%rcx), %rcx
movl %esi, %edx
leaq (%rdx,%rdx,2), %rdx
movl 0x10(%rcx,%rdx,8), %esi
movl %esi, %ecx
andl $0xfff, %ecx # imm = 0xFFF
movq 0xc8(%rdi), %rdx
imulq $0xd8, %rcx, %rdi
cmpl $0x0, 0xcc(%rdx,%rdi)
jne 0x173d696
sh... | /CodeGen/LiveRegMatrix.cpp |
llvm::LLVMTargetMachine::initAsmInfo() | void LLVMTargetMachine::initAsmInfo() {
MRI.reset(TheTarget.createMCRegInfo(getTargetTriple().str()));
assert(MRI && "Unable to create reg info");
MII.reset(TheTarget.createMCInstrInfo());
assert(MII && "Unable to create instruction info");
// FIXME: Having an MCSubtargetInfo on the target machine is a hack d... | pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rdi, %rbx
movq 0x8(%rdi), %rdi
movq 0x1d0(%rbx), %rsi
movq 0x1d8(%rbx), %rdx
callq 0x174355a
movq 0x268(%rbx), %rsi
movq %rax, 0x268(%rbx)
testq %rsi, %rsi
je 0x1743418
leaq 0x268(%rbx), %rdi
callq 0xaaf082
movq 0x8(%rbx), %rax
movq 0x40(%rax), %rax
testq %rax, %rax
je 0x174... | /CodeGen/LLVMTargetMachine.cpp |
llvm::MachineBasicBlock::SkipPHIsLabelsAndDebug(llvm::MachineInstrBundleIterator<llvm::MachineInstr, false>, llvm::Register, bool) | MachineBasicBlock::iterator
MachineBasicBlock::SkipPHIsLabelsAndDebug(MachineBasicBlock::iterator I,
Register Reg, bool SkipPseudoOp) {
const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
iterator E = end();
while (I != E && (I->isPHI() || I->isPosit... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %ecx, %ebp
movl %edx, %r14d
movq %rsi, %rbx
movq %rdi, %r15
movq 0x20(%rdi), %rax
movq 0x10(%rax), %rdi
movq (%rdi), %rax
callq *0x80(%rax)
addq $0x30, %r15
cmpq %rbx, %r15
je 0x174ff80
movq %rax, %r12
movabsq $0x2000000000007c0f, %r13 # ... | /CodeGen/MachineBasicBlock.cpp |
llvm::MachineBasicBlock::addLiveIn(llvm::MCRegister, llvm::TargetRegisterClass const*) | Register
MachineBasicBlock::addLiveIn(MCRegister PhysReg, const TargetRegisterClass *RC) {
assert(getParent() && "MBB must be inserted in function");
assert(Register::isPhysicalRegister(PhysReg) && "Expected physreg");
assert(RC && "Register class is required");
assert((isEHPad() || this == &getParent()->front(... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq %rdx, 0x10(%rsp)
movl %esi, %ebx
movq %rdi, %r14
movzwl %bx, %esi
movq $-0x1, %rdx
callq 0x175169e
movl %eax, %r15d
movq 0x38(%r14), %rsi
movq %r14, %rdi
callq 0x174fe56
movq %rax, %r12
leaq 0x30(%r14), %r13
movq 0x20(%r14), %rax
mo... | /CodeGen/MachineBasicBlock.cpp |
llvm::MachineBasicBlock::addSuccessor(llvm::MachineBasicBlock*, llvm::BranchProbability) | void MachineBasicBlock::addSuccessor(MachineBasicBlock *Succ,
BranchProbability Prob) {
// Probability list is either empty (if successor list isn't empty, this means
// disabled optimization) or has the same size as successor list.
if (!(Probs.empty() && !Successors.empty()))... | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movl %edx, 0xc(%rsp)
movq %rsi, (%rsp)
movq 0x78(%rdi), %rsi
cmpq %rsi, 0x70(%rdi)
je 0x1751ed7
cmpq 0x80(%rbx), %rsi
je 0x1751ee3
movl %edx, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x78(%rbx)
jmp 0x1751ef1
movq 0x58(%rbx), %rax
cmpq 0x60(%rbx), %rax
jne 0x1751ef1
jmp 0x1751ec2
lea... | /CodeGen/MachineBasicBlock.cpp |
llvm::MachineBasicBlock::rfindPrevDebugLoc(llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::MachineInstr, true, true, void, false, void>, true, false>) | DebugLoc MachineBasicBlock::rfindPrevDebugLoc(reverse_instr_iterator MBBI) {
if (MBBI == instr_rend())
return {};
// Skip debug declarations, we don't want a DebugLoc from them.
MBBI = next_nodbg(MBBI, instr_rend());
if (MBBI != instr_rend())
return MBBI->getDebugLoc();
return {};
} | pushq %rbx
movq %rdi, %rbx
addq $0x30, %rsi
cmpq %rdx, %rsi
je 0x1753d0f
movq (%rdx), %rax
andq $-0x8, %rax
cmpq %rax, %rsi
je 0x1753cef
movzwl 0x44(%rax), %ecx
leal -0xd(%rcx), %edx
cmpl $0x5, %edx
jae 0x1753cea
movq (%rax), %rax
jmp 0x1753cd0
cmpl $0x17, %ecx
je 0x1753ce5
cmpq %rsi, %rax
je 0x1753d0f
movq 0x38(%rax),... | /CodeGen/MachineBasicBlock.cpp |
llvm::MachineBasicBlock::computeRegisterLiveness(llvm::TargetRegisterInfo const*, llvm::MCRegister, llvm::MachineInstrBundleIterator<llvm::MachineInstr const, false>, unsigned int) const | MachineBasicBlock::LivenessQueryResult
MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
MCRegister Reg, const_iterator Before,
unsigned Neighborhood) const {
unsigned N = Neighborhood;
// Try searching fo... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movl %r8d, %r14d
movq %rcx, %rbx
movq %rsi, 0x10(%rsp)
movq %rdi, %r15
leaq 0x30(%rdi), %r13
movq %rcx, (%rsp)
cmpq %rcx, %r13
sete %al
testl %r8d, %r8d
sete %cl
orb %al, %cl
movq %rbx, %rdi
movq %rdx, 0x8(%rsp)
jne 0x1753e19
movl %r14d,... | /CodeGen/MachineBasicBlock.cpp |
bool llvm::PreservedAnalyses::PreservedAnalysisChecker::preservedSet<llvm::CFGAnalyses>() | bool preservedSet() {
AnalysisSetKey *SetID = AnalysisSetT::ID();
return !IsAbandoned && (PA.PreservedIDs.count(&AllAnalysesKey) ||
PA.PreservedIDs.count(SetID));
} | cmpb $0x0, 0x10(%rdi)
je 0x1755b11
xorl %eax, %eax
retq
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq (%rdi), %r14
leaq 0x4185b8e(%rip), %rsi # 0x58db6b0
movq %r14, %rdi
callq 0x8dcdd6
movq %rax, %rcx
movq 0x8(%r14), %rax
xorl %edx, %edx
cmpq (%r14), %rax
sete %dl
movl 0x10(%r14,%rdx,4), %edx
leaq (%rax,%rdx,... | /llvm/IR/Analysis.h |
std::pair<unsigned long, short> llvm::ScaledNumbers::getSum<unsigned long>(unsigned long, short, unsigned long, short) | std::pair<DigitsT, int16_t> getSum(DigitsT LDigits, int16_t LScale,
DigitsT RDigits, int16_t RScale) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
// Check inputs up front. This is only relevant if addition overflows, but
// testing here shoul... | pushq %r14
pushq %rbx
subq $0x18, %rsp
leaq 0x10(%rsp), %rbx
movq %rdi, (%rbx)
leaq 0x6(%rsp), %rax
movw %si, (%rax)
leaq 0x8(%rsp), %r14
movq %rdx, (%r14)
leaq 0x4(%rsp), %r8
movw %cx, (%r8)
movq %rbx, %rdi
movq %rax, %rsi
movq %r14, %rdx
movq %r8, %rcx
callq 0x175bb03
movl %eax, %edx
movq (%r14), %rax
movq (%rbx), %r... | /llvm/Support/ScaledNumber.h |
llvm::BFIDOTGraphTraitsBase<llvm::MachineBlockFrequencyInfo, llvm::MachineBranchProbabilityInfo>::getNodeLabel[abi:cxx11](llvm::MachineBasicBlock const*, llvm::MachineBlockFrequencyInfo const*, llvm::GVDAGType, int) | std::string getNodeLabel(NodeRef Node, const BlockFrequencyInfoT *Graph,
GVDAGType GType, int layout_order = -1) {
std::string Result;
raw_string_ostream OS(Result);
if (layout_order != -1)
OS << Node->getName() << "[" << layout_order << "] : ";
else
OS << Node->g... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movl %r9d, %r12d
movl %r8d, %ebp
movq %rcx, %r14
movq %rdx, %r15
movq %rdi, %rbx
leaq 0x10(%rdi), %rax
movq %rax, (%rdi)
xorl %eax, %eax
movq %rax, 0x8(%rdi)
movb %al, 0x10(%rdi)
leaq 0x20(%rsp), %r13
movl $0x0, 0x8(%r13)
movb %al, 0x28(... | /llvm/Analysis/BlockFrequencyInfoImpl.h |
llvm::GraphWriter<llvm::MachineBlockFrequencyInfo*>::emitEdge(void const*, int, void const*, int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&) | void emitEdge(const void *SrcNodeID, int SrcNodePort,
const void *DestNodeID, int DestNodePort,
const std::string &Attrs) {
if (SrcNodePort > 64) return; // Eminating from truncated part?
if (DestNodePort > 64) DestNodePort = 64; // Targeting the truncated part?
... | cmpl $0x40, %edx
jle 0x175d5f8
retq
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %r9, %r14
movq %rcx, %r15
movl %edx, %ebp
movq %rsi, %r12
movq %rdi, %rbx
movq (%rdi), %rdi
leaq 0x2799bf4(%rip), %rsi # 0x3ef720c
movl $0x5, %edx
callq 0x7c4562
movq %rax, %rdi
movq %r12, %rsi
callq 0x1cea3ae
testl %ebp, ... | /llvm/Support/GraphWriter.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DomTreeNodeBase<llvm::MachineBasicBlock>*, unsigned int, llvm::DenseMapInfo<llvm::DomTreeNodeBase<llvm::MachineBasicBlock>*, void>, llvm::detail::DenseMapPair<llvm::DomTreeNodeBase<llvm::MachineBasicBlock>*, unsigned int>>, llvm::DomTreeNodeBase<llvm::MachineBasicBlock>*, un... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x17745e1
pushq %rbx
movq (%rdi), %rdi
movl (%rsi), %r8d
movl %r8d, %eax
shrl $0x4, %eax
shrl $0x9, %r8d
xorl %eax, %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %r10d
xorl %r9d, %r9d
movl %r8d, %ebx
shlq $0x4, %rbx
leaq (%rdi,%rbx), %r11
movq (%rdi,%rbx), %rbx
cmpq %rbx, (%rsi)
jn... | /llvm/ADT/DenseMap.h |
llvm::SetVector<llvm::MachineBasicBlock*, llvm::SmallVector<llvm::MachineBasicBlock*, 8u>, llvm::DenseSet<llvm::MachineBasicBlock const*, llvm::DenseMapInfo<llvm::MachineBasicBlock const*, void>>, 8u>::contains(llvm::MachineBasicBlock const* const&) const | bool contains(const key_type &key) const {
if constexpr (canBeSmall())
if (isSmall())
return is_contained(vector_, key);
return set_.find(key) != set_.end();
} | pushq %rbx
movq %rsi, %rdx
movq %rdi, %rbx
cmpl $0x0, 0x8(%rdi)
je 0x17766aa
movq (%rdx), %rsi
movq %rbx, %rdi
callq 0x17792f4
movl 0x10(%rbx), %ecx
shlq $0x3, %rcx
addq (%rbx), %rcx
jmp 0x17766c5
movq 0x18(%rbx), %rdi
movl 0x20(%rbx), %eax
leaq (%rdi,%rax,8), %rsi
callq 0x1779258
movl 0x20(%rbx), %ecx
shlq $0x3, %rcx
... | /llvm/ADT/SetVector.h |
llvm::cl::opt<bool, true, llvm::cl::parser<bool>>::opt<char [24], llvm::cl::LocationClass<bool>, llvm::cl::OptionHidden, llvm::cl::desc>(char const (&) [24], llvm::cl::LocationClass<bool> const&, llvm::cl::OptionHidden const&, llvm::cl::desc const&) | explicit opt(const Mods &... Ms)
: Option(llvm::cl::Optional, NotHidden), Parser(*this) {
apply(this, Ms...);
done();
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rcx, %r15
movq %rdx, %r12
movq %rsi, %r13
movq %rdi, %r14
xorl %esi, %esi
xorl %edx, %edx
callq 0x7c77e2
movq $0x0, 0x80(%r14)
movb $0x0, 0x91(%r14)
leaq 0x3f67af1(%rip), %rax # 0x56e32a0
addq $0x10, %rax
movq %rax, 0x88(%r14)
leaq 0x3f7da0f(... | /llvm/Support/CommandLine.h |
llvm::SmallVector<llvm::MachineBasicBlock*, 8u> llvm::GraphDiff<llvm::MachineBasicBlock*, false>::getChildren<true>(llvm::MachineBasicBlock*) const | VectRet getChildren(NodePtr N) const {
using DirectedNodeT =
std::conditional_t<InverseEdge, Inverse<NodePtr>, NodePtr>;
auto R = children<DirectedNodeT>(N);
VectRet Res = VectRet(detail::reverse_if<!InverseEdge>(R));
// Remove nullptr children for clang.
llvm::erase(Res, nullptr);
aut... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %r15
movq %rsi, %r14
movq %rdi, %rbx
movq 0x40(%rdx), %rsi
movq 0x48(%rdx), %rdx
leaq 0x10(%rdi), %rax
movq %rax, (%rdi)
movabsq $0x800000000, %rax # imm = 0x800000000
movq %rax, 0x8(%rdi)
callq 0xb0ad2e
movq %rsp, %rdx
movq $0... | /llvm/Support/CFGDiff.h |
unsigned int llvm::DomTreeBuilder::SemiNCAInfo<llvm::DominatorTreeBase<llvm::MachineBasicBlock, false>>::runDFS<false, llvm::DomTreeBuilder::SemiNCAInfo<llvm::DominatorTreeBase<llvm::MachineBasicBlock, false>>::DeleteReachable(llvm::DominatorTreeBase<llvm::MachineBasicBlock, false>&, llvm::DomTreeBuilder::SemiNCAInfo<l... | unsigned runDFS(NodePtr V, unsigned LastNum, DescendCondition Condition,
unsigned AttachToNum,
const NodeOrderMap *SuccOrder = nullptr) {
assert(V);
SmallVector<std::pair<NodePtr, unsigned>, 64> WorkList = {{V, AttachToNum}};
NodeToInfo[V].Parent = AttachToNum;
while... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x498, %rsp # imm = 0x498
movl %r9d, %r15d
movq %r8, %r14
movl %ecx, %ebp
movl %edx, 0xc(%rsp)
movq %rdi, %rbx
leaq 0x30(%rsp), %r13
movq %rsi, (%r13)
leaq 0x48(%rsp), %rdx
movq %rsi, -0x10(%rdx)
movl %r9d, -0x8(%rdx)
leaq 0x98(%rsp), %r... | /llvm/Support/GenericDomTreeConstruction.h |
llvm::MachineFrameInfo::estimateStackSize(llvm::MachineFunction const&) const | uint64_t MachineFrameInfo::estimateStackSize(const MachineFunction &MF) const {
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
Align MaxAlign = getMaxAlign();
int64_t Offset = 0;
// This code is very, very simila... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %r15
movq %rdi, %r14
movq 0x10(%rsi), %rdi
movq (%rdi), %rax
callq *0x88(%rax)
movq %rax, %r12
movq 0x10(%r15), %rdi
movq (%rdi), %rax
callq *0xc8(%rax)
movl 0x20(%r14), %r9d
testl %r9d, %r9d
je 0x17883cd
movl %r9d, %ecx
negl ... | /CodeGen/MachineFrameInfo.cpp |
llvm::MachineFunction::getMachineMemOperand(llvm::MachineMemOperand const*, llvm::MachinePointerInfo const&, llvm::LocationSize) | MachineMemOperand *
MachineFunction::getMachineMemOperand(const MachineMemOperand *MMO,
const MachinePointerInfo &PtrInfo,
LocationSize Size) {
assert((!Size.hasValue() ||
Size.getValue().getKnownMinValue() != ~UINT64_C(0)) &&
... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %r12
subq $-0x80, %rdi
movl $0x50, %esi
movl $0x4, %edx
callq 0x8c3eba
movq %rax, %r14
movzwl 0x20(%r12), %esi
movzbl 0x22(%r12), %ecx
xorps %xmm0, %xmm0
leaq 0x30(%rsp), %r8
movaps %xmm0, 0x10(%r8)
movaps %xmm0, (%r... | /CodeGen/MachineFunction.cpp |
llvm::MachineFunction::getMachineMemOperand(llvm::MachineMemOperand const*, long, llvm::LLT) | MachineMemOperand *
MachineFunction::getMachineMemOperand(const MachineMemOperand *MMO,
int64_t Offset, LLT Ty) {
const MachinePointerInfo &PtrInfo = MMO->getPointerInfo();
// If there is no pointer value, the offset isn't tracked so we need to adjust
// the base alignment.
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %r14
cmpq $0x7, (%rsi)
movb 0x22(%rsi), %bpl
ja 0x178a15e
movzbl %bpl, %eax
movq %r15, %rcx
btsq %rax, %rcx
movq %rcx, %rax
negq %rax
andq %rcx, %rax
je 0x178a153
bsrq %rax, %rax
xorq $0x3f, %ra... | /CodeGen/MachineFunction.cpp |
llvm::DenseMapBase<llvm::DenseMap<llvm::Register, std::pair<unsigned int, unsigned int>, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::DenseMapPair<llvm::Register, std::pair<unsigned int, unsigned int>>>, llvm::Register, std::pair<unsigned int, unsigned int>, llvm::DenseMapInfo<llvm::Register, void>, llvm::de... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq $0x0, 0x8(%rdi)
movl 0x10(%rdi), %eax
testq %rax, %rax
je 0x178f03c
movq (%r15), %rcx
leaq (%rax,%rax,2), %rax
leaq -0xc(,%rax,4), %rax
movabsq $-0x5555555555555555, %rdx # imm = 0xAAAAAAAAAAAAAAAB
mulq %rdx
movq... | /llvm/ADT/DenseMap.h |
llvm::DenseMap<llvm::MachineBasicBlock*, llvm::DenseMap<unsigned int, std::vector<llvm::MachineInstr*, std::allocator<llvm::MachineInstr*>>, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, std::vector<llvm::MachineInstr*, std::allocator<llvm::MachineInstr*>>>>, llvm::DenseMapInfo<llvm::... | void init(unsigned InitNumEntries) {
auto InitBuckets = BaseT::getMinBucketToReserveForEntries(InitNumEntries);
if (allocateBuckets(InitBuckets)) {
this->BaseT::initEmpty();
} else {
NumEntries = 0;
NumTombstones = 0;
}
} | pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
testl %esi, %esi
je 0x179dfa2
shll $0x2, %esi
movl $0xaaaaaaab, %eax # imm = 0xAAAAAAAB
imulq %rsi, %rax
shrq $0x21, %rax
incl %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ec... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseMapPair<llvm::MachineLoop*, bool>* llvm::DenseMapBase<llvm::SmallDenseMap<llvm::MachineLoop*, bool, 4u, llvm::DenseMapInfo<llvm::MachineLoop*, void>, llvm::detail::DenseMapPair<llvm::MachineLoop*, bool>>, llvm::MachineLoop*, bool, llvm::DenseMapInfo<llvm::MachineLoop*, void>, llvm::detail::DenseMapPa... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl (%rdi), %edx
movl %edx, %ecx
shrl %ecx
movl $0x4, %esi
testb $0x1, %dl
jne 0x179e901
movl 0x10(%rbx), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x179e938
notl %ecx
addl %esi, %ecx
subl ... | /llvm/ADT/DenseMap.h |
(anonymous namespace)::MachineLICMBase::IsLICMCandidate(llvm::MachineInstr&, llvm::MachineLoop*) | bool MachineLICMBase::IsLICMCandidate(MachineInstr &I, MachineLoop *CurLoop) {
// Check if it's safe to move the instruction.
bool DontMoveAcrossStore = !HoistConstLoads || !AllowedToHoistLoads[CurLoop];
if ((!I.isSafeToMove(AA, DontMoveAcrossStore)) &&
!(HoistConstStores && isInvariantStore(I, TRI, MRI))) ... | pushq %r14
pushq %rbx
subq $0x18, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq %rdx, 0x10(%rsp)
movb $0x1, %al
cmpb $0x1, 0x412deb9(%rip) # 0x58ccc68
jne 0x179edc7
leaq 0x1a8(%r14), %rdi
leaq 0x10(%rsp), %rsi
callq 0x179e7f2
movb 0x8(%rax), %al
xorb $0x1, %al
leaq 0xf(%rsp), %rdx
movb %al, (%rdx)
movq 0x180(%r14), %rsi
... | /CodeGen/MachineLICM.cpp |
void llvm::cl::ValuesClass::apply<llvm::cl::opt<UseBFI, false, llvm::cl::parser<UseBFI>>>(llvm::cl::opt<UseBFI, false, llvm::cl::parser<UseBFI>>&) const | size_t size() const { return Size; } | movl 0x8(%rdi), %eax
testq %rax, %rax
je 0x17a2b8d
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq (%rdi), %r14
leaq (%rax,%rax,4), %rax
leaq (%r14,%rax,8), %r15
addq $0x98, %rbx
movq (%r14), %rsi
movq 0x8(%r14), %rdx
leaq 0x10(%r14), %rcx
movq 0x18(%r14), %r8
movq 0x20(%r14), %r9
movq %rbx, %rdi
callq 0x17a2b8e
... | /llvm/ADT/SmallVector.h |
SortAuthStubPair(std::pair<llvm::MCSymbol*, llvm::MCExpr const*> const*, std::pair<llvm::MCSymbol*, llvm::MCExpr const*> const*) | static int SortAuthStubPair(const ExprStubPairTy *LHS,
const ExprStubPairTy *RHS) {
return LHS->first->getName().compare(RHS->first->getName());
} | movq (%rdi), %rdx
xorl %eax, %eax
testb $0x1, 0x8(%rdx)
movl $0x0, %ecx
je 0x17a8b42
movq -0x8(%rdx), %rax
movq (%rax), %rcx
addq $0x18, %rax
subq $0x18, %rsp
movq %rax, 0x8(%rsp)
movq %rcx, 0x10(%rsp)
movq (%rsi), %rax
xorl %esi, %esi
testb $0x1, 0x8(%rax)
movl $0x0, %edx
je 0x17a8b6b
movq -0x8(%rax), %rsi
movq (%rsi)... | /CodeGen/MachineModuleInfoImpls.cpp |
printCFIRegister(unsigned int, llvm::raw_ostream&, llvm::TargetRegisterInfo const*) | static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS,
const TargetRegisterInfo *TRI) {
if (!TRI) {
OS << "%dwarfreg." << DwarfReg;
return;
}
if (std::optional<unsigned> Reg = TRI->getLLVMRegNum(DwarfReg, true))
OS << printReg(*Reg, TRI);
else
OS << "<badr... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rsi, %rbx
movl %edi, %ebp
testq %rdx, %rdx
je 0x17acec8
movq %rdx, %r14
leaq 0x8(%rdx), %rdi
movl %ebp, %esi
movl $0x1, %edx
callq 0x1b01656
btq $0x20, %rax
jb 0x17acef0
leaq 0x362ca18(%rip), %rsi # 0x4dd98c9
movl $0x8, %edx
movq %rbx, %rdi
addq $0x28... | /CodeGen/MachineOperand.cpp |
bool llvm::DenseMapBase<llvm::SmallDenseMap<llvm::AnalysisKey*, bool, 8u, llvm::DenseMapInfo<llvm::AnalysisKey*, void>, llvm::detail::DenseMapPair<llvm::AnalysisKey*, bool>>, llvm::AnalysisKey*, bool, llvm::DenseMapInfo<llvm::AnalysisKey*, void>, llvm::detail::DenseMapPair<llvm::AnalysisKey*, bool>>::LookupBucketFor<ll... | const BucketT *getBuckets() const {
return Small ? getInlineBuckets() : getLargeRep()->Buckets;
} | leaq 0x8(%rdi), %rcx
testb $0x1, (%rdi)
cmoveq 0x8(%rdi), %rcx
movl $0x8, %r8d
cmovel 0x10(%rdi), %r8d
testl %r8d, %r8d
je 0x17ae72f
pushq %rbx
movl (%rsi), %edi
movl %edi, %eax
shrl $0x4, %eax
shrl $0x9, %edi
xorl %eax, %edi
decl %r8d
andl %r8d, %edi
movl $0x1, %r10d
xorl %r9d, %r9d
movl %edi, %ebx
shlq $0x4, %rbx
lea... | /llvm/ADT/DenseMap.h |
llvm::DenseMap<llvm::MachineFunction*, std::__cxx11::list<std::pair<llvm::AnalysisKey*, std::unique_ptr<llvm::detail::AnalysisResultConcept<llvm::MachineFunction, llvm::AnalysisManager<llvm::MachineFunction>::Invalidator>, std::default_delete<llvm::detail::AnalysisResultConcept<llvm::MachineFunction, llvm::AnalysisMana... | DenseMap& operator=(DenseMap &&other) {
this->destroyAll();
deallocate_buffer(Buckets, sizeof(BucketT) * NumBuckets, alignof(BucketT));
init(0);
swap(other);
return *this;
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
callq 0x17b08da
movq (%rbx), %rdi
movl 0x10(%rbx), %esi
shlq $0x5, %rsi
movl $0x8, %edx
callq 0x1cac6c2
xorl %eax, %eax
movl %eax, 0x10(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, (%rbx)
movq (%r14), %rcx
movq %rcx, (%rbx)
movq $0x0, (%r14)
movl 0x8(%r14), %ec... | /llvm/ADT/DenseMap.h |
void llvm::PassInstrumentation::runAfterAnalysis<llvm::MachineFunction, llvm::detail::AnalysisPassConcept<llvm::MachineFunction, llvm::AnalysisManager<llvm::MachineFunction>::Invalidator>>(llvm::detail::AnalysisPassConcept<llvm::MachineFunction, llvm::AnalysisManager<llvm::MachineFunction>::Invalidator> const&, llvm::M... | void runAfterAnalysis(const PassT &Analysis, const IRUnitT &IR) const {
if (Callbacks)
for (auto &C : Callbacks->AfterAnalysisCallbacks)
C(Analysis.name(), llvm::Any(&IR));
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdx, 0x10(%rsp)
movq (%rdi), %rax
testq %rax, %rax
je 0x17af6b8
movl 0x368(%rax), %ebp
testq %rbp, %rbp
je 0x17af6b8
movq %rsi, %r14
movq 0x360(%rax), %r15
shlq $0x5, %rbp
leaq 0x403b629(%rip), %rbx # 0x57eac68
addq $0x10, %rbx
m... | /llvm/IR/PassInstrumentation.h |
llvm::DenseMapBase<llvm::DenseMap<std::pair<llvm::AnalysisKey*, llvm::MachineFunction*>, std::_List_iterator<std::pair<llvm::AnalysisKey*, std::unique_ptr<llvm::detail::AnalysisResultConcept<llvm::MachineFunction, llvm::AnalysisManager<llvm::MachineFunction>::Invalidator>, std::default_delete<llvm::detail::AnalysisResu... | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %r14
movq %r14, %rdx
callq 0x175434e
movl 0x10(%rbx), %ecx
leaq (%rcx,%rcx,2), %rdx
shlq $0x3, %rdx
addq (%rbx), %rdx
testb %al, %al
movq (%r14), %rax
cmoveq %rdx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
| /llvm/ADT/DenseMap.h |
llvm::InnerAnalysisManagerProxy<llvm::AnalysisManager<llvm::MachineFunction>, llvm::Module>::Result::invalidate(llvm::Module&, llvm::PreservedAnalyses const&, llvm::AnalysisManager<llvm::Module>::Invalidator&) | bool MachineFunctionAnalysisManagerModuleProxy::Result::invalidate(
Module &M, const PreservedAnalyses &PA,
ModuleAnalysisManager::Invalidator &Inv) {
// If literally everything is preserved, we're done.
if (PA.areAllPreserved())
return false; // This is still a valid proxy.
// If this proxy isn't ma... | pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movq %rdx, %r14
movq %rdi, %rbx
movq %rdx, %rdi
callq 0xbcfbac
testb %al, %al
jne 0x17afc4a
leaq 0x8(%rsp), %r15
movq %r14, (%r15)
leaq 0x411d5a6(%rip), %rsi # 0x58cd198
movq %rsi, 0x8(%r15)
leaq 0x30(%r14), %rdi
callq 0x8dcdd6
movq 0x38(%r14), %rcx
xorl %edx, %edx
cm... | /CodeGen/MachinePassManager.cpp |
bool llvm::SmallPtrSetImpl<void*>::remove_if<llvm::PreservedAnalyses::intersect(llvm::PreservedAnalyses&&)::'lambda'(void*)>(llvm::PreservedAnalyses::intersect(llvm::PreservedAnalyses&&)::'lambda'(void*)) | bool remove_if(UnaryPredicate P) {
bool Removed = false;
if (isSmall()) {
const void **APtr = SmallArray, **E = SmallArray + NumNonEmpty;
while (APtr != E) {
PtrType Ptr = PtrTraits::getFromVoidPointer(const_cast<void *>(*APtr));
if (P(Ptr)) {
*APtr = *--E;
--NumN... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %r15
movq 0x8(%rdi), %r12
cmpq %r15, %r12
je 0x17b0640
movl 0x10(%r14), %r15d
testq %r15, %r15
je 0x17b0693
shlq $0x3, %r15
xorl %r13d, %r13d
xorl %ebp, %ebp
movq (%r12,%r13), %rsi
cmpq $-0x3, %rsi
... | /llvm/ADT/SmallPtrSet.h |
llvm::detail::DenseMapPair<std::pair<llvm::AnalysisKey*, llvm::MachineFunction*>, std::_List_iterator<std::pair<llvm::AnalysisKey*, std::unique_ptr<llvm::detail::AnalysisResultConcept<llvm::MachineFunction, llvm::AnalysisManager<llvm::MachineFunction>::Invalidator>, std::default_delete<llvm::detail::AnalysisResultConce... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x17b125d
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::SwingSchedulerDAG::schedule() | void SwingSchedulerDAG::schedule() {
AliasAnalysis *AA = &Pass.getAnalysis<AAResultsWrapperPass>().getAAResults();
buildSchedGraph(AA);
addLoopCarriedDependences(AA);
updatePhiDependences();
Topo.InitDAGTopologicalSorting();
changeDependences();
postProcessDAG();
LLVM_DEBUG(dump());
NodeSetType NodeS... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xc78, %rsp # imm = 0xC78
movq %rdi, %r12
movq 0xa40(%rdi), %rax
movq 0x8(%rax), %rax
movq (%rax), %rdx
movq 0x8(%rax), %rax
xorl %edi, %edi
leaq 0x41664f3(%rip), %rcx # 0x5919c78
leaq 0x10(%rdx), %rsi
cmpq %rcx, (%rdx)
jne 0x17b3792
m... | /CodeGen/MachinePipeliner.cpp |
llvm::SmallVectorTemplateBase<llvm::SmallPtrSet<llvm::SUnit*, 4u>, false>::growAndAssign(unsigned long, llvm::SmallPtrSet<llvm::SUnit*, 4u> const&) | void growAndAssign(size_t NumElts, const T &Elt) {
// Grow manually in case Elt is an internal reference.
size_t NewCapacity;
T *NewElts = mallocForGrow(NumElts, NewCapacity);
std::uninitialized_fill_n(NewElts, NumElts, Elt);
this->destroy_range(this->begin(), this->end());
takeAllocationForGrow... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdx, %r13
movq %rsi, %r12
movq %rdi, %r14
leaq 0x10(%rdi), %r15
leaq 0x10(%rsp), %r8
movl $0x40, %ecx
movq %r15, %rsi
movq %r12, %rdx
callq 0x1cba3de
movq %rax, 0x8(%rsp)
testq %r12, %r12
je 0x17c1874
movq 0x8(%rsp), %rbp
movq %r12... | /llvm/ADT/SmallVector.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::SUnit*, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::SUnit*, void>, llvm::detail::DenseSetPair<llvm::SUnit*>>, llvm::SUnit*, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::SUnit*, void>, llvm::detail::DenseSetPair<llvm::SUnit*>>::clear() | unsigned getNumEntries() const {
return NumEntries;
} | movl 0x8(%rdi), %eax
testl %eax, %eax
jne 0x17c38d5
cmpl $0x0, 0xc(%rdi)
je 0x17c39a8
shll $0x2, %eax
movl 0x10(%rdi), %ecx
cmpl %ecx, %eax
setae %al
cmpl $0x41, %ecx
setb %dl
orb %al, %dl
je 0x17c39aa
testq %rcx, %rcx
je 0x17c39a0
movq (%rdi), %rax
movabsq $0x1fffffffffffffff, %rdx # imm = 0x1FFFFFFFFFFFFFFF
addq %rdx... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseMapPair<llvm::SUnit*, std::pair<unsigned int, long>>* llvm::DenseMapBase<llvm::DenseMap<llvm::SUnit*, std::pair<unsigned int, long>, llvm::DenseMapInfo<llvm::SUnit*, void>, llvm::detail::DenseMapPair<llvm::SUnit*, std::pair<unsigned int, long>>>, llvm::SUnit*, std::pair<unsigned int, long>, llvm::Den... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x17c6655
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::SmallVectorTemplateBase<llvm::SmallVector<unsigned long, 16u>, false>::grow(unsigned long) | void SmallVectorTemplateBase<T, TriviallyCopyable>::grow(size_t MinSize) {
size_t NewCapacity;
T *NewElts = mallocForGrow(MinSize, NewCapacity);
moveElementsForGrow(NewElts);
takeAllocationForGrow(NewElts, NewCapacity);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rdx
movq %rdi, %rbx
leaq 0x10(%rdi), %r15
movq %rsp, %r12
movl $0x90, %ecx
movq %r15, %rsi
movq %r12, %r8
callq 0x1cba3de
movq %rax, %r14
movq %rbx, %rdi
movq %rax, %rsi
callq 0x17cab06
movq (%r12), %r12
movq (%rbx), %rdi
cmpq %r15, %rdi
je 0x17caaf2
ca... | /llvm/ADT/SmallVector.h |
llvm::DominatorTreeBase<llvm::MachineBasicBlock, true>::isReachableFromEntry(llvm::MachineBasicBlock const*) const | bool isReachableFromEntry(const NodeT *A) const {
assert(!this->isPostDominator() &&
"This is not implemented for post dominators");
return isReachableFromEntry(getNode(const_cast<NodeT *>(A)));
} | pushq %rbx
movq %rdi, %rbx
addq $0x30, %rdi
callq 0x977204
movl 0x40(%rbx), %ecx
shlq $0x4, %rcx
addq 0x30(%rbx), %rcx
cmpq %rcx, %rax
je 0x17cb0e3
cmpq $0x0, 0x8(%rax)
setne %al
jmp 0x17cb0e5
xorl %eax, %eax
popq %rbx
retq
nop
| /llvm/Support/GenericDomTree.h |
llvm::DominatorTreeBase<llvm::MachineBasicBlock, true>::addNewBlock(llvm::MachineBasicBlock*, llvm::MachineBasicBlock*) | DomTreeNodeBase<NodeT> *addNewBlock(NodeT *BB, NodeT *DomBB) {
assert(getNode(BB) == nullptr && "Block already in dominator tree!");
DomTreeNodeBase<NodeT> *IDomNode = getNode(DomBB);
assert(IDomNode && "Not immediate dominator specified for block!");
DFSInfoValid = false;
return createChild(BB, IDo... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
addq $0x30, %rdi
movq %rdx, %rsi
callq 0x977204
movl 0x40(%r14), %ecx
shlq $0x4, %rcx
addq 0x30(%r14), %rcx
cmpq %rcx, %rax
je 0x17cb68b
movq 0x8(%rax), %rdx
jmp 0x17cb68d
xorl %edx, %edx
movb $0x0, 0x58(%r14)
movq %r14, %rdi
movq %rbx, %rsi
addq $0x8, %r... | /llvm/Support/GenericDomTree.h |
llvm::MachineRegisterInfo::noteCloneVirtualRegister(llvm::Register, llvm::Register) | void noteCloneVirtualRegister(Register NewReg, Register SrcReg) {
for (auto *TheDelegate : TheDelegates)
TheDelegate->MRI_NoteCloneVirtualRegister(NewReg, SrcReg);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %edx, %ebx
movl %esi, %ebp
movq 0x10(%rdi), %r14
xorl %eax, %eax
cmpq 0x8(%rdi), %r14
sete %al
movl 0x18(%rdi,%rax,4), %eax
leaq (%r14,%rax,8), %r15
testq %rax, %rax
je 0x17daaaf
shlq $0x3, %rax
cmpq $-0x2, (%r14)
jb 0x17daaaf
addq $0x8, %r14
addq $-0x8, %rax
... | /llvm/CodeGen/MachineRegisterInfo.h |
llvm::MachineRegisterInfo::verifyUseList(llvm::Register) const | void MachineRegisterInfo::verifyUseList(Register Reg) const {
#ifndef NDEBUG
bool Valid = true;
for (MachineOperand &M : reg_operands(Reg)) {
MachineOperand *MO = &M;
MachineInstr *MI = MO->getParent();
if (!MI) {
errs() << printReg(Reg, getTargetRegisterInfo())
<< " use list MachineO... | retq
nop
| /CodeGen/MachineRegisterInfo.cpp |
llvm::MachineRegisterInfo::EmitLiveInCopies(llvm::MachineBasicBlock*, llvm::TargetRegisterInfo const&, llvm::TargetInstrInfo const&) | void
MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
const TargetRegisterInfo &TRI,
const TargetInstrInfo &TII) {
// Emit the copies into the top of the block.
for (unsigned i = 0, e = LiveIns.size(); i != e; ++i)
if ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq %rcx, 0x10(%rsp)
movq 0x1f0(%rdi), %rbp
subq 0x1e8(%rdi), %rbp
shrq $0x3, %rbp
testl %ebp, %ebp
je 0x17db1c0
movq %rsi, %r13
movq %rdi, %r15
leaq 0x40(%rsp), %r14
xorl %r12d, %r12d
movq %rsi, 0x8(%rsp)
movl %r12d, %ebx
movq 0x1e8(%r... | /CodeGen/MachineRegisterInfo.cpp |
llvm::MachineRegisterInfo::isPhysRegUsed(llvm::MCRegister, bool) const | bool MachineRegisterInfo::isPhysRegUsed(MCRegister PhysReg,
bool SkipRegMaskTest) const {
if (!SkipRegMaskTest && UsedPhysRegMask.test(PhysReg))
return true;
const TargetRegisterInfo *TRI = getTargetRegisterInfo();
for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); A... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movl %esi, %r14d
movq %rdi, %rbx
testl %edx, %edx
jne 0x17db595
movq 0x138(%rbx), %rax
movl %r14d, %ecx
shrl $0x6, %ecx
movq (%rax,%rcx,8), %rcx
movb $0x1, %al
btq %r14, %rcx
jb 0x17db5f2
movq (%rbx), %rax
movq 0x10(%rax), %rdi
movq (%rdi), %rax
callq *0xc8(%rax)
l... | /CodeGen/MachineRegisterInfo.cpp |
llvm::SmallVectorImpl<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>::append(unsigned long, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&) | void append(size_type NumInputs, ValueParamT Elt) {
const T *EltPtr = this->reserveForParamAndGetAddress(Elt, NumInputs);
std::uninitialized_fill_n(this->end(), NumInputs, *EltPtr);
this->set_size(this->size() + NumInputs);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
movq %rdx, %rsi
movq %rbx, %rdx
callq 0x7d5444
testq %rbx, %rbx
je 0x17db908
movq %rax, %r15
movl 0x8(%r14), %r12d
shlq $0x5, %r12
addq (%r14), %r12
movq %rbx, %r13
leaq 0x10(%r12), %rax
movq %rax, (%r12)
movq (%r15), %rsi
movq 0x8(%... | /llvm/ADT/SmallVector.h |
unsigned short* llvm::SmallVectorImpl<unsigned short>::insert<unsigned short const*, void>(unsigned short*, unsigned short const*, unsigned short const*) | iterator insert(iterator I, ItTy From, ItTy To) {
// Convert iterator to elt# to avoid invalidating iterator when we reserve()
size_t InsertElt = I - this->begin();
if (I == this->end()) { // Important special case for empty vector.
append(From, To);
return this->begin()+InsertElt;
}
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdx, %rbx
movq %rdi, %rbp
movq (%rdi), %rax
movq 0x8(%rdi), %rdx
movq %rsi, %r12
subq %rax, %r12
leaq (%rax,%rdx,2), %rax
cmpq %rsi, %rax
je 0x17dbe9d
movq %rcx, 0x8(%rsp)
movq %rcx, %r13
subq %rbx, %r13
movq %r13, 0x10(%rsp)
sarq ... | /llvm/ADT/SmallVector.h |
llvm::ScheduleDAGMI::releasePred(llvm::SUnit*, llvm::SDep*) | void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) {
SUnit *PredSU = PredEdge->getSUnit();
if (PredEdge->isWeak()) {
--PredSU->WeakSuccsLeft;
if (PredEdge->isCluster())
NextClusterPred = PredSU;
return;
}
#ifndef NDEBUG
if (PredSU->NumSuccsLeft == 0) {
dbgs() << "*** Scheduling fa... | movq %rsi, %rax
movq (%rdx), %rcx
movq %rcx, %rsi
andq $-0x8, %rsi
notl %ecx
testb $0x6, %cl
jne 0x17dc760
cmpl $0x4, 0x8(%rdx)
jb 0x17dc760
decl 0xe4(%rsi)
movl (%rdx), %eax
notl %eax
testb $0x6, %al
jne 0x17dc7a4
cmpl $0x5, 0x8(%rdx)
jne 0x17dc7a4
movq %rsi, 0xa80(%rdi)
retq
movl 0xc(%rdx), %ecx
addl 0xec(%rax), %ecx... | /CodeGen/MachineScheduler.cpp |
llvm::ScheduleDAGMI::updateQueues(llvm::SUnit*, bool) | void ScheduleDAGMI::updateQueues(SUnit *SU, bool IsTopNode) {
// Release dependent instructions for scheduling.
if (IsTopNode)
releaseSuccessors(SU);
else
releasePredecessors(SU);
SU->isScheduled = true;
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
testl %edx, %edx
je 0x17dcd18
movl 0x80(%rbx), %r12d
testq %r12, %r12
je 0x17dcd41
movq 0x78(%rbx), %r15
shlq $0x4, %r12
movq %r14, %rdi
movq %rbx, %rsi
movq %r15, %rdx
callq 0x17dc668
addq $0x10, %r15
addq $-0x10, %r12
jne 0x17dccfe... | /CodeGen/MachineScheduler.cpp |
(anonymous namespace)::ILPScheduler::releaseBottomNode(llvm::SUnit*) | void releaseBottomNode(SUnit *SU) override {
ReadyQ.push_back(SU);
std::push_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rsi, %rax
movq %rdi, %rbx
movq %rsi, 0x8(%rsp)
movq 0x30(%rdi), %rsi
cmpq 0x38(%rdi), %rsi
je 0x17e3ca8
movq %rax, (%rsi)
addq $0x8, 0x30(%rbx)
jmp 0x17e3cb6
leaq 0x28(%rbx), %rdi
leaq 0x8(%rsp), %rdx
callq 0xba378a
movq 0x28(%rbx), %r15
movq... | /CodeGen/MachineScheduler.cpp |
llvm::DenseMapBase<llvm::DenseMap<llvm::MachineBasicBlock const*, std::vector<unsigned int, std::allocator<unsigned int>>, llvm::DenseMapInfo<llvm::MachineBasicBlock const*, void>, llvm::detail::DenseMapPair<llvm::MachineBasicBlock const*, std::vector<unsigned int, std::allocator<unsigned int>>>>, llvm::MachineBasicBlo... | unsigned getNumBuckets() const {
return NumBuckets;
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movl 0x10(%rdi), %ebx
testq %rbx, %rbx
je 0x17eaad9
movq (%rdi), %r14
shlq $0x5, %rbx
xorl %r15d, %r15d
movl $0x1000, %r12d # imm = 0x1000
movq (%r14,%r15), %rax
orq %r12, %rax
cmpq $-0x1000, %rax # imm = 0xF000
je 0x17eaad0
movq 0x8(%r14,%r15), %... | /llvm/ADT/DenseMap.h |
(anonymous namespace)::MachineSinking::AllUsesDominatedByBlock(llvm::Register, llvm::MachineBasicBlock*, llvm::MachineBasicBlock*, bool&, bool&) const | bool MachineSinking::AllUsesDominatedByBlock(Register Reg,
MachineBasicBlock *MBB,
MachineBasicBlock *DefMBB,
bool &BreakPHIEdge,
bool &Loca... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r15
movq %r8, %r13
movq %rcx, (%rsp)
movq %rdx, 0x8(%rsp)
movl %esi, %ebx
movq %rdi, %r12
movq 0x50(%rdi), %rdi
callq 0x9321ae
testq %rax, %rax
je 0x17ed69a
movq 0x50(%r12), %rdi
movl %ebx, %esi
callq 0x9321ae
movb $0x1, %bpl
... | /CodeGen/MachineSink.cpp |
llvm::DenseMapBase<llvm::SmallDenseMap<llvm::MachineBasicBlock*, llvm::SmallVector<llvm::MachineBasicBlock*, 4u>, 4u, llvm::DenseMapInfo<llvm::MachineBasicBlock*, void>, llvm::detail::DenseMapPair<llvm::MachineBasicBlock*, llvm::SmallVector<llvm::MachineBasicBlock*, 4u>>>, llvm::MachineBasicBlock*, llvm::SmallVector<ll... | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
subq $0x18, %rsp
movq %rdi, %rbx
leaq 0x8(%rsp), %rax
movq %rsi, (%rax)
leaq 0x10(%rsp), %r14
movq %rax, %rsi
movq %r14, %rdx
callq 0x17ed9e2
testb $0x1, (%rbx)
leaq 0x8(%rbx), %rcx
cmoveq 0x8(%rbx), %rcx
movl $0x4, %edx
cmovel 0x10(%rbx), %edx
imulq $0x38, %rdx, %rdx
addq %rcx, %rdx
testb %al, %a... | /llvm/ADT/DenseMap.h |
hasRegisterDependency(llvm::MachineInstr*, llvm::SmallVectorImpl<unsigned int>&, llvm::SmallVectorImpl<unsigned int>&, llvm::LiveRegUnits&, llvm::LiveRegUnits&) | static bool hasRegisterDependency(MachineInstr *MI,
SmallVectorImpl<unsigned> &UsedOpsInCopy,
SmallVectorImpl<unsigned> &DefedRegsInCopy,
LiveRegUnits &ModifiedRegUnits,
LiveRegUnits &... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %r8, 0x28(%rsp)
movq %rcx, 0x30(%rsp)
movq %rdx, 0x18(%rsp)
movq %rsi, 0x20(%rsp)
movzwl 0x28(%rdi), %ecx
movzbl 0x2a(%rdi), %eax
shll $0x10, %eax
orl %ecx, %eax
testl %eax, %eax
je 0x17f1666
movl %eax, %ecx
movl $0x4, %r14d
xorl %e... | /CodeGen/MachineSink.cpp |
llvm::DenseMap<llvm::MachineBasicBlock*, llvm::Register, llvm::DenseMapInfo<llvm::MachineBasicBlock*, void>, llvm::detail::DenseMapPair<llvm::MachineBasicBlock*, llvm::Register>>::shrink_and_clear() | void shrink_and_clear() {
unsigned OldNumBuckets = NumBuckets;
unsigned OldNumEntries = NumEntries;
this->destroyAll();
// Reduce the number of buckets.
unsigned NewNumBuckets = 0;
if (OldNumEntries)
NewNumBuckets = std::max(64, 1 << (Log2_32_Ceil(OldNumEntries) + 1));
if (NewNumBucke... | pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl 0x8(%rdi), %eax
movl 0x10(%rdi), %esi
testl %eax, %eax
je 0x17f410a
decl %eax
je 0x17f410e
bsrl %eax, %eax
xorl $0x1f, %eax
jmp 0x17f4113
xorl %ebp, %ebp
jmp 0x17f4129
movl $0x20, %eax
movb $0x21, %cl
subb %al, %cl
movl $0x1, %eax
shll %cl, %eax
cmpl $0x41, %eax
mov... | /llvm/ADT/DenseMap.h |
llvm::MachineTraceMetrics::Ensemble::computeHeightResources(llvm::MachineBasicBlock const*) | void MachineTraceMetrics::Ensemble::
computeHeightResources(const MachineBasicBlock *MBB) {
TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
unsigned PROffset = MBB->getNumber() * PRKinds;
// Compute resources for the current block.
TBI->InstrHe... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movslq 0x18(%rsi), %rax
imulq $0x58, %rax, %r13
movq 0x8(%rdi), %r12
movq 0x1b0(%rdi), %rdi
leaq (%r12,%r13), %rcx
movq %rcx, (%rsp)
movl 0x90(%rdi), %r15d
movl %r15d, %ebp
imull %eax, %ebp
callq 0x17f58f2
movl ... | /CodeGen/MachineTraceMetrics.cpp |
void llvm::SmallVectorImpl<llvm::MachineTraceMetrics::TraceBlockInfo>::resizeImpl<false>(unsigned long) | size_t size() const { return Size; } | pushq %r14
pushq %rbx
pushq %rax
movl 0x8(%rdi), %eax
cmpq %rsi, %rax
je 0x17f8da7
movq %rsi, %rbx
movq %rdi, %r14
jbe 0x17f8d2a
movq %r14, %rdi
movq %rbx, %rsi
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x17f8db0
movl 0xc(%r14), %eax
cmpq %rbx, %rax
jae 0x17f8d3e
movq %r14, %rdi
movq %rbx, %rsi
callq 0x17f8e08
movl 0x8(%... | /llvm/ADT/SmallVector.h |
llvm::LiveRegUnit const* llvm::SmallVectorTemplateCommon<llvm::LiveRegUnit, void>::reserveForParamAndGetAddressImpl<llvm::SmallVectorTemplateBase<llvm::LiveRegUnit, true>>(llvm::SmallVectorTemplateBase<llvm::LiveRegUnit, true>*, llvm::LiveRegUnit const&, unsigned long) | static const T *reserveForParamAndGetAddressImpl(U *This, const T &Elt,
size_t N) {
size_t NewSize = This->size() + N;
if (LLVM_LIKELY(NewSize <= This->capacity()))
return &Elt;
bool ReferencesStorage = false;
int64_t Index = -1;
if (!U::Take... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movl 0x8(%rdi), %ecx
movl 0xc(%rdi), %eax
addq %rcx, %rdx
cmpq %rax, %rdx
ja 0x17f9350
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rdi, %r14
movq (%rdi), %rax
leaq (%rcx,%rcx,2), %rcx
cmpq %rbx, %rax
setbe %sil... | /llvm/ADT/SmallVector.h |
std::pair<llvm::DenseMapIterator<llvm::Register, llvm::MachineInstr const*, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::DenseMapPair<llvm::Register, llvm::MachineInstr const*>, false>, bool> llvm::DenseMapBase<llvm::DenseMap<llvm::Register, llvm::MachineInstr const*, llvm::DenseMapInfo<llvm::Register, void>... | std::pair<iterator, bool> try_emplace(KeyT &&Key, Ts &&... Args) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return std::make_pair(makeIterator(TheBucket,
shouldReverseIterate<KeyT>()
? getBuckets()
... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rcx, %r15
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x8(%rsp), %r13
movq %rsi, %rdi
movq %rdx, %rsi
movq %r13, %rdx
callq 0x180ad50
movl %eax, %ecx
movq (%r13), %rax
testb %cl, %cl
je 0x180ad0a
xorl %ecx, %ecx
jmp 0x180ad2a
movq %r... | /llvm/ADT/DenseMap.h |
llvm::ModuloScheduleExpander::getPrevMapVal(unsigned int, unsigned int, unsigned int, unsigned int, llvm::DenseMap<unsigned int, unsigned int, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, unsigned int>>*, llvm::MachineBasicBlock*) | unsigned ModuloScheduleExpander::getPrevMapVal(
unsigned StageNum, unsigned PhiStage, unsigned LoopVal, unsigned LoopStage,
ValueMapTy *VRMap, MachineBasicBlock *BB) {
unsigned PrevVal = 0;
if (StageNum > PhiStage) {
MachineInstr *LoopInst = MRI.getVRegDef(LoopVal);
if (PhiStage == LoopStage && VRMa... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movl %ecx, 0x10(%rsp)
xorl %r15d, %r15d
cmpl %edx, %esi
jbe 0x1810d22
movq %r9, %rbx
movl %r8d, %ebp
movl %edx, %r14d
movl %esi, %r12d
movq %rdi, 0x18(%rsp)
movq 0x18(%rdi), %rdi
movl %ecx, %esi
callq 0x17dae6c
movq %rax, %r13
movl %ebp,... | /CodeGen/ModuloSchedule.cpp |
llvm::DenseMapBase<llvm::DenseMap<llvm::MachineBasicBlock const*, llvm::BlockFrequency, llvm::DenseMapInfo<llvm::MachineBasicBlock const*, void>, llvm::detail::DenseMapPair<llvm::MachineBasicBlock const*, llvm::BlockFrequency>>, llvm::MachineBasicBlock const*, llvm::BlockFrequency, llvm::DenseMapInfo<llvm::MachineBasic... | value_type& FindAndConstruct(const KeyT &Key) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return *TheBucket;
return *InsertIntoBucket(TheBucket, Key);
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq %r15, %rdx
callq 0x1819946
movl %eax, %ecx
movq (%r15), %rax
testb %cl, %cl
jne 0x1819a1c
movq %r14, %rdi
movq %rbx, %rsi
movq %rbx, %rdx
movq %rax, %rcx
callq 0x1819a26
movq (%rbx), %rcx
movq %rcx, (%rax)
movq $... | /llvm/ADT/DenseMap.h |
void llvm::yaml::IO::processKeyWithDefault<llvm::yaml::MachineFrameInfo, llvm::yaml::EmptyContext>(char const*, llvm::yaml::MachineFrameInfo&, llvm::yaml::MachineFrameInfo const&, bool, llvm::yaml::EmptyContext&) | void processKeyWithDefault(const char *Key, T &Val, const T &DefaultValue,
bool Required, Context &Ctx) {
void *SaveInfo;
bool UseDefault;
const bool sameAsDefault = outputting() && Val == DefaultValue;
if ( this->preflightKey(Key, Required, sameAsDefault, UseDefault,
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x10, %rsp
movl %r8d, %ebp
movq %rcx, %r14
movq %rdx, %rbx
movq %rsi, %r12
movq %rdi, %r15
movq (%rdi), %rax
callq *0x10(%rax)
testb %al, %al
je 0x1820f06
movq %rbx, %rdi
movq %r14, %rsi
callq 0x182100e
jmp 0x1820f08
xorl %eax, %eax
movq (%r15), %r10
movzbl %... | /llvm/Support/YAMLTraits.h |
llvm::yaml::MachineFrameInfo::operator==(llvm::yaml::MachineFrameInfo const&) const | bool operator==(const MachineFrameInfo &Other) const {
return IsFrameAddressTaken == Other.IsFrameAddressTaken &&
IsReturnAddressTaken == Other.IsReturnAddressTaken &&
HasStackMap == Other.HasStackMap &&
HasPatchPoint == Other.HasPatchPoint &&
StackSize == Other.StackSize... | movb (%rdi), %al
cmpb (%rsi), %al
jne 0x1821161
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movb 0x1(%rdi), %al
cmpb 0x1(%rsi), %al
jne 0x1821164
movb 0x2(%r14), %al
cmpb 0x2(%rbx), %al
jne 0x1821164
movb 0x3(%r14), %al
cmpb 0x3(%rbx), %al
jne 0x1821164
movq 0x8(%r14), %rax
cmpq 0x8(%rbx), %rax
jne... | /llvm/CodeGen/MIRYamlMapping.h |
llvm::DenseMapBase<llvm::DenseMap<std::pair<unsigned int, llvm::Register>, unsigned int, llvm::DenseMapInfo<std::pair<unsigned int, llvm::Register>, void>, llvm::detail::DenseMapPair<std::pair<unsigned int, llvm::Register>, unsigned int>>, std::pair<unsigned int, llvm::Register>, unsigned int, llvm::DenseMapInfo<std::p... | unsigned getNumEntries() const {
return NumEntries;
} | movl 0x8(%rdi), %ecx
testl %ecx, %ecx
jne 0x183279d
cmpl $0x0, 0xc(%rdi)
je 0x18327de
shll $0x2, %ecx
movl 0x10(%rdi), %eax
cmpl %eax, %ecx
setae %cl
cmpl $0x41, %eax
setb %dl
orb %cl, %dl
je 0x1833b06
testq %rax, %rax
je 0x18327d6
movq (%rdi), %rcx
leaq (%rax,%rax,2), %rax
leaq (%rcx,%rax,4), %rax
movq $-0x1, (%rcx)
a... | /llvm/ADT/DenseMap.h |
llvm::DIExpression::fragmentsOverlap(llvm::DIExpression const*) const | bool fragmentsOverlap(const DIExpression *Other) const {
if (!isFragment() || !Other->isFragment())
return true;
return fragmentCmp(Other) == 0;
} | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x18, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x10(%rdi), %rsi
movq 0x18(%rdi), %rdx
movq %rsp, %r15
movq %r15, %rdi
callq 0x19fa03e
movb $0x1, %bpl
cmpb $0x1, 0x10(%r15)
jne 0x183aaee
movq 0x10(%rbx), %rsi
movq 0x18(%rbx), %rdx
movq %rsp, %r15
movq %r15, %rdi
callq 0... | /llvm/IR/DebugInfoMetadata.h |
(anonymous namespace)::PseudoProbeInserter::runOnMachineFunction(llvm::MachineFunction&) | bool runOnMachineFunction(MachineFunction &MF) override {
if (!ShouldRun)
return false;
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
bool Changed = false;
for (MachineBasicBlock &MBB : MF) {
MachineInstr *FirstInstr = nullptr;
for (MachineInstr &MI : MBB) {
if... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
cmpb $0x1, 0x38(%rdi)
jne 0x183bc29
movq %rsi, %rbx
movq 0x10(%rsi), %rdi
movq (%rdi), %rax
callq *0x80(%rax)
movq %rax, 0x48(%rsp)
movq 0x148(%rbx), %r14
addq $0x140, %rbx # imm = 0x140
cmpq %rbx, %r14
je 0x183bc29
xorl %ebp,... | /CodeGen/PseudoProbeInserter.cpp |
llvm::ValueMap<llvm::GlobalValue const*, std::unique_ptr<llvm::GlobalValuePseudoSourceValue const, std::default_delete<llvm::GlobalValuePseudoSourceValue const>>, llvm::ValueMapConfig<llvm::GlobalValue const*, llvm::sys::SmartMutex<false>>>::operator[](llvm::GlobalValue const* const&) | ValueT &operator[](const KeyT &Key) {
return Map[Wrap(Key)];
} | pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rdi, %rbx
movq (%rsi), %rsi
movq %rsp, %r14
movq %r14, %rdi
callq 0xaf0998
leaq 0x3fae087(%rip), %rax # 0x57ea128
addq $0x10, %rax
movq %rax, (%r14)
movq %rbx, 0x20(%r14)
movq %rbx, %rdi
movq %r14, %rsi
callq 0x183c300
movq %rax, %rbx
movq 0x18(%r14), %rax
cmpq $-0x2000, %... | /llvm/IR/ValueMap.h |
llvm::rdf::operator<<(llvm::raw_ostream&, llvm::rdf::Print<llvm::rdf::NodeAddr<llvm::rdf::StmtNode*>> const&) | raw_ostream &operator<<(raw_ostream &OS, const Print<Stmt> &P) {
const MachineInstr &MI = *P.Obj.Addr->getCode();
unsigned Opc = MI.getOpcode();
OS << Print(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc);
// Print the target for calls and branches (for readability).
if (MI.isCall() || MI.isBranch()) {
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq (%rsi), %rax
movq (%rax), %rcx
movq 0x8(%rcx), %r12
movzwl 0x44(%r12), %ebp
addq $0x8, %rax
movq 0x8(%rsi), %rcx
leaq 0x8(%rsp), %r15
movq %rax, (%r15)
movq %rcx, 0x8(%r15)
movq %r15, %rsi
callq 0x183... | /CodeGen/RDFGraph.cpp |
llvm::BumpPtrAllocatorImpl<llvm::MallocAllocator, 65536ul, 65536ul, 128ul>::Reset() | void Reset() {
// Deallocate all but the first slab, and deallocate all custom-sized slabs.
DeallocateCustomSizedSlabs();
CustomSizedSlabs.clear();
if (Slabs.empty())
return;
// Reset the state.
BytesAllocated = 0;
CurPtr = (char *)Slabs.front();
End = CurPtr + SlabSize;
__a... | pushq %rbx
movq %rdi, %rbx
callq 0xf26298
movl $0x0, 0x48(%rbx)
movl 0x18(%rbx), %eax
testq %rax, %rax
je 0x183dca8
movq $0x0, 0x50(%rbx)
movq 0x10(%rbx), %rsi
movq (%rsi), %rcx
movq %rcx, (%rbx)
addq $0x10000, %rcx # imm = 0x10000
movq %rcx, 0x8(%rbx)
leaq (%rsi,%rax,8), %rdx
addq $0x8, %rsi
movq %rbx, %rdi
c... | /llvm/Support/Allocator.h |
llvm::rdf::DataFlowGraph::buildStmt(llvm::rdf::NodeAddr<llvm::rdf::BlockNode*>, llvm::MachineInstr&) | void DataFlowGraph::buildStmt(Block BA, MachineInstr &In) {
Stmt SA = newStmt(BA, &In);
auto isCall = [](const MachineInstr &In) -> bool {
if (In.isCall())
return true;
// Is tail call?
if (In.isBranch()) {
for (const MachineOperand &Op : In.operands())
if (Op.isGlobal() || Op.isSym... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x128, %rsp # imm = 0x128
movq %rcx, %r12
movq %rsi, %r15
movq %rdi, %rbx
addq $0x118, %rdi # imm = 0x118
movq %rdi, 0x38(%rsp)
callq 0x183db70
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
movups %xmm0, 0x10(%rax)
movw $0x11, (%rax... | /CodeGen/RDFGraph.cpp |
llvm::rdf::DataFlowGraph::makeRegRef(unsigned int, unsigned int) const | RegisterRef DataFlowGraph::makeRegRef(unsigned Reg, unsigned Sub) const {
assert(RegisterRef::isRegId(Reg) || RegisterRef::isMaskId(Reg));
assert(Reg != 0);
if (Sub != 0)
Reg = TRI.getSubReg(Reg, Sub);
return RegisterRef(Reg);
} | movl %esi, %eax
testl %edx, %edx
je 0x18413ba
pushq %rax
movq 0x18(%rdi), %rdi
addq $0x8, %rdi
movl %eax, %esi
callq 0x1b01530
addq $0x8, %rsp
leal -0x1(%rax), %ecx
xorl %edx, %edx
cmpl $0x3fffffff, %ecx # imm = 0x3FFFFFFF
sbbq %rdx, %rdx
retq
nop
| /CodeGen/RDFGraph.cpp |
llvm::DenseMap<unsigned int, llvm::MachineBasicBlock*, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::MachineBasicBlock*>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
llvm::rdf::RegisterAggr::hasAliasOf(llvm::rdf::RegisterRef) const | bool RegisterAggr::hasAliasOf(RegisterRef RR) const {
if (RR.isMask())
return Units.anyCommon(PRI.getMaskUnits(RR.Reg));
for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {
std::pair<uint32_t, LaneBitmask> P = *U;
if ((P.second & RR.Mask).any())
if (Units.test(P.first))
... | movq 0x48(%rdi), %rax
cmpl $0x40000000, %esi # imm = 0x40000000
jl 0x185027f
movl %esi, %ecx
leaq (%rcx,%rcx,8), %rdx
shlq $0x3, %rdx
addq 0x50(%rax), %rdx
movl 0x8(%rdi), %esi
movabsq $-0x11fffffff8, %rax # imm = 0xFFFFFFEE00000008
movl (%rax,%rdx), %eax
cmpl %esi, %eax
cmovbl %eax, %esi
testl %esi, %esi
setn... | /CodeGen/RDFRegisters.cpp |
llvm::TinyPtrVector<llvm::ReachingDef>::push_back(llvm::ReachingDef) | void push_back(EltTy NewVal) {
// If we have nothing, add something.
if (Val.isNull()) {
Val = NewVal;
assert(!Val.isNull() && "Can't add a null value");
return;
}
// If we have a single value, convert to a vector.
if (isa<EltTy>(Val)) {
EltTy V = cast<EltTy>(Val);
Val... | pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %r15
cmpq $0x1, %r15
ja 0x1851a37
andq $-0x2, %rbx
movq %rbx, (%r14)
popq %rbx
popq %r14
popq %r15
retq
testb $0x1, %r15b
jne 0x1851a75
movl $0x30, %edi
callq 0x751940
leaq 0x10(%rax), %rcx
movq %rcx, (%rax)
movabsq $0x400000000, %rcx # ... | /llvm/ADT/TinyPtrVector.h |
(anonymous namespace)::RABasic::LRE_CanEraseVirtReg(llvm::Register) | bool RABasic::LRE_CanEraseVirtReg(Register VirtReg) {
LiveInterval &LI = LIS->getInterval(VirtReg);
if (VRM->hasPhys(VirtReg)) {
Matrix->unassign(LI);
aboutToRemoveInterval(LI);
return true;
}
// Unassigned virtreg is probably in the priority queue.
// RegAllocBase will erase it after dequeueing.
... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %r15d
movq %rdi, %rbx
movq 0x58(%rdi), %rdi
callq 0xa5d4bc
movq %rax, %r14
movq 0x50(%rbx), %rax
andl $0x7fffffff, %r15d # imm = 0x7FFFFFFF
movq 0x58(%rax), %rax
movl (%rax,%r15,4), %ebp
testl %ebp, %ebp
je 0x18554b1
leaq 0x38(%rbx), %r15
movq 0x60(... | /CodeGen/RegAllocBasic.cpp |
llvm::SetVector<llvm::LiveInterval const*, llvm::SmallVector<llvm::LiveInterval const*, 4u>, llvm::DenseSet<llvm::LiveInterval const*, llvm::DenseMapInfo<llvm::LiveInterval const*, void>>, 4u>::insert(llvm::LiveInterval const* const&) | bool insert(const value_type &X) {
if constexpr (canBeSmall())
if (isSmall()) {
if (!llvm::is_contained(vector_, X)) {
vector_.push_back(X);
if (vector_.size() > N)
makeBig();
return true;
}
return false;
}
bool result = set_.insert(... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rsi, %r14
movq %rdi, %rbx
cmpl $0x0, 0x8(%rdi)
je 0x1862aa4
leaq 0x10(%rsp), %r15
leaq 0xf(%rsp), %rcx
movq %r15, %rdi
movq %rbx, %rsi
movq %r14, %rdx
callq 0x18675ca
movb 0x10(%r15), %bpl
cmpb $0x1, %bpl
jne 0x1862ae8
addq $0x18, %rbx
movq (%r14), %rsi... | /llvm/ADT/SetVector.h |
llvm::initializeRegisterCoalescerPass(llvm::PassRegistry&) | static bool isMoveInstr(const TargetRegisterInfo &tri,
const MachineInstr *MI, Register &Src,
Register &Dst, unsigned &SrcSub,
unsigned &DstSub) {
if (MI->isCopy()) {
Dst = MI->getOperand(0).getRe... | pushq %rax
movq %rsp, %rdx
movq %rdi, (%rdx)
leaq 0x4060753(%rip), %rdi # 0x58d1bdc
leaq 0x7(%rip), %rsi # 0x1871497
callq 0x90ae4f
popq %rax
retq
| /CodeGen/RegisterCoalescer.cpp |
llvm::detail::DenseMapPair<llvm::Register, llvm::SmallVector<unsigned int, 2u>>* llvm::DenseMapBase<llvm::DenseMap<llvm::Register, llvm::SmallVector<unsigned int, 2u>, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::DenseMapPair<llvm::Register, llvm::SmallVector<unsigned int, 2u>>>, llvm::Register, llvm::SmallV... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x18740b9
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
isTerminalReg(llvm::Register, llvm::MachineInstr const&, llvm::MachineRegisterInfo const*) | static bool isTerminalReg(Register DstReg, const MachineInstr &Copy,
const MachineRegisterInfo *MRI) {
assert(Copy.isCopyLike());
// Check if the destination of this copy as any other affinity.
for (const MachineInstr &MI : MRI->reg_nodbg_instructions(DstReg))
if (&MI != &Copy && MI.... | pushq %rbx
movq %rsi, %rbx
movl %edi, %esi
movq %rdx, %rdi
callq 0x107c294
testq %rax, %rax
sete %cl
je 0x1876555
movq 0x8(%rax), %rdx
cmpq %rbx, %rdx
je 0x187653f
movzwl 0x44(%rdx), %esi
cmpl $0xb, %esi
je 0x1876555
cmpl $0x13, %esi
je 0x1876555
movq 0x18(%rax), %rax
testq %rax, %rax
je 0x1876520
cmpl $0x0, (%rax)
js ... | /CodeGen/RegisterCoalescer.cpp |
llvm::DenseMapBase<llvm::DenseMap<llvm::Register, llvm::SmallVector<unsigned int, 2u>, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::DenseMapPair<llvm::Register, llvm::SmallVector<unsigned int, 2u>>>, llvm::Register, llvm::SmallVector<unsigned int, 2u>, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::... | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %r14
movq %r14, %rdx
callq 0x1873fea
movl 0x10(%rbx), %edx
shlq $0x5, %rdx
addq (%rbx), %rdx
testb %al, %al
movq (%r14), %rax
cmoveq %rdx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
| /llvm/ADT/DenseMap.h |
llvm::RegPressureTracker::recede(llvm::SmallVectorImpl<llvm::RegisterMaskPair>*) | void RegPressureTracker::recede(SmallVectorImpl<RegisterMaskPair> *LiveUses) {
recedeSkipDebugValues();
if (CurrPos->isDebugInstr() || CurrPos->isPseudoProbe()) {
// It's possible to only have debug_value and pseudo probe instructions and
// hit the start of the block.
assert(CurrPos == MBB->begin());
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x1b8, %rsp # imm = 0x1B8
movq %rsi, %rbx
movq %rdi, %r14
callq 0x187d3ce
movq 0x40(%r14), %r15
movzwl 0x44(%r15), %eax
leal -0xd(%rax), %ecx
cmpl $0x5, %ecx
jae 0x187d567
addq $0x1b8, %rsp # imm = 0x1B8
popq %rbx
popq %r12
po... | /CodeGen/RegisterPressure.cpp |
llvm::safestack::StackLayout::StackRegion* llvm::SmallVectorImpl<llvm::safestack::StackLayout::StackRegion>::insert_one_impl<llvm::safestack::StackLayout::StackRegion const&>(llvm::safestack::StackLayout::StackRegion*, llvm::safestack::StackLayout::StackRegion const&) | iterator insert_one_impl(iterator I, ArgType &&Elt) {
// Callers ensure that ArgType is derived from T.
static_assert(
std::is_same<std::remove_const_t<std::remove_reference_t<ArgType>>,
T>::value,
"ArgType must be derived from T!");
if (I == this->end()) { // Importan... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rax
movq %rdi, %r14
movq (%rdi), %rcx
movl 0x8(%rdi), %edx
leaq (%rdx,%rdx,4), %rdx
shlq $0x4, %rdx
addq %rcx, %rdx
cmpq %rsi, %rdx
je 0x1889bb7
movq %rsi, %rbx
subq %rcx, %rbx
movl $0x1, %edx
movq %r14, %rdi
movq %rax, %rsi
callq 0x1889c5c
movq %rax, %... | /llvm/ADT/SmallVector.h |
llvm::idf_iterator<llvm::BasicBlock*, llvm::df_iterator_default_set<llvm::GraphTraits<llvm::BasicBlock*>::NodeRef, 8u>, false> llvm::idf_begin<llvm::BasicBlock*>(llvm::BasicBlock* const&) | idf_iterator<T> idf_begin(const T& G) {
return idf_iterator<T>::begin(Inverse<T>(G));
} | pushq %r14
pushq %rbx
subq $0x88, %rsp
movq %rdi, %rbx
leaq 0x8(%rsp), %rax
movq %rsi, (%rax)
leaq 0x10(%rsp), %r14
movq %r14, %rdi
movq %rax, %rsi
callq 0x189f100
leaq 0x20(%rbx), %rsi
movq %rbx, %rdi
movq %r14, %rdx
callq 0x1cb9ff4
leaq 0x60(%rbx), %rdi
leaq 0x70(%rsp), %r14
movq %r14, %rsi
callq 0x189f32c
movq (%r14... | /llvm/ADT/DepthFirstIterator.h |
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