name string | code string | asm string | file string |
|---|---|---|---|
llvm::Value** llvm::SmallVectorImpl<llvm::Value*>::insert<llvm::Use*, void>(llvm::Value**, llvm::Use*, llvm::Use*) | iterator insert(iterator I, ItTy From, ItTy To) {
// Convert iterator to elt# to avoid invalidating iterator when we reserve()
size_t InsertElt = I - this->begin();
if (I == this->end()) { // Important special case for empty vector.
append(From, To);
return this->begin()+InsertElt;
}
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rdi, %r13
movq (%rdi), %rax
movq %rsi, %r15
subq %rax, %r15
movl 0x8(%rdi), %edx
leaq (%rax,%rdx,8), %rax
cmpq %rsi, %rax
je 0x14b5b27
movq %rcx, (%rsp)
movq %rcx, %rbp
subq %rbx, %rbp
sarq $0x5, %rbp
addq %rbp, %rdx
movl... | /llvm/ADT/SmallVector.h |
llvm::X86Subtarget::initSubtargetFeatures(llvm::StringRef, llvm::StringRef, llvm::StringRef) | void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
StringRef FS) {
if (CPU.empty())
CPU = "generic";
if (TuneCPU.empty())
TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
std::string FullFS = X86_MC::ParseX86Trip... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xc8, %rsp
movq %rdx, %rbp
movq %rdi, %rbx
testq %rdx, %rdx
leaq 0x2f0a44e(%rip), %r14 # 0x43cb9bb
cmovneq %rsi, %r14
leaq 0x100(%rsp), %r13
movl $0x7, %r15d
cmovneq %rdx, %r15
testq %r8, %r8
leaq 0x2a37051(%rip), %rax # 0x3ef85de
cmovneq %rcx,... | /Target/X86/X86Subtarget.cpp |
void llvm::SmallVectorImpl<llvm::WeakTrackingVH>::append<llvm::Value::user_iterator_impl<llvm::User>, void>(llvm::Value::user_iterator_impl<llvm::User>, llvm::Value::user_iterator_impl<llvm::User>) | void append(ItTy in_start, ItTy in_end) {
this->assertSafeToAddRange(in_start, in_end);
size_type NumInputs = std::distance(in_start, in_end);
this->reserve(this->size() + NumInputs);
this->uninitialized_copy(in_start, in_end, this->end());
this->set_size(this->size() + NumInputs);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
xorl %r12d, %r12d
cmpq %rdx, %rsi
je 0x1512116
movq %r15, %rax
movq 0x8(%rax), %rax
incq %r12
cmpq %r14, %rax
jne 0x151210a
movl 0x8(%rbx), %esi
movl 0xc(%rbx), %eax
addq %r12, %rsi
cmpq %rax, %rsi
jbe 0x151212c
movq ... | /llvm/ADT/SmallVector.h |
void llvm::AArch64InstPrinter::printTypedVectorList<2u, (char)100>(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
if (LaneKind == 0) {
printVectorList(MI, OpNum, STI, O, "");
return;
}
std::string Suffi... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %r8, %rbx
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, %r15
leaq 0x48(%rsp), %rax
movq %rax, -0x10(%rax)
leaq 0x257ca0d(%rip), %rsi # 0x3aa2e1f
leaq 0x257ca07(%rip), %rdx # 0x3aa2e20
leaq 0x38(%rsp), %rdi
callq 0x7c37bc
leaq 0x25(... | /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
void llvm::AArch64InstPrinter::printTypedVectorList<4u, (char)115>(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
if (LaneKind == 0) {
printVectorList(MI, OpNum, STI, O, "");
return;
}
std::string Suffi... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %r8, %rbx
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, %r15
leaq 0x48(%rsp), %rax
movq %rax, -0x10(%rax)
leaq 0x257c60b(%rip), %rsi # 0x3aa2e1f
leaq 0x257c605(%rip), %rdx # 0x3aa2e20
leaq 0x38(%rsp), %rdi
callq 0x7c37bc
leaq 0x25(... | /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
void llvm::AArch64InstPrinter::printPredicateAsCounter<64>(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printPredicateAsCounter(const MCInst *MI,
unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
unsigned Reg = MI->getOperand(OpNum).getRe... | pushq %r14
pushq %rbx
pushq %rax
movq %r8, %rbx
movl %edx, %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movl 0x8(%rcx,%rax), %r14d
addl $-0x7d, %r14d
leaq 0x3b04c36(%rip), %rsi # 0x502beb5
movl $0x2, %edx
movq %r8, %rdi
callq 0x7c4562
movq %rax, %rdi
movq %r14, %rsi
callq 0x1ce9e70
leaq 0x1657362(%rip), %rsi # 0x2b7e... | /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
llvm::AArch64InstPrinter::printFPImmOperand(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
const MCOperand &MO = MI->getOperand(OpNum);
float FPImm = MO.isDFPImm() ? bit_cast<double>(MO.getDFPImm())... | pushq %rbx
subq $0x30, %rsp
movq %rdi, %rax
movl %edx, %edx
movq 0x10(%rsi), %rsi
shlq $0x4, %rdx
leaq (%rsi,%rdx), %rcx
cmpb $0x4, (%rsi,%rdx)
jne 0x1527765
cvtsd2ss 0x8(%rcx), %xmm0
movss %xmm0, 0x4(%rsp)
jmp 0x1527792
movl 0x8(%rcx), %ecx
movl %ecx, %edx
shll $0x19, %edx
sarl $0x1f, %edx
movl %ecx, %esi
andl $-0x40,... | /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
void llvm::AArch64InstPrinter::printImmRangeScale<4, 3>(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printImmRangeScale(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
unsigned FirstImm = Scale * MI->getOperand(OpNum).getImm();
O << formatImm(FirstImm);
O << ":" << form... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r8, %r14
movq %rdi, %rbx
movl %edx, %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movl 0x8(%rcx,%rax), %r12d
leal (,%r12,4), %edx
movq %rsp, %r15
movq %r15, %rdi
movq %rbx, %rsi
callq 0x153356a
movq %r14, %rdi
movq %r15, %rsi
callq 0x1ce9f7a
leaq 0x39de46e... | /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
void llvm::AArch64InstPrinter::printPredicateAsCounter<0>(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printPredicateAsCounter(const MCInst *MI,
unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
unsigned Reg = MI->getOperand(OpNum).getRe... | pushq %rbx
movq %r8, %rdi
movl %edx, %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movl 0x8(%rcx,%rax), %ebx
addl $-0x7d, %ebx
leaq 0x3b045bb(%rip), %rsi # 0x502beb5
movl $0x2, %edx
callq 0x7c4562
movq %rax, %rdi
movq %rbx, %rsi
popq %rbx
jmp 0x1ce9e70
| /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
void llvm::AArch64InstPrinter::printTypedVectorList<0u, (char)0>(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum,
const MCSubtargetInfo &STI,
raw_ostream &O) {
if (LaneKind == 0) {
printVectorList(MI, OpNum, STI, O, "");
return;
}
std::string Suffi... | subq $0x28, %rsp
leaq 0x29eb259(%rip), %rax # 0x3f13438
movq %rax, 0x18(%rsp)
movq $0x0, 0x20(%rsp)
movups 0x18(%rsp), %xmm0
movups %xmm0, (%rsp)
callq 0x1533042
addq $0x28, %rsp
retq
| /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
llvm::AArch64InstPrinter::printUImm12Offset(llvm::MCInst const*, unsigned int, unsigned int, llvm::raw_ostream&) | void AArch64InstPrinter::printUImm12Offset(const MCInst *MI, unsigned OpNum,
unsigned Scale, raw_ostream &O) {
const MCOperand MO = MI->getOperand(OpNum);
if (MO.isImm()) {
markup(O, Markup::Immediate) << '#' << formatImm(MO.getImm() * Scale);
} else {
assert(MO.... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x28, %rsp
movl %ecx, %ebp
movq %rdi, %rbx
movl %edx, %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movq 0x8(%rcx,%rax), %r14
cmpb $0x2, (%rcx,%rax)
jne 0x1533783
movq %rsp, %r15
movq %r15, %rdi
movq %rbx, %rsi
movq %r8, %rdx
xorl %ecx, %ecx
callq 0x1af3616
movq (%r15), %r... | /Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp |
llvm::AArch64MCExpr::fixELFSymbolsInTLSFixups(llvm::MCAssembler&) const | void AArch64MCExpr::fixELFSymbolsInTLSFixups(MCAssembler &Asm) const {
switch (getSymbolLoc(Kind)) {
default:
return;
case VK_DTPREL:
case VK_GOTTPREL:
case VK_TPREL:
case VK_TLSDESC:
break;
}
fixELFSymbolsInTLSFixupsImpl(getSubExpr(), Asm);
} | movl 0x20(%rdi), %eax
andl $0xf, %eax
addl $-0x5, %eax
cmpl $0x3, %eax
ja 0x1534ae1
movq 0x18(%rdi), %rdi
jmp 0x1534ae2
retq
| /Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp |
fixELFSymbolsInTLSFixupsImpl(llvm::MCExpr const*, llvm::MCAssembler&) | static void fixELFSymbolsInTLSFixupsImpl(const MCExpr *Expr, MCAssembler &Asm) {
switch (Expr->getKind()) {
case MCExpr::Target:
llvm_unreachable("Can't handle nested target expression");
break;
case MCExpr::Constant:
break;
case MCExpr::Binary: {
const MCBinaryExpr *BE = cast<MCBinaryExpr>(Exp... | pushq %rbx
movq %rdi, %rbx
movzbl (%rbx), %eax
testl %eax, %eax
je 0x1534af8
cmpl $0x3, %eax
jne 0x1534b07
movq 0x10(%rbx), %rbx
jmp 0x1534ae6
movq 0x10(%rbx), %rdi
callq 0x1534ae2
movq 0x18(%rbx), %rbx
jmp 0x1534ae6
cmpl $0x2, %eax
jne 0x1534b1b
movq 0x10(%rbx), %rdi
movl $0x6, %esi
popq %rbx
jmp 0x1b09f96
popq %rbx
r... | /Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp |
llvm::DenseMap<llvm::MCRegister, int, llvm::DenseMapInfo<llvm::MCRegister, void>, llvm::detail::DenseMapPair<llvm::MCRegister, int>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
void llvm::cl::apply<llvm::cl::opt<AsmWriterVariantTy, false, llvm::cl::parser<AsmWriterVariantTy>>, char [20], llvm::cl::initializer<AsmWriterVariantTy>, llvm::cl::desc, llvm::cl::ValuesClass>(llvm::cl::opt<AsmWriterVariantTy, false, llvm::cl::parser<AsmWriterVariantTy>>*, char const (&) [20], llvm::cl::initializer<As... | void apply(Opt *O, const Mod &M, const Mods &... Ms) {
applicator<Mod>::opt(M, *O);
apply(O, Ms...);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r13
movq %rsi, %rdi
callq 0x7512e0
movq %r13, %rdi
movq %r12, %rsi
movq %rax, %rdx
callq 0x1c90c20
movq (%r15), %rax
movl (%rax), %ecx
movl %ecx, 0x80(%r13)
movb $0x1, 0x94(%r13)
movl (%rax)... | /llvm/Support/CommandLine.h |
void llvm::cl::ValuesClass::apply<llvm::cl::opt<AsmWriterVariantTy, false, llvm::cl::parser<AsmWriterVariantTy>>>(llvm::cl::opt<AsmWriterVariantTy, false, llvm::cl::parser<AsmWriterVariantTy>>&) const | size_t size() const { return Size; } | movl 0x8(%rdi), %eax
testq %rax, %rax
je 0x1542371
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq (%rdi), %r14
leaq (%rax,%rax,4), %rax
leaq (%r14,%rax,8), %r15
addq $0x98, %rbx
movq (%r14), %rsi
movq 0x8(%r14), %rdx
leaq 0x10(%r14), %rcx
movq 0x18(%r14), %r8
movq 0x20(%r14), %r9
movq %rbx, %rdi
callq 0x1542372
... | /llvm/ADT/SmallVector.h |
unsigned int (anonymous namespace)::AArch64MCCodeEmitter::getLdStUImm12OpValue<134u>(llvm::MCInst const&, unsigned int, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | iterator begin() { return (iterator)this->BeginX; } | movq 0x10(%rdi), %rax
cmpb $0x2, 0x20(%rax)
jne 0x154ec50
movl 0x28(%rax), %eax
retq
pushq %rbx
subq $0x20, %rsp
movq %rsi, %rbx
movq 0x28(%rax), %rax
movq 0x8(%rdi), %rcx
xorps %xmm0, %xmm0
movq %rsp, %rsi
movaps %xmm0, (%rsi)
movq %rax, (%rsi)
movabsq $0x8600000000, %rax # imm = 0x8600000000
movq %rax, 0x8(%rsi)
... | /llvm/ADT/SmallVector.h |
(anonymous namespace)::AArch64MCCodeEmitter::getTestBranchTargetOpValue(llvm::MCInst const&, unsigned int, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | const_iterator begin() const { return (const_iterator)this->BeginX; } | movq 0x10(%rdi), %rax
cmpb $0x2, 0x20(%rax)
jne 0x154ecbe
movl 0x28(%rax), %eax
retq
pushq %rbx
subq $0x20, %rsp
movq %rsi, %rbx
movq 0x28(%rax), %rax
movq 0x8(%rdi), %rcx
xorps %xmm0, %xmm0
movq %rsp, %rsi
movaps %xmm0, (%rsi)
movq %rax, (%rsi)
movabsq $0x8a00000000, %rax # imm = 0x8A00000000
movq %rax, 0x8(%rsi)
... | /llvm/ADT/SmallVector.h |
llvm::detail::DenseMapPair<llvm::MCSection const*, std::vector<llvm::MachObjectWriter::RelAndSymbol, std::allocator<llvm::MachObjectWriter::RelAndSymbol>>>* llvm::DenseMapBase<llvm::DenseMap<llvm::MCSection const*, std::vector<llvm::MachObjectWriter::RelAndSymbol, std::allocator<llvm::MachObjectWriter::RelAndSymbol>>, ... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x154fd55
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::AMDGPUInstPrinter::printImmediateBF16(unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void AMDGPUInstPrinter::printImmediateBF16(uint32_t Imm,
const MCSubtargetInfo &STI,
raw_ostream &O) {
int16_t SImm = static_cast<int16_t>(Imm);
if (isInlinableIntLiteral(SImm)) {
O << SImm;
return;
}
if (printImmedia... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rcx, %rbx
movl %esi, %r14d
movswq %r14w, %rax
addq $0x10, %rax
cmpq $0x50, %rax
ja 0x155a6c4
movswq %si, %rsi
movq %rbx, %rdi
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x1ce9e82
movq %rdi, %r15
movzwl %si, %edi
movq %rdx, %rsi
movq %r... | /Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp |
llvm::AMDGPUTargetELFStreamer::EmitNote(llvm::StringRef, llvm::MCExpr const*, unsigned int, llvm::function_ref<void (llvm::MCELFStreamer&)>) | void AMDGPUTargetELFStreamer::EmitNote(
StringRef Name, const MCExpr *DescSZ, unsigned NoteType,
function_ref<void(MCELFStreamer &)> EmitDesc) {
auto &S = getStreamer();
auto &Context = S.getContext();
auto NameSZ = Name.size() + 1;
unsigned NoteFlags = 0;
// TODO Apparently, this is currently neede... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movl %r8d, 0xc(%rsp)
movq %rcx, %r12
movq %rdx, %r14
movq %rsi, 0x10(%rsp)
movq 0x258(%rdi), %rax
movq 0x260(%rdi), %rbx
movq 0x8(%rbx), %r15
movq %rax, %rdi
callq 0x1d2c6fe
movzbl %al, %ebp
addl %ebp, %ebp
leaq 0x1(%r14), %r13
movq %rbx... | /Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp |
llvm::AMDGPUTargetELFStreamer::getEFlagsAMDGCN() | unsigned AMDGPUTargetELFStreamer::getEFlagsAMDGCN() {
assert(STI.getTargetTriple().getArch() == Triple::amdgcn);
switch (STI.getTargetTriple().getOS()) {
default:
// TODO: Why are some tests have "mingw" listed as OS?
// llvm_unreachable("Unsupported OS");
case Triple::UnknownOS:
return getEFlagsUn... | pushq %rbx
movq %rdi, %rbx
movq 0x258(%rdi), %rax
movl 0x34(%rax), %ecx
cmpl $0x16, %ecx
je 0x156195a
cmpl $0x1f, %ecx
je 0x156190f
cmpl $0x20, %ecx
movq 0x40(%rax), %rdi
movq 0x48(%rax), %rsi
callq 0x15600d8
movl %eax, %ecx
movq 0x240(%rbx), %xmm0
pshufd $0x50, %xmm0, %xmm0 # xmm0 = xmm0[0,0,1,1]
pand 0x2fc715d(%r... | /Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp |
llvm::ARMInstPrinter::printInst(llvm::MCInst const*, unsigned long, llvm::StringRef, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,
StringRef Annot, const MCSubtargetInfo &STI,
raw_ostream &O) {
unsigned Opcode = MI->getOpcode();
switch (Opcode) {
case ARM::VLLDM: {
const MCOperand &Reg = MI->getOperand(0);
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %rdx, %r15
movq %rsi, %r13
movq %rdi, %rbp
movq 0xf0(%rsp), %r12
movl (%rsi), %ebx
cmpl $0xb38, %ebx # imm = 0xB38
jg 0x15bf136
cmpl $0x7bb, %ebx # imm = 0x7BB
movq %r8, 0x8(%rsp)
movq %rcx, (%rsp)
jg 0x15bf189... | /Target/ARM/MCTargetDesc/ARMInstPrinter.cpp |
llvm::createARMWinCOFFStreamer(llvm::MCContext&, std::unique_ptr<llvm::MCAsmBackend, std::default_delete<llvm::MCAsmBackend>>&&, std::unique_ptr<llvm::MCObjectWriter, std::default_delete<llvm::MCObjectWriter>>&&, std::unique_ptr<llvm::MCCodeEmitter, std::default_delete<llvm::MCCodeEmitter>>&&) | MCStreamer *
llvm::createARMWinCOFFStreamer(MCContext &Context,
std::unique_ptr<MCAsmBackend> &&MAB,
std::unique_ptr<MCObjectWriter> &&OW,
std::unique_ptr<MCCodeEmitter> &&Emitter) {
return new ARMWinCOFFStreamer(Context, std... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r13
movl $0x1b8, %edi # imm = 0x1B8
callq 0x751940
movq %rax, %rbx
movq (%r12), %rax
xorl %ecx, %ecx
movq %rcx, (%r12)
movq (%r14), %rsi
movq %rcx, (%r14)
movq (%r15), %rdi
movq... | /Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp |
(anonymous namespace)::ARMTargetAsmStreamer::emitSetFP(unsigned int, unsigned int, long) | void ARMTargetAsmStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
int64_t Offset) {
OS << "\t.setfp\t";
InstPrinter.printRegName(OS, FpReg);
OS << ", ";
InstPrinter.printRegName(OS, SpReg);
if (Offset)
OS << ", #" << Offset;
OS << '\n';
} | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rcx, %r14
movl %edx, %ebp
movl %esi, %r15d
movq %rdi, %rbx
movq 0x18(%rdi), %rdi
leaq 0x30cff35(%rip), %rsi # 0x4697fe8
movl $0x8, %edx
callq 0x7c4562
movq 0x18(%rbx), %rsi
movq 0x20(%rbx), %rdi
movq (%rdi), %rax
movl %r15d, %edx
callq *0x28(%rax)
movq 0x18... | /Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |
(anonymous namespace)::ARMELFStreamer::~ARMELFStreamer() | ~ARMELFStreamer() override = default; | pushq %rbx
movq %rdi, %rbx
leaq 0x41dae31(%rip), %rax # 0x57a5c60
movq %rax, (%rdi)
movq 0x1ac0(%rdi), %rdi
leaq 0x1ad0(%rbx), %rax
cmpq %rax, %rdi
je 0x15cae4a
callq 0x751980
movq 0x1a88(%rbx), %rdi
leaq 0x1aa0(%rbx), %rax
cmpq %rax, %rdi
je 0x15cae62
callq 0x751980
movq 0x1a30(%rbx), %rdi
leaq 0x1a48(%rbx), %rax
cm... | /Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |
(anonymous namespace)::ARMELFStreamer::emitSymbolAttribute(llvm::MCSymbol*, llvm::MCSymbolAttr) | bool emitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) override {
bool Val = MCELFStreamer::emitSymbolAttribute(Symbol, Attribute);
if (!IsThumb)
return Val;
unsigned Type = cast<MCSymbolELF>(Symbol)->getType();
if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC) &&
Sym... | pushq %rbp
pushq %r14
pushq %rbx
subq $0x20, %rsp
movq %rsi, %rbx
movq %rdi, %r14
callq 0x1aee816
movl %eax, %ebp
cmpb $0x1, 0x19c9(%r14)
jne 0x15cb305
movq %rbx, %rdi
callq 0x1b09fb8
andl $-0x9, %eax
cmpl $0x2, %eax
jne 0x15cb305
movq %rbx, %rdi
movl $0x1, %esi
callq 0x817c20
testq %rax, %rax
je 0x15cb305
movq 0x120(%... | /Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |
llvm::AVRInstPrinter::printMemri(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) | void AVRInstPrinter::printMemri(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
assert(MI->getOperand(OpNo).isReg() &&
"Expected a register for the first operand");
const MCOperand &OffsetOp = MI->getOperand(OpNo + 1);
// Print the register.
printOperand(MI, OpNo, O... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %rbx
leal 0x1(%rdx), %r15d
movq 0x10(%rsi), %r12
shlq $0x4, %r15
leaq (%r12,%r15), %r14
callq 0x15daad8
cmpb $0x2, (%r12,%r15)
jne 0x15dac61
movq 0x8(%r14), %r14
testq %r14, %r14
js 0x15dac89
movq 0x20(%rbx), %rax
cmpq 0x18(%rbx), %rax
jae 0x15dac7c
leaq... | /Target/AVR/MCTargetDesc/AVRInstPrinter.cpp |
llvm::AVRMCExpr::evaluateAsConstant(long&) const | bool AVRMCExpr::evaluateAsConstant(int64_t &Result) const {
MCValue Value;
bool isRelocatable =
getSubExpr()->evaluateAsRelocatable(Value, nullptr, nullptr);
if (!isRelocatable)
return false;
if (Value.isAbsolute()) {
Result = evaluateAsInt64(Value.getConstant());
return true;
}
return... | pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movq %rsi, %rbx
movq %rdi, %r14
xorps %xmm0, %xmm0
movq %rsp, %rsi
movups %xmm0, 0xc(%rsi)
movaps %xmm0, (%rsi)
movq 0x20(%rdi), %rdi
xorl %r15d, %r15d
xorl %edx, %edx
xorl %ecx, %ecx
callq 0x1af249c
testb %al, %al
je 0x15db40f
movq 0x8(%rsp), %rax
orq (%rsp), %rax
jne ... | /Target/AVR/MCTargetDesc/AVRMCExpr.cpp |
llvm::AVRMCExpr::evaluateAsInt64(long) const | int64_t AVRMCExpr::evaluateAsInt64(int64_t Value) const {
if (Negated)
Value *= -1;
switch (Kind) {
case AVRMCExpr::VK_AVR_LO8:
Value &= 0xff;
break;
case AVRMCExpr::VK_AVR_HI8:
Value &= 0xff00;
Value >>= 8;
break;
case AVRMCExpr::VK_AVR_HH8:
Value &= 0xff0000;
Value >>= 16;
... | movq %rsi, %rax
negq %rax
cmpb $0x0, 0x28(%rdi)
cmoveq %rsi, %rax
movl 0x18(%rdi), %ecx
decl %ecx
cmpl $0xa, %ecx
ja 0x15db46a
leaq 0x30ca7b9(%rip), %rdx # 0x46a5bf4
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%rcx
sarq %rax
jmp 0x15db46a
shrq $0x9, %rax
jmp 0x15db46a
shrq %rax
jmp 0x15db46a
shrq $0x18, %rax
jmp... | /Target/AVR/MCTargetDesc/AVRMCExpr.cpp |
llvm::AVRMCCodeEmitter::getMachineOpValue(llvm::MCInst const&, llvm::MCOperand const&, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | bool isReg() const { return Kind == kRegister; } | movzbl (%rdx), %eax
cmpl $0x4, %eax
je 0x15dd4bb
cmpl $0x2, %eax
je 0x15dd4b7
cmpl $0x1, %eax
jne 0x15dd4c2
movq 0x10(%rdi), %rax
movq 0xa0(%rax), %rax
movl 0x8(%rdx), %ecx
movq 0x60(%rax), %rax
movzwl (%rax,%rcx,2), %eax
retq
movl 0x8(%rdx), %eax
retq
cvttsd2si 0x8(%rdx), %rax
retq
movq 0x8(%rdx), %rsi
movq %rcx, %rdx... | /llvm/MC/MCInst.h |
llvm::HexagonMCChecker::init() | void HexagonMCChecker::init() {
// Initialize read-only registers set.
ReadOnly.insert(Hexagon::PC);
ReadOnly.insert(Hexagon::C9_8);
// Figure out the loop-registers definitions.
if (HexagonMCInstrInfo::isInnerLoop(MCB)) {
Defs[Hexagon::SA0].insert(Unconditional); // FIXME: define or change SA0?
Defs... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdi, %rbx
leaq 0x138(%rdi), %r14
leaq 0x10(%rsp), %r15
movl $0x18, (%r15)
movq %r14, %rdi
movq %r15, %rsi
callq 0xba38c6
movl $0x152, (%r15) # imm = 0x152
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0xba38c6
movq 0x8(%rbx)... | /Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp |
llvm::HexagonMCChecker::HexagonMCChecker(llvm::MCContext&, llvm::MCInstrInfo const&, llvm::MCSubtargetInfo const&, llvm::MCInst&, llvm::MCRegisterInfo const&, bool) | HexagonMCChecker::HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII,
MCSubtargetInfo const &STI, MCInst &mcb,
MCRegisterInfo const &ri, bool ReportErrors)
: Context(Context), MCB(mcb), RI(ri), MCII(MCII), STI(STI),
ReportErrors(R... | movb 0x8(%rsp), %al
movq %rsi, (%rdi)
movq %r8, 0x8(%rdi)
movq %r9, 0x10(%rdi)
movq %rdx, 0x18(%rdi)
movq %rcx, 0x20(%rdi)
movb %al, 0x28(%rdi)
leaq 0x50(%rdi), %rcx
xorl %eax, %eax
movl %eax, 0x50(%rdi)
movq %rax, 0x58(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x30(%rdi)
movl %eax, 0x40(%rdi)
movq %rcx, 0x60(%rdi)
movq %... | /Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp |
llvm::HexagonMCChecker::checkNewValues() | bool HexagonMCChecker::checkNewValues() {
for (auto const &ConsumerInst :
HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
if (!HexagonMCInstrInfo::isNewValue(MCII, ConsumerInst))
continue;
const HexagonMCInstrInfo::PredicateInfo ConsumerPredInfo =
HexagonMCInstrInfo::predicateInfo(M... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x118, %rsp # imm = 0x118
movq %rdi, %rbx
movq 0x8(%rdi), %rdx
movq 0x18(%rdi), %rsi
leaq 0xc8(%rsp), %r14
movq %r14, %rdi
callq 0x15ed8bd
movq 0x20(%r14), %rax
leaq 0x70(%rsp), %rdi
movq %rax, 0x20(%rdi)
movups (%r14), %xmm0
movups 0x10... | /Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp |
llvm::SmallVectorTemplateBase<llvm::MCInst const*, true>::push_back(llvm::MCInst const*) | void push_back(ValueParamT Elt) {
const T *EltPtr = reserveForParamAndGetAddress(Elt);
memcpy(reinterpret_cast<void *>(this->end()), EltPtr, sizeof(T));
this->set_size(this->size() + 1);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %edx
cmpl 0xc(%rdi), %edx
jae 0x15ec0bf
movq (%rbx), %rax
movl 0x8(%rbx), %ecx
movq %r14, (%rax,%rcx,8)
incl 0x8(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
incq %rdx
leaq 0x10(%rbx), %rsi
movl $0x8, %ecx
movq %rbx, %rdi
callq 0x1cba528... | /llvm/ADT/SmallVector.h |
llvm::HexagonMCELFStreamer::HexagonMCEmitCommonSymbol(llvm::MCSymbol*, unsigned long, llvm::Align, unsigned int) | void HexagonMCELFStreamer::HexagonMCEmitCommonSymbol(MCSymbol *Symbol,
uint64_t Size,
Align ByteAlignment,
unsigned AccessSize) {
getAssembler().registerSymbol... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movl %r8d, %r12d
movl %ecx, %ebp
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
movq 0x120(%rdi), %rdi
callq 0x1ad9a6e
movq %rbx, %rdi
callq 0x1b09f78
testb %al, %al
jne 0x15ed090
movq %rbx, %rdi
movl $0x1, %esi
callq 0x1b09eba
movq %rb... | /Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp |
llvm::HexagonMCExpr::create(llvm::MCExpr const*, llvm::MCContext&) | HexagonMCExpr *HexagonMCExpr::create(MCExpr const *Expr, MCContext &Ctx) {
return new (Ctx) HexagonMCExpr(Expr);
} | pushq %rbx
movq %rdi, %rbx
leaq 0xc0(%rsi), %rdi
movl $0x28, %esi
movl $0x3, %edx
callq 0x8c3eba
movb $0x4, 0x8(%rax)
movzbl 0xc(%rax), %ecx
shll $0x18, %ecx
movl %ecx, 0x9(%rax)
movq $0x0, 0x10(%rax)
leaq 0x41c250d(%rip), %rcx # 0x57afb40
movq %rcx, (%rax)
movq %rbx, 0x18(%rax)
movl $0x0, 0x20(%rax)
popq %rbx
retq
n... | /Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp |
void llvm::cl::apply<llvm::cl::opt<llvm::Hexagon::ArchEnum, false, llvm::cl::parser<llvm::Hexagon::ArchEnum>>, char [5], llvm::cl::desc, llvm::cl::ValuesClass, llvm::cl::initializer<llvm::Hexagon::ArchEnum>, llvm::cl::ValueExpected>(llvm::cl::opt<llvm::Hexagon::ArchEnum, false, llvm::cl::parser<llvm::Hexagon::ArchEnum>... | void apply(Opt *O, const Mod &M, const Mods &... Ms) {
applicator<Mod>::opt(M, *O);
apply(O, Ms...);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r9, %r14
movq %r8, %r15
movq %rcx, %r12
movq %rdx, %r13
movq %rsi, %rbp
movq %rdi, %rbx
movq %rsi, %rdi
callq 0x7512e0
movq %rbx, %rdi
movq %rbp, %rsi
movq %rax, %rdx
callq 0x1c90c20
movups (%r13), %xmm0
movups %xmm0, 0x20(%rbx)
movq %r1... | /llvm/Support/CommandLine.h |
llvm::HexagonShuffler::tryAuction(llvm::HexagonShuffler::HexagonPacketSummary const&) | std::optional<HexagonShuffler::HexagonPacket>
HexagonShuffler::tryAuction(HexagonPacketSummary const &Summary) {
HexagonPacket PacketResult = Packet;
HexagonUnitAuction AuctionCore(Summary.ReservedSlotMask);
llvm::stable_sort(PacketResult, HexagonInstr::lessCore);
const bool ValidSlots =
llvm::all_of(ins... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x158, %rsp # imm = 0x158
movq %rdx, %r14
movq %rdi, %rbx
leaq 0x40(%rsp), %rcx
movq %rcx, -0x10(%rcx)
movabsq $0x700000000, %rax # imm = 0x700000000
movq %rax, -0x8(%rcx)
cmpl $0x0, 0x8(%rsi)
je 0x15f2dba
leaq 0x30(%rsp), %rdi
call... | /Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp |
SlotMaskToText[abi:cxx11](unsigned int) | static std::string SlotMaskToText(unsigned SlotMask) {
SmallVector<std::string, HEXAGON_PRESHUFFLE_PACKET_SIZE> Slots;
for (unsigned SlotNum = 0; SlotNum < HEXAGON_PACKET_SIZE; SlotNum++)
if ((SlotMask & (1 << SlotNum)) != 0)
Slots.push_back(utostr(SlotNum));
return llvm::join(Slots, St... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x138, %rsp # imm = 0x138
movl %esi, %ebp
movq %rdi, 0x8(%rsp)
leaq 0x58(%rsp), %rax
movq %rax, -0x10(%rax)
movabsq $0x700000000, %rcx # imm = 0x700000000
movq %rcx, -0x8(%rax)
leaq 0x45(%rsp), %r14
leaq 0x20(%rsp), %r13
xorl %r12d,... | /Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp |
createLoongArchMCInstPrinter(llvm::Triple const&, unsigned int, llvm::MCAsmInfo const&, llvm::MCInstrInfo const&, llvm::MCRegisterInfo const&) | static MCInstPrinter *createLoongArchMCInstPrinter(const Triple &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI,
const MCInstrInfo &MII,
... | pushq %r15
pushq %r14
pushq %rbx
movq %r8, %rbx
movq %rcx, %r14
movq %rdx, %r15
movl $0x40, %edi
callq 0x751940
xorl %ecx, %ecx
movq %rcx, 0x8(%rax)
movq %r15, 0x10(%rax)
movq %r14, 0x18(%rax)
movq %rbx, 0x20(%rax)
movq %rcx, 0x28(%rax)
movw $0x0, 0x30(%rax)
movb $0x1, 0x32(%rax)
movl %ecx, 0x33(%rax)
movl %ecx, 0x36(%... | /Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp |
(anonymous namespace)::LoongArchMCInstrAnalysis::evaluateBranch(llvm::MCInst const&, unsigned long, unsigned long, unsigned long&) const | bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
uint64_t &Target) const override {
unsigned NumOps = Inst.getNumOperands();
if ((isBranch(Inst) && !isIndirectBranch(Inst)) ||
Inst.getOpcode() == LoongArch::BL) {
Target = Addr + Inst.getOperand(NumOps - 1... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %r12
movl 0x18(%rsi), %r13d
movq (%rdi), %rax
callq *0x20(%rax)
testb %al, %al
je 0x16033e8
movq (%r12), %rax
movq %r12, %rdi
movq %r15, %rsi
callq *0x38(%rax)
testb %al, %al
je 0x16033f5
cmpl $0x1f0, (%r15)... | /Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp |
(anonymous namespace)::LoongArchELFObjectWriter::getRelocType(llvm::MCContext&, llvm::MCValue const&, llvm::MCFixup const&, bool) const | unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel) const {
// Determine the type of the relocation
u... | subq $0x28, %rsp
movl 0xc(%rcx), %eax
cmpl $0x100, %eax # imm = 0x100
jb 0x1605f50
addl $0xffffff00, %eax # imm = 0xFFFFFF00
addq $0x28, %rsp
retq
movzbl %al, %eax
leal -0x80(%rax), %edx
cmpl $0xa, %edx
ja 0x1605f72
leaq 0x314afb6(%rip), %rax # 0x4750f18
movslq (%rax,%rdx,4), %rcx
addq %rax, %rcx
jmp... | /Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp |
llvm::MipsTargetStreamer::emitII(unsigned int, short, short, llvm::SMLoc, llvm::MCSubtargetInfo const*) | void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2,
SMLoc IDLoc, const MCSubtargetInfo *STI) {
MCInst TmpInst;
TmpInst.setOpcode(Opcode);
TmpInst.addOperand(MCOperand::createImm(Imm1));
TmpInst.addOperand(MCOperand::createImm(Imm2));
TmpInst.setLoc(IDLo... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %r9, %rbx
movq %r8, %r14
movl %ecx, %ebp
movq %rdi, %r15
leaq 0x10(%rsp), %r12
leaq 0x20(%rsp), %r13
xorps %xmm0, %xmm0
movaps %xmm0, -0x20(%r13)
movq %r13, -0x10(%r13)
movabsq $0x600000000, %rax # imm = 0x600000000
movq %rax, ... | /Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp |
llvm::MipsAsmBackend::getFixupKind(llvm::StringRef) const | std::optional<MCFixupKind> MipsAsmBackend::getFixupKind(StringRef Name) const {
unsigned Type = llvm::StringSwitch<unsigned>(Name)
.Case("BFD_RELOC_NONE", ELF::R_MIPS_NONE)
.Case("BFD_RELOC_16", ELF::R_MIPS_16)
.Case("BFD_RELOC_32", ELF::R_MIPS_32)
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movabsq $0x100000000, %r13 # imm = 0x100000000
cmpq $0xe, %rdx
jne 0x160e4af
leaq 0x2a66ffb(%rip), %rsi # 0x4075494
movq %r14, %rdi
movq %rbx, %rdx
callq 0x751d10
xorl %r12d, %r12d
testl %... | /Target/Mips/MCTargetDesc/MipsAsmBackend.cpp |
llvm::MipsMCCodeEmitter::getBranchTargetOpValueMMR6(llvm::MCInst const&, unsigned int, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | unsigned MipsMCCodeEmitter::
getBranchTargetOpValueMMR6(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
const MCOperand &MO = MI.getOperand(OpNo);
// If the destination is an immediate, divide by 2.
if (M... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rcx, %rbx
movl %edx, %ecx
movq 0x10(%rsi), %rdx
shlq $0x4, %rcx
leaq (%rdx,%rcx), %rax
cmpb $0x2, (%rdx,%rcx)
jne 0x1613e39
movq 0x8(%rax), %r14
shrq %r14
jmp 0x1613eb7
movq %rdi, %r15
movq 0x8(%rax), %r12
movq 0x10(%rdi), %rsi
xorl %r14d, %r14d
movq $-... | /Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp |
LLVMInitializeMSP430TargetMC | LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430TargetMC() {
Target &T = getTheMSP430Target();
TargetRegistry::RegisterMCAsmInfo(T, createMSP430MCAsmInfo);
TargetRegistry::RegisterMCInstrInfo(T, createMSP430MCInstrInfo);
TargetRegistry::RegisterMCRegInfo(T, createMSP430MCRegisterInfo);
TargetRegistry::Regi... | pushq %rax
callq 0x16807db
leaq 0x5c(%rip), %rcx # 0x1615dde
movq %rcx, 0x30(%rax)
leaq 0x1a1(%rip), %rcx # 0x1615f2e
movq %rcx, 0x40(%rax)
leaq 0x1dc(%rip), %rcx # 0x1615f74
movq %rcx, 0x50(%rax)
leaq 0x2ee(%rip), %rcx # 0x1616091
movq %rcx, 0x58(%rax)
leaq 0x3cc(%rip), %rcx # 0x161617a
... | /Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp |
llvm::PPCMCCodeEmitter::getTLSCallEncoding(llvm::MCInst const&, unsigned int, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | unsigned PPCMCCodeEmitter::getTLSCallEncoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
// For special TLS calls, we need two fixups; one for the branch target
// (__tls_get_add... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %r8, %rbx
movq %rcx, %r14
movl %edx, %r15d
movq %rsi, %r12
movq %rdi, %r13
leal 0x1(%r15), %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movq 0x8(%rcx,%rax), %rax
xorps %xmm0, %xmm0
movq %rsp, %rsi
movaps %xmm0, (%rsi)
movq $0x0, 0x10(%rsi)
movq ... | /Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp |
llvm::RISCVInstPrinter::printStackAdj(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&, bool) | void RISCVInstPrinter::printStackAdj(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O,
bool Negate) {
int64_t Imm = MI->getOperand(OpNo).getImm();
bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit);
int64_t StackAd... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %r8, %rbx
movq %rdi, %rax
movl %edx, %edx
movq 0x10(%rsi), %rsi
shlq $0x4, %rdx
testb $0x4, 0xd8(%rcx)
movq 0x8(%rsi), %rcx
leaq 0x3299dd9(%rip), %rdi # 0x48d5088
leaq 0x3299e32(%rip), %r8 # 0x48d50e8
cmoveq %rdi, %r8
shlq $0x20, %rcx
movabsq $-0x400000000, %r... | /Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp |
llvm::RISCVInstPrinter::printFRMArgLegacy(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) | void RISCVInstPrinter::printVTypeI(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O) {
unsigned Imm = MI->getOperand(OpNo).getImm();
// Print the raw immediate for reserved values: vlmul[2:0]=4, vsew[2:0]=0b1xx,
// or non-zero in bits 8 and above.
if... | pushq %rbx
movl %edx, %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movl 0x8(%rcx,%rax), %ebx
testq %rbx, %rbx
je 0x163b69d
leaq 0x28ec07e(%rip), %rsi # 0x3f276dd
movl $0x2, %edx
movq %r8, %rdi
callq 0x7c4562
shlq $0x20, %rbx
movabsq $-0x100000000, %rcx # imm = 0xFFFFFFFF00000000
addq %rbx, %rcx
sarq $0x1e, %rcx
lea... | /Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp |
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionArch(llvm::ArrayRef<llvm::RISCVOptionArchArg>) | void RISCVTargetAsmStreamer::emitDirectiveOptionArch(
ArrayRef<RISCVOptionArchArg> Args) {
OS << "\t.option\tarch";
for (const auto &Arg : Args) {
OS << ", ";
switch (Arg.Type) {
case RISCVOptionArchArgType::Full:
break;
case RISCVOptionArchArgType::Plus:
OS << "+";
break;
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %r15
movq %rsi, %r14
movq %rdi, %rbx
movq 0x18(%rdi), %rdi
leaq 0x3423efa(%rip), %rsi # 0x4a62aef
movl $0xd, %edx
callq 0x7c4562
testq %r15, %r15
je 0x163ec6d
leaq (%r15,%r15,4), %rax
leaq (%r14,%rax,8), %r12
leaq 0x28e8aca(%rip),... | /Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp |
llvm::SystemZInstPrinter::printBDLAddrOperand(llvm::MCInst const*, int, llvm::raw_ostream&) | void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
unsigned Base = MI->getOperand(OpNum).getReg();
const MCOperand &DispMO = MI->getOperand(OpNum + 1);
uint64_t Length = MI->getOperand(OpNum + 2).getImm();
printOperand(DispMO,... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rcx, %rbx
movq %rdi, %r14
movl %edx, %eax
movq 0x10(%rsi), %rcx
shlq $0x4, %rax
movl 0x8(%rcx,%rax), %ebp
leal 0x1(%rdx), %esi
shlq $0x4, %rsi
addq %rcx, %rsi
addl $0x2, %edx
shlq $0x4, %rdx
movq 0x8(%rcx,%rdx), %r15
movq 0x10(%rdi), %rdx
movq %rbx, %rcx
call... | /Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp |
void llvm::SystemZInstPrinter::printUImmOperand<32u>(llvm::MCInst const*, int, llvm::raw_ostream&) | void SystemZInstPrinter::printUImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
const MCOperand &MO = MI->getOperand(OpNum);
if (MO.isExpr()) {
O << *MO.getExpr();
return;
}
uint64_t Value = static_cast<uint64_t>(MO.getImm());
assert(isUInt<N>(Value) ... | movq %rdi, %rax
movl %edx, %edi
movq 0x10(%rsi), %rsi
shlq $0x4, %rdi
leaq (%rsi,%rdi), %rdx
cmpb $0x5, (%rsi,%rdi)
jne 0x164ccad
movq 0x8(%rdx), %rdi
movq %rcx, %rsi
xorl %edx, %edx
xorl %ecx, %ecx
jmp 0x1aefec6
pushq %r14
pushq %rbx
subq $0x18, %rsp
movq 0x8(%rdx), %rbx
leaq 0x8(%rsp), %r14
movq %r14, %rdi
movq %rax,... | /Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp |
createAsmTargetStreamer(llvm::MCStreamer&, llvm::formatted_raw_ostream&, llvm::MCInstPrinter*) | static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
formatted_raw_ostream &OS,
MCInstPrinter *InstPrint) {
return new SystemZTargetAsmStreamer(S, OS);
} | pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
movl $0x48, %edi
callq 0x751940
movq %rax, %r15
movq %rax, %rdi
movq %r14, %rsi
callq 0x1b047ca
leaq 0x18(%r15), %rax
movl $0x0, 0x18(%r15)
xorl %ecx, %ecx
movq %rcx, 0x20(%r15)
movq %rax, 0x28(%r15)
movq %rax, 0x30(%r15)
movq %rcx, 0x38(%r15)
leaq 0x418a... | /Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp |
llvm::WebAssemblyInstPrinter::printWebAssemblySignatureOperand(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) | void WebAssemblyInstPrinter::printWebAssemblySignatureOperand(const MCInst *MI,
unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isImm()) {
auto Imm = st... | pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rcx, %rbx
movl %edx, %ecx
movq 0x10(%rsi), %rdx
shlq $0x4, %rcx
leaq (%rdx,%rcx), %rax
cmpb $0x2, (%rdx,%rcx)
jne 0x165eec3
movl 0x8(%rax), %edi
cmpl $0x40, %edi
je 0x165ef0a
callq 0x165da4b
movq %rbx, %rdi
movq %rax, %rsi
addq $0x28, %rsp
popq %rbx
popq %r14
jmp 0x7c4532
mo... | /Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp |
llvm::X86ATTInstPrinter::printU8Imm(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) | void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
raw_ostream &O) {
if (MI->getOperand(Op).isExpr())
return printOperand(MI, Op, O);
markup(O, Markup::Immediate)
<< '$' << formatImm(MI->getOperand(Op).getImm() & 0xff);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movl %edx, %r12d
movq 0x10(%rsi), %rax
shlq $0x4, %r12
cmpb $0x5, (%rax,%r12)
jne 0x166411b
movq %rbx, %rdi
movq %r14, %rsi
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x1663c34
movq %rsp, %r15
movq %r15, %rdi
... | /Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp |
llvm::DecodePSHUFLWMask(unsigned int, unsigned int, llvm::SmallVectorImpl<int>&) | void DecodePSHUFLWMask(unsigned NumElts, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask) {
for (unsigned l = 0; l != NumElts; l += 8) {
unsigned NewImm = Imm;
for (unsigned i = 0, e = 4; i != e; ++i) {
ShuffleMask.push_back(l + (NewImm & 3));
NewImm >>= 2;
}
for (un... | testl %edi, %edi
je 0x166de35
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movl %esi, %ebp
movl %edi, %r14d
xorl %r15d, %r15d
movl $0x4, %r12d
movl %ebp, %r13d
movl %r13d, %esi
andl $0x3, %esi
orl %r15d, %esi
movq %rbx, %rdi
callq 0x90267a
shrl $0x2, %r13d
decl %r12d
jne ... | /Target/X86/MCTargetDesc/X86ShuffleDecode.cpp |
(anonymous namespace)::ELFX86_64AsmBackend::~ELFX86_64AsmBackend() | ELFX86_64AsmBackend(const Target &T, uint8_t OSABI,
const MCSubtargetInfo &STI)
: ELFX86AsmBackend(T, OSABI, STI) {} | pushq %rbx
movq %rdi, %rbx
leaq 0x4167975(%rip), %rax # 0x57e4fd8
movq %rax, (%rdi)
movq 0x38(%rdi), %rdi
leaq 0x48(%rbx), %rax
cmpq %rax, %rdi
je 0x167d678
callq 0x751980
movq 0x18(%rbx), %rdi
testq %rdi, %rdi
je 0x167d68b
movl $0x30, %esi
callq 0x7510e0
movq $0x0, 0x18(%rbx)
movq %rbx, %rdi
callq 0x1ad79d6
movl $0x... | /Target/X86/MCTargetDesc/X86AsmBackend.cpp |
readBlobInRecord(llvm::BitstreamCursor&, unsigned int, unsigned int) | static Expected<StringRef> readBlobInRecord(BitstreamCursor &Stream,
unsigned Block, unsigned RecordID) {
if (Error Err = Stream.EnterSubBlock(Block))
return std::move(Err);
StringRef Strtab;
while (true) {
Expected<llvm::BitstreamEntry> MaybeEntry = Stream.adv... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x38(%rsp), %r15
movq %r15, %rdi
xorl %ecx, %ecx
callq 0x2b0d60a
movq (%r15), %r15
testq %r15, %r15
je 0x16821de
orb $0x1, 0x10(%rbx)
movq %r15, (%rbx)
movq $0x0, 0x38(%rsp)
movq 0x38(%rsp), %rdi
test... | /Bitcode/Reader/BitcodeReader.cpp |
llvm::CallBrInst::Create(llvm::FunctionType*, llvm::Value*, llvm::BasicBlock*, llvm::ArrayRef<llvm::BasicBlock*>, llvm::ArrayRef<llvm::Value*>, llvm::ArrayRef<llvm::OperandBundleDefT<llvm::Value*>>, llvm::Twine const&, llvm::InsertPosition) | static CallBrInst *
Create(FunctionType *Ty, Value *Func, BasicBlock *DefaultDest,
ArrayRef<BasicBlock *> IndirectDests, ArrayRef<Value *> Args,
ArrayRef<OperandBundleDef> Bundles = std::nullopt,
const Twine &NameStr = "", InsertPosition InsertBefore = nullptr) {
int NumOperands = Compu... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %r9, 0x38(%rsp)
movq %r8, %rbx
movq %rcx, 0x48(%rsp)
movq %rdx, 0x40(%rsp)
movq %rsi, 0x30(%rsp)
movq %rdi, %rbp
leaq 0xc0(%rsp), %r12
leaq 0xb0(%rsp), %r13
movq 0x8(%r13), %rax
movq 0x8(%r12), %rdx
testq %rdx, %rdx
je 0x169a18b
mov... | /llvm/IR/Instructions.h |
(anonymous namespace)::BitcodeReader::typeCheckLoadStoreInst(llvm::Type*, llvm::Type*) | Error BitcodeReader::typeCheckLoadStoreInst(Type *ValType, Type *PtrType) {
if (!isa<PointerType>(PtrType))
return error("Load/Store operand is not a pointer type");
if (!PointerType::isLoadableOrStorableType(ValType))
return error("Cannot load/store from pointer");
return Error::success();
} | pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rsi, %r14
movq %rdi, %rbx
cmpb $0xf, 0x8(%rcx)
jne 0x169a3ac
movq %rdx, %rdi
callq 0x1a8abc2
testb %al, %al
je 0x169a3b9
movq $0x0, (%rbx)
jmp 0x169a3db
addq $0x8, %r14
leaq 0x373742e(%rip), %rax # 0x4dd17e5
jmp 0x169a3c4
addq $0x8, %r14
leaq 0x373744a(%rip), %rax # 0x4d... | /Bitcode/Reader/BitcodeReader.cpp |
(anonymous namespace)::BitcodeConstant::create(llvm::BumpPtrAllocatorImpl<llvm::MallocAllocator, 4096ul, 4096ul, 128ul>&, llvm::Type*, (anonymous namespace)::BitcodeConstant::ExtraInfo const&, llvm::ArrayRef<unsigned int>) | static BitcodeConstant *create(BumpPtrAllocator &A, Type *Ty,
const ExtraInfo &Info,
ArrayRef<unsigned> OpIDs) {
void *Mem = A.Allocate(totalSizeToAlloc<unsigned>(OpIDs.size()),
alignof(BitcodeConstant));
return new (Me... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rcx, %r14
movq %rdx, %r12
movq %rsi, %r13
leaq 0x58(,%r8,4), %rsi
movl $0x3, %edx
callq 0x8c3eba
movq %rax, %r15
movq %rax, %rdi
movq %r13, %rsi
movl $0xff, %edx
callq 0x1a8f80a
movb (%r12), %al
movb %al, 0x18(%r15)
movb 0x1(%r12), %al
movb %al... | /Bitcode/Reader/BitcodeReader.cpp |
llvm::DenseMapBase<llvm::DenseMap<std::pair<llvm::Type*, unsigned int>, unsigned int, llvm::DenseMapInfo<std::pair<llvm::Type*, unsigned int>, void>, llvm::detail::DenseMapPair<std::pair<llvm::Type*, unsigned int>, unsigned int>>, std::pair<llvm::Type*, unsigned int>, unsigned int, llvm::DenseMapInfo<std::pair<llvm::Ty... | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %r14
movq %r14, %rdx
callq 0x169c0a6
movl 0x10(%rbx), %ecx
leaq (%rcx,%rcx,2), %rdx
shlq $0x3, %rdx
addq (%rbx), %rdx
testb %al, %al
movq (%r14), %rax
cmoveq %rdx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
| /llvm/ADT/DenseMap.h |
std::pair<llvm::DenseMapIterator<std::pair<llvm::Type*, unsigned int>, unsigned int, llvm::DenseMapInfo<std::pair<llvm::Type*, unsigned int>, void>, llvm::detail::DenseMapPair<std::pair<llvm::Type*, unsigned int>, unsigned int>, false>, bool> llvm::DenseMapBase<llvm::DenseMap<std::pair<llvm::Type*, unsigned int>, unsig... | std::pair<iterator, bool> try_emplace(KeyT &&Key, Ts &&... Args) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return std::make_pair(makeIterator(TheBucket,
shouldReverseIterate<KeyT>()
? getBuckets()
... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rcx, %r15
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x8(%rsp), %r13
movq %rsi, %rdi
movq %rdx, %rsi
movq %r13, %rdx
callq 0x169c0a6
movl %eax, %ecx
movq (%r13), %rax
testb %cl, %cl
je 0x169c7bc
xorl %ecx, %ecx
jmp 0x169c7e4
movq %r... | /llvm/ADT/DenseMap.h |
std::pair<std::pair<llvm::BasicBlock*, llvm::BasicBlock*>, llvm::BasicBlock*>& llvm::SmallVectorTemplateBase<std::pair<std::pair<llvm::BasicBlock*, llvm::BasicBlock*>, llvm::BasicBlock*>, true>::growAndEmplaceBack<std::piecewise_construct_t const&, std::tuple<std::pair<llvm::BasicBlock*, llvm::BasicBlock*>&&>, std::tup... | T &growAndEmplaceBack(ArgTypes &&... Args) {
// Use push_back with a copy in case Args has an internal reference,
// side-stepping reference invalidation problems without losing the realloc
// optimization.
push_back(T(std::forward<ArgTypes>(Args)...));
return this->back();
} | pushq %rbx
subq $0x20, %rsp
movq %rdi, %rbx
movq (%rdx), %rax
movq (%rcx), %rcx
movups (%rax), %xmm0
movq %rsp, %rsi
movaps %xmm0, (%rsi)
movq (%rcx), %rax
movq %rax, 0x10(%rsi)
movl $0x1, %edx
callq 0x169d1d4
movq (%rbx), %rcx
movl 0x8(%rbx), %edx
leaq (%rdx,%rdx,2), %rdx
movq 0x10(%rax), %rsi
movq %rsi, 0x10(%rcx,%rd... | /llvm/ADT/SmallVector.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::GlobalObject*, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::GlobalObject*, void>, llvm::detail::DenseSetPair<llvm::GlobalObject*>>, llvm::GlobalObject*, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::GlobalObject*, void>, llvm::detail::DenseSetPair<llvm::Glob... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x16a54a8
pushq %rbx
movq (%rdi), %rdi
movl (%rsi), %r8d
movl %r8d, %eax
shrl $0x4, %eax
shrl $0x9, %r8d
xorl %eax, %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %r10d
xorl %r9d, %r9d
movl %r8d, %r11d
leaq (%rdi,%r11,8), %r11
movq (%r11), %rbx
cmpq %rbx, (%rsi)
jne 0x16a546f
movq %... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<unsigned int, llvm::GlobalValue::LinkageTypes, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::GlobalValue::LinkageTypes>>, unsigned int, llvm::GlobalValue::LinkageTypes, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned ... | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %r14
movq %r14, %rdx
callq 0x16a5f4e
movl 0x10(%rbx), %edx
shlq $0x3, %rdx
addq (%rbx), %rdx
testb %al, %al
movq (%r14), %rax
cmoveq %rdx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
| /llvm/ADT/DenseMap.h |
llvm::DenseMap<unsigned int, std::tuple<llvm::ValueInfo, unsigned long, unsigned long>, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, std::tuple<llvm::ValueInfo, unsigned long, unsigned long>>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
parseTypeIdSummaryRecord(llvm::ArrayRef<unsigned long>, llvm::StringRef, llvm::ModuleSummaryIndex&) | static void parseTypeIdSummaryRecord(ArrayRef<uint64_t> Record,
StringRef Strtab,
ModuleSummaryIndex &TheIndex) {
size_t Slot = 0;
TypeIdSummary &TypeId = TheIndex.getOrInsertTypeIdSummary(
{Strtab.data() + Record[Slot], static_cast<siz... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, %rbx
movq %rdi, %r15
movq (%rdi), %rsi
movq %rdx, 0x38(%rsp)
addq %rdx, %rsi
movq 0x8(%rdi), %rdx
movq %rcx, %rdi
callq 0x16a96d2
movdqu 0x10(%r15), %xmm0
pshufd $0xe8, %xmm0, %xmm0 # xmm0 = xmm0[0,2,2,3]
movq %xmm0, (%rax... | /Bitcode/Reader/BitcodeReader.cpp |
llvm::Error llvm::handleErrorImpl<llvm::errorToErrorCodeAndEmitErrors(llvm::LLVMContext&, llvm::Error)::$_0>(std::unique_ptr<llvm::ErrorInfoBase, std::default_delete<llvm::ErrorInfoBase>>, llvm::errorToErrorCodeAndEmitErrors(llvm::LLVMContext&, llvm::Error)::$_0&&) | Error handleErrorImpl(std::unique_ptr<ErrorInfoBase> Payload,
HandlerT &&Handler, HandlerTs &&... Handlers) {
if (ErrorHandlerTraits<HandlerT>::appliesTo(*Payload))
return ErrorHandlerTraits<HandlerT>::apply(std::forward<HandlerT>(Handler),
std:... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
movq (%rsi), %rdi
movq (%rdi), %rax
leaq 0x4234d1b(%rip), %rsi # 0x58e1210
callq *0x30(%rax)
movq (%r12), %r14
movq $0x0, (%r12)
testb %al, %al
je 0x16ac570
movq (%r14), %rax
movq %r14, %rdi
callq *0x20(%rax)
... | /llvm/Support/Error.h |
llvm::DenseMap<llvm::DILocalScope*, llvm::DISubprogram*, llvm::DenseMapInfo<llvm::DILocalScope*, void>, llvm::detail::DenseMapPair<llvm::DILocalScope*, llvm::DISubprogram*>>::init(unsigned int) | void init(unsigned InitNumEntries) {
auto InitBuckets = BaseT::getMinBucketToReserveForEntries(InitNumEntries);
if (allocateBuckets(InitBuckets)) {
this->BaseT::initEmpty();
} else {
NumEntries = 0;
NumTombstones = 0;
}
} | pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
testl %esi, %esi
je 0x16b69de
shll $0x2, %esi
movl $0xaaaaaaab, %eax # imm = 0xAAAAAAAB
imulq %rsi, %rax
shrq $0x21, %rax
incl %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ec... | /llvm/ADT/DenseMap.h |
llvm::TrackingMDRef& llvm::SmallVectorImpl<llvm::TrackingMDRef>::emplace_back<llvm::Metadata*&>(llvm::Metadata*&) | reference emplace_back(ArgTypes &&... Args) {
if (LLVM_UNLIKELY(this->size() >= this->capacity()))
return this->growAndEmplaceBack(std::forward<ArgTypes>(Args)...);
::new ((void *)this->end()) T(std::forward<ArgTypes>(Args)...);
this->set_size(this->size() + 1);
return this->back();
} | pushq %rbx
movq %rdi, %rbx
movl 0x8(%rdi), %eax
cmpl 0xc(%rdi), %eax
jae 0x16b6f80
movq (%rbx), %rcx
movq (%rsi), %rsi
movq %rsi, (%rcx,%rax,8)
testq %rsi, %rsi
je 0x16b6f6b
leaq (%rcx,%rax,8), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x8(%rbx), %eax
incl %eax
movl %eax, 0x8(%rbx)
movq (%rbx), %rcx
leaq (%rcx,%rax,8),... | /llvm/ADT/SmallVector.h |
llvm::detail::DenseMapPair<llvm::MDString*, std::unique_ptr<llvm::MDTuple, llvm::TempMDNodeDeleter>>* llvm::DenseMapBase<llvm::SmallDenseMap<llvm::MDString*, std::unique_ptr<llvm::MDTuple, llvm::TempMDNodeDeleter>, 1u, llvm::DenseMapInfo<llvm::MDString*, void>, llvm::detail::DenseMapPair<llvm::MDString*, std::unique_pt... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl (%rdi), %edx
movl %edx, %ecx
shrl %ecx
movl $0x1, %esi
testb $0x1, %dl
jne 0x16b7b93
movl 0x10(%rbx), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x16b7bca
notl %ecx
addl %esi, %ecx
subl ... | /llvm/ADT/DenseMap.h |
llvm::ComputeLinearIndex(llvm::Type*, unsigned int const*, unsigned int const*, unsigned int) | unsigned llvm::ComputeLinearIndex(Type *Ty,
const unsigned *Indices,
const unsigned *IndicesEnd,
unsigned CurIndex) {
// Base case: We're done.
if (Indices && Indices == IndicesEnd)
return CurIndex;
// Given... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl %ecx, %ebx
testq %rsi, %rsi
setne %al
cmpq %rdx, %rsi
sete %cl
testb %cl, %al
jne 0x16ba272
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %r12
movzbl 0x8(%rdi), %eax
cmpl $0x10, %eax
setne %cl
testq %rdi, %rdi
sete %dl
orb %cl, %dl
je ... | /CodeGen/Analysis.cpp |
(anonymous namespace)::AtomicExpandImpl::run(llvm::Function&, llvm::TargetMachine const*) | bool AtomicExpandImpl::run(Function &F, const TargetMachine *TM) {
const auto *Subtarget = TM->getSubtargetImpl(F);
if (!Subtarget->enableAtomicExpand())
return false;
TLI = Subtarget->getTargetLowering();
DL = &F.getDataLayout();
SmallVector<Instruction *, 1> AtomicInsts;
// Changing control-flow whi... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x2b8, %rsp # imm = 0x2B8
movq %rsi, %r14
movq %rdi, %r15
movq (%rdx), %rax
movq %rdx, %rdi
callq *0x10(%rax)
movq %rax, %rbx
movq (%rax), %rax
movq %rbx, %rdi
callq *0x138(%rax)
testb %al, %al
je 0x16bbf84
movq (%rbx), %rax
movq %rbx, %... | /CodeGen/AtomicExpandPass.cpp |
llvm::expandAtomicRMWToCmpXchg(llvm::AtomicRMWInst*, llvm::function_ref<void (llvm::IRBuilderBase&, llvm::Value*, llvm::Value*, llvm::Value*, llvm::Align, llvm::AtomicOrdering, unsigned char, llvm::Value*&, llvm::Value*&)>) | bool llvm::expandAtomicRMWToCmpXchg(AtomicRMWInst *AI,
CreateCmpXchgInstFun CreateCmpXchg) {
ReplacementIRBuilder Builder(AI, AI->getDataLayout());
Builder.setIsFPConstrained(
AI->getFunction()->hasFnAttribute(Attribute::StrictFP));
// FIXME: If FP exceptions are observa... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x160, %rsp # imm = 0x160
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r12
leaq 0x50(%rsp), %r13
movq %rdi, (%r13)
callq 0x1a3f4d6
leaq 0x58(%rsp), %r15
movq %r15, %rdi
movq %r12, %rsi
movq %rax, %rdx
callq 0x16be6da
movq (%r13), %rdi
callq 0x1a3f4c... | /CodeGen/AtomicExpandPass.cpp |
(anonymous namespace)::CodeGenPrepare::fixupDbgVariableRecordsOnInst(llvm::Instruction&) | bool CodeGenPrepare::fixupDbgVariableRecordsOnInst(Instruction &I) {
bool AnyChange = false;
for (DbgVariableRecord &DVR : filterDbgVars(I.getDbgRecordRange()))
AnyChange |= fixupDbgVariableRecord(DVR);
return AnyChange;
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %rdi, 0x18(%rsp)
movq 0x40(%rsi), %rdi
testq %rdi, %rdi
je 0x16d0abc
callq 0x1a0e82e
movq %rax, %r14
movq %rdx, %r15
jmp 0x16d0ad7
leaq 0x41c3b65(%rip), %r14 # 0x5894628
addq $0x8, %r14
movq %r14, %r15
jmp 0x16d0ad7
cmpb $0x0, 0x2... | /CodeGen/CodeGenPrepare.cpp |
llvm::detail::DenseSetImpl<llvm::Value*, llvm::SmallDenseMap<llvm::Value*, llvm::detail::DenseSetEmpty, 4u, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseSetPair<llvm::Value*>>, llvm::DenseMapInfo<llvm::Value*, void>>::begin() | unsigned getNumEntries() const {
return NumEntries;
} | movl (%rdi), %ecx
leaq 0x8(%rdi), %rax
cmpl $0x1, %ecx
ja 0x16d9481
testl %ecx, %ecx
cmoveq 0x8(%rdi), %rax
movl $0x4, %ecx
cmovel 0x10(%rdi), %ecx
leaq (%rax,%rcx,8), %rax
movq %rax, %rdx
retq
testb $0x1, %cl
cmoveq 0x8(%rdi), %rax
movl $0x4, %ecx
cmovel 0x10(%rdi), %ecx
leaq (%rax,%rcx,8), %rdx
testl %ecx, %ecx
je 0x... | /llvm/ADT/DenseMap.h |
llvm::MapVector<llvm::AssertingVH<llvm::Value>, llvm::SmallVector<std::pair<llvm::AssertingVH<llvm::GetElementPtrInst>, long>, 32u>, llvm::DenseMap<llvm::AssertingVH<llvm::Value>, unsigned int, llvm::DenseMapInfo<llvm::AssertingVH<llvm::Value>, void>, llvm::detail::DenseMapPair<llvm::AssertingVH<llvm::Value>, unsigned ... | typename VectorType::iterator erase(typename VectorType::iterator Iterator) {
Map.erase(Iterator->first);
auto Next = Vector.erase(Iterator);
if (Next == Vector.end())
return Next;
// Update indices in the map.
size_t Index = Next - Vector.begin();
for (auto &I : Map) {
assert(I.sec... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
callq 0x16da762
leaq 0x18(%rbx), %rdi
movq %r14, %rsi
callq 0x16da79c
movq 0x18(%rbx), %rdi
movl 0x20(%rbx), %ecx
imulq $0x218, %rcx, %rcx # imm = 0x218
addq %rdi, %rcx
cmpq %rcx, %rax
je 0x16da69a
movq (%rbx), %r9
movl 0x10(%rbx), %r8d
movq %r8, %rs... | /llvm/ADT/MapVector.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::AssertingVH<llvm::Value>, unsigned int, llvm::DenseMapInfo<llvm::AssertingVH<llvm::Value>, void>, llvm::detail::DenseMapPair<llvm::AssertingVH<llvm::Value>, unsigned int>>, llvm::AssertingVH<llvm::Value>, unsigned int, llvm::DenseMapInfo<llvm::AssertingVH<llvm::Value>, void>, llv... | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %r14
movq %r14, %rdx
callq 0x16da6d0
movl 0x10(%rbx), %edx
shlq $0x4, %rdx
addq (%rbx), %rdx
testb %al, %al
movq (%r14), %rax
cmoveq %rdx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
| /llvm/ADT/DenseMap.h |
llvm::SmallVectorTemplateBase<std::pair<llvm::Value*, llvm::SmallVector<llvm::Instruction*, 16u>>, false>::push_back(std::pair<llvm::Value*, llvm::SmallVector<llvm::Instruction*, 16u>>&&) | void push_back(T &&Elt) {
T *EltPtr = reserveForParamAndGetAddress(Elt);
::new ((void *)this->end()) T(::std::move(*EltPtr));
this->set_size(this->size() + 1);
} | pushq %rbx
movq %rdi, %rbx
movl $0x1, %edx
callq 0x16dd648
movq (%rbx), %rcx
movl 0x8(%rbx), %edx
imulq $0x98, %rdx, %rdx
movq (%rax), %rsi
leaq (%rcx,%rdx), %rdi
addq $0x18, %rdi
movq %rsi, -0x18(%rdi)
movq %rdi, -0x10(%rdi)
movabsq $0x1000000000, %rsi # imm = 0x1000000000
movq %rsi, -0x8(%rdi)
cmpl $0x0, 0x10(%ra... | /llvm/ADT/SmallVector.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::BasicBlock*, llvm::Instruction*, llvm::DenseMapInfo<llvm::BasicBlock*, void>, llvm::detail::DenseMapPair<llvm::BasicBlock*, llvm::Instruction*>>, llvm::BasicBlock*, llvm::Instruction*, llvm::DenseMapInfo<llvm::BasicBlock*, void>, llvm::detail::DenseMapPair<llvm::BasicBlock*, llvm... | value_type& FindAndConstruct(const KeyT &Key) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return *TheBucket;
return *InsertIntoBucket(TheBucket, Key);
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq %r15, %rdx
callq 0x16dd844
movl %eax, %ecx
movq (%r15), %rax
testb %cl, %cl
jne 0x16dd83a
movq %r14, %rdi
movq %rbx, %rsi
movq %rbx, %rdx
movq %rax, %rcx
callq 0x16dd8d6
movq (%rbx), %rcx
movq %rcx, (%rax)
movq $... | /llvm/ADT/DenseMap.h |
llvm::DenseMap<llvm::BasicBlock*, llvm::CmpInst*, llvm::DenseMapInfo<llvm::BasicBlock*, void>, llvm::detail::DenseMapPair<llvm::BasicBlock*, llvm::CmpInst*>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
(anonymous namespace)::AddressingModeMatcher::matchScaledValue(llvm::Value*, long, unsigned int) | bool AddressingModeMatcher::matchScaledValue(Value *ScaleReg, int64_t Scale,
unsigned Depth) {
// If Scale is 1, then this is the same as adding ScaleReg to the addressing
// mode. Just process that directly.
if (Scale == 1)
return matchAddr(ScaleReg, Depth);
/... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xa8, %rsp
testq %rdx, %rdx
je 0x16dffb0
movq %rsi, %r15
movq %rdi, %r14
cmpq $0x1, %rdx
jne 0x16dffb7
movq %r14, %rdi
movq %r15, %rsi
movl %ecx, %edx
addq $0xa8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x16dec60
movb $... | /CodeGen/CodeGenPrepare.cpp |
(anonymous namespace)::AddressingModeMatcher::valueAlreadyLiveAtInst(llvm::Value*, llvm::Value*, llvm::Value*) | bool AddressingModeMatcher::valueAlreadyLiveAtInst(Value *Val,
Value *KnownLive1,
Value *KnownLive2) {
// If Val is either of the known-live values, we know it is live!
if (Val == nullptr || Val == KnownLive1 || Va... | pushq %r14
pushq %rbx
pushq %rax
testq %rsi, %rsi
sete %al
cmpq %rdx, %rsi
sete %dl
orb %al, %dl
cmpq %rcx, %rsi
sete %al
orb %dl, %al
jne 0x16e0408
movq %rsi, %rbx
movb (%rsi), %al
cmpb $0x1d, %al
setb %cl
cmpb $0x16, %al
setne %dl
testb %dl, %cl
jne 0x16e0408
movq %rdi, %r14
cmpb $0x3c, %al
jne 0x16e0412
movq %rbx, %... | /CodeGen/CodeGenPrepare.cpp |
IsOperandAMemoryOperand(llvm::CallInst*, llvm::InlineAsm*, llvm::Value*, llvm::TargetLowering const&, llvm::TargetRegisterInfo const&) | static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
const TargetLowering &TLI,
const TargetRegisterInfo &TRI) {
const Function *F = CI->getFunction();
TargetLowering::AsmOperandInfoVector TargetConstraints =
TLI... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rcx, %r15
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r12
callq 0x1a3f4cc
movq %rax, %rdi
callq 0x1a28d16
movq (%rbx), %r9
movq %rsp, %r13
movq %r13, %rdi
movq %rbx, %rsi
movq %rax, %rdx
movq %r15, %rcx
movq %r12, %r8
callq *0x940(... | /CodeGen/CodeGenPrepare.cpp |
llvm::DenseMapBase<llvm::SmallDenseMap<llvm::PHINode*, unsigned long, 32u, llvm::DenseMapInfo<llvm::PHINode*, void>, llvm::detail::DenseMapPair<llvm::PHINode*, unsigned long>>, llvm::PHINode*, unsigned long, llvm::DenseMapInfo<llvm::PHINode*, void>, llvm::detail::DenseMapPair<llvm::PHINode*, unsigned long>>::erase(llvm... | bool erase(const KeyT &Val) {
BucketT *TheBucket;
if (!LookupBucketFor(Val, TheBucket))
return false; // not in map.
TheBucket->getSecond().~ValueT();
TheBucket->getFirst() = getTombstoneKey();
decrementNumEntries();
incrementNumTombstones();
return true;
} | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
leaq 0x8(%rsp), %rdx
callq 0x16e174a
testb %al, %al
je 0x16e1bd4
movq 0x8(%rsp), %rcx
movq $-0x2000, (%rcx) # imm = 0xE000
addl $-0x2, (%rbx)
incl 0x4(%rbx)
addq $0x10, %rsp
popq %rbx
retq
| /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<std::pair<llvm::PHINode*, llvm::PHINode*>, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<std::pair<llvm::PHINode*, llvm::PHINode*>, void>, llvm::detail::DenseSetPair<std::pair<llvm::PHINode*, llvm::PHINode*>>>, std::pair<llvm::PHINode*, llvm::PHINode*>, llvm::detail::DenseSetEmp... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x16e253c
pushq %r15
pushq %r14
pushq %rbx
movq (%rdi), %rdi
movl (%rsi), %eax
movl 0x8(%rsi), %r8d
movl %eax, %r9d
shrl $0x4, %r9d
shrl $0x9, %eax
xorl %r9d, %eax
movl %r8d, %r9d
shrl $0x4, %r9d
shrl $0x9, %r8d
xorl %r9d, %r8d
shlq $0x20, %rax
orq %rax, %r8
movabsq $-0x40a7b89... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::Instruction const*, unsigned long, llvm::DenseMapInfo<llvm::Instruction const*, void>, llvm::detail::DenseMapPair<llvm::Instruction const*, unsigned long>>, llvm::Instruction const*, unsigned long, llvm::DenseMapInfo<llvm::Instruction const*, void>, llvm::detail::DenseMapPair<llv... | value_type& FindAndConstruct(const KeyT &Key) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return *TheBucket;
return *InsertIntoBucket(TheBucket, Key);
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq %r15, %rdx
callq 0x16e36e6
movl %eax, %ecx
movq (%r15), %rax
testb %cl, %cl
jne 0x16e3aac
movq %r14, %rdi
movq %rbx, %rsi
movq %rbx, %rdx
movq %rax, %rcx
callq 0x16e3778
movq (%rbx), %rcx
movq %rcx, (%rax)
movq $... | /llvm/ADT/DenseMap.h |
llvm::MemTransferBase<llvm::MemIntrinsic>::setSourceAlignment(llvm::Align) | void setSourceAlignment(Align Alignment) {
BaseCL::removeParamAttr(ARG_SOURCE, Attribute::Alignment);
BaseCL::addParamAttr(ARG_SOURCE, Attribute::getWithAlignment(
BaseCL::getContext(), Alignment));
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x10, %rsp
movl %esi, %ebp
movq %rdi, %rbx
leaq 0x48(%rdi), %r14
callq 0x1a8ff24
movq %r14, %rdi
movq %rax, %rsi
movl $0x2, %edx
movl $0x51, %ecx
callq 0x199bb04
movq %rax, 0x48(%rbx)
movq %rbx, %rdi
callq 0x1a8ff24
movq %rax, %rdi
movl %ebp, %esi
callq 0x199... | /llvm/IR/IntrinsicInst.h |
llvm::detail::DenseSetImpl<llvm::Value*, llvm::SmallDenseMap<llvm::Value*, llvm::detail::DenseSetEmpty, 4u, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseSetPair<llvm::Value*>>, llvm::DenseMapInfo<llvm::Value*, void>>::DenseSetImpl<llvm::location_op_iterator>(llvm::location_op_iterator const&, llvm::locati... | DenseSetImpl(const InputIt &I, const InputIt &E)
: DenseSetImpl(PowerOf2Ceil(std::distance(I, E))) {
insert(I, E);
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
movq (%rsi), %rdx
movq (%r14), %rcx
xorl %esi, %esi
xorl %eax, %eax
cmpq %rcx, %rdx
je 0x16e431a
movq %rdx, %rdi
movq %rdx, %r8
andq $-0x4, %r8
addq $0x8, %r8
andq $-0x8, %rdi
addq $0x88, %rdi
testb $0x4, %dl
cmovneq %r8, ... | /llvm/ADT/DenseSet.h |
llvm::DenseMap<llvm::Value*, llvm::Instruction*, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseMapPair<llvm::Value*, llvm::Instruction*>>::init(unsigned int) | void init(unsigned InitNumEntries) {
auto InitBuckets = BaseT::getMinBucketToReserveForEntries(InitNumEntries);
if (allocateBuckets(InitBuckets)) {
this->BaseT::initEmpty();
} else {
NumEntries = 0;
NumTombstones = 0;
}
} | pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
testl %esi, %esi
je 0x16e58f8
shll $0x2, %esi
movl $0xaaaaaaab, %eax # imm = 0xAAAAAAAB
imulq %rsi, %rax
shrq $0x21, %rax
incl %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ec... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::BasicBlock*, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::BasicBlock*, void>, llvm::detail::DenseSetPair<llvm::BasicBlock*>>, llvm::BasicBlock*, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::BasicBlock*, void>, llvm::detail::DenseSetPair<llvm::BasicBlock*>>:... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x16e6818
pushq %rbx
movq (%rdi), %rdi
movl (%rsi), %r8d
movl %r8d, %eax
shrl $0x4, %eax
shrl $0x9, %r8d
xorl %eax, %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %r10d
xorl %r9d, %r9d
movl %r8d, %r11d
leaq (%rdi,%r11,8), %r11
movq (%r11), %rbx
cmpq %rbx, (%rsi)
jne 0x16e67df
movq %... | /llvm/ADT/DenseMap.h |
llvm::SmallVectorImpl<llvm::GCRelocateInst*>::assignRemote(llvm::SmallVectorImpl<llvm::GCRelocateInst*>&&) | void assignRemote(SmallVectorImpl &&RHS) {
this->destroy_range(this->begin(), this->end());
if (!this->isSmall())
free(this->begin());
this->BeginX = RHS.BeginX;
this->Size = RHS.Size;
this->Capacity = RHS.Capacity;
RHS.resetToSmall();
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %rdi
leaq 0x10(%r14), %rax
cmpq %rax, %rdi
je 0x16e74e1
callq 0x751980
movq (%rbx), %rax
movq %rax, (%r14)
movq 0x8(%rbx), %rax
movq %rax, 0x8(%r14)
leaq 0x10(%rbx), %rax
movq %rax, (%rbx)
movq $0x0, 0x8(%rbx)
addq $0x8, %rsp
popq %rbx
popq %... | /llvm/ADT/SmallVector.h |
llvm::cl::opt<llvm::CodeModel::Model, false, llvm::cl::parser<llvm::CodeModel::Model>>::opt<char [11], llvm::cl::desc, llvm::cl::ValuesClass>(char const (&) [11], llvm::cl::desc const&, llvm::cl::ValuesClass const&) | explicit opt(const Mods &... Ms)
: Option(llvm::cl::Optional, NotHidden), Parser(*this) {
apply(this, Ms...);
done();
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
xorl %esi, %esi
xorl %edx, %edx
callq 0x7c77e2
movl $0x0, 0x80(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, 0x88(%rbx)
movb $0x0, 0x94(%rbx)
leaq 0x40fd67b(%rip), %rax # 0x57e6c50
addq $0x10, %rax
movq %ra... | /llvm/Support/CommandLine.h |
llvm::SmallVectorTemplateBase<llvm::cl::parser<llvm::DenormalMode::DenormalModeKind>::OptionInfo, false>::grow(unsigned long) | void SmallVectorTemplateBase<T, TriviallyCopyable>::grow(size_t MinSize) {
size_t NewCapacity;
T *NewElts = mallocForGrow(MinSize, NewCapacity);
moveElementsForGrow(NewElts);
takeAllocationForGrow(NewElts, NewCapacity);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rdx
movq %rdi, %rbx
leaq 0x10(%rdi), %r14
movq %rsp, %r8
movl $0x30, %ecx
movq %r14, %rsi
callq 0x1cba3de
movq %rax, %r15
movl 0x8(%rbx), %ecx
testq %rcx, %rcx
je 0x16f00a4
movq (%rbx), %rax
leaq (%rcx,%rcx,2), %rcx
shlq $0x4, %rcx
addq %rax, %rcx
xorl ... | /llvm/ADT/SmallVector.h |
void llvm::cl::apply<llvm::cl::opt<unsigned int, false, llvm::cl::parser<unsigned int>>, char [9], llvm::cl::desc, llvm::cl::initializer<int>>(llvm::cl::opt<unsigned int, false, llvm::cl::parser<unsigned int>>*, char const (&) [9], llvm::cl::desc const&, llvm::cl::initializer<int> const&) | void apply(Opt *O, const Mod &M, const Mods &... Ms) {
applicator<Mod>::opt(M, *O);
apply(O, Ms...);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %r12
movq %rsi, %rdi
callq 0x7512e0
movq %r12, %rdi
movq %r15, %rsi
movq %rax, %rdx
callq 0x1c90c20
movups (%r14), %xmm0
movups %xmm0, 0x20(%r12)
movq (%rbx), %rax
movl (%rax), %eax
movl %eax, 0x80(%r12)
mo... | /llvm/Support/CommandLine.h |
void llvm::cl::ValuesClass::apply<llvm::cl::opt<llvm::EABI, false, llvm::cl::parser<llvm::EABI>>>(llvm::cl::opt<llvm::EABI, false, llvm::cl::parser<llvm::EABI>>&) const | size_t size() const { return Size; } | movl 0x8(%rdi), %eax
testq %rax, %rax
je 0x16f0de9
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq (%rdi), %r14
leaq (%rax,%rax,4), %rax
leaq (%r14,%rax,8), %r15
addq $0x98, %rbx
movq (%r14), %rsi
movq 0x8(%r14), %rdx
leaq 0x10(%r14), %rcx
movq 0x18(%r14), %r8
movq 0x20(%r14), %r9
movq %rbx, %rdi
callq 0x16f0dea
... | /llvm/ADT/SmallVector.h |
(anonymous namespace)::EarlyIfPredicator::getAnalysisUsage(llvm::AnalysisUsage&) const | void EarlyIfPredicator::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addPreserved<MachineLoopInfoWra... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x41cc51b(%rip), %rsi # 0x58cc270
movq %rbx, %rdi
callq 0x1a7c8da
leaq 0x41ccb5c(%rip), %r15 # 0x58cc8c0
movq %rbx, %rdi
movq %r15, %rsi
callq 0x1a7c8da
leaq 0x70(%rbx), %r12
movq %rbx, %rdi
movq %r12, %rsi
movq %r15, %rdx
c... | /CodeGen/EarlyIfConversion.cpp |
llvm::ExecutionDomainFix::leaveBasicBlock(llvm::LoopTraversal::TraversedMBBInfo const&) | void ExecutionDomainFix::leaveBasicBlock(
const LoopTraversal::TraversedMBBInfo &TraversedMBB) {
assert(!LiveRegs.empty() && "Must enter basic block first.");
unsigned MBBNumber = TraversedMBB.MBB->getNumber();
assert(MBBNumber < MBBOutRegsInfos.size() &&
"Unexpected basic block number.");
// Save ... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq (%rsi), %rax
movl 0x18(%rax), %eax
movq 0x180(%rdi), %rcx
leaq (%rax,%rax,2), %r14
movq (%rcx,%r14,8), %r15
movq 0x8(%rcx,%r14,8), %r12
cmpq %r12, %r15
je 0x17018fd
movq (%r15), %rsi
movq %rbx, %rdi
callq 0x1701438
addq $0x8, %r15
jmp 0x17018e7... | /CodeGen/ExecutionDomainFix.cpp |
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