sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15
values |
|---|---|---|---|---|---|
// Demangled: finish(int*, int)
Function : _Z6finishPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R2, c[0x0][0x388] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R2, 0x2, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
IADD3 R3, PT, PT, R2.reuse, -0x2, RZ ?trans2;
IADD3 R2, PT, PT, R2, -0x1, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
ISETP.GE.U32.AND P0, PT, R3, 0x7, PT ?trans1;
LOP3.LUT R18, R2, 0x7, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x520 ?trans5;
LOP3.LUT R10, R2, 0xfffffff8, RZ, 0xc0, !PT ?trans1;
MOV R8, RZ ?trans1;
MOV R3, 0x1000 ?trans1;
MOV R9, R0 &req={0} ?trans1;
IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x380] &req={2} &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R3, -0xc00, RZ ?trans2;
IADD3 R13, PT, PT, R9, 0x400, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R6 ?trans1;
LDG.E R11, desc[UR4][R4.64+-0x4] &req={1} &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R9, 0x800, RZ ?trans2;
IADD3 R11, PT, PT, R11, R14, RZ &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R14, R15, 0x4, R6 ?trans2;
STG.E desc[UR4][R12.64], R11 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R16, desc[UR4][R4.64+0xffc] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R14.64] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R9, 0xc00, RZ ?WAIT2_END_GROUP;
IADD3 R19, PT, PT, R16, R17, RZ &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R16, R21, 0x4, R6 ?trans2;
STG.E desc[UR4][R14.64], R19 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R20, desc[UR4][R4.64+0x1ffc] &wr=0x2 ?trans4;
LDG.E R21, desc[UR4][R16.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R9, 0x1000, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R6 ?trans1;
IADD3 R21, PT, PT, R20, R21, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R16.64], R21 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R11, desc[UR4][R4.64+0x2ffc] &wr=0x2 ?trans4;
LDG.E R20, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R15, PT, PT, R9, 0x1400, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R14, R15, 0x4, R6 ?trans1;
IADD3 R11, PT, PT, R11, R20, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R11 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R19, desc[UR4][R4.64+0x3ffc] &wr=0x2 ?trans4;
LDG.E R20, desc[UR4][R14.64] &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R9, 0x1800, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R6 ?trans1;
IADD3 R19, PT, PT, R19, R20, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R19 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R20, desc[UR4][R4.64+0x4ffc] &wr=0x2 ?trans4;
LDG.E R21, desc[UR4][R16.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R9, 0x1c00, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R6 ?trans1;
IADD3 R21, PT, PT, R20, R21, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R16.64], R21 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R11, desc[UR4][R4.64+0x5ffc] &wr=0x3 ?trans4;
LDG.E R20, desc[UR4][R12.64] &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R9, 0x2000, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R6, R9, 0x4, R6 ?trans1;
IADD3 R11, PT, PT, R11, R20, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R11 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R14, desc[UR4][R4.64+0x6ffc] &req={0} &wr=0x3 ?trans4;
LDG.E R15, desc[UR4][R6.64] &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R10, 0x8, RZ ?WAIT2_END_GROUP;
IADD3 R8, PT, PT, R8, 0x8, RZ ?trans2;
IADD3 R3, PT, PT, R3, 0x2000, RZ ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
IADD3 R15, PT, PT, R14, R15, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R15 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x110 ?trans5;
IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT13_END_GROUP;
@!P0 EXIT &req={1} ?trans5;
ISETP.GE.U32.AND P0, PT, R18, 0x4, PT ?trans1;
LOP3.LUT R20, R2, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R20, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x780 ?trans6;
LDC.64 R6, c[0x0][0x380] &req={2} &wr=0x1 ?trans1;
IMAD.SHL.U32 R5, R8, 0x400, RZ ?WAIT5_END_GROUP;
LOP3.LUT R9, R5.reuse, R0, RZ, 0xfc, !PT &req={0} ?trans1;
IMAD.WIDE R4, R5, 0x4, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R9.reuse, 0x4, R6 ?trans1;
LDG.E R3, desc[UR4][R4.64+-0x4] &wr=0x2 ?trans4;
LDG.E R12, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R9, 0x400, RZ ?trans2;
IADD3 R3, PT, PT, R3, R12, RZ &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R12, R13, 0x4, R6 ?trans2;
STG.E desc[UR4][R10.64], R3 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R14, desc[UR4][R4.64+0xffc] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD3 R19, PT, PT, R9, 0x800, RZ ?WAIT2_END_GROUP;
IADD3 R17, PT, PT, R14, R15, RZ &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R14, R19, 0x4, R6 ?trans2;
STG.E desc[UR4][R12.64], R17 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R16, desc[UR4][R4.64+0x1ffc] &wr=0x2 ?trans4;
LDG.E R19, desc[UR4][R14.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R9, 0xc00, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R6, R9, 0x4, R6 ?trans1;
IADD3 R19, PT, PT, R16, R19, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R19 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R3, desc[UR4][R4.64+0x2ffc] &req={0} &wr=0x2 ?trans4;
LDG.E R10, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R3, PT, PT, R3, R10, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R3 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R20, 0x1, PT ?trans1;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x8f0 ?trans6;
LDC.64 R2, c[0x0][0x380] &req={1} &wr=0x1 ?trans1;
IMAD.SHL.U32 R5, R8, 0x400, RZ ?WAIT5_END_GROUP;
LOP3.LUT R11, R5.reuse, R0, RZ, 0xfc, !PT &req={2,0} ?trans1;
IMAD.WIDE R4, R5, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R11.reuse, 0x4, R2 ?trans1;
LDG.E R9, desc[UR4][R4.64+-0x4] &wr=0x2 ?trans4;
LDG.E R10, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, 0x400, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R11, 0x4, R2 ?trans1;
IADD3 R9, PT, PT, R9, R10, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 &rd=0x3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R10, desc[UR4][R4.64+0xffc] &wr=0x2 ?trans4;
LDG.E R11, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x2, RZ ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R10, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 &rd=0x3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD.SHL.U32 R3, R8, 0x400, RZ &req={3,1} ?WAIT5_END_GROUP;
LOP3.LUT R7, R3.reuse, R0, RZ, 0xfc, !PT &req={2,0} ?trans1;
IMAD.WIDE R2, R3, 0x4, R4 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans2;
LDG.E R2, desc[UR4][R2.64+-0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R2, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x9b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: finish(int*, int)
_Z6finishPii:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 2
s_cbranch_scc1 .LBB1_3
s_load_b64 s[0:1], s[0:1], 0x0
v_or_b32_e32 v0, 0x400, v0
v_mov_b32_e32 v1, 0
s_add_i32 s4, s2, -1
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s0, 0xffc
s_addc_u32 s3, s1, 0
.LBB1_2:
v_lshlrev_b64 v[2:3], 2, v[0:1]
s_add_i32 s4, s4, -1
v_add_nc_u32_e32 v0, 0x400, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v4, v1, s[2:3]
global_load_b32 v5, v[2:3], off
s_add_u32 s2, s2, 0x1000
s_addc_u32 s3, s3, 0
s_cmp_eq_u32 s4, 0
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, v5, v4
global_store_b32 v[2:3], v4, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
.LBB1_3:
s_endpgm
| finish | 4,192 | 485 | stackv2-00001-of-00015 |
// Demangled: scan(int*, int*, int)
Function : _Z4scanPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R6, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R5, 0x1, P0 ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
@!P0 IADD3 R7, PT, PT, R5, -0x1, RZ ?WAIT5_END_GROUP;
@!P0 IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E R2, desc[UR6][R2.64] &req={3} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P1, PT, R6, 0x2, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R0, R9, UR4, 0x2 ?trans2;
@!P0 I2FP.F32.S32 R7, R2 &req={2} ?WAIT5_END_GROUP;
@!P0 STS [R0], R7 &rd=0x1 ?trans4;
@P0 STS [UR4], RZ ?trans1;
@!P1 BRA 0x250 &req={0} ?trans5;
UMOV UR5, 0x1 ?WAIT5_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R9, UR5, PT ?WAIT13_END_GROUP;
@P0 IADD3 R2, PT, PT, R9, -UR5, RZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, UR5, URZ ?WAIT3_END_GROUP;
@P0 LEA R2, R2, UR4, 0x2 ?WAIT6_END_GROUP;
@P0 LDS R2, [R2] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 LDS R7, [R0] &req={1} &wr=0x1 ?trans1;
@P0 F2I.TRUNC.NTZ R3, R2 &req={0} &wr=0x0 ?trans2;
@P0 I2FP.F32.S32 R4, R3 &req={0} ?WAIT5_END_GROUP;
@P0 FADD R7, R4, R7 &req={1} ?WAIT5_END_GROUP;
@P0 STS [R0], R7 &rd=0x0 ?trans1;
ISETP.LE.U32.AND P0, PT, R6, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x170 &req={0} ?trans5;
LDCU UR4, c[0x0][0x390] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R5, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDS R0, [R0] &req={1} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?trans1;
F2I.TRUNC.NTZ R7, R0 &req={0} &wr=0x0 ?trans4;
STG.E desc[UR6][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x2f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: scan(int*, int*, int)
_Z4scanPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s5, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_cmp_le_i32_e64 s2, s5, v1
v_cmp_gt_i32_e64 s3, 1, v1
v_cmp_gt_i32_e32 vcc_lo, s5, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, s2, s3
s_and_saveexec_b32 s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s3
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v2, 0
ds_store_b32 v2, v2
.LBB0_2:
s_or_saveexec_b32 s5, s2
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 2, v0
s_xor_b32 exec_lo, exec_lo, s5
s_cbranch_execz .LBB0_4
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, s0, s0, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s1, v5, s0
global_load_b32 v2, v[4:5], off offset:-4
s_waitcnt vmcnt(0)
v_cvt_f32_i32_e32 v2, v2
ds_store_b32 v3, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s5
s_cmp_lt_u32 s4, 2
s_cbranch_scc1 .LBB0_11
s_waitcnt lgkmcnt(0)
s_mov_b32 s1, 1
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_le_u32_e64 s0, s1, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s5, s0
s_cbranch_execz .LBB0_8
v_subrev_nc_u32_e32 v2, s1, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v2, 2, v2
ds_load_b32 v2, v2
s_waitcnt lgkmcnt(0)
v_cvt_i32_f32_e32 v2, v2
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s5
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s5, s0
s_cbranch_execz .LBB0_10
ds_load_b32 v4, v3
v_cvt_f32_i32_e32 v5, v2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v4, v4, v5
ds_store_b32 v3, v4
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s5
s_lshl_b32 s1, s1, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_u32 s1, s4
s_cbranch_scc0 .LBB0_6
.LBB0_11:
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB0_13
ds_load_b32 v3, v3
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_waitcnt lgkmcnt(0)
v_cvt_i32_f32_e32 v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| scan | 1,187 | 1,338 | stackv2-00001-of-00015 |
// Demangled: foo(int*)
Function : _Z3fooPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 4.17232513427734375e-07 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x60;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: foo(int*)
_Z3fooPi:
s_load_b64 s[0:1], s[0:1], 0x0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 7
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| foo | 215 | 102 | stackv2-00001-of-00015 |
// Demangled: reduce_pi(float*)
Function : _Z9reduce_piPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R9, UR6, R6 &req={1} ?WAIT4_END_GROUP;
IMAD R11, R3, 0x7d0, RZ ?trans1;
MOV R3, RZ ?trans1;
IMAD.WIDE.U32 R4, R2, 0x7d0, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R5, R11, RZ ?trans2;
LOP3.LUT R4, R4, 0xf, RZ, 0xfc, !PT &req={0} ?WAIT7_END_GROUP;
IADD.64 R10, R4, -0xe ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, R8, 0x8, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x1e0 ?trans1;
I2F.U64 R13, R10 &wr=0x0 ?trans3;
ISETP.NE.AND P2, PT, R8, 0x3e8, PT ?trans1;
IADD3 R0, PT, PT, R13, 0x1800000, RZ &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x190 ?trans5;
MOV R0, R13 ?trans1;
MOV R12, 0x180 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xd70 ?trans5;
BRA 0x1d0 ?trans5;
MUFU.RCP R2, R13 &wr=0x0 ?trans2;
FFMA R0, R13, R2, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R11, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R2, R2, R11, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R10, R4, -0xc ?trans2;
UMOV UR4, 0x3f800000 ?trans1;
BSSY.RECONVERGENT B0, 0x310 ?trans1;
MOV R14, UR4 ?trans1;
FADD R2, R2, R3 ?trans2;
I2F.U64 R11, R10 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R10, -RZ, RZ, -1.875, 0 &req={0} ?trans1;
MUFU.RCP R0, R11 &req={1} &wr=0x0 ?trans1;
FCHK P0, -R14, R11 &wr=0x1 ?trans1;
FFMA R13, -R11, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R13, R0 ?WAIT4_END_GROUP;
FFMA R13, R0, -1, RZ ?WAIT4_END_GROUP;
FFMA R12, -R11, R13, -1 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, R13 ?trans1;
@!P0 BRA 0x300 &req={1} ?trans6;
MOV R3, R11 ?trans1;
MOV R12, 0x300 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x10c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R12, R4, -0xa ?trans2;
BSSY.RECONVERGENT B0, 0x420 ?trans1;
FADD R3, R2, R3 ?WAIT4_END_GROUP;
I2F.U64 R13, R12 &wr=0x0 ?trans2;
IADD3 R0, PT, PT, R13, 0x1800000, RZ &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x3d0 ?trans5;
MOV R0, R13 ?trans1;
MOV R12, 0x3c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xd70 ?trans5;
BRA 0x410 ?trans5;
MUFU.RCP R2, R13 &wr=0x0 ?trans2;
FFMA R0, R13, R2, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R11, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R2, R2, R11, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R12, R4, -0x8 ?trans2;
UMOV UR4, 0x3f800000 ?trans1;
BSSY.RECONVERGENT B0, 0x540 ?trans1;
MOV R15, UR4 ?trans1;
FADD R2, R3, R2 ?trans2;
I2F.U64 R12, R12 &wr=0x0 ?trans2;
MUFU.RCP R0, R12 &req={0} &wr=0x0 ?trans1;
FCHK P0, -R15, R12 &wr=0x1 ?trans1;
FFMA R11, -R12, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R11, R0 ?WAIT4_END_GROUP;
FFMA R11, R0, -1, RZ ?WAIT4_END_GROUP;
FFMA R14, -R12, R11, -1 ?WAIT4_END_GROUP;
FFMA R3, R0, R14, R11 ?trans1;
@!P0 BRA 0x530 &req={1} ?trans6;
MOV R3, R12 ?trans1;
MOV R12, 0x530 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x10c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R12, R4, -0x6 ?trans2;
BSSY.RECONVERGENT B0, 0x650 ?trans1;
FADD R3, R2, R3 ?WAIT4_END_GROUP;
I2F.U64 R13, R12 &wr=0x0 ?trans2;
IADD3 R0, PT, PT, R13, 0x1800000, RZ &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x600 ?trans5;
MOV R0, R13 ?trans1;
MOV R12, 0x5f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xd70 ?trans5;
BRA 0x640 ?trans5;
MUFU.RCP R2, R13 &wr=0x0 ?trans2;
FFMA R0, R13, R2, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R11, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R2, R2, R11, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R12, R4, -0x4 ?trans2;
UMOV UR4, 0x3f800000 ?trans1;
BSSY.RECONVERGENT B0, 0x770 ?trans1;
MOV R15, UR4 ?trans1;
FADD R2, R3, R2 ?trans2;
I2F.U64 R12, R12 &wr=0x0 ?trans2;
MUFU.RCP R0, R12 &req={0} &wr=0x0 ?trans1;
FCHK P0, -R15, R12 &wr=0x1 ?trans1;
FFMA R11, -R12, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R11, R0 ?WAIT4_END_GROUP;
FFMA R11, R0, -1, RZ ?WAIT4_END_GROUP;
FFMA R14, -R12, R11, -1 ?WAIT4_END_GROUP;
FFMA R3, R0, R14, R11 ?trans1;
@!P0 BRA 0x760 &req={1} ?trans6;
MOV R3, R12 ?trans1;
MOV R12, 0x760 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x10c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R12, R4, -0x2 ?trans2;
BSSY.RECONVERGENT B0, 0x880 ?trans1;
FADD R3, R2, R3 ?WAIT4_END_GROUP;
I2F.U64 R13, R12 &wr=0x0 ?trans2;
IADD3 R0, PT, PT, R13, 0x1800000, RZ &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x830 ?trans5;
MOV R0, R13 ?trans1;
MOV R12, 0x820 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xd70 ?trans5;
BRA 0x870 ?trans5;
MUFU.RCP R2, R13 &wr=0x0 ?trans2;
FFMA R0, R13, R2, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R11, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R2, R2, R11, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
I2F.U64 R13, R4 &wr=0x0 ?trans1;
UMOV UR4, 0x3f800000 ?trans1;
BSSY.RECONVERGENT B0, 0x990 ?trans1;
MOV R14, UR4 ?trans1;
FADD R2, R3, R2 ?trans1;
MUFU.RCP R0, R13 &req={0} &wr=0x0 ?trans2;
FCHK P0, -R14, R13 &wr=0x1 ?trans1;
FFMA R11, -R13, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R11, R0 ?WAIT4_END_GROUP;
FFMA R11, R0, -1, RZ ?WAIT4_END_GROUP;
FFMA R12, -R13, R11, -1 ?WAIT4_END_GROUP;
FFMA R3, R0, R12, R11 ?trans1;
@!P0 BRA 0x980 &req={1} ?trans6;
MOV R3, R13 ?trans1;
MOV R12, 0x980 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x10c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R4, R4, 0x10 ?trans2;
FADD R3, R2, R3 ?trans1;
@P2 BRA 0xc0 ?trans6;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R9, 0x42, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R6, 0x1f, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R0, R6, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R0], R3 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0xb00 ?trans5;
SHF.R.U32.HI R5, RZ, 0x1, R9 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, R5, PT ?WAIT13_END_GROUP;
@!P0 IMAD R2, R5, 0x4, R0 ?trans1;
@!P0 LDS R3, [R0] &req={0} ?trans5;
@!P0 LDS R2, [R2] &wr=0x0 ?trans2;
@!P0 FADD R3, R2, R3 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R3 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R9, 0x83, PT ?trans1;
MOV R9, R5 ?WAIT12_END_GROUP;
@P0 BRA 0xa50 &req={1} ?trans5;
@P1 EXIT ?trans5;
LDS R2, [R0+0x80] ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT3_END_GROUP;
LDS R3, [R0] &req={0} &wr=0x0 ?trans2;
FADD R3, R2, R3 &req={0} ?WAIT5_END_GROUP;
STS [R0], R3 ?trans4;
LDS R2, [R0+0x40] ?trans4;
LDS R5, [R0] &wr=0x0 ?trans2;
FADD R5, R2, R5 &req={0} ?WAIT5_END_GROUP;
STS [R0], R5 ?trans4;
LDS R2, [R0+0x20] ?trans4;
LDS R7, [R0] &wr=0x0 ?trans2;
FADD R7, R2, R7 &req={0} ?WAIT5_END_GROUP;
STS [R0], R7 ?trans4;
LDS R2, [R0+0x10] ?trans4;
LDS R9, [R0] &wr=0x0 ?trans2;
FADD R9, R2, R9 &req={0} ?WAIT5_END_GROUP;
STS [R0], R9 ?trans4;
LDS R2, [R0+0x8] ?trans4;
LDS R3, [R0] &wr=0x0 ?trans2;
FADD R3, R2, R3 &req={0} ?WAIT5_END_GROUP;
STS [R0], R3 ?trans4;
LDS R2, [R0+0x4] ?trans4;
LDS R5, [R0] &wr=0x0 ?trans2;
FADD R5, R2, R5 &req={0} ?WAIT5_END_GROUP;
STS [R0], R5 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT9_END_GROUP;
LDS R5, [UR4] &req={0} &wr=0x2 ?trans2;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans2;
ULEA UR4, UP0, UR6, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR5, UR6, UR5, URZ, 0x2, UP0 ?trans2;
MOV R2, UR4 ?WAIT4_END_GROUP;
MOV R3, UR5 ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
IMAD.SHL.U32 R2, R0, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x1090 ?trans4;
SHF.R.U32.HI R15, RZ, 0x18, R2 ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R15, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0xe60 ?trans5;
IMAD.SHL.U32 R2, R0, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@P0 FFMA R13, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MUFU.RCP R11, R0 ?trans3;
@P0 MUFU.RCP R2, R13 &wr=0x0 ?trans2;
@P0 FFMA R14, R13, R2, -1 &req={0} ?WAIT4_END_GROUP;
@P0 FADD.FTZ R15, -R14, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R2, R2, R15, R2 ?WAIT4_END_GROUP;
@P0 FFMA R11, R2, 1.84467440737095516160e+19, RZ ?trans1;
BRA 0x1080 ?trans6;
IADD3 R16, PT, PT, R15, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1070 ?trans5;
LOP3.LUT R2, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x3f800000, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
MUFU.RCP R11, R2 &wr=0x0 ?trans2;
FFMA R13, R2, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R14, -R13, -RZ ?WAIT4_END_GROUP;
FFMA.RM R13, R11.reuse, R14.reuse, R11.reuse ?trans1;
FFMA.RP R14, R11, R14, R11 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 1.78813934326171875e-07 ?WAIT4_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R13.reuse, R14, PT ?trans1;
LOP3.LUT R13, R13, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.L.U32 R14, R11, R16, RZ ?trans2;
LOP3.LUT R13, R13, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R11, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R14, R14, R13, RZ, 0xc0, !PT ?trans2;
IADD3 R2, PT, PT, -R11, RZ, RZ ?trans2;
SHF.R.U32.HI R14, RZ, R16.reuse, R14 ?trans2;
LOP3.LUT P1, RZ, R2, R16, R13, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R14.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P3, RZ, R14, 0x2, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, P3, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R2, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans1;
IADD3 R2, PT, PT, R15, -0xfc, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R11, RZ, R2, R13 ?WAIT8_END_GROUP;
@!P0 IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.SHL.U32 R11, R11, 0x2, RZ ?WAIT5_END_GROUP;
LOP3.LUT R11, R11, 0x80000000, R0, 0xf8, !PT ?trans1;
BRA 0x1080 ?trans6;
MUFU.RCP R11, R0 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R11 &req={1} ?WAIT3_END_GROUP;
RET.REL.NODEC R12 0x0 &req={0} ?trans5;
SHF.R.U32.HI R11, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x1720 ?trans1;
SHF.R.U32.HI R0, RZ, 0x17, R10 ?trans2;
LOP3.LUT R19, R11, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R11, R0, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R13, 0xbf800000 ?trans1;
IADD3 R16, PT, PT, R19, -0x1, RZ ?trans2;
IADD3 R15, PT, PT, R11, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R15, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R14, RZ ?trans1;
@!P0 BRA 0x1300 ?trans6;
HFMA2 R0, -RZ, RZ, -1.875, 0 ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT4_END_GROUP;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1700 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R13, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x16e0 ?trans5;
FSETP.NEU.FTZ.AND P3, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P3, 0x16e0 ?trans5;
LOP3.LUT P3, RZ, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P3, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x16c0 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1690 ?trans5;
ISETP.GE.AND P0, PT, R15, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R16, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R14, RZ ?trans1;
@!P0 MOV R14, 0xffffffc0 ?trans1;
@!P0 FFMA R13, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R14, PT, PT, R14, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R19, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1680 ?trans1;
IADD3 R16, PT, PT, R11, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R0, R3, RZ ?WAIT3_END_GROUP;
IMAD R0, R16, -0x800000, R13 ?trans1;
MUFU.RCP R15, R3 &wr=0x0 ?trans1;
FADD.FTZ R17, -R3, -RZ ?WAIT4_END_GROUP;
FFMA R18, R15, R17, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R20, R15, R18, R15 ?WAIT4_END_GROUP;
FFMA R11, R0, R20, RZ ?WAIT4_END_GROUP;
FFMA R18, R17, R11, R0 ?WAIT4_END_GROUP;
FFMA R13, R20, R18, R11 ?trans1;
IADD3 R11, PT, PT, R16, 0x7f, -R19 ?WAIT3_END_GROUP;
FFMA R18, R17, R13, R0 ?trans1;
IADD3 R11, PT, PT, R11, R14, RZ ?WAIT3_END_GROUP;
FFMA R0, R20, R18, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R3, R11, RZ ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R15, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1660 ?trans5;
ISETP.GT.AND P0, PT, R15, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1630 ?trans5;
ISETP.GE.AND P0, PT, R15, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1670 ?trans5;
ISETP.GE.AND P0, PT, R15, -0x18, PT ?trans1;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1670 ?trans5;
FFMA.RZ R3, R20.reuse, R18.reuse, R13.reuse ?trans1;
IADD3 R16, PT, PT, R15.reuse, 0x20, RZ ?trans1;
FFMA.RM R14, R20, R18, R13 ?trans1;
ISETP.NE.AND P1, PT, R15.reuse, RZ, PT ?trans1;
ISETP.NE.AND P3, PT, R15, RZ, PT ?trans1;
LOP3.LUT R3, R3, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R3, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R3, R20, R18, R13 ?trans1;
IADD3 R13, PT, PT, -R15, RZ, RZ ?trans2;
SHF.L.U32 R16, R11, R16, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R3, R14, PT ?trans1;
SEL R14, R13, RZ, P3 ?trans2;
ISETP.NE.AND P1, PT, R16, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R14, RZ, R14, R11 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R16, RZ, 0x1, R14 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R16, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R14, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R16, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R3, R0, RZ, 0xfc, !PT ?trans1;
BRA 0x1670 ?trans6;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1670 ?trans6;
IMAD R0, R11, 0x800000, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1710 ?trans5;
LOP3.LUT R0, R3, 0x80000000, R13, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1710 ?trans6;
LOP3.LUT R0, R3, 0x80000000, R13, 0x48, !PT ?trans1;
BRA 0x1710 ?trans6;
MUFU.RSQ R0, -QNAN &wr=0x0 ?trans1;
BRA 0x1710 ?trans5;
FADD.FTZ R0, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R3, R0 &req={0} ?WAIT3_END_GROUP;
RET.REL.NODEC R12 0x0 ?trans5;
BRA 0x1750;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reduce_pi(float*)
_Z9reduce_piPf:
s_load_b32 s9, s[0:1], 0x14
v_mov_b32_e32 v1, 0
s_mov_b32 s4, s15
s_mov_b32 s3, 0
s_mov_b64 s[6:7], 0
s_mov_b32 s5, s3
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s9, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s8, s4, v[0:1]
v_mad_u64_u32 v[4:5], null, 0x7d0, v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v2, v5
v_mad_u64_u32 v[5:6], null, 0x7d0, v3, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_or_b32_e32 v2, 1, v4
v_mov_b32_e32 v3, v5
.LBB0_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_clz_i32_u32_e32 v4, v3
s_and_b32 s2, s6, 1
s_cmp_eq_u64 s[2:3], 0
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_min_u32_e32 v6, 32, v4
s_add_u32 s6, s6, 1
s_addc_u32 s7, s7, 0
s_cmpk_eq_i32 s6, 0x3e8
v_lshlrev_b64 v[4:5], v6, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_min_u32_e32 v4, 1, v4
v_or_b32_e32 v4, v5, v4
v_sub_nc_u32_e32 v5, 32, v6
v_cndmask_b32_e64 v6, -1.0, 1.0, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v4, v4
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v5, null, v4, v4, v6
v_div_scale_f32 v9, vcc_lo, v6, v4, v6
v_rcp_f32_e32 v7, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v8, -v5, v7, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v7
v_mul_f32_e32 v8, v9, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v10, -v5, v8, v9
v_fmac_f32_e32 v8, v10, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, -v5, v8, v9
v_div_fmas_f32 v5, v5, v7, v8
v_add_co_u32 v2, vcc_lo, v2, 2
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v4, v5, v4, v6
v_add_f32_e32 v1, v1, v4
s_cbranch_scc0 .LBB0_1
v_cmp_gt_u16_e64 s2, 0x42, s9
v_lshl_add_u32 v2, v0, 2, 0
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 vcc_lo, exec_lo, s2
ds_store_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_7
s_lshr_b32 s2, s8, 1
.LBB0_4:
s_mov_b32 s3, exec_lo
v_cmpx_gt_u32_e64 s2, v0
s_cbranch_execz .LBB0_6
v_lshl_add_u32 v1, s2, 2, v2
ds_load_b32 v1, v1
ds_load_b32 v3, v2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v3
ds_store_b32 v2, v1
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s3
s_lshr_b32 s3, s2, 1
s_cmpk_lt_u32 s2, 0x42
s_mov_b32 s2, s3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_4
.LBB0_7:
s_mov_b32 s3, exec_lo
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB0_9
v_add_nc_u32_e32 v1, 0x80, v2
v_cmp_ne_u32_e64 s2, -1, v2
s_mov_b64 s[6:7], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v1
v_cndmask_b32_e64 v4, 0, s7, s2
v_cndmask_b32_e64 v3, 0, v2, s2
v_cndmask_b32_e32 v5, 0, v1, vcc_lo
v_cndmask_b32_e64 v6, 0, s7, vcc_lo
flat_load_b32 v1, v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[3:4] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 64, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v6
v_cndmask_b32_e64 v6, 0, s7, vcc_lo
flat_store_b32 v[3:4], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[3:4] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 32, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v6
v_cndmask_b32_e64 v6, 0, s7, vcc_lo
flat_store_b32 v[3:4], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[3:4] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 16, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v6
v_cndmask_b32_e64 v6, 0, s7, vcc_lo
flat_store_b32 v[3:4], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[3:4] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 8, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v6
v_cndmask_b32_e64 v6, 0, s7, vcc_lo
flat_store_b32 v[3:4], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[3:4] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, 4, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v1
v_cndmask_b32_e32 v1, 0, v1, vcc_lo
v_cndmask_b32_e64 v2, 0, s7, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v5, v5, v6
flat_store_b32 v[3:4], v5 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[1:2] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[3:4] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[3:4], v1 dlc
s_waitcnt_vscnt null, 0x0
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_11
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x0
s_lshl_b64 s[2:3], s[4:5], 2
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_11:
s_endpgm
| reduce_pi | 8,513 | 3,184 | stackv2-00001-of-00015 |
// Demangled: add(unsigned char*, unsigned char*, unsigned char*, int)
Function : _Z3addPhS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans3;
IADD.64 R6, R2.reuse, UR10 &req={0} ?trans2;
IADD.64 R4, R2, UR8 ?WAIT5_END_GROUP;
LDG.E.U8 R6, desc[UR4][R6.64] &req={1} &wr=0x3 ?trans4;
LDG.E.U8 R4, desc[UR4][R4.64] &wr=0x4 ?trans1;
IADD.64 R2, R2, UR6 &req={2} ?trans2;
I2F.U16 R8, R6 &req={3} &wr=0x0 ?trans1;
I2F.U16 R0, R4 &req={4} &wr=0x1 ?trans1;
FMUL R9, R8, 0.30000001192092895508 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, 0.69999998807907104492, R9 &req={1} ?WAIT4_END_GROUP;
F2I.U32.TRUNC.NTZ R9, R0 &wr=0x0 ?trans2;
STG.E.U8 desc[UR4][R2.64], R9 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(unsigned char*, unsigned char*, unsigned char*, int)
_Z3addPhS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v6, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v6, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v6, vcc_lo
global_load_u8 v0, v[2:3], off
global_load_u8 v2, v[4:5], off
s_waitcnt vmcnt(1)
v_cvt_f32_ubyte0_e32 v0, v0
s_waitcnt vmcnt(0)
v_cvt_f32_ubyte0_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, 0x3e99999a, v0
v_fmamk_f32 v0, v2, 0x3f333333, v0
s_delay_alu instid0(VALU_DEP_1)
v_cvt_i32_f32_e32 v2, v0
v_add_co_u32 v0, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v6, vcc_lo
global_store_b8 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 709 | 660 | stackv2-00001-of-00015 |
// Demangled: KernelNormalMul(float*, float*, float*, int, int, int)
Function : _Z15KernelNormalMulPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x364] &wr=0x2 ?trans6;
LDC R6, c[0x0][0x3a0] &wr=0x3 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.Y &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x4 ?trans1;
S2R R2, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R0, R5, UR5, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R6, PT &req={3} ?trans1;
IMAD R3, R2, UR4, R3 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR6, P0 &req={4} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R2, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R28, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xa60 &req={1} ?trans5;
ISETP.GE.U32.AND P0, PT, R2.reuse, 0x8, PT ?trans1;
LOP3.LUT R4, R2, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R10, R3, R2, RZ ?trans1;
MOV R28, RZ ?trans1;
MOV R5, RZ ?trans2;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x5c0 ?trans6;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LOP3.LUT R32, R2, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R28, RZ ?trans1;
IADD.64 R12, R6, R6 ?trans2;
MOV R33, R0 ?trans1;
IADD3 R32, PT, PT, -R32, RZ, RZ ?trans1;
IADD.64 R14, R6, R12 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R12, 0x2, R13 ?trans1;
IADD.64 R16, R6, R14 ?trans2;
IMAD.SHL.U32 R12, R12, 0x4, RZ ?trans1;
SHF.L.U64.HI R15, R14, 0x2, R15 ?trans1;
IADD.64 R18, R6, R16 ?trans2;
IMAD.SHL.U32 R14, R14, 0x4, RZ ?trans1;
SHF.L.U64.HI R17, R16, 0x2, R17 ?trans1;
IADD.64 R20, R6, R18 ?trans2;
IMAD.SHL.U32 R16, R16, 0x4, RZ ?trans1;
SHF.L.U64.HI R19, R18, 0x2, R19 ?trans1;
IMAD.WIDE.U32 R8, R10, 0x4, R8 &req={0} ?trans1;
IADD.64 R22, R6, R20 ?WAIT3_END_GROUP;
SHF.L.U64.HI R21, R20, 0x2, R21 ?trans1;
IADD.64 R8, R8, 0x10 ?trans2;
IMAD.SHL.U32 R18, R18, 0x4, RZ ?trans1;
SHF.L.U64.HI R23, R22, 0x2, R23 ?trans1;
IMAD.SHL.U32 R20, R20, 0x4, RZ ?trans2;
IMAD.SHL.U32 R22, R22, 0x4, RZ ?WAIT7_END_GROUP;
LDC.64 R30, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R37, desc[UR4][R8.64+-0x10] &wr=0x2 ?trans4;
LDG.E R36, desc[UR4][R8.64+-0x4] &wr=0x3 ?trans1;
IMAD.WIDE R30, R33, 0x4, R30 &req={0} ?WAIT5_END_GROUP;
IADD.64 R24, R30, R14 ?trans2;
IMAD.WIDE R34, R6, 0x4, R30 ?trans1;
LDG.E R29, desc[UR4][R30.64] &wr=0x2 ?trans1;
IADD.64 R26, R30, R12 ?WAIT3_END_GROUP;
LDG.E R24, desc[UR4][R24.64] &wr=0x3 ?trans4;
LDG.E R35, desc[UR4][R34.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR4][R26.64] &wr=0x5 ?trans4;
LDG.E R25, desc[UR4][R8.64+-0x8] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R8.64+-0xc] &wr=0x4 ?trans1;
FFMA R29, R37, R29, R28 &req={2} ?WAIT3_END_GROUP;
LDG.E R37, desc[UR4][R8.64+0x8] &wr=0x2 ?trans1;
FFMA R28, R34, R35, R29 &req={4} ?WAIT3_END_GROUP;
LDG.E R35, desc[UR4][R8.64] &wr=0x4 ?trans1;
FFMA R27, R25, R26, R28 &req={5} ?trans1;
IADD.64 R28, R30, R16 ?trans2;
LDG.E R34, desc[UR4][R8.64+0x4] &wr=0x5 ?trans1;
FFMA R36, R36, R24, R27 &req={3} ?trans1;
IADD.64 R26, R30.reuse, R18 ?trans2;
IADD.64 R24, R30.reuse, R20 ?trans2;
LDG.E R29, desc[UR4][R28.64] &wr=0x4 ?trans1;
IADD.64 R30, R30, R22 ?WAIT3_END_GROUP;
LDG.E R27, desc[UR4][R26.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR4][R24.64] &wr=0x2 ?trans4;
LDG.E R30, desc[UR4][R30.64] &wr=0x3 ?trans4;
LDG.E R25, desc[UR4][R8.64+0xc] &rd=0x0 &wr=0x3 ?trans1;
IADD3 R32, PT, PT, R32, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R32, RZ, PT ?trans1;
IADD3 R5, PT, PT, R5, 0x8, RZ ?trans1;
IMAD R33, R6, 0x8, R33 ?trans1;
IADD.64 R8, R8, 0x20 &req={0} ?trans2;
FFMA R35, R35, R29, R36 &req={4} ?WAIT4_END_GROUP;
FFMA R34, R34, R27, R35 &req={5} ?WAIT4_END_GROUP;
FFMA R34, R37, R24, R34 &req={2} ?WAIT4_END_GROUP;
FFMA R28, R25, R30, R34 &req={3} ?trans1;
@P0 BRA 0x350 ?trans6;
@!P1 BRA 0xa60 ?trans5;
ISETP.GE.U32.AND P1, PT, R4, 0x4, PT ?trans1;
LOP3.LUT R24, R2, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R24, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x840 ?trans6;
LDC.64 R12, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R8, R5 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans2;
IMAD R15, R5, R6, R0 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R6 ?trans1;
LDC.64 R20, c[0x0][0x380] &wr=0x2 ?trans1;
IADD.64 R22, R10, R8 ?trans2;
MOV R16, R6 ?trans1;
IADD3 R19, PT, PT, R10, R5, RZ ?WAIT2_END_GROUP;
LEA R8, P1, R22, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R9, R22, UR7, R23, 0x2, P1 ?trans1;
IMAD.WIDE R12, R15, 0x4, R12 &req={0} ?trans1;
IADD.64 R14, R16, R16 ?WAIT3_END_GROUP;
LDG.E R25, desc[UR4][R8.64+0x4] &wr=0x3 ?trans1;
IADD.64 R16, R16, R14 ?trans2;
IMAD.WIDE R22, R6, 0x4, R12 ?trans1;
LEA R18, P1, R14.reuse, R12.reuse, 0x2 ?trans1;
LDG.E R4, desc[UR4][R12.64] &wr=0x4 ?trans2;
IMAD.WIDE.U32 R20, R19, 0x4, R20 &req={2} ?trans1;
LEA.HI.X R19, R14, R13, R15, 0x2, P1 ?trans1;
LDG.E R22, desc[UR4][R22.64] &wr=0x3 ?trans1;
LEA R14, P1, R16, R12, 0x2 ?WAIT3_END_GROUP;
LDG.E R21, desc[UR4][R20.64] &wr=0x4 ?trans1;
LEA.HI.X R15, R16, R13, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR4][R8.64+0x8] &wr=0x2 ?trans4;
LDG.E R27, desc[UR4][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR4][R14.64] &wr=0x5 ?trans1;
IADD3 R5, PT, PT, R5, 0x4, RZ ?trans1;
FFMA R4, R21, R4, R28 &req={4} ?WAIT4_END_GROUP;
FFMA R4, R25, R22, R4 &req={3} ?WAIT4_END_GROUP;
FFMA R4, R17, R18, R4 &req={2} ?WAIT4_END_GROUP;
FFMA R28, R27, R14, R4 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa60 ?trans5;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?trans1;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans1;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?trans2;
LDC.64 R18, c[0x0][0x380] &wr=0x1 ?trans4;
@P0 MOV R11, RZ ?trans1;
@P0 MOV R20, R5.reuse ?trans1;
@P0 MOV R21, RZ ?trans1;
@P0 IADD3 R23, PT, PT, R10.reuse, R5, RZ ?trans1;
@P0 LDC.64 R12, c[0x0][0x380] &wr=0x2 ?trans3;
@P0 IADD.64 R20, R10, R20 ?WAIT2_END_GROUP;
@P0 IMAD R11, R5.reuse, R6, R0 ?trans1;
@P0 IADD3 R5, PT, PT, R5, 0x2, RZ ?trans2;
LDC.64 R14, c[0x0][0x380] &wr=0x3 ?trans1;
@P0 IMAD.WIDE R16, R11, 0x4, R16 &req={0} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 IMAD.WIDE.U32 R18, R23, 0x4, R18 &req={1} ?trans1;
@!P1 IADD3 R11, PT, PT, R10, R5, RZ ?trans1;
@P0 LDG.E R2, desc[UR4][R16.64] &wr=0x4 ?trans4;
@P0 LDG.E R19, desc[UR4][R18.64] &wr=0x4 ?trans1;
@P0 LEA R12, P2, R20, R12, 0x2 &req={2} ?WAIT4_END_GROUP;
@P0 LEA.HI.X R13, R20, R13, R21, 0x2, P2 ?trans1;
@!P1 IMAD R21, R5, R6, R0 ?trans2;
@P0 IMAD.WIDE R4, R6, 0x4, R16 ?WAIT3_END_GROUP;
@P0 LDG.E R13, desc[UR4][R12.64+0x4] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE.U32 R14, R11, 0x4, R14 &req={3} ?WAIT3_END_GROUP;
@P0 LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R8, R21, 0x4, R8 &req={0} ?WAIT3_END_GROUP;
@!P1 LDG.E R15, desc[UR4][R14.64] &wr=0x3 ?trans4;
@!P1 LDG.E R8, desc[UR4][R8.64] &wr=0x3 ?trans1;
@P0 FFMA R2, R19, R2, R28 &req={4} ?WAIT4_END_GROUP;
@P0 FFMA R28, R13, R4, R2 &req={2} ?WAIT4_END_GROUP;
@!P1 FFMA R28, R15, R8, R28 &req={3} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R3, R3, R6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R28 ?trans1;
EXIT ?trans5;
BRA 0xab0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: KernelNormalMul(float*, float*, float*, int, int, int)
_Z15KernelNormalMulPfS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s6, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_cmp_lt_i32 s5, 1
s_cbranch_scc1 .LBB0_4
v_mul_lo_u32 v2, v0, s5
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s5, s5, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s5, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s10, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v6, 0
.LBB0_5:
v_mad_u64_u32 v[2:3], null, v0, s6, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| KernelNormalMul | 4,497 | 1,254 | stackv2-00001-of-00015 |
// Demangled: KernelTilesMul(float*, float*, float*, int, int, int)
Function : _Z14KernelTilesMulPfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R6, c[0x0][0x39c] &wr=0x1 ?trans1;
S2R R23, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU UR11, c[0x0][0x3a0] &wr=0x3 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
S2R R21, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans1;
S2R R5, SR_CTAID.X &wr=0x5 ?trans1;
S2R R22, SR_TID.X &wr=0x5 ?trans1;
ISETP.GE.AND P0, PT, R6, 0x1, PT &req={1} ?trans1;
LEA R23, R23, R21, 0x5 &req={2} ?WAIT2_END_GROUP;
LEA R24, R5, R22, 0x5 &req={5} ?WAIT10_END_GROUP;
@!P0 BRA 0x800 &req={4,3,0} ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x3a0] &wr=0x1 ?trans1;
IADD3 R0, PT, PT, R6, 0x1f, RZ ?trans1;
MOV R17, RZ ?trans1;
IMAD R6, R23, R6, R22 ?trans1;
LDCU UR10, c[0x0][0x398] &wr=0x2 ?trans1;
SHF.R.U32.HI R7, RZ, 0x5, R0 ?trans2;
LDC R3, c[0x0][0x3a0] &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans2;
UIADD3 UR5, UPT, UPT, UR4, 0x1000, URZ ?trans1;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT4_END_GROUP;
LDC.64 R26, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R20, R21, UR7, R22 &req={1} ?trans1;
LDCU UR7, c[0x0][0x39c] &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R23, UR10, PT &req={2} ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?trans1;
LEA R20, R5, R20, 0x5 ?WAIT4_END_GROUP;
LEA R2, R21.reuse, UR4, 0x7 ?trans2;
LEA R0, R22.reuse, UR5, 0x2 ?trans2;
LEA R4, R22, R2, 0x2 ?trans2;
LEA R5, R21, R0, 0x7 ?WAIT7_END_GROUP;
ISETP.GE.AND P0, PT, R24, R3, PT &req={3} ?trans1;
ISETP.GE.OR P2, PT, R22, UR7, P1 &req={1} ?trans1;
MOV R29, RZ ?trans1;
HFMA2 R16, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE R12, R6, 0x4, R26 &req={4} ?trans1;
ISETP.GE.OR P0, PT, R21, UR7, P0 ?WAIT8_END_GROUP;
@!P2 LDG.E R29, desc[UR8][R12.64] &wr=0x2 ?trans5;
@!P0 LDC.64 R18, c[0x0][0x388] &wr=0x0 ?trans2;
@!P0 IMAD.WIDE R18, R20, 0x4, R18 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R16, desc[UR8][R18.64] &wr=0x3 ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R7, RZ, PT ?trans1;
IADD3 R6, PT, PT, R6, 0x20, RZ ?trans2;
IADD3 R22, PT, PT, R22, 0x20, RZ ?trans2;
IADD3 R21, PT, PT, R21, 0x20, RZ ?trans2;
LEA R20, R3, R20, 0x5 ?trans1;
STS [R4], R29 &req={2} ?trans4;
STS [R5], R16 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R28, [R0] ?trans4;
LDS.128 R8, [R2] &wr=0x0 ?trans4;
LDS R31, [R0+0x80] &wr=0x1 ?trans4;
LDS R25, [R0+0x100] &wr=0x2 ?trans4;
LDS R32, [R0+0x180] &wr=0x3 ?trans4;
LDS R33, [R0+0x200] ?trans4;
LDS.128 R12, [R2+0x10] &wr=0x4 ?trans4;
LDS R30, [R0+0x280] &wr=0x5 ?trans4;
LDS R29, [R0+0x300] &wr=0x5 ?trans4;
LDS R34, [R0+0x480] ?trans4;
LDS R35, [R0+0x600] ?trans1;
FFMA R8, R8, R28, R17 &req={0} ?WAIT3_END_GROUP;
LDS R28, [R0+0x380] &wr=0x0 ?trans1;
FFMA R8, R31, R9, R8 &req={1} ?WAIT3_END_GROUP;
LDS R31, [R0+0x400] ?trans1;
FFMA R25, R25, R10, R8 &req={2} ?WAIT3_END_GROUP;
LDS.128 R16, [R2+0x20] &wr=0x1 ?trans1;
FFMA R11, R32, R11, R25 &req={3} ?WAIT3_END_GROUP;
LDS R25, [R0+0x500] &wr=0x2 ?trans4;
LDS R32, [R0+0x580] &wr=0x3 ?trans1;
FFMA R11, R12, R33, R11 &req={4} ?WAIT3_END_GROUP;
LDS R33, [R0+0x800] ?trans1;
FFMA R12, R30, R13, R11 &req={5} ?WAIT3_END_GROUP;
LDS.128 R8, [R2+0x30] &wr=0x4 ?trans4;
LDS R30, [R0+0x680] &wr=0x5 ?trans1;
FFMA R29, R29, R14, R12 ?WAIT4_END_GROUP;
FFMA R15, R28, R15, R29 &req={0} ?trans2;
LDS R29, [R0+0x700] &wr=0x0 ?trans4;
LDS R28, [R0+0x780] &wr=0x0 ?trans1;
FFMA R15, R16, R31, R15 &req={1} ?WAIT3_END_GROUP;
LDS R31, [R0+0x900] ?trans1;
FFMA R34, R34, R17, R15 ?WAIT3_END_GROUP;
LDS.128 R12, [R2+0x40] &wr=0x1 ?trans1;
FFMA R25, R25, R18, R34 &req={2} ?WAIT3_END_GROUP;
LDS R34, [R0+0x880] &wr=0x2 ?trans1;
FFMA R19, R32, R19, R25 &req={3} ?WAIT3_END_GROUP;
LDS R32, [R0+0x980] &wr=0x3 ?trans1;
FFMA R19, R8, R35, R19 &req={4} ?WAIT3_END_GROUP;
LDS R35, [R0+0xa00] ?trans1;
FFMA R8, R30, R9, R19 &req={5} ?WAIT3_END_GROUP;
LDS.128 R16, [R2+0x50] &wr=0x4 ?trans4;
LDS R30, [R0+0xa80] &wr=0x5 ?trans4;
LDS R25, [R0+0xb00] &wr=0x5 ?trans1;
FFMA R29, R29, R10, R8 &req={0} ?WAIT4_END_GROUP;
FFMA R11, R28, R11, R29 ?trans2;
LDS R28, [R0+0xb80] &wr=0x0 ?trans4;
LDS R29, [R0+0xc00] ?trans1;
FFMA R11, R12, R33, R11 &req={1} ?WAIT4_END_GROUP;
FFMA R34, R34, R13, R11 &req={2} ?trans2;
LDS.128 R8, [R2+0x60] &wr=0x1 ?trans2;
FFMA R31, R31, R14, R34 ?trans2;
LDS R34, [R0+0xc80] &wr=0x2 ?trans2;
FFMA R15, R32, R15, R31 &req={3} ?trans2;
LDS R31, [R0+0xd00] &wr=0x3 ?trans2;
FFMA R15, R16, R35, R15 &req={4} ?WAIT2_END_GROUP;
LDS R16, [R0+0xd80] &wr=0x4 ?trans2;
FFMA R30, R30, R17, R15 &req={5} ?trans2;
LDS R17, [R0+0xe00] ?trans4;
LDS.128 R12, [R2+0x70] &wr=0x5 ?trans1;
FFMA R33, R25, R18, R30 ?WAIT3_END_GROUP;
LDS R30, [R0+0xe80] &wr=0x5 ?trans4;
LDS R25, [R0+0xf00] &wr=0x5 ?trans4;
LDS R18, [R0+0xf80] &wr=0x5 ?trans1;
FFMA R19, R28, R19, R33 &req={0} ?WAIT4_END_GROUP;
FFMA R19, R8, R29, R19 &req={1} ?WAIT4_END_GROUP;
FFMA R34, R34, R9, R19 &req={2} ?WAIT4_END_GROUP;
FFMA R31, R31, R10, R34 &req={3} ?WAIT4_END_GROUP;
FFMA R11, R16, R11, R31 &req={4} ?WAIT4_END_GROUP;
FFMA R11, R12, R17, R11 &req={5} ?WAIT4_END_GROUP;
FFMA R30, R30, R13, R11 ?WAIT4_END_GROUP;
FFMA R25, R25, R14, R30 ?WAIT4_END_GROUP;
FFMA R17, R18, R15, R25 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x230 ?trans5;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R24, UR11, PT ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R23, UR4, P0 &req={0} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R23, R23, UR11, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R23, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R17 ?trans1;
EXIT ?trans5;
BRA 0x890;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: KernelTilesMul(float*, float*, float*, int, int, int)
_Z14KernelTilesMulPfS_S_iii:
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v1, s15, 5, v3
v_lshl_add_u32 v0, s14, 5, v4
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s4, v1
v_cmp_gt_i32_e64 s0, s6, v0
s_cmp_lt_i32 s5, 1
s_cbranch_scc1 .LBB1_9
v_lshlrev_b32_e32 v2, 2, v4
v_lshlrev_b32_e32 v5, 7, v3
v_mul_lo_u32 v7, v1, s5
s_add_i32 s1, s5, 31
s_mov_b32 s12, 0
v_or_b32_e32 v6, 0x1000, v2
v_add_nc_u32_e32 v8, v5, v2
v_mov_b32_e32 v2, 0
s_lshr_b32 s7, s1, 5
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v9, v6, v5
.LBB1_2:
s_lshl_b32 s13, s12, 5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, s13, v4
v_cmp_gt_i32_e64 s1, s5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, s1, vcc_lo
s_and_saveexec_b32 s14, s1
s_cbranch_execz .LBB1_4
v_add_nc_u32_e32 v10, v11, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s1, s8, v10
v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
global_load_b32 v10, v[10:11], off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s14
v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v11, s13, v3
s_waitcnt vmcnt(0)
ds_store_b32 v8, v10
v_cmp_gt_i32_e64 s1, s5, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, s1, s0
s_and_saveexec_b32 s13, s1
s_cbranch_execz .LBB1_6
v_mad_u64_u32 v[12:13], null, v11, s6, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[10:11], 2, v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s1, s10, v10
v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
global_load_b32 v12, v[10:11], off
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s13
v_mov_b32_e32 v10, v6
s_mov_b32 s1, 0
s_waitcnt vmcnt(0)
ds_store_b32 v9, v12
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB1_7:
v_add_nc_u32_e32 v11, s1, v5
s_add_i32 s1, s1, 4
ds_load_b32 v12, v10
ds_load_b32 v11, v11
v_add_nc_u32_e32 v10, 0x80, v10
s_cmpk_eq_i32 s1, 0x80
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v2, v11, v12
s_cbranch_scc0 .LBB1_7
s_add_i32 s12, s12, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s12, s7
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
s_branch .LBB1_10
.LBB1_9:
v_mov_b32_e32 v2, 0
.LBB1_10:
v_cmp_gt_i32_e32 vcc_lo, s4, v1
v_cmp_gt_i32_e64 s0, s6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_12
v_mad_u64_u32 v[3:4], null, v1, s6, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB1_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| KernelTilesMul | 3,447 | 1,935 | stackv2-00001-of-00015 |
// Demangled: calc_Kernel_Matrix(int, int, float*, float*, float*, int)
Function : _Z18calc_Kernel_MatrixiiPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R12, c[0x0][0x384] &wr=0x1 ?trans1;
S2R R10, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x3 ?trans1;
S2R R11, SR_CTAID.Y &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
S2R R0, SR_TID.Y &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R12, 0x1, PT &req={1} ?trans1;
IMAD R10, R10, UR4, R3 &req={2} ?WAIT2_END_GROUP;
IMAD R11, R11, UR5, R0 &req={3} ?trans2;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT8_END_GROUP;
@!P0 BRA 0x8f0 &req={4,0} ?trans5;
ISETP.GE.U32.AND P0, PT, R12.reuse, 0x8, PT ?trans1;
LOP3.LUT R5, R12, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R13, R10, R12.reuse, RZ ?trans1;
MOV R0, RZ ?trans1;
IMAD R4, R11, R12, RZ ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x470 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LOP3.LUT R16, R12, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R0, RZ ?trans1;
MOV R15, R13 ?trans1;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R4, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x10 ?trans2;
IADD.64 R6, R6, 0x10 &req={1} ?WAIT8_END_GROUP;
IMAD.WIDE R8, R15.reuse, 0x4, R6 ?trans1;
LDG.E R27, desc[UR6][R2.64+-0x10] &wr=0x2 ?trans4;
LDG.E R26, desc[UR6][R8.64+-0x10] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R2.64+-0xc] &wr=0x3 ?trans4;
LDG.E R28, desc[UR6][R8.64+-0xc] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R2.64+-0x8] &wr=0x4 ?trans4;
LDG.E R30, desc[UR6][R8.64+-0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR6][R2.64+-0x4] &wr=0x5 ?trans4;
LDG.E R22, desc[UR6][R8.64+-0x4] &wr=0x5 ?trans4;
LDG.E R20, desc[UR6][R2.64] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R8.64] &wr=0x5 ?trans4;
LDG.E R18, desc[UR6][R2.64+0x4] &wr=0x5 ?trans4;
LDG.E R19, desc[UR6][R8.64+0x4] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R2.64+0x8] &wr=0x5 ?trans4;
LDG.E R17, desc[UR6][R8.64+0x8] &wr=0x5 ?trans4;
LDG.E R25, desc[UR6][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R24, desc[UR6][R2.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R16, PT, PT, R16, 0x8, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R15, PT, PT, R15, 0x8, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R16, RZ, PT ?trans1;
IADD.64 R2, R2, 0x20 &req={0} ?trans2;
FADD R27, R26, -R27 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R27, R27, R0 ?trans1;
FADD R29, R28, -R29 &req={3} ?WAIT4_END_GROUP;
FFMA R0, R29, R29, R0 ?trans1;
FADD R31, R30, -R31 &req={4} ?WAIT4_END_GROUP;
FFMA R0, R31, R31, R0 ?trans1;
FADD R23, R22, -R23 &req={5} ?WAIT4_END_GROUP;
FFMA R0, R23, R23, R0 ?trans1;
FADD R21, R21, -R20 ?WAIT4_END_GROUP;
FFMA R0, R21, R21, R0 ?trans1;
FADD R19, R19, -R18 ?WAIT4_END_GROUP;
FFMA R0, R19, R19, R0 ?trans1;
FADD R17, R17, -R14 ?WAIT4_END_GROUP;
FFMA R0, R17, R17, R0 ?trans1;
FADD R25, R25, -R24 ?WAIT4_END_GROUP;
FFMA R0, R25, R25, R0 ?trans1;
@P0 BRA 0x200 ?trans6;
@!P1 BRA 0x8f0 ?trans5;
ISETP.GE.U32.AND P0, PT, R5, 0x4, PT ?trans1;
LOP3.LUT R22, R12, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x690 ?trans6;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
IADD3 R15, PT, PT, R4.reuse, UR4, RZ ?trans2;
IADD3 R9, PT, PT, R13, UR4, RZ ?trans1;
UMOV UR5, URZ ?trans2;
IADD.64 R16, R4, UR4 ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans3;
LEA R8, P0, R16, UR8, 0x2 &req={1} ?trans1;
IMAD.WIDE.U32 R6, R15, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?trans1;
LEA.HI.X R9, R16, UR9, R17, 0x2, P0 ?WAIT4_END_GROUP;
LDG.E R14, desc[UR6][R2.64] &wr=0x3 ?trans4;
LDG.E R16, desc[UR6][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R17, desc[UR6][R8.64+0x4] &wr=0x2 ?trans4;
LDG.E R18, desc[UR6][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR6][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R21, desc[UR6][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R20, desc[UR6][R2.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FADD R15, R14, -R7 &req={3} ?WAIT4_END_GROUP;
FFMA R0, R15, R15, R0 ?trans1;
FADD R17, R16, -R17 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R17, R17, R0 ?trans1;
FADD R19, R18, -R19 &req={4} ?WAIT4_END_GROUP;
FFMA R0, R19, R19, R0 ?trans1;
FADD R21, R20, -R21 &req={5} ?WAIT4_END_GROUP;
FFMA R0, R21, R21, R0 ?WAIT7_END_GROUP;
@!P1 BRA 0x8f0 ?trans5;
ISETP.NE.AND P0, PT, R22, 0x1, PT ?trans1;
LOP3.LUT R12, R12, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R12, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x840 ?trans6;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R8, R4 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
IADD3 R17, PT, PT, R4, UR4, RZ ?trans1;
UMOV UR5, URZ ?trans1;
IADD3 R15, PT, PT, R13, UR4, RZ ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
IADD.64 R8, R8, UR4 ?WAIT5_END_GROUP;
LEA R14, P0, R8, UR8, 0x2 &req={1} ?trans1;
IMAD.WIDE.U32 R6, R17, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR6][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R2, R15, 0x4, R2 &req={2} ?trans1;
LEA.HI.X R15, R8, UR9, R9, 0x2, P0 ?WAIT4_END_GROUP;
LDG.E R8, desc[UR6][R2.64] &wr=0x3 ?trans4;
LDG.E R15, desc[UR6][R14.64+0x4] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R2.64+0x4] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FADD R9, R8, -R7 &req={3} ?WAIT4_END_GROUP;
FFMA R0, R9, R9, R0 ?trans1;
FADD R9, R12, -R15 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R9, R9, R0 ?WAIT7_END_GROUP;
@P1 BRA 0x8f0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R13, UR4, RZ ?trans2;
IADD3 R5, PT, PT, R4, UR4, RZ ?WAIT5_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R2, R13, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R5, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans2;
FADD R7, R2, -R5 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R7, R7, R0 ?WAIT7_END_GROUP;
LDCU UR4, c[0x0][0x3a0] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xae0 ?trans1;
MOV R5, RZ ?trans1;
I2FP.F32.S32 R3, UR4 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 BRA 0xad0 ?trans5;
MUFU.RCP R2, R3 &wr=0x0 ?trans1;
FMUL R0, R0, -0.5 ?trans1;
BSSY.RECONVERGENT B1, 0xa30 ?trans3;
FCHK P0, R0, R3 &wr=0x1 ?trans1;
FFMA R5, -R3, R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R5, R2, R5, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R4, -R3, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R5, R4, R2 ?trans1;
@!P0 BRA 0xa20 &req={1} ?trans6;
MOV R2, 0xa10 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xb40 ?trans5;
MOV R2, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R5, 0x437c0000 ?WAIT4_END_GROUP;
FFMA.SAT R0, R2, R3, 0.5 ?WAIT4_END_GROUP;
FFMA.RM R0, R0, R5, 12582913 ?WAIT4_END_GROUP;
FADD R3, R0.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R0, R0, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R3, R2, 1.4426950216293334961, -R3 ?WAIT4_END_GROUP;
FFMA R3, R2, 1.925963033500011079e-08, R3 ?WAIT6_END_GROUP;
MUFU.EX2 R3, R3 &wr=0x0 ?trans2;
FMUL R5, R0, R3 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD R11, R10, UR4, R11 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R11, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R5, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B2, 0x11a0 ?trans1;
SHF.R.U32.HI R4, RZ, 0x17, R0 ?trans2;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R12, R4, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R4, R0 ?trans1;
IADD3 R8, PT, PT, R5, -0x1, RZ ?trans1;
MOV R7, R3 ?trans1;
IADD3 R9, PT, PT, R12, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R9, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R6, RZ ?trans1;
@!P0 BRA 0xd80 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1180 ?trans5;
LOP3.LUT P0, RZ, R7, 0x7fffffff, R4, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1160 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1160 ?trans5;
LOP3.LUT P2, RZ, R4, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1140 ?trans5;
LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1110 ?trans5;
ISETP.GE.AND P0, PT, R9, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R8, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R6, RZ ?trans1;
@!P0 MOV R6, 0xffffffc0 ?trans1;
@!P0 FFMA R4, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R7, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R6, PT, PT, R6, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R5, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0x1100 ?trans1;
IADD3 R3, PT, PT, R12, -0x7f, RZ ?trans2;
IADD3 R7, PT, PT, -R0, R7, RZ ?WAIT3_END_GROUP;
IMAD R0, R3.reuse, -0x800000, R4 ?trans1;
IADD3 R3, PT, PT, R3, 0x7f, -R5 ?trans1;
MUFU.RCP R8, R7 &wr=0x0 ?trans1;
FADD.FTZ R9, -R7, -RZ ?trans2;
IADD3 R3, PT, PT, R3, R6, RZ ?trans2;
FFMA R13, R8, R9, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R4, R0, R15, RZ ?WAIT4_END_GROUP;
FFMA R13, R9, R4, R0 ?WAIT4_END_GROUP;
FFMA R8, R15, R13, R4 ?WAIT4_END_GROUP;
FFMA R9, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R4, R15, R9, R8 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R4 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R0, R3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R7, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x10e0 ?trans5;
ISETP.GT.AND P0, PT, R7, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x10b0 ?trans5;
ISETP.GE.AND P0, PT, R7, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x10f0 ?trans5;
ISETP.GE.AND P0, PT, R7, -0x18, PT ?trans1;
LOP3.LUT R4, R4, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x10f0 ?trans5;
FFMA.RZ R0, R15, R9.reuse, R8.reuse ?trans1;
IADD3 R6, PT, PT, R7, 0x20, RZ ?trans1;
FFMA.RM R3, R15, R9.reuse, R8.reuse ?trans1;
ISETP.NE.AND P1, PT, R7.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R7.reuse, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R7, PT, PT, -R7, RZ, RZ ?trans2;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R15, R9, R8 ?WAIT3_END_GROUP;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R7, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R4, R3, R4, RZ, 0xfc, !PT ?trans1;
BRA 0x10f0 ?trans6;
LOP3.LUT R4, R4, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x10f0 ?trans6;
IMAD R4, R3, 0x800000, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0x1190 ?trans5;
LOP3.LUT R4, R7, 0x80000000, R4, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1190 ?trans6;
LOP3.LUT R4, R7, 0x80000000, R4, 0x48, !PT ?trans1;
BRA 0x1190 ?trans6;
MUFU.RSQ R4, -QNAN &wr=0x0 ?trans1;
BRA 0x1190 ?trans5;
FADD.FTZ R4, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x11c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calc_Kernel_Matrix(int, int, float*, float*, float*, int)
_Z18calc_Kernel_MatrixiiPfS_S_i:
s_clause 0x3
s_load_b32 s10, s[0:1], 0x34
s_load_b64 s[8:9], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s11, s10, 16
s_and_b32 s10, s10, 0xffff
s_cmp_lt_i32 s9, 1
v_mad_u64_u32 v[0:1], null, s14, s10, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s11, v[3:4]
s_cbranch_scc1 .LBB1_3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_lo_u32 v2, v1, s9
v_mul_lo_u32 v4, v0, s9
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB1_2:
global_load_b32 v7, v[4:5], off
global_load_b32 v8, v[2:3], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_add_i32 s9, s9, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s9, 0
s_waitcnt vmcnt(0)
v_sub_f32_e32 v7, v7, v8
v_fmac_f32_e32 v6, v7, v7
s_cbranch_scc0 .LBB1_2
s_branch .LBB1_4
.LBB1_3:
v_mov_b32_e32 v6, 0
.LBB1_4:
s_load_b32 s0, s[0:1], 0x20
v_mov_b32_e32 v3, 0
s_waitcnt lgkmcnt(0)
v_cvt_f32_i32_e32 v2, s0
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ngt_f32_e32 v6, v2
s_cbranch_execz .LBB1_6
v_mul_f32_e32 v3, -0.5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v4, null, v2, v2, v3
v_div_scale_f32 v7, vcc_lo, v3, v2, v3
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_mul_f32_e32 v6, v7, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v4, v6, v7
v_fmac_f32_e32 v6, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v6, v7
v_div_fmas_f32 v4, v4, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v2, v4, v2, v3
v_mul_f32_e32 v3, 0x3fb8aa3b, v2
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v4, 0x3fb8aa3b, v2, -v3
v_rndne_f32_e32 v5, v3
v_dual_fmamk_f32 v4, v2, 0x32a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v3, v3, v4
v_cvt_i32_f32_e32 v4, v5
v_exp_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_ldexp_f32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, 0, v3, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
v_cndmask_b32_e32 v3, 0x7f800000, v3, vcc_lo
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s0
v_mad_u64_u32 v[4:5], null, v0, s8, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[0:1], 2, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calc_Kernel_Matrix | 7,006 | 2,117 | stackv2-00001-of-00015 |
// Demangled: calc_meanshift2(float*, float*, float*)
Function : _Z15calc_meanshift2PfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_CTAID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R9, R9, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R9.reuse, 0x4, R4 &req={3} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={4} ?WAIT4_END_GROUP;
FADD R0, R2, -R5 &req={2} ?WAIT4_END_GROUP;
FMUL R9, R0, R0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calc_meanshift2(float*, float*, float*)
_Z15calc_meanshift2PfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_sub_f32_e32 v2, v2, v3
s_delay_alu instid0(VALU_DEP_1)
v_mul_f32_e32 v2, v2, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calc_meanshift2 | 514 | 531 | stackv2-00001-of-00015 |
// Demangled: calc_reduce_meanshift(int, float*, float*, float*)
Function : _Z21calc_reduce_meanshiftiPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x1b0 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
S2R R14, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
MOV R10, UR4 &req={2} ?trans1;
IMAD R0, R13, UR4, R14 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x1a0 &req={4,0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R11, RZ ?WAIT6_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R15, R10, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R8 &req={2} ?trans2;
LDG.E R2, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R15, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FADD R12, R2, -R5 &req={2} ?WAIT4_END_GROUP;
FFMA R11, R12, R12, R11 ?WAIT8_END_GROUP;
@!P0 BRA 0x110 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P1, PT, R10, 0x2, PT ?trans1;
ISETP.NE.AND P0, PT, R14, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R0, R14, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R0], R11 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x2f0 ?trans5;
SHF.R.U32.HI R5, RZ, 0x1, R10 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R14, R5, PT ?WAIT13_END_GROUP;
@!P1 IMAD R2, R5, 0x4, R0 ?trans1;
@!P1 LDS R3, [R0] ?trans5;
@!P1 LDS R2, [R2] &wr=0x1 ?trans2;
@!P1 FADD R3, R2, R3 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R0], R3 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R10, 0x3, PT ?trans1;
MOV R10, R5 ?WAIT12_END_GROUP;
@P1 BRA 0x240 &req={1} ?trans5;
@P0 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x398] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IMAD.WIDE.U32 R2, R13, 0x4, R2 &req={2} ?WAIT8_END_GROUP;
LDS R5, [UR4] &wr=0x1 ?trans4;
STG.E desc[UR6][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x380;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calc_reduce_meanshift(int, float*, float*, float*)
_Z21calc_reduce_meanshiftiPfS_S_:
s_clause 0x3
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s10, s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s0, s0, 32
s_mov_b32 s2, s15
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v3, 0
s_mov_b32 s11, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
v_cmpx_gt_i32_e64 s10, v1
s_cbranch_execz .LBB5_4
s_load_b32 s1, s[0:1], 0x0
v_mov_b32_e32 v3, 0
s_mov_b32 s0, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s3
.LBB5_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_co_u32 v6, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
global_load_b32 v2, v[6:7], off
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_dual_sub_f32 v2, v2, v4 :: v_dual_add_nc_u32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s10, v1
v_fmac_f32_e32 v3, v2, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB5_2
s_or_b32 exec_lo, exec_lo, s0
.LBB5_4:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s11
v_lshl_add_u32 v1, v0, 2, 0
s_cmp_lt_u32 s3, 2
ds_store_b32 v1, v3
s_waitcnt lgkmcnt(0)
s_barrier
.LBB5_5:
buffer_gl0_inv
s_cbranch_scc1 .LBB5_9
s_lshr_b32 s0, s3, 1
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB5_8
v_lshl_add_u32 v2, s0, 2, v1
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v1, v2
.LBB5_8:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
s_barrier
s_cmp_lt_u32 s3, 4
s_mov_b32 s3, s0
s_branch .LBB5_5
.LBB5_9:
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB5_11
v_mov_b32_e32 v0, 0
s_mov_b32 s3, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[2:3], 2
s_add_u32 s0, s8, s0
ds_load_b32 v1, v0
s_addc_u32 s1, s9, s1
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB5_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calc_reduce_meanshift | 1,337 | 1,301 | stackv2-00001-of-00015 |
// Demangled: copy_to_y(int, float*, float*, int)
Function : _Z9copy_to_yiPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_CTAID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x0 ?trans6;
LDC R0, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD R7, R7, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: copy_to_y(int, float*, float*, int)
_Z9copy_to_yiPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s0, s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[2:3], off
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[2:3], null, v1, s0, s[2:3]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| copy_to_y | 476 | 595 | stackv2-00001-of-00015 |
// Demangled: kernel_Dvec_mult(int, int, float*, float*, float*, int)
Function : _Z16kernel_Dvec_multiiPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans7;
LDC R8, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x2 ?trans1;
S2R R6, SR_TID.Y &wr=0x2 ?trans4;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x4 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x5 ?trans1;
IMAD R7, R7, UR7, R6 &req={2} ?WAIT2_END_GROUP;
IMAD R0, R0, UR6, R9 &req={0} ?trans2;
IMAD R11, R7, UR9, R8 &req={1} ?trans2;
IMAD R9, R0, UR8, R7 ?trans2;
IMAD.WIDE R4, R11, 0x4, R4 &req={3} ?trans1;
LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans3;
IMAD.WIDE R2, R9, 0x4, R2 &req={5} ?WAIT2_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &req={4} &wr=0x2 ?trans4;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
FMUL R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel_Dvec_mult(int, int, float*, float*, float*, int)
_Z16kernel_Dvec_multiiPfS_S_i:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s8, s[0:1], 0x20
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s5, v[0:1]
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x18
v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4]
v_mad_u64_u32 v[4:5], null, v3, s3, s[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_lshlrev_b64 v[2:3], 2, v[4:5]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v4, v[4:5], off
global_load_b32 v2, v[2:3], off
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v4, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel_Dvec_mult | 689 | 834 | stackv2-00001-of-00015 |
// Demangled: set(int*, int)
Function : _Z3setPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R5, R5, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0xa0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: set(int*, int)
_Z3setPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v1, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| set | 297 | 320 | stackv2-00001-of-00015 |
// Demangled: matrix_vector_mult(int*, int*, int*)
Function : _Z18matrix_vector_multPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R16, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R19, SR_CTAID.X &wr=0x3 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={0} ?trans1;
SHF.R.U32.HI R5, RZ, 0x9, R19 &req={3} ?WAIT5_END_GROUP;
IMAD R5, R5, 0xc4, R0 ?WAIT7_END_GROUP;
@!P0 LDC.64 R14, c[0x0][0x390] &wr=0x0 ?trans1;
@!P0 IMAD R3, R19, 0x9, RZ ?trans2;
IMAD.WIDE.U32 R16, R5, 0x4, R16 &req={1} ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &req={2} &wr=0x2 ?trans1;
@!P0 IMAD.WIDE R14, R3, 0x4, R14 &req={0} ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans4;
@!P0 LDG.E R8, desc[UR6][R14.64] &wr=0x3 ?trans4;
@!P0 LDG.E R9, desc[UR6][R14.64+0x4] &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
@!P0 LDG.E R10, desc[UR6][R14.64+0x8] &wr=0x3 ?trans4;
@!P0 LDG.E R11, desc[UR6][R14.64+0xc] &wr=0x3 ?trans4;
@!P0 LDG.E R4, desc[UR6][R14.64+0x10] &wr=0x4 ?trans4;
@!P0 LDG.E R5, desc[UR6][R14.64+0x14] &wr=0x4 ?trans4;
@!P0 LDG.E R6, desc[UR6][R14.64+0x18] &wr=0x4 ?trans4;
@!P0 LDG.E R7, desc[UR6][R14.64+0x1c] &wr=0x4 ?trans4;
@!P0 LDG.E R13, desc[UR6][R14.64+0x20] &rd=0x5 &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R12, R0, UR4, 0x2 ?trans2;
LOP3.LUT R19, R19, 0x1ff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
IMAD R19, R19, 0xc4, R0 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R19, 0x4, R2 &req={1} ?trans1;
IADD3 R14, PT, PT, R0.reuse, -0xf, RZ &req={5} ?trans2;
IADD3 R15, PT, PT, R0, -0xe, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P6, PT, R14, 0xc3, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R0, 0xc3, PT ?trans1;
@!P0 STS.128 [UR4+0x310], R8 &req={3} ?trans4;
@!P0 STS.128 [UR4+0x320], R4 &req={4} &rd=0x0 ?trans4;
@!P0 STS [UR4+0x330], R13 &req={2} ?trans4;
STS [R12], R17 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R19, desc[UR6][R2.64] &wr=0x2 ?trans1;
ISETP.GT.U32.AND P0, PT, R15, 0xc3, PT ?WAIT3_END_GROUP;
@!P6 LDS R8, [R12+-0x3c] ?trans4;
@!P6 LDS R9, [UR4+0x310] &wr=0x1 ?trans6;
@!P0 LDS R5, [R12+-0x38] ?trans4;
@!P0 LDS R10, [UR4+0x314] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R0, -0xd, RZ &req={0} ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R0, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R4, 0xc3, PT ?trans2;
ISETP.GT.U32.AND P2, PT, R6, 0xc3, PT ?trans1;
ISETP.GT.U32.AND P4, PT, R0.reuse, 0xc2, PT ?trans1;
ISETP.GT.U32.AND P5, PT, R0, 0xb6, PT ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?trans1;
@!P3 LDS R6, [UR4+0x320] ?trans7;
@!P1 LDS R7, [R12+-0x34] ?trans4;
@!P1 LDS R14, [UR4+0x318] &wr=0x0 ?trans4;
@!P2 LDS R11, [R12+-0x4] ?trans4;
@!P2 LDS R16, [UR4+0x31c] &wr=0x4 ?trans1;
@!P6 IMAD R4, R8, R9, RZ &req={1} ?trans1;
ISETP.GT.U32.AND P6, PT, R0, 0xb5, PT ?WAIT2_END_GROUP;
@!P3 LDS R9, [R12] &wr=0x1 ?trans4;
@!P4 LDS R8, [UR4+0x324] ?trans1;
@!P0 IMAD R4, R5, R10, R4 &req={3} ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0xb4, PT ?trans2;
@!P4 LDS R5, [R12+0x4] &wr=0x3 ?trans4;
@!P5 LDS R13, [R12+0x34] ?trans4;
@!P5 LDS R10, [UR4+0x328] &wr=0x5 ?trans4;
@!P6 LDS R15, [R12+0x38] ?trans4;
@!P6 LDS R18, [UR4+0x32c] &wr=0x5 ?trans4;
@!P0 LDS R17, [R12+0x3c] ?trans4;
@!P0 LDS R0, [UR4+0x330] &wr=0x5 ?trans1;
@!P1 IMAD R4, R7, R14, R4 &req={0} ?WAIT4_END_GROUP;
@!P2 IMAD R4, R11, R16, R4 &req={4} ?WAIT4_END_GROUP;
@!P3 IMAD R4, R9, R6, R4 &req={1} ?WAIT4_END_GROUP;
@!P4 IMAD R4, R5, R8, R4 &req={3} ?WAIT4_END_GROUP;
@!P5 IMAD R4, R13, R10, R4 &req={5} ?WAIT4_END_GROUP;
@!P6 IMAD R4, R15, R18, R4 ?WAIT4_END_GROUP;
@!P0 IMAD R4, R17, R0, R4 ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, R4, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R19 ?trans1;
EXIT ?trans5;
BRA 0x500;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_vector_mult(int*, int*, int*)
_Z18matrix_vector_multPiS_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_3
s_mul_i32 s8, s15, 9
s_movk_i32 s3, 0xffdc
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[8:9], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s8
s_addc_u32 s1, s1, s9
.LBB0_2:
s_load_b32 s8, s[0:1], 0x0
v_mov_b32_e32 v1, s3
s_add_i32 s3, s3, 4
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_lg_u32 s3, 0
s_waitcnt lgkmcnt(0)
v_mov_b32_e32 v2, s8
ds_store_b32 v1, v2 offset:820
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s15, 9
s_movk_i32 s1, 0x310
v_mad_u64_u32 v[3:4], null, 0xc4, s0, v[0:1]
v_mov_b32_e32 v4, 0
v_lshlrev_b32_e32 v6, 2, v0
s_mov_b32 s0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[3:4]
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v5, v[1:2], off
v_dual_mov_b32 v1, v4 :: v_dual_add_nc_u32 v2, -15, v0
v_subrev_nc_u32_e32 v3, 60, v6
s_waitcnt vmcnt(0)
ds_store_b32 v6, v5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_4:
v_mov_b32_e32 v4, v2
s_mov_b32 s2, 0
.LBB0_5:
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e32 0xc4, v4
s_cbranch_execz .LBB0_7
s_add_i32 s4, s1, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_dual_mov_b32 v6, s4 :: v_dual_add_nc_u32 v5, s2, v3
ds_load_b32 v7, v5
ds_load_b32 v8, v6
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[5:6], null, v8, v7, v[1:2]
v_mov_b32_e32 v1, v5
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s3
v_add_nc_u32_e32 v4, 1, v4
s_add_i32 s2, s2, 4
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 12
s_cbranch_scc0 .LBB0_5
v_add_nc_u32_e32 v3, 56, v3
v_add_nc_u32_e32 v2, 14, v2
s_add_i32 s0, s0, 1
s_add_i32 s1, s1, 12
s_cmp_eq_u32 s0, 3
s_cbranch_scc0 .LBB0_4
s_and_b32 s0, s15, 0x1ff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mulk_i32 s0, 0xc4
v_add_lshl_u32 v0, s0, v0, 2
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[6:7]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_vector_mult | 2,268 | 1,328 | stackv2-00001-of-00015 |
// Demangled: closestNodeCUDA(int*, int*, int*, int*, int*, int*, int*, int)
Function : _Z15closestNodeCUDAPiS_S_S_S_S_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x2 ?trans6;
S2UR UR6, SR_CgaCtaId &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x270 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans1;
LDCU UR10, c[0x0][0x3b8] &wr=0x4 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x800, URZ ?trans1;
MOV R7, UR7 &req={2} ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={3} ?WAIT2_END_GROUP;
ULEA UR5, UR6, UR5, 0x18 ?trans1;
IMAD R5, R11, UR7, R6 &req={1} ?WAIT3_END_GROUP;
LEA R0, R6.reuse, UR4, 0x2 ?trans2;
LEA R4, R6, UR5, 0x2 ?trans1;
ISETP.GE.U32.AND P0, PT, R5, UR10, PT &req={4} ?WAIT13_END_GROUP;
@P0 BRA 0x260 &req={0} ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R2.64] &wr=0x2 ?trans1;
BSSY.RELIABLE B1, 0x220 ?trans1;
ISETP.NE.AND P0, PT, R9, 0x7fffffff, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x210 ?trans5;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x0 ?trans2;
LEA R2, P0, R5, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R5, UR5, RZ, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR8][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STS [R0], R9 &rd=0x0 ?trans2;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 STS [R4], R5 &rd=0x1 ?trans1;
@!P0 BRA 0x260 ?trans5;
BSYNC.RELIABLE B1 ?trans5;
MOV R3, 0x7fffffff ?trans1;
MOV R5, 0xffffffff &req={1} ?WAIT4_END_GROUP;
STS [R0], R3 &rd=0x2 ?trans4;
STS [R4], R5 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R7, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3d0 ?trans5;
MOV R5, R7 &req={2,1} ?trans1;
SHF.R.U32.HI R7, RZ, 0x1, R7 ?trans1;
BSSY.RECONVERGENT B0, 0x3a0 ?trans4;
ISETP.GE.U32.AND P0, PT, R6, R7, PT ?WAIT13_END_GROUP;
@P0 BRA 0x390 ?trans5;
IMAD R2, R7, 0x4, R0 ?trans1;
LDS R3, [R0] ?trans5;
LDS R2, [R2] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R2, R3, PT &req={1} ?WAIT13_END_GROUP;
@!P0 IMAD R3, R7, 0x4, R4 ?trans1;
@!P0 STS [R0], R2 ?trans5;
@!P0 LDS R3, [R3] &wr=0x1 ?trans4;
@!P0 STS [R4], R3 &req={1} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R5, 0x3, PT ?WAIT13_END_GROUP;
@P0 BRA 0x2c0 ?trans5;
ISETP.NE.AND P1, PT, R6.reuse, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x4d0 ?trans1;
LOP3.LUT P0, RZ, R6, R11, RZ, 0xfc, !PT ?WAIT11_END_GROUP;
@P1 BRA 0x4c0 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &req={2,1} &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={3} ?trans1;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={1} ?WAIT8_END_GROUP;
LDS R7, [UR4] &wr=0x1 ?trans4;
LDS R9, [UR4+0x800] &req={0} &wr=0x0 ?trans1;
IMAD.WIDE.U32 R4, R11, 0x4, R4 &req={2} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64], R7 &req={1} &rd=0x3 ?trans4;
STG.E desc[UR8][R4.64], R9 &req={0} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P0 BRA 0x1040 ?trans5;
HFMA2 R0, -RZ, RZ, 0, 9.5367431640625e-07 &req={2,0} ?WAIT7_END_GROUP;
IADD3 R2, PT, PT, R0.reuse, -0x1, RZ &req={3,2} ?trans2;
LOP3.LUT R18, R0, 0x7, RZ, 0xc0, !PT ?trans1;
MOV R3, RZ &req={1} ?trans2;
ISETP.GE.U32.AND P1, PT, R2, 0x7, PT ?trans2;
ISETP.NE.AND P0, PT, R18, RZ, PT ?WAIT11_END_GROUP;
@!P1 BRA 0x960 &req={0} ?trans5;
LOP3.LUT R2, R0.reuse, 0xfffffff8, RZ, 0xc0, !PT ?trans1;
MOV.64 R6, RZ ?trans2;
MOV R3, RZ ?trans1;
IMAD.WIDE.U32 R4, R0, 0x4, RZ ?trans1;
IADD3 R2, PT, PT, -R2, RZ, RZ ?trans1;
LDCU.128 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
NOP ?WAIT5_END_GROUP;
IADD.64 R10, R4, UR4 &req={0} ?trans2;
IADD.64 R8, R6, UR4 ?WAIT4_END_GROUP;
LDG.E R21, desc[UR8][R10.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR8][R8.64] &wr=0x2 ?trans1;
IADD.64 R14, R4, UR6 ?trans2;
ISETP.GE.AND P1, PT, R21, R12, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64], R21 ?trans4;
@!P1 LDG.E R17, desc[UR8][R14.64] &wr=0x2 ?trans1;
IADD.64 R12, R6, UR6 ?WAIT6_END_GROUP;
@!P1 STG.E desc[UR8][R12.64], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R23, desc[UR8][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R23, R16, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0x4], R23 ?trans4;
@!P1 LDG.E R19, desc[UR8][R14.64+0x4] &wr=0x2 ?trans4;
@!P1 STG.E desc[UR8][R12.64+0x4], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R25, desc[UR8][R10.64+0x8] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x8] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R25, R16, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0x8], R25 ?trans4;
@!P1 LDG.E R17, desc[UR8][R14.64+0x8] &req={0} &wr=0x2 ?trans4;
@!P1 STG.E desc[UR8][R12.64+0x8], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R21, desc[UR8][R10.64+0xc] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R8.64+0xc] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R21, R16, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0xc], R21 ?trans4;
@!P1 LDG.E R19, desc[UR8][R14.64+0xc] &req={1} &wr=0x2 ?trans4;
@!P1 STG.E desc[UR8][R12.64+0xc], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R23, desc[UR8][R10.64+0x10] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x10] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R23, R16, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0x10], R23 ?trans4;
@!P1 LDG.E R17, desc[UR8][R14.64+0x10] &req={0} &wr=0x2 ?trans4;
@!P1 STG.E desc[UR8][R12.64+0x10], R17 &req={2} &rd=0x0 ?trans4;
LDG.E R25, desc[UR8][R10.64+0x14] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x14] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R25, R16, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0x14], R25 ?trans4;
@!P1 LDG.E R19, desc[UR8][R14.64+0x14] &req={1} &wr=0x2 ?trans4;
@!P1 STG.E desc[UR8][R12.64+0x14], R19 &req={2} &rd=0x1 ?trans4;
LDG.E R21, desc[UR8][R10.64+0x18] &wr=0x2 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x18] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R21, R16, PT &req={2} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0x18], R21 &rd=0x2 ?trans4;
@!P1 LDG.E R17, desc[UR8][R14.64+0x18] &req={0} &wr=0x3 ?trans4;
@!P1 STG.E desc[UR8][R12.64+0x18], R17 &req={3} &rd=0x2 ?trans4;
LDG.E R23, desc[UR8][R10.64+0x1c] &wr=0x3 ?trans4;
LDG.E R16, desc[UR8][R8.64+0x1c] &wr=0x3 ?trans2;
ISETP.GE.AND P1, PT, R23, R16, PT &req={3} ?WAIT13_END_GROUP;
@!P1 STG.E desc[UR8][R8.64+0x1c], R23 &rd=0x2 ?trans4;
@!P1 LDG.E R19, desc[UR8][R14.64+0x1c] &req={1} &wr=0x3 ?trans1;
IADD3 R2, PT, PT, R2, 0x8, RZ ?trans1;
IADD.64 R4, R4, 0x20 ?trans2;
IADD.64 R6, R6, 0x20 ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R3, 0x8, RZ ?trans1;
@!P1 STG.E desc[UR8][R12.64+0x1c], R19 &req={3} &rd=0x2 ?trans1;
ISETP.NE.AND P1, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@P1 BRA 0x5c0 &req={2} ?trans5;
@!P0 BRA 0xef0 ?trans5;
ISETP.GE.U32.AND P0, PT, R18, 0x4, PT ?trans1;
LOP3.LUT R14, R0, 0x3, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xbf0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R11, PT, PT, R3, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R3, 0x4, R4 ?trans1;
LDG.E R15, desc[UR8][R6.64] &wr=0x2 ?trans4;
LDG.E R2, desc[UR8][R4.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R15, R2, PT &req={2} ?WAIT13_END_GROUP;
@!P0 LDC.64 R8, c[0x0][0x398] &wr=0x0 ?trans1;
@!P0 STG.E desc[UR8][R4.64], R15 &rd=0x1 ?trans1;
@!P0 LEA R8, P1, R11, R8, 0x2 &req={0} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R9, R11, R9, RZ, 0x2, P1 ?trans2;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans4;
@!P0 LDG.E R9, desc[UR8][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R0, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R3, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR8][R10.64], R9 &req={2} &rd=0x0 ?trans4;
LDG.E R2, desc[UR8][R4.64+0x4] &wr=0x2 ?trans4;
LDG.E R17, desc[UR8][R12.64+0x4] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R0, 0x4, R10 ?trans1;
ISETP.GE.AND P0, PT, R17, R2, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR8][R4.64+0x4], R17 &rd=0x2 ?trans4;
@!P0 LDG.E R15, desc[UR8][R6.64+0x4] &req={1} &wr=0x3 ?trans4;
@!P0 STG.E desc[UR8][R10.64+0x4], R15 &req={3} &rd=0x2 ?trans4;
LDG.E R19, desc[UR8][R12.64+0x8] &wr=0x3 ?trans4;
LDG.E R2, desc[UR8][R4.64+0x8] &wr=0x3 ?trans2;
ISETP.GE.AND P0, PT, R19, R2, PT &req={3} ?WAIT13_END_GROUP;
@!P0 STG.E desc[UR8][R4.64+0x8], R19 &rd=0x2 ?trans4;
@!P0 LDG.E R9, desc[UR8][R6.64+0x8] &req={0} &wr=0x3 ?trans4;
@!P0 STG.E desc[UR8][R10.64+0x8], R9 &req={3} &rd=0x2 ?trans4;
LDG.E R21, desc[UR8][R12.64+0xc] &wr=0x3 ?trans4;
LDG.E R2, desc[UR8][R4.64+0xc] &wr=0x3 ?trans2;
ISETP.GE.AND P0, PT, R21, R2, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0xbe0 &req={2} ?trans5;
STG.E desc[UR8][R4.64+0xc], R21 &rd=0x0 ?trans4;
LDG.E R7, desc[UR8][R6.64+0xc] &wr=0x2 ?trans4;
STG.E desc[UR8][R10.64+0xc], R7 &req={2} &rd=0x0 ?trans2;
IADD3 R3, PT, PT, R3, 0x4, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xef0 ?trans5;
ISETP.NE.AND P1, PT, R14, 0x1, PT ?trans1;
LOP3.LUT R2, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P1 BRA 0xde0 ?trans6;
LDC.64 R6, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R3, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R3, 0x4, R6 ?trans1;
LDG.E R15, desc[UR8][R4.64] &wr=0x2 ?trans4;
LDG.E R2, desc[UR8][R10.64] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R15, R2, PT &req={2} ?WAIT13_END_GROUP;
@!P1 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans1;
@!P1 STG.E desc[UR8][R10.64], R15 &rd=0x1 ?trans1;
@!P1 LEA R8, P2, R9, R6, 0x2 &req={0} ?WAIT4_END_GROUP;
@!P1 LEA.HI.X R9, R9, R7, RZ, 0x2, P2 ?trans2;
LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans4;
@!P1 LDG.E R9, desc[UR8][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R3, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R0, 0x4, R10 ?trans1;
@!P1 STG.E desc[UR8][R12.64], R9 &req={2} &rd=0x1 ?trans5;
LDG.E R7, desc[UR8][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R2, desc[UR8][R10.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P1, PT, R7, R2, PT &req={2} ?WAIT13_END_GROUP;
@!P1 LEA R4, P2, R0.reuse, R12, 0x2 ?trans1;
@!P1 STG.E desc[UR8][R10.64+0x4], R7 &rd=0x1 ?trans3;
@!P1 LEA.HI.X R5, R0, R13, RZ, 0x2, P2 ?WAIT6_END_GROUP;
@!P1 LDG.E R5, desc[UR8][R4.64+0x4] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x2, RZ ?WAIT3_END_GROUP;
@!P1 STG.E desc[UR8][R12.64+0x4], R5 &req={2} &rd=0x1 ?trans4;
@P0 BRA 0xef0 ?trans5;
LDC.64 R6, c[0x0][0x390] &req={1,0} &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R3, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R9, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R3, 0x4, R6 ?trans1;
LDG.E R11, desc[UR8][R4.64] &wr=0x2 ?trans4;
LDG.E R2, desc[UR8][R6.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R11, R2, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xef0 ?trans5;
LDC.64 R12, c[0x0][0x398] &wr=0x0 ?trans1;
STG.E desc[UR8][R6.64], R11 &rd=0x2 ?trans1;
LEA R4, P0, R9, R12, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R9, R13, RZ, 0x2, P0 ?WAIT6_END_GROUP;
LDG.E R5, desc[UR8][R4.64] &wr=0x3 ?trans1;
LEA R2, P0, R3, R12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R3, R3, R13, RZ, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R5 &req={3} &rd=0x2 ?trans4;
ISETP.GT.U32.AND P0, PT, R0, 0x1, PT ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
SHF.R.U32.HI R0, RZ, 0x1, R0 ?WAIT5_END_GROUP;
@P0 BRA 0x4f0 ?trans5;
LDC.64 R2, c[0x0][0x390] &req={2} &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x380] &req={1,0} &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans1;
LDG.E R15, desc[UR8][R2.64] &req={2} &wr=0x0 ?trans7;
LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x3b0] &wr=0x3 ?trans8;
LDC.64 R12, c[0x0][0x3a8] &wr=0x4 ?trans1;
STG.E desc[UR8][R4.64], R15 &req={0} &rd=0x0 ?trans4;
LDG.E R7, desc[UR8][R6.64] &req={1} &wr=0x2 ?trans4;
STG.E desc[UR8][R8.64], R7 &req={2} &rd=0x0 ?trans4;
STG.E desc[UR8][R10.64], R7 &req={3} &rd=0x0 ?trans4;
LDG.E R17, desc[UR8][R8.64] &wr=0x4 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT2_END_GROUP;
IMAD.WIDE R2, R17, 0x4, R12 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R19 &rd=0x0 ?trans2;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x1080;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: closestNodeCUDA(int*, int*, int*, int*, int*, int*, int*, int)
_Z15closestNodeCUDAPiS_S_S_S_S_S_i:
s_mov_b32 s16, s15
s_clause 0x3
s_load_b32 s17, s[0:1], 0x4c
s_load_b32 s18, s[0:1], 0x38
s_load_b256 s[8:15], s[0:1], 0x0
s_load_b256 s[0:7], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_mov_b32 s7, exec_lo
s_and_b32 s6, s17, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s16, s6, v[0:1]
v_cmpx_gt_u32_e64 s18, v1
s_cbranch_execz .LBB0_6
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s1, exec_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e64 s0, 0x7fffffff, v4
v_cmpx_ne_u32_e32 0x7fffffff, v4
s_cbranch_execz .LBB0_3
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
s_and_not1_b32 s0, s0, exec_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v2
s_and_b32 s17, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s0, s0, s17
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(VALU_DEP_2)
s_and_saveexec_b32 s1, s0
v_bfrev_b32_e32 v4, -2
v_mov_b32_e32 v1, -1
s_or_b32 exec_lo, exec_lo, s1
v_lshlrev_b32_e32 v2, 2, v0
ds_store_2addr_stride64_b32 v2, v1, v4 offset1:8
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s7
s_cmp_lt_u32 s6, 2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_12
v_lshlrev_b32_e32 v1, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v2, 0x800, v1
.LBB0_8:
s_mov_b32 s0, s6
s_lshr_b32 s6, s6, 1
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s6, v0
s_cbranch_execz .LBB0_11
v_lshl_add_u32 v3, s6, 2, v2
ds_load_b32 v3, v3
ds_load_b32 v4, v2
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v3, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_11
v_lshl_add_u32 v4, s6, 2, v1
ds_load_b32 v4, v4
ds_store_b32 v2, v3
s_waitcnt lgkmcnt(1)
ds_store_b32 v1, v4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_gt_u32 s0, 3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_8
.LBB0_12:
s_mov_b32 s17, 0
s_mov_b32 s20, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_21
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[16:17], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s6, s14, s0
s_addc_u32 s7, s15, s1
ds_load_2addr_stride64_b32 v[1:2], v0 offset1:8
s_add_u32 s0, s12, s0
s_addc_u32 s1, s13, s1
s_cmp_lg_u32 s16, 0
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b32 v0, v2, s[0:1]
global_store_b32 v0, v1, s[6:7]
s_cbranch_scc1 .LBB0_21
s_mov_b32 s0, 16
.LBB0_15:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_ashr_i32 s1, s0, 31
s_mov_b64 s[16:17], 0
s_lshl_b64 s[6:7], s[0:1], 2
s_add_u32 s1, s12, s6
s_addc_u32 s21, s13, s7
s_add_u32 s22, s14, s6
s_addc_u32 s7, s15, s7
.LBB0_16:
s_add_u32 s24, s1, s16
s_addc_u32 s25, s21, s17
s_add_u32 s18, s12, s16
s_addc_u32 s19, s13, s17
s_clause 0x1
global_load_b32 v1, v0, s[24:25]
global_load_b32 v2, v0, s[18:19]
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v1, v2
s_cbranch_vccnz .LBB0_18
s_add_u32 s24, s14, s16
s_addc_u32 s25, s15, s17
s_add_u32 s26, s22, s16
s_addc_u32 s27, s7, s17
global_store_b32 v0, v1, s[18:19]
global_load_b32 v1, v0, s[26:27]
s_waitcnt vmcnt(0)
global_store_b32 v0, v1, s[24:25]
.LBB0_18:
s_add_u32 s16, s16, 4
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s6, s16
s_cbranch_scc0 .LBB0_16
s_lshr_b32 s1, s0, 1
s_cmp_lt_u32 s0, 2
s_mov_b32 s0, s1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_15
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v2, 1
global_load_b32 v1, v0, s[12:13]
s_waitcnt vmcnt(0)
global_store_b32 v0, v1, s[8:9]
global_load_b32 v1, v0, s[14:15]
s_waitcnt vmcnt(0)
s_clause 0x1
global_store_b32 v0, v1, s[10:11]
global_store_b32 v0, v1, s[4:5]
global_load_b32 v0, v0, s[10:11]
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_21:
s_or_b32 exec_lo, exec_lo, s20
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
| closestNodeCUDA | 7,286 | 2,443 | stackv2-00001-of-00015 |
// Demangled: cudaRelax(int*, int*, int*, int*)
Function : _Z9cudaRelaxPiS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R9, c[0x0][0x360] &wr=0x2 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R9, R9, UR6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R7, R2, 0x4000, R9 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans4;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R2, R2, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R2.64] &rd=0x1 &wr=0x5 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT &req={1,0} ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R2, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R9 ?trans2;
LEA R2, P0, R9, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R9, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R4, R7, RZ &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R0, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x200;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: cudaRelax(int*, int*, int*, int*)
_Z9cudaRelaxPiS_S_S_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_load_b32 s0, s[10:11], 0x0
s_and_b32 s1, s1, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
v_lshl_add_u32 v2, s0, 14, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v3, v[2:3], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e32 0, v3
s_cbranch_execz .LBB1_4
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
global_load_b32 v2, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_4
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_ashr_i32 s1, s0, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 2
global_load_b32 v4, v[0:1], off
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
s_load_b32 s0, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v2, s0, v3
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, v2, v4
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_4
global_store_b32 v[0:1], v2, off
.LBB1_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| cudaRelax | 897 | 935 | stackv2-00001-of-00015 |
// Demangled: G_srand(curandStateXORWOW*, unsigned long)
Function : _Z7G_srandP17curandStateXORWOWm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
S2R R8, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xea0 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
LOP3.LUT R0, R2, 0xaad26b49, RZ, 0x3c, !PT &req={1} ?trans2;
LOP3.LUT R2, R3, 0xf7dcefdd, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
IMAD R0, R0, 0x4182bed5, RZ ?trans2;
IMAD R3, R2, -0x658354e5, RZ ?trans2;
IMAD.WIDE.U32 R6, R8, 0x30, R6 &req={2} ?trans1;
IADD3 R5, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
LOP3.LUT R10, R0.reuse, 0x159a55e5, RZ, 0x3c, !PT ?trans2;
IADD3 R4, PT, PT, R0.reuse, 0x64f0c9, R3 ?trans2;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?trans1;
STG.E.64 desc[UR4][R6.64], R4 &req={3} &rd=0x1 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x1 ?trans6;
@!P0 BRA 0xe90 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe20 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe10 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x2c0 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x250 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x210 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x190 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xee0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: G_srand(hiprandState*, unsigned long)
_Z7G_srandP12hiprandStatem:
s_load_b64 s[0:1], s[0:1], 0x4
s_load_b128 s[16:19], s[2:3], 0x0
v_dual_mov_b32 v6, 0 :: v_dual_and_b32 v5, 0x3ff, v0
v_bfe_u32 v1, v0, 10, 10
v_bfe_u32 v0, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_delay_alu instid0(VALU_DEP_2)
v_mul_u32_u24_e32 v1, s1, v1
s_mul_i32 s0, s0, s1
s_xor_b32 s1, s19, 0xa03697cb
v_mul_lo_u32 v2, s0, v5
s_xor_b32 s0, s18, 0x2c7f967f
s_mul_i32 s5, s1, 0x7b99840d
s_mul_i32 s4, s0, 0x493c4aa1
s_add_i32 s2, s5, 0x1f123bb5
s_add_i32 s0, s4, 0x75bcd15
s_xor_b32 s1, s4, 0x159a55e5
s_add_i32 s6, s4, 0x583f19
v_add3_u32 v2, v2, v1, v0
s_add_i32 s4, s4, s5
s_xor_b32 s3, s5, 0x5491333
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
s_delay_alu instid0(VALU_DEP_2)
v_mul_lo_u32 v8, v2, 48
s_add_i32 s0, s4, 0x64f0c9
v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v7, s0
s_mov_b32 s5, 0
s_mov_b32 s18, exec_lo
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s7, s7, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[6:7]
s_mov_b32 s9, 0
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[14:15], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_6:
s_load_b32 s4, s[14:15], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s3, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s2
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s3
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s4, 0, vcc_lo
s_cselect_b32 s4, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s14, s14, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s15, s15, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s3
v_cndmask_b32_e64 v3, v3, v11, s2
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s4
s_cbranch_scc0 .LBB0_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s6, s6, 0xc80
s_addc_u32 s7, s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s5, vcc_lo, s5
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s18
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
v_mad_u64_u32 v[6:7], null, v5, 48, s[16:17]
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(3)
global_store_b128 v[6:7], v[0:3], off offset:32
s_waitcnt lgkmcnt(1)
global_store_b128 v[6:7], v[9:12], off offset:16
s_waitcnt lgkmcnt(0)
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| G_srand | 7,857 | 2,947 | stackv2-00001-of-00015 |
// Demangled: G_testRand(double*, curandStateXORWOW*)
Function : _Z10G_testRandPdP17curandStateXORWOW
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R11, 0x30, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R6, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R0, desc[UR4][R2.64+0x14] &rd=0x0 &wr=0x3 ?trans1;
S2R R10, SR_CTAID.X &wr=0x0 ?trans2;
IMAD R3, R10, 0x4, R11 &req={0} ?trans1;
SHF.R.U32.HI R4, RZ, 0x2, R7 &req={2} ?WAIT4_END_GROUP;
LOP3.LUT R7, R4, R7, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R9, R0, 0x10, RZ &req={3} ?trans1;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R7, R7, RZ ?WAIT4_END_GROUP;
LOP3.LUT R8, R0, R9, R8, 0x96, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R8, R7, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, 0x587c5, R7 ?trans1;
HFMA2 R7, -RZ, RZ, 0.1171875, 0 ?WAIT3_END_GROUP;
I2FP.F32.U32 R6, R6 ?trans1;
IMAD.WIDE.U32 R4, R3, 0x8, R4 &req={0} ?WAIT4_END_GROUP;
FFMA R2, R6, R7, 1.1641532182693481445e-10 ?WAIT6_END_GROUP;
F2F.F64.F32 R2, R2 &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: G_testRand(double*, hiprandState*)
_Z10G_testRandPdP12hiprandState:
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, v0, 48, s[2:3]
s_clause 0x2
global_load_b32 v3, v[1:2], off offset:24
global_load_b32 v4, v[1:2], off offset:40
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(2)
v_lshrrev_b32_e32 v2, 2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_xor_b32_e32 v2, v2, v3
s_waitcnt vmcnt(1)
v_lshlrev_b32_e32 v3, 4, v4
v_lshlrev_b32_e32 v5, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v3, v3, v5
v_xor3_b32 v2, v3, v4, v2
v_lshl_add_u32 v3, s15, 2, v0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add3_u32 v1, v1, v2, 0x587c5
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_u32_e32 v1, v1
v_lshlrev_b64 v[3:4], 3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmaak_f32 v1, 0x2f800000, v1, 0x2f800000
v_add_co_u32 v3, vcc_lo, s0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_cvt_f64_f32_e32 v[1:2], v1
global_store_b64 v[3:4], v[1:2], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| G_testRand | 757 | 730 | stackv2-00001-of-00015 |
// Demangled: mandelKernel(int*, unsigned long, float, float, float, float, int)
Function : _Z12mandelKernelPimffffi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R3, c[0x0][0x3a0] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x3 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R7, c[0x0][0x364] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT &req={2} ?WAIT7_END_GROUP;
S2UR UR4, SR_CTAID.X &wr=0x3 ?trans8;
LDC.64 R10, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R7, R7, UR5, R2 &req={1} ?WAIT2_END_GROUP;
IMAD R5, R5, UR4, R0 &req={3} ?WAIT3_END_GROUP;
I2FP.F32.U32 R0, R7 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
I2FP.F32.S32 R3, R5 ?WAIT3_END_GROUP;
FFMA R0, R0, R9, R11 &req={2} ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans2;
FFMA R3, R3, R8, R10 ?trans1;
@!P0 BRA 0x280 &req={1,0} ?trans6;
BSSY.RECONVERGENT B0, 0x280 ?trans1;
MOV R9, RZ ?trans1;
MOV R11, R0 ?trans1;
MOV R2, R3 ?trans1;
LDCU UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDCU UR9, c[0x0][0x3a0] &wr=0x1 ?trans5;
FMUL R4, R2, R2 ?trans1;
FMUL R15, R11, R11 ?WAIT4_END_GROUP;
FADD R6, R4, R15 ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, R6, 4, PT ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
FADD R13, R2, R2 ?trans1;
FADD R2, R4, -R15 ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R9, UR9, PT &req={1} ?trans1;
FFMA R11, R13, R11, R0 ?trans1;
FADD R2, R3, R2 ?WAIT11_END_GROUP;
@P0 BRA 0x1a0 ?trans5;
MOV R9, UR8 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={1,0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R7, UR6, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R3, R7, UR7, R3 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x2f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mandelKernel(int*, unsigned long, float, float, float, float, int)
_Z12mandelKernelPimffffi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x34
s_load_b32 s2, s[0:1], 0x20
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
s_cmp_lt_i32 s2, 1
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
s_cbranch_scc1 .LBB0_6
s_load_b128 s[4:7], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v2, v0
v_cvt_f32_i32_e32 v4, v1
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v3, v2, s6, s4
v_fma_f32 v4, v4, s7, s5
s_mov_b32 s4, 0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v6, v3 :: v_dual_mov_b32 v5, v4
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v6, v6
s_or_b32 s5, s5, exec_lo
v_fma_f32 v2, v5, v5, v7
s_delay_alu instid0(VALU_DEP_1)
v_cmp_nlt_f32_e32 vcc_lo, 4.0, v2
v_mov_b32_e32 v2, s4
s_and_saveexec_b32 s6, vcc_lo
v_mul_f32_e32 v2, v5, v5
v_add_f32_e32 v6, v6, v6
s_add_i32 s4, s4, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_cmp_eq_u32 s2, s4
v_dual_sub_f32 v7, v7, v2 :: v_dual_mov_b32 v2, s2
s_cselect_b32 s7, -1, 0
v_fma_f32 v5, v5, v6, v4
s_and_not1_b32 s5, s5, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_f32_e32 v6, v3, v7
s_and_b32 s7, s7, exec_lo
s_or_b32 s5, s5, s7
s_or_b32 exec_lo, exec_lo, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s6, exec_lo, s5
s_or_b32 s3, s6, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s3
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v2, 0
.LBB0_7:
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v1
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v5, v1, s3
v_mul_lo_u32 v6, v3, s2
v_mad_u64_u32 v[3:4], null, v1, s2, s[0:1]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add3_u32 v4, v6, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v3, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mandelKernel | 1,071 | 1,387 | stackv2-00001-of-00015 |
// Demangled: full_dot(float const*, float const*, int, float*)
Function : _Z8full_dotPKfS0_iPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R17, SR_CTAID.X &wr=0x1 ?trans7;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans3;
S2UR UR5, SR_CgaCtaId &wr=0x4 ?trans2;
ULEA UR4, UR5, UR4, 0x18 &req={4} ?trans1;
IMAD R4, R17, R2, R3 &req={1} ?WAIT5_END_GROUP;
LEA R0, R3, UR4, 0x2 ?trans1;
ISETP.GE.AND P0, PT, R4, UR8, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x3b0 &req={3,0} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x1e0 ?trans1;
MOV R13, R4 ?trans1;
MOV R15, RZ ?WAIT4_END_GROUP;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R12, R2, UR5, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R4, R13, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R13, 0x4, R10 &req={2} ?trans2;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R12, R13, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, UR8, PT ?trans1;
FFMA R15, R4, R6, R15 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0x150 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R0], R15 ?trans1;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x3, PT ?WAIT12_END_GROUP;
@!P0 LDS R4, [R0+0x20] ?trans4;
@!P0 LDS R5, [R0] &wr=0x0 ?trans2;
@!P0 FADD R5, R4, R5 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0x1, PT ?WAIT5_END_GROUP;
@!P1 LDS R4, [R0+0x10] ?trans4;
@!P1 LDS R7, [R0] &wr=0x0 ?trans2;
@!P1 FADD R7, R4, R7 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R0], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R3, RZ, PT ?WAIT5_END_GROUP;
@!P0 LDS R4, [R0+0x8] ?trans4;
@!P0 LDS R9, [R0] &wr=0x0 ?trans2;
@!P0 FADD R9, R4, R9 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 LDS R4, [UR4+0x4] ?trans4;
@!P1 LDS R5, [R0] &wr=0x0 ?trans2;
@!P1 FADD R5, R4, R5 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R0], R5 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R7, [UR4] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x4b0 ?trans5;
LDC.64 R4, c[0x0][0x398] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R17, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R7 &req={1} &rd=0x0 ?trans1;
MEMBAR.SC.GPU ?trans6;
ERRBAR;
CGAERRBAR ?trans6;
CCTL.IVALL ?trans2;
LDC R9, c[0x0][0x370] &wr=0x1 ?trans8;
LDC.64 R4, c[0x4][RZ] &req={0} &wr=0x1 ?trans2;
ATOMG.E.INC.STRONG.GPU PT, R4, desc[UR6][R4.64], R9 &req={1} &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R4, R7, PT &req={2} ?WAIT5_END_GROUP;
SEL R6, RZ, 0x1, P1 ?WAIT5_END_GROUP;
STS.U8 [UR4+0x40], R6 &rd=0x2 ?trans3;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.U8 R4, [UR4+0x40] &wr=0x3 ?trans2;
ISETP.NE.AND P1, PT, R4, RZ, PT &req={3} ?WAIT13_END_GROUP;
@!P1 EXIT ?trans5;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
STS [R0], RZ &rd=0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x9f0 ?trans1;
ISETP.GE.U32.AND P1, PT, R3, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P1 BRA 0x9e0 &req={4} ?trans5;
I2F.U32.RP R9, R2 &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R2.reuse, R3.reuse, RZ &req={2} ?trans1;
ISETP.NE.U32.AND P3, PT, R2, RZ, PT ?trans1;
BSSY.RECONVERGENT B1, 0x820 ?trans1;
MOV R15, RZ ?trans1;
MOV R17, R3 ?trans1;
ISETP.GE.U32.AND P1, PT, R6.reuse, UR5, PT ?trans1;
VIMNMX.U32 R7, R6, UR5, !PT &req={1} ?WAIT4_END_GROUP;
SEL R8, RZ, 0x1, P1 ?trans1;
MUFU.RCP R9, R9 &req={3} &wr=0x1 ?trans4;
IADD3 R7, PT, PT, R7, -R6, -R8 ?trans2;
IADD3 R4, PT, PT, R9, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R11, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R11, R2, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R10, R5, R11, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R10, R7, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R2, R4, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R2, PT ?WAIT13_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, -R2, RZ ?trans2;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R7, R2, PT ?WAIT13_END_GROUP;
@P2 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
@!P3 LOP3.LUT R5, RZ, R2, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R8, R5, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R5.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P2, PT, R5, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, R6, R4, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P1 BRA 0x810 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?trans1;
MOV R15, RZ ?trans1;
MOV R17, R3 ?trans1;
IMAD.WIDE.U32 R4, R3, 0x4, R4 &req={0} ?WAIT7_END_GROUP;
LDG.E R8, desc[UR6][R4.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R17, PT, PT, R2, R17, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={0} ?WAIT4_END_GROUP;
FADD R15, R8, R15 &req={2} ?WAIT8_END_GROUP;
@P1 BRA 0x7a0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x9d0 ?trans4;
@!P2 BRA 0x9c0 ?trans5;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R19, R2, 0x3, R17 ?trans1;
IADD3 R21, PT, PT, R17.reuse, R2.reuse, R2 ?trans2;
IADD3 R23, PT, PT, R17.reuse, R2, RZ ?trans1;
IMAD.WIDE.U32 R6, R17, 0x4, R4 &req={0} ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R8, R23, 0x4, R4.reuse ?trans1;
LDG.E R14, desc[UR6][R6.64] &rd=0x0 &wr=0x2 ?trans3;
IMAD.WIDE.U32 R10, R21, 0x4, R4.reuse ?trans2;
LDG.E R9, desc[UR6][R8.64] &wr=0x3 ?trans2;
IMAD.WIDE.U32 R12, R19, 0x4, R4 ?trans2;
LDG.E R11, desc[UR6][R10.64] &wr=0x4 ?trans4;
LDG.E R13, desc[UR6][R12.64] &wr=0x5 ?trans1;
IADD3 R17, PT, PT, R2.reuse, R17, R2 ?trans1;
IMAD R23, R2, 0x4, R23 ?WAIT2_END_GROUP;
IMAD R21, R2.reuse, 0x4, R21 ?trans1;
IADD3 R17, PT, PT, R2.reuse, R17, R2 ?trans1;
IMAD R19, R2.reuse, 0x4, R19 ?trans2;
IMAD.WIDE.U32 R6, R2, 0x10, R6 &req={0} ?trans2;
ISETP.GE.U32.AND P1, PT, R17, UR5, PT ?trans2;
FADD R14, R14, R15 &req={2} ?WAIT4_END_GROUP;
FADD R14, R14, R9 &req={3} ?WAIT4_END_GROUP;
FADD R14, R14, R11 &req={4} ?WAIT4_END_GROUP;
FADD R15, R14, R13 &req={5} ?trans1;
@!P1 BRA 0x890 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
STS [R0], R15 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P2, PT, R3, 0x3, PT ?WAIT12_END_GROUP;
@!P1 LDS R2, [R0+0x20] ?trans4;
@!P1 LDS R5, [R0] &req={0} &wr=0x0 ?trans2;
@!P1 FADD R5, R2, R5 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R0], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1, PT ?WAIT5_END_GROUP;
@!P2 LDS R2, [R0+0x10] ?trans4;
@!P2 LDS R7, [R0] &req={1} &wr=0x0 ?trans2;
@!P2 FADD R7, R2, R7 &req={0} ?WAIT5_END_GROUP;
@!P2 STS [R0], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 LDS R2, [R0+0x8] ?trans4;
@!P1 LDS R3, [R0] &wr=0x0 ?trans2;
@!P1 FADD R3, R2, R3 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R0], R3 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R2, [UR4+0x4] ?trans4;
@!P0 LDS R5, [R0] &wr=0x0 ?trans2;
@!P0 FADD R5, R2, R5 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R0], R5 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDS R5, [UR4] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans8;
LDC.64 R6, c[0x4][RZ] &req={2} &wr=0x1 ?trans1;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans4;
STG.E desc[UR6][R6.64], RZ &req={1} ?trans1;
EXIT ?trans5;
BRA 0xbe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: full_dot(float const*, float const*, int, float*)
_Z8full_dotPKfS0_iPf:
s_clause 0x1
s_load_b32 s10, s[0:1], 0x20
s_load_b32 s11, s[0:1], 0x10
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_mov_b32 s8, s15
s_mov_b32 s12, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s15, s10
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v1, s4
global_load_u16 v3, v1, s[2:3]
s_add_u32 s2, s2, s4
s_addc_u32 s3, s3, 0
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[1:2], null, s8, v3, v[0:1]
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_i32_e64 s11, v1
s_cbranch_execz .LBB0_8
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v4, s10, v3
v_mov_b32_e32 v3, 0
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_add_nc_u32_e32 v1, v1, v4
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s11, v1
global_load_b32 v2, v[7:8], off
global_load_b32 v5, v[5:6], off
s_or_b32 s12, vcc_lo, s12
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v3, v2, v5
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s12
v_lshlrev_b32_e32 v1, 2, v0
s_mov_b32 s4, 8
ds_store_b32 v1, v3
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_4:
s_mov_b32 s5, exec_lo
v_cmpx_gt_u32_e64 s4, v0
s_cbranch_execz .LBB0_6
v_lshl_add_u32 v2, s4, 2, v1
ds_load_b32 v2, v2
ds_load_b32 v3, v1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v1, v2
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s5
s_lshr_b32 s5, s4, 1
s_cmp_gt_u32 s4, 1
s_mov_b32 s4, s5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_4
v_mov_b32_e32 v1, 0
ds_load_b32 v2, v1
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s9
s_load_b64 s[4:5], s[0:1], 0x18
v_cmp_eq_u32_e64 s0, 0, v0
s_mov_b32 s9, 0
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_10
s_lshl_b64 s[6:7], s[8:9], 2
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v3, s10
s_waitcnt lgkmcnt(0)
s_add_u32 s6, s4, s6
s_addc_u32 s7, s5, s7
s_getpc_b64 s[8:9]
s_add_u32 s8, s8, count@rel32@lo+4
s_addc_u32 s9, s9, count@rel32@hi+12
global_store_b32 v1, v2, s[6:7]
s_waitcnt_vscnt null, 0x0
buffer_gl1_inv
buffer_gl0_inv
global_atomic_inc_u32 v2, v1, v3, s[8:9] glc
s_add_i32 s6, s10, -1
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, s6, v2
v_cndmask_b32_e64 v2, 0, 1, vcc_lo
ds_store_b8 v1, v2 offset:64
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s1
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_u8 v2, v1 offset:64
s_waitcnt lgkmcnt(0)
v_cmp_eq_u16_e32 vcc_lo, 0, v2
s_cbranch_vccnz .LBB0_21
v_lshlrev_b32_e32 v3, 2, v0
s_mov_b32 s1, exec_lo
ds_store_b32 v3, v1
v_cmpx_gt_u32_e64 s10, v0
s_cbranch_execz .LBB0_15
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, v0
global_load_u16 v5, v4, s[2:3]
s_mov_b32 s2, 0
.LBB0_13:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v2, v[6:7], off
s_waitcnt vmcnt(0)
v_dual_add_f32 v4, v4, v2 :: v_dual_add_nc_u32 v1, v1, v5
v_cmp_le_u32_e32 vcc_lo, s10, v1
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB0_13
s_or_b32 exec_lo, exec_lo, s2
ds_store_b32 v3, v4
.LBB0_15:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s1, 8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_16:
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s1, v0
s_cbranch_execz .LBB0_18
v_lshl_add_u32 v1, s1, 2, v3
ds_load_b32 v1, v1
ds_load_b32 v2, v3
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
ds_store_b32 v3, v1
.LBB0_18:
s_or_b32 exec_lo, exec_lo, s2
s_lshr_b32 s2, s1, 1
s_cmp_gt_u32 s1, 1
s_mov_b32 s1, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_16
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_21
v_mov_b32_e32 v0, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, count@rel32@lo+4
s_addc_u32 s1, s1, count@rel32@hi+12
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b32 v0, v1, s[4:5]
global_store_b32 v0, v0, s[0:1]
.LBB0_21:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| full_dot | 4,368 | 2,487 | stackv2-00001-of-00015 |
// Demangled: init_vector(float*, int)
Function : _Z11init_vectorPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
HFMA2 R9, -RZ, RZ, 1.875, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R4 &req={0} ?trans1;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R2.64], R9 &req={2} &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: init_vector(float*, int)
_Z11init_vectorPfi:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov_b32 s6, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB1_3
s_load_b32 s6, s[2:3], 0x0
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v0, 1.0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s6, s5
s_mov_b32 s5, 0
.LBB1_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s2, v2
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s5, vcc_lo, s5
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| init_vector | 525 | 591 | stackv2-00001-of-00015 |
// Demangled: f_addmat(float*, float*, float*, int, int)
Function : _Z8f_addmatPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R3, R2, UR5, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR7, PT &req={3} ?trans1;
IMAD R0, R5, UR4, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R3, UR6, R0 ?trans1;
ISETP.GE.OR P0, PT, R0, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: f_addmat(float*, float*, float*, int, int)
_Z8f_addmatPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s4, v0
v_cmp_gt_i32_e64 s2, s5, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
s_load_b128 s[8:11], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| f_addmat | 707 | 810 | stackv2-00001-of-00015 |
// Demangled: f_addmat4(float*, float*, float*, int, int, int)
Function : _Z9f_addmat4PfS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R3, R2, UR5, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR7, PT &req={3} ?trans1;
IMAD R0, R5, UR4, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R3, UR6, R0 ?trans1;
ISETP.GE.OR P0, PT, R0, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={0} ?WAIT7_END_GROUP;
LDC R8, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDG.E R0, desc[UR4][R4.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R2.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R12, R8, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
FADD R25, R0, R11 &req={4} ?trans1;
IMAD.WIDE R10, R8, 0x4, R4 ?WAIT4_END_GROUP;
STG.E desc[UR4][R6.64], R25 &rd=0x0 ?trans4;
LDG.E R10, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R12.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?WAIT5_END_GROUP;
IADD.64 R16, R8, R8 ?WAIT5_END_GROUP;
SHF.L.U64.HI R19, R16.reuse, 0x2, R17 ?trans2;
SHF.L.U32 R18, R16, 0x2, RZ ?trans1;
IMAD.WIDE R14, R8, 0x4, R6 ?WAIT4_END_GROUP;
IADD.64 R20, R4, R18.reuse ?trans2;
IADD.64 R22, R2, R18 ?trans2;
FADD R27, R10, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R14.64], R27 ?trans4;
LDG.E R20, desc[UR4][R20.64] &wr=0x2 ?trans4;
LDG.E R23, desc[UR4][R22.64] &wr=0x2 ?trans1;
IADD.64 R8, R8, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R9, R8.reuse, 0x2, R9 ?trans2;
SHF.L.U32 R8, R8, 0x2, RZ ?trans1;
IADD.64 R18, R6, R18 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R8.reuse ?trans2;
IADD.64 R2, R2, R8 ?trans2;
FADD R11, R20, R23 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R18.64], R11 ?trans4;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans4;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD.64 R6, R6, R8 &req={0} ?trans2;
FADD R9, R4, R3 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x370;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: f_addmat4(float*, float*, float*, int, int, int)
_Z9f_addmat4PfS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
v_cmp_gt_i32_e32 vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s5, v3
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_3
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[0:1], null, v3, s4, v[2:3]
s_mov_b32 s2, 4
.LBB1_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v1, 31, v0
s_add_i32 s2, s2, -1
s_cmp_lg_u32 s2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_nc_u32_e32 v0, s6, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
v_add_co_u32 v5, vcc_lo, s10, v1
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v2, vcc_lo
v_add_co_u32 v1, vcc_lo, s0, v1
global_load_b32 v3, v[3:4], off
global_load_b32 v4, v[5:6], off
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v3, v3, v4
global_store_b32 v[1:2], v3, off
s_cbranch_scc1 .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| f_addmat4 | 1,405 | 904 | stackv2-00001-of-00015 |
// Demangled: inputkernel(input*, input const*)
Function : _Z11inputkernelP5inputPKS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R7, R0, 0x64, R7 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={3} ?trans1;
IADD3 R7, PT, PT, R2, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: inputkernel(input*, input const*)
_Z11inputkernelP5inputPKS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[1:2], null, 0x64, s15, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| inputkernel | 386 | 361 | stackv2-00001-of-00015 |
// Demangled: reduce_max_naive(int*, int)
Function : _Z16reduce_max_naivePii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
LDC R7, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R7, UR4, RZ &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans4;
IADD3 R5, PT, PT, R0, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R2 ?trans1;
LDG.E R0, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans5;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans2;
VIMNMX.S32 R7, R0, R5, !PT &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reduce_max_naive(int*, int)
_Z16reduce_max_naivePii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s15, s15, s2
s_ashr_i32 s3, s2, 31
s_lshl_b32 s4, s15, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s5, s4, 31
s_lshl_b64 s[4:5], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s5
s_lshl_b64 s[2:3], s[2:3], 2
s_add_u32 s2, s0, s2
s_addc_u32 s3, s1, s3
s_clause 0x1
s_load_b32 s4, s[0:1], 0x0
s_load_b32 s2, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_max_i32 s2, s4, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reduce_max_naive | 399 | 449 | stackv2-00001-of-00015 |
// Demangled: mm_mult(double*, double*, double*, int, int, int)
Function : _Z7mm_multPdS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R9, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
LDCU UR17, c[0x0][0x39c] &wr=0x3 ?trans1;
MOV.64 R32, RZ ?WAIT2_END_GROUP;
LDCU.64 UR18, c[0x0][0x358] &wr=0x4 ?trans3;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R5, c[0x0][0x360] &wr=0x2 ?trans1;
UISETP.GE.AND UP0, UPT, UR17, 0x1, UPT &req={3} ?trans1;
IABS R7, R9 &req={1} ?WAIT5_END_GROUP;
PLOP3.LUT P3, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
I2F.RP R4, R7 &wr=0x1 ?trans1;
IMAD R0, R5, UR4, R0 &req={2} ?trans1;
MUFU.RCP R4, R4 &req={1} &wr=0x1 ?trans4;
ISETP.GE.AND P2, PT, R0, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={1} ?trans2;
IABS R4, R0 ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R5, R6, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R7, R5, R4 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, R2, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R2, -R7, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R2, PT ?trans1;
IADD3 R5, PT, PT, R2, -R7, RZ ?WAIT5_END_GROUP;
SEL R5, R5, R2, !P1 ?WAIT5_END_GROUP;
@!P2 IADD3 R5, PT, PT, -R5, RZ, RZ ?trans1;
@!P3 BRA 0xe70 &req={4,0} ?trans6;
ISETP.GE.U32.AND P1, PT, R2, R7, PT ?trans1;
LOP3.LUT R2, R0, R9.reuse, RZ, 0x3c, !PT ?trans1;
UISETP.GE.U32.AND UP0, UPT, UR17, 0x8, UPT ?trans1;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
ULOP3.LUT UR24, UR17, 0x7, URZ, 0xc0, !UPT ?trans1;
ISETP.GE.AND P2, PT, R2, RZ, PT ?trans1;
LOP3.LUT R2, RZ, R9, RZ, 0x33, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV.64 R32, RZ ?WAIT3_END_GROUP;
SEL R29, R2, R5, !P0 ?trans1;
@P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, RZ, UR24, PT ?WAIT5_END_GROUP;
@!P2 IADD3 R3, PT, PT, -R3, RZ, RZ ?trans2;
PLOP3.LUT P2, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT3_END_GROUP;
SEL R28, R2, R3, !P0 ?WAIT5_END_GROUP;
IMAD R28, R28, UR17, RZ ?WAIT5_END_GROUP;
@!P2 BRA 0x8b0 ?trans5;
LDCU.64 UR20, c[0x0][0x388] &wr=0x0 ?trans1;
MOV.64 R32, RZ ?trans2;
MOV R30, R28 ?trans1;
USHF.L.U32 UR6, UR17, 0x1, URZ ?trans1;
ULOP3.LUT UR4, UR17, 0x7ffffff8, URZ, 0xc0, !UPT ?trans1;
MOV R31, R29 ?trans2;
UIMAD.WIDE.U32 UR6, UR6, 0x8, URZ ?trans1;
UIADD3 UR16, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UIMAD.WIDE.U32 UR4, UR17, 0x28, UR6 ?trans1;
UIMAD.WIDE.U32 UR10, UR17, 0x20, UR6 ?trans1;
UIMAD.WIDE.U32 UR12, UR17, 0x18, UR6 ?trans1;
UIMAD.WIDE.U32 UR14, UR17, 0x10, UR6 ?trans1;
UIADD3.64 UR8, UPT, UPT, UR4, UR20, URZ &req={0} ?trans1;
UIADD3.64 UR10, UPT, UPT, UR10, UR20, URZ ?trans1;
UIADD3.64 UR12, UPT, UPT, UR12, UR20, URZ ?trans1;
UIADD3.64 UR14, UPT, UPT, UR14, UR20, URZ ?trans1;
UMOV UR4, URZ ?WAIT11_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 4.76837158203125e-07 ?trans1;
UIMAD.WIDE.U32 UR22, UR17, 0x8, UR20 ?trans1;
MOV R6, 0x8 ?WAIT3_END_GROUP;
IMAD.WIDE R8, R31, R8, UR20 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R31, R6, UR22 ?trans1;
LDG.E.64 R10, desc[UR18][R8.64] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR18][R6.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD.WIDE R2, R30, 0x8, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R4, desc[UR18][R2.64] &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR18][R2.64+0x8] &wr=0x3 ?trans1;
MOV R18, 0x8 ?trans1;
HFMA2 R16, -RZ, RZ, 0, 4.76837158203125e-07 ?trans1;
IADD.64 R26, R8, UR6 ?trans2;
IADD.64 R22, R6, UR6 ?trans2;
IMAD.WIDE R18, R31.reuse, R18, UR14 ?trans1;
MOV R6, 0x8 &req={1} ?trans1;
LDG.E.64 R24, desc[UR18][R2.64+0x10] &wr=0x4 ?trans4;
LDG.E.64 R26, desc[UR18][R26.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R31, R6, UR8 ?WAIT3_END_GROUP;
LDG.E.64 R20, desc[UR18][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E.64 R22, desc[UR18][R22.64] &wr=0x5 ?trans4;
LDG.E.64 R18, desc[UR18][R18.64] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR18][R2.64+0x30] &wr=0x3 ?trans4;
LDG.E.64 R6, desc[UR18][R6.64] &wr=0x3 ?trans1;
DFMA R4, R4, R10, R32 &req={2} &rd=0x0 &wr=0x3 ?trans2;
MOV R10, 0x8 &req={0} ?trans1;
LDG.E.64 R32, desc[UR18][R2.64+0x38] &wr=0x2 ?trans4;
IMAD.WIDE R10, R31, R10, UR10 ?WAIT6_END_GROUP;
LDG.E.64 R10, desc[UR18][R10.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R12, R14, R4 &req={3} &rd=0x0 &wr=0x4 ?trans2;
IMAD.WIDE R14, R31, R16, UR12 &req={0} ?trans1;
LDG.E.64 R12, desc[UR18][R2.64+0x28] &wr=0x3 ?trans4;
LDG.E.64 R16, desc[UR18][R2.64+0x20] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR18][R14.64] &wr=0x3 ?trans1;
UIADD3 UR16, UPT, UPT, UR16, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR16, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R30, PT, PT, R30, 0x8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R24, R26, R4 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R20, R22, R4 &req={5} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R16, R18, R4 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R12, R14, R4 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R10, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R8, UR17 &req={0} ?WAIT5_END_GROUP;
IMAD R31, R8, 0x8, R31 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R32, R6, R4 &req={1} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x430 &req={1,0} ?trans5;
@!P1 BRA 0xe70 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR24, 0x4, UPT ?trans1;
ULOP3.LUT UR5, UR17, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT12_END_GROUP;
@!P1 BRA 0xbd0 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R2, UR4 ?trans1;
IADD3 R3, PT, PT, R28, UR4, RZ ?trans1;
UIADD3 UR6, UPT, UPT, UR17, UR17, URZ ?trans2;
MOV R15, UR17 ?trans1;
IMAD R5, R2, UR17, R29 ?trans1;
MOV R2, UR17 ?trans1;
LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R4, UR6 ?trans1;
MOV R17, UR6 ?trans1;
IMAD.WIDE R6, R3, 0x8, R6 &req={0} ?trans1;
MOV R3, RZ ?WAIT4_END_GROUP;
LDG.E.64 R8, desc[UR18][R6.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R5, 0x8, R10 &req={1} ?WAIT4_END_GROUP;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
LDG.E.64 R12, desc[UR18][R10.64] &wr=0x2 ?trans4;
IADD.64 R18, R2, R4 ?trans2;
IMAD.WIDE.U32 R14, R15, 0x8, R10.reuse ?trans1;
LDG.E.64 R4, desc[UR18][R6.64+0x8] &wr=0x3 ?trans2;
LEA R20, P1, R18.reuse, R10, 0x3 ?trans1;
IMAD.WIDE.U32 R16, R17, 0x8, R10 ?trans1;
LDG.E.64 R2, desc[UR18][R6.64+0x10] &wr=0x4 ?trans2;
LEA.HI.X R21, R18, R11, R19, 0x3, P1 ?WAIT2_END_GROUP;
LDG.E.64 R14, desc[UR18][R14.64] &wr=0x3 ?trans4;
LDG.E.64 R16, desc[UR18][R16.64] &wr=0x4 ?trans4;
LDG.E.64 R18, desc[UR18][R6.64+0x18] &wr=0x5 ?trans4;
LDG.E.64 R20, desc[UR18][R20.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
DFMA R8, R8, R12, R32 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R14, R8 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R16, R4 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R18, R20, R2 &req={5} &rd=0x0 &wr=0x1 ?trans2;
@!P0 BRA 0xe70 ?trans5;
UISETP.NE.AND UP0, UPT, UR5, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR17, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R2, UR4 &req={0} ?trans1;
MOV R15, UR17 ?trans2;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP1, 0x80, 0x8 ?WAIT4_END_GROUP;
@!UP1 LDCU.128 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@P0 IADD3 R13, PT, PT, R28, UR4, RZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P0 IMAD R3, R2, UR17, R29 ?WAIT5_END_GROUP;
MOV R8, UR4 ?trans1;
@!P1 IADD3 R9, PT, PT, R28, UR4, RZ ?trans1;
MOV.64 R10, UR10 &req={0} ?trans2;
MOV.64 R6, UR8 ?trans2;
@!P1 IMAD R29, R8, UR17, R29 ?trans2;
@P0 IMAD.WIDE R10, R3, 0x8, R10 ?trans1;
MOV.64 R2, UR12 &req={2} ?trans2;
MOV.64 R4, UR14 ?WAIT2_END_GROUP;
@P0 IMAD.WIDE R6, R13, 0x8, R6 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE.U32 R14, R15, 0x8, R10 ?trans1;
@P0 LDG.E.64 R12, desc[UR18][R6.64+0x8] &wr=0x2 ?trans3;
@!P1 IMAD.WIDE R2, R9, 0x8, R2 ?trans1;
@P0 LDG.E.64 R10, desc[UR18][R10.64] &wr=0x3 ?trans3;
@!P1 IMAD.WIDE R4, R29, 0x8, R4 ?trans1;
@P0 LDG.E.64 R8, desc[UR18][R6.64] &wr=0x3 ?trans4;
@P0 LDG.E.64 R14, desc[UR18][R14.64] &wr=0x2 ?trans4;
@!P1 LDG.E.64 R2, desc[UR18][R2.64] &wr=0x4 ?trans4;
@!P1 LDG.E.64 R4, desc[UR18][R4.64] &wr=0x4 ?trans1;
@P0 DFMA R8, R8, R10, R32 &req={3,1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P0 DFMA R32, R12, R14, R8 &req={2} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DFMA R32, R2, R4, R32 &req={4} &rd=0x2 &wr=0x3 ?trans2;
LDC.64 R2, c[0x0][0x390] &req={2,0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x8, R2 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR18][R2.64], R32 &req={3,1} ?trans1;
EXIT ?trans5;
BRA 0xeb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mm_mult(double*, double*, double*, int, int, int)
_Z7mm_multPdS_S_iii:
s_clause 0x3
s_load_b32 s8, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_cmp_lt_i32 s2, 1
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
s_cbranch_scc1 .LBB2_3
s_ashr_i32 s8, s3, 31
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v4, v1, v2
s_add_i32 s9, s3, s8
s_xor_b32 s9, s9, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v2
v_cvt_f32_u32_e32 v0, s9
s_sub_i32 s10, 0, s9
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v3, s10, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v3, v0, v3
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v3, v0, s9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v4, v3
v_add_nc_u32_e32 v4, 1, v0
v_subrev_nc_u32_e32 v5, s9, v3
v_cmp_le_u32_e32 vcc_lo, s9, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v3, v3, v5
v_xor_b32_e32 v5, s8, v2
v_add_nc_u32_e32 v4, 1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s9, v3
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v5
v_sub_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, v0, s2
v_mul_lo_u32 v0, v0, s3
s_mov_b32 s3, s2
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, v1, v0
v_lshlrev_b64 v[7:8], 3, v[3:4]
v_mov_b32_e32 v3, 0
v_mov_b32_e32 v4, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
.LBB2_2:
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s3, 0
v_lshlrev_b64 v[9:10], 3, v[5:6]
v_add_nc_u32_e32 v5, s2, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b64 v[11:12], v[7:8], off
global_load_b64 v[9:10], v[9:10], off
v_add_co_u32 v7, vcc_lo, v7, 8
v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
s_waitcnt vmcnt(0)
v_fma_f64 v[3:4], v[11:12], v[9:10], v[3:4]
s_cbranch_scc1 .LBB2_2
s_branch .LBB2_4
.LBB2_3:
v_mov_b32_e32 v3, 0
v_mov_b32_e32 v4, 0
.LBB2_4:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mm_mult | 5,511 | 1,846 | stackv2-00001-of-00015 |
// Demangled: reversing(double*, double*, int)
Function : _Z9reversingPdS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R0, UR6, R7 &req={0} ?trans1;
LDCU UR6, c[0x0][0x390] &wr=0x0 ?trans3;
IMAD.WIDE R2, R7, 0x8, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
LOP3.LUT R7, RZ, R7, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R7, UR6, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reversing(double*, double*, int)
_Z9reversingPdS_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
v_xad_u32 v0, v1, -1, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 3, v[0:1]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
global_load_b64 v[2:3], v[2:3], off
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| reversing | 489 | 534 | stackv2-00001-of-00015 |
// Demangled: transpose(double*, double*, int)
Function : _Z9transposePdS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans8;
LDC R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R7, R0, UR6, R7 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x8, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IABS R10, R7 ?trans2;
IABS R9, R6 &req={3} ?WAIT4_END_GROUP;
I2F.RP R0, R9 &wr=0x0 ?trans2;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R11, R8, R9, RZ ?trans1;
MOV R8, R10 ?WAIT3_END_GROUP;
IMAD.HI.U32 R5, R5, R11, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R8, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R9, R0, R8 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R9, RZ ?trans2;
@!P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R0, R9, PT ?trans1;
LOP3.LUT R0, R7, R6, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT4_END_GROUP;
MOV R0, R5 ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans3;
@!P0 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R0, RZ, R6, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, -R0, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R6, R8, R7 ?WAIT4_END_GROUP;
IMAD R7, R7, R6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x8, R4 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x2a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: transpose(double*, double*, int)
_Z9transposePdS_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_ashr_i32 s1, s0, 31
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_add_i32 s2, s0, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s2, s2, s1
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s3, 0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
v_rcp_iflag_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_xor_b32_e32 v2, s1, v2
global_load_b64 v[3:4], v[3:4], off
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, s3, v0
v_mul_hi_u32 v5, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v5
v_mul_hi_u32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v0, s2
v_sub_nc_u32_e32 v5, v6, v5
v_add_nc_u32_e32 v6, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v7, s2, v5
v_cmp_le_u32_e32 vcc_lo, s2, v5
v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v0, v0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s2, v5
v_add_nc_u32_e32 v6, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v0, v2
v_mul_lo_u32 v2, v0, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v5, v1, v2
v_mad_u64_u32 v[1:2], null, v5, s0, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| transpose | 1,097 | 1,386 | stackv2-00001-of-00015 |
// Demangled: operations_reg(int*, int*, int*, int)
Function : _Z14operations_regPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC R8, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x4 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R8, 0x3, PT &req={2} ?trans1;
IMAD R7, R0, UR6, R7 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?trans2;
LDG.E R5, desc[UR4][R4.64] &req={3} &rd=0x0 &wr=0x5 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R7 ?WAIT3_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &rd=0x0 &wr=0x5 ?trans1;
@!P0 BRA 0x300 ?trans5;
ISETP.NE.AND P0, PT, R8, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x2e0 ?trans5;
ISETP.NE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R9, PT, PT, R0, R5, RZ &req={5} ?trans1;
@!P0 BRA 0x310 ?trans6;
IABS R8, R5.reuse ?trans2;
IABS R10, R5 ?trans2;
I2F.RP R4, R8 &req={0} &wr=0x0 ?trans2;
IADD3 R10, PT, PT, RZ, -R10, RZ ?trans1;
MUFU.RCP R4, R4 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={0} ?trans2;
IABS R4, R0 ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R9, PT, PT, RZ, -R3, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R9, R9, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?trans1;
MOV R9, R10 ?WAIT5_END_GROUP;
IMAD.HI.U32 R3, R3, R4, RZ ?WAIT4_END_GROUP;
IMAD R3, R3, R9, R4 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -R8, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R8, RZ ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R3, RZ, R5, RZ, 0x33, !PT ?WAIT5_END_GROUP;
MOV R9, R3 ?trans1;
BRA 0x310 ?trans6;
IADD3 R9, PT, PT, R0, -R5, RZ &req={5} ?trans1;
BRA 0x310 ?trans6;
IMAD R9, R0, R5, RZ &req={5} ?WAIT7_END_GROUP;
LDCU.64 UR6, c[0x0][0x390] &wr=0x1 ?trans2;
LEA R2, P0, R7, UR6, 0x2 &req={1,0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R7, UR7, R6, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x360;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: operations_reg(int*, int*, int*, int)
_Z14operations_regPiS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_cmp_lt_i32 s3, 2
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
s_cbranch_scc1 .LBB0_4
s_cmp_gt_i32 s3, 2
s_cbranch_scc0 .LBB0_5
s_cmp_eq_u32 s3, 3
s_cbranch_scc0 .LBB0_6
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, v3, v2
s_mov_b32 s4, 0
s_branch .LBB0_7
.LBB0_4:
s_mov_b32 s5, -1
s_mov_b32 s4, 0
s_branch .LBB0_11
.LBB0_5:
s_mov_b32 s5, -1
s_mov_b32 s4, 0
s_branch .LBB0_8
.LBB0_6:
s_mov_b32 s4, -1
.LBB0_7:
s_mov_b32 s5, 0
.LBB0_8:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s5
s_cbranch_vccz .LBB0_10
s_waitcnt vmcnt(0)
v_sub_nc_u32_e32 v4, v2, v3
.LBB0_10:
s_mov_b32 s5, 0
.LBB0_11:
s_load_b64 s[0:1], s[0:1], 0x10
s_and_b32 vcc_lo, exec_lo, s5
s_cbranch_vccz .LBB0_13
s_cmp_lg_u32 s3, 1
s_mov_b32 s2, -1
s_cselect_b32 s4, -1, 0
.LBB0_13:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_15
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v4, 31, v3
v_ashrrev_i32_e32 v7, 31, v2
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v3, v4
v_add_nc_u32_e32 v8, v2, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v4, v5, v4
v_xor_b32_e32 v8, v8, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cvt_f32_u32_e32 v5, v4
v_sub_nc_u32_e32 v6, 0, v4
v_rcp_iflag_f32_e32 v5, v5
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v5, 0x4f7ffffe, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v5, v5
v_mul_lo_u32 v6, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v6, v5, v6
v_add_nc_u32_e32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v5, v8, v5
v_mul_lo_u32 v5, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v5, v8, v5
v_sub_nc_u32_e32 v6, v5, v4
v_cmp_ge_u32_e32 vcc_lo, v5, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v5, v5, v6, vcc_lo
v_sub_nc_u32_e32 v6, v5, v4
v_cmp_ge_u32_e32 vcc_lo, v5, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v5, v6, vcc_lo
v_xor_b32_e32 v4, v4, v7
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v4, v7
.LBB0_15:
s_and_not1_b32 vcc_lo, exec_lo, s2
s_cbranch_vccnz .LBB0_17
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, v3, v2
.LBB0_17:
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| operations_reg | 1,368 | 1,822 | stackv2-00001-of-00015 |
// Demangled: operations_shared(int*, int*, int*, int)
Function : _Z17operations_sharedPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
S2UR UR6, SR_CgaCtaId &wr=0x4 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC R8, c[0x0][0x398] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={3} ?trans1;
LDG.E R10, desc[UR8][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R13, desc[UR8][R4.64] &wr=0x3 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x400, URZ ?trans1;
ULEA UR7, UR6, UR4, 0x18 &req={4} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x800, URZ ?trans2;
ULEA UR5, UR6, UR5, 0x18 ?WAIT2_END_GROUP;
ULEA UR4, UR6, UR4, 0x18 ?trans1;
LEA R11, R9.reuse, UR7, 0x2 ?trans1;
ISETP.NE.AND P0, PT, R8, 0x3, PT &req={5} ?trans2;
LEA R0, R9.reuse, UR5, 0x2 ?trans2;
LEA R12, R9.reuse, UR4, 0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={1} ?trans1;
STS [R11], R10 &req={2} &rd=0x1 ?trans4;
STS [R0], R13 &req={3} &rd=0x1 ?trans3;
@!P0 BRA 0x3c0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R8, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x390 ?trans5;
ISETP.NE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R9, PT, PT, R10, R13, RZ ?WAIT5_END_GROUP;
@!P0 STS [R12], R9 &rd=0x0 ?trans1;
@!P0 BRA 0x3e0 ?trans5;
IABS R16, R13.reuse ?trans2;
IABS R17, R13 ?trans2;
I2F.RP R14, R16 &wr=0x2 ?trans2;
IADD3 R17, PT, PT, RZ, -R17, RZ ?trans1;
MUFU.RCP R14, R14 &req={2} &wr=0x2 ?trans2;
IADD3 R8, PT, PT, R14, 0xffffffe, RZ &req={2} ?trans2;
IABS R14, R10 ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &req={0} &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R15, PT, PT, RZ, -R9, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R15, R15, R16, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R15, R8 ?trans1;
MOV R15, R17 ?WAIT5_END_GROUP;
IMAD.HI.U32 R9, R9, R14, RZ ?WAIT4_END_GROUP;
IMAD R9, R9, R15, R14 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, R9, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R9, PT, PT, R9, -R16, RZ ?trans1;
ISETP.GE.AND P0, PT, R10, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R16, R9, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, -R16, RZ ?trans1;
ISETP.NE.AND P1, PT, R13, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R9, RZ, R13, RZ, 0x33, !PT ?WAIT5_END_GROUP;
STS [R12], R9 &rd=0x2 ?trans1;
BRA 0x3e0 ?trans5;
IADD3 R13, PT, PT, R10, -R13, RZ &req={1} ?WAIT5_END_GROUP;
STS [R12], R13 &rd=0x3 ?trans1;
BRA 0x3e0 ?trans5;
IMAD R13, R10, R13, RZ &req={1} ?WAIT5_END_GROUP;
STS [R12], R13 &rd=0x4 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R11, [R11] &req={1} &wr=0x1 ?trans4;
LDS R9, [R0] &req={2,0} &wr=0x0 ?trans4;
LDS R13, [R12] &req={4,3} &wr=0x2 ?trans4;
STG.E desc[UR8][R2.64], R11 &req={1} ?trans4;
STG.E desc[UR8][R4.64], R9 &req={0} ?trans4;
STG.E desc[UR8][R6.64], R13 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x460;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: operations_shared(int*, int*, int*, int)
_Z17operations_sharedPiS_S_i:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_lshlrev_b32_e32 v5, 2, v0
s_load_b32 s0, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v7, v5, s[4:5]
global_load_b32 v8, v5, s[6:7]
v_add_co_u32 v1, s4, s4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v2, null, s5, 0, s4
v_add_co_u32 v3, s4, s6, v5
v_add_co_ci_u32_e64 v4, null, s7, 0, s4
v_add_nc_u32_e32 v6, 0x400, v5
s_mov_b32 s4, 0
s_cmp_lt_i32 s0, 2
s_waitcnt vmcnt(0)
ds_store_2addr_stride64_b32 v5, v7, v8 offset1:4
s_cbranch_scc1 .LBB1_4
s_cmp_gt_i32 s0, 2
s_cbranch_scc0 .LBB1_5
s_cmp_eq_u32 s0, 3
s_cbranch_scc0 .LBB1_6
v_mul_lo_u32 v9, v8, v7
s_branch .LBB1_7
.LBB1_4:
s_mov_b32 s1, -1
s_branch .LBB1_11
.LBB1_5:
s_mov_b32 s1, -1
s_branch .LBB1_8
.LBB1_6:
s_mov_b32 s4, -1
.LBB1_7:
s_mov_b32 s1, 0
.LBB1_8:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s1
s_cbranch_vccz .LBB1_10
v_sub_nc_u32_e32 v9, v7, v8
.LBB1_10:
s_mov_b32 s1, 0
.LBB1_11:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s1
s_mov_b32 s1, 0
s_cbranch_vccz .LBB1_13
s_cmp_lg_u32 s0, 1
s_mov_b32 s1, -1
s_cselect_b32 s4, -1, 0
.LBB1_13:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB1_15
v_ashrrev_i32_e32 v9, 31, v8
v_ashrrev_i32_e32 v12, 31, v7
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v10, v8, v9
v_add_nc_u32_e32 v13, v7, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v9, v10, v9
v_xor_b32_e32 v13, v13, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cvt_f32_u32_e32 v10, v9
v_sub_nc_u32_e32 v11, 0, v9
v_rcp_iflag_f32_e32 v10, v10
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v10, 0x4f7ffffe, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v10, v10
v_mul_lo_u32 v11, v11, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v11, v10, v11
v_add_nc_u32_e32 v10, v10, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v10, v13, v10
v_mul_lo_u32 v10, v10, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v10, v13, v10
v_sub_nc_u32_e32 v11, v10, v9
v_cmp_ge_u32_e32 vcc_lo, v10, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v10, v10, v11, vcc_lo
v_sub_nc_u32_e32 v11, v10, v9
v_cmp_ge_u32_e32 vcc_lo, v10, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v9, v10, v11, vcc_lo
v_xor_b32_e32 v9, v9, v12
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v9, v9, v12
.LBB1_15:
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB1_17
v_add_nc_u32_e32 v9, v8, v7
.LBB1_17:
v_lshlrev_b32_e32 v0, 2, v0
ds_store_b32 v0, v9 offset:2048
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v5, v5
ds_load_b32 v6, v6
ds_load_b32 v7, v0 offset:2048
s_waitcnt lgkmcnt(2)
global_store_b32 v[1:2], v5, off
s_waitcnt lgkmcnt(1)
global_store_b32 v[3:4], v6, off
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v7, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| operations_shared | 1,763 | 1,864 | stackv2-00001-of-00015 |
// Demangled: calculate_forces(void*, void*)
Function : _Z16calculate_forcesPvS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R8, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R2, R3, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R2, 0x10, R8 &req={3} ?WAIT6_END_GROUP;
LDG.E.128 R8, desc[UR8][R8.64] &req={2} &wr=0x5 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
LOP3.LUT R4, R3.reuse, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?trans1;
MOV R14, RZ ?trans1;
CS2R R12, SRZ ?trans1;
LOP3.LUT R7, R3, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R4, PT, PT, -R4, RZ, RZ ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R2 ?trans1;
ULEA UR5, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R24, R0, UR5, 0x4 &req={0} ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
IMAD R11, R3, R6, R0 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R11, 0x10, R16 &req={0} ?WAIT6_END_GROUP;
LDG.E.128 R16, desc[UR8][R16.64] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P0, PT, R3, 0x4, PT ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
UMOV UR4, URZ ?WAIT4_END_GROUP;
ISETP.NE.AND P3, PT, R6, 0x14, PT ?trans1;
STS.128 [R24], R16 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0xcc0 ?trans5;
MOV R25, R4 ?trans1;
UIADD3 UR6, UPT, UPT, UR5, 0x20, URZ ?trans1;
UMOV UR4, URZ ?WAIT11_END_GROUP;
LDS.128 R16, [UR6+-0x20] &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x3a0 ?trans1;
FADD R26, -R9, R17 &req={0} ?trans1;
FADD R15, -R8, R16 ?trans1;
FADD R31, -R10, R18 ?trans2;
FMUL R16, R26, R26 ?WAIT4_END_GROUP;
FFMA R16, R15, R15, R16 ?WAIT4_END_GROUP;
FFMA R16, R31, R31, R16 ?WAIT4_END_GROUP;
FMUL R11, R16, R16 ?WAIT4_END_GROUP;
FMUL R16, R16, R11 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R16 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R16, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x350 &req={1,0} ?trans5;
MOV R11, R16 ?trans1;
MOV R16, 0x330 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0x390 ?trans6;
FMUL.FTZ R11, R16, R17 ?trans1;
FMUL.FTZ R17, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R16, -R11, R11, R16 ?WAIT4_END_GROUP;
FFMA R11, R16, R17, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R16, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x480 ?trans3;
LOP3.LUT R16, R16, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x430 ?trans5;
MOV R16, 0x410 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
MOV R16, R22 ?trans1;
BRA 0x470 ?trans6;
MUFU.RCP R16, R11 &wr=0x0 ?trans2;
FFMA R17, R16, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R17, -R17, -RZ ?WAIT4_END_GROUP;
FFMA R16, R16, R17, R16 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDS.128 R20, [UR6+-0x10] &wr=0x0 ?trans1;
FMUL R16, R19, R16 ?trans1;
BSSY.RECONVERGENT B0, 0x640 ?trans3;
FFMA R19, R15, R16.reuse, R12 ?trans1;
FFMA R26, R26, R16.reuse, R13 ?trans1;
FFMA R31, R31, R16, R14 ?trans1;
FADD R21, -R9, R21 &req={0} ?trans1;
FADD R20, -R8, R20 ?trans1;
FADD R28, -R10, R22 ?WAIT2_END_GROUP;
FMUL R11, R21, R21 ?WAIT4_END_GROUP;
FFMA R11, R20, R20, R11 ?WAIT4_END_GROUP;
FFMA R11, R28, R28, R11 ?WAIT4_END_GROUP;
FMUL R18, R11, R11 ?WAIT4_END_GROUP;
FMUL R18, R11, R18 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R18 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R18, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x5f0 &req={1,0} ?trans5;
MOV R11, R18 ?trans1;
MOV R16, 0x5d0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0x630 ?trans6;
FMUL.FTZ R11, R18, R17 ?trans1;
FMUL.FTZ R13, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R12, -R11, R11, R18 ?WAIT4_END_GROUP;
FFMA R11, R12, R13, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R12, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x710 ?trans3;
LOP3.LUT R12, R12, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x6c0 ?trans5;
MOV R16, 0x6b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
BRA 0x700 ?trans5;
MUFU.RCP R22, R11 &wr=0x0 ?trans2;
FFMA R12, R22, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R13, -R12, -RZ ?WAIT4_END_GROUP;
FFMA R22, R22, R13, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDS.128 R12, [UR6] &wr=0x0 ?trans1;
FMUL R22, R23, R22 ?trans1;
BSSY.RECONVERGENT B0, 0x8d0 ?trans3;
FFMA R23, R20, R22.reuse, R19 ?trans1;
FFMA R26, R21, R22.reuse, R26 ?trans1;
FFMA R31, R28, R22, R31 ?trans1;
FADD R13, -R9, R13 &req={0} ?trans1;
FADD R12, -R8, R12 ?trans1;
FADD R14, -R10, R14 ?WAIT2_END_GROUP;
FMUL R11, R13, R13 ?WAIT4_END_GROUP;
FFMA R11, R12, R12, R11 ?WAIT4_END_GROUP;
FFMA R11, R14, R14, R11 ?WAIT4_END_GROUP;
FMUL R16, R11, R11 ?WAIT4_END_GROUP;
FMUL R16, R11, R16 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R16 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R16, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x880 &req={1,0} ?trans5;
MOV R11, R16 ?trans1;
MOV R16, 0x860 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0x8c0 ?trans6;
FMUL.FTZ R11, R16, R17 ?trans1;
FMUL.FTZ R17, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R16, -R11, R11, R16 ?WAIT4_END_GROUP;
FFMA R11, R16, R17, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R16, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x9a0 ?trans3;
LOP3.LUT R16, R16, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x950 ?trans5;
MOV R16, 0x940 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
BRA 0x990 ?trans5;
MUFU.RCP R22, R11 &wr=0x0 ?trans2;
FFMA R16, R22, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R17, -R16, -RZ ?WAIT4_END_GROUP;
FFMA R22, R22, R17, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDS.128 R16, [UR6+0x10] &wr=0x0 ?trans1;
FMUL R15, R15, R22 ?trans1;
BSSY.RECONVERGENT B0, 0xb60 ?trans3;
FFMA R23, R12, R15.reuse, R23 ?trans1;
FFMA R13, R13, R15.reuse, R26 ?trans1;
FFMA R14, R14, R15, R31 ?trans1;
FADD R20, -R9, R17 &req={0} ?trans1;
FADD R28, -R8, R16 ?trans1;
FADD R21, -R10, R18 ?WAIT2_END_GROUP;
FMUL R11, R20, R20 ?WAIT4_END_GROUP;
FFMA R16, R28, R28, R11 ?WAIT4_END_GROUP;
FFMA R16, R21, R21, R16 ?WAIT4_END_GROUP;
FMUL R11, R16, R16 ?WAIT4_END_GROUP;
FMUL R16, R16, R11 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R16 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R16, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xb10 &req={1,0} ?trans5;
MOV R11, R16 ?trans1;
MOV R16, 0xaf0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0xb50 ?trans6;
FMUL.FTZ R11, R16, R17 ?trans1;
FMUL.FTZ R15, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R12, -R11, R11, R16 ?WAIT4_END_GROUP;
FFMA R11, R12, R15, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R12, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xc30 ?trans3;
LOP3.LUT R12, R12, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0xbe0 ?trans5;
MOV R16, 0xbd0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
BRA 0xc20 ?trans5;
MUFU.RCP R22, R11 &wr=0x0 ?trans2;
FFMA R12, R22, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R15, -R12, -RZ ?WAIT4_END_GROUP;
FFMA R22, R22, R15, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R25, PT, PT, R25, 0x4, RZ ?trans1;
FMUL R19, R19, R22 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
UIADD3 UR6, UPT, UPT, UR6, 0x40, URZ ?trans2;
ISETP.NE.AND P0, PT, R25, RZ, PT ?trans1;
FFMA R12, R28, R19.reuse, R23 ?trans1;
FFMA R13, R20, R19.reuse, R13 ?trans1;
FFMA R14, R21, R19, R14 ?WAIT10_END_GROUP;
@P0 BRA 0x220 ?trans5;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1510 ?trans5;
ISETP.NE.AND P0, PT, R7, 0x1, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1250 ?trans5;
ULEA UR6, UR4, UR5, 0x4 ?trans1;
BSSY.RECONVERGENT B0, 0xe90 ?trans8;
LDS.128 R16, [UR6] &req={0} &wr=0x0 ?trans2;
FADD R26, -R9, R17 &req={0} ?trans1;
FADD R15, -R8, R16 ?trans1;
FADD R25, -R10, R18 ?WAIT2_END_GROUP;
FMUL R16, R26, R26 ?WAIT4_END_GROUP;
FFMA R16, R15, R15, R16 ?WAIT4_END_GROUP;
FFMA R16, R25, R25, R16 ?WAIT4_END_GROUP;
FMUL R11, R16, R16 ?WAIT4_END_GROUP;
FMUL R16, R16, R11 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R16 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R16, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe40 &req={1,0} ?trans5;
MOV R11, R16 ?trans1;
MOV R16, 0xe20 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0xe80 ?trans6;
FMUL.FTZ R11, R16, R17 ?trans1;
FMUL.FTZ R17, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R16, -R11, R11, R16 ?WAIT4_END_GROUP;
FFMA R11, R16, R17, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R16, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xf70 ?trans3;
LOP3.LUT R16, R16, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0xf20 ?trans5;
MOV R16, 0xf00 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
MOV R16, R22 ?trans1;
BRA 0xf60 ?trans6;
MUFU.RCP R16, R11 &wr=0x0 ?trans2;
FFMA R17, R16, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R17, -R17, -RZ ?WAIT4_END_GROUP;
FFMA R16, R16, R17, R16 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDS.128 R20, [UR6+0x10] &wr=0x0 ?trans1;
FMUL R16, R19, R16 ?trans1;
BSSY.RECONVERGENT B0, 0x1130 ?trans3;
FFMA R15, R15, R16.reuse, R12 ?trans1;
FFMA R26, R26, R16.reuse, R13 ?trans1;
FFMA R25, R25, R16, R14 ?trans1;
FADD R21, -R9, R21 &req={0} ?trans1;
FADD R20, -R8, R20 ?trans1;
FADD R28, -R10, R22 ?WAIT2_END_GROUP;
FMUL R11, R21, R21 ?WAIT4_END_GROUP;
FFMA R11, R20, R20, R11 ?WAIT4_END_GROUP;
FFMA R11, R28, R28, R11 ?WAIT4_END_GROUP;
FMUL R18, R11, R11 ?WAIT4_END_GROUP;
FMUL R18, R11, R18 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R18 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R18, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x10e0 &req={1,0} ?trans5;
MOV R11, R18 ?trans1;
MOV R16, 0x10c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0x1120 ?trans6;
FMUL.FTZ R11, R18, R17 ?trans1;
FMUL.FTZ R13, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R12, -R11, R11, R18 ?WAIT4_END_GROUP;
FFMA R11, R12, R13, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R12, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x1200 ?trans3;
LOP3.LUT R12, R12, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x11b0 ?trans5;
MOV R16, 0x11a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
BRA 0x11f0 ?trans5;
MUFU.RCP R22, R11 &wr=0x0 ?trans2;
FFMA R12, R22, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R13, -R12, -RZ ?WAIT4_END_GROUP;
FFMA R22, R22, R13, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FMUL R22, R23, R22 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?WAIT3_END_GROUP;
FFMA R12, R20, R22.reuse, R15 ?trans1;
FFMA R13, R21, R22.reuse, R26 ?trans1;
FFMA R14, R28, R22, R25 ?WAIT7_END_GROUP;
LOP3.LUT P0, RZ, R3, 0x1, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1510 ?trans5;
ULEA UR4, UR4, UR5, 0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x1400 ?trans8;
LDS.128 R16, [UR4] &req={0} &wr=0x0 ?trans2;
FADD R20, -R9, R17 &req={0} ?trans1;
FADD R15, -R8, R16 ?trans1;
FADD R21, -R10, R18 ?WAIT2_END_GROUP;
FMUL R16, R20, R20 ?WAIT4_END_GROUP;
FFMA R16, R15, R15, R16 ?WAIT4_END_GROUP;
FFMA R16, R21, R21, R16 ?WAIT4_END_GROUP;
FMUL R11, R16, R16 ?WAIT4_END_GROUP;
FMUL R16, R16, R11 ?WAIT4_END_GROUP;
MUFU.RSQ R17, R16 &rd=0x0 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, R16, -0xd000000, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x13b0 &req={1,0} ?trans5;
MOV R11, R16 ?trans1;
MOV R16, 0x1390 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x18d0 ?trans5;
MOV R11, R18 ?trans1;
BRA 0x13f0 ?trans6;
FMUL.FTZ R11, R16, R17 ?trans1;
FMUL.FTZ R17, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R16, -R11, R11, R16 ?WAIT4_END_GROUP;
FFMA R11, R16, R17, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R16, PT, PT, R11, 0x1800000, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x14d0 ?trans3;
LOP3.LUT R16, R16, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R16, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1480 ?trans5;
MOV R16, 0x1470 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1590 ?trans5;
BRA 0x14c0 ?trans5;
MUFU.RCP R22, R11 &wr=0x0 ?trans2;
FFMA R16, R22, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R17, -R16, -RZ ?WAIT4_END_GROUP;
FFMA R22, R22, R17, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FMUL R19, R19, R22 ?WAIT4_END_GROUP;
FFMA R12, R15, R19.reuse, R12 ?trans1;
FFMA R13, R20, R19.reuse, R13 ?trans1;
FFMA R14, R21, R19, R14 ?WAIT7_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P3 BRA 0x140 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x1 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
LEA R4, P0, R2, UR6, 0x4 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR7, R5, 0x4, P0 ?WAIT5_END_GROUP;
STG.E.128 desc[UR8][R4.64], R12 ?trans1;
EXIT ?trans5;
SHF.L.U32 R18, R11, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x18b0 ?trans3;
SHF.R.U32.HI R18, RZ, 0x18, R18 ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R18, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1680 ?trans5;
SHF.L.U32 R17, R11, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R17, RZ, PT ?WAIT13_END_GROUP;
@P0 FFMA R18, R11, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MUFU.RCP R22, R11 ?trans3;
@P0 MUFU.RCP R17, R18 &wr=0x0 ?trans2;
@P0 FFMA R30, R18, R17, -1 &req={0} ?WAIT4_END_GROUP;
@P0 FADD.FTZ R30, -R30, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R30, R17, R30, R17 ?WAIT4_END_GROUP;
@P0 FFMA R22, R30, 1.84467440737095516160e+19, RZ ?trans1;
BRA 0x18a0 ?trans6;
IADD3 R22, PT, PT, R18, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1890 ?trans5;
LOP3.LUT R29, R11, 0x7fffff, RZ, 0xc0, !PT ?trans1;
MOV R27, 0x3 ?trans1;
IADD3 R18, PT, PT, R18, -0xfc, RZ ?trans2;
LOP3.LUT R29, R29, 0x3f800000, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
MUFU.RCP R32, R29 &wr=0x0 ?trans2;
FFMA R17, R29, R32, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R17, -R17, -RZ ?WAIT4_END_GROUP;
FFMA.RM R30, R32.reuse, R17.reuse, R32.reuse ?trans1;
FFMA.RP R17, R32, R17, R32 ?WAIT5_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R30.reuse, R17, PT ?trans1;
LOP3.LUT R17, R30, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.L.U32 R30, R27, R22, RZ ?trans2;
LOP3.LUT R17, R17, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R27, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R29, R30, R17, RZ, 0xc0, !PT ?trans2;
SHF.R.U32.HI R18, RZ, R18, R17 ?trans2;
IADD3 R27, PT, PT, -R27, RZ, RZ ?trans2;
SHF.R.U32.HI R29, RZ, R22.reuse, R29 ?trans2;
LOP3.LUT P1, RZ, R27, R22, R17, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R29, 0x1, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
LOP3.LUT P2, RZ, R29, 0x2, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R11, 0x7fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R22, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R22, PT, PT, -R22, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R22, RZ, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT4_END_GROUP;
@!P1 SHF.L.U32 R18, R18, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R22, R18, 0x80000000, R11, 0xf8, !PT ?trans1;
BRA 0x18a0 ?trans6;
MUFU.RCP R22, R11 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R16 0x0 &req={1,0} ?trans5;
LOP3.LUT P0, RZ, R11, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R18, R11 ?trans1;
@!P0 BRA 0x1a00 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R11, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R18, 0x7fffffff ?trans1;
@!P0 BRA 0x1a00 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R11|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R18, R11, 1 ?trans1;
@P0 BRA 0x1a00 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R11|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R27, R11, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R30, R27 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R22, R27, R30 &req={0} ?trans1;
@P0 FMUL.FTZ R17, R30, 0.5 ?WAIT3_END_GROUP;
@P0 FADD.FTZ R18, -R22, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R29, R22, R18, R27 ?trans1;
@!P0 MOV R18, R11 ?WAIT3_END_GROUP;
@P0 FFMA R17, R29, R17, R22 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R18, R17, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R16 0x0 ?trans5;
BRA 0x1a20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculate_forces(void*, void*)
_Z16calculate_forcesPvS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
v_mov_b32_e32 v3, 0
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_cmp_lg_u32 s2, 0
s_cselect_b32 s0, -1, 0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 4, v[1:2]
v_add_co_u32 v1, vcc_lo, s4, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v9, vcc_lo
global_load_b128 v[4:7], v[1:2], off
v_cndmask_b32_e64 v2, 0, 1, s0
s_waitcnt vmcnt(0)
v_lshl_add_u32 v7, v0, 4, 0
v_mov_b32_e32 v1, 0
s_delay_alu instid0(VALU_DEP_3)
v_cmp_ne_u32_e64 s0, 1, v2
v_mov_b32_e32 v2, 0
.LBB0_1:
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[10:11], null, s3, s2, v[0:1]
v_ashrrev_i32_e32 v11, 31, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 4, v[10:11]
v_add_co_u32 v10, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
s_and_b32 vcc_lo, exec_lo, s0
global_load_b128 v[10:13], v[10:11], off
s_waitcnt vmcnt(0)
ds_store_b128 v7, v[10:13]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_4
s_mov_b32 s8, 0
s_mov_b32 s9, s2
.LBB0_3:
v_mov_b32_e32 v10, s8
s_add_i32 s9, s9, -1
s_add_i32 s8, s8, 16
s_cmp_lg_u32 s9, 0
ds_load_b128 v[10:13], v10
s_waitcnt lgkmcnt(0)
v_dual_sub_f32 v11, v11, v5 :: v_dual_sub_f32 v10, v10, v4
v_sub_f32_e32 v12, v12, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v14, v11, v11
v_fmac_f32_e32 v14, v10, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v14, v12, v12
v_mul_f32_e32 v15, v14, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v14, v14, v15
v_mul_f32_e32 v15, 0x4f800000, v14
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v14, v14, v15, vcc_lo
v_sqrt_f32_e32 v15, v14
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v16, -1, v15
v_add_nc_u32_e32 v17, 1, v15
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v18, -v16, v15, v14
v_fma_f32 v19, -v17, v15, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s1, 0, v18
v_cndmask_b32_e64 v15, v15, v16, s1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s1, 0, v19
v_cndmask_b32_e64 v15, v15, v17, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v16, 0x37800000, v15
v_cndmask_b32_e32 v15, v15, v16, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v14, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v14, v15, v14, vcc_lo
v_div_scale_f32 v15, null, v14, v14, 1.0
v_div_scale_f32 v18, vcc_lo, 1.0, v14, 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v16, v15
s_waitcnt_depctr 0xfff
v_fma_f32 v17, -v15, v16, 1.0
v_fmac_f32_e32 v16, v17, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v17, v18, v16
v_fma_f32 v19, -v15, v17, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v17, v19, v16
v_fma_f32 v15, -v15, v17, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v15, v15, v16, v17
v_div_fixup_f32 v14, v15, v14, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v13, v13, v14
v_fmac_f32_e32 v1, v10, v13
v_fmac_f32_e32 v2, v11, v13
v_fmac_f32_e32 v3, v12, v13
s_cbranch_scc1 .LBB0_3
.LBB0_4:
s_add_i32 s3, s3, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s3, 20
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_1
v_add_co_u32 v5, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v9, vcc_lo
v_mov_b32_e32 v4, 0
global_store_b128 v[5:6], v[1:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calculate_forces | 9,507 | 2,427 | stackv2-00001-of-00015 |
// Demangled: copyHeaters(float*, float*, int, int, int)
Function : _Z11copyHeatersPfS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R2, SR_TID.X &wr=0x3 ?trans6;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R5, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, UR6, PT &req={2} ?trans1;
IMAD R5, R5, UR5, R2 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R5, UR7, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R0, UR7, R5 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
FSETP.NEU.AND P0, PT, R7, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R5 ?trans2;
LEA R2, P0, R5, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R5, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: copyHeaters(float*, float*, int, int, int)
_Z11copyHeatersPfS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_u32_e32 vcc_lo, s5, v0
v_cmp_gt_u32_e64 s2, s4, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_3
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s5, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_neq_f32_e32 vcc_lo, 0, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_3
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| copyHeaters | 707 | 752 | stackv2-00001-of-00015 |
// Demangled: updateGrid(float*, float*, float, int, int)
Function : _Z10updateGridPfS_fii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x394] &wr=0x2 ?trans1;
S2R R5, SR_TID.X &wr=0x3 ?trans6;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x3 ?trans8;
LDC R4, c[0x0][0x398] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, UR6, PT &req={2} ?trans1;
IMAD R3, R2, UR5, R5 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R3, R4, P0 &req={4} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R11, R0, R4, R3 ?trans2;
IMAD R5, R4, UR6, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R11, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R11.reuse, R4.reuse, RZ ?trans2;
IADD3 R7, PT, PT, R11.reuse, -R4, RZ ?trans1;
ISETP.GE.AND P3, PT, R11, 0x1, PT ?trans2;
ISETP.GE.AND P0, PT, R0, R5, PT ?trans2;
ISETP.GE.AND P1, PT, R7, RZ, PT ?trans1;
IADD3 R0, PT, PT, R11, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P2, PT, R0, R5, PT ?WAIT3_END_GROUP;
@P3 IADD3 R15, PT, PT, R11, -0x1, RZ ?trans2;
@!P0 IMAD.WIDE R4, R4, 0x4, R2 ?WAIT4_END_GROUP;
@P1 IMAD.WIDE.U32 R6, R7, 0x4, R8 ?WAIT4_END_GROUP;
@P3 IMAD.WIDE.U32 R8, R15, 0x4, R8 ?trans1;
MOV R0, R10.reuse &req={4} ?trans1;
MOV R13, R10.reuse ?trans1;
MOV R14, R10.reuse ?trans1;
MOV R12, R10 ?WAIT3_END_GROUP;
@!P0 LDG.E R0, desc[UR4][R4.64] &rd=0x2 &wr=0x4 ?trans4;
@P1 LDG.E R13, desc[UR4][R6.64] &wr=0x4 ?trans4;
@P3 LDG.E R14, desc[UR4][R8.64] &wr=0x5 ?trans4;
@!P2 LDG.E R12, desc[UR4][R2.64+0x4] &wr=0x3 ?trans1;
LEA R4, P0, R11, UR8, 0x2 &req={2} ?trans1;
FADD R13, R13, R0 &req={4} ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R11 ?WAIT3_END_GROUP;
FADD R13, R13, R14 &req={5} ?trans1;
LEA.HI.X R5, R11, UR9, R0, 0x2, P0 ?WAIT3_END_GROUP;
FADD R13, R13, R12 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R10, -4, R13 ?WAIT4_END_GROUP;
FFMA R13, R13, UR7, R10 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x330;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: updateGrid(float*, float*, float, int, int)
_Z10updateGridPfS_fii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_u32_e32 vcc_lo, s6, v0
v_cmp_gt_u32_e64 s2, s5, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_10
s_load_b128 s[0:3], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
s_mul_i32 s5, s6, s5
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v1, vcc_lo
global_load_b32 v7, v[3:4], off
s_waitcnt vmcnt(0)
v_dual_mov_b32 v8, v7 :: v_dual_add_nc_u32 v5, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s5, v5
s_cbranch_execz .LBB1_3
s_ashr_i32 s7, s6, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[6:7], 2
v_add_co_u32 v5, vcc_lo, v3, s10
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
global_load_b32 v8, v[5:6], off
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s8
v_subrev_nc_u32_e32 v5, s6, v2
v_mov_b32_e32 v6, v7
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_lt_i32_e32 -1, v5
s_cbranch_execz .LBB1_5
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s0, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
global_load_b32 v6, v[5:6], off
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s6
v_add_nc_u32_e32 v5, 1, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s5, v5
v_mov_b32_e32 v5, v7
s_and_saveexec_b32 s5, vcc_lo
s_cbranch_execz .LBB1_7
global_load_b32 v5, v[3:4], off offset:4
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s5
v_mov_b32_e32 v3, v7
s_mov_b32 s5, exec_lo
v_cmpx_lt_i32_e32 0, v2
s_cbranch_execz .LBB1_9
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v3, v[2:3], off offset:-4
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s5
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v8, v6
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v2, v2, v3
v_add_f32_e32 v2, v5, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, -4.0, v7
v_fmac_f32_e32 v7, s4, v2
global_store_b32 v[0:1], v7, off
.LBB1_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| updateGrid | 1,335 | 1,730 | stackv2-00001-of-00015 |
// Demangled: stencil_1d_improved(int*, int*)
Function : _Z19stencil_1d_improvedPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R5, R0, UR4, R7 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR6][R2.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R7, R7, UR4, 0x2 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
LDS R4, [R7+-0xc] ?trans4;
LDS R9, [R7+-0x8] ?trans4;
LDS R6, [R7+-0x4] &wr=0x0 ?trans4;
LDS R8, [R7+0x4] &wr=0x2 ?trans4;
LDS R11, [R7+0x8] ?trans4;
LDS R10, [R7+0xc] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R6, R9, R4 &req={0} ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R8, R0, R9 &req={2} ?trans1;
STS [R7], R0 ?trans3;
IADD3 R11, PT, PT, R10, R11, R8 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R11 ?trans1;
EXIT ?trans5;
BRA 0x1b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: stencil_1d_improved(int*, int*)
_Z19stencil_1d_improvedPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v3, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
s_mov_b32 s0, -12
global_load_b32 v4, v[3:4], off
v_dual_mov_b32 v0, 0 :: v_dual_lshlrev_b32 v3, 2, v0
s_waitcnt vmcnt(0)
ds_store_b32 v3, v4
.LBB1_1:
v_add_nc_u32_e32 v4, s0, v3
s_add_i32 s0, s0, 4
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 16
ds_load_b32 v4, v4
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v0, v4, v0
s_cbranch_scc0 .LBB1_1
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| stencil_1d_improved | 705 | 569 | stackv2-00001-of-00015 |
// Demangled: stencil_1d_simple(int*, int*)
Function : _Z17stencil_1d_simplePiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: stencil_1d_simple(int*, int*)
_Z17stencil_1d_simplePiS_:
s_endpgm
| stencil_1d_simple | 98 | 18 | stackv2-00001-of-00015 |
// Demangled: addKernel(dim3, unsigned int*, unsigned long*)
Function : _Z9addKernel4dim3PjPm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC.64 R36, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
MOV.64 R40, RZ ?WAIT2_END_GROUP;
IMAD R36, R36, R37, RZ &req={1} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R36, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x880 &req={2,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R36.reuse, 0x10, PT ?trans1;
LOP3.LUT R3, R36, 0xf, RZ, 0xc0, !PT ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R40, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x490 ?trans6;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
LOP3.LUT R0, R36, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
MOV.64 R40, RZ ?trans2;
MOV R2, RZ ?trans1;
IADD3 R0, PT, PT, -R0, RZ, RZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={0} ?WAIT6_END_GROUP;
MOV.64 R38, UR4 ?WAIT8_END_GROUP;
LDG.E R4, desc[UR6][R38.64+-0x20] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R38.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R8, desc[UR6][R38.64+-0x18] &wr=0x4 ?trans4;
LDG.E R10, desc[UR6][R38.64+-0x14] &wr=0x5 ?trans4;
LDG.E R12, desc[UR6][R38.64+-0x10] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R38.64+-0xc] &wr=0x5 ?trans4;
LDG.E R16, desc[UR6][R38.64+-0x8] &wr=0x5 ?trans4;
LDG.E R18, desc[UR6][R38.64+-0x4] &wr=0x5 ?trans4;
LDG.E R20, desc[UR6][R38.64] &wr=0x5 ?trans4;
LDG.E R22, desc[UR6][R38.64+0x4] &wr=0x5 ?trans4;
LDG.E R24, desc[UR6][R38.64+0x8] &wr=0x5 ?trans4;
LDG.E R26, desc[UR6][R38.64+0xc] &wr=0x5 ?trans4;
LDG.E R28, desc[UR6][R38.64+0x10] &wr=0x5 ?trans4;
LDG.E R30, desc[UR6][R38.64+0x14] &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R38.64+0x18] &wr=0x5 ?trans4;
LDG.E R34, desc[UR6][R38.64+0x1c] &rd=0x0 &wr=0x5 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
MOV R11, RZ ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
MOV R15, RZ ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV R19, RZ ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
MOV R23, RZ ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
MOV R27, RZ ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 ?trans1;
MOV R31, RZ ?trans1;
HFMA2 R33, -RZ, RZ, 0, 0 ?trans1;
MOV R35, RZ ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
IADD.64 R38, R38, 0x40 &req={0} ?WAIT3_END_GROUP;
IADD3 R2, PT, PT, R2, 0x10, RZ ?trans1;
IADD.64 R4, R4, R40 &req={2} ?WAIT4_END_GROUP;
IADD.64 R4, R4, R6 &req={3} ?WAIT4_END_GROUP;
IADD.64 R4, R4, R8 &req={4} ?WAIT4_END_GROUP;
IADD.64 R4, R4, R10 &req={5} ?WAIT4_END_GROUP;
IADD.64 R4, R4, R12 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R14 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R16 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R18 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R20 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R24 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R26 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R28 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R30 ?WAIT4_END_GROUP;
IADD.64 R4, R4, R32 ?WAIT4_END_GROUP;
IADD.64 R40, R4, R34 ?trans2;
@P1 BRA 0x140 ?trans6;
@!P0 BRA 0x880 ?trans5;
ISETP.GE.U32.AND P0, PT, R3, 0x8, PT ?trans1;
LOP3.LUT R0, R36, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x690 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R8, R2, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R8.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR6][R8.64+0xc] &wr=0x5 ?trans4;
LDG.E R18, desc[UR6][R8.64+0x10] &wr=0x5 ?trans4;
LDG.E R20, desc[UR6][R8.64+0x14] &wr=0x5 ?trans4;
LDG.E R4, desc[UR6][R8.64+0x18] &wr=0x5 ?trans4;
LDG.E R6, desc[UR6][R8.64+0x1c] &wr=0x5 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R13, RZ ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
MOV R17, RZ ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
MOV R21, RZ ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?trans1;
IADD3 R2, PT, PT, R2, 0x8, RZ ?trans1;
IADD.64 R10, R40, R10 &req={2} ?WAIT4_END_GROUP;
IADD.64 R10, R10, R12 &req={3} ?WAIT4_END_GROUP;
IADD.64 R10, R10, R14 &req={4} ?WAIT4_END_GROUP;
IADD.64 R10, R10, R16 &req={5} ?WAIT4_END_GROUP;
IADD.64 R10, R10, R18 ?WAIT4_END_GROUP;
IADD.64 R10, R10, R20 ?WAIT4_END_GROUP;
IADD.64 R10, R10, R4 ?WAIT4_END_GROUP;
IADD.64 R40, R10, R6 ?WAIT8_END_GROUP;
@!P1 BRA 0x880 ?trans5;
ISETP.GE.U32.AND P0, PT, R0, 0x4, PT ?trans1;
LOP3.LUT R36, R36, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R36, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x7d0 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R12, desc[UR6][R4.64+0xc] &wr=0x5 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
MOV R9, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R13, RZ ?trans1;
IADD3 R2, PT, PT, R2, 0x4, RZ ?trans1;
IADD.64 R6, R40, R6 &req={2} ?WAIT4_END_GROUP;
IADD.64 R6, R6, R8 &req={3} ?WAIT4_END_GROUP;
IADD.64 R6, R6, R10 &req={4} ?WAIT4_END_GROUP;
IADD.64 R40, R6, R12 &req={5} ?WAIT8_END_GROUP;
@!P1 BRA 0x880 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R36, PT, PT, -R36, RZ, RZ ?trans1;
IMAD.WIDE.U32 R2, R2, 0x4, R4 &req={0} ?WAIT7_END_GROUP;
LDG.E R4, desc[UR6][R2.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R36, PT, PT, R36, 0x1, RZ ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R36, RZ, PT ?trans1;
IADD.64 R2, R2, 0x4 &req={0} ?trans2;
IADD.64 R40, R4, R40 &req={2} ?WAIT10_END_GROUP;
@P0 BRA 0x810 ?trans5;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R2.64], R40 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x8b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: addKernel(dim3, unsigned int*, unsigned long*)
_Z9addKernel4dim3PjPm:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b128 s[0:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_mul_i32 s6, s5, s4
s_mov_b64 s[4:5], 0
.LBB1_1:
s_cmp_eq_u32 s6, 0
s_cbranch_scc1 .LBB1_3
s_load_b32 s7, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s7
s_addc_u32 s5, s5, 0
s_add_i32 s6, s6, -1
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_branch .LBB1_1
.LBB1_3:
v_mov_b32_e32 v0, s4
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s5
global_store_b64 v2, v[0:1], s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| addKernel | 3,411 | 334 | stackv2-00001-of-00015 |
// Demangled: flagKernel(unsigned int*)
Function : _Z10flagKernelPj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x2 ?trans1;
S2R R9, SR_TID.X &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x1d0 ?trans1;
S2R R11, SR_TID.Y &wr=0x4 ?trans4;
LDC R5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x374] &wr=0x2 ?trans1;
S2R R4, SR_CTAID.Y &wr=0x5 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x3 ?trans1;
UIMAD UR4, UR7, UR4, URZ &req={2} ?trans1;
IMAD R0, R2, R5, RZ &req={1} ?WAIT5_END_GROUP;
I2FP.F32.U32 R3, R0 ?trans1;
IMAD R0, R2, UR6, R9 &req={3} ?WAIT3_END_GROUP;
MUFU.RCP R6, R3 &wr=0x1 ?trans2;
I2FP.F32.U32 R0, R0 ?WAIT4_END_GROUP;
FCHK P0, R0, R3 &wr=0x2 ?trans1;
FFMA R7, -R3, R6, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R7, R6, R7, R6 ?WAIT4_END_GROUP;
FFMA R6, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R8, -R3, R6, R0 ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R6 ?trans1;
IMAD R6, R2, R11, R9 &req={4} ?trans2;
IMAD R8, R4, UR7, R11 &req={5} ?trans1;
@!P0 BRA 0x1c0 &req={2,0} ?trans6;
MOV R10, 0x1b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x460 ?trans5;
MOV R7, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
I2FP.F32.U32 R3, UR4 ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
I2FP.F32.U32 R0, R8 ?trans2;
MUFU.RCP R10, R3 &wr=0x0 ?trans2;
FCHK P0, R0, R3 &wr=0x1 ?trans1;
FFMA R9, -R3, R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R9, R10, R9, R10 ?WAIT4_END_GROUP;
FFMA R8, R0, R9, RZ ?WAIT4_END_GROUP;
FFMA R10, -R3, R8, R0 ?WAIT4_END_GROUP;
FFMA R8, R9, R10, R8 ?trans1;
@!P0 BRA 0x2b0 &req={1} ?trans6;
MOV R10, 0x2a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x460 ?trans5;
MOV R8, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
FMUL R8, R8, R8 ?trans1;
UMOV UR4, 0x400 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
FFMA R8, R7, R7, R8 ?WAIT5_END_GROUP;
FSETP.GTU.AND P0, PT, R8, 1, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT12_END_GROUP;
@!P0 MOV R9, UR4 ?WAIT5_END_GROUP;
@!P0 IADD3 R0, PT, PT, R6, R9, RZ ?trans1;
@P0 MOV R9, UR4 ?WAIT4_END_GROUP;
@!P0 STS.U8 [R0], R3 &rd=0x0 ?trans1;
@P0 IADD3 R6, PT, PT, R6, R9, RZ ?WAIT5_END_GROUP;
@P0 STS.U8 [R6], RZ &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT ?trans5;
LDS.U8 R9, [R9] &wr=0x1 ?trans1;
LDC.64 R6, c[0x0][0x380] &req={0} &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R0, R2, UR7, RZ ?trans2;
IMAD R3, R4, R5, UR6 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R6 &req={0} ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT &req={1} ?WAIT5_END_GROUP;
SEL R5, R0, RZ, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R11, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0xaa0 ?trans1;
SHF.R.U32.HI R9, RZ, 0x17, R0 ?trans2;
LOP3.LUT R16, R11, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R14, R9, 0xff, RZ, 0xc0, !PT ?trans2;
IADD3 R12, PT, PT, R16, -0x1, RZ ?trans2;
IADD3 R11, PT, PT, R14, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x680 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xa80 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa60 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0xa60 ?trans5;
LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xa40 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xa10 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R12, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R12, R16, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0xa00 ?trans3;
IADD3 R12, PT, PT, -R12, R3, RZ ?trans2;
IADD3 R3, PT, PT, R14, -0x7f, RZ ?trans2;
MUFU.RCP R11, R12 &rd=0x0 &wr=0x1 ?trans1;
FADD.FTZ R13, -R12, -RZ ?trans2;
IMAD R0, R3.reuse, -0x800000, R0 ?trans1;
IADD3 R12, PT, PT, R3, 0x7f, -R16 &req={0} ?WAIT4_END_GROUP;
IADD3 R12, PT, PT, R12, R9, RZ ?trans1;
FFMA R14, R11, R13, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R18, R11, R14, R11 ?WAIT4_END_GROUP;
FFMA R11, R0, R18, RZ ?WAIT4_END_GROUP;
FFMA R14, R13, R11, R0 ?WAIT4_END_GROUP;
FFMA R15, R18, R14, R11 ?WAIT4_END_GROUP;
FFMA R14, R13, R15, R0 ?WAIT4_END_GROUP;
FFMA R11, R18, R14, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R11 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R0, R12, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R13, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x9e0 ?trans5;
ISETP.GT.AND P0, PT, R13, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x9b0 ?trans5;
ISETP.GE.AND P0, PT, R13, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x9f0 ?trans5;
ISETP.GE.AND P0, PT, R13, -0x18, PT ?trans1;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x9f0 ?trans5;
FFMA.RZ R0, R18.reuse, R14.reuse, R15.reuse ?trans1;
IADD3 R12, PT, PT, R13.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R18, R14.reuse, R15.reuse ?trans1;
ISETP.NE.AND P1, PT, R13.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R13.reuse, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, -R13, RZ, RZ ?trans2;
LOP3.LUT R9, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R18, R14, R15 ?WAIT3_END_GROUP;
SHF.L.U32 R12, R9, R12, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R13, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R12, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R9 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R12, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R12, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R12, PT, PT, R12, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R11, R12, R11, RZ, 0xfc, !PT ?trans1;
BRA 0x9f0 ?trans6;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x9f0 ?trans6;
IMAD R11, R12, 0x800000, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0xa90 ?trans5;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xa90 ?trans6;
LOP3.LUT R11, R3, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0xa90 ?trans6;
MUFU.RSQ R11, -QNAN &wr=0x0 ?trans1;
BRA 0xa90 ?trans5;
FADD.FTZ R11, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R0, R11 &req={0} ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 ?trans5;
BRA 0xad0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: flagKernel(unsigned int*)
_Z10flagKernelPj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[4:5], s[0:1], 0x8
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s2, 0xffff
s_lshr_b32 s3, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s6, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
s_mul_i32 s2, s4, s6
s_mul_i32 s5, s5, s3
v_cvt_f32_u32_e32 v4, s2
v_cvt_f32_u32_e32 v5, s5
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cvt_f32_u32_e32 v2, v2
v_mad_u32_u24 v0, v0, s6, v1
v_cvt_f32_u32_e32 v3, v3
v_div_scale_f32 v6, null, v4, v4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_div_scale_f32 v7, null, v5, v5, v3
v_div_scale_f32 v12, vcc_lo, v2, v4, v2
v_rcp_f32_e32 v8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v9, v7
s_waitcnt_depctr 0xfff
v_fma_f32 v10, -v6, v8, 1.0
v_fma_f32 v11, -v7, v9, 1.0
v_dual_fmac_f32 v8, v10, v8 :: v_dual_fmac_f32 v9, v11, v9
v_div_scale_f32 v10, s2, v3, v5, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v11, v12, v8
v_mul_f32_e32 v13, v10, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v14, -v6, v11, v12
v_fma_f32 v15, -v7, v13, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v11, v14, v8
v_fmac_f32_e32 v13, v15, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v6, -v6, v11, v12
v_fma_f32 v7, -v7, v13, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_div_fmas_f32 v6, v6, v8, v11
s_mov_b32 vcc_lo, s2
s_mov_b32 s2, exec_lo
v_div_fmas_f32 v7, v7, v9, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f32 v2, v6, v4, v2
v_div_fixup_f32 v3, v7, v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v3, v3, v3
v_fmac_f32_e32 v3, v2, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ge_f32_e32 vcc_lo, 1.0, v3
v_cndmask_b32_e64 v1, 0, 1, vcc_lo
ds_store_b8 v0, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_4
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
s_mul_i32 s3, s3, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB0_3
v_mov_b32_e32 v1, 0
ds_load_u8 v1, v1
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v1, s3, v1
.LBB0_3:
s_load_b64 s[0:1], s[0:1], 0x0
s_mul_i32 s2, s4, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s2, s2, s14
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| flagKernel | 4,127 | 1,629 | stackv2-00001-of-00015 |
// Demangled: vecAdd(float*, float*, float*)
Function : _Z6vecAddPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R9, R0, UR6, R9 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R9, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R9.reuse, 0x4, R4 &req={3} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={4} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAdd(float*, float*, float*)
_Z6vecAddPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAdd | 496 | 496 | stackv2-00001-of-00015 |
// Demangled: group_point_grad_gpu(int, int, int, int, int, float const*, int const*, float*, int)
Function : _Z20group_point_grad_gpuiiiiiPKfPKiPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x4 ?trans1;
IMAD R16, R7, UR5, RZ &req={2} ?trans1;
ISETP.GE.AND P0, PT, R4, R7, PT &req={1} ?trans1;
IMAD R14, R6, UR4, RZ &req={4} ?WAIT2_END_GROUP;
IMAD R16, R16, UR4, RZ ?trans2;
IMAD R14, R14, UR6, RZ &req={3} ?WAIT8_END_GROUP;
@P0 EXIT &req={0} ?trans5;
VIMNMX.S32 R0, R6, UR5, PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR4, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R12, R16, R6, RZ ?trans1;
LOP3.LUT R5, R6.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R0, R6.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LOP3.LUT R2, R6.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R3, R6, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR10, c[0x0][0x3a8] &wr=0x2 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT2_END_GROUP;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?trans1;
LDCU.64 UR16, c[0x0][0x3a8] &wr=0x3 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?trans2;
IADD3 R5, PT, PT, -R5, RZ, RZ ?trans1;
LDCU.64 UR14, c[0x0][0x398] &wr=0x4 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ &req={0} ?WAIT12_END_GROUP;
HFMA2 R7, -RZ, RZ, 0, 0 &req={1,0} ?WAIT7_END_GROUP;
LDCU UR12, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x3a0] &wr=0x5 ?trans1;
IMAD R10, R4, UR12, R7 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?WAIT5_END_GROUP;
IADD.64 R8, R16, R10 ?WAIT5_END_GROUP;
LEA R18, P0, R8, UR8, 0x2 &req={5,1} ?WAIT4_END_GROUP;
LEA.HI.X R19, R8, UR9, R9, 0x2, P0 ?trans2;
LDC R8, c[0x0][0x3b0] &wr=0x0 ?trans3;
LDG.E R6, desc[UR6][R18.64] &req={1} &wr=0x5 ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x15e0 ?trans3;
LDC R9, c[0x0][0x388] &wr=0x1 ?trans1;
ISETP.NE.AND P1, PT, R7, UR12, PT ?trans1;
ISETP.NE.AND P0, PT, R8, 0x1, PT &req={0} ?trans1;
IMAD R10, R10, R9.reuse, RZ &req={1} ?trans1;
LOP3.LUT R30, RZ, R6, RZ, 0x33, !PT &req={5} ?trans1;
IMAD R8, R6, R9, RZ ?WAIT4_END_GROUP;
IMAD R30, R30, R9, RZ ?WAIT6_END_GROUP;
@!P0 BRA 0xb70 ?trans5;
ISETP.GE.U32.AND P0, PT, R9, 0x8, PT ?trans1;
MOV R9, RZ ?WAIT12_END_GROUP;
@!P0 BRA 0x5d0 ?trans5;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
MOV R24, R10 ?trans1;
MOV R25, R8 ?trans1;
MOV R26, R5 ?WAIT7_END_GROUP;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans1;
IADD3 R26, PT, PT, R26, 0x8, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x5a0 ?trans1;
IADD3 R9, PT, PT, R9, 0x8, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P2, PT, R26, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x590 ?trans6;
SHF.R.S32.HI R19, RZ, 0x1f, R24 ?trans1;
MOV R18, R24 ?WAIT5_END_GROUP;
IADD.64 R20, R12, R18 ?WAIT5_END_GROUP;
LEA R18, P0, R20, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R19, R20, UR5, R21, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R27, desc[UR6][R18.64+-0x10] &wr=0x5 ?trans1;
MOV R20, R25 ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R20, R14, R20 ?WAIT5_END_GROUP;
LEA R22, P0, R20, UR10, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R23, R20, UR11, R21, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64], R27 &req={5} &rd=0x0 ?trans4;
LDG.E R21, desc[UR6][R18.64+-0xc] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x4], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R29, desc[UR6][R18.64+-0x8] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x8], R29 &req={2} &rd=0x2 ?trans4;
LDG.E R31, desc[UR6][R18.64+-0x4] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0xc], R31 &req={5} &rd=0x2 ?trans4;
LDG.E R33, desc[UR6][R18.64] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x10], R33 &req={5} &rd=0x2 ?trans4;
LDG.E R35, desc[UR6][R18.64+0x4] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x14], R35 &req={5} &rd=0x2 ?trans4;
LDG.E R27, desc[UR6][R18.64+0x8] &req={0} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x18], R27 &req={5} &rd=0x2 ?trans4;
LDG.E R21, desc[UR6][R18.64+0xc] &req={1} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x1c], R21 &req={5} &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B1 &req={4,3,2} ?trans5;
IADD3 R25, PT, PT, R25, 0x8, RZ ?trans2;
IADD3 R24, PT, PT, R24, 0x8, RZ ?trans1;
@P2 BRA 0x390 ?trans6;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15d0 ?trans5;
IADD3 R18, PT, PT, R0, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R18, 0x3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x830 ?trans5;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans1;
BSSY.RECONVERGENT B1, 0x820 ?WAIT12_END_GROUP;
@!P0 BRA 0x810 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R18, PT, PT, R10, R9, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R20, R12, R18 ?WAIT5_END_GROUP;
LEA R18, P0, R20, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R20, UR9, R21, 0x2, P0 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans4;
LDG.E R27, desc[UR6][R18.64] &wr=0x5 ?trans1;
IADD3 R20, PT, PT, R8, R9, RZ ?trans1;
MOV R21, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R14, R20 ?WAIT5_END_GROUP;
LEA R24, P0, R20, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R25, R20, UR9, R21, 0x2, P0 ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
MOV R20, R8 ?trans1;
MOV R22, R9 ?trans1;
HFMA2 R23, -RZ, RZ, 0, 0 ?trans1;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R27 &req={5} &rd=0x0 ?trans4;
LDG.E R29, desc[UR6][R18.64+0x4] &wr=0x5 ?trans1;
IADD.64 R20, R20, R22 ?WAIT4_END_GROUP;
IADD.64 R22, R14, R20 ?WAIT5_END_GROUP;
LEA R20, P0, R22, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R22, UR9, R23, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R20.64+0x4], R29 &req={5} &rd=0x1 ?trans4;
LDG.E R23, desc[UR6][R18.64+0x8] &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R20.64+0x8], R23 &req={5} &rd=0x1 ?trans4;
LDG.E R25, desc[UR6][R18.64+0xc] &req={0} &wr=0x5 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R20.64+0xc], R25 &req={5} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B1 &req={4,3,2} ?trans5;
IADD3 R9, PT, PT, R9, 0x4, RZ ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15d0 ?trans5;
ISETP.NE.AND P0, PT, R2, 0x1, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa40 ?trans5;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans1;
BSSY.RECONVERGENT B1, 0xa30 ?WAIT12_END_GROUP;
@!P0 BRA 0xa20 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R18, PT, PT, R10, R9, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R20, R12, R18 &req={1} ?WAIT5_END_GROUP;
LEA R18, P0, R20, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R20, UR9, R21, 0x2, P0 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans4;
LDG.E R27, desc[UR6][R18.64] &wr=0x5 ?trans1;
IADD3 R20, PT, PT, R8, R9, RZ ?trans1;
MOV R21, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R14, R20 ?WAIT5_END_GROUP;
LEA R22, P0, R20, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R23, R20, UR9, R21, 0x2, P0 ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
MOV R20, R9 ?WAIT3_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64], R27 &req={5} &rd=0x0 ?trans4;
LDG.E R29, desc[UR6][R18.64+0x4] &rd=0x1 &wr=0x5 ?trans2;
MOV R18, R8 &req={1} ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R20, R18, R20 ?WAIT4_END_GROUP;
IADD.64 R20, R14, R20 ?WAIT5_END_GROUP;
LEA R24, P0, R20, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R20, UR9, R21, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64+0x4], R29 &req={5} &rd=0x0 ?trans4;
BSYNC.RECONVERGENT B1 &req={4,3,2} ?trans5;
IADD3 R9, PT, PT, R9, 0x2, RZ ?WAIT7_END_GROUP;
LDC R18, c[0x0][0x388] &wr=0x5 ?trans2;
LOP3.LUT P0, RZ, R18, 0x1, RZ, 0xc0, !PT &req={5} ?WAIT5_END_GROUP;
ISETP.LT.OR P0, PT, R6, RZ, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0x15d0 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x5 ?trans1;
IADD3 R10, PT, PT, R10, R9, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?WAIT5_END_GROUP;
IADD.64 R10, R12, R10 ?WAIT5_END_GROUP;
LEA R18, P0, R10, UR8, 0x2 &req={5} ?WAIT4_END_GROUP;
LEA.HI.X R19, R10, UR9, R11, 0x2, P0 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x5 ?trans5;
LDG.E R19, desc[UR6][R18.64] &req={4} &wr=0x4 ?trans1;
IADD3 R8, PT, PT, R8, R9, RZ ?trans1;
MOV R9, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R14, R8 ?WAIT5_END_GROUP;
LEA R10, P0, R8, UR8, 0x2 &req={5} ?WAIT4_END_GROUP;
LEA.HI.X R11, R8, UR9, R9, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R10.64], R19 &req={4} &rd=0x4 ?trans1;
BRA 0x15d0 ?trans5;
ISETP.GE.U32.AND P0, PT, R9, 0x4, PT ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?WAIT12_END_GROUP;
@!P0 BRA 0x10f0 ?trans5;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans1;
MOV R9, RZ ?WAIT12_END_GROUP;
BSSY.RECONVERGENT B1, 0xe00 ?trans4;
@!P0 BRA 0xcf0 &req={3,2,1,0} ?trans5;
IADD3 R20, PT, PT, R10, R9, RZ ?trans1;
MOV R19, UR14 &req={4} ?trans1;
MOV R23, UR15 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 ?WAIT5_END_GROUP;
IADD.64 R20, R12, R20 ?WAIT5_END_GROUP;
LEA R28, P2, R20, R19, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R20, R23, R21, 0x2, P2 ?WAIT6_END_GROUP;
LDG.E R29, desc[UR6][R28.64] &wr=0x4 ?trans1;
IADD3 R26, PT, PT, R8, R9, RZ ?trans1;
MOV R27, RZ ?trans1;
MOV R31, UR16 &req={3} ?trans1;
MOV R21, UR17 ?WAIT3_END_GROUP;
IADD.64 R26, R14, R26 ?WAIT5_END_GROUP;
LEA R24, P2, R26, R31, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R26, R21, R27, 0x2, P2 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R29 &req={4} &rd=0x0 ?trans1;
BRA 0xdf0 ?trans5;
IADD3 R20, PT, PT, R10, R9, RZ ?trans1;
MOV R19, UR14 &req={4} ?trans1;
MOV R23, UR15 ?trans2;
SHF.R.S32.HI R21, RZ, 0x1f, R20 ?WAIT5_END_GROUP;
IADD.64 R20, R12, R20 ?WAIT5_END_GROUP;
LEA R28, P2, R20, R19, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R20, R23, R21, 0x2, P2 ?WAIT6_END_GROUP;
LDG.E R29, desc[UR6][R28.64] &wr=0x4 ?trans1;
IADD3 R26, PT, PT, R30, R9, RZ ?trans1;
HFMA2 R27, -RZ, RZ, 0, 0 ?trans1;
MOV R31, UR16 &req={3} ?trans1;
MOV R21, UR17 ?WAIT3_END_GROUP;
IADD.64 R26, R14, R26 ?WAIT5_END_GROUP;
LEA R24, P2, R26, R31, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R26, R21, R27, 0x2, P2 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R29 &req={4} &rd=0x1 ?trans4;
BSYNC.RECONVERGENT B1 &req={2} ?trans5;
MOV R24, R30 &req={1,0} ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
MOV R28, R9 ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 ?trans1;
MOV R26, R8 ?trans1;
HFMA2 R27, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?trans1;
BSSY.RECONVERGENT B1, 0xfb0 ?trans1;
IADD.64 R24, R24, R28.reuse ?trans2;
IADD.64 R26, R26, R28 ?WAIT2_END_GROUP;
IADD.64 R28, R28, R10 ?trans2;
IADD.64 R24, R14.reuse, R24 ?trans2;
IADD.64 R26, R14, R26 ?trans2;
IADD.64 R28, R12, R28 ?WAIT3_END_GROUP;
LEA R18, P2, R24, R31.reuse, 0x2 ?trans2;
LEA R20, P3, R26, R31, 0x2 ?trans2;
LEA R22, P4, R28, R19, 0x2 ?trans2;
LEA.HI.X R19, R24, R21.reuse, R25, 0x2, P2 ?trans2;
LEA.HI.X R21, R26, R21, R27, 0x2, P3 ?trans2;
LEA.HI.X R23, R28, R23, R29, 0x2, P4 ?trans1;
@!P0 BRA 0xf80 ?trans6;
LDG.E R25, desc[UR6][R22.64+0x4] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R20.64+0x4], R25 &req={2} &rd=0x0 ?trans1;
BRA 0xfa0 ?trans5;
LDG.E R25, desc[UR6][R22.64+0x4] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R18.64+0x4], R25 &req={2} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x1030 ?trans4;
@!P0 BRA 0x1000 ?trans5;
LDG.E R25, desc[UR6][R22.64+0x8] &req={1,0} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R20.64+0x8], R25 &req={2} &rd=0x0 ?trans1;
BRA 0x1020 ?trans5;
LDG.E R25, desc[UR6][R22.64+0x8] &req={1,0} &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R18.64+0x8], R25 &req={2} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0x10b0 ?trans4;
@!P0 BRA 0x1080 ?trans5;
LDG.E R23, desc[UR6][R22.64+0xc] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R20.64+0xc], R23 &req={2} &rd=0x2 ?trans1;
BRA 0x10a0 ?trans5;
LDG.E R23, desc[UR6][R22.64+0xc] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R18.64+0xc], R23 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R9, PT, PT, R9, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P2, PT, R9, R3, PT ?WAIT13_END_GROUP;
@P2 BRA 0xbc0 ?trans5;
MOV R9, R3 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15d0 ?trans5;
ISETP.GE.AND P0, PT, R6, RZ, PT ?trans1;
BSSY.RECONVERGENT B1, 0x13a0 ?WAIT12_END_GROUP;
@!P0 BRA 0x1270 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x5 ?trans1;
IADD3 R18, PT, PT, R10, R9, RZ &req={3,1} ?WAIT4_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?trans2;
MOV R20, UR8 &req={5,2,0} ?trans1;
MOV R21, UR9 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans3;
LEA R26, P2, R18, R20, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R18, R21, R19, 0x2, P2 ?WAIT6_END_GROUP;
LDG.E R27, desc[UR6][R26.64] &wr=0x2 ?trans1;
IADD3 R18, PT, PT, R8, R9, RZ ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
MOV R22, UR8 &req={0} ?trans1;
MOV R6, UR9 ?WAIT3_END_GROUP;
IADD.64 R18, R14, R18 ?WAIT5_END_GROUP;
LEA R24, P2, R18, R22, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R6, R19, 0x2, P2 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R27 &req={2} &rd=0x1 ?trans1;
BRA 0x1390 ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x5 ?trans1;
IADD3 R18, PT, PT, R10, R9, RZ &req={3,1} ?WAIT4_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?trans2;
MOV R20, UR8 &req={5,2,0} ?trans1;
MOV R21, UR9 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans3;
LEA R26, P2, R18, R20, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R18, R21, R19, 0x2, P2 ?WAIT6_END_GROUP;
LDG.E R27, desc[UR6][R26.64] &wr=0x2 ?trans1;
IADD3 R18, PT, PT, R30, R9, RZ ?trans1;
MOV R19, RZ ?trans1;
MOV R22, UR8 &req={0} ?trans1;
MOV R6, UR9 ?WAIT3_END_GROUP;
IADD.64 R18, R14, R18 ?WAIT5_END_GROUP;
LEA R24, P2, R18, R22, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R6, R19, 0x2, P2 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R27 &req={2} &rd=0x0 ?trans4;
BSYNC.RECONVERGENT B1 &req={4} ?trans5;
ISETP.NE.AND P2, PT, R2, 0x1, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x15d0 ?trans5;
MOV R18, R9 ?trans1;
HFMA2 R31, -RZ, RZ, 0, 0 ?trans1;
MOV R9, RZ ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?trans1;
BSSY.RECONVERGENT B1, 0x1550 ?trans3;
IADD.64 R30, R30, R18.reuse ?trans2;
IADD.64 R8, R8, R18 ?WAIT2_END_GROUP;
IADD.64 R18, R10, R18 ?trans2;
IADD.64 R30, R14.reuse, R30 ?trans2;
IADD.64 R10, R14, R8 ?trans2;
IADD.64 R18, R12, R18 ?WAIT3_END_GROUP;
LEA R8, P2, R30, R22.reuse, 0x2 ?trans2;
LEA R22, P3, R10, R22, 0x2 ?trans2;
LEA R20, P4, R18, R20, 0x2 ?trans2;
LEA.HI.X R9, R30, R6.reuse, R31, 0x2, P2 ?trans2;
LEA.HI.X R23, R10, R6, R11, 0x2, P3 ?trans2;
LEA.HI.X R21, R18, R21, R19, 0x2, P4 ?trans1;
@!P0 BRA 0x1520 ?trans6;
LDG.E R11, desc[UR6][R20.64+0x4] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x4], R11 &req={2} &rd=0x2 ?trans1;
BRA 0x1540 ?trans5;
LDG.E R11, desc[UR6][R20.64+0x4] &wr=0x2 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R8.64+0x4], R11 &req={2} &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.NE.AND P2, PT, R2, 0x2, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x15d0 ?trans5;
@!P0 BRA 0x15b0 ?trans5;
LDG.E R21, desc[UR6][R20.64+0x8] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R22.64+0x8], R21 &req={4} &rd=0x4 ?trans1;
BRA 0x15d0 ?trans5;
LDG.E R21, desc[UR6][R20.64+0x8] &wr=0x4 ?trans4;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R8.64+0x8], R21 &req={4} &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 &req={4,3,2} ?trans5;
@P1 BRA 0x1f0 ?trans5;
LDCU UR8, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU UR9, c[0x0][0x38c] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R4, UR8, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, UR9, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0x1e0 ?trans5;
EXIT ?trans5;
BRA 0x1650;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: group_point_grad_gpu(int, int, int, int, int, float const*, int const*, float*, int)
_Z20group_point_grad_gpuiiiiiPKfPKiPfi:
s_load_b128 s[4:7], s[0:1], 0x4
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s6, v0
s_cbranch_execz .LBB7_12
s_clause 0x3
s_load_b128 s[8:11], s[0:1], 0x18
s_load_b64 s[12:13], s[0:1], 0x28
s_load_b32 s16, s[0:1], 0x44
s_load_b32 s18, s[0:1], 0x30
s_mul_i32 s14, s7, s6
s_mul_i32 s17, s15, s5
s_mul_i32 s2, s14, s15
s_mul_i32 s14, s17, s14
s_ashr_i32 s3, s2, 31
v_mov_b32_e32 v2, 0
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s10, s2
s_addc_u32 s3, s11, s3
s_ashr_i32 s15, s14, 31
s_mul_i32 s10, s17, s4
s_lshl_b64 s[0:1], s[14:15], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_u32 s0, s8, s0
s_addc_u32 s1, s9, s1
s_ashr_i32 s11, s10, 31
s_lshl_b64 s[8:9], s[10:11], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s12, s8
s_addc_u32 s8, s13, s9
s_and_b32 s9, s16, 0xffff
s_cmp_gt_i32 s7, 0
s_mov_b32 s12, 0
s_cselect_b32 s10, -1, 0
s_cmp_gt_i32 s5, 0
s_cselect_b32 s11, -1, 0
s_cmp_eq_u32 s18, 1
s_cselect_b32 s13, -1, 0
.LBB7_2:
s_and_not1_b32 vcc_lo, exec_lo, s10
s_cbranch_vccnz .LBB7_11
v_mul_lo_u32 v7, v0, s7
s_mov_b32 s14, 0
.LBB7_4:
s_and_not1_b32 vcc_lo, exec_lo, s11
s_cbranch_vccnz .LBB7_10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, s14, v7
s_mov_b32 s16, 0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mul_lo_u32 v8, v1, s5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v4, 31, v3
v_cmp_lt_i32_e32 vcc_lo, -1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v3, v4
s_or_b32 s15, vcc_lo, s13
v_mul_lo_u32 v9, v4, s5
.LBB7_6:
s_and_saveexec_b32 s17, s15
s_cbranch_execz .LBB7_9
v_add_nc_u32_e32 v3, s16, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v1, s16, v9
s_mov_b32 s18, 0
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v10, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v11, vcc_lo, s1, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s8, v6, vcc_lo
global_load_b32 v1, v[10:11], off
global_load_b32 v6, v[3:4], off
.LBB7_8:
s_waitcnt vmcnt(0)
v_add_f32_e32 v5, v6, v1
global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v5, v6
v_mov_b32_e32 v6, v5
s_or_b32 s18, vcc_lo, s18
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s18
s_cbranch_execnz .LBB7_8
.LBB7_9:
s_or_b32 exec_lo, exec_lo, s17
s_add_i32 s16, s16, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s16, s5
s_cbranch_scc0 .LBB7_6
.LBB7_10:
s_add_i32 s14, s14, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s14, s7
s_cbranch_scc0 .LBB7_4
.LBB7_11:
v_add_nc_u32_e32 v0, s9, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s6, v0
s_or_b32 s12, vcc_lo, s12
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB7_2
.LBB7_12:
s_endpgm
| group_point_grad_gpu | 9,387 | 1,940 | stackv2-00001-of-00015 |
// Demangled: query_ball_point_gpu(int, int, int, float, int, float const*, float const*, int*, int*)
Function : _Z20query_ball_point_gpuiiifiPKfS0_PiS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x388] &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R12, c[0x0][0x390] &wr=0x3 ?trans1;
UIMAD UR10, UR6, UR7, URZ &req={2} ?WAIT4_END_GROUP;
USHF.R.S32.HI UR11, URZ, 0x1f, UR10 ?trans1;
ISETP.GE.AND P0, PT, R3, UR7, PT &req={1} ?trans1;
IMAD R4, R12, UR10, RZ &req={3} ?WAIT12_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR8, c[0x0][0x384] &wr=0x0 ?trans1;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans1;
UIMAD UR6, UR6, 0x3, URZ ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.LT.AND P1, PT, RZ, UR8, PT &req={0} ?trans2;
UIMAD UR8, UR6, UR8, URZ ?WAIT11_END_GROUP;
@P0 BRA P1, 0x5c0 &req={2} ?trans5;
I2F.U32.RP R8, R2 &req={1} &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R3, R2, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R2, RZ, PT ?trans1;
LDCU.64 UR8, c[0x0][0x3b0] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x3f0 ?trans2;
ISETP.GE.U32.AND P0, PT, R0.reuse, UR7, PT ?trans1;
VIMNMX.U32 R7, R0, UR7, !PT ?WAIT4_END_GROUP;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R7, PT, PT, R7, -R0, -R6 ?trans2;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R9, PT, PT, RZ, -R5, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R9, R9, R2, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R5, R9, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R8, R7, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R2, R0, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, R2, PT ?WAIT13_END_GROUP;
@P0 IADD3 R7, PT, PT, R7, -R2, RZ ?trans2;
@P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R7, R2, PT ?WAIT13_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R5, RZ, R2, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R6, R5, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R5.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R5, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, R6, R0, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P1 BRA 0x3e0 &req={1} ?trans5;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans1;
MOV R4, R3 ?trans1;
MOV R5, RZ ?trans1;
IADD3 R0, PT, PT, -R6.reuse, RZ, RZ ?trans1;
IMAD R3, R6, R2, R3 ?WAIT3_END_GROUP;
IADD.64 R8, R4, UR10 ?WAIT5_END_GROUP;
LEA R4, P1, R8, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R8, UR5, R9, 0x2, P1 ?WAIT9_END_GROUP;
IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
STG.E desc[UR12][R4.64], RZ &rd=0x0 ?trans4;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 &req={0} ?WAIT12_END_GROUP;
@P1 BRA 0x390 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P0 EXIT ?trans5;
IADD3 R6, PT, PT, R2, R3.reuse, RZ &req={0} ?trans1;
MOV R4, R3 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
MOV R7, RZ ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
IADD3 R8, PT, PT, R6, R2, RZ ?trans1;
MOV R11, RZ ?trans1;
IADD.64 R4, R4, UR10 ?trans2;
IADD.64 R6, R6, UR10 ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R8, R2, RZ ?trans2;
LEA R12, P0, R4, UR8, 0x2 ?trans1;
IADD.64 R8, R8, UR10 ?WAIT3_END_GROUP;
LEA R14, P1, R6, UR8, 0x2 ?trans1;
IADD.64 R16, R10, UR10 ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R10, R2, RZ ?trans2;
LEA.HI.X R13, R4, UR9, R5, 0x2, P0 ?trans2;
LEA R4, P0, R8, UR8, 0x2 ?trans2;
LEA.HI.X R15, R6, UR9, R7, 0x2, P1 ?trans1;
STG.E desc[UR12][R12.64], RZ &rd=0x0 ?trans1;
LEA R6, P1, R16, UR8, 0x2 ?trans2;
LEA.HI.X R5, R8, UR9, R9, 0x2, P0 ?trans1;
STG.E desc[UR12][R14.64], RZ &rd=0x0 ?trans1;
LEA.HI.X R7, R16, UR9, R17, 0x2, P1 ?trans1;
ISETP.GE.AND P0, PT, R3, UR7, PT ?WAIT2_END_GROUP;
STG.E desc[UR12][R4.64], RZ &rd=0x0 ?trans4;
STG.E desc[UR12][R6.64], RZ &rd=0x0 ?trans7;
@!P0 BRA 0x400 ?trans5;
EXIT ?trans5;
LOP3.LUT R13, R12.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
UIMAD UR6, UR6, UR7, URZ ?trans1;
LOP3.LUT R20, R12.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
USHF.R.S32.HI UR9, URZ, 0x1f, UR8 ?trans1;
LOP3.LUT R12, R12, 0x3, RZ, 0xc0, !PT ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR6 ?trans1;
IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT11_END_GROUP;
LDCU UR4, c[0x0][0x390] &wr=0x0 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans2;
IMAD R8, R3, 0x3, RZ ?trans1;
MOV R9, RZ ?trans1;
LDCU.128 UR16, c[0x0][0x3a0] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xef0 ?trans3;
IADD.64 R10, R8, UR6 ?trans2;
IMAD R6, R3, UR4, RZ &req={0} ?WAIT3_END_GROUP;
LEA R8, P0, R10, UR16, 0x2 &req={2} ?trans2;
IADD.64 R14, R4, R6 ?WAIT3_END_GROUP;
LEA.HI.X R9, R10, UR17, R11, 0x2, P0 ?trans2;
LEA R16, P1, R14, UR18, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R17, R14, UR19, R15, 0x2, P1 ?trans1;
CS2R R14, SRZ ?WAIT4_END_GROUP;
IADD.64 R10, R16, 0x10 ?WAIT8_END_GROUP;
LDCU.64 UR4, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R16, R14, 0x3, RZ ?trans1;
MOV R17, RZ ?trans1;
LDG.E R0, desc[UR12][R8.64] &wr=0x2 ?trans4;
IADD.64 R16, R16, UR8 ?WAIT5_END_GROUP;
LEA R18, P0, R16, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, UR5, R17, 0x2, P0 ?trans2;
LDG.E R16, desc[UR12][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R23, desc[UR12][R18.64+0x4] &wr=0x3 ?trans4;
LDG.E R21, desc[UR12][R18.64] &wr=0x2 ?trans4;
LDG.E R22, desc[UR12][R18.64+0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR12][R8.64+0x8] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B1, 0x910 ?trans1;
FADD R16, R16, -R23 &req={3} ?trans1;
FADD R0, R0, -R21 &req={2} ?WAIT3_END_GROUP;
FMUL R21, R16, R16 ?WAIT4_END_GROUP;
FFMA R21, R0, R0, R21 ?trans1;
FADD R22, R17, -R22 &req={4} ?WAIT4_END_GROUP;
FFMA R21, R22, R22, R21 ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R21, -0xd000000, RZ ?trans1;
MUFU.RSQ R16, R21 &rd=0x0 &wr=0x2 ?trans4;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x8c0 &req={0} ?trans5;
MOV R22, 0x8b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xfb0 &req={2,1} ?trans5;
BRA 0x900 ?trans5;
FMUL.FTZ R0, R21, R16 &req={2} ?trans1;
FMUL.FTZ R16, R16, 0.5 ?WAIT3_END_GROUP;
FFMA R17, -R0, R0, R21 ?WAIT4_END_GROUP;
FFMA R0, R17, R16, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDCU UR4, c[0x0][0x38c] &wr=0x0 ?trans1;
FMNMX R0, R0, 9.999999682655225389e-21, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe80 ?trans4;
FSETP.GEU.AND P0, PT, R0, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xe70 ?trans5;
LDC R21, c[0x0][0x390] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B2, 0xdf0 ?trans1;
ISETP.GE.AND P0, PT, R21, 0x1, PT &req={0} ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R15, RZ, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0xde0 ?trans5;
ISETP.GE.U32.AND P0, PT, R21, 0x8, PT ?trans1;
UMOV UR4, URZ ?trans1;
ISETP.NE.AND P1, PT, R20, RZ, PT ?WAIT11_END_GROUP;
@!P0 BRA 0xaf0 ?trans5;
MOV.64 R16, R10 ?trans2;
MOV R0, R13 ?trans1;
UMOV UR4, URZ ?WAIT6_END_GROUP;
IADD3 R0, PT, PT, R0, 0x8, RZ ?trans1;
STG.E desc[UR12][R16.64+-0x10], R14 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
STG.E desc[UR12][R16.64+-0xc], R14 ?trans4;
STG.E desc[UR12][R16.64+-0x8], R14 ?trans4;
STG.E desc[UR12][R16.64+-0x4], R14 ?trans4;
STG.E desc[UR12][R16.64], R14 ?trans4;
STG.E desc[UR12][R16.64+0x4], R14 ?trans4;
STG.E desc[UR12][R16.64+0x8], R14 ?trans4;
STG.E desc[UR12][R16.64+0xc], R14 &rd=0x0 ?trans2;
IADD.64 R16, R16, 0x20 &req={0} ?WAIT2_END_GROUP;
@P0 BRA 0xa20 ?trans6;
@!P1 BRA 0xde0 ?trans5;
IADD3 R0, PT, PT, R20, -0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R0, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xc40 ?trans5;
LDCU.64 UR14, c[0x0][0x3a8] &wr=0x0 ?trans1;
IADD3 R16, PT, PT, R6.reuse, UR4, RZ ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans2;
IADD.64 R18, R6, UR4 ?trans2;
IADD.64 R16, R4.reuse, R16 ?trans2;
IADD.64 R18, R4, R18 ?trans2;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
LEA R24, P1, R16, UR14, 0x2 &req={0} ?WAIT2_END_GROUP;
LEA R22, P2, R18, UR14, 0x2 ?trans2;
LEA.HI.X R25, R16, UR15, R17, 0x2, P1 ?trans2;
LEA.HI.X R23, R18, UR15, R19, 0x2, P2 ?WAIT3_END_GROUP;
STG.E desc[UR12][R24.64], R14 &rd=0x0 ?trans4;
STG.E desc[UR12][R22.64+0x4], R14 &rd=0x0 ?trans4;
STG.E desc[UR12][R22.64+0x8], R14 &rd=0x0 ?trans4;
STG.E desc[UR12][R22.64+0xc], R14 &rd=0x0 ?trans2;
@!P0 BRA 0xde0 ?trans5;
ISETP.NE.AND P1, PT, R12, 0x1, PT ?trans1;
LOP3.LUT P0, RZ, R21, 0x1, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P1 BRA 0xd60 ?trans5;
LDCU.64 UR14, c[0x0][0x3a8] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R6.reuse, UR4, RZ ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
UMOV UR5, URZ ?trans2;
IADD.64 R18, R6, UR4 ?trans2;
IADD.64 R16, R4.reuse, R16 ?trans2;
IADD.64 R22, R4, R18 &req={0} ?trans2;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
LEA R18, P1, R16, UR14, 0x2 &req={2} ?WAIT2_END_GROUP;
LEA R24, P2, R22, UR14, 0x2 ?trans2;
LEA.HI.X R19, R16, UR15, R17, 0x2, P1 ?trans2;
LEA.HI.X R25, R22, UR15, R23, 0x2, P2 ?WAIT3_END_GROUP;
STG.E desc[UR12][R18.64], R14 &rd=0x2 ?trans4;
STG.E desc[UR12][R24.64+0x4], R14 &rd=0x2 ?trans2;
@!P0 BRA 0xde0 ?trans5;
LDCU.64 UR14, c[0x0][0x3a8] &wr=0x3 ?trans1;
IADD3 R16, PT, PT, R6, UR4, RZ ?trans1;
MOV R17, RZ ?WAIT5_END_GROUP;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R18, P0, R16, UR14, 0x2 &req={3,2} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, UR15, R17, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR12][R18.64], R14 &rd=0x3 ?trans4;
BSYNC.RECONVERGENT B2 ?trans5;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x4 ?trans1;
IADD3 R16, PT, PT, R6, R15, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans2;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R18, P0, R16, UR4, 0x2 &req={4,3,2} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, UR5, R17, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR12][R18.64], R14 &rd=0x2 ?trans4;
BSYNC.RECONVERGENT B1 ?trans5;
LDCU UR4, c[0x0][0x384] &wr=0x3 ?trans1;
IADD3 R14, PT, PT, R14, 0x1, RZ &req={2,0} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x0 ?trans4;
ISETP.GE.AND P0, PT, R14, UR4, PT &req={3} ?trans1;
ISETP.NE.AND P1, PT, R15, UR5, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA P1, 0x720 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans1;
MOV R6, R3.reuse ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
IADD3 R3, PT, PT, R2, R3, RZ &req={1} ?WAIT4_END_GROUP;
IADD.64 R8, R6, UR10 ?WAIT5_END_GROUP;
LEA R6, P0, R8.reuse, UR4, 0x2 &req={0} ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x0 ?trans3;
LEA.HI.X R7, R8, UR5, R9, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64], R15 &rd=0x2 ?trans1;
ISETP.GE.AND P0, PT, R3, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x630 &req={2} ?trans5;
EXIT ?trans5;
LOP3.LUT P0, RZ, R21, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R16, R21 ?trans1;
@!P0 BRA 0x10f0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R21, RZ, PT ?trans1;
MOV R0, R21 ?WAIT12_END_GROUP;
@!P0 MOV R16, 0x7fffffff ?trans1;
@!P0 BRA 0x10f0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R16, R0, 1 ?trans1;
@P0 BRA 0x10f0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R17, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R16, R17 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R18, R17, R16 &req={0} ?trans1;
@P0 FMUL.FTZ R21, R16, 0.5 ?trans1;
@!P0 MOV R16, R0 ?trans2;
@P0 FADD.FTZ R19, -R18, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R19, R18, R19, R17 ?WAIT4_END_GROUP;
@P0 FFMA R19, R19, R21, R18 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R16, R19, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R16 ?trans1;
MOV R16, R22 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R16 0x0 ?trans5;
BRA 0x1130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: query_ball_point_gpu(int, int, int, float, int, float const*, float const*, int*, int*)
_Z20query_ball_point_gpuiiifiPKfS0_PiS1_:
s_load_b128 s[16:19], s[0:1], 0x4
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s17, v0
s_cbranch_execz .LBB0_12
s_load_b256 s[4:11], s[0:1], 0x18
s_mul_i32 s2, s15, s16
s_load_b32 s20, s[0:1], 0x44
s_mul_i32 s2, s2, 3
s_mul_i32 s12, s15, s17
s_ashr_i32 s3, s2, 31
s_mul_i32 s14, s12, 3
s_lshl_b64 s[0:1], s[2:3], 2
v_mul_lo_u32 v5, v0, s19
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s4, s0
s_addc_u32 s3, s5, s1
s_ashr_i32 s15, s14, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[14:15], 2
s_mul_i32 s14, s12, s19
s_add_u32 s4, s6, s0
s_addc_u32 s5, s7, s1
s_ashr_i32 s15, s14, 31
s_lshl_b64 s[0:1], s[14:15], 2
s_mov_b32 s14, 0
s_add_u32 s6, s8, s0
s_addc_u32 s7, s9, s1
s_ashr_i32 s13, s12, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[12:13], 2
s_add_u32 s8, s10, s0
s_addc_u32 s9, s11, s1
s_and_b32 s10, s20, 0xffff
s_cmp_gt_i32 s16, 0
s_mov_b32 s1, 0
s_cselect_b32 s0, -1, 0
s_cmp_lg_u32 s19, 0
s_mul_i32 s12, s19, s10
s_cselect_b32 s11, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_and_b32 s11, s0, s11
s_cmp_lt_i32 s19, 1
s_cselect_b32 s0, -1, 0
s_xor_b32 s13, s0, -1
.LBB0_2:
v_mov_b32_e32 v10, 0
s_and_not1_b32 vcc_lo, exec_lo, s11
s_cbranch_vccnz .LBB0_11
v_lshl_add_u32 v2, v0, 1, v0
v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v10, 0
v_ashrrev_i32_e32 v6, 31, v5
v_mul_lo_u32 v11, v0, s19
s_mov_b32 s15, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_mov_b32 s20, 0
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b96 v[2:4], v[2:3], off
.LBB0_4:
s_mul_i32 s0, s20, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[22:23], s[0:1], 2
s_add_u32 s22, s2, s22
s_addc_u32 s23, s3, s23
s_clause 0x1
s_load_b64 s[24:25], s[22:23], 0x0
s_load_b32 s0, s[22:23], 0x8
s_waitcnt vmcnt(0) lgkmcnt(0)
v_dual_subrev_f32 v8, s25, v3 :: v_dual_subrev_f32 v9, s24, v2
v_subrev_f32_e32 v12, s0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, v8, v8
v_fmac_f32_e32 v8, v9, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v8, v12, v12
v_mul_f32_e32 v9, 0x4f800000, v8
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v8, v8, v9, vcc_lo
v_sqrt_f32_e32 v9, v8
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v12, -1, v9
v_add_nc_u32_e32 v13, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v14, -v12, v9, v8
v_fma_f32 v15, -v13, v9, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, 0, v14
v_cndmask_b32_e64 v9, v9, v12, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s0, 0, v15
v_cndmask_b32_e64 v9, v9, v13, s0
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v12, 0x37800000, v9
v_cndmask_b32_e32 v9, v9, v12, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v8, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v8, v9, v8, vcc_lo
v_max_f32_e32 v8, 0x1e3ce508, v8
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_f32_e32 s18, v8
s_cbranch_execz .LBB0_9
v_cmp_eq_u32_e32 vcc_lo, 0, v10
s_and_b32 s22, vcc_lo, s13
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s21, s22
s_cbranch_execz .LBB0_8
v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v9, v7
v_mov_b32_e32 v8, v6
s_mov_b32 s22, s19
.LBB0_7:
global_store_b32 v[8:9], v12, off
v_add_co_u32 v8, vcc_lo, v8, 4
v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
s_add_i32 s22, s22, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s22, 0
s_cbranch_scc1 .LBB0_7
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s21
v_add_nc_u32_e32 v8, v10, v11
v_mov_b32_e32 v12, s20
v_add_nc_u32_e32 v10, 1, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[8:9], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
global_store_b32 v[8:9], v12, off
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s0
s_add_i32 s20, s20, 1
v_cmp_eq_u32_e32 vcc_lo, s19, v10
s_cmp_ge_i32 s20, s16
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s0, s0, vcc_lo
s_and_b32 s0, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s15, s0, s15
s_and_not1_b32 exec_lo, exec_lo, s15
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s15
.LBB0_11:
v_lshlrev_b64 v[2:3], 2, v[0:1]
v_add_nc_u32_e32 v0, s10, v0
v_add_nc_u32_e32 v5, s12, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_le_i32_e32 vcc_lo, s17, v0
v_add_co_u32 v2, s0, s8, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
s_or_b32 s14, vcc_lo, s14
global_store_b32 v[2:3], v10, off
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| query_ball_point_gpu | 6,736 | 3,231 | stackv2-00001-of-00015 |
// Demangled: gInitializeMatrixByColumns(long long, double*)
Function : _Z26gInitializeMatrixByColumnsxPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R3, SR_TID.Y &wr=0x0 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x0 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R3, R2, UR5, R3 &req={0} ?WAIT2_END_GROUP;
IMAD R2, R7.reuse, UR6, RZ &req={1} ?trans2;
IMAD R0, R7, UR4, R0 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD R7, R0, R2, R3 ?WAIT4_END_GROUP;
I2F.F64 R2, R7 &wr=0x0 ?trans1;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gInitializeMatrixByColumns(long long, double*)
_Z26gInitializeMatrixByColumnsxPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
s_mul_i32 s3, s3, s4
s_mul_i32 s15, s15, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, s3, v2
v_add3_u32 v0, s15, v0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[2:3], v0
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 3, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gInitializeMatrixByColumns | 490 | 511 | stackv2-00001-of-00015 |
// Demangled: gInitializeMatrixByRows(long long, double*)
Function : _Z23gInitializeMatrixByRowsxPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R0, SR_TID.Y &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x1 ?trans6;
S2UR UR6, SR_CTAID.Y &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC R3, c[0x0][0x364] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R9, c[0x0][0x370] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R0, R3, UR6, R0 &req={0} ?WAIT4_END_GROUP;
IMAD R0, R0, R9, UR4 &req={2} ?WAIT4_END_GROUP;
IMAD R7, R0, UR5, R7 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
I2F.F64 R2, R7 &wr=0x0 ?trans1;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gInitializeMatrixByRows(long long, double*)
_Z23gInitializeMatrixByRowsxPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b64 s[0:1], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
v_mad_u64_u32 v[1:2], null, v3, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[3:4], v1
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[3:4], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gInitializeMatrixByRows | 473 | 507 | stackv2-00001-of-00015 |
// Demangled: gTranspose0(float*, float*)
Function : _Z11gTranspose0PfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.Y &wr=0x0 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR7, SR_CTAID.Y &wr=0x0 ?trans8;
LDC R4, c[0x0][0x364] &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x370] &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x3 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R6, R5, UR8, RZ &req={1} ?WAIT2_END_GROUP;
IMAD R7, R4, UR7, R7 &req={0} ?trans2;
IMAD R0, R5, UR6, R0 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R7, R6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={4} ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans4;
LDG.E R3, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD R7, R0, R6, R7 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x150;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gTranspose0(float*, float*)
_Z11gTranspose0PfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s2, 0xffff
s_lshr_b32 s3, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s5, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
s_mul_i32 s4, s4, s5
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, s4, v[2:3]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v4, v[0:1], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gTranspose0 | 565 | 698 | stackv2-00001-of-00015 |
// Demangled: MatrixMulKernel(float*, float*, float*, int)
Function : _Z15MatrixMulKernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x520 ?trans5;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R0, RZ ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
MOV.64 R4, UR20 &req={1} ?trans2;
UIMAD.WIDE UR6, UR18, 0x1c, UR22 ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR22 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR22 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR22 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR20, UR18, 0x4, UR22 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR22 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR22 ?trans1;
LDG.E R15, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
IMAD.WIDE R24, R6, R25, UR20 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans3;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6, R9, UR24 ?trans1;
LDG.E R12, desc[UR16][R24.64] &wr=0x3 ?trans1;
MOV R23, 0x4 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R10, R6, R11, UR14 ?WAIT4_END_GROUP;
HFMA2 R27, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R14, desc[UR16][R8.64] &rd=0x1 &wr=0x4 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R19, desc[UR16][R4.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE R20, R6, R27, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R16, desc[UR16][R10.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R18, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R29, 0x4 ?trans1;
IMAD.WIDE R8, R6.reuse, R27, UR8 &req={1} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x5 ?trans4;
LDG.E R25, desc[UR16][R4.64] &wr=0x5 ?trans1;
IMAD.WIDE R10, R6, R29, UR6 &req={0} ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x5 ?trans4;
LDG.E R27, desc[UR16][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R29, desc[UR16][R4.64+0x8] &wr=0x5 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x5 ?trans4;
LDG.E R31, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x5 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
FFMA R0, R15, R13, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R17, R12, R0 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R19, R14, R0 &req={4} ?WAIT4_END_GROUP;
FFMA R16, R18, R16, R19 &req={5} ?WAIT4_END_GROUP;
FFMA R16, R25, R22, R16 ?WAIT4_END_GROUP;
FFMA R16, R27, R20, R16 ?WAIT4_END_GROUP;
FFMA R8, R29, R8, R16 ?WAIT4_END_GROUP;
FFMA R0, R31, R10, R8 ?trans1;
@P0 BRA 0x220 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa90 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7f0 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
FFMA R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
FFMA R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa90 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R6, UR4 ?WAIT3_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
@UP0 LDCU.64 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@!UP1 LDCU.128 UR20, c[0x0][0x380] &wr=0x3 ?trans3;
@P1 MOV R4, R2 ?trans1;
@P1 MOV R5, RZ ?trans1;
@P1 IADD3 R15, PT, PT, R2, UR4, RZ ?trans1;
@UP0 UMOV UR6, UR4 ?trans1;
@UP0 UMOV UR7, URZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P1 IADD.64 R8, R4, UR6 ?WAIT2_END_GROUP;
@P1 IMAD R5, R6, UR18, R7 ?trans1;
MOV.64 R10, UR8 &req={1} ?trans2;
MOV.64 R12, UR10 ?trans2;
MOV R6, UR4 ?trans1;
@P1 LEA R4, P0, R8, UR12, 0x2 &req={2} ?trans1;
@P1 IMAD.WIDE.U32 R10, R15, 0x4, R10 ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
@P1 IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
@P1 LEA.HI.X R5, R8, UR13, R9, 0x2, P0 ?trans1;
@P1 LDG.E R23, desc[UR16][R10.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R8, UR20 &req={3} ?WAIT3_END_GROUP;
@!P2 IADD3 R19, PT, PT, R2, UR4, RZ ?trans1;
MOV.64 R16, UR22 ?trans2;
@P1 IMAD.WIDE R14, R15, 0x4, R12 ?trans1;
@P1 LDG.E R4, desc[UR16][R4.64+0x4] &wr=0x3 ?trans3;
@!P2 IMAD R21, R6, UR18, R7 ?trans1;
@P1 LDG.E R12, desc[UR16][R12.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R8, R19, 0x4, R8 ?WAIT3_END_GROUP;
@P1 LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R21, 0x4, R16 &req={0} ?WAIT3_END_GROUP;
@!P2 LDG.E R9, desc[UR16][R8.64] &wr=0x4 ?trans4;
@!P2 LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans1;
@P1 FFMA R23, R23, R12, R0 &req={2} ?WAIT4_END_GROUP;
@P1 FFMA R0, R4, R14, R23 &req={3} ?WAIT4_END_GROUP;
@!P2 FFMA R0, R9, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xae0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMulKernel(float*, float*, float*, int)
_Z15MatrixMulKernelPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB1_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB1_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v0
s_mov_b32 s3, s2
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB1_3:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s3, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB1_3
s_branch .LBB1_5
.LBB1_4:
v_mov_b32_e32 v6, 0
.LBB1_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB1_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatrixMulKernel | 4,515 | 1,195 | stackv2-00001-of-00015 |
// Demangled: TiledMatrixMulKernel(float*, float*, float*, int)
Function : _Z20TiledMatrixMulKernelPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.Y &wr=0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R19, SR_TID.Y &wr=0x2 ?trans1;
S2R R7, SR_CTAID.X &wr=0x4 ?trans1;
S2R R17, SR_TID.X &wr=0x4 ?trans1;
UI2FP.F32.S32 UR4, UR6 &req={1} ?WAIT4_END_GROUP;
UFMUL UR4, UR4, 0.5 ?WAIT4_END_GROUP;
UFRND.CEIL UR5, UR4 ?WAIT6_END_GROUP;
FSETP.LT.AND P0, PT, RZ, UR5, PT ?trans1;
IADD3 R0, PT, PT, R19, R0, R0 &req={2} ?trans2;
IADD3 R7, PT, PT, R17, R7, R7 &req={4} ?WAIT5_END_GROUP;
VIMNMX.S32 R18, R0, R7, !PT ?WAIT5_END_GROUP;
@!P0 BRA 0x390 &req={3} ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
MOV R9, RZ ?trans1;
UIADD3 UR6, UPT, UPT, UR4, 0x10, URZ ?trans1;
LDCU UR8, c[0x0][0x398] &wr=0x2 ?trans1;
ULEA UR4, UR7, UR4, 0x18 &req={1} ?trans2;
ULEA UR6, UR7, UR6, 0x18 ?WAIT4_END_GROUP;
LEA R6, R19, UR4, 0x3 ?trans1;
UMOV UR4, URZ ?trans1;
LEA R10, R17, UR6, 0x2 ?WAIT3_END_GROUP;
IMAD R8, R17, 0x4, R6 ?trans2;
IMAD R11, R19, 0x8, R10 &req={2} ?WAIT7_END_GROUP;
UIADD3 UR6, UPT, UPT, UR4, UR4, URZ ?WAIT6_END_GROUP;
IADD3 R13, PT, PT, R17, UR6, RZ ?trans2;
IADD3 R12, PT, PT, R19, UR6, RZ ?trans1;
UMOV UR6, UR8 ?trans2;
VIMNMX.S32 R2, R0, R13, !PT ?trans2;
VIMNMX.S32 R3, R7, R12, !PT ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR6, PT ?trans2;
ISETP.GE.AND P1, PT, R3, UR6, PT ?WAIT11_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
@!P0 IMAD R13, R0, UR6, R13 ?trans2;
@!P1 IMAD R15, R12, UR6, R7 ?WAIT5_END_GROUP;
@!P1 LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
@!P0 IMAD.WIDE R2, R13, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E R3, desc[UR10][R2.64] &wr=0x3 ?trans1;
@!P1 IMAD.WIDE R4, R15, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
@!P1 LDG.E R4, desc[UR10][R4.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
I2FP.F32.U32 R16, UR4 ?trans1;
@!P0 STS [R8], R3 &req={3} ?trans4;
@!P1 STS [R11], R4 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R14, [R10] ?trans4;
LDS.64 R12, [R6] &wr=0x1 ?trans4;
LDS R15, [R10+0x8] &wr=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
FSETP.LT.AND P0, PT, R16, UR5, PT ?trans1;
FFMA R12, R12, R14, R9 &req={1} ?WAIT4_END_GROUP;
FFMA R9, R15, R13, R12 &req={2} ?WAIT8_END_GROUP;
@P0 BRA 0x1c0 ?trans5;
ISETP.GE.AND P0, PT, R18, UR6, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R7, R0, UR6, R7 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR10][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: TiledMatrixMulKernel(float*, float*, float*, int)
_Z20TiledMatrixMulKernelPfS_S_i:
s_clause 0x2
s_load_b32 s8, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v5, v0, 10, 10
s_lshl_b32 s10, s14, 1
s_mov_b32 s9, 1
v_dual_mov_b32 v7, 0 :: v_dual_and_b32 v6, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v3, s15, 1, v5
v_add_nc_u32_e32 v0, s10, v6
s_waitcnt lgkmcnt(0)
v_cvt_f32_i32_e32 v1, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v1, 0.5, v1
v_ceil_f32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_nlt_f32_e32 vcc_lo, 0, v4
s_cbranch_vccnz .LBB0_7
v_lshlrev_b32_e32 v1, 2, v6
v_mul_lo_u32 v2, v5, s8
v_dual_mov_b32 v7, 0 :: v_dual_lshlrev_b32 v8, 3, v5
v_mul_lo_u32 v10, v3, s8
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v9, 16, v1
v_cmp_gt_i32_e64 s0, s8, v3
v_cmp_gt_i32_e64 s1, s8, v0
v_add_nc_u32_e32 v11, v8, v1
v_add3_u32 v1, v6, v2, s10
v_add_nc_u32_e32 v12, v9, v8
s_lshl_b32 s10, s8, 1
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s8, v6
s_and_b32 s12, s0, vcc_lo
s_and_saveexec_b32 s11, s12
s_cbranch_execz .LBB0_4
v_add_nc_u32_e32 v13, v10, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v14, 31, v13
v_lshlrev_b64 v[13:14], 2, v[13:14]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v13, vcc_lo, s4, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
global_load_b32 v2, v[13:14], off
s_waitcnt vmcnt(0)
ds_store_b32 v11, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s11
v_cmp_gt_i32_e32 vcc_lo, s8, v5
s_and_b32 s12, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s11, s12
s_cbranch_execz .LBB0_6
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[13:14], 2, v[1:2]
v_add_co_u32 v13, vcc_lo, s6, v13
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
global_load_b32 v2, v[13:14], off
s_waitcnt vmcnt(0)
ds_store_b32 v12, v2
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b64 v[13:14], v8
ds_load_2addr_b32 v[15:16], v9 offset1:2
v_cvt_f32_i32_e32 v2, s9
v_add_nc_u32_e32 v1, s10, v1
v_add_nc_u32_e32 v5, 2, v5
s_add_i32 s9, s9, 1
s_waitcnt lgkmcnt(0)
v_cmp_ngt_f32_e32 vcc_lo, v4, v2
s_barrier
buffer_gl0_inv
v_add_nc_u32_e32 v6, 2, v6
v_fmac_f32_e32 v7, v13, v15
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v7, v14, v16
s_cbranch_vccz .LBB0_2
.LBB0_7:
v_max_i32_e32 v1, v3, v0
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB0_9
v_mad_u64_u32 v[1:2], null, v3, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v7, off
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| TiledMatrixMulKernel | 1,552 | 1,795 | stackv2-00001-of-00015 |
// Demangled: YEAYPX_GPU(double*, double*, double, int, int)
Function : _Z10YEAYPX_GPUPdS_dii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x39c] &wr=0x2 ?trans1;
S2R R5, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R4, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R4, R4, UR5, R5 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R9, R4, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R2, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R2, R9, R2, R2 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R2, R2, R4 ?trans2;
IMAD R5, R9, UR6, R4 ?WAIT3_END_GROUP;
LEA R4, P0, R2, UR8, 0x3 &req={1} ?trans1;
IMAD.WIDE R6, R5, 0x8, R6 &req={3} ?WAIT3_END_GROUP;
LEA.HI.X R5, R2, UR9, R3, 0x3, P0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans2;
LDG.E.64 R6, desc[UR4][R6.64] &req={2} &wr=0x0 ?trans4;
LDG.E.64 R2, desc[UR4][R4.64+0x8] &wr=0x0 ?trans2;
DFMA R2, R2, UR8, R6 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64+0x8], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: YEAYPX_GPU(double*, double*, double, int, int)
_Z10YEAYPX_GPUPdS_dii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v0, v1
v_cmpx_gt_i32_e64 s3, v2
s_cbranch_execz .LBB2_2
v_mad_u64_u32 v[2:3], null, s2, v0, s[2:3]
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v5, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v6, 31, v2
v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
v_add_co_u32 v0, vcc_lo, v1, v2
v_add_co_ci_u32_e32 v1, vcc_lo, v5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 3, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b64 v[4:5], v[0:1], off offset:8
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_fma_f64 v[2:3], v[4:5], s[0:1], v[2:3]
global_store_b64 v[0:1], v[2:3], off offset:8
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| YEAYPX_GPU | 847 | 962 | stackv2-00001-of-00015 |
// Demangled: YPEAX_GPU(double*, double*, double, int)
Function : _Z9YPEAX_GPUPdS_di
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR4, URZ &req={2} ?trans1;
IMAD R7, R7, UR5, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE R2, R7, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R6, desc[UR4][R4.64] &wr=0x2 ?trans2;
DFMA R6, R2, UR6, R6 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: YPEAX_GPU(double*, double*, double, int)
_Z9YPEAX_GPUPdS_di:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_mul_i32 s3, s3, s3
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB1_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
global_load_b64 v[4:5], v[0:1], off
s_waitcnt vmcnt(0)
v_fma_f64 v[2:3], v[2:3], s[0:1], v[4:5]
global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| YPEAX_GPU | 579 | 547 | stackv2-00001-of-00015 |
// Demangled: laplacian_GPU(double*, double*, double, double, int, int)
Function : _Z13laplacian_GPUPdS_ddii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x3a4] &wr=0x2 ?trans1;
S2R R5, SR_TID.Y &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R4, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R4, R4, UR5, R5 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R7, R4, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD3 R8, PT, PT, R7.reuse, 0x2, RZ ?trans1;
LDC.64 R14, c[0x0][0x388] &wr=0x1 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD R2, R7, UR6, RZ &req={0} ?trans2;
IMAD R8, R8, UR6, RZ ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans2;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?WAIT3_END_GROUP;
IADD.64 R2, R2, R4 ?trans2;
IADD.64 R10, R4, R8 ?WAIT3_END_GROUP;
LEA R18, P0, R2, UR8, 0x3 &req={2} ?trans2;
LEA R20, P1, R10, UR8, 0x3 ?trans2;
IADD3 R9, PT, PT, R4, -UR6, R8 ?trans2;
LEA.HI.X R19, R2, UR9, R3, 0x3, P0 ?trans2;
LEA.HI.X R21, R10, UR9, R11, 0x3, P1 ?trans1;
IMAD.WIDE R14, R9, 0x8, R14 &req={1} ?trans2;
LDG.E.64 R8, desc[UR4][R18.64+0x8] &req={3} &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R20.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R14.64] &wr=0x3 ?trans4;
LDG.E.64 R2, desc[UR4][R14.64+0x10] &wr=0x4 ?trans4;
LDG.E.64 R10, desc[UR4][R14.64+0x8] &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x6f0 ?trans1;
DADD R8, R8, R12 &req={2} &rd=0x0 &wr=0x3 ?trans2;
LDC.64 R12, c[0x0][0x398] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R8, R16 &req={3} &rd=0x1 ?trans2;
LDC.64 R8, c[0x0][0x390] &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, R12 &req={0} &wr=0x0 ?trans2;
MUFU.RCP64H R13, R9 &req={0} &wr=0x0 ?trans1;
MOV R12, 0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, -R8, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, R18, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R18, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R8, R18, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R16, R2 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R18, R12, R18 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, -4, R2 &req={5} &wr=0x0 ?trans2;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R2, R10, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R8, R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, R14, R2 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R9, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x6e0 ?trans5;
MOV R0, 0x6c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x750 ?trans5;
MOV R2, R16 ?trans1;
MOV R3, R17 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x3a4] &wr=0x1 ?trans2;
IMAD R5, R7, UR6, R4 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x8, R8 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R11|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R6, R11, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xf40 ?trans1;
LOP3.LUT R17, R9.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R16, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R9, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R6, R17, PT ?trans1;
MOV R12, R10 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R13, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P2 MOV R20, RZ ?trans1;
MOV R2, R8 ?trans1;
MOV R23, R6 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R6, R13, PT ?trans1;
SEL R13, R16.reuse, 0x63400000, !P1 ?trans1;
MOV R22, R17 ?trans1;
MOV R14, 0x1 ?trans1;
@!P0 DMUL R2, R8, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
@!P2 SEL R21, R16, 0x63400000, !P3 ?trans1;
LOP3.LUT R13, R13, 0x800fffff, R11, 0xf8, !PT ?trans1;
MUFU.RCP64H R15, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R22, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R21, R21, 0x80000000, R11, 0xf8, !PT ?trans2;
IADD3 R24, PT, PT, R22, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R21, R21, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R12, R12, 2, -R20 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R23, R13, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R23, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R17, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R24, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R18, R18, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, R18, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R18, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R18, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R14, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R18, -R2, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R20, R18 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xdf0 &req={1,0} ?trans5;
LOP3.LUT R11, R9, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R6.reuse, -R11.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R6, R11, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R10, R10, -0x46a00000, !PT ?trans1;
SEL R11, R16, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R10, R10, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R11, R10, RZ ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R6, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R16, R14, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xf30 ?trans5;
DFMA R2, R14, -R2, R12 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R9, R3, 0x80000000, R9, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R9, R11, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0xf30 ?trans5;
IADD3 R3, PT, PT, -R6, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R10, R14, R10 &wr=0x0 ?trans2;
LOP3.LUT R9, R11, R9, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R16, -R2, R14 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R6, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R16, R10, R16, !P0 ?trans1;
FSEL R17, R9, R17, !P0 ?trans1;
BRA 0xf30 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0xf10 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0xee0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R23, R22, PT ?trans1;
MOV.64 R16, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0xf30 ?trans5;
ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ?trans1;
LOP3.LUT R17, R11, 0x80000000, R9, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R22, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R17, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R16, RZ ?trans1;
@P0 MOV R16, RZ ?WAIT3_END_GROUP;
@P0 MOV R17, R2 ?trans1;
BRA 0xf30 ?trans6;
LOP3.LUT R17, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R8 ?trans1;
BRA 0xf30 ?trans6;
LOP3.LUT R17, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R16, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R0 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0xf70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: laplacian_GPU(double*, double*, double, double, int, int)
_Z13laplacian_GPUPdS_ddii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[8:9], s[0:1], 0x20
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v0, v1
v_cmpx_gt_i32_e64 s9, v2
s_cbranch_execz .LBB0_2
v_mul_lo_u32 v2, v0, s8
s_load_b256 s[0:7], s[0:1], 0x0
v_ashrrev_i32_e32 v5, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshl_add_u32 v10, s8, 1, v2
v_ashrrev_i32_e32 v3, 31, v2
v_add_co_u32 v2, vcc_lo, v1, v2
v_ashrrev_i32_e32 v6, 31, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, v10, v1
v_add_co_ci_u32_e32 v5, vcc_lo, v6, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[2:3]
v_lshlrev_b64 v[4:5], 3, v[4:5]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
s_clause 0x1
global_load_b64 v[6:7], v[2:3], off offset:8
global_load_b64 v[8:9], v[4:5], off offset:8
v_subrev_nc_u32_e32 v2, s8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, v2, v1
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[2:3]
v_add_co_u32 v10, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, s3, v3, vcc_lo
s_clause 0x1
global_load_b128 v[2:5], v[10:11], off
global_load_b64 v[10:11], v[10:11], off offset:16
s_waitcnt vmcnt(2)
v_add_f64 v[6:7], v[6:7], v[8:9]
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[6:7], v[2:3]
v_mul_f64 v[6:7], s[4:5], s[6:7]
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[2:3], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], v[4:5], -4.0, v[2:3]
v_div_scale_f64 v[4:5], null, v[6:7], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[10:11], v[8:9]
v_fma_f64 v[4:5], -v[4:5], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[4:5], v[4:5], v[8:9], v[12:13]
v_div_fixup_f64 v[2:3], v[4:5], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v0, s9, v[1:2]
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[4:5]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| laplacian_GPU | 5,104 | 2,120 | stackv2-00001-of-00015 |
// Demangled: load()
Function : _Z4loadv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
NOP ?WAIT5_END_GROUP;
LDC.64 R2, c[0x4][RZ] &req={3,2} &wr=0x2 ?trans1;
MOV R19, RZ ?WAIT7_END_GROUP;
LDC.64 R4, c[0x4][0x8] &wr=0x3 ?trans8;
LDC.64 R6, c[0x4][0x10] &wr=0x4 ?trans8;
LDC.64 R8, c[0x4][0x18] &wr=0x5 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x5dc0, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R0, 0x5dc0, R4 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R0, 0x5dc0, R6 &req={4} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R0, 0x5dc0, R8 &req={5} ?WAIT7_END_GROUP;
IADD3 R18, PT, PT, R19.reuse, R0, RZ ?trans1;
IMAD.WIDE.U32 R12, R19, 0x4, R2 &req={2} ?WAIT3_END_GROUP;
IADD3 R20, PT, PT, R18.reuse, 0x1, RZ ?trans2;
I2FP.F32.U32 R21, R18 ?trans1;
IMAD.WIDE.U32 R10, R19.reuse, 0x4, R4 ?trans1;
IADD3 R22, PT, PT, R18.reuse, 0x2, RZ ?trans2;
I2FP.F32.U32 R23, R20 ?trans1;
IMAD.WIDE.U32 R16, R19.reuse, 0x4, R6 ?trans1;
STG.E desc[UR4][R12.64], R21 &req={1} ?trans1;
IADD3 R20, PT, PT, R18.reuse, 0x3, RZ ?trans2;
I2FP.F32.U32 R25, R22 ?trans1;
IMAD.WIDE.U32 R14, R19, 0x4, R8 ?trans1;
STG.E desc[UR4][R10.64], R21 &rd=0x1 ?trans1;
IADD3 R22, PT, PT, R18, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R19, PT, PT, R19, 0x10, RZ ?trans1;
STG.E desc[UR4][R16.64], RZ ?trans1;
I2FP.F32.U32 R27, R22 ?WAIT3_END_GROUP;
STG.E desc[UR4][R14.64], RZ ?trans1;
IADD3 R22, PT, PT, R18.reuse, 0x6, RZ ?trans1;
ISETP.NE.AND P0, PT, R19, 0x1770, PT ?trans2;
STG.E desc[UR4][R12.64+0x4], R23 ?trans1;
I2FP.F32.U32 R21, R20 &req={1} ?trans2;
IADD3 R20, PT, PT, R18, 0x5, RZ ?trans1;
STG.E desc[UR4][R10.64+0x4], R23 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x4], RZ ?trans4;
STG.E desc[UR4][R14.64+0x4], RZ ?trans4;
STG.E desc[UR4][R12.64+0x8], R25 ?trans1;
I2FP.F32.U32 R23, R20 &req={1} ?WAIT2_END_GROUP;
IADD3 R20, PT, PT, R18, 0x7, RZ ?trans1;
STG.E desc[UR4][R10.64+0x8], R25 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x8], RZ ?trans4;
STG.E desc[UR4][R14.64+0x8], RZ ?trans4;
STG.E desc[UR4][R12.64+0xc], R21 ?trans1;
I2FP.F32.U32 R25, R22 &req={1} ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R18, 0x8, RZ ?trans1;
STG.E desc[UR4][R10.64+0xc], R21 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0xc], RZ ?trans4;
STG.E desc[UR4][R14.64+0xc], RZ ?trans4;
STG.E desc[UR4][R12.64+0x10], R27 ?trans1;
I2FP.F32.U32 R21, R20 &req={1} ?WAIT2_END_GROUP;
IADD3 R20, PT, PT, R18, 0x9, RZ ?trans1;
STG.E desc[UR4][R10.64+0x10], R27 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x10], RZ ?trans4;
STG.E desc[UR4][R14.64+0x10], RZ ?trans4;
STG.E desc[UR4][R12.64+0x14], R23 ?trans1;
I2FP.F32.U32 R27, R22 &req={1} ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R18, 0xa, RZ ?trans1;
STG.E desc[UR4][R10.64+0x14], R23 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x14], RZ ?trans4;
STG.E desc[UR4][R14.64+0x14], RZ ?trans4;
STG.E desc[UR4][R12.64+0x18], R25 ?trans1;
I2FP.F32.U32 R23, R20 &req={1} ?WAIT2_END_GROUP;
IADD3 R20, PT, PT, R18, 0xb, RZ ?trans1;
STG.E desc[UR4][R10.64+0x18], R25 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x18], RZ ?trans4;
STG.E desc[UR4][R14.64+0x18], RZ ?trans4;
STG.E desc[UR4][R12.64+0x1c], R21 ?trans1;
I2FP.F32.U32 R25, R22 &req={1} ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R18, 0xc, RZ ?trans1;
STG.E desc[UR4][R10.64+0x1c], R21 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x1c], RZ ?trans4;
STG.E desc[UR4][R14.64+0x1c], RZ ?trans4;
STG.E desc[UR4][R12.64+0x20], R27 ?trans1;
I2FP.F32.U32 R21, R20 &req={1} ?WAIT2_END_GROUP;
IADD3 R20, PT, PT, R18, 0xd, RZ ?trans1;
STG.E desc[UR4][R10.64+0x20], R27 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x20], RZ ?trans4;
STG.E desc[UR4][R14.64+0x20], RZ ?trans4;
STG.E desc[UR4][R12.64+0x24], R23 ?trans1;
I2FP.F32.U32 R27, R22 &req={1} ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R18.reuse, 0xe, RZ ?trans1;
STG.E desc[UR4][R10.64+0x24], R23 &rd=0x1 ?trans1;
IADD3 R18, PT, PT, R18, 0xf, RZ ?WAIT3_END_GROUP;
STG.E desc[UR4][R16.64+0x24], RZ ?trans1;
I2FP.F32.U32 R29, R18 ?WAIT3_END_GROUP;
STG.E desc[UR4][R14.64+0x24], RZ ?trans4;
STG.E desc[UR4][R12.64+0x28], R25 ?trans1;
I2FP.F32.U32 R23, R20 &req={1} ?WAIT3_END_GROUP;
STG.E desc[UR4][R10.64+0x28], R25 &rd=0x1 ?trans4;
STG.E desc[UR4][R16.64+0x28], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R14.64+0x28], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x2c], R21 &rd=0x2 ?trans1;
I2FP.F32.U32 R25, R22 &req={1} ?WAIT3_END_GROUP;
STG.E desc[UR4][R10.64+0x2c], R21 &rd=0x2 ?trans4;
STG.E desc[UR4][R16.64+0x2c], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R14.64+0x2c], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x30], R27 &rd=0x2 ?trans4;
STG.E desc[UR4][R10.64+0x30], R27 &rd=0x2 ?trans4;
STG.E desc[UR4][R16.64+0x30], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R14.64+0x30], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x34], R23 &rd=0x2 ?trans4;
STG.E desc[UR4][R10.64+0x34], R23 &rd=0x2 ?trans4;
STG.E desc[UR4][R16.64+0x34], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R14.64+0x34], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x38], R25 &rd=0x2 ?trans4;
STG.E desc[UR4][R10.64+0x38], R25 &rd=0x2 ?trans4;
STG.E desc[UR4][R16.64+0x38], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R14.64+0x38], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x3c], R29 &rd=0x2 ?trans4;
STG.E desc[UR4][R10.64+0x3c], R29 &rd=0x2 ?trans4;
STG.E desc[UR4][R16.64+0x3c], RZ &rd=0x2 ?trans4;
STG.E desc[UR4][R14.64+0x3c], RZ &rd=0x2 ?trans1;
@P0 BRA 0xd0 ?trans5;
LDCU.64 UR6, c[0x4][0x20] &wr=0x1 ?trans1;
IMAD.SHL.U32 R2, R0.reuse, 0x4, RZ ?trans1;
SHF.R.U32.HI R3, RZ, 0x1e, R0 ?trans1;
LDCU.64 UR8, c[0x4][0x28] &wr=0x3 ?trans1;
I2FP.F32.U32 R7, R0 ?trans2;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x1770, PT ?trans1;
IADD.64 R4, R2.reuse, UR6 &req={1} ?trans2;
IADD.64 R2, R2, UR8 &req={3} ?WAIT4_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x3 ?trans4;
STG.E desc[UR4][R2.64], RZ &rd=0x3 ?trans2;
@P0 BRA 0x40 ?trans5;
EXIT ?trans5;
BRA 0x810;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: load()
_Z4loadv:
v_mov_b32_e32 v0, 0
s_mov_b32 s9, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_A@rel32@lo+4
s_addc_u32 s1, s1, d_A@rel32@hi+12
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, d_B@rel32@lo+4
s_addc_u32 s3, s3, d_B@rel32@hi+12
s_mov_b32 s8, s9
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, d_C@rel32@lo+4
s_addc_u32 s5, s5, d_C@rel32@hi+12
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, d_D@rel32@lo+4
s_addc_u32 s7, s7, d_D@rel32@hi+12
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b64 s[10:11], s[6:7]
s_mov_b64 s[12:13], s[4:5]
s_mov_b64 s[14:15], s[2:3]
s_mov_b64 s[16:17], s[0:1]
s_mov_b32 s18, s9
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s19, s8, s18
s_add_i32 s18, s18, 1
v_cvt_f32_i32_e32 v1, s19
s_clause 0x3
global_store_b32 v0, v1, s[16:17]
global_store_b32 v0, v1, s[14:15]
global_store_b32 v0, v0, s[12:13]
global_store_b32 v0, v0, s[10:11]
s_add_u32 s16, s16, 4
s_addc_u32 s17, s17, 0
s_add_u32 s14, s14, 4
s_addc_u32 s15, s15, 0
s_add_u32 s12, s12, 4
s_addc_u32 s13, s13, 0
s_add_u32 s10, s10, 4
s_addc_u32 s11, s11, 0
s_cmpk_eq_i32 s18, 0x1770
s_cbranch_scc0 .LBB0_2
s_getpc_b64 s[10:11]
s_add_u32 s10, s10, d_V@rel32@lo+4
s_addc_u32 s11, s11, d_V@rel32@hi+12
s_lshl_b64 s[12:13], s[8:9], 2
v_cvt_f32_i32_e32 v1, s8
s_add_u32 s10, s12, s10
s_addc_u32 s11, s13, s11
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, d_VET@rel32@lo+4
s_addc_u32 s15, s15, d_VET@rel32@hi+12
s_add_u32 s12, s12, s14
s_addc_u32 s13, s13, s15
s_add_i32 s8, s8, 1
s_add_u32 s0, s0, 0x5dc0
s_addc_u32 s1, s1, 0
s_add_u32 s2, s2, 0x5dc0
s_addc_u32 s3, s3, 0
s_add_u32 s4, s4, 0x5dc0
s_addc_u32 s5, s5, 0
s_add_u32 s6, s6, 0x5dc0
s_addc_u32 s7, s7, 0
s_cmpk_eq_i32 s8, 0x1770
s_clause 0x1
global_store_b32 v0, v1, s[10:11]
global_store_b32 v0, v0, s[12:13]
s_cbranch_scc0 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| load | 3,589 | 1,189 | stackv2-00001-of-00015 |
// Demangled: mulA_B()
Function : _Z6mulA_Bv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R13, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R13, R13, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, 0x176f, PT ?trans1;
IMAD R11, R11, UR4, R0 &req={2} ?WAIT5_END_GROUP;
ISETP.GT.OR P0, PT, R11, 0x176f, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x4][0x18] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R6, c[0x4][RZ] &wr=0x2 ?trans8;
LDC.64 R4, c[0x4][0x8] &wr=0x3 ?trans1;
IMAD.WIDE R2, R11, 0x5dc0, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R13, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R2.64] &req={1} &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R6, R11, 0x5dc0, R6 &req={2} ?WAIT4_END_GROUP;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R4, R13, 0x4, R4 &req={3} ?trans1;
IADD.64 R6, R6, 0x20 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x2ee00 &req={0} ?WAIT8_END_GROUP;
LDG.E R26, desc[UR4][R6.64+-0x20] &wr=0x2 ?trans4;
LDG.E R30, desc[UR4][R4.64+-0x2ee00] &wr=0x2 ?trans4;
LDG.E R31, desc[UR4][R6.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R32, desc[UR4][R4.64+-0x29040] &wr=0x3 ?trans4;
LDG.E R29, desc[UR4][R6.64+-0x18] &wr=0x4 ?trans4;
LDG.E R28, desc[UR4][R4.64+-0x23280] &wr=0x4 ?trans4;
LDG.E R8, desc[UR4][R6.64+-0x14] &wr=0x4 ?trans4;
LDG.E R11, desc[UR4][R4.64+-0x1d4c0] &wr=0x4 ?trans4;
LDG.E R10, desc[UR4][R6.64+-0x10] &wr=0x4 ?trans4;
LDG.E R13, desc[UR4][R4.64+-0x17700] &wr=0x4 ?trans4;
LDG.E R12, desc[UR4][R6.64+-0xc] &wr=0x4 ?trans4;
LDG.E R15, desc[UR4][R4.64+-0x11940] &wr=0x4 ?trans4;
LDG.E R14, desc[UR4][R6.64+-0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R4.64+-0xbb80] &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R6.64+-0x4] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R4.64+-0x5dc0] &wr=0x4 ?trans4;
LDG.E R18, desc[UR4][R6.64] &wr=0x4 ?trans4;
LDG.E R21, desc[UR4][R4.64] &wr=0x4 ?trans4;
LDG.E R20, desc[UR4][R6.64+0x4] &wr=0x4 ?trans4;
LDG.E R23, desc[UR4][R4.64+0x5dc0] &wr=0x4 ?trans4;
LDG.E R22, desc[UR4][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R25, desc[UR4][R4.64+0xbb80] &wr=0x4 ?trans4;
LDG.E R24, desc[UR4][R6.64+0xc] &wr=0x4 ?trans4;
LDG.E R27, desc[UR4][R4.64+0x11940] &wr=0x4 ?trans4;
LDG.E R33, desc[UR4][R4.64+0x23280] &wr=0x4 ?trans1;
FFMA R30, R26, R30, R9 &req={5,2} ?WAIT3_END_GROUP;
LDG.E R9, desc[UR4][R6.64+0x10] &wr=0x2 ?trans4;
LDG.E R26, desc[UR4][R4.64+0x17700] &wr=0x2 ?trans1;
FFMA R32, R31, R32, R30 &req={3} ?WAIT3_END_GROUP;
LDG.E R30, desc[UR4][R6.64+0x14] &wr=0x3 ?trans4;
LDG.E R31, desc[UR4][R4.64+0x1d4c0] &wr=0x3 ?trans1;
FFMA R35, R29, R28, R32 &req={4} ?WAIT3_END_GROUP;
LDG.E R32, desc[UR4][R6.64+0x18] &wr=0x4 ?trans4;
LDG.E R28, desc[UR4][R6.64+0x1c] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R29, desc[UR4][R4.64+0x29040] &rd=0x1 &wr=0x4 ?trans1;
FFMA R11, R8, R11, R35 ?WAIT4_END_GROUP;
FFMA R11, R10, R13, R11 ?WAIT4_END_GROUP;
FFMA R11, R12, R15, R11 ?WAIT4_END_GROUP;
FFMA R11, R14, R17, R11 ?WAIT4_END_GROUP;
FFMA R11, R16, R19, R11 ?WAIT4_END_GROUP;
FFMA R11, R18, R21, R11 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT3_END_GROUP;
FFMA R11, R20, R23, R11 ?trans2;
ISETP.NE.AND P0, PT, R0, 0x1770, PT ?trans2;
FFMA R11, R22, R25, R11 ?WAIT4_END_GROUP;
FFMA R24, R24, R27, R11 ?trans1;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
IADD.64 R4, R4, 0x5dc00 &req={1} ?trans2;
FFMA R9, R9, R26, R24 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R30, R31, R9 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R32, R33, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R9, R28, R29, R9 ?trans1;
@P0 BRA 0x180 ?trans6;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x4f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mulA_B()
_Z6mulA_Bv:
s_load_b32 s0, s[0:1], 0xc
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s1, s0, 16
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[4:5], null, s14, s0, v[1:2]
v_mad_u64_u32 v[0:1], null, s15, s1, v[2:3]
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v4, v0
v_cmpx_gt_i32_e32 0x1770, v1
s_cbranch_execz .LBB2_4
v_ashrrev_i32_e32 v1, 31, v0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_D@rel32@lo+4
s_addc_u32 s1, s1, d_D@rel32@hi+12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[0:1]
v_mad_i64_i32 v[0:1], null, 0x5dc0, v4, v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v0, s0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_A@rel32@lo+4
s_addc_u32 s1, s1, d_A@rel32@hi+12
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, d_B@rel32@lo+4
s_addc_u32 s3, s3, d_B@rel32@hi+12
v_mad_i64_i32 v[2:3], null, 0x5dc0, v4, s[0:1]
global_load_b32 v6, v[0:1], off
v_add_co_u32 v4, vcc_lo, v7, s2
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v8, vcc_lo
s_mov_b64 s[0:1], 0
.LBB2_2:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v7, vcc_lo, v2, s0
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v3, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
global_load_b32 v9, v[4:5], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v4, vcc_lo, 0x5dc0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_cmpk_lg_i32 s0, 0x5dc0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v7, v9
s_cbranch_scc1 .LBB2_2
global_store_b32 v[0:1], v6, off
.LBB2_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mulA_B | 2,304 | 1,039 | stackv2-00001-of-00015 |
// Demangled: mulA_ESCALAR()
Function : _Z12mulA_ESCALARv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R7, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R7, R7, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, 0x176f, PT ?trans1;
IMAD R3, R3, UR4, R0 &req={2} ?WAIT5_END_GROUP;
ISETP.GT.OR P0, PT, R3, 0x176f, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x4][RZ] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R4, R3, 0x5dc0, R4 &req={0} ?WAIT6_END_GROUP;
LDC.64 R2, c[0x4][0x30] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R4 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans2;
FMUL R7, R2, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mulA_ESCALAR()
_Z12mulA_ESCALARv:
s_load_b32 s0, s[0:1], 0xc
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s1, s0, 16
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s0, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s1, v[3:4]
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v2, v0, v1
v_cmpx_gt_i32_e32 0x1770, v2
s_cbranch_execz .LBB3_2
v_ashrrev_i32_e32 v2, 31, v1
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_A@rel32@lo+4
s_addc_u32 s1, s1, d_A@rel32@hi+12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_mad_i64_i32 v[3:4], null, 0x5dc0, v0, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v3, s0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, ESCALAR@rel32@lo+4
s_addc_u32 s1, s1, ESCALAR@rel32@hi+12
s_load_b32 s0, s[0:1], 0x0
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_mul_f32_e32 v2, s0, v2
global_store_b32 v[0:1], v2, off
.LBB3_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mulA_ESCALAR | 593 | 707 | stackv2-00001-of-00015 |
// Demangled: mulB_V()
Function : _Z6mulB_Vv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R7, 0x176f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x4][0x28] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x4][0x20] &wr=0x2 ?trans6;
LDC.64 R4, c[0x4][0x8] &wr=0x3 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R27, desc[UR6][R2.64] &req={1} &rd=0x0 &wr=0x5 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={2} ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE R4, R7, 0x5dc0, R4 &req={3} ?WAIT3_END_GROUP;
MOV.64 R6, UR4 ?trans2;
IADD.64 R4, R4, 0x20 ?WAIT8_END_GROUP;
LDG.E R26, desc[UR6][R4.64+-0x20] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R6.64+-0x20] &wr=0x2 ?trans4;
LDG.E R31, desc[UR6][R4.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R32, desc[UR6][R6.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R29, desc[UR6][R4.64+-0x18] &wr=0x4 ?trans4;
LDG.E R28, desc[UR6][R6.64+-0x18] &wr=0x4 ?trans4;
LDG.E R8, desc[UR6][R4.64+-0x14] &wr=0x4 ?trans4;
LDG.E R9, desc[UR6][R6.64+-0x14] &wr=0x4 ?trans4;
LDG.E R10, desc[UR6][R4.64+-0x10] &wr=0x4 ?trans4;
LDG.E R11, desc[UR6][R6.64+-0x10] &wr=0x4 ?trans4;
LDG.E R12, desc[UR6][R4.64+-0xc] &wr=0x4 ?trans4;
LDG.E R13, desc[UR6][R6.64+-0xc] &wr=0x4 ?trans4;
LDG.E R14, desc[UR6][R4.64+-0x8] &wr=0x4 ?trans4;
LDG.E R15, desc[UR6][R6.64+-0x8] &wr=0x4 ?trans4;
LDG.E R16, desc[UR6][R4.64+-0x4] &wr=0x4 ?trans4;
LDG.E R17, desc[UR6][R6.64+-0x4] &wr=0x4 ?trans4;
LDG.E R18, desc[UR6][R4.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR6][R6.64] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R21, desc[UR6][R6.64+0x4] &wr=0x4 ?trans4;
LDG.E R22, desc[UR6][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR6][R6.64+0x8] &wr=0x4 ?trans4;
LDG.E R24, desc[UR6][R4.64+0xc] &wr=0x4 ?trans4;
LDG.E R25, desc[UR6][R6.64+0xc] &wr=0x4 ?trans4;
LDG.E R33, desc[UR6][R6.64+0x18] &wr=0x4 ?trans1;
FFMA R30, R26, R30, R27 &req={5,2} ?WAIT3_END_GROUP;
LDG.E R26, desc[UR6][R4.64+0x10] &wr=0x2 ?trans4;
LDG.E R27, desc[UR6][R6.64+0x10] &wr=0x2 ?trans1;
FFMA R32, R31, R32, R30 &req={3} ?WAIT3_END_GROUP;
LDG.E R30, desc[UR6][R4.64+0x14] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R6.64+0x14] &wr=0x3 ?trans1;
FFMA R35, R29, R28, R32 &req={4} ?WAIT3_END_GROUP;
LDG.E R32, desc[UR6][R4.64+0x18] &wr=0x4 ?trans4;
LDG.E R28, desc[UR6][R4.64+0x1c] &rd=0x1 &wr=0x4 ?trans4;
LDG.E R29, desc[UR6][R6.64+0x1c] &rd=0x0 &wr=0x4 ?trans1;
FFMA R9, R8, R9, R35 ?WAIT4_END_GROUP;
FFMA R9, R10, R11, R9 ?WAIT4_END_GROUP;
FFMA R9, R12, R13, R9 ?WAIT4_END_GROUP;
FFMA R9, R14, R15, R9 ?WAIT4_END_GROUP;
FFMA R9, R16, R17, R9 ?WAIT4_END_GROUP;
FFMA R9, R18, R19, R9 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT3_END_GROUP;
FFMA R9, R20, R21, R9 ?trans2;
ISETP.NE.AND P0, PT, R0, 0x1770, PT ?trans2;
FFMA R9, R22, R23, R9 ?WAIT4_END_GROUP;
FFMA R9, R24, R25, R9 ?trans1;
IADD.64 R4, R4, 0x40 &req={1} ?trans2;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
FFMA R9, R26, R27, R9 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R30, R31, R9 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R32, R33, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R27, R28, R29, R9 ?trans1;
@P0 BRA 0x120 ?trans6;
STG.E desc[UR6][R2.64], R27 ?trans1;
EXIT ?trans5;
BRA 0x490;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mulB_V()
_Z6mulB_Vv:
s_load_b32 s0, s[0:1], 0xc
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, s15, s0, v[0:1]
s_mov_b32 s0, exec_lo
v_cmpx_gt_i32_e32 0x1770, v4
s_cbranch_execz .LBB4_4
v_ashrrev_i32_e32 v5, 31, v4
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_VET@rel32@lo+4
s_addc_u32 s1, s1, d_VET@rel32@hi+12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[4:5]
v_add_co_u32 v0, vcc_lo, v0, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_B@rel32@lo+4
s_addc_u32 s1, s1, d_B@rel32@hi+12
v_mad_i64_i32 v[2:3], null, 0x5dc0, v4, s[0:1]
global_load_b32 v5, v[0:1], off
s_mov_b64 s[0:1], 0
.LBB4_2:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v6, vcc_lo, v2, s0
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, d_V@rel32@lo+4
s_addc_u32 s3, s3, d_V@rel32@hi+12
s_add_u32 s2, s0, s2
s_addc_u32 s3, s1, s3
global_load_b32 v4, v[6:7], off
s_load_b32 s2, s[2:3], 0x0
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmpk_lg_i32 s0, 0x5dc0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v5, s2, v4
s_cbranch_scc1 .LBB4_2
global_store_b32 v[0:1], v5, off
.LBB4_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mulB_V | 2,089 | 824 | stackv2-00001-of-00015 |
// Demangled: sumA_B()
Function : _Z6sumA_Bv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R11, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R11, R11, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x176f, PT ?trans1;
IMAD R9, R9, UR4, R0 &req={2} ?WAIT5_END_GROUP;
ISETP.GT.OR P0, PT, R9, 0x176f, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x4][RZ] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x4][0x8] &wr=0x2 ?trans8;
LDC.64 R6, c[0x4][0x10] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x5dc0, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R11, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R9, 0x5dc0, R4 &req={2} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
IMAD.WIDE.U32 R4, R11, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R9, 0x5dc0, R6 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R11, 0x4, R6 ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sumA_B()
_Z6sumA_Bv:
s_load_b32 s0, s[0:1], 0xc
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s1, s0, 16
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s14, s0, v[1:2]
v_mad_u64_u32 v[0:1], null, s15, s1, v[4:5]
s_mov_b32 s0, exec_lo
v_max_i32_e32 v1, v2, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0x1770, v1
s_cbranch_execz .LBB1_2
v_ashrrev_i32_e32 v1, 31, v0
v_mad_i64_i32 v[3:4], null, 0x5dc0, v2, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_A@rel32@lo+4
s_addc_u32 s1, s1, d_A@rel32@hi+12
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, d_B@rel32@lo+4
s_addc_u32 s3, s3, d_B@rel32@hi+12
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, v3, v0
v_add_co_ci_u32_e32 v4, vcc_lo, v4, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v5, s0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v2, vcc_lo, v5, s2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, d_C@rel32@lo+4
s_addc_u32 s1, s1, d_C@rel32@hi+12
global_load_b32 v6, v[0:1], off
global_load_b32 v2, v[2:3], off
v_add_co_u32 v0, vcc_lo, v5, s0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v6, v2
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sumA_B | 743 | 877 | stackv2-00001-of-00015 |
// Demangled: vecadd(int*, int*, int*)
Function : _Z6vecaddPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R9, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R9.reuse, 0x4, R4 &req={2} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecadd(int*, int*, int*)
_Z6vecaddPiS_S_:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecadd | 425 | 192 | stackv2-00001-of-00015 |
// Demangled: gaussian_blur_kernel(unsigned char*, float*, unsigned char*, long, long, float, long, float)
Function : _Z20gaussian_blur_kernelPhPfS_llflf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC R8, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R9, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x4 ?trans5;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R6, R6, UR5, R7 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
IMAD R8, R8, UR4, R9 &req={2} ?trans2;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans2;
ISETP.GE.S64.AND P0, PT, R6, UR8, PT &req={3} ?WAIT6_END_GROUP;
ISETP.GE.S64.OR P0, PT, R8, UR6, P0 &req={4} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDCU UR12, c[0x0][0x3b4] &wr=0x1 ?trans1;
MOV R26, RZ ?trans1;
UMOV UR5, URZ ?trans1;
LDCU.64 UR22, c[0x0][0x358] &wr=0x2 ?trans1;
USHF.R.U32.HI UR4, URZ, 0x1f, UR12 &req={1} ?trans1;
ISETP.GE.S64.AND P0, PT, R4, 0x1, PT &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R4, UR4 ?WAIT5_END_GROUP;
SHF.R.S64 R14, R2, 0x1, R3.reuse ?trans2;
SHF.R.S32.HI R15, RZ, 0x1, R3 ?trans2;
@!P0 BRA 0x13d0 &req={2} ?trans5;
LDCU UR13, c[0x0][0x3b0] &wr=0x0 ?trans1;
IADD.64 R12, R6, -R14.reuse ?trans2;
IADD.64 R14, R8, -R14 ?trans2;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV R26, RZ ?trans1;
MOV R19, RZ ?trans1;
ULOP3.LUT UR11, UR12, 0x7fffffff, URZ, 0xc0, !UPT ?trans1;
UIADD3.64 UR8, UPT, UPT, UR8, -0x1, URZ ?trans1;
ULOP3.LUT UR4, UR13, 0x7, URZ, 0xc0, !UPT &req={0} ?trans1;
ULOP3.LUT UR5, UR13, 0x3, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR10, UR13, 0xfffffff8, URZ, 0xc0, !UPT ?trans1;
USHF.L.U64.HI UR12, UR13, 0x2, UR12 ?trans1;
USHF.L.U32 UR13, UR13, 0x2, URZ ?WAIT2_END_GROUP;
MOV R16, UR4 ?trans1;
MOV R18, UR5 ?trans1;
UMOV.64 UR4, URZ ?WAIT8_END_GROUP;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD.64 R22, R14, UR4 ?trans2;
UMOV.64 UR6, URZ ?trans1;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R23.reuse, RZ, PT ?trans1;
LDC.64 R20, c[0x0][0x3b0] &wr=0x1 ?trans1;
ISETP.GE.S64.AND P2, PT, R22, R2, PT &req={0} ?trans2;
ISETP.GE.U64.AND P3, PT, R20, 0x8, PT &req={1} ?WAIT12_END_GROUP;
@P2 IADD.64 R22, R2, -0x1 ?WAIT4_END_GROUP;
SEL.64 R22, R22, RZ, P1 ?trans2;
@!P3 BRA 0xa90 ?trans6;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
MOV.64 R10, R12 ?trans2;
UIMAD UR14, UR12, UR4, URZ ?trans1;
LDCU.64 UR20, c[0x0][0x398] &wr=0x1 ?trans3;
UIMAD UR14, UR5, UR13, UR14 ?trans1;
LDCU.64 UR18, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR16, c[0x0][0x398] &wr=0x3 ?trans1;
UIMAD.WIDE.U32 UR6, UR4, UR13, UR6 &req={0} ?WAIT4_END_GROUP;
UIADD3 UR7, UPT, UPT, UR7, UR14, URZ ?WAIT4_END_GROUP;
UIADD3.64 UR6, UPT, UPT, UR6, 0x10, URZ ?WAIT6_END_GROUP;
MOV.64 R24, UR6 ?trans2;
UMOV.64 UR6, URZ &req={3,2,1} ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P2, PT, R10.reuse, UR20, PT ?trans2;
ISETP.GE.AND P1, PT, R11.reuse, RZ, PT ?trans1;
IADD.64 R30, R10.reuse, 0x1 ?trans2;
LDG.E R34, desc[UR22][R24.64+-0xc] &wr=0x2 ?trans1;
SEL.64 R2, R10.reuse, UR8, !P2 ?trans2;
IADD.64 R36, R10, 0x3 ?trans2;
SEL.64 R4, R2, RZ, P1 ?WAIT2_END_GROUP;
IMAD R3, R23, UR16, RZ ?trans1;
IADD.64 R32, R10, 0x4 ?trans2;
LDG.E R35, desc[UR22][R24.64+0x4] &wr=0x3 ?trans1;
IMAD R3, R22.reuse, UR17, R3 ?trans2;
IMAD.WIDE.U32 R4, R22, UR16, R4 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R5, R3, RZ ?WAIT5_END_GROUP;
IADD.64 R28, R4, UR18 ?trans2;
LDG.E R5, desc[UR22][R24.64+-0x10] &wr=0x4 ?trans4;
LDG.E.U8 R27, desc[UR22][R28.64] &rd=0x0 &wr=0x5 ?trans1;
ISETP.GE.S64.AND P2, PT, R30, UR20, PT ?trans2;
ISETP.GE.AND P1, PT, R31, RZ, PT ?WAIT4_END_GROUP;
SEL.64 R30, R30, UR8, !P2 ?WAIT4_END_GROUP;
SEL.64 R30, R30, RZ, P1 ?WAIT6_END_GROUP;
IMAD.WIDE.U32 R30, R22, UR16, R30 ?WAIT5_END_GROUP;
IADD3 R31, PT, PT, R3, R31, RZ ?WAIT5_END_GROUP;
IADD.64 R30, R30, UR18 ?WAIT6_END_GROUP;
LDG.E.U8 R2, desc[UR22][R30.64] &rd=0x1 &wr=0x2 ?trans1;
IADD.64 R28, R10, 0x2 &req={0} ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P2, PT, R28, UR20, PT ?trans2;
ISETP.GE.AND P1, PT, R29, RZ, PT ?WAIT4_END_GROUP;
SEL.64 R28, R28, UR8, !P2 ?WAIT4_END_GROUP;
SEL.64 R28, R28, RZ, P1 ?WAIT6_END_GROUP;
IMAD.WIDE.U32 R28, R22, UR16, R28 ?trans1;
ISETP.GE.S64.AND P4, PT, R36, UR20, PT ?WAIT4_END_GROUP;
IADD3 R29, PT, PT, R3, R29, RZ ?trans1;
ISETP.GE.S64.AND P5, PT, R32, UR20, PT ?trans2;
IADD.64 R30, R10, 0x5 &req={1} ?trans2;
IADD.64 R28, R28, UR18 ?trans2;
ISETP.GE.AND P3, PT, R37.reuse, RZ, PT ?trans1;
SEL.64 R36, R36, UR8, !P4 ?trans2;
ISETP.GE.AND P1, PT, R33.reuse, RZ, PT ?trans1;
SEL.64 R32, R32, UR8, !P5 ?WAIT2_END_GROUP;
ISETP.GE.S64.AND P2, PT, R30, UR20, PT ?trans2;
LDG.E.U8 R0, desc[UR22][R28.64] &rd=0x0 &wr=0x3 ?trans1;
SEL.64 R36, R36, RZ, P3 ?trans2;
SEL.64 R32, R32, RZ, P1 ?trans2;
ISETP.GE.AND P1, PT, R31.reuse, RZ, PT ?trans1;
SEL.64 R30, R30, UR8, !P2 ?trans2;
IADD.64 R28, R10, 0x7 &req={0} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R36, R22, UR16, R36 ?trans1;
SEL.64 R30, R30, RZ, P1 ?WAIT3_END_GROUP;
ISETP.GE.S64.AND P6, PT, R28, UR20, PT ?trans2;
IMAD.WIDE.U32 R32, R22, UR16, R32 ?trans1;
ISETP.GE.AND P5, PT, R29, RZ, PT ?trans1;
IADD3 R37, PT, PT, R3, R37, RZ ?trans2;
SEL.64 R28, R28, UR8, !P6 ?trans2;
IMAD.WIDE.U32 R30, R22, UR16, R30 ?trans1;
IADD3 R33, PT, PT, R3, R33, RZ ?trans1;
SEL.64 R28, R28, RZ, P5 ?WAIT2_END_GROUP;
IADD.64 R36, R36, UR18 ?WAIT3_END_GROUP;
IADD3 R31, PT, PT, R3, R31, RZ ?trans1;
IADD.64 R32, R32, UR18 ?trans2;
IMAD.WIDE.U32 R28, R22, UR16, R28 ?trans1;
LDG.E.U8 R4, desc[UR22][R36.64] &rd=0x0 &wr=0x3 ?trans1;
IADD.64 R30, R30, UR18 ?WAIT3_END_GROUP;
LDG.E.U8 R32, desc[UR22][R32.64] &wr=0x3 ?trans1;
IADD3 R29, PT, PT, R3, R29, RZ ?WAIT3_END_GROUP;
LDG.E.U8 R30, desc[UR22][R30.64] &rd=0x1 &wr=0x3 ?trans2;
IADD.64 R28, R28, UR18 ?trans2;
LDG.E R36, desc[UR22][R24.64] &wr=0x3 ?trans4;
LDG.E R33, desc[UR22][R24.64+-0x4] &wr=0x3 ?trans4;
LDG.E.U8 R28, desc[UR22][R28.64] &wr=0x3 ?trans1;
I2F.U16 R27, R27 &req={5} &wr=0x4 ?trans2;
FFMA R5, R27, R5, R26 &req={4} ?trans1;
IADD.64 R26, R10, 0x6 ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P4, PT, R26, UR20, PT ?trans2;
ISETP.GE.AND P3, PT, R27, RZ, PT ?WAIT4_END_GROUP;
SEL.64 R26, R26, UR8, !P4 ?WAIT4_END_GROUP;
SEL.64 R26, R26, RZ, P3 ?WAIT6_END_GROUP;
IMAD.WIDE.U32 R26, R22, UR16, R26 ?WAIT5_END_GROUP;
IADD3 R27, PT, PT, R3, R27, RZ ?trans1;
I2F.U16 R2, R2 &req={2} &wr=0x0 ?trans1;
LDG.E R3, desc[UR22][R24.64+-0x8] &wr=0x2 ?trans3;
IADD.64 R26, R26, UR18 ?WAIT7_END_GROUP;
LDG.E.U8 R26, desc[UR22][R26.64] &wr=0x4 ?trans1;
FFMA R37, R2, R34, R5 &req={0} ?WAIT3_END_GROUP;
LDG.E R34, desc[UR22][R24.64+0x8] &wr=0x5 ?trans4;
LDG.E R5, desc[UR22][R24.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x8, URZ ?trans1;
I2F.U16 R0, R0 &req={3} &wr=0x2 ?trans3;
UIADD3.64 UR14, UPT, UPT, UR6, -UR10, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P1, PT, RZ, UR14, PT ?trans2;
I2F.U16 R31, R4 &req={1} &wr=0x1 ?trans1;
I2F.U16 R32, R32 &wr=0x3 ?trans1;
I2F.U16 R30, R30 &wr=0x1 ?trans1;
IADD.64 R24, R24, 0x20 &req={0} ?trans2;
IADD.64 R10, R10, 0x8 ?trans2;
FFMA R2, R0, R3, R37 &req={2} ?trans2;
I2F.U16 R3, R28 ?trans2;
FFMA R31, R31, R33, R2 &req={1} ?trans1;
I2F.U16 R26, R26 &req={4} &wr=0x5 ?trans3;
FFMA R31, R32, R36, R31 &req={3} ?WAIT4_END_GROUP;
FFMA R31, R30, R35, R31 ?WAIT4_END_GROUP;
FFMA R34, R26, R34, R31 &req={5} ?WAIT4_END_GROUP;
FFMA R26, R3, R5, R34 ?trans1;
@P1 BRA 0x420 ?trans6;
@!P0 BRA 0x13a0 ?trans5;
IADD.64 R2, R16, -0x1 ?trans2;
ISETP.NE.S64.AND P0, PT, R18, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P1, PT, R2, 0x3, PT ?WAIT14_END_GROUP;
@!P1 BRA 0xf00 ?trans5;
LDCU.64 UR14, c[0x0][0x398] &wr=0x0 ?trans1;
IADD.64 R4, R12, UR6 ?trans2;
LDCU.64 UR16, c[0x0][0x398] &wr=0x1 ?trans2;
IADD.64 R10, R4.reuse, 0x1 ?trans2;
IADD.64 R24, R4.reuse, 0x2 ?trans2;
IADD.64 R2, R4.reuse, 0x3 ?trans2;
ISETP.GE.AND P1, PT, R5, RZ, PT ?trans1;
LDCU.64 UR20, c[0x0][0x3b0] &wr=0x2 ?trans1;
ISETP.GE.AND P2, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P5, PT, R25, RZ, PT ?trans1;
LDCU.64 UR24, c[0x0][0x380] &wr=0x3 ?trans1;
ISETP.GE.S64.AND P4, PT, R4, UR14, PT &req={0} ?WAIT2_END_GROUP;
ISETP.GE.S64.AND P3, PT, R10, UR14, PT ?trans2;
ISETP.GE.S64.AND P6, PT, R24, UR14, PT ?trans2;
SEL.64 R4, R4, UR8, !P4 ?trans2;
ISETP.GE.S64.AND P4, PT, R2, UR14, PT ?trans2;
SEL.64 R4, R4, RZ, P1 ?trans2;
SEL.64 R10, R10, UR8, !P3 ?WAIT2_END_GROUP;
IMAD R27, R23, UR16, RZ &req={1} ?trans1;
ISETP.GE.AND P1, PT, R3, RZ, PT ?trans1;
SEL.64 R24, R24, UR8, !P6 ?trans2;
SEL.64 R10, R10, RZ, P2 ?trans2;
SEL.64 R28, R2, UR8, !P4 ?trans2;
LDCU.64 UR18, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R0, R22, UR17, R27 ?trans1;
SEL.64 R24, R24, RZ, P5 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R4, R22, UR16, R4 ?trans1;
SEL.64 R28, R28, RZ, P1 ?trans2;
UIMAD.WIDE.U32 UR14, UR4, UR20, UR6 &req={2} ?trans1;
IMAD.WIDE.U32 R30, R22, UR16, R10 ?trans1;
IADD3 R11, PT, PT, R0, R5, RZ ?trans1;
MOV R10, R4 ?trans2;
IMAD.WIDE.U32 R2, R22, UR16, R24 ?trans1;
IADD3 R5, PT, PT, R0, R31, RZ ?trans1;
MOV R4, R30 ?trans1;
IADD.64 R10, R10, UR24 &req={3} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R28, R22, UR16, R28 ?trans1;
UIMAD UR16, UR5, UR20, URZ ?trans1;
IADD3 R3, PT, PT, R0, R3, RZ ?trans1;
IADD.64 R4, R4, UR24 ?trans2;
UIMAD UR16, UR4, UR21, UR16 ?trans1;
LDG.E.U8 R10, desc[UR22][R10.64] &wr=0x2 ?trans1;
ULEA UR17, UP0, UR14, UR18, 0x2 &req={0} ?trans1;
IADD3 R29, PT, PT, R0, R29, RZ ?trans1;
UIADD3 UR15, UPT, UPT, UR15, UR16, URZ ?trans1;
IADD.64 R24, R2, UR24 ?WAIT2_END_GROUP;
LDG.E.U8 R4, desc[UR22][R4.64] &wr=0x3 ?trans1;
ULEA.HI.X UR15, UR14, UR19, UR15, 0x2, UP0 ?trans1;
IADD.64 R28, R28, UR24 ?WAIT3_END_GROUP;
LDG.E.U8 R24, desc[UR22][R24.64] &wr=0x4 ?trans1;
MOV R2, UR17 ?trans1;
MOV R3, UR15 ?trans2;
LDG.E.U8 R28, desc[UR22][R28.64] &wr=0x5 ?trans4;
LDG.E R0, desc[UR22][R2.64] &wr=0x5 ?trans4;
LDG.E R27, desc[UR22][R2.64+0x4] &wr=0x5 ?trans4;
LDG.E R30, desc[UR22][R2.64+0x8] &wr=0x5 ?trans4;
LDG.E R32, desc[UR22][R2.64+0xc] &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x4, URZ ?trans1;
I2F.U16 R11, R10 &req={2} &wr=0x5 ?trans1;
I2F.U16 R5, R4 &req={3} &wr=0x0 ?trans1;
I2F.U16 R31, R24 &req={4} &wr=0x1 ?trans1;
FFMA R0, R11, R0, R26 &req={5} ?trans1;
I2F.U16 R25, R28 &wr=0x2 ?trans3;
FFMA R0, R5, R27, R0 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R31, R30, R0 &req={1} ?WAIT4_END_GROUP;
FFMA R26, R25, R32, R0 &req={2} ?WAIT7_END_GROUP;
@!P0 BRA 0x13a0 ?trans5;
LDC R11, c[0x0][0x3b0] &wr=0x0 ?trans1;
ISETP.NE.S64.AND P0, PT, R18, 0x1, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, RZ, R11, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT11_END_GROUP;
@!P0 BRA 0x11d0 ?trans5;
LDCU.64 UR14, c[0x0][0x398] &wr=0x0 ?trans1;
IADD.64 R2, R12, UR6 ?trans2;
LDCU.64 UR18, c[0x0][0x398] &wr=0x1 ?trans2;
IADD.64 R4, R2.reuse, 0x1 ?trans2;
ISETP.GE.AND P0, PT, R3.reuse, RZ, PT ?trans1;
LDCU.64 UR16, c[0x0][0x3b0] &wr=0x2 ?trans1;
LDCU.64 UR24, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR20, c[0x0][0x388] &wr=0x4 ?trans1;
ISETP.GE.S64.AND P2, PT, R2, UR14, PT &req={0} ?WAIT2_END_GROUP;
ISETP.GE.S64.AND P3, PT, R4, UR14, PT ?trans2;
IMAD R25, R23, UR18, RZ &req={1} ?trans2;
SEL.64 R2, R2, UR8, !P2 ?trans2;
ISETP.GE.AND P2, PT, R5.reuse, RZ, PT ?trans1;
SEL.64 R4, R4, UR8, !P3 ?trans2;
SEL.64 R2, R2, RZ, P0 ?trans2;
SEL.64 R4, R4, RZ, P2 ?WAIT2_END_GROUP;
IMAD R25, R22.reuse, UR19, R25 ?trans1;
UIMAD.WIDE.U32 UR14, UR4, UR16, UR6 &req={2} ?trans1;
IMAD.WIDE.U32 R2, R22, UR18, R2 ?WAIT3_END_GROUP;
ULEA UR20, UP0, UR14, UR20, 0x2 &req={4} ?trans1;
IMAD.WIDE.U32 R4, R22, UR18, R4 ?trans1;
IADD3 R3, PT, PT, R25, R3, RZ ?trans1;
UIMAD UR18, UR5, UR16, URZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R25, R5, RZ ?trans1;
IADD.64 R2, R2, UR24 &req={3} ?trans2;
UIMAD UR17, UR4, UR17, UR18 ?trans2;
IADD.64 R24, R4, UR24 ?trans2;
UIADD3 UR17, UPT, UPT, UR15, UR17, URZ ?trans1;
LDG.E.U8 R2, desc[UR22][R2.64] &wr=0x2 ?trans3;
ULEA.HI.X UR17, UR14, UR21, UR17, 0x2, UP0 ?trans1;
LDG.E.U8 R24, desc[UR22][R24.64] &wr=0x3 ?trans1;
MOV R4, UR20 ?WAIT4_END_GROUP;
MOV R5, UR17 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR22][R4.64] &wr=0x4 ?trans4;
LDG.E R10, desc[UR22][R4.64+0x4] &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x2, URZ ?trans1;
I2F.U16 R27, R2 &req={2} &wr=0x4 ?trans1;
I2F.U16 R29, R24 &req={3} &wr=0x5 ?trans1;
FFMA R0, R27, R0, R26 &req={4} ?WAIT4_END_GROUP;
FFMA R26, R29, R10, R0 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x13a0 ?trans5;
LDCU.64 UR14, c[0x0][0x398] &wr=0x0 ?trans1;
MOV.64 R4, UR6 ?trans2;
MOV.64 R2, UR6 ?trans2;
LDC R0, c[0x0][0x3b4] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x2 ?trans1;
MOV R3, R5 ?WAIT5_END_GROUP;
IADD.64 R4, R12, R2 ?trans2;
IMAD.WIDE.U32 R2, R11, UR4, R2 ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R5.reuse, RZ, PT ?trans1;
ISETP.GE.S64.AND P1, PT, R4, UR14, PT &req={0} ?trans2;
LDCU.64 UR14, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R23, R23, UR6, RZ &req={2} ?WAIT3_END_GROUP;
SEL.64 R4, R4, UR8, !P1 ?trans2;
IMAD R23, R22, UR7, R23 ?trans2;
SEL.64 R24, R4, RZ, P0 ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R24, R22, UR6, R24 ?WAIT5_END_GROUP;
IADD3 R25, PT, PT, R23, R25, RZ ?WAIT5_END_GROUP;
IADD.64 R22, R24, UR14 &req={0} ?trans2;
IMAD R25, R11, UR5, RZ ?WAIT4_END_GROUP;
IMAD R25, R0, UR4, R25 &req={1} ?trans1;
LDG.E.U8 R22, desc[UR22][R22.64] &wr=0x3 ?trans4;
IADD3 R0, PT, PT, R25, R3, RZ ?trans2;
LEA R4, P0, R2, R4, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, R5, R0, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR22][R4.64] &wr=0x2 ?trans1;
I2F.U16 R3, R22 &req={3} &wr=0x2 ?trans2;
FFMA R26, R3, R4, R26 &req={2} ?WAIT7_END_GROUP;
UIADD3.64 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P0, PT, R20, UR4, PT ?WAIT14_END_GROUP;
@P0 BRA 0x2b0 ?trans5;
LDC R2, c[0x0][0x3b8] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x14b0 ?trans1;
MUFU.RCP R3, R2 &req={0} &wr=0x0 ?trans1;
FCHK P0, R26, R2 &wr=0x1 ?trans1;
FFMA R0, R3, -R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R3, R0, R3 ?WAIT4_END_GROUP;
FFMA R5, R3, R26, RZ ?WAIT4_END_GROUP;
FFMA R0, R5, -R2, R26 ?WAIT4_END_GROUP;
FFMA R0, R3, R0, R5 ?trans1;
@!P0 BRA 0x14a0 &req={1} ?trans6;
MOV R2, 0x1490 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1550 ?trans5;
MOV R0, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x398] &wr=0x0 ?trans1;
MOV R2, R6 ?trans1;
MOV R3, R7 ?trans1;
F2I.U32.TRUNC.NTZ R5, R0 &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R2, R8, UR6, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R3, R8, UR7, R3 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR4 &req={2} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR22][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
LDC R3, c[0x0][0x3b8] &wr=0x0 ?trans1;
SHF.R.U32.HI R0, RZ, 0x17, R26 ?trans1;
LDCU UR4, c[0x0][0x3b8] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x1bc0 ?trans2;
LOP3.LUT R12, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R12, -0x1, RZ ?trans1;
MOV R5, UR4 &req={1} ?trans1;
SHF.R.U32.HI R4, RZ, 0x17, R3 &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R4, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x17a0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R26|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1ba0 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, R26, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1b80 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R26|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R26|, +INF , PT ?WAIT12_END_GROUP;
@!P0 BRA !P1, 0x1b80 ?trans5;
LOP3.LUT P1, RZ, R26, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1b60 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P2, P0, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1b30 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R26, R26, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R5, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R4, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1b20 ?trans1;
IADD3 R3, PT, PT, R12, -0x7f, RZ ?trans2;
IADD3 R5, PT, PT, -R0, R5, RZ ?WAIT3_END_GROUP;
IMAD R0, R3.reuse, -0x800000, R26 ?trans1;
IADD3 R3, PT, PT, R3, 0x7f, -R4 ?trans1;
MUFU.RCP R11, R5 &wr=0x0 ?trans1;
FADD.FTZ R13, -R5, -RZ ?trans2;
IADD3 R3, PT, PT, R3, R10, RZ ?trans2;
FFMA R12, R11, R13, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R14, R11, R12, R11 ?WAIT4_END_GROUP;
FFMA R11, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R12, R13, R11, R0 ?WAIT4_END_GROUP;
FFMA R15, R14, R12, R11 ?WAIT4_END_GROUP;
FFMA R12, R13, R15, R0 ?WAIT4_END_GROUP;
FFMA R11, R14, R12, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R11 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1b00 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1ad0 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1b10 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1b10 ?trans5;
FFMA.RZ R0, R14, R12.reuse, R15.reuse ?trans1;
IADD3 R5, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R3, R14, R12.reuse, R15.reuse ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R10, PT, PT, -R10, RZ, RZ ?trans2;
LOP3.LUT R4, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R12, R15 ?WAIT3_END_GROUP;
SHF.L.U32 R5, R4, R5, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R10, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R5, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R4 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R5, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R5, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R5, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R11, R0, R11, RZ, 0xfc, !PT ?trans1;
BRA 0x1b10 ?trans6;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1b10 ?trans6;
IMAD R11, R3, 0x800000, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1bb0 ?trans5;
LOP3.LUT R5, R5, 0x80000000, R26, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1bb0 ?trans6;
LOP3.LUT R11, R5, 0x80000000, R26, 0x48, !PT ?trans1;
BRA 0x1bb0 ?trans6;
MUFU.RSQ R11, -QNAN &wr=0x0 ?trans1;
BRA 0x1bb0 ?trans5;
FADD.FTZ R11, R26, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x1be0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gaussian_blur_kernel(unsigned char*, float*, unsigned char*, long, long, float, long, float)
_Z20gaussian_blur_kernelPhPfS_llflf:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x4c
s_load_b64 s[2:3], s[0:1], 0x20
v_bfe_u32 v3, v0, 10, 10
s_add_u32 s4, s0, 64
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s6, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s6, v[3:4]
s_mov_b32 s6, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i64_e64 s[2:3], v[1:2]
s_cbranch_execz .LBB1_9
s_load_b32 s12, s[4:5], 0xc
s_load_b256 s[4:11], s[0:1], 0x0
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s12, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s14, s12, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_cmp_gt_i64_e32 vcc_lo, s[10:11], v[3:4]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_9
s_load_b64 s[12:13], s[0:1], 0x30
s_waitcnt lgkmcnt(0)
v_cmp_lt_i64_e64 s14, s[12:13], 1
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s14
s_cbranch_vccnz .LBB1_7
s_lshr_b32 s14, s13, 31
v_mov_b32_e32 v0, 0
s_add_u32 s14, s12, s14
s_addc_u32 s15, s13, 0
s_mov_b64 s[16:17], 0
s_ashr_i64 s[14:15], s[14:15], 1
s_add_u32 s22, s2, -1
v_sub_co_u32 v7, vcc_lo, v1, s14
v_subrev_co_ci_u32_e32 v8, vcc_lo, s15, v2, vcc_lo
v_sub_co_u32 v9, vcc_lo, v3, s14
v_subrev_co_ci_u32_e32 v10, vcc_lo, s15, v4, vcc_lo
s_addc_u32 s23, s3, -1
s_add_u32 s24, s10, -1
s_addc_u32 s25, s11, -1
s_lshl_b64 s[14:15], s[12:13], 2
.LBB1_4:
v_add_co_u32 v5, vcc_lo, s16, v7
v_add_co_ci_u32_e32 v6, vcc_lo, s17, v8, vcc_lo
s_mov_b64 s[18:19], s[6:7]
s_mov_b64 s[20:21], 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[5:6]
v_cndmask_b32_e32 v11, s22, v5, vcc_lo
v_cndmask_b32_e32 v12, s23, v6, vcc_lo
v_cmp_lt_i64_e32 vcc_lo, -1, v[5:6]
v_cndmask_b32_e32 v5, 0, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v11, 0, v11, vcc_lo
v_mul_lo_u32 v12, v5, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v13, v11, s11
v_mad_u64_u32 v[5:6], null, v11, s10, s[4:5]
v_add3_u32 v6, v12, v6, v13
.LBB1_5:
v_add_co_u32 v11, vcc_lo, v9, s20
v_add_co_ci_u32_e32 v12, vcc_lo, s21, v10, vcc_lo
s_load_b32 s26, s[18:19], 0x0
s_add_u32 s20, s20, 1
s_addc_u32 s21, s21, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i64_e32 vcc_lo, s[10:11], v[11:12]
s_add_u32 s18, s18, 4
s_addc_u32 s19, s19, 0
s_cmp_eq_u64 s[12:13], s[20:21]
v_cndmask_b32_e32 v13, s24, v11, vcc_lo
v_cndmask_b32_e32 v14, s25, v12, vcc_lo
v_cmp_lt_i64_e32 vcc_lo, -1, v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v12, 0, v14 :: v_dual_cndmask_b32 v11, 0, v13
v_add_co_u32 v11, vcc_lo, v5, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v12, vcc_lo, v6, v12, vcc_lo
global_load_u8 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_cvt_f32_ubyte0_e32 v11, v11
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v0, s26, v11
s_cbranch_scc0 .LBB1_5
s_add_u32 s16, s16, 1
s_addc_u32 s17, s17, 0
s_add_u32 s6, s6, s14
s_addc_u32 s7, s7, s15
s_cmp_eq_u64 s[16:17], s[12:13]
s_cbranch_scc0 .LBB1_4
s_branch .LBB1_8
.LBB1_7:
v_mov_b32_e32 v0, 0
.LBB1_8:
s_load_b32 s0, s[0:1], 0x38
v_mul_lo_u32 v2, v2, s10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v5, null, s0, s0, v0
v_div_scale_f32 v8, vcc_lo, v0, s0, v0
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v5, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_mul_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v5, v7, v8
v_fmac_f32_e32 v7, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v5, -v5, v7, v8
v_mul_lo_u32 v8, v1, s11
v_div_fmas_f32 v7, v5, v6, v7
v_mad_u64_u32 v[5:6], null, v1, s10, s[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f32 v0, v7, s0, v0
v_add3_u32 v1, v2, v6, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cvt_i32_f32_e32 v2, v0
v_add_co_u32 v0, vcc_lo, v5, v3
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v4, vcc_lo
global_store_b8 v[0:1], v2, off
.LBB1_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gaussian_blur_kernel | 11,197 | 2,687 | stackv2-00001-of-00015 |
// Demangled: gaussian_blur_kernel_old(unsigned char*, float*, unsigned char*, long, long, float, long, float)
Function : _Z24gaussian_blur_kernel_oldPhPfS_llflf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
LDC R8, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R9, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x4 ?trans5;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R6, R6, UR5, R7 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
IMAD R8, R8, UR4, R9 &req={2} ?trans2;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans2;
ISETP.GE.S64.AND P0, PT, R6, UR8, PT &req={3} ?WAIT6_END_GROUP;
ISETP.GE.S64.OR P0, PT, R8, UR6, P0 &req={4} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDCU UR12, c[0x0][0x3b4] &wr=0x1 ?trans1;
MOV R26, RZ ?trans1;
UMOV UR5, URZ ?trans1;
LDCU.64 UR22, c[0x0][0x358] &wr=0x2 ?trans1;
USHF.R.U32.HI UR4, URZ, 0x1f, UR12 &req={1} ?trans1;
ISETP.GE.S64.AND P0, PT, R4, 0x1, PT &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R4, UR4 ?WAIT5_END_GROUP;
SHF.R.S64 R14, R2, 0x1, R3.reuse ?trans2;
SHF.R.S32.HI R15, RZ, 0x1, R3 ?trans2;
@!P0 BRA 0x13d0 &req={2} ?trans5;
LDCU UR13, c[0x0][0x3b0] &wr=0x0 ?trans1;
IADD.64 R12, R6, -R14.reuse ?trans2;
IADD.64 R14, R8, -R14 ?trans2;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV R26, RZ ?trans1;
MOV R19, RZ ?trans1;
ULOP3.LUT UR11, UR12, 0x7fffffff, URZ, 0xc0, !UPT ?trans1;
UIADD3.64 UR8, UPT, UPT, UR8, -0x1, URZ ?trans1;
ULOP3.LUT UR4, UR13, 0x7, URZ, 0xc0, !UPT &req={0} ?trans1;
ULOP3.LUT UR5, UR13, 0x3, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR10, UR13, 0xfffffff8, URZ, 0xc0, !UPT ?trans1;
USHF.L.U64.HI UR12, UR13, 0x2, UR12 ?trans1;
USHF.L.U32 UR13, UR13, 0x2, URZ ?WAIT2_END_GROUP;
MOV R16, UR4 ?trans1;
MOV R18, UR5 ?trans1;
UMOV.64 UR4, URZ ?WAIT8_END_GROUP;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
IADD.64 R22, R14, UR4 ?trans2;
UMOV.64 UR6, URZ ?trans1;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R23.reuse, RZ, PT ?trans1;
LDC.64 R20, c[0x0][0x3b0] &wr=0x1 ?trans1;
ISETP.GE.S64.AND P2, PT, R22, R2, PT &req={0} ?trans2;
ISETP.GE.U64.AND P3, PT, R20, 0x8, PT &req={1} ?WAIT12_END_GROUP;
@P2 IADD.64 R22, R2, -0x1 ?WAIT4_END_GROUP;
SEL.64 R22, R22, RZ, P1 ?trans2;
@!P3 BRA 0xa90 ?trans6;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
MOV.64 R10, R12 ?trans2;
UIMAD UR14, UR12, UR4, URZ ?trans1;
LDCU.64 UR20, c[0x0][0x398] &wr=0x1 ?trans3;
UIMAD UR14, UR5, UR13, UR14 ?trans1;
LDCU.64 UR18, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR16, c[0x0][0x398] &wr=0x3 ?trans1;
UIMAD.WIDE.U32 UR6, UR4, UR13, UR6 &req={0} ?WAIT4_END_GROUP;
UIADD3 UR7, UPT, UPT, UR7, UR14, URZ ?WAIT4_END_GROUP;
UIADD3.64 UR6, UPT, UPT, UR6, 0x10, URZ ?WAIT6_END_GROUP;
MOV.64 R24, UR6 ?trans2;
UMOV.64 UR6, URZ &req={3,2,1} ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P2, PT, R10.reuse, UR20, PT ?trans2;
ISETP.GE.AND P1, PT, R11.reuse, RZ, PT ?trans1;
IADD.64 R30, R10.reuse, 0x1 ?trans2;
LDG.E R34, desc[UR22][R24.64+-0xc] &wr=0x2 ?trans1;
SEL.64 R2, R10.reuse, UR8, !P2 ?trans2;
IADD.64 R36, R10, 0x3 ?trans2;
SEL.64 R4, R2, RZ, P1 ?WAIT2_END_GROUP;
IMAD R3, R23, UR16, RZ ?trans1;
IADD.64 R32, R10, 0x4 ?trans2;
LDG.E R35, desc[UR22][R24.64+0x4] &wr=0x3 ?trans1;
IMAD R3, R22.reuse, UR17, R3 ?trans2;
IMAD.WIDE.U32 R4, R22, UR16, R4 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R5, R3, RZ ?WAIT5_END_GROUP;
IADD.64 R28, R4, UR18 ?trans2;
LDG.E R5, desc[UR22][R24.64+-0x10] &wr=0x4 ?trans4;
LDG.E.U8 R27, desc[UR22][R28.64] &rd=0x0 &wr=0x5 ?trans1;
ISETP.GE.S64.AND P2, PT, R30, UR20, PT ?trans2;
ISETP.GE.AND P1, PT, R31, RZ, PT ?WAIT4_END_GROUP;
SEL.64 R30, R30, UR8, !P2 ?WAIT4_END_GROUP;
SEL.64 R30, R30, RZ, P1 ?WAIT6_END_GROUP;
IMAD.WIDE.U32 R30, R22, UR16, R30 ?WAIT5_END_GROUP;
IADD3 R31, PT, PT, R3, R31, RZ ?WAIT5_END_GROUP;
IADD.64 R30, R30, UR18 ?WAIT6_END_GROUP;
LDG.E.U8 R2, desc[UR22][R30.64] &rd=0x1 &wr=0x2 ?trans1;
IADD.64 R28, R10, 0x2 &req={0} ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P2, PT, R28, UR20, PT ?trans2;
ISETP.GE.AND P1, PT, R29, RZ, PT ?WAIT4_END_GROUP;
SEL.64 R28, R28, UR8, !P2 ?WAIT4_END_GROUP;
SEL.64 R28, R28, RZ, P1 ?WAIT6_END_GROUP;
IMAD.WIDE.U32 R28, R22, UR16, R28 ?trans1;
ISETP.GE.S64.AND P4, PT, R36, UR20, PT ?WAIT4_END_GROUP;
IADD3 R29, PT, PT, R3, R29, RZ ?trans1;
ISETP.GE.S64.AND P5, PT, R32, UR20, PT ?trans2;
IADD.64 R30, R10, 0x5 &req={1} ?trans2;
IADD.64 R28, R28, UR18 ?trans2;
ISETP.GE.AND P3, PT, R37.reuse, RZ, PT ?trans1;
SEL.64 R36, R36, UR8, !P4 ?trans2;
ISETP.GE.AND P1, PT, R33.reuse, RZ, PT ?trans1;
SEL.64 R32, R32, UR8, !P5 ?WAIT2_END_GROUP;
ISETP.GE.S64.AND P2, PT, R30, UR20, PT ?trans2;
LDG.E.U8 R0, desc[UR22][R28.64] &rd=0x0 &wr=0x3 ?trans1;
SEL.64 R36, R36, RZ, P3 ?trans2;
SEL.64 R32, R32, RZ, P1 ?trans2;
ISETP.GE.AND P1, PT, R31.reuse, RZ, PT ?trans1;
SEL.64 R30, R30, UR8, !P2 ?trans2;
IADD.64 R28, R10, 0x7 &req={0} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R36, R22, UR16, R36 ?trans1;
SEL.64 R30, R30, RZ, P1 ?WAIT3_END_GROUP;
ISETP.GE.S64.AND P6, PT, R28, UR20, PT ?trans2;
IMAD.WIDE.U32 R32, R22, UR16, R32 ?trans1;
ISETP.GE.AND P5, PT, R29, RZ, PT ?trans1;
IADD3 R37, PT, PT, R3, R37, RZ ?trans2;
SEL.64 R28, R28, UR8, !P6 ?trans2;
IMAD.WIDE.U32 R30, R22, UR16, R30 ?trans1;
IADD3 R33, PT, PT, R3, R33, RZ ?trans1;
SEL.64 R28, R28, RZ, P5 ?WAIT2_END_GROUP;
IADD.64 R36, R36, UR18 ?WAIT3_END_GROUP;
IADD3 R31, PT, PT, R3, R31, RZ ?trans1;
IADD.64 R32, R32, UR18 ?trans2;
IMAD.WIDE.U32 R28, R22, UR16, R28 ?trans1;
LDG.E.U8 R4, desc[UR22][R36.64] &rd=0x0 &wr=0x3 ?trans1;
IADD.64 R30, R30, UR18 ?WAIT3_END_GROUP;
LDG.E.U8 R32, desc[UR22][R32.64] &wr=0x3 ?trans1;
IADD3 R29, PT, PT, R3, R29, RZ ?WAIT3_END_GROUP;
LDG.E.U8 R30, desc[UR22][R30.64] &rd=0x1 &wr=0x3 ?trans2;
IADD.64 R28, R28, UR18 ?trans2;
LDG.E R36, desc[UR22][R24.64] &wr=0x3 ?trans4;
LDG.E R33, desc[UR22][R24.64+-0x4] &wr=0x3 ?trans4;
LDG.E.U8 R28, desc[UR22][R28.64] &wr=0x3 ?trans1;
I2F.U16 R27, R27 &req={5} &wr=0x4 ?trans2;
FFMA R5, R27, R5, R26 &req={4} ?trans1;
IADD.64 R26, R10, 0x6 ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P4, PT, R26, UR20, PT ?trans2;
ISETP.GE.AND P3, PT, R27, RZ, PT ?WAIT4_END_GROUP;
SEL.64 R26, R26, UR8, !P4 ?WAIT4_END_GROUP;
SEL.64 R26, R26, RZ, P3 ?WAIT6_END_GROUP;
IMAD.WIDE.U32 R26, R22, UR16, R26 ?WAIT5_END_GROUP;
IADD3 R27, PT, PT, R3, R27, RZ ?trans1;
I2F.U16 R2, R2 &req={2} &wr=0x0 ?trans1;
LDG.E R3, desc[UR22][R24.64+-0x8] &wr=0x2 ?trans3;
IADD.64 R26, R26, UR18 ?WAIT7_END_GROUP;
LDG.E.U8 R26, desc[UR22][R26.64] &wr=0x4 ?trans1;
FFMA R37, R2, R34, R5 &req={0} ?WAIT3_END_GROUP;
LDG.E R34, desc[UR22][R24.64+0x8] &wr=0x5 ?trans4;
LDG.E R5, desc[UR22][R24.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x8, URZ ?trans1;
I2F.U16 R0, R0 &req={3} &wr=0x2 ?trans3;
UIADD3.64 UR14, UPT, UPT, UR6, -UR10, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P1, PT, RZ, UR14, PT ?trans2;
I2F.U16 R31, R4 &req={1} &wr=0x1 ?trans1;
I2F.U16 R32, R32 &wr=0x3 ?trans1;
I2F.U16 R30, R30 &wr=0x1 ?trans1;
IADD.64 R24, R24, 0x20 &req={0} ?trans2;
IADD.64 R10, R10, 0x8 ?trans2;
FFMA R2, R0, R3, R37 &req={2} ?trans2;
I2F.U16 R3, R28 ?trans2;
FFMA R31, R31, R33, R2 &req={1} ?trans1;
I2F.U16 R26, R26 &req={4} &wr=0x5 ?trans3;
FFMA R31, R32, R36, R31 &req={3} ?WAIT4_END_GROUP;
FFMA R31, R30, R35, R31 ?WAIT4_END_GROUP;
FFMA R34, R26, R34, R31 &req={5} ?WAIT4_END_GROUP;
FFMA R26, R3, R5, R34 ?trans1;
@P1 BRA 0x420 ?trans6;
@!P0 BRA 0x13a0 ?trans5;
IADD.64 R2, R16, -0x1 ?trans2;
ISETP.NE.S64.AND P0, PT, R18, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P1, PT, R2, 0x3, PT ?WAIT14_END_GROUP;
@!P1 BRA 0xf00 ?trans5;
LDCU.64 UR14, c[0x0][0x398] &wr=0x0 ?trans1;
IADD.64 R4, R12, UR6 ?trans2;
LDCU.64 UR16, c[0x0][0x398] &wr=0x1 ?trans2;
IADD.64 R10, R4.reuse, 0x1 ?trans2;
IADD.64 R24, R4.reuse, 0x2 ?trans2;
IADD.64 R2, R4.reuse, 0x3 ?trans2;
ISETP.GE.AND P1, PT, R5, RZ, PT ?trans1;
LDCU.64 UR20, c[0x0][0x3b0] &wr=0x2 ?trans1;
ISETP.GE.AND P2, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P5, PT, R25, RZ, PT ?trans1;
LDCU.64 UR24, c[0x0][0x380] &wr=0x3 ?trans1;
ISETP.GE.S64.AND P4, PT, R4, UR14, PT &req={0} ?WAIT2_END_GROUP;
ISETP.GE.S64.AND P3, PT, R10, UR14, PT ?trans2;
ISETP.GE.S64.AND P6, PT, R24, UR14, PT ?trans2;
SEL.64 R4, R4, UR8, !P4 ?trans2;
ISETP.GE.S64.AND P4, PT, R2, UR14, PT ?trans2;
SEL.64 R4, R4, RZ, P1 ?trans2;
SEL.64 R10, R10, UR8, !P3 ?WAIT2_END_GROUP;
IMAD R27, R23, UR16, RZ &req={1} ?trans1;
ISETP.GE.AND P1, PT, R3, RZ, PT ?trans1;
SEL.64 R24, R24, UR8, !P6 ?trans2;
SEL.64 R10, R10, RZ, P2 ?trans2;
SEL.64 R28, R2, UR8, !P4 ?trans2;
LDCU.64 UR18, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R0, R22, UR17, R27 ?trans1;
SEL.64 R24, R24, RZ, P5 ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R4, R22, UR16, R4 ?trans1;
SEL.64 R28, R28, RZ, P1 ?trans2;
UIMAD.WIDE.U32 UR14, UR4, UR20, UR6 &req={2} ?trans1;
IMAD.WIDE.U32 R30, R22, UR16, R10 ?trans1;
IADD3 R11, PT, PT, R0, R5, RZ ?trans1;
MOV R10, R4 ?trans2;
IMAD.WIDE.U32 R2, R22, UR16, R24 ?trans1;
IADD3 R5, PT, PT, R0, R31, RZ ?trans1;
MOV R4, R30 ?trans1;
IADD.64 R10, R10, UR24 &req={3} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R28, R22, UR16, R28 ?trans1;
UIMAD UR16, UR5, UR20, URZ ?trans1;
IADD3 R3, PT, PT, R0, R3, RZ ?trans1;
IADD.64 R4, R4, UR24 ?trans2;
UIMAD UR16, UR4, UR21, UR16 ?trans1;
LDG.E.U8 R10, desc[UR22][R10.64] &wr=0x2 ?trans1;
ULEA UR17, UP0, UR14, UR18, 0x2 &req={0} ?trans1;
IADD3 R29, PT, PT, R0, R29, RZ ?trans1;
UIADD3 UR15, UPT, UPT, UR15, UR16, URZ ?trans1;
IADD.64 R24, R2, UR24 ?WAIT2_END_GROUP;
LDG.E.U8 R4, desc[UR22][R4.64] &wr=0x3 ?trans1;
ULEA.HI.X UR15, UR14, UR19, UR15, 0x2, UP0 ?trans1;
IADD.64 R28, R28, UR24 ?WAIT3_END_GROUP;
LDG.E.U8 R24, desc[UR22][R24.64] &wr=0x4 ?trans1;
MOV R2, UR17 ?trans1;
MOV R3, UR15 ?trans2;
LDG.E.U8 R28, desc[UR22][R28.64] &wr=0x5 ?trans4;
LDG.E R0, desc[UR22][R2.64] &wr=0x5 ?trans4;
LDG.E R27, desc[UR22][R2.64+0x4] &wr=0x5 ?trans4;
LDG.E R30, desc[UR22][R2.64+0x8] &wr=0x5 ?trans4;
LDG.E R32, desc[UR22][R2.64+0xc] &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x4, URZ ?trans1;
I2F.U16 R11, R10 &req={2} &wr=0x5 ?trans1;
I2F.U16 R5, R4 &req={3} &wr=0x0 ?trans1;
I2F.U16 R31, R24 &req={4} &wr=0x1 ?trans1;
FFMA R0, R11, R0, R26 &req={5} ?trans1;
I2F.U16 R25, R28 &wr=0x2 ?trans3;
FFMA R0, R5, R27, R0 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R31, R30, R0 &req={1} ?WAIT4_END_GROUP;
FFMA R26, R25, R32, R0 &req={2} ?WAIT7_END_GROUP;
@!P0 BRA 0x13a0 ?trans5;
LDC R11, c[0x0][0x3b0] &wr=0x0 ?trans1;
ISETP.NE.S64.AND P0, PT, R18, 0x1, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, RZ, R11, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT11_END_GROUP;
@!P0 BRA 0x11d0 ?trans5;
LDCU.64 UR14, c[0x0][0x398] &wr=0x0 ?trans1;
IADD.64 R2, R12, UR6 ?trans2;
LDCU.64 UR18, c[0x0][0x398] &wr=0x1 ?trans2;
IADD.64 R4, R2.reuse, 0x1 ?trans2;
ISETP.GE.AND P0, PT, R3.reuse, RZ, PT ?trans1;
LDCU.64 UR16, c[0x0][0x3b0] &wr=0x2 ?trans1;
LDCU.64 UR24, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR20, c[0x0][0x388] &wr=0x4 ?trans1;
ISETP.GE.S64.AND P2, PT, R2, UR14, PT &req={0} ?WAIT2_END_GROUP;
ISETP.GE.S64.AND P3, PT, R4, UR14, PT ?trans2;
IMAD R25, R23, UR18, RZ &req={1} ?trans2;
SEL.64 R2, R2, UR8, !P2 ?trans2;
ISETP.GE.AND P2, PT, R5.reuse, RZ, PT ?trans1;
SEL.64 R4, R4, UR8, !P3 ?trans2;
SEL.64 R2, R2, RZ, P0 ?trans2;
SEL.64 R4, R4, RZ, P2 ?WAIT2_END_GROUP;
IMAD R25, R22.reuse, UR19, R25 ?trans1;
UIMAD.WIDE.U32 UR14, UR4, UR16, UR6 &req={2} ?trans1;
IMAD.WIDE.U32 R2, R22, UR18, R2 ?WAIT3_END_GROUP;
ULEA UR20, UP0, UR14, UR20, 0x2 &req={4} ?trans1;
IMAD.WIDE.U32 R4, R22, UR18, R4 ?trans1;
IADD3 R3, PT, PT, R25, R3, RZ ?trans1;
UIMAD UR18, UR5, UR16, URZ ?WAIT3_END_GROUP;
IADD3 R5, PT, PT, R25, R5, RZ ?trans1;
IADD.64 R2, R2, UR24 &req={3} ?trans2;
UIMAD UR17, UR4, UR17, UR18 ?trans2;
IADD.64 R24, R4, UR24 ?trans2;
UIADD3 UR17, UPT, UPT, UR15, UR17, URZ ?trans1;
LDG.E.U8 R2, desc[UR22][R2.64] &wr=0x2 ?trans3;
ULEA.HI.X UR17, UR14, UR21, UR17, 0x2, UP0 ?trans1;
LDG.E.U8 R24, desc[UR22][R24.64] &wr=0x3 ?trans1;
MOV R4, UR20 ?WAIT4_END_GROUP;
MOV R5, UR17 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR22][R4.64] &wr=0x4 ?trans4;
LDG.E R10, desc[UR22][R4.64+0x4] &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x2, URZ ?trans1;
I2F.U16 R27, R2 &req={2} &wr=0x4 ?trans1;
I2F.U16 R29, R24 &req={3} &wr=0x5 ?trans1;
FFMA R0, R27, R0, R26 &req={4} ?WAIT4_END_GROUP;
FFMA R26, R29, R10, R0 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x13a0 ?trans5;
LDCU.64 UR14, c[0x0][0x398] &wr=0x0 ?trans1;
MOV.64 R4, UR6 ?trans2;
MOV.64 R2, UR6 ?trans2;
LDC R0, c[0x0][0x3b4] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x2 ?trans1;
MOV R3, R5 ?WAIT5_END_GROUP;
IADD.64 R4, R12, R2 ?trans2;
IMAD.WIDE.U32 R2, R11, UR4, R2 ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R5.reuse, RZ, PT ?trans1;
ISETP.GE.S64.AND P1, PT, R4, UR14, PT &req={0} ?trans2;
LDCU.64 UR14, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R23, R23, UR6, RZ &req={2} ?WAIT3_END_GROUP;
SEL.64 R4, R4, UR8, !P1 ?trans2;
IMAD R23, R22, UR7, R23 ?trans2;
SEL.64 R24, R4, RZ, P0 ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R24, R22, UR6, R24 ?WAIT5_END_GROUP;
IADD3 R25, PT, PT, R23, R25, RZ ?WAIT5_END_GROUP;
IADD.64 R22, R24, UR14 &req={0} ?trans2;
IMAD R25, R11, UR5, RZ ?WAIT4_END_GROUP;
IMAD R25, R0, UR4, R25 &req={1} ?trans1;
LDG.E.U8 R22, desc[UR22][R22.64] &wr=0x3 ?trans4;
IADD3 R0, PT, PT, R25, R3, RZ ?trans2;
LEA R4, P0, R2, R4, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, R5, R0, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR22][R4.64] &wr=0x2 ?trans1;
I2F.U16 R3, R22 &req={3} &wr=0x2 ?trans2;
FFMA R26, R3, R4, R26 &req={2} ?WAIT7_END_GROUP;
UIADD3.64 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P0, PT, R20, UR4, PT ?WAIT14_END_GROUP;
@P0 BRA 0x2b0 ?trans5;
LDC R2, c[0x0][0x3b8] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x14b0 ?trans1;
MUFU.RCP R3, R2 &req={0} &wr=0x0 ?trans1;
FCHK P0, R26, R2 &wr=0x1 ?trans1;
FFMA R0, R3, -R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R3, R0, R3 ?WAIT4_END_GROUP;
FFMA R5, R3, R26, RZ ?WAIT4_END_GROUP;
FFMA R0, R5, -R2, R26 ?WAIT4_END_GROUP;
FFMA R0, R3, R0, R5 ?trans1;
@!P0 BRA 0x14a0 &req={1} ?trans6;
MOV R2, 0x1490 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1550 ?trans5;
MOV R0, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x398] &wr=0x0 ?trans1;
MOV R2, R6 ?trans1;
MOV R3, R7 ?trans1;
F2I.U32.TRUNC.NTZ R5, R0 &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x2 ?trans2;
IMAD.WIDE.U32 R2, R8, UR6, R2 &req={0} ?WAIT4_END_GROUP;
IMAD R3, R8, UR7, R3 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR4 &req={2} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR22][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
LDC R3, c[0x0][0x3b8] &wr=0x0 ?trans1;
SHF.R.U32.HI R0, RZ, 0x17, R26 ?trans1;
LDCU UR4, c[0x0][0x3b8] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x1bc0 ?trans2;
LOP3.LUT R12, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R12, -0x1, RZ ?trans1;
MOV R5, UR4 &req={1} ?trans1;
SHF.R.U32.HI R4, RZ, 0x17, R3 &req={0} ?WAIT4_END_GROUP;
LOP3.LUT R4, R4, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R4, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R10, RZ ?trans1;
@!P0 BRA 0x17a0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R26|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1ba0 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, R26, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1b80 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R26|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R26|, +INF , PT ?WAIT12_END_GROUP;
@!P0 BRA !P1, 0x1b80 ?trans5;
LOP3.LUT P1, RZ, R26, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1b60 ?trans5;
LOP3.LUT P0, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P2, P0, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1b30 ?trans5;
ISETP.GE.AND P0, PT, R11, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R10, RZ ?trans1;
@!P0 MOV R10, 0xffffffc0 ?trans1;
@!P0 FFMA R26, R26, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R5, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, R10, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R4, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1b20 ?trans1;
IADD3 R3, PT, PT, R12, -0x7f, RZ ?trans2;
IADD3 R5, PT, PT, -R0, R5, RZ ?WAIT3_END_GROUP;
IMAD R0, R3.reuse, -0x800000, R26 ?trans1;
IADD3 R3, PT, PT, R3, 0x7f, -R4 ?trans1;
MUFU.RCP R11, R5 &wr=0x0 ?trans1;
FADD.FTZ R13, -R5, -RZ ?trans2;
IADD3 R3, PT, PT, R3, R10, RZ ?trans2;
FFMA R12, R11, R13, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R14, R11, R12, R11 ?WAIT4_END_GROUP;
FFMA R11, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R12, R13, R11, R0 ?WAIT4_END_GROUP;
FFMA R15, R14, R12, R11 ?WAIT4_END_GROUP;
FFMA R12, R13, R15, R0 ?WAIT4_END_GROUP;
FFMA R11, R14, R12, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R11 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1b00 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1ad0 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1b10 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1b10 ?trans5;
FFMA.RZ R0, R14, R12.reuse, R15.reuse ?trans1;
IADD3 R5, PT, PT, R10, 0x20, RZ ?trans1;
FFMA.RM R3, R14, R12.reuse, R15.reuse ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R10, PT, PT, -R10, RZ, RZ ?trans2;
LOP3.LUT R4, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R12, R15 ?WAIT3_END_GROUP;
SHF.L.U32 R5, R4, R5, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R10, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R5, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R4 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R5, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R5, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R5, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R11, R0, R11, RZ, 0xfc, !PT ?trans1;
BRA 0x1b10 ?trans6;
LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1b10 ?trans6;
IMAD R11, R3, 0x800000, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1bb0 ?trans5;
LOP3.LUT R5, R5, 0x80000000, R26, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R5, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1bb0 ?trans6;
LOP3.LUT R11, R5, 0x80000000, R26, 0x48, !PT ?trans1;
BRA 0x1bb0 ?trans6;
MUFU.RSQ R11, -QNAN &wr=0x0 ?trans1;
BRA 0x1bb0 ?trans5;
FADD.FTZ R11, R26, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x1be0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gaussian_blur_kernel_old(unsigned char*, float*, unsigned char*, long, long, float, long, float)
_Z24gaussian_blur_kernel_oldPhPfS_llflf:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x4c
s_load_b64 s[2:3], s[0:1], 0x20
v_bfe_u32 v3, v0, 10, 10
s_add_u32 s4, s0, 64
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s6, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s6, v[3:4]
s_mov_b32 s6, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i64_e64 s[2:3], v[1:2]
s_cbranch_execz .LBB0_9
s_load_b32 s12, s[4:5], 0xc
s_load_b256 s[4:11], s[0:1], 0x0
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s12, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s14, s12, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_cmp_gt_i64_e32 vcc_lo, s[10:11], v[3:4]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_9
s_load_b64 s[12:13], s[0:1], 0x30
s_waitcnt lgkmcnt(0)
v_cmp_lt_i64_e64 s14, s[12:13], 1
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 vcc_lo, exec_lo, s14
s_cbranch_vccnz .LBB0_7
s_lshr_b32 s14, s13, 31
v_mov_b32_e32 v0, 0
s_add_u32 s14, s12, s14
s_addc_u32 s15, s13, 0
s_mov_b64 s[16:17], 0
s_ashr_i64 s[14:15], s[14:15], 1
s_add_u32 s22, s2, -1
v_sub_co_u32 v7, vcc_lo, v3, s14
v_subrev_co_ci_u32_e32 v8, vcc_lo, s15, v4, vcc_lo
v_sub_co_u32 v9, vcc_lo, v1, s14
v_subrev_co_ci_u32_e32 v10, vcc_lo, s15, v2, vcc_lo
s_addc_u32 s23, s3, -1
s_add_u32 s24, s10, -1
s_addc_u32 s25, s11, -1
s_lshl_b64 s[14:15], s[12:13], 2
.LBB0_4:
v_add_co_u32 v5, vcc_lo, s16, v9
v_add_co_ci_u32_e32 v6, vcc_lo, s17, v10, vcc_lo
s_mov_b64 s[18:19], s[6:7]
s_mov_b64 s[20:21], 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[5:6]
v_cndmask_b32_e32 v11, s22, v5, vcc_lo
v_cndmask_b32_e32 v12, s23, v6, vcc_lo
v_cmp_lt_i64_e32 vcc_lo, -1, v[5:6]
v_cndmask_b32_e32 v5, 0, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v11, 0, v11, vcc_lo
v_mul_lo_u32 v12, v5, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v13, v11, s11
v_mad_u64_u32 v[5:6], null, v11, s10, s[4:5]
v_add3_u32 v6, v12, v6, v13
.LBB0_5:
v_add_co_u32 v11, vcc_lo, v7, s20
v_add_co_ci_u32_e32 v12, vcc_lo, s21, v8, vcc_lo
s_load_b32 s26, s[18:19], 0x0
s_add_u32 s20, s20, 1
s_addc_u32 s21, s21, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i64_e32 vcc_lo, s[10:11], v[11:12]
s_add_u32 s18, s18, 4
s_addc_u32 s19, s19, 0
s_cmp_eq_u64 s[12:13], s[20:21]
v_cndmask_b32_e32 v13, s24, v11, vcc_lo
v_cndmask_b32_e32 v14, s25, v12, vcc_lo
v_cmp_lt_i64_e32 vcc_lo, -1, v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v12, 0, v14 :: v_dual_cndmask_b32 v11, 0, v13
v_add_co_u32 v11, vcc_lo, v5, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v12, vcc_lo, v6, v12, vcc_lo
global_load_u8 v11, v[11:12], off
s_waitcnt vmcnt(0)
v_cvt_f32_ubyte0_e32 v11, v11
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v0, s26, v11
s_cbranch_scc0 .LBB0_5
s_add_u32 s16, s16, 1
s_addc_u32 s17, s17, 0
s_add_u32 s6, s6, s14
s_addc_u32 s7, s7, s15
s_cmp_eq_u64 s[16:17], s[12:13]
s_cbranch_scc0 .LBB0_4
s_branch .LBB0_8
.LBB0_7:
v_mov_b32_e32 v0, 0
.LBB0_8:
s_load_b32 s0, s[0:1], 0x38
v_mul_lo_u32 v2, v2, s10
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v5, null, s0, s0, v0
v_div_scale_f32 v8, vcc_lo, v0, s0, v0
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v5, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_mul_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v5, v7, v8
v_fmac_f32_e32 v7, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f32 v5, -v5, v7, v8
v_mul_lo_u32 v8, v1, s11
v_div_fmas_f32 v7, v5, v6, v7
v_mad_u64_u32 v[5:6], null, v1, s10, s[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f32 v0, v7, s0, v0
v_add3_u32 v1, v2, v6, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cvt_i32_f32_e32 v2, v0
v_add_co_u32 v0, vcc_lo, v5, v3
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, v1, v4, vcc_lo
global_store_b8 v[0:1], v2, off
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gaussian_blur_kernel_old | 11,198 | 2,688 | stackv2-00001-of-00015 |
// Demangled: boxFilterKernel(int*, int*)
Function : _Z15boxFilterKernelPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC R7, c[0x0][0x364] &wr=0x2 ?trans1;
S2R R0, SR_TID.Y &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R2, R2, UR5, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
IMAD R7, R7, UR4, R0 &req={2} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
ISETP.EQ.OR P0, PT, R7, RZ, !P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R7, 0x1ff, P0 ?WAIT5_END_GROUP;
ISETP.EQ.OR P0, PT, R2, 0x1ff, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x380 &req={1,0} ?trans5;
IMAD.SHL.U32 R4, R7, 0x200, RZ ?trans1;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans2;
IADD3 R6, PT, PT, R4.reuse, -0x200, RZ ?trans2;
IADD3 R8, PT, PT, R4, 0x200, RZ ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans2;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R2.reuse, R6, RZ ?trans2;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
IADD.64 R16, R2, R4 ?trans2;
IADD.64 R6, R6, R2 ?trans2;
IADD.64 R8, R2, R8 ?WAIT3_END_GROUP;
LEA R10, P0, R6, UR6, 0x2 &req={1} ?trans2;
LEA R12, P1, R16, UR6, 0x2 ?trans2;
LEA.HI.X R11, R6, UR7, R7, 0x2, P0 ?trans1;
IMAD.WIDE R6, R13, 0x4, R14 &req={0} ?trans1;
LEA.HI.X R13, R16, UR7, R17, 0x2, P1 ?trans2;
LEA R14, P0, R8.reuse, UR6, 0x2 ?trans1;
LDG.E R10, desc[UR4][R10.64+-0x4] &wr=0x2 ?trans4;
LDG.E R3, desc[UR4][R6.64] &wr=0x2 ?trans1;
LEA.HI.X R15, R8, UR7, R9, 0x2, P0 ?WAIT2_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDG.E R0, desc[UR4][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R12.64+-0x4] &wr=0x3 ?trans4;
LDG.E R5, desc[UR4][R6.64+0x800] &wr=0x3 ?trans4;
LDG.E R14, desc[UR4][R14.64+-0x4] &wr=0x4 ?trans4;
LDG.E R17, desc[UR4][R6.64+0x804] &wr=0x4 ?trans4;
LDG.E R19, desc[UR4][R6.64+0x1000] &wr=0x5 ?trans4;
LDG.E R16, desc[UR4][R6.64+0x1004] &wr=0x5 ?trans1;
IADD3 R0, PT, PT, R0, R3, R10 &req={2} ?WAIT2_END_GROUP;
IADD3 R3, PT, PT, R2, R4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R8 &req={0} ?trans1;
IADD3 R0, PT, PT, R5, R13, R0 &req={3} ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R14, R17, R0 &req={4} ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R16, R19, R0 &req={5} ?WAIT5_END_GROUP;
IMAD.HI R0, R0, 0x38e38e39, RZ ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1, R0 ?WAIT4_END_GROUP;
LEA.HI R5, R0, R5, RZ, 0x1 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R3, R7, 0x200, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x3d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: boxFilterKernel(int*, int*)
_Z15boxFilterKernelPiS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
v_bfe_u32 v2, v0, 10, 10
v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s2, 16
s_and_b32 s1, s2, 0xffff
s_mul_i32 s15, s15, s0
s_mul_i32 s14, s14, s1
v_add_nc_u32_e32 v0, s15, v2
v_add_nc_u32_e32 v1, s14, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, 0, v0
v_cmp_ne_u32_e64 s0, 0, v1
v_cmp_ne_u32_e64 s1, 0x1ff, v0
v_cmp_ne_u32_e64 s2, 0x1ff, v1
s_delay_alu instid0(VALU_DEP_3)
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
s_and_b32 s0, s1, s0
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s0
s_and_saveexec_b32 s0, s2
s_cbranch_execz .LBB0_6
s_lshl_b32 s2, s15, 9
v_lshlrev_b32_e32 v2, 9, v2
v_add3_u32 v3, s14, s2, v3
s_delay_alu instid0(VALU_DEP_1)
v_add3_u32 v3, v3, v2, 0xfffffdff
v_mov_b32_e32 v2, 0
.LBB0_2:
s_mov_b32 s2, 0
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v4, s2, v3
s_add_i32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s2, 3
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v4, v2
s_cbranch_scc1 .LBB0_3
v_add_nc_u32_e32 v3, 0x200, v3
s_add_i32 s1, s1, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s1, 3
s_cbranch_scc1 .LBB0_2
v_mul_hi_i32 v2, 0x38e38e39, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v3, 31, v2
v_ashrrev_i32_e32 v2, 1, v2
v_add_nc_u32_e32 v4, v2, v3
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s0
v_lshl_add_u32 v0, v0, 9, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| boxFilterKernel | 1,660 | 1,341 | stackv2-00001-of-00015 |
// Demangled: calculateXxLog2X(double*)
Function : _Z16calculateXxLog2XPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x8, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xb90 ?trans1;
MOV R9, 0xfffffc01 ?trans1;
ISETP.GT.AND P0, PT, R5, 0xfffff, PT &req={2} ?trans1;
MOV.64 R6, R4 ?trans2;
MOV R0, R5 ?WAIT10_END_GROUP;
@!P0 DMUL R6, R4, 1.80143985094819840000e+16 &wr=0x1 ?trans1;
@!P0 MOV R9, 0xfffffbcb ?trans1;
@!P0 MOV R0, R7 &req={1} ?WAIT5_END_GROUP;
IADD3 R8, PT, PT, R0, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, 0x7feffffe, PT ?trans1;
MOV R8, R4 ?trans1;
@!P0 MOV R8, R6 ?WAIT11_END_GROUP;
@P1 BRA 0xb30 &req={0} ?trans5;
LOP3.LUT R6, R0, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR6, 0x4330000080000000 ?WAIT3_END_GROUP;
LOP3.LUT R7, R6, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R6, R8 ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R11, PT, PT, R7, -0x100000, RZ ?WAIT5_END_GROUP;
@P0 MOV R7, R11 ?WAIT6_END_GROUP;
DADD R14, R6, -1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R6, 1 &rd=0x0 &wr=0x1 ?trans2;
LEA.HI R6, R0, R9, RZ, 0xc &req={0} ?trans2;
MUFU.RCP64H R9, R17 &req={1} &wr=0x0 ?trans1;
MOV R7, 0x43300000 ?trans1;
@P0 IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R16, R8, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R16, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, -UR6 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R8, R10, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R14, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R14, R18, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, UR6, R10 &req={0} ?trans1;
UMOV.64 UR6, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R10, R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, UR6, R16 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R6, -UR6, R8 ?trans1;
UMOV.64 UR6, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, UR6 &req={0} ?trans1;
UMOV.64 UR6, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R14, -R10 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R10, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R16, UR6 &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R18, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R12, R16 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R22, -R10, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R10, R16, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, -R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R6, UR6, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xb80 &req={1,0} ?trans5;
MOV.64 R8, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R6, R6, R8, +INF &wr=0x0 ?trans2;
FSEL R8, R6, RZ, P0 &req={0} ?trans1;
FSEL R9, R7, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
UMOV.64 UR6, 0x3c7777d0ffda0d24 ?trans2;
DMUL R6, R8, UR6 &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3ff71547652b82fe ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, UR6, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R4, R6 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R2.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xc80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculateXxLog2X(double*)
_Z16calculateXxLog2XPd:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v16, 3, v0
s_mov_b32 s3, 0x3fe55555
s_mov_b32 s2, 0x55555555
s_mov_b32 s4, 0x6b47b09a
s_mov_b32 s6, 0xbf559e2b
s_mov_b32 s5, 0x3fc38538
s_mov_b32 s7, 0x3fc3ab76
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v16, s[0:1]
s_waitcnt vmcnt(0)
v_frexp_mant_f64_e32 v[2:3], v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
s_mov_b32 s2, 0x55555780
v_cndmask_b32_e64 v4, 0, 1, vcc_lo
v_ldexp_f64 v[2:3], v[2:3], v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[2:3], 1.0
v_add_f64 v[10:11], v[2:3], -1.0
v_rcp_f64_e32 v[6:7], v[4:5]
v_add_f64 v[12:13], v[4:5], -1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[2:3], -v[12:13]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[10:11], v[6:7]
v_mul_f64 v[14:15], v[4:5], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], v[8:9], v[4:5], -v[14:15]
v_fma_f64 v[2:3], v[8:9], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[14:15], v[2:3]
v_add_f64 v[12:13], v[10:11], -v[4:5]
v_add_f64 v[14:15], v[4:5], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], -v[12:13]
v_add_f64 v[2:3], v[14:15], -v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[10:11], -v[4:5]
v_add_f64 v[2:3], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[12:13], v[2:3]
v_mul_f64 v[2:3], v[6:7], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[8:9], v[2:3]
v_mul_f64 v[6:7], v[4:5], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_fma_f64 v[10:11], v[6:7], s[6:7], s[4:5]
s_mov_b32 s4, 0xd7f4df2e
s_mov_b32 s5, 0x3fc7474d
v_mul_f64 v[12:13], v[4:5], v[6:7]
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_mov_b32 s4, 0x16291751
s_mov_b32 s5, 0x3fcc71c0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_mov_b32 s4, 0x9b27acf1
s_mov_b32 s5, 0x3fd24924
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_mov_b32 s4, 0x998ef7b6
s_mov_b32 s5, 0x3fd99999
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_fma_f64 v[6:7], v[6:7], v[10:11], s[2:3]
v_ldexp_f64 v[10:11], v[4:5], 1
v_add_f64 v[4:5], v[4:5], -v[8:9]
s_mov_b32 s2, 0x652b82fe
s_mov_b32 s3, 0x3ff71547
v_mul_f64 v[6:7], v[12:13], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[2:3], -v[4:5]
v_add_f64 v[8:9], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ldexp_f64 v[2:3], v[2:3], 1
v_add_f64 v[4:5], v[8:9], -v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[6:7], -v[4:5]
v_add_f64 v[2:3], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[8:9], v[2:3]
v_add_f64 v[6:7], v[4:5], -v[8:9]
v_mul_f64 v[8:9], v[4:5], s[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[2:3], -v[6:7]
v_fma_f64 v[6:7], v[4:5], s[2:3], -v[8:9]
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[2:3], v[2:3], s[2:3], v[6:7]
v_frexp_exp_i32_f64_e32 v6, v[0:1]
s_mov_b32 s2, 0xffda0d24
s_mov_b32 s3, 0x3c7777d0
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_fma_f64 v[2:3], v[4:5], s[2:3], v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v6, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
v_cvt_f64_i32_e32 v[4:5], v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[8:9], v[2:3]
v_add_f64 v[10:11], v[6:7], v[4:5]
v_add_f64 v[8:9], v[6:7], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[10:11], -v[4:5]
v_add_f64 v[2:3], v[2:3], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[12:13], -v[10:11]
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_add_f64 v[4:5], v[14:15], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[6:7], v[4:5]
v_add_f64 v[2:3], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[2:3], v[10:11], v[2:3]
v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
v_cmp_nge_f64_e32 vcc_lo, 0, v[0:1]
v_cndmask_b32_e32 v2, 0, v2, vcc_lo
v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v3, 0xfff00000, v3, vcc_lo
v_mul_f64 v[0:1], v[0:1], v[2:3]
global_store_b64 v16, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calculateXxLog2X | 3,268 | 3,428 | stackv2-00001-of-00015 |
// Demangled: void reduceGmem<float>(float*, float*, unsigned long)
Function : _Z10reduceGmemIfEvPT_S1_m
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
S2R R7, SR_TID.X &wr=0x3 ?trans1;
IMAD R4, R0, R5, RZ &req={1} ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R4, R7, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR4, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
ISETP.GT.U32.AND P2, PT, R7.reuse, 0x1ff, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R7.reuse, 0xff, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R7.reuse, 0x7f, PT ?trans1;
ISETP.GT.U32.AND P0, PT, R7, 0x3f, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.LT.U32.OR P2, PT, R5.reuse, 0x400, P2 ?trans1;
BSSY.RECONVERGENT B0, 0x1e0 ?trans1;
ISETP.LT.U32.OR P3, PT, R5.reuse, 0x200, P3 ?trans1;
ISETP.LT.U32.OR P1, PT, R5.reuse, 0x100, P1 ?trans1;
ISETP.LT.U32.OR P0, PT, R5, 0x80, P0 ?trans1;
ISETP.GT.U32.AND P4, PT, R7, 0x1f, PT ?trans1;
IMAD.WIDE.U32 R2, R4, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R2 ?WAIT3_END_GROUP;
@P2 BRA 0x1d0 &req={1} ?trans5;
LDG.E R6, desc[UR4][R4.64+0x800] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64] &wr=0x2 ?trans2;
FADD R9, R6, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x260 ?trans4;
@P3 BRA 0x250 ?trans5;
LDG.E R6, desc[UR4][R4.64+0x400] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans2;
FADD R9, R6, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x2e0 ?trans4;
@P1 BRA 0x2d0 ?trans5;
LDG.E R6, desc[UR4][R4.64+0x200] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R4.64] &req={1,0} &wr=0x2 ?trans2;
FADD R9, R6, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x360 ?trans4;
@P0 BRA 0x350 ?trans5;
LDG.E R6, desc[UR4][R4.64+0x100] &wr=0x3 ?trans4;
LDG.E R9, desc[UR4][R4.64] &req={2,1,0} &wr=0x3 ?trans2;
FADD R9, R6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P4 EXIT ?trans5;
LDG.E.STRONG.SYS R6, desc[UR4][R4.64+0x80] &wr=0x4 ?trans4;
LDG.E.STRONG.SYS R9, desc[UR4][R4.64] &req={3,2,1,0} &wr=0x4 ?trans2;
FADD R9, R6, R9 &req={4} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR4][R4.64], R9 &rd=0x0 ?trans4;
LDG.E.STRONG.SYS R6, desc[UR4][R4.64+0x40] &wr=0x2 ?trans4;
LDG.E.STRONG.SYS R11, desc[UR4][R4.64] &wr=0x2 ?trans2;
FADD R11, R6, R11 &req={2} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E.STRONG.SYS R6, desc[UR4][R4.64+0x20] &wr=0x2 ?trans4;
LDG.E.STRONG.SYS R13, desc[UR4][R4.64] &wr=0x2 ?trans2;
FADD R13, R6, R13 &req={2} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR4][R4.64], R13 &rd=0x2 ?trans4;
LDG.E.STRONG.SYS R6, desc[UR4][R4.64+0x10] &wr=0x3 ?trans4;
LDG.E.STRONG.SYS R15, desc[UR4][R4.64] &wr=0x3 ?trans2;
FADD R15, R6, R15 &req={3} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR4][R4.64], R15 &rd=0x2 ?trans4;
LDG.E.STRONG.SYS R6, desc[UR4][R4.64+0x8] &wr=0x3 ?trans4;
LDG.E.STRONG.SYS R9, desc[UR4][R4.64] &req={0} &wr=0x3 ?trans2;
FADD R9, R6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR4][R4.64], R9 &rd=0x2 ?trans4;
LDG.E.STRONG.SYS R6, desc[UR4][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E.STRONG.SYS R11, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT ?trans1;
FADD R11, R6, R11 &req={3} ?WAIT5_END_GROUP;
STG.E.STRONG.SYS desc[UR4][R4.64], R11 &rd=0x2 ?trans7;
@P0 EXIT ?trans5;
LDG.E R3, desc[UR4][R2.64] &wr=0x3 ?trans1;
LDC.64 R4, c[0x0][0x380] &req={2} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R4, R0, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R3 &req={3} ?trans1;
EXIT ?trans5;
BRA 0x570;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void reduceGmem<float>(float*, float*, unsigned long)
_Z10reduceGmemIfEvPT_S1_m:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s6, s15, s5
v_add_nc_u32_e32 v1, s6, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[1:2]
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_13
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s7, 0
v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
s_lshl_b64 s[6:7], s[6:7], 2
v_lshlrev_b32_e32 v1, 2, v0
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s2, s6
s_addc_u32 s3, s3, s7
s_cmpk_gt_u32 s5, 0x3ff
s_cselect_b32 s6, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s7, vcc_lo, s6
s_and_saveexec_b32 s6, s7
s_cbranch_execz .LBB0_3
s_clause 0x1
global_load_b32 v2, v1, s[2:3] offset:2048
global_load_b32 v3, v1, s[2:3]
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v1, v2, s[2:3]
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s6
v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
s_cmpk_gt_u32 s5, 0x1ff
s_waitcnt_vscnt null, 0x0
s_cselect_b32 s6, -1, 0
s_barrier
s_and_b32 s7, vcc_lo, s6
buffer_gl0_inv
s_and_saveexec_b32 s6, s7
s_cbranch_execz .LBB0_5
s_clause 0x1
global_load_b32 v2, v1, s[2:3] offset:1024
global_load_b32 v3, v1, s[2:3]
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v1, v2, s[2:3]
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s6
v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
s_cmpk_gt_u32 s5, 0xff
s_waitcnt_vscnt null, 0x0
s_cselect_b32 s6, -1, 0
s_barrier
s_and_b32 s7, vcc_lo, s6
buffer_gl0_inv
s_and_saveexec_b32 s6, s7
s_cbranch_execz .LBB0_7
s_clause 0x1
global_load_b32 v2, v1, s[2:3] offset:512
global_load_b32 v3, v1, s[2:3]
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v1, v2, s[2:3]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s6
v_cmp_gt_u32_e32 vcc_lo, 64, v0
s_cmpk_gt_u32 s5, 0x7f
s_waitcnt_vscnt null, 0x0
s_cselect_b32 s5, -1, 0
s_barrier
s_and_b32 s6, vcc_lo, s5
buffer_gl0_inv
s_and_saveexec_b32 s5, s6
s_cbranch_execz .LBB0_9
s_clause 0x1
global_load_b32 v2, v1, s[2:3] offset:256
global_load_b32 v3, v1, s[2:3]
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v1, v2, s[2:3]
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s5, exec_lo
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB0_11
v_or_b32_e32 v2, 0x80, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s6, s2, v2
v_add_co_ci_u32_e64 v3, null, s3, 0, s6
v_add_co_u32 v4, s6, s2, v1
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, null, s3, 0, s6
flat_load_b32 v1, v[2:3] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[4:5], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] offset:64 glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[4:5], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] offset:32 glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[4:5], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] offset:16 glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[4:5], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] offset:8 glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[4:5], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] offset:4 glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v2, v[4:5] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
flat_store_b32 v[4:5], v1 dlc
s_waitcnt_vscnt null, 0x0
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s5
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_mov_b32 s5, 0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_13
v_mov_b32_e32 v0, 0
global_load_b32 v1, v0, s[2:3]
s_lshl_b64 s[2:3], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
s_waitcnt vmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB0_13:
s_endpgm
| void_reduceGmem_float_ | 2,322 | 2,381 | stackv2-00001-of-00015 |
// Demangled: void reduceSmemUnrollDynamic<float>(float*, float*, unsigned long)
Function : _Z23reduceSmemUnrollDynamicIfEvPT_S1_m
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC R15, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
MOV R5, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
IMAD.SHL.U32 R4, R15, 0x4, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R6, R15, 0x3, RZ ?trans2;
IMAD R4, R4, R0, R3 &req={1} ?WAIT5_END_GROUP;
IADD.64 R8, R4, R6 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P0, PT, R8, UR4, PT &req={3} ?WAIT14_END_GROUP;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
@!P0 IADD3 R11, PT, PT, R15, R15, RZ ?trans2;
@!P0 LEA R8, P1, R4, R8, 0x2 &req={1} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R9, R4, R9, RZ, 0x2, P1 ?trans2;
@!P0 LEA R12, P1, R6.reuse, R8, 0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R4, R15, 0x4, R8.reuse ?trans2;
@!P0 LDG.E R2, desc[UR6][R8.64] &req={4} &wr=0x2 ?trans2;
@!P0 IMAD.WIDE.U32 R10, R11, 0x4, R8 ?trans2;
@!P0 LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
@!P0 LEA.HI.X R13, R6, R9, RZ, 0x2, P1 ?WAIT3_END_GROUP;
@!P0 LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans4;
@!P0 LDG.E R12, desc[UR6][R12.64] &wr=0x4 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1ff, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P1, PT, R15, 0x400, P1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
@!P0 FADD R7, R2, R5 &req={2} ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
LEA R5, R3, UR4, 0x2 ?trans1;
@!P0 FADD R7, R10, R7 &req={3} ?WAIT4_END_GROUP;
@!P0 FADD R2, R12, R7 &req={4} ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0xff, PT ?WAIT4_END_GROUP;
STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.LT.U32.OR P0, PT, R15, 0x200, P0 ?WAIT5_END_GROUP;
@!P1 LDS R4, [R5+0x800] ?trans4;
@!P1 LDS R7, [R5] &wr=0x1 ?trans2;
@!P1 FADD R4, R4, R7 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R5], R4 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x7f, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P1, PT, R15, 0x100, P1 ?trans1;
@!P0 LDS R6, [R5+0x400] ?trans4;
@!P0 LDS R7, [R5] &wr=0x1 ?trans2;
@!P0 FADD R6, R6, R7 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0x3f, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R15, 0x80, P0 ?trans1;
@!P1 LDS R2, [R5+0x200] ?trans4;
@!P1 LDS R7, [R5] &wr=0x1 ?trans2;
@!P1 FADD R2, R2, R7 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1f, PT ?WAIT5_END_GROUP;
@!P0 LDS R4, [R5+0x100] ?trans4;
@!P0 LDS R7, [R5] &wr=0x1 ?trans2;
@!P0 FADD R4, R4, R7 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R4 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT &req={0} ?trans5;
LDS R2, [R5+0x80] ?trans1;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT3_END_GROUP;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R2, R2, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R2 ?trans4;
LDS R4, [R5+0x40] &req={1} ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R4, R4, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R4 ?trans4;
LDS R6, [R5+0x20] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R6, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R6 ?trans4;
LDS R7, [R5+0x10] ?trans4;
LDS R8, [R5] &wr=0x0 ?trans2;
FADD R8, R7, R8 &req={0} ?WAIT5_END_GROUP;
STS [R5], R8 ?trans4;
LDS R2, [R5+0x8] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R2, R2, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R2 ?trans4;
LDS R4, [R5+0x4] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R4, R4, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R4 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDS R5, [UR4] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x600;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void reduceSmemUnrollDynamic<float>(float*, float*, unsigned long)
_Z23reduceSmemUnrollDynamicIfEvPT_S1_m:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_mul_i32 s0, s15, s3
s_mul_i32 s1, s3, 3
v_lshl_add_u32 v1, s0, 2, v0
v_add_co_u32 v2, s0, v1, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, null, 0, 0, s0
v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[2:3]
v_mov_b32_e32 v2, 0
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB3_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_lshl_b32 s8, s3, 2
s_lshl_b32 s1, s1, 2
v_add_co_u32 v1, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
s_lshl_b32 s6, s3, 3
v_add_co_u32 v3, vcc_lo, v1, s8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v2, vcc_lo
v_add_co_u32 v5, vcc_lo, v1, s6
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v2, vcc_lo
s_clause 0x1
global_load_b32 v7, v[1:2], off
global_load_b32 v3, v[3:4], off
v_add_co_u32 v1, vcc_lo, v1, s1
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_clause 0x1
global_load_b32 v4, v[5:6], off
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(2)
v_add_f32_e32 v2, v7, v3
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v2, v2, v4
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v1
.LBB3_2:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
s_cmpk_gt_u32 s3, 0x3ff
v_lshl_add_u32 v1, v0, 2, 0
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s0
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB3_4
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:8
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB3_4:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
s_cmpk_gt_u32 s3, 0x1ff
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB3_6
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB3_6:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
s_cmpk_gt_u32 s3, 0xff
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB3_8
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB3_8:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 64, v0
s_cmpk_gt_u32 s3, 0x7f
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB3_10
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB3_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB3_12
v_lshlrev_b32_e32 v2, 2, v0
v_cmp_ne_u32_e64 s0, -1, v1
s_mov_b64 s[6:7], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add3_u32 v2, 0, v2, 0x80
v_cndmask_b32_e64 v3, 0, s7, s0
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_cndmask_b32_e32 v4, 0, v2, vcc_lo
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cndmask_b32_e64 v2, 0, v1, s0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 64, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 32, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 16, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 8, v1
v_add_nc_u32_e32 v1, 4, v1
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v1
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v4, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v4
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
.LBB3_12:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s3, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB3_14
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB3_14:
s_endpgm
| void_reduceSmemUnrollDynamic_float_ | 2,247 | 3,362 | stackv2-00001-of-00015 |
// Demangled: void reduceSmemUnroll<float>(float*, float*, unsigned long)
Function : _Z16reduceSmemUnrollIfEvPT_S1_m
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC R15, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
MOV R5, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
IMAD.SHL.U32 R4, R15, 0x4, RZ &req={2} ?WAIT2_END_GROUP;
IMAD R6, R15, 0x3, RZ ?trans2;
IMAD R4, R4, R0, R3 &req={1} ?WAIT5_END_GROUP;
IADD.64 R8, R4, R6 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P0, PT, R8, UR4, PT &req={3} ?WAIT14_END_GROUP;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
@!P0 IADD3 R11, PT, PT, R15, R15, RZ ?trans2;
@!P0 LEA R8, P1, R4, R8, 0x2 &req={1} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R9, R4, R9, RZ, 0x2, P1 ?trans2;
@!P0 LEA R12, P1, R6.reuse, R8, 0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R4, R15, 0x4, R8.reuse ?trans2;
@!P0 LDG.E R2, desc[UR6][R8.64] &req={4} &wr=0x2 ?trans2;
@!P0 IMAD.WIDE.U32 R10, R11, 0x4, R8 ?trans2;
@!P0 LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
@!P0 LEA.HI.X R13, R6, R9, RZ, 0x2, P1 ?WAIT3_END_GROUP;
@!P0 LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans4;
@!P0 LDG.E R12, desc[UR6][R12.64] &wr=0x4 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1ff, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P1, PT, R15, 0x400, P1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
@!P0 FADD R7, R2, R5 &req={2} ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
LEA R5, R3, UR4, 0x2 ?trans1;
@!P0 FADD R7, R10, R7 &req={3} ?WAIT4_END_GROUP;
@!P0 FADD R2, R12, R7 &req={4} ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0xff, PT ?WAIT4_END_GROUP;
STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.LT.U32.OR P0, PT, R15, 0x200, P0 ?WAIT5_END_GROUP;
@!P1 LDS R4, [R5+0x800] ?trans4;
@!P1 LDS R7, [R5] &wr=0x1 ?trans2;
@!P1 FADD R4, R4, R7 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R5], R4 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x7f, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P1, PT, R15, 0x100, P1 ?trans1;
@!P0 LDS R6, [R5+0x400] ?trans4;
@!P0 LDS R7, [R5] &wr=0x1 ?trans2;
@!P0 FADD R6, R6, R7 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0x3f, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R15, 0x80, P0 ?trans1;
@!P1 LDS R2, [R5+0x200] ?trans4;
@!P1 LDS R7, [R5] &wr=0x1 ?trans2;
@!P1 FADD R2, R2, R7 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1f, PT ?WAIT5_END_GROUP;
@!P0 LDS R4, [R5+0x100] ?trans4;
@!P0 LDS R7, [R5] &wr=0x1 ?trans2;
@!P0 FADD R4, R4, R7 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R4 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT &req={0} ?trans5;
LDS R2, [R5+0x80] ?trans1;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT3_END_GROUP;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R2, R2, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R2 ?trans4;
LDS R4, [R5+0x40] &req={1} ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R4, R4, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R4 ?trans4;
LDS R6, [R5+0x20] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R6, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R6 ?trans4;
LDS R7, [R5+0x10] ?trans4;
LDS R8, [R5] &wr=0x0 ?trans2;
FADD R8, R7, R8 &req={0} ?WAIT5_END_GROUP;
STS [R5], R8 ?trans4;
LDS R2, [R5+0x8] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R2, R2, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R2 ?trans4;
LDS R4, [R5+0x4] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R4, R4, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R4 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDS R5, [UR4] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x600;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void reduceSmemUnroll<float>(float*, float*, unsigned long)
_Z16reduceSmemUnrollIfEvPT_S1_m:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_mul_i32 s0, s15, s3
s_mul_i32 s1, s3, 3
v_lshl_add_u32 v1, s0, 2, v0
v_add_co_u32 v2, s0, v1, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, null, 0, 0, s0
v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[2:3]
v_mov_b32_e32 v2, 0
s_and_saveexec_b32 s0, vcc_lo
s_cbranch_execz .LBB2_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_lshl_b32 s8, s3, 2
s_lshl_b32 s1, s1, 2
v_add_co_u32 v1, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
s_lshl_b32 s6, s3, 3
v_add_co_u32 v3, vcc_lo, v1, s8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v2, vcc_lo
v_add_co_u32 v5, vcc_lo, v1, s6
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v2, vcc_lo
s_clause 0x1
global_load_b32 v7, v[1:2], off
global_load_b32 v3, v[3:4], off
v_add_co_u32 v1, vcc_lo, v1, s1
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_clause 0x1
global_load_b32 v4, v[5:6], off
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(2)
v_add_f32_e32 v2, v7, v3
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v2, v2, v4
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v1
.LBB2_2:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
s_cmpk_gt_u32 s3, 0x3ff
v_lshlrev_b32_e32 v1, 2, v0
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s0
ds_store_b32 v1, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB2_4
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:8
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
s_cmpk_gt_u32 s3, 0x1ff
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB2_6
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB2_6:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
s_cmpk_gt_u32 s3, 0xff
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB2_8
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 64, v0
s_cmpk_gt_u32 s3, 0x7f
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB2_10
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB2_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB2_12
v_lshl_add_u32 v2, v0, 2, 0x80
v_cmp_ne_u32_e64 s0, -1, v1
s_mov_b64 s[6:7], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_cndmask_b32_e64 v3, 0, s7, s0
v_cndmask_b32_e32 v4, 0, v2, vcc_lo
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cndmask_b32_e64 v2, 0, v1, s0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 64, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 32, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 16, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 8, v1
v_add_nc_u32_e32 v1, 4, v1
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v1
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v4, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v4
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
.LBB2_12:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s3, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB2_14
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB2_14:
s_endpgm
| void_reduceSmemUnroll_float_ | 2,246 | 3,328 | stackv2-00001-of-00015 |
// Demangled: void reduceSmem<float>(float*, float*, unsigned long)
Function : _Z10reduceSmemIfEvPT_S1_m
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x2 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
S2R R2, SR_TID.X &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
IMAD R4, R0, R11, RZ &req={1} ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, R4, R2, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R6, UR4, PT &req={2} ?WAIT14_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
@!P0 MOV R5, RZ ?trans1;
@!P0 MOV R3, RZ ?WAIT5_END_GROUP;
@!P0 IADD.64 R4, R4, R2 ?WAIT5_END_GROUP;
@!P0 LEA R6, P1, R4, R6, 0x2 &req={1} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R7, R4, R7, R5, 0x2, P1 ?WAIT6_END_GROUP;
@!P0 LDG.E R7, desc[UR6][R6.64] &req={4} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.U32.AND P1, PT, R2, 0x1ff, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P1, PT, R11, 0x400, P1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R4, R2, UR4, 0x2 ?WAIT5_END_GROUP;
@!P0 STS [R4], R7 &req={2} ?trans4;
@P0 STS [R4], RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0xff, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R11, 0x200, P0 ?trans1;
@!P1 LDS R5, [R4+0x800] ?trans4;
@!P1 LDS R6, [R4] &wr=0x1 ?trans2;
@!P1 FADD R5, R5, R6 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R5 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R2, 0x7f, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P1, PT, R11, 0x100, P1 ?trans1;
@!P0 LDS R6, [R4+0x400] ?trans4;
@!P0 LDS R7, [R4] &wr=0x1 ?trans2;
@!P0 FADD R7, R6, R7 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R2, 0x3f, PT ?WAIT5_END_GROUP;
ISETP.LT.U32.OR P0, PT, R11, 0x80, P0 ?trans1;
@!P1 LDS R6, [R4+0x200] ?trans4;
@!P1 LDS R9, [R4] &wr=0x1 ?trans2;
@!P1 FADD R9, R6, R9 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R2, 0x1f, PT ?WAIT5_END_GROUP;
@!P0 LDS R5, [R4+0x100] ?trans4;
@!P0 LDS R6, [R4] &wr=0x1 ?trans2;
@!P0 FADD R5, R5, R6 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R5 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT &req={0} ?trans5;
LDS R3, [R4+0x80] ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
LDS R6, [R4] &wr=0x0 ?trans2;
FADD R3, R3, R6 &req={0} ?WAIT5_END_GROUP;
STS [R4], R3 ?trans4;
LDS R5, [R4+0x40] &req={1} ?trans4;
LDS R6, [R4] &wr=0x0 ?trans2;
FADD R5, R5, R6 &req={0} ?WAIT5_END_GROUP;
STS [R4], R5 ?trans4;
LDS R6, [R4+0x20] ?trans4;
LDS R7, [R4] &wr=0x0 ?trans2;
FADD R7, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R4], R7 ?trans4;
LDS R6, [R4+0x10] ?trans4;
LDS R9, [R4] &wr=0x0 ?trans2;
FADD R9, R6, R9 &req={0} ?WAIT5_END_GROUP;
STS [R4], R9 ?trans4;
LDS R3, [R4+0x8] ?trans4;
LDS R6, [R4] &wr=0x0 ?trans2;
FADD R3, R3, R6 &req={0} ?WAIT5_END_GROUP;
STS [R4], R3 ?trans4;
LDS R5, [R4+0x4] ?trans4;
LDS R6, [R4] &wr=0x0 ?trans2;
FADD R5, R5, R6 &req={0} ?WAIT5_END_GROUP;
STS [R4], R5 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDS R5, [UR4] &req={0} &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x550;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void reduceSmem<float>(float*, float*, unsigned long)
_Z10reduceSmemIfEvPT_S1_m:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s0, s15, s3
v_add_nc_u32_e32 v1, s0, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[1:2]
v_lshlrev_b32_e32 v1, 2, v0
s_and_saveexec_b32 s8, vcc_lo
s_cbranch_execz .LBB1_2
s_mov_b32 s1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[0:1], s[0:1], 2
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
global_load_b32 v2, v1, s[0:1]
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s8
v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
s_cmpk_gt_u32 s3, 0x3ff
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
s_cselect_b32 s0, -1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s1, vcc_lo, s0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_4
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:8
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
s_cmpk_gt_u32 s3, 0x1ff
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_6
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
s_cmpk_gt_u32 s3, 0xff
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_8
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:2
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s0
v_cmp_gt_u32_e32 vcc_lo, 64, v0
s_cmpk_gt_u32 s3, 0x7f
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_10
ds_load_2addr_stride64_b32 v[2:3], v1 offset1:1
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v3, v2
ds_store_b32 v1, v2
.LBB1_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB1_12
v_lshl_add_u32 v2, v0, 2, 0x80
v_cmp_ne_u32_e64 s0, -1, v1
s_mov_b64 s[6:7], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v2
v_cndmask_b32_e64 v3, 0, s7, s0
v_cndmask_b32_e32 v4, 0, v2, vcc_lo
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cndmask_b32_e64 v2, 0, v1, s0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 64, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 32, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 16, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, 8, v1
v_add_nc_u32_e32 v1, 4, v1
s_delay_alu instid0(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v4
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v6, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v1
flat_store_b32 v[2:3], v6 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v5, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v6, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
v_cndmask_b32_e64 v5, 0, s7, vcc_lo
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
flat_load_b32 v1, v[4:5] glc dlc
s_waitcnt vmcnt(0)
flat_load_b32 v4, v[2:3] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v4
flat_store_b32 v[2:3], v1 dlc
s_waitcnt_vscnt null, 0x0
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s3, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB1_14
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB1_14:
s_endpgm
| void_reduceSmem_float_ | 1,917 | 2,823 | stackv2-00001-of-00015 |
// Demangled: matrix_vector_multi_gpu_1_2(float*, float*, float*)
Function : _Z27matrix_vector_multi_gpu_1_2PfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x4 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={3} ?trans1;
IADD.64 R2, R2, 0x20 &req={2} ?WAIT3_END_GROUP;
SHF.L.U32 R11, R11, 0x7, RZ &req={1} ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, 0x7f, RZ &req={4,0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x380] &req={2,0} &wr=0x0 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P1, PT, R11.reuse, R0, PT ?trans1;
IMAD.WIDE.U32 R6, R11.reuse, 0x400, R2 ?trans1;
MOV R13, RZ ?trans1;
MOV.64 R8, UR4 ?trans2;
IMAD.WIDE.U32 R4, R11.reuse, 0x4, R4 &req={0} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], RZ &rd=0x0 ?trans3;
LDG.E R12, desc[UR6][R6.64+-0x20] &req={2} &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x20] &wr=0x2 ?trans2;
FFMA R13, R12, R14, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0x1c] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x1c] &wr=0x2 ?trans2;
FFMA R15, R12, R14, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R15 &rd=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0x18] &wr=0x3 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x18] &wr=0x3 ?trans2;
FFMA R17, R12, R14, R15 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x3 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0x14] &wr=0x1 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x14] &wr=0x1 ?trans2;
FFMA R13, R12, R14, R17 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0x10] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x10] &wr=0x2 ?trans2;
FFMA R15, R12, R14, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R15 &rd=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0xc] &wr=0x3 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0xc] &wr=0x3 ?trans2;
FFMA R17, R12, R14, R15 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x3 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0x8] &wr=0x1 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x8] &wr=0x1 ?trans2;
FFMA R13, R12, R14, R17 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R6.64+-0x4] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+-0x4] &wr=0x2 ?trans2;
FFMA R15, R12, R14, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R15 &rd=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64] &wr=0x3 ?trans4;
LDG.E R14, desc[UR6][R8.64] &wr=0x3 ?trans2;
FFMA R17, R12, R14, R15 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x3 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x4] &wr=0x1 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x4] &wr=0x1 ?trans2;
FFMA R13, R12, R14, R17 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x8] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x8] &wr=0x2 ?trans2;
FFMA R15, R12, R14, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R15 &rd=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64+0xc] &wr=0x3 ?trans4;
LDG.E R14, desc[UR6][R8.64+0xc] &wr=0x3 ?trans2;
FFMA R17, R12, R14, R15 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x3 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x10] &wr=0x1 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x10] &wr=0x1 ?trans2;
FFMA R13, R12, R14, R17 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x14] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x14] &wr=0x2 ?trans2;
FFMA R15, R12, R14, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R15 &rd=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x18] &wr=0x3 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x18] &wr=0x3 ?trans2;
FFMA R17, R12, R14, R15 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64+0x1c] &rd=0x3 &wr=0x1 ?trans4;
LDG.E R14, desc[UR6][R8.64+0x1c] &rd=0x4 &wr=0x1 ?trans1;
IADD3 R10, PT, PT, R10, 0x10, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R10, 0x100, PT ?trans1;
IADD.64 R6, R6, 0x40 &req={3} ?trans2;
IADD.64 R8, R8, 0x40 &req={4} ?trans2;
FFMA R13, R12, R14, R17 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x2 ?trans3;
@P0 BRA 0x120 ?trans5;
@P1 BRA 0x90 ?trans5;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_vector_multi_gpu_1_2(float*, float*, float*)
_Z27matrix_vector_multi_gpu_1_2PfS_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_lshlrev_b32_e32 v3, 17, v0
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_or_b32_e32 v0, 0x7f, v1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, s0, s6, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v6, null, s7, 0, s0
s_mov_b32 s6, 0
.LBB0_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v7, 0
s_mov_b64 s[0:1], 0
v_add_co_u32 v3, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_store_b32 v[3:4], v2, off
.LBB0_2:
v_add_co_u32 v8, vcc_lo, v5, s0
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v6, vcc_lo
s_add_u32 s8, s2, s0
s_addc_u32 s9, s3, s1
global_load_b32 v10, v2, s[8:9]
global_load_b32 v8, v[8:9], off
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmpk_lg_i32 s0, 0x400
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v7, v8, v10
global_store_b32 v[3:4], v7, off
s_cbranch_scc1 .LBB0_2
v_add_nc_u32_e32 v3, 1, v1
v_cmp_eq_u32_e32 vcc_lo, v1, v0
v_add_co_u32 v5, s0, 0x400, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
v_mov_b32_e32 v1, v3
s_or_b32 s6, vcc_lo, s6
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s6
s_cbranch_execnz .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_vector_multi_gpu_1_2 | 2,637 | 854 | stackv2-00001-of-00015 |
// Demangled: add(int*, int*, int*)
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x1ff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.SHL.U32 R2, R0, 0x200, RZ ?trans2;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD.WIDE R2, R2, 0x4, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans2;
LOP3.LUT R6, R2, 0x20, RZ, 0xfc, !PT ?trans2;
MOV R7, R3 ?WAIT5_END_GROUP;
IADD.64 R4, R6.reuse, UR8 &req={0} ?trans2;
IADD.64 R2, R6.reuse, UR10 ?trans2;
IADD.64 R6, R6, UR6 &req={1} ?WAIT8_END_GROUP;
LDG.E R8, desc[UR4][R4.64+-0x20] &req={2} &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R2.64+-0x20] &wr=0x2 ?trans2;
IADD3 R9, PT, PT, R8, R9, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x20], R9 &rd=0x0 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x1c] &wr=0x2 ?trans4;
LDG.E R11, desc[UR4][R2.64+-0x1c] &wr=0x2 ?trans2;
IADD3 R11, PT, PT, R8, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x1c], R11 &rd=0x1 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x18] &wr=0x2 ?trans4;
LDG.E R13, desc[UR4][R2.64+-0x18] &wr=0x2 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x18], R13 &rd=0x2 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x14] &wr=0x3 ?trans4;
LDG.E R15, desc[UR4][R2.64+-0x14] &wr=0x3 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x14], R15 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x10] &wr=0x4 ?trans4;
LDG.E R9, desc[UR4][R2.64+-0x10] &req={0} &wr=0x4 ?trans2;
IADD3 R9, PT, PT, R8, R9, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x10], R9 &rd=0x0 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0xc] &wr=0x4 ?trans4;
LDG.E R11, desc[UR4][R2.64+-0xc] &req={1} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R8, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0xc], R11 &rd=0x1 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x8] &wr=0x4 ?trans4;
LDG.E R13, desc[UR4][R2.64+-0x8] &req={2} &wr=0x4 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x8], R13 &rd=0x2 ?trans4;
LDG.E R8, desc[UR4][R4.64+-0x4] &wr=0x4 ?trans4;
LDG.E R15, desc[UR4][R2.64+-0x4] &req={3} &wr=0x4 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+-0x4], R15 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R4.64] &wr=0x4 ?trans4;
LDG.E R9, desc[UR4][R2.64] &req={0} &wr=0x4 ?trans2;
IADD3 R9, PT, PT, R8, R9, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 &rd=0x0 ?trans4;
LDG.E R8, desc[UR4][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R11, desc[UR4][R2.64+0x4] &req={1} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R8, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0x4], R11 &rd=0x1 ?trans4;
LDG.E R8, desc[UR4][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x8] &req={2} &wr=0x4 ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0x8], R13 &rd=0x2 ?trans4;
LDG.E R8, desc[UR4][R4.64+0xc] &wr=0x4 ?trans4;
LDG.E R15, desc[UR4][R2.64+0xc] &req={3} &wr=0x4 ?trans2;
IADD3 R15, PT, PT, R8, R15, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0xc], R15 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R4.64+0x10] &wr=0x4 ?trans4;
LDG.E R9, desc[UR4][R2.64+0x10] &req={0} &wr=0x4 ?trans2;
IADD3 R9, PT, PT, R8, R9, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0x10], R9 ?trans4;
LDG.E R8, desc[UR4][R4.64+0x14] &wr=0x4 ?trans4;
LDG.E R11, desc[UR4][R2.64+0x14] &req={1} &wr=0x4 ?trans2;
IADD3 R11, PT, PT, R8, R11, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0x14], R11 ?trans4;
LDG.E R8, desc[UR4][R4.64+0x18] &wr=0x4 ?trans4;
LDG.E R13, desc[UR4][R2.64+0x18] &req={2} &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?trans2;
IADD3 R13, PT, PT, R8, R13, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0x18], R13 ?trans4;
LDG.E R8, desc[UR4][R4.64+0x1c] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R2.64+0x1c] &req={3} &rd=0x1 &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R0, 0x200, PT ?trans1;
IADD.64 R4, R4, 0x40 &req={0} ?WAIT2_END_GROUP;
IADD.64 R2, R2, 0x40 &req={1} ?WAIT3_END_GROUP;
IADD3 R15, PT, PT, R8, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64+0x1c], R15 &rd=0x0 ?trans2;
IADD.64 R6, R6, 0x40 &req={0} ?trans2;
@P0 BRA 0x120 ?trans6;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(int*, int*, int*)
_Z3addPiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x200, v1
s_cbranch_execz .LBB0_3
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 9, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[4:5], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
s_mov_b64 s[0:1], 0
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v6, vcc_lo, v0, s0
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v8, vcc_lo, v2, s0
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v3, vcc_lo
global_load_b32 v10, v[6:7], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v6, vcc_lo, v4, s0
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmpk_lg_i32 s0, 0x800
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v8, v8, v10
global_store_b32 v[6:7], v8, off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 2,704 | 823 | stackv2-00001-of-00015 |
// Demangled: emptyTour(ANTS*, float*, int)
Function : _Z9emptyTourP4ANTSPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R6, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?trans1;
ISETP.GE.AND P0, PT, R6, 0x1, PT &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R5, R6, !P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R6.reuse, 0x8, PT ?trans1;
LOP3.LUT R8, R6, 0x7, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IMAD.WIDE R2, R5, 0xf4, R2 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x7c ?trans2;
@!P1 BRA 0x2b0 &req={1} ?trans6;
LOP3.LUT R0, R6, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
MOV.64 R4, R2 ?trans2;
MOV R7, RZ ?trans1;
IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT7_END_GROUP;
IADD3 R0, PT, PT, R0, 0x8, RZ ?trans1;
STG.E desc[UR4][R4.64], RZ ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?trans1;
STG.E desc[UR4][R4.64+-0x74], RZ ?trans4;
STG.E desc[UR4][R4.64+0x4], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x70], RZ ?trans4;
STG.E desc[UR4][R4.64+0x8], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x6c], RZ ?trans4;
STG.E desc[UR4][R4.64+0xc], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x68], RZ ?trans4;
STG.E desc[UR4][R4.64+0x10], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x64], RZ ?trans4;
STG.E desc[UR4][R4.64+0x14], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x60], RZ ?trans4;
STG.E desc[UR4][R4.64+0x18], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x5c], RZ ?trans4;
STG.E desc[UR4][R4.64+0x1c], RZ ?trans4;
STG.E desc[UR4][R4.64+-0x58], RZ &rd=0x0 ?trans2;
IADD.64 R4, R4, 0x20 &req={0} ?WAIT2_END_GROUP;
@P1 BRA 0x160 ?trans6;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R8, 0x4, PT ?trans1;
LOP3.LUT R0, R6, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x3a0 ?trans6;
IMAD.WIDE.U32 R4, R7.reuse, 0x4, R2 ?trans1;
IADD3 R7, PT, PT, R7, 0x4, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R4.64], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+-0x74], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0x4], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+-0x70], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0x8], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+-0x6c], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+0xc], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R4.64+-0x68], RZ &rd=0x0 ?trans2;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R0, 0x1, PT ?trans1;
LOP3.LUT R0, R6, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@P0 IMAD.WIDE.U32 R4, R7.reuse, 0x4, R2 &req={0} ?trans1;
@P0 IADD3 R7, PT, PT, R7, 0x2, RZ ?WAIT4_END_GROUP;
@P0 STG.E desc[UR4][R4.64], RZ &rd=0x0 ?trans4;
@P0 STG.E desc[UR4][R4.64+-0x74], RZ &rd=0x0 ?trans4;
@P0 STG.E desc[UR4][R4.64+0x4], RZ &rd=0x0 ?trans4;
@P0 STG.E desc[UR4][R4.64+-0x70], RZ &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
IMAD.WIDE.U32 R2, R7, 0x4, R2 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], RZ ?trans4;
STG.E desc[UR4][R2.64+-0x74], RZ ?trans1;
EXIT ?trans5;
BRA 0x490;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: emptyTour(ANTS*, float*, int)
_Z9emptyTourP4ANTSPfi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB8_3
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[2:3], null, 0xf4, v1, s[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, 0x7c, v2
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v3, vcc_lo
v_mov_b32_e32 v2, 0
.LBB8_2:
s_clause 0x1
global_store_b32 v[0:1], v2, off
global_store_b32 v[0:1], v2, off offset:-116
v_add_co_u32 v0, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s2, 0
s_cbranch_scc1 .LBB8_2
.LBB8_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| emptyTour | 1,880 | 558 | stackv2-00001-of-00015 |
// Demangled: initializeTour(ANTS*, int)
Function : _Z14initializeTourP4ANTSi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R12, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R12, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R12, 0x1, PT ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R7 ?trans1;
IMAD.WIDE R2, R7, 0xf4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 &req={1} &rd=0x0 ?trans6;
@!P0 BRA 0x570 ?trans5;
ISETP.GE.U32.AND P1, PT, R12.reuse, 0x10, PT ?trans1;
LOP3.LUT R10, R12, 0xf, RZ, 0xc0, !PT ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R10, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x300 ?trans6;
IMAD R11, R0, 0xf4, RZ ?trans1;
LOP3.LUT R6, R12, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
IMAD.WIDE.U32 R8, R7, 0xf4, R4 ?trans1;
MOV R13, RZ ?trans2;
IADD3 R6, PT, PT, -R6, RZ, RZ ?trans2;
IADD3 R9, PT, PT, R9, R11, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R8, 0x24 ?WAIT8_END_GROUP;
IADD3 R6, PT, PT, R6, 0x10, RZ ?trans1;
STG.E desc[UR4][R8.64+-0x1c], RZ ?trans1;
IADD3 R13, PT, PT, R13, 0x10, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
STG.E desc[UR4][R8.64+-0x18], RZ ?trans4;
STG.E desc[UR4][R8.64+-0x14], RZ ?trans4;
STG.E desc[UR4][R8.64+-0x10], RZ ?trans4;
STG.E desc[UR4][R8.64+-0xc], RZ ?trans4;
STG.E desc[UR4][R8.64+-0x8], RZ ?trans4;
STG.E desc[UR4][R8.64+-0x4], RZ ?trans4;
STG.E desc[UR4][R8.64], RZ ?trans4;
STG.E desc[UR4][R8.64+0x4], RZ ?trans4;
STG.E desc[UR4][R8.64+0x8], RZ ?trans4;
STG.E desc[UR4][R8.64+0xc], RZ ?trans4;
STG.E desc[UR4][R8.64+0x10], RZ ?trans4;
STG.E desc[UR4][R8.64+0x14], RZ ?trans4;
STG.E desc[UR4][R8.64+0x18], RZ ?trans4;
STG.E desc[UR4][R8.64+0x1c], RZ ?trans4;
STG.E desc[UR4][R8.64+0x20], RZ &rd=0x1 ?trans2;
IADD.64 R8, R8, 0x40 &req={1} ?WAIT2_END_GROUP;
@P1 BRA 0x1b0 ?trans6;
@!P0 BRA 0x570 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x8, PT ?trans1;
LOP3.LUT R6, R12, 0x7, RZ, 0xc0, !PT ?trans1;
IADD.64 R8, R2, 0x8 ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x400 ?trans6;
IMAD.WIDE.U32 R10, R13.reuse, 0x4, R8 ?trans1;
IADD3 R13, PT, PT, R13, 0x8, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R10.64], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x4], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x8], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0xc], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x10], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x14], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x18], RZ &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+0x1c], RZ &rd=0x1 ?trans2;
@!P1 BRA 0x570 ?trans5;
ISETP.GE.U32.AND P0, PT, R6, 0x4, PT ?trans1;
LOP3.LUT R6, R12, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT7_END_GROUP;
@P0 IMAD.WIDE.U32 R8, R13.reuse, 0x4, R8 ?trans1;
@P0 IADD3 R13, PT, PT, R13, 0x4, RZ ?WAIT4_END_GROUP;
@P0 STG.E desc[UR4][R8.64], RZ &rd=0x2 ?trans4;
@P0 STG.E desc[UR4][R8.64+0x4], RZ &rd=0x2 ?trans4;
@P0 STG.E desc[UR4][R8.64+0x8], RZ &rd=0x2 ?trans4;
@P0 STG.E desc[UR4][R8.64+0xc], RZ &rd=0x2 ?trans1;
@!P1 BRA 0x570 ?trans5;
IMAD.WIDE.U32 R8, R13, 0x4, RZ &req={2} ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT3_END_GROUP;
IMAD R11, R0, 0xf4, RZ &req={1} ?trans2;
IMAD.WIDE.U32 R8, R7, 0xf4, R8 ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R11, R9, RZ ?WAIT5_END_GROUP;
IADD.64 R4, R8, R4 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x8 ?WAIT8_END_GROUP;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
STG.E desc[UR4][R4.64], RZ &rd=0x1 ?trans4;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
IADD.64 R4, R4, 0x4 &req={1} ?WAIT12_END_GROUP;
@P0 BRA 0x520 ?trans5;
LEA R4, P0, R7, R2, 0x2 ?trans1;
MOV R9, 0x1 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R5, R7, R3, R0, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64+0x8], R9 ?trans4;
STG.E desc[UR4][R2.64+0x7c], R7 ?trans4;
STG.E desc[UR4][R2.64+0xf0], RZ ?trans1;
EXIT ?trans5;
BRA 0x5e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initializeTour(ANTS*, int)
_Z14initializeTourP4ANTSi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB2_5
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_cmp_lt_i32 s2, 1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[3:4], null, 0xf4, v1, s[0:1]
global_store_b32 v[3:4], v1, off
s_cbranch_scc1 .LBB2_4
v_mad_i64_i32 v[3:4], null, 0xf4, v1, s[0:1]
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, v3, 8
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_3:
global_store_b32 v[3:4], v0, off
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cbranch_scc0 .LBB2_3
.LBB2_4:
v_mad_i64_i32 v[3:4], null, 0xf4, v1, s[0:1]
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_mov_b32_e32 v0, 1
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v5, vcc_lo, v3, v5
v_add_co_ci_u32_e32 v6, vcc_lo, v4, v6, vcc_lo
s_clause 0x2
global_store_b32 v[5:6], v0, off offset:8
global_store_b32 v[3:4], v1, off offset:124
global_store_b32 v[3:4], v2, off offset:240
.LBB2_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initializeTour | 2,407 | 821 | stackv2-00001-of-00015 |
// Demangled: setup_curand_states(curandStateXORWOW*, int)
Function : _Z19setup_curand_statesP17curandStateXORWOWi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R8, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R3, -RZ, RZ, -178.125, -3742 ?trans1;
BSSY.RECONVERGENT B0, 0xee0 ?trans5;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x4 ?trans1;
ISETP.GT.AND P0, PT, R0.reuse, -0x1, PT &req={2} ?trans1;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
SEL R3, R3, 0x8bf16996, P0 ?trans1;
IMAD R0, R0, 0x4182bed5, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
IADD3 R5, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
IADD3 R4, PT, PT, R3, 0x64f0c9, R0 ?trans2;
LOP3.LUT R10, R0.reuse, 0x159a55e5, RZ, 0x3c, !PT ?trans1;
IMAD R8, R9, UR6, R8 &req={1} ?trans1;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={4} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R6.64], R4 &req={3} &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x1 ?trans1;
@!P0 BRA 0xed0 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe60 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe50 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x300 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x290 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x250 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x1d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: setup_curand_states(hiprandState*, int)
_Z19setup_curand_statesP12hiprandStatei:
s_load_b64 s[0:1], s[0:1], 0x4
s_clause 0x1
s_load_b32 s4, s[2:3], 0x1c
s_load_b32 s5, s[2:3], 0x8
s_mov_b32 s6, 0x8a5d614f
v_bfe_u32 v2, v0, 10, 10
s_mov_b32 s18, exec_lo
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_and_b32 s4, s4, 0xffff
s_xor_b32 s7, s5, 0x2c7f967f
s_cmp_gt_i32 s5, -1
s_mul_i32 s7, s7, 0x493c4aa1
s_cselect_b32 s6, s6, 0xfa091aa4
s_add_i32 s8, s7, 0x583f19
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_dual_mov_b32 v4, s8 :: v_dual_and_b32 v1, 0x3ff, v0
s_mul_i32 s0, s0, s1
v_bfe_u32 v0, v0, 20, 10
v_mul_u32_u24_e32 v2, s1, v2
v_mul_lo_u32 v3, s0, v1
s_add_i32 s0, s7, 0x75bcd15
s_xor_b32 s1, s7, 0x159a55e5
s_xor_b32 s5, s6, 0x5491333
v_mad_u64_u32 v[5:6], null, s15, s4, v[1:2]
s_add_i32 s4, s6, 0x1f123bb5
s_add_i32 s6, s7, s6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v2, v3, v2, v0
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
s_add_i32 s0, s6, 0x64f0c9
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v8, v2, 48
v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
v_mov_b32_e32 v7, s0
s_mov_b32 s7, 0
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB1_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s15, s15, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB1_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB1_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB1_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[14:15]
s_mov_b32 s9, 0
.LBB1_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[16:17], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB1_6:
s_load_b32 s6, s[16:17], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s5
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s6, 0, vcc_lo
s_cselect_b32 s6, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s16, s16, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s5
v_cndmask_b32_e64 v3, v3, v11, s4
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s6
s_cbranch_scc0 .LBB1_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB1_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB1_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB1_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB1_4
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s14, s14, 0xc80
s_addc_u32 s15, s15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s7, vcc_lo, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB1_2
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s18
s_load_b64 s[0:1], s[2:3], 0x0
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[6:7], null, v5, 48, s[0:1]
s_clause 0x2
global_store_b128 v[6:7], v[0:3], off offset:32
global_store_b128 v[6:7], v[9:12], off offset:16
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| setup_curand_states | 7,956 | 3,106 | stackv2-00001-of-00015 |
// Demangled: tourConstruction(ANTS*, float*, float*, int, curandStateXORWOW*)
Function : _Z16tourConstructionP4ANTSPfS1_iP17curandStateXORWOW
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
UISETP.GE.AND UP0, UPT, UR6, 0x2, UPT &req={2} ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
IMAD R3, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR6, !P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R26, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R26, R3, 0xf4, R26 &req={0} ?WAIT5_END_GROUP;
LDG.E R2, desc[UR12][R26.64] &req={1} &rd=0x0 &wr=0x5 ?trans1;
IADD.64 R24, R26.reuse, 0x4 ?trans2;
IADD.64 R22, R26.reuse, 0x8 ?trans2;
IADD.64 R20, R26, 0x14 ?trans2;
ULOP3.LUT UR8, UR6, 0x7, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR4, UR6, 0x7ffffff8, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR6, UR6, 0x3, URZ, 0xc0, !UPT ?trans1;
UMOV UR10, 0x1 ?trans1;
UIADD3 UR9, UPT, UPT, UR8, -0x1, URZ ?trans1;
UIADD3 UR7, UPT, UPT, -UR4, URZ, URZ ?WAIT12_END_GROUP;
LDC R17, c[0x0][0x398] &req={1} &wr=0x1 ?trans1;
UMOV UR4, URZ ?trans1;
MOV.64 R18, RZ ?trans2;
ISETP.NE.AND P0, PT, RZ, UR8, PT ?trans1;
ISETP.GE.U32.AND P1, PT, R17, 0x8, PT &req={1} ?trans1;
IMAD R16, R2, R17, RZ &req={5} ?WAIT12_END_GROUP;
@!P1 BRA 0x900 ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
MOV.64 R18, RZ ?trans2;
MOV.64 R4, R20 ?trans2;
MOV R0, R16 ?trans1;
UMOV UR4, URZ ?trans1;
UMOV UR5, UR7 ?trans1;
IMAD.WIDE R6, R16, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
IADD.64 R6, R6, 0x10 ?WAIT8_END_GROUP;
LDG.E R8, desc[UR12][R4.64+-0xc] &wr=0x2 ?trans4;
LDG.E R3, desc[UR12][R4.64+-0x8] &wr=0x3 ?trans4;
LDG.E R12, desc[UR12][R4.64+-0x4] &wr=0x4 ?trans4;
LDG.E R13, desc[UR12][R4.64] &wr=0x5 ?trans4;
LDG.E R14, desc[UR12][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R15, desc[UR12][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R28, desc[UR12][R4.64+0xc] &wr=0x4 ?trans4;
LDG.E R29, desc[UR12][R4.64+0x10] &wr=0x4 ?trans1;
ISETP.NE.AND P1, PT, R8, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
ISETP.NE.AND P6, PT, R3, RZ, PT &req={3} ?WAIT13_END_GROUP;
@!P6 LDG.E R3, desc[UR12][R6.64+-0xc] &wr=0x2 ?trans1;
@!P1 IMAD.WIDE R8, R0, 0x4, R8 &req={1} ?WAIT6_END_GROUP;
@!P1 LDG.E R8, desc[UR12][R8.64] &wr=0x3 ?trans1;
ISETP.NE.AND P5, PT, R12, RZ, PT &req={4} ?trans1;
ISETP.NE.AND P4, PT, R13, RZ, PT &req={5} ?trans1;
ISETP.NE.AND P3, PT, R14, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R15, RZ, PT ?WAIT12_END_GROUP;
@!P3 LDG.E R12, desc[UR12][R6.64] &wr=0x4 ?trans4;
@!P2 LDG.E R13, desc[UR12][R6.64+0x4] &wr=0x5 ?trans1;
@!P1 F2F.F64.F32 R10, R8 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R18, R18, R10 &req={1} &rd=0x1 &wr=0x3 ?trans1;
ISETP.NE.AND P1, PT, R28, RZ, PT ?trans1;
@!P5 LDG.E R10, desc[UR12][R6.64+-0x8] &req={1} &wr=0x4 ?trans4;
@!P4 LDG.E R11, desc[UR12][R6.64+-0x4] &wr=0x5 ?trans8;
@!P1 LDG.E R14, desc[UR12][R6.64+0x8] &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P6 F2F.F64.F32 R8, R3 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P6 DADD R18, R18, R8 &req={3} &rd=0x4 &wr=0x1 ?trans1;
ISETP.NE.AND P6, PT, R29, RZ, PT ?WAIT13_END_GROUP;
@!P6 LDG.E R15, desc[UR12][R6.64+0xc] &rd=0x2 &wr=0x3 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 ?WAIT3_END_GROUP;
IADD3 R0, PT, PT, R0, 0x8, RZ ?trans1;
IADD.64 R6, R6, 0x20 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P5 F2F.F64.F32 R8, R10 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P5 DADD R18, R18, R8 &req={1} &rd=0x5 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P4 F2F.F64.F32 R8, R11 &req={5} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P4 DADD R18, R18, R8 &req={1} &rd=0x1 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 F2F.F64.F32 R8, R12 &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DADD R18, R18, R8 &req={2} &rd=0x1 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 F2F.F64.F32 R8, R13 &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DADD R18, R18, R8 &req={2} &rd=0x1 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 F2F.F64.F32 R8, R14 &req={1} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R18, R18, R8 &req={2} &rd=0x3 &wr=0x1 ?trans1;
ISETP.NE.AND P1, PT, RZ, UR5, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P6 F2F.F64.F32 R8, R15 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P6 DADD R18, R18, R8 &req={1} &rd=0x1 &wr=0x2 ?trans2;
@P1 BRA 0x260 &req={2,1} ?trans5;
@!P0 BRA 0x10e0 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR9, 0x3, UPT ?trans1;
ISETP.NE.AND P4, PT, RZ, UR6, PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0xd10 ?trans5;
MOV R5, UR4 ?trans1;
LDCU.64 UR14, c[0x0][0x390] &wr=0x1 ?trans4;
IMAD.WIDE.U32 R4, R5, 0x4, R22 ?WAIT5_END_GROUP;
LDG.E R3, desc[UR12][R4.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR12][R4.64+0x8] &wr=0x3 ?trans4;
LDG.E R0, desc[UR12][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R12, desc[UR12][R4.64+0xc] &wr=0x5 ?trans1;
USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R6, R16, UR4 ?trans2;
ISETP.NE.AND P0, PT, R3, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x390] &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT &req={3} ?trans1;
LEA R8, P3, R6, UR14, 0x2 &req={1} ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT &req={4} ?trans1;
@!P0 IADD3 R3, PT, PT, R16, UR4, RZ ?trans2;
LEA.HI.X R9, R6, UR15, R7, 0x2, P3 ?trans1;
ISETP.NE.AND P3, PT, R12, RZ, PT &req={5} ?trans2;
@!P0 IMAD.WIDE R4, R3, 0x4, R10 &req={2} ?WAIT7_END_GROUP;
@!P1 LDG.E R3, desc[UR12][R8.64+0x4] &wr=0x2 ?trans4;
@!P0 LDG.E R0, desc[UR12][R4.64] &wr=0x3 ?trans4;
@!P2 LDG.E R10, desc[UR12][R8.64+0x8] &wr=0x4 ?trans4;
@!P3 LDG.E R11, desc[UR12][R8.64+0xc] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
@!P0 F2F.F64.F32 R6, R0 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R18, R18, R6 &req={1} &rd=0x2 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 F2F.F64.F32 R6, R3 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R18, R18, R6 &req={1} &rd=0x4 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 F2F.F64.F32 R6, R10 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DADD R18, R18, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 F2F.F64.F32 R4, R11 &req={5} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DADD R18, R18, R4 &req={1} &rd=0x1 &wr=0x2 ?trans2;
@!P4 BRA 0x10e0 ?trans5;
LDC R0, c[0x0][0x398] &wr=0x3 ?trans1;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?trans2;
LOP3.LUT P2, RZ, R0, 0x1, RZ, 0xc0, !PT &req={3} ?WAIT11_END_GROUP;
@!P0 BRA 0xfc0 ?trans5;
MOV R5, UR4 &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R22 ?WAIT5_END_GROUP;
LDG.E R3, desc[UR12][R4.64] &wr=0x3 ?trans4;
LDG.E R0, desc[UR12][R4.64+0x4] &wr=0x4 ?trans1;
MOV R10, UR4 ?trans1;
ISETP.NE.AND P0, PT, R3, RZ, PT &req={3} ?trans1;
ISETP.NE.AND P1, PT, R0, RZ, PT &req={4} ?trans1;
MOV R0, UR4 ?WAIT11_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
@!P0 IADD3 R3, PT, PT, R16, UR4, RZ ?trans2;
@!P1 SHF.R.S32.HI R11, RZ, 0x1f, R0 ?trans2;
@!P1 SHF.R.S32.HI R9, RZ, 0x1f, R16 ?WAIT3_END_GROUP;
@!P1 LDC.64 R12, c[0x0][0x390] &wr=0x3 ?trans1;
@!P1 MOV R8, R16 ?WAIT5_END_GROUP;
@!P1 IADD.64 R10, R8, R10 ?trans2;
@!P0 IMAD.WIDE R6, R3, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
@!P0 LDG.E R6, desc[UR12][R6.64] &wr=0x4 ?trans1;
@!P1 LEA R8, P3, R10, R12, 0x2 &req={3} ?WAIT4_END_GROUP;
@!P1 LEA.HI.X R9, R10, R13, R11, 0x2, P3 ?WAIT5_END_GROUP;
@!P1 LDG.E R8, desc[UR12][R8.64+0x4] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@!P0 F2F.F64.F32 R4, R6 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R18, R18, R4 &req={2,1} &rd=0x3 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 F2F.F64.F32 R4, R8 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R18, R18, R4 &req={1} &rd=0x3 &wr=0x4 ?trans2;
@!P2 BRA 0x10e0 ?trans5;
MOV R5, UR4 &req={3,1} ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R4, R5, 0x4, R22 ?WAIT6_END_GROUP;
LDG.E R4, desc[UR12][R4.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x10e0 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x10d0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R16, UR4, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R3, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR12][R4.64] &wr=0x3 ?trans2;
F2F.F64.F32 R6, R4 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R6 &req={4,2,1} &rd=0x1 &wr=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R12, c[0x0][0x3a0] &wr=0x5 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x1710 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x1 ?trans5;
LDC.64 R14, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE R12, R2, 0x30, R12 &req={5} ?trans1;
MOV R2, UR4 &req={1,0} ?WAIT7_END_GROUP;
BSSY.RECONVERGENT B1, 0x11e0 ?trans1;
IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT ?WAIT5_END_GROUP;
SEL R2, R2, RZ, !P0 ?WAIT5_END_GROUP;
IMAD.WIDE R10, R2, 0x4, R22 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR12][R10.64] &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={5} ?WAIT13_END_GROUP;
@P0 BRA 0x1160 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R5, PT, PT, R2, R16, RZ &req={3} ?WAIT5_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R14 &req={4} ?WAIT5_END_GROUP;
LDG.E R28, desc[UR12][R4.64] &wr=0x3 ?trans1;
MUFU.RCP64H R7, R19 &req={2} &wr=0x0 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B1, 0x1580 ?trans5;
DFMA R8, R6, -R18, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, R8, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, -R18, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R28, R28 &req={3} &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R29|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R28, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R8, -R18, R28 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, R30, R8 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R19, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1570 ?trans5;
MOV R6, R18 ?trans1;
MOV R7, R19 ?trans1;
MOV R0, 0x1550 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1860 ?trans5;
MOV R4, R30 ?trans1;
MOV R5, R31 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDG.E.64 R28, desc[UR12][R12.64] &wr=0x2 ?trans4;
LDG.E.64 R6, desc[UR12][R12.64+0x10] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR12][R12.64+0x8] &wr=0x4 ?trans1;
F2F.F32.F64 R4, R4 &wr=0x0 ?trans1;
SHF.R.U32.HI R0, RZ, 0x2, R29 &req={2} ?WAIT2_END_GROUP;
IADD3 R28, PT, PT, R28, 0x587c5, RZ ?trans2;
LOP3.LUT R0, R0, R29, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R30, R7, 0x10, RZ &req={3} ?trans1;
MOV R31, R6 ?trans1;
MOV R29, R8 &req={4} ?trans1;
IADD3 R3, PT, PT, R0, R0, RZ ?trans1;
MOV R8, R7 ?WAIT3_END_GROUP;
STG.E.64 desc[UR12][R12.64], R28 &rd=0x1 ?trans1;
LOP3.LUT R3, R7, R30, R3, 0x96, !PT ?trans1;
MOV R30, R9 ?WAIT3_END_GROUP;
LOP3.LUT R9, R3, R0, RZ, 0x3c, !PT ?trans1;
HFMA2 R3, -RZ, RZ, 0.1171875, 0 ?trans1;
STG.E.64 desc[UR12][R12.64+0x8], R30 &rd=0x1 ?trans2;
IADD3 R0, PT, PT, R9, R28, RZ ?trans2;
STG.E.64 desc[UR12][R12.64+0x10], R8 &rd=0x1 ?trans2;
I2FP.F32.U32 R0, R0 ?WAIT5_END_GROUP;
FFMA R3, R0, R3, 1.1641532182693481445e-10 ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R3, R4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1150 &req={1} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
MOV R5, UR10 ?trans1;
MOV R9, 0x1 ?trans1;
STG.E desc[UR12][R26.64+0x4], R2 &rd=0x1 ?trans1;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R5, 0x4, R24 ?trans1;
STG.E desc[UR12][R10.64], R9 &rd=0x1 ?trans4;
STG.E desc[UR12][R4.64+0x78], R2 &rd=0x1 ?trans4;
LDG.E R3, desc[UR12][R26.64] &wr=0x2 ?trans2;
IMAD R3, R3, UR4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R3, 0x4, R6 &req={0} ?trans2;
LDG.E R3, desc[UR12][R26.64+0xf0] &wr=0x2 ?trans4;
LDG.E R6, desc[UR12][R6.64] &wr=0x2 ?trans1;
UIADD3 UR10, UPT, UPT, UR10, 0x1, URZ ?WAIT3_END_GROUP;
STG.E desc[UR12][R26.64], R2 &rd=0x1 ?trans1;
UISETP.NE.AND UP0, UPT, UR10, UR4, UPT ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
FADD R3, R6, R3 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R26.64+0xf0], R3 &rd=0x1 ?trans7;
@P0 BRA 0x170 ?trans5;
EXIT ?trans5;
MOV R5, R29 ?trans1;
MOV R4, R28 ?trans1;
LOP3.LUT R37, R7.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
HFMA2 R36, -RZ, RZ, 0.0045166015625, 0 ?trans1;
FSETP.GEU.AND P0, PT, |R7|, 1.469367938527859385e-39, PT ?trans1;
FSETP.GEU.AND P2, PT, |R5|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R3, R5, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x2070 ?trans1;
LOP3.LUT R8, R7, 0x800fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R3, R37, PT ?trans1;
LOP3.LUT R9, R8, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R8, R6 ?WAIT3_END_GROUP;
SEL R29, R36, 0x63400000, !P1 ?trans2;
@!P2 LOP3.LUT R28, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P2 MOV R30, RZ ?trans2;
LOP3.LUT R29, R29, 0x800fffff, R5, 0xf8, !PT ?trans1;
@!P0 DMUL R8, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
@!P2 ISETP.GE.U32.AND P3, PT, R3, R28, PT ?trans1;
MOV R28, R4 ?trans1;
@!P0 LOP3.LUT R37, R9, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT3_END_GROUP;
@!P2 SEL R31, R36, 0x63400000, !P3 ?WAIT5_END_GROUP;
@!P2 LOP3.LUT R31, R31, 0x80000000, R5, 0xf8, !PT ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R31, R31, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R28, R28, 2, -R30 &rd=0x0 ?trans2;
MUFU.RCP64H R31, R9 &req={0} &wr=0x0 ?trans1;
MOV R30, 0x1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R30, -R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R32, R32, R32 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R30, R32, R30 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R32, -R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R32, R30, R32 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R32, R30, R28 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R32, -R8, R28 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R30, R34, R32 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R32, R3 &req={0} ?trans1;
@!P2 LOP3.LUT R32, R29, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R30, PT, PT, R32, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R30, 0x7feffffe, PT ?trans1;
IADD3 R30, PT, PT, R37, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R30, 0x7feffffe, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x1f20 &req={1} ?trans5;
LOP3.LUT R30, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R3.reuse, -R30.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R3, R30, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R4, R4, -0x46a00000, !PT ?trans1;
SEL R36, R36, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R3, R4, 0x46a00000, PT ?trans1;
MOV R4, RZ ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, -R36, R3, RZ ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R3, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R30, R34, R4 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R31|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2060 ?trans5;
DFMA R8, R34, -R8, R28 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, R9.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R7, R9, 0x80000000, R7, 0x48, !PT ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
LOP3.LUT R9, R7, R5, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x2060 ?trans5;
IADD3 R5, PT, PT, -R3.reuse, RZ, RZ ?trans1;
MOV R4, RZ ?trans1;
IADD3 R3, PT, PT, -R3, -0x43300000, RZ ?trans1;
DMUL.RP R8, R34, R8 &wr=0x0 ?trans2;
LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R30, -R4, R34 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R5|, R3, PT &req={0} ?WAIT5_END_GROUP;
FSEL R30, R8, R30, !P0 ?trans1;
FSEL R31, R7, R31, !P0 ?trans1;
BRA 0x2060 ?trans6;
DSETP.NAN.AND P0, PT, R4, R4, PT &wr=0x0 ?trans2;
@P0 BRA 0x2040 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0x2010 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R32, R37, PT ?trans1;
MOV.64 R30, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x2060 ?trans5;
ISETP.NE.AND P0, PT, R32, 0x7ff00000, PT ?trans1;
LOP3.LUT R31, R5, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R37, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R3, R31, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R30, RZ ?trans1;
@P0 MOV R30, RZ ?WAIT3_END_GROUP;
@P0 MOV R31, R3 ?trans1;
BRA 0x2060 ?trans6;
LOP3.LUT R31, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R30, R6 ?trans1;
BRA 0x2060 ?trans6;
LOP3.LUT R31, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R30, R4 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
MOV R4, R0 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x20a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: tourConstruction(ANTS*, float*, float*, int, hiprandState*)
_Z16tourConstructionP4ANTSPfS1_iP12hiprandState:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s12, s[0:1], 0x18
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, 1
v_max_i32_e32 v0, 1, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s12, v0
s_cbranch_execz .LBB4_10
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b64 s[10:11], s[0:1], 0x20
v_mov_b32_e32 v0, 1
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[2:3], null, 0xf4, v1, s[4:5]
v_mad_i64_i32 v[10:11], null, 0xf4, v1, s[4:5]
global_load_b32 v8, v[2:3], off
v_add_co_u32 v4, vcc_lo, 0xf0, v2
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, v2, 8
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
v_add_co_u32 v12, vcc_lo, v2, 0xf0
v_add_co_ci_u32_e32 v13, vcc_lo, 0, v3, vcc_lo
.LBB4_2:
s_waitcnt vmcnt(0)
v_mul_lo_u32 v20, v8, s12
v_dual_mov_b32 v14, 0 :: v_dual_mov_b32 v17, v7
v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v16, v6
s_mov_b32 s0, 0
.LBB4_3:
global_load_b32 v9, v[16:17], off
s_mov_b32 s1, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e32 0, v9
s_cbranch_execz .LBB4_5
v_add_nc_u32_e32 v18, s0, v20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v19, 31, v18
v_lshlrev_b64 v[18:19], 2, v[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v18, vcc_lo, s8, v18
v_add_co_ci_u32_e32 v19, vcc_lo, s9, v19, vcc_lo
global_load_b32 v9, v[18:19], off
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[18:19], v9
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[14:15], v[14:15], v[18:19]
.LBB4_5:
s_or_b32 exec_lo, exec_lo, s1
v_add_co_u32 v16, vcc_lo, v16, 4
v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s12, s0
s_cbranch_scc0 .LBB4_3
v_mad_i64_i32 v[16:17], null, v8, 48, s[10:11]
v_mov_b32_e32 v8, s12
s_mov_b32 s1, 0
s_mov_b32 s0, 0
.LBB4_7:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v8, 1, v8
v_cmp_gt_i32_e32 vcc_lo, s12, v8
v_cndmask_b32_e32 v8, 0, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v9, 31, v8
v_lshlrev_b64 v[18:19], 2, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v18, vcc_lo, v10, v18
v_add_co_ci_u32_e32 v19, vcc_lo, v11, v19, vcc_lo
global_load_b32 v9, v[18:19], off offset:8
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v9
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB4_7
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v21, v8, v20
v_add_co_u32 v18, s0, v18, 8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v19, s0, 0, v19, s0
v_ashrrev_i32_e32 v22, 31, v21
s_mov_b32 s0, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[21:22], 2, v[21:22]
v_add_co_u32 v21, vcc_lo, s8, v21
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v22, vcc_lo, s9, v22, vcc_lo
global_load_b32 v9, v[21:22], off
s_clause 0x1
global_load_b128 v[21:24], v[16:17], off offset:24
global_load_b32 v25, v[16:17], off offset:40
s_waitcnt vmcnt(2)
v_cvt_f64_f32_e32 v[26:27], v9
global_load_b32 v9, v[16:17], off
v_div_scale_f64 v[28:29], null, v[14:15], v[14:15], v[26:27]
v_div_scale_f64 v[34:35], vcc_lo, v[26:27], v[14:15], v[26:27]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[30:31], v[28:29]
s_waitcnt_depctr 0xfff
v_fma_f64 v[32:33], -v[28:29], v[30:31], 1.0
v_fma_f64 v[30:31], v[30:31], v[32:33], v[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[32:33], -v[28:29], v[30:31], 1.0
v_fma_f64 v[30:31], v[30:31], v[32:33], v[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[32:33], v[34:35], v[30:31]
v_fma_f64 v[28:29], -v[28:29], v[32:33], v[34:35]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v9, 0x587c5, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[28:29], v[28:29], v[30:31], v[32:33]
v_div_fixup_f64 v[26:27], v[28:29], v[14:15], v[26:27]
v_lshrrev_b32_e32 v28, 2, v21
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v21, v28, v21
v_lshlrev_b32_e32 v28, 1, v21
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v26, v[26:27]
v_lshlrev_b32_e32 v27, 4, v25
v_xor_b32_e32 v27, v28, v27
s_delay_alu instid0(VALU_DEP_1)
v_xor3_b32 v21, v27, v21, v25
s_clause 0x2
global_store_b32 v[16:17], v9, off
global_store_b128 v[16:17], v[22:25], off offset:24
global_store_b32 v[16:17], v21, off offset:40
v_add_nc_u32_e32 v27, v21, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v27, v27
v_fmaak_f32 v27, 0x2f800000, v27, 0x2f800000
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_f32_e32 vcc_lo, v27, v26
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB4_7
s_or_b32 exec_lo, exec_lo, s1
s_clause 0x1
global_store_b32 v[12:13], v8, off offset:-236
global_store_b32 v[18:19], v0, off
s_clause 0x1
global_load_b32 v9, v[2:3], off
global_load_b32 v16, v[4:5], off
s_lshl_b64 s[0:1], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s5
s_add_i32 s2, s2, 1
s_cmp_lg_u32 s2, s12
s_waitcnt vmcnt(1)
v_mad_u64_u32 v[14:15], null, v9, s12, v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v15, 31, v14
v_lshlrev_b64 v[14:15], 2, v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v14, vcc_lo, s6, v14
v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
global_load_b32 v9, v[14:15], off
v_mad_i64_i32 v[14:15], null, 0xf4, v1, s[0:1]
s_waitcnt vmcnt(0)
v_add_f32_e32 v9, v9, v16
s_clause 0x2
global_store_b32 v[12:13], v9, off
global_store_b32 v[14:15], v8, off offset:124
global_store_b32 v[2:3], v8, off
s_cbranch_scc1 .LBB4_2
.LBB4_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| tourConstruction | 11,158 | 3,690 | stackv2-00001-of-00015 |
// Demangled: updatePheromone(float*, float*, int)
Function : _Z15updatePheromonePfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans1;
MOV R9, UR5 &req={2} ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R9, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.AND P0, PT, R0, 0x1, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x890 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT10_END_GROUP;
@!P0 BRA 0x880 ?trans5;
I2F.F64 R4, R9 &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R5, 0x300402, RZ &req={1} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ?trans1;
MUFU.RCP64H R3, R5 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R2, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, R6, R2 &req={1} &rd=0x1 &wr=0x2 ?trans2;
IMAD R2, R0, R9, RZ &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R4, R6, 1 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R10, R6 &req={1} &rd=0x1 &wr=0x2 ?trans2;
@P0 BRA 0x340 &req={2,1} ?trans5;
LOP3.LUT R3, R5, 0x7fffffff, RZ, 0xc0, !PT ?trans1;
MOV R8, R4 ?trans1;
MOV R9, R5 ?trans1;
MOV R6, 0x320 ?trans1;
IADD3 R12, PT, PT, R3, -0x100000, RZ ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x13f0 &req={0} ?trans5;
MOV R6, R10 ?trans1;
MOV R7, R11 ?WAIT7_END_GROUP;
LDCU UR6, c[0x0][0x390] &wr=0x1 ?trans1;
F2F.F32.F64 R8, R6 &rd=0x2 &wr=0x3 ?trans1;
BSSY.RECONVERGENT B1, 0x730 ?trans1;
MOV R9, UR6 &req={1} ?WAIT5_END_GROUP;
VIMNMX.S32 R3, R0, R9, PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R3.reuse, 0x4, PT ?trans1;
VIMNMX.S32 R10, R3, 0x1, !PT ?trans1;
MOV R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R14, R10, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?trans2;
@!P1 BRA 0x720 &req={3,2} ?trans11;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
LOP3.LUT R10, R10, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R15, R2 ?trans2;
IADD3 R16, PT, PT, -R10, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IADD.64 R4, R4, 0x8 &req={1} ?trans2;
IADD.64 R6, R6, 0x8 &req={2} ?WAIT8_END_GROUP;
IMAD.WIDE R10, R15, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR4][R10.64+-0x8] &req={0} &wr=0x2 ?trans2;
FMUL R13, R12, 0.5 &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R13, RZ, PT ?WAIT5_END_GROUP;
FSEL R17, R8, R13, !P1 ?trans1;
IMAD.WIDE R12, R15, 0x4, R6 ?WAIT4_END_GROUP;
STG.E desc[UR4][R10.64+-0x8], R17 &rd=0x0 ?trans4;
LDG.E R18, desc[UR4][R12.64+-0x8] &wr=0x2 ?trans2;
FADD R19, R17, R18 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64+-0x8], R19 &rd=0x1 ?trans4;
STG.E desc[UR4][R12.64+-0x8], RZ ?trans4;
LDG.E R18, desc[UR4][R10.64+-0x4] &wr=0x2 ?trans2;
FMUL R21, R18, 0.5 &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R21, RZ, PT ?WAIT5_END_GROUP;
FSEL R21, R8, R21, !P1 ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64+-0x4], R21 &rd=0x2 ?trans4;
LDG.E R18, desc[UR4][R12.64+-0x4] &wr=0x0 ?trans2;
FADD R17, R21, R18 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64+-0x4], R17 &rd=0x0 ?trans4;
STG.E desc[UR4][R12.64+-0x4], RZ ?trans4;
LDG.E R18, desc[UR4][R10.64] &wr=0x1 ?trans2;
FMUL R19, R18, 0.5 &req={1} ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R19, RZ, PT ?WAIT5_END_GROUP;
FSEL R19, R8, R19, !P1 ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64], R19 &rd=0x1 ?trans4;
LDG.E R18, desc[UR4][R12.64] &wr=0x2 ?trans2;
FADD R21, R19, R18 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64], R21 &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64], RZ &rd=0x2 ?trans4;
LDG.E R17, desc[UR4][R10.64+0x4] &req={0} &wr=0x3 ?trans2;
FMUL R17, R17, 0.5 &req={3} ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R17, RZ, PT ?WAIT5_END_GROUP;
FSEL R17, R8, R17, !P1 ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64+0x4], R17 &rd=0x2 ?trans4;
LDG.E R18, desc[UR4][R12.64+0x4] &wr=0x1 ?trans1;
IADD3 R16, PT, PT, R16, 0x4, RZ ?trans2;
IADD3 R3, PT, PT, R3, 0x4, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x4, RZ ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
FADD R19, R17, R18 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R10.64+0x4], R19 &rd=0x2 ?trans4;
STG.E desc[UR4][R12.64+0x4], RZ &rd=0x2 ?trans3;
@P1 BRA 0x470 ?trans5;
BSYNC.RECONVERGENT B1 &req={0} ?trans5;
@!P0 BRA 0x880 ?trans5;
LDC.64 R12, c[0x0][0x380] &req={2} &wr=0x0 ?trans1;
IADD3 R15, PT, PT, R3.reuse, R2, RZ ?trans2;
IADD3 R3, PT, PT, R3, R14, RZ ?trans2;
IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans4;
IMAD.WIDE R6, R15, 0x4, R12 &req={3,0} ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R6.64] &wr=0x2 ?trans2;
FMUL R5, R2, 0.5 &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R5, RZ, PT ?WAIT5_END_GROUP;
FSEL R17, R8, R5, !P0 ?trans1;
IMAD.WIDE R4, R15, 0x4, R10 &req={1} ?WAIT4_END_GROUP;
STG.E desc[UR4][R6.64], R17 &rd=0x3 ?trans4;
LDG.E R2, desc[UR4][R4.64] &wr=0x2 ?trans1;
IADD3 R14, PT, PT, R14, 0x1, RZ ?trans2;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?trans1;
FADD R19, R17, R2 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R19 &rd=0x3 ?trans4;
STG.E desc[UR4][R4.64], RZ &rd=0x3 ?trans3;
@P0 BRA 0x790 ?trans5;
BSYNC.RECONVERGENT B0 &req={0} ?trans5;
ISETP.GE.AND P0, PT, R3, R9, PT ?trans1;
BSSY.RECONVERGENT B0, 0xc70 ?WAIT12_END_GROUP;
@P0 BRA 0xc60 ?trans5;
LDC.64 R4, c[0x0][0x380] &req={3} &wr=0x0 ?trans1;
IMAD R2, R0, R9, R3 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R4.64] &req={2} &rd=0x0 &wr=0x5 ?trans1;
ISETP.NE.AND P0, PT, R0, R3, PT ?trans1;
BSSY.RECONVERGENT B1, 0xbe0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R2 ?WAIT11_END_GROUP;
@!P0 BRA 0xbd0 &req={0} ?trans5;
FMUL R11, R11, 0.5 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x0 ?trans1;
FSETP.GEU.AND P0, PT, R11, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0xbd0 &req={0} ?trans5;
I2F.F64 R8, R9 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B2, 0xbb0 ?trans1;
IADD3 R10, PT, PT, R9, 0x300402, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R10|, 5.8789094863358348022e-39, PT ?trans1;
MUFU.RCP64H R11, R9 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R8, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R8, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R14, R12 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xba0 &req={1,0} ?trans5;
LOP3.LUT R12, R9, 0x7fffffff, RZ, 0xc0, !PT ?trans1;
MOV R6, 0xba0 ?WAIT3_END_GROUP;
IADD3 R12, PT, PT, R12, -0x100000, RZ ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x13f0 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
F2F.F32.F64 R11, R10 &wr=0x0 ?trans2;
STG.E desc[UR4][R4.64], R11 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x1 ?trans2;
LEA R6, P0, R2, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R7, R2, UR7, R7, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R6.64] &wr=0x2 ?trans1;
IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
FADD R11, R2, R11 &req={5,2,0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x0 ?trans4;
STG.E desc[UR4][R6.64], RZ &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR6, c[0x0][0x390] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R3, UR6, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
I2F.F64 R6, UR6 &req={3,0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R7, 0x300402, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R4|, 5.8789094863358348022e-39, PT ?trans1;
MUFU.RCP64H R5, R7 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R8, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R6, R8, 1 &req={2,0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R10, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xef0 &req={1,0} ?trans5;
LOP3.LUT R12, R7, 0x7fffffff, RZ, 0xc0, !PT ?trans1;
MOV R8, R6 ?trans1;
MOV R9, R7 ?trans1;
MOV R6, 0xed0 ?trans1;
IADD3 R12, PT, PT, R12, -0x100000, RZ ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x13f0 ?trans5;
MOV R4, R10 ?trans1;
MOV R5, R11 ?WAIT7_END_GROUP;
LDCU UR6, c[0x0][0x390] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x10d0 ?trans1;
MOV R13, R3 ?trans1;
IADD3 R2, PT, PT, -R3.reuse, UR6, RZ &req={0} ?trans2;
IADD3 R6, PT, PT, R3, -UR6, RZ ?trans2;
LOP3.LUT P1, R12, R2, 0x3, RZ, 0xc0, !PT ?trans2;
F2F.F32.F64 R2, R4 &rd=0x0 &wr=0x1 ?trans1;
ISETP.GT.U32.AND P0, PT, R6, -0x4, PT ?WAIT10_END_GROUP;
@!P1 BRA 0x10c0 &req={1,0} ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R12.reuse, R3, RZ ?trans2;
IADD3 R12, PT, PT, -R12, RZ, RZ ?trans1;
IMAD R3, R0, UR6, R3 ?WAIT4_END_GROUP;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans3;
IMAD.WIDE R6, R3, 0x4, R10 &req={2,0} ?WAIT5_END_GROUP;
LDG.E R4, desc[UR4][R6.64] &wr=0x2 ?trans2;
FMUL R5, R4, 0.5 &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, R5, RZ, PT ?WAIT5_END_GROUP;
FSEL R15, R2, R5, !P1 ?trans1;
IMAD.WIDE R4, R3, 0x4, R8 &req={1} ?WAIT4_END_GROUP;
STG.E desc[UR4][R6.64], R15 &rd=0x2 ?trans4;
LDG.E R14, desc[UR4][R4.64] &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x1, RZ ?trans2;
IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R12, RZ, PT ?trans1;
FADD R17, R15, R14 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R17 &rd=0x2 ?trans4;
STG.E desc[UR4][R4.64], RZ &rd=0x2 ?trans3;
@P1 BRA 0xfd0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &req={2} &wr=0x0 ?trans1;
IMAD R3, R0, UR6, R13 ?trans1;
IADD3 R13, PT, PT, R13, -UR6, RZ ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IADD.64 R4, R4, 0x8 &req={0} ?trans2;
IADD.64 R6, R6, 0x8 &req={1} ?WAIT8_END_GROUP;
IMAD.WIDE R8, R3, 0x4, R4 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R8.64+-0x8] &wr=0x2 ?trans2;
FMUL R11, R0, 0.5 &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R11, RZ, PT ?WAIT5_END_GROUP;
FSEL R15, R2, R11, !P0 ?trans1;
IMAD.WIDE R10, R3, 0x4, R6 ?WAIT4_END_GROUP;
STG.E desc[UR4][R8.64+-0x8], R15 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R10.64+-0x8] &wr=0x2 ?trans2;
FADD R17, R15, R0 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+-0x8], R17 &rd=0x1 ?trans4;
STG.E desc[UR4][R10.64+-0x8], RZ ?trans4;
LDG.E R0, desc[UR4][R8.64+-0x4] &wr=0x2 ?trans2;
FMUL R19, R0, 0.5 &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R19, RZ, PT ?WAIT5_END_GROUP;
FSEL R19, R2, R19, !P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+-0x4], R19 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R10.64+-0x4] &wr=0x0 ?trans2;
FADD R15, R19, R0 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+-0x4], R15 &rd=0x0 ?trans4;
STG.E desc[UR4][R10.64+-0x4], RZ ?trans4;
LDG.E R0, desc[UR4][R8.64] &wr=0x1 ?trans2;
FMUL R17, R0, 0.5 &req={1} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R17, RZ, PT ?WAIT5_END_GROUP;
FSEL R17, R2, R17, !P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R17 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R10.64] &wr=0x2 ?trans2;
FADD R19, R17, R0 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
STG.E desc[UR4][R10.64], RZ &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R8.64+0x4] &wr=0x0 ?trans2;
FMUL R15, R0, 0.5 &req={0} ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, R15, RZ, PT ?WAIT5_END_GROUP;
FSEL R15, R2, R15, !P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+0x4], R15 &rd=0x2 ?trans4;
LDG.E R0, desc[UR4][R10.64+0x4] &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R13, 0x4, RZ ?trans2;
IADD3 R3, PT, PT, R3, 0x4, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R13, RZ, PT ?trans1;
FADD R17, R15, R0 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+0x4], R17 &rd=0x2 ?trans4;
STG.E desc[UR4][R10.64+0x4], RZ &rd=0x2 ?trans3;
@P0 BRA 0x1140 ?trans5;
EXIT ?trans5;
DSETP.GTU.AND P0, PT, |R8|, +INF , PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B3, 0x19c0 ?trans4;
@P0 BRA 0x1990 &req={0} ?trans5;
LOP3.LUT R13, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R13, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R10, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 LOP3.LUT R11, R9, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P0 MOV R10, RZ ?trans1;
@P0 BRA 0x19b0 ?trans6;
ISETP.GE.U32.AND P0, PT, R13, 0x1000001, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1770 ?trans5;
IADD3 R11, PT, PT, R9, -0x3fe00000, RZ ?trans1;
MOV R10, R8 ?WAIT3_END_GROUP;
MUFU.RCP64H R13, R11 &wr=0x0 ?trans3;
DFMA R14, -R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R10, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R14, R12, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R8, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R8, R12 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x19b0 &req={1,0} ?trans5;
DMUL R8, R8, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R10, R12 ?trans1;
MUFU.RCP64H R11, R9 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R8, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R8, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x19b0 &req={0} ?trans5;
LOP3.LUT R11, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R10, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
MOV R8, R6 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R8 0x0 ?trans5;
BRA 0x19f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: updatePheromone(float*, float*, int)
_Z15updatePheromonePfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_max_i32_e32 v0, 0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB7_6
v_cvt_f64_i32_e32 v[2:3], s4
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 1.0
v_rcp_f64_e32 v[6:7], v[4:5]
s_waitcnt_depctr 0xfff
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_div_scale_f64 v[8:9], vcc_lo, 1.0, v[2:3], 1.0
v_mul_f64 v[10:11], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
v_mov_b32_e32 v7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0
v_cvt_f32_f64_e32 v0, v[2:3]
v_mul_lo_u32 v2, v1, s4
.LBB7_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
s_mov_b32 s5, exec_lo
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_cmpx_ne_u32_e32 0, v1
s_cbranch_execz .LBB7_5
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v4, vcc_lo
global_load_b32 v8, v[5:6], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v8, 0.5, v8
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_f32_e32 vcc_lo, 0, v8
global_store_b32 v[5:6], v8, off
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB7_5
global_store_b32 v[5:6], v0, off
.LBB7_5:
s_or_b32 exec_lo, exec_lo, s5
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s0, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_nc_u32_e32 v2, 1, v2
global_load_b32 v8, v[5:6], off
global_load_b32 v9, v[3:4], off
v_add_nc_u32_e32 v1, -1, v1
s_add_i32 s4, s4, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s4, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v8, v9
global_store_b32 v[3:4], v8, off
global_store_b32 v[5:6], v7, off
s_cbranch_scc1 .LBB7_2
.LBB7_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| updatePheromone | 8,787 | 1,513 | stackv2-00001-of-00015 |
// Demangled: parallelCoprimeCount(int*, int*, unsigned int)
Function : _Z20parallelCoprimeCountPiS_j
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &rd=0x0 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x2e0 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0x2d0 &req={0} ?trans5;
MOV R6, R4 ?WAIT7_END_GROUP;
IABS R8, R6.reuse ?trans2;
IABS R11, R6 ?trans2;
I2F.RP R7, R8 &wr=0x0 ?trans1;
IABS R10, R0 &req={5} ?trans1;
MUFU.RCP R7, R7 &req={0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R7, 0xffffffe, RZ &req={0} ?trans2;
IADD3 R7, PT, PT, RZ, -R11, RZ ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R9, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R9, R9, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R9, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R10, RZ ?WAIT4_END_GROUP;
IMAD R5, R5, R7, R10 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R5, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R5, PT, PT, R5, -R8, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
MOV R0, R6 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R5, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R5, PT, PT, R5, -R8, RZ ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R5, RZ, R6, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, RZ, PT ?trans1;
MOV R6, R5 ?WAIT12_END_GROUP;
@P0 BRA 0x130 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R0, 0x1, PT &req={5} ?WAIT13_END_GROUP;
@!P0 MOV R5, 0x1 ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R2.64], R5 &rd=0x0 ?trans1;
@!P0 EXIT ?trans5;
STG.E desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x340;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: parallelCoprimeCount(int*, int*, unsigned int)
_Z20parallelCoprimeCountPiS_j:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB2_5
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s1, 0
global_load_b32 v4, v[2:3], off
global_load_b32 v2, v[0:1], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(1)
v_cmpx_ne_u32_e32 0, v4
s_cbranch_execz .LBB2_4
.LBB2_2:
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v7, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v3, v4 :: v_dual_add_nc_u32 v2, v2, v7
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v2, v2, v7
v_add_nc_u32_e32 v5, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v5, v4
v_cvt_f32_u32_e32 v5, v4
v_sub_nc_u32_e32 v6, 0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v5, v5
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v5, 0x4f7ffffe, v5
v_cvt_u32_f32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v6, v6, v5
v_mul_hi_u32 v6, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, v5, v6
v_mul_hi_u32 v5, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v5, v4
v_sub_nc_u32_e32 v2, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, v2, v4
v_cmp_ge_u32_e32 vcc_lo, v2, v4
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, v2, v4
v_cmp_ge_u32_e32 vcc_lo, v2, v4
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v7
v_sub_nc_u32_e32 v4, v2, v7
v_mov_b32_e32 v2, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v4
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB2_2
s_or_b32 exec_lo, exec_lo, s1
v_mov_b32_e32 v2, v3
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 1, v2
v_cndmask_b32_e64 v2, 0, 1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB2_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| parallelCoprimeCount | 1,292 | 1,586 | stackv2-00001-of-00015 |
// Demangled: parallelCoprimeCountAtomicAdd(int*, int*, unsigned int*, unsigned int)
Function : _Z29parallelCoprimeCountAtomicAddPiS_Pjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &rd=0x0 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x2f0 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0x2e0 &req={0} ?trans5;
MOV R0, R2 &req={5} ?WAIT7_END_GROUP;
IABS R6, R4.reuse ?trans2;
IABS R9, R4 ?trans2;
I2F.RP R5, R6 &wr=0x0 ?trans1;
IABS R8, R0 ?trans1;
MUFU.RCP R5, R5 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R5, 0xffffffe, RZ &req={0} ?trans2;
IADD3 R5, PT, PT, RZ, -R9, RZ ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R7, PT, PT, RZ, -R3, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R7, R7, R6, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R7, R2 ?trans1;
MOV R2, R4 ?WAIT5_END_GROUP;
IMAD.HI.U32 R3, R3, R8, RZ ?WAIT4_END_GROUP;
IMAD R3, R3, R5, R8 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R6, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -R6, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
MOV R0, R2 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R6, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R6, RZ ?trans1;
ISETP.NE.AND P1, PT, R4, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R3, RZ, R4, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R3, RZ, PT ?trans1;
MOV R4, R3 ?WAIT12_END_GROUP;
@P0 BRA 0x130 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R2, 0x1, PT &req={5} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
S2R R0, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR6, UPT, PT ?trans1;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
UFLO.U32 UR7, UR6 ?trans2;
POPC R5, UR6 &wr=0x1 ?trans4;
ISETP.EQ.U32.AND P0, PT, R0, UR7, PT &req={0} ?WAIT13_END_GROUP;
@P0 REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x390;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: parallelCoprimeCountAtomicAdd(int*, int*, unsigned int*, unsigned int)
_Z29parallelCoprimeCountAtomicAddPiS_Pjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_7
s_load_b128 s[4:7], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, 0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(1)
v_cmpx_ne_u32_e32 0, v2
s_cbranch_execz .LBB0_4
.LBB0_2:
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v5, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v1, v2 :: v_dual_add_nc_u32 v0, v0, v5
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v0, v0, v5
v_add_nc_u32_e32 v3, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v3, v2
v_cvt_f32_u32_e32 v3, v2
v_sub_nc_u32_e32 v4, 0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v3
v_cvt_u32_f32_e32 v3, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, v4, v3
v_mul_hi_u32 v4, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v3, v4
v_mul_hi_u32 v3, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, v3, v2
v_sub_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v0, v2
v_cmp_ge_u32_e32 vcc_lo, v0, v2
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v0, v2
v_cmp_ge_u32_e32 vcc_lo, v0, v2
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v5
v_sub_nc_u32_e32 v2, v0, v5
v_mov_b32_e32 v0, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v2
s_or_b32 s3, vcc_lo, s3
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s3
v_mov_b32_e32 v0, v1
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 1, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_7
s_mov_b32 s2, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v0, s2, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 s3, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s3
s_cbranch_execz .LBB0_7
s_bcnt1_i32_b32 s2, s2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| parallelCoprimeCountAtomicAdd | 1,400 | 1,806 | stackv2-00001-of-00015 |
// Demangled: reduceAdd(int*, unsigned int)
Function : _Z9reduceAddPij
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
ISETP.GE.U32.AND P0, PT, R0.reuse, 0x2, PT &req={2} ?trans1;
IMAD R9, R0, UR4, R13 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R9, UR5, !P0 &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x2 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={2,1,0} ?WAIT7_END_GROUP;
SHF.R.U32.HI R8, RZ, 0x1, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x1a0 ?trans3;
IADD3 R5, PT, PT, R9, R8, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, UR6, PT ?WAIT5_END_GROUP;
ISETP.GE.U32.OR P0, PT, R13, R8, P0 ?WAIT13_END_GROUP;
@P0 BRA 0x190 &req={0} ?trans5;
IMAD.WIDE.U32 R4, R5, 0x4, R6 &req={3} ?trans1;
LDG.E R11, desc[UR4][R2.64] &wr=0x2 ?trans5;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
IADD3 R11, PT, PT, R4, R11, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x3, PT ?trans1;
MOV R0, R8 ?WAIT12_END_GROUP;
@P0 BRA 0xe0 ?trans5;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: reduceAdd(int*, unsigned int)
_Z9reduceAddPij:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
s_cmp_gt_u32 s5, 1
s_cselect_b32 s2, -1, 0
v_cmp_gt_u32_e32 vcc_lo, s4, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_5
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v2, v3
v_lshlrev_b64 v[4:5], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
.LBB1_2:
s_lshr_b32 s1, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v2, s1, v1
v_cmp_gt_u32_e32 vcc_lo, s1, v0
v_cmp_gt_u32_e64 s0, s4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s6, vcc_lo, s0
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB1_4
v_lshlrev_b64 v[6:7], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s2, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
s_clause 0x1
global_load_b32 v2, v[6:7], off
global_load_b32 v6, v[4:5], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v6, v2
global_store_b32 v[4:5], v2, off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s0
s_cmp_gt_u32 s5, 3
s_mov_b32 s5, s1
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_2
.LBB1_5:
s_endpgm
| reduceAdd | 814 | 894 | stackv2-00001-of-00015 |
// Demangled: calc_one_vix(int, unsigned short const*, int, int, int, int, unsigned char*)
Function : _Z12calc_one_vixiPKtiiiiPh
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans8;
LDC R9, c[0x0][0x380] &wr=0x3 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR5, UR6 &req={2} ?trans1;
IMAD R3, R9, R9, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R2, R2, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R3, R9 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R8, R2 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
I2F.RP R0, R3 &wr=0x1 ?trans2;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans2;
IADD3 R4, PT, PT, R0, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R5, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R7, R6, R3, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R7, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R6, R5, R8, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R3, R0, R8 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R0, PT, PT, R0, -R3, RZ ?trans2;
@!P1 IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, R3, PT ?trans1;
LOP3.LUT R0, R2, R9, RZ, 0x3c, !PT ?trans1;
MOV R3, RZ ?WAIT4_END_GROUP;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans2;
LDC R0, c[0x0][0x39c] &wr=0x1 ?trans5;
@P0 IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT8_END_GROUP;
@!P0 LOP3.LUT R6, RZ, R9, RZ, 0x33, !PT ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R9, R7, R2 ?WAIT4_END_GROUP;
IMAD R4, R6, R9, R7 ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans1;
@!P0 BRA 0xc90 &req={0} ?trans6;
LDCU.64 UR4, c[0x0][0x388] &wr=0x0 ?trans1;
IADD.64 R8, R4, R4 ?trans2;
LDCU.64 UR10, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x398] &wr=0x2 ?trans1;
IADD.64 R12, R8, UR4 &req={0} ?WAIT7_END_GROUP;
LDG.E.U16 R12, desc[UR8][R12.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR10, UR10, URZ &req={1} ?trans2;
IADD3 R8, PT, PT, R6, -UR10, RZ ?trans2;
IADD3 R9, PT, PT, R7, -UR10, RZ ?trans1;
MOV R10, RZ ?trans1;
UI2FP.F32.S32 UR4, UR4 ?trans1;
UIMAD UR6, UR10, UR10, URZ ?WAIT3_END_GROUP;
UFADD UR5, UR4, 0.99998998641967773438 ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
IADD3 R0, PT, PT, R12, UR11, RZ &req={3} ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, -R0, UR7, RZ &req={2} ?trans2;
I2FP.F32.S32 R12, R0 ?WAIT7_END_GROUP;
MOV R13, 0x41c64e6d ?trans1;
HFMA2 R3, -RZ, RZ, -3.31640625, -0.0031299591064453125 ?trans1;
LDCU UR7, c[0x0][0x380] &wr=0x0 ?trans1;
LDC R15, c[0x0][0x39c] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0xc20 ?trans1;
IMAD R0, R2.reuse, R13, 0x3039 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
IMAD R2, R2, R3, -0x2c23e982 ?trans1;
MOV R25, RZ ?trans2;
LOP3.LUT R0, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
LOP3.LUT R2, R2, 0x7fffffff, RZ, 0xc0, !PT ?trans2;
I2FP.F32.U32 R0, R0 ?trans2;
I2FP.F32.U32 R3, R2 ?WAIT3_END_GROUP;
FMUL R0, R0, UR5 ?trans2;
FMUL R13, R3, UR5 ?trans2;
FMUL R0, R0, 4.6566128730773925781e-10 ?trans2;
FMUL R13, R13, 4.6566128730773925781e-10 ?trans2;
F2I.TRUNC.NTZ R3, R0 &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R15, UR4, PT &req={1} ?trans1;
F2I.TRUNC.NTZ R14, R13 &req={5} &wr=0x1 ?trans1;
IADD3 R17, PT, PT, R8, R3, RZ &req={2} ?WAIT2_END_GROUP;
IADD3 R16, PT, PT, R9, R14, RZ &req={1} ?trans2;
IADD3 R14, PT, PT, -R6, R17, RZ ?trans2;
IADD3 R18, PT, PT, -R7, R16, RZ ?WAIT3_END_GROUP;
IMAD R3, R14, R14, RZ ?WAIT4_END_GROUP;
IMAD R3, R18, R18, R3 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R3, UR6, PT ?WAIT13_END_GROUP;
@P0 IMAD.HI R0, R14, 0x55555556, RZ ?WAIT4_END_GROUP;
@P0 IMAD.HI R13, R18, 0x55555556, RZ ?trans1;
@P0 LEA.HI R3, R0, R0, RZ, 0x1 ?WAIT4_END_GROUP;
@P0 LEA.HI R0, R13, R13, RZ, 0x1 ?trans2;
@P0 IADD3 R17, PT, PT, R6, R3, RZ ?trans2;
@P0 IADD3 R16, PT, PT, R7, R0, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R17, UR7, PT &req={0} ?trans2;
ISETP.GE.AND P1, PT, R16, UR7, PT ?WAIT3_END_GROUP;
ISETP.GT.AND P0, PT, R17, -0x1, !P0 ?trans2;
ISETP.GT.AND P1, PT, R16, -0x1, !P1 ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0xc10 ?trans5;
LDC.64 R14, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R3, R17, UR7, R16 ?WAIT4_END_GROUP;
IMAD.WIDE R14, R3, 0x2, R14 &req={0} ?WAIT6_END_GROUP;
LDG.E.U16 R14, desc[UR8][R14.64] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R0, PT, PT, R6, -R17, RZ ?trans1;
BSSY.RELIABLE B1, 0x750 ?trans3;
IABS R0, R0 ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x740 &req={0} ?trans5;
IADD3 R0, PT, PT, R7, -R16, RZ ?trans1;
HFMA2 R25, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT3_END_GROUP;
IABS R0, R0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0x2, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B1 ?trans5;
@!P0 BRA 0xc10 ?trans5;
BSYNC.RELIABLE B1 ?trans5;
IADD3 R0, PT, PT, -R6, R17, RZ ?trans2;
IADD3 R13, PT, PT, -R7, R16, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x8e0 ?trans1;
IABS R17, R0 ?trans2;
IABS R18, R13 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R17, R18, PT ?WAIT5_END_GROUP;
SEL R23, R13, R0, !P0 ?trans1;
SEL R0, R0, R13, !P0 ?WAIT4_END_GROUP;
I2FP.F32.S32 R3, R23 ?trans2;
I2FP.F32.S32 R0, R0 ?trans2;
MUFU.RCP R16, R3 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R23, 0x1, PT ?trans1;
FCHK P0, R0, R3 &wr=0x1 ?trans1;
FFMA R13, -R3, R16, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R15, R16, R13, R16 ?trans1;
MOV R13, 0x1 ?WAIT3_END_GROUP;
FFMA R16, R0, R15, RZ ?trans2;
SEL R13, R13, 0xffffffff, P1 ?trans2;
FFMA R19, -R3, R16, R0 ?WAIT4_END_GROUP;
FFMA R16, R15, R19, R16 ?trans1;
@!P0 BRA 0x8d0 &req={1} ?trans6;
MOV R20, 0x8c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xdd0 &req={5} ?trans5;
MOV R16, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MUFU.RCP R0, R3 &wr=0x0 ?trans1;
IADD3 R14, PT, PT, R11, R14, RZ &req={5} ?trans1;
BSSY.RECONVERGENT B1, 0x9e0 ?trans3;
I2FP.F32.S32 R20, R14 ?WAIT4_END_GROUP;
FCHK P0, R20, R3 &wr=0x1 ?trans1;
FFMA R15, -R3, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R15, R0 ?WAIT4_END_GROUP;
FFMA R19, R0, R20, RZ ?WAIT4_END_GROUP;
FFMA R14, -R3, R19, R20 ?WAIT4_END_GROUP;
FFMA R19, R0, R14, R19 ?trans1;
@!P0 BRA 0x9d0 &req={1} ?trans6;
MOV R0, R20 ?trans1;
MOV R20, 0x9c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xdd0 ?trans5;
MOV R19, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IABS R0, R13 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
IABS R3, R23 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 BRA 0xc10 ?trans5;
LDC.64 R14, c[0x0][0x388] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R17, R18, PT ?trans1;
MOV R3, 0x1 ?trans1;
MOV R0, R13 ?WAIT11_END_GROUP;
I2FP.F32.S32 R17, R0 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R21, 0x3f000000 ?WAIT3_END_GROUP;
FMUL R18, R17, R16 ?WAIT5_END_GROUP;
LOP3.LUT R21, R21, 0x80000000, R18, 0xb8, !PT ?WAIT5_END_GROUP;
FADD.RZ R18, R18, R21 ?WAIT4_END_GROUP;
F2I.TRUNC.NTZ R21, R18 &wr=0x2 ?trans2;
SEL R25, R21, R0, !P1 &req={2} ?trans1;
SEL R20, R0, R21, !P1 ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R6, R25, RZ ?trans2;
IADD3 R20, PT, PT, R7, R20, RZ ?WAIT5_END_GROUP;
IMAD R21, R25, UR10, R20 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R20, R21, 0x2, R14 &req={0} ?WAIT6_END_GROUP;
LDG.E.U16 R20, desc[UR8][R20.64] &wr=0x2 ?trans1;
FFMA R17, R17, R19, R12 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
I2F.U16 R22, R20 &req={2} &wr=0x0 ?trans3;
FSETP.GEU.AND P0, PT, R17, R22, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xc10 ?trans5;
IMAD R0, R13, R3, R0 ?trans1;
IABS R18, R23 ?trans2;
IADD3 R3, PT, PT, R3, R3, RZ ?trans2;
IABS R17, R0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R17, R18, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa70 ?trans5;
MOV R25, 0x1 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
IADD3 R10, PT, PT, R25, R10, RZ ?trans1;
@P2 BRA 0x3e0 ?trans6;
LDC R3, c[0x0][0x39c] &wr=0x0 ?trans1;
I2FP.F32.U32 R10, R10 ?trans2;
I2FP.F32.U32 R3, R3 &req={0} ?WAIT7_END_GROUP;
MUFU.RCP R0, R3 &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xd60 ?trans1;
FCHK P0, R10, R3 &wr=0x1 ?trans1;
FFMA R7, R0, -R3, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R7, R0 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R2, R7, -R3, R10 ?WAIT4_END_GROUP;
FFMA R0, R0, R2, R7 ?trans1;
@!P0 BRA 0xd50 &req={1} ?trans6;
MOV R0, R10 ?trans1;
MOV R20, 0xd50 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xdd0 &req={5} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
FMUL R0, R0, 255.998992919921875 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x0 ?trans5;
F2I.TRUNC.NTZ R0, R0 &wr=0x1 ?trans1;
IADD.64 R4, R4, UR4 &req={0} ?trans2;
VIMNMX.S32 R3, R0, 0xff, PT &req={1} ?WAIT5_END_GROUP;
STG.E.U8 desc[UR8][R4.64], R3 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R19, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B2, 0x1420 ?trans1;
SHF.R.U32.HI R15, RZ, 0x17, R0 ?trans2;
LOP3.LUT R19, R19, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R24, R15, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R21, R3 ?trans1;
IADD3 R25, PT, PT, R19, -0x1, RZ ?trans2;
IADD3 R22, PT, PT, R24, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R25, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R15, RZ ?trans1;
@!P0 BRA 0x1000 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1400 ?trans5;
LOP3.LUT P0, RZ, R21, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x13e0 ?trans5;
FSETP.NEU.FTZ.AND P3, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P3, 0x13e0 ?trans5;
LOP3.LUT P3, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P3, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x13c0 ?trans5;
LOP3.LUT P1, RZ, R21, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1390 ?trans5;
ISETP.GE.AND P0, PT, R22, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R25, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R15, RZ ?trans1;
@!P0 MOV R15, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R21, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R15, PT, PT, R15, 0x40, RZ ?WAIT7_END_GROUP;
LEA R22, R19, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0x1380 ?trans1;
IADD3 R24, PT, PT, R24, -0x7f, RZ ?trans2;
IADD3 R25, PT, PT, -R22, R21, RZ ?WAIT3_END_GROUP;
IMAD R0, R24.reuse, -0x800000, R0 ?trans1;
IADD3 R24, PT, PT, R24, 0x7f, -R19 ?trans1;
MUFU.RCP R21, R25 &wr=0x0 ?trans1;
FADD.FTZ R27, -R25, -RZ ?trans2;
IADD3 R24, PT, PT, R24, R15, RZ ?trans2;
FFMA R22, R21, R27, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R21, R21, R22, R21 ?WAIT4_END_GROUP;
FFMA R22, R0, R21, RZ ?WAIT4_END_GROUP;
FFMA R26, R27, R22, R0 ?WAIT4_END_GROUP;
FFMA R22, R21, R26, R22 ?WAIT4_END_GROUP;
FFMA R27, R27, R22, R0 ?WAIT4_END_GROUP;
FFMA R0, R21, R27, R22 ?WAIT5_END_GROUP;
SHF.R.U32.HI R19, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R19, R19, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R25, PT, PT, R19, R24, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R25, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R15, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1360 ?trans5;
ISETP.GT.AND P0, PT, R25, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1330 ?trans5;
ISETP.GE.AND P0, PT, R25, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1370 ?trans5;
ISETP.GE.AND P0, PT, R25, -0x18, PT ?trans1;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1370 ?trans5;
FFMA.RZ R15, R21, R27, R22 ?trans1;
IADD3 R24, PT, PT, R25.reuse, 0x20, RZ ?trans1;
ISETP.NE.AND P1, PT, R25.reuse, RZ, PT ?trans1;
ISETP.NE.AND P3, PT, R25, RZ, PT ?trans2;
LOP3.LUT R15, R15, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R19, R15, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R15, R21.reuse, R27.reuse, R22.reuse ?trans1;
FFMA.RM R22, R21, R27, R22 ?trans1;
IADD3 R21, PT, PT, -R25, RZ, RZ ?trans2;
SHF.L.U32 R24, R19, R24, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R15, R22, PT ?trans1;
SEL R22, R21, RZ, P3 ?trans2;
ISETP.NE.AND P1, PT, R24, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R22, RZ, R22, R19 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R24, RZ, 0x1, R22 ?WAIT3_END_GROUP;
SEL R15, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R15, R15, 0x1, R24, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R15, R15, R22, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R24, R15, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R15, R0, RZ, 0xfc, !PT ?trans1;
BRA 0x1370 ?trans6;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1370 ?trans6;
IMAD R0, R24, 0x800000, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0x1410 ?trans5;
LOP3.LUT R0, R21, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1410 ?trans6;
LOP3.LUT R0, R21, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1410 ?trans6;
MUFU.RSQ R0, -QNAN &wr=0x0 ?trans1;
BRA 0x1410 ?trans5;
FADD.FTZ R0, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R21, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R20 0x0 &req={0} ?trans5;
BRA 0x1440;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calc_one_vix(int, unsigned short const*, int, int, int, int, unsigned char*)
_Z12calc_one_vixiPKtiiiiPh:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x28
s_load_b32 s3, s[0:1], 0x34
s_load_b32 s10, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_and_b32 s3, s3, 0xffff
s_add_i32 s2, s2, s14
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
s_mul_i32 s2, s10, s10
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_23
s_load_b128 s[4:7], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s7, 1
s_cbranch_scc1 .LBB0_21
s_load_b64 s[8:9], s[0:1], 0x8
v_lshlrev_b64 v[3:4], 1, v[1:2]
s_ashr_i32 s2, s10, 31
v_add_nc_u32_e32 v5, v1, v2
s_add_i32 s3, s10, s2
v_mov_b32_e32 v11, v1
s_xor_b32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s11, 0, s3
v_xor_b32_e32 v5, v5, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
global_load_u16 v0, v[3:4], off
v_cvt_f32_u32_e32 v3, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v3, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x4f7ffffe, v3
v_cvt_u32_f32_e32 v3, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, s11, v3
v_mul_hi_u32 v4, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v3, v4
v_mul_hi_u32 v3, v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v4, v3, s3
v_sub_nc_u32_e32 v4, v5, v4
v_add_nc_u32_e32 v5, 1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s3, v4
v_cmp_le_u32_e32 vcc_lo, s3, v4
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v4, v4, v6
v_xor_b32_e32 v6, s2, v2
s_lshl_b32 s2, s4, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s3, v4
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, s5, v0
v_add_nc_u32_e32 v5, 1, v3
s_mov_b32 s5, 0
v_sub_nc_u32_e32 v9, s6, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v3, v3, v5, vcc_lo
v_mov_b32_e32 v5, 0
v_cvt_f32_i32_e32 v10, v0
s_mov_b32 s6, 0x41c64e6d
v_xor_b32_e32 v3, v3, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v3, v6
v_cvt_f32_i32_e32 v6, s2
v_mul_lo_u32 v4, v3, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f32_e32 v6, 0x3f7fff58, v6
v_subrev_nc_u32_e32 v7, s4, v3
v_sub_nc_u32_e32 v4, v1, v4
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v8, s4, v4
s_mul_i32 s4, s4, s4
.LBB0_3:
v_mad_u64_u32 v[12:13], null, v11, s6, 0x3039
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_and_b32_e32 v0, 0x7fffffff, v12
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[13:14], null, v12, s6, 0x3039
v_cvt_f32_i32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mul_f32 v0, v6, v0 :: v_dual_and_b32 v11, 0x7fffffff, v13
v_cvt_f32_i32_e32 v12, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x30000000, v0
v_mul_f32_e32 v12, v6, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_i32_f32_e32 v0, v0
v_mul_f32_e32 v13, 0x30000000, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, v7, v0
v_cvt_i32_f32_e32 v0, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v13, v12, v3
v_add_nc_u32_e32 v0, v8, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v15, v13, v13
v_sub_nc_u32_e32 v14, v0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[16:17], null, v14, v14, v[15:16]
v_cmpx_lt_u32_e64 s4, v16
v_mul_hi_i32 v0, 0x55555556, v13
v_mul_hi_i32 v13, 0x55555556, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshrrev_b32_e32 v12, 31, v0
v_lshrrev_b32_e32 v14, 31, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add3_u32 v12, v0, v12, v3
v_add3_u32 v0, v13, v14, v4
s_or_b32 exec_lo, exec_lo, s2
v_mov_b32_e32 v15, 0
s_mov_b32 s11, exec_lo
v_cmpx_lt_i32_e32 -1, v12
s_cbranch_execz .LBB0_19
v_max_i32_e32 v13, v12, v0
v_cmp_lt_i32_e32 vcc_lo, -1, v0
v_mov_b32_e32 v15, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s10, v13
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s12, s2
s_cbranch_execz .LBB0_18
v_mad_u64_u32 v[13:14], null, v12, s10, v[0:1]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v14, 31, v13
v_lshlrev_b64 v[13:14], 1, v[13:14]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v13, vcc_lo, s8, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s9, v14, vcc_lo
global_load_u16 v14, v[13:14], off
v_sub_nc_u32_e32 v13, v3, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v15, 0, v13
v_max_i32_e32 v13, v13, v15
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_u32_e64 s2, 1, v13
v_cmpx_gt_u32_e32 2, v13
v_sub_nc_u32_e32 v13, v4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_and_not1_b32 s2, s2, exec_lo
s_mov_b32 s13, 1
v_sub_nc_u32_e32 v15, 0, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v13, v13, v15
v_cmp_lt_u32_e32 vcc_lo, 1, v13
s_and_b32 s14, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s2, s2, s14
s_or_b32 exec_lo, exec_lo, s3
v_mov_b32_e32 v15, s13
s_and_saveexec_b32 s13, s2
s_cbranch_execz .LBB0_17
v_sub_nc_u32_e32 v16, v12, v3
v_sub_nc_u32_e32 v17, v0, v4
s_mov_b32 s15, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v0, 0, v16
v_sub_nc_u32_e32 v12, 0, v17
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_max_i32_e32 v0, v16, v0
v_max_i32_e32 v12, v17, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_u32_e64 s2, v0, v12
v_cndmask_b32_e64 v0, v16, v17, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, 1, v0
v_sub_nc_u32_e32 v13, 0, v0
v_cndmask_b32_e64 v12, 1, -1, vcc_lo
v_max_i32_e32 v13, v0, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v15, 0, v12
v_max_i32_e32 v15, v12, v15
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_u32_e32 vcc_lo, v15, v13
v_mov_b32_e32 v15, 1
s_and_saveexec_b32 s14, vcc_lo
s_cbranch_execz .LBB0_16
s_waitcnt vmcnt(0)
v_and_b32_e32 v14, 0xffff, v14
v_cndmask_b32_e64 v15, v17, v16, s2
v_cvt_f32_i32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v14, v9, v14
v_cvt_f32_i32_e32 v15, v15
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_i32_e32 v16, v14
v_div_scale_f32 v14, null, v0, v0, v15
v_div_scale_f32 v22, vcc_lo, v15, v0, v15
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_div_scale_f32 v17, null, v0, v0, v16
v_rcp_f32_e32 v18, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v19, v17
s_waitcnt_depctr 0xfff
v_fma_f32 v20, -v14, v18, 1.0
v_fma_f32 v21, -v17, v19, 1.0
v_dual_fmac_f32 v19, v21, v19 :: v_dual_fmac_f32 v18, v20, v18
v_div_scale_f32 v20, s3, v16, v0, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v23, v20, v19
v_fma_f32 v25, -v17, v23, v20
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v23, v25, v19
v_mul_f32_e32 v21, v22, v18
v_fma_f32 v17, -v17, v23, v20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v24, -v14, v21, v22
v_fmac_f32_e32 v21, v24, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v14, -v14, v21, v22
v_div_fmas_f32 v14, v14, v18, v21
s_mov_b32 vcc_lo, s3
s_mov_b32 s3, 0
v_div_fmas_f32 v17, v17, v19, v23
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f32 v14, v14, v0, v15
v_div_fixup_f32 v15, v17, v0, v16
v_mov_b32_e32 v0, v12
.LBB0_12:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v18, v0
s_and_not1_b32 s17, s17, exec_lo
s_or_b32 s18, s18, exec_lo
v_mul_f32_e32 v16, v14, v18
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_trunc_f32_e32 v17, v16
v_sub_f32_e32 v19, v16, v17
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s19, |v19|, 0.5
v_cndmask_b32_e64 v19, 0, 1.0, s19
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_bfi_b32 v16, 0x7fffffff, v19, v16
v_add_f32_e32 v16, v17, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v16, v16
v_cndmask_b32_e64 v17, v0, v16, s2
v_cndmask_b32_e64 v16, v16, v0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v17, v17, v3
v_mul_lo_u32 v17, v17, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v16, v16, v4, v17
v_ashrrev_i32_e32 v17, 31, v16
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[16:17], 1, v[16:17]
v_add_co_u32 v16, vcc_lo, s8, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v17, vcc_lo, s9, v17, vcc_lo
global_load_u16 v16, v[16:17], off
v_fma_f32 v17, v15, v18, v10
s_waitcnt vmcnt(0)
v_cvt_f32_u32_e32 v16, v16
v_cmp_nlt_f32_e32 vcc_lo, v17, v16
s_and_b32 s19, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s17, s17, s19
s_and_saveexec_b32 s19, vcc_lo
v_mad_u64_u32 v[16:17], null, s15, v12, v[0:1]
s_and_not1_b32 s18, s18, exec_lo
s_lshl_b32 s15, s15, 1
s_or_b32 s17, s17, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, 0, v16
v_max_i32_e32 v0, v16, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_cmp_ge_u32_e32 vcc_lo, v0, v13
v_mov_b32_e32 v0, v16
s_and_b32 s20, vcc_lo, exec_lo
s_or_b32 s18, s18, s20
s_or_b32 exec_lo, exec_lo, s19
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s19, exec_lo, s18
s_or_b32 s3, s19, s3
s_and_not1_b32 s16, s16, exec_lo
s_and_b32 s19, s17, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s16, s16, s19
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_12
s_or_b32 exec_lo, exec_lo, s3
v_cndmask_b32_e64 v15, 0, 1, s16
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s14
.LBB0_17:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s13
.LBB0_18:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s12
.LBB0_19:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s11
v_add_nc_u32_e32 v5, v15, v5
s_add_i32 s5, s5, 1
s_cmp_lg_u32 s5, s7
s_cbranch_scc1 .LBB0_3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v0, v5
v_cvt_f32_i32_e32 v3, s7
v_div_scale_f32 v4, null, v3, v3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v0, v3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v6, v5
v_fma_f32 v8, -v4, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v5
v_fma_f32 v4, -v4, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v4, v4, v5, v7
v_div_fixup_f32 v0, v4, v3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, 0x437fffbe, v0
v_cvt_i32_f32_e32 v0, v0
s_branch .LBB0_22
.LBB0_21:
.LBB0_22:
s_load_b64 s[0:1], s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1)
v_min_i32_e32 v3, 0xff, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
global_store_b8 v[0:1], v3, off
.LBB0_23:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calc_one_vix | 7,778 | 7,087 | stackv2-00001-of-00015 |
// Demangled: findtopobs(int, char const*, int const*, int*)
Function : _Z10findtopobsiPKcPKiPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x3 ?trans1;
S2R R0, SR_CTAID.X &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x400, URZ ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans1;
LDCU UR12, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x0 ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={2} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans4;
LEA R2, R3, UR4, 0x2 &req={1} ?WAIT2_END_GROUP;
LEA R4, R3, UR5, 0x2 ?trans1;
IMAD R5, R0, UR7, R3 &req={3} ?trans2;
STS [R2], RZ &rd=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x3 ?trans3;
STS [R4], RZ &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R5, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x2b0 &req={4,3,1,0} ?trans5;
LDC R10, c[0x0][0x370] &wr=0x0 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans2;
IMAD R10, R10, UR7, RZ &req={0} ?WAIT7_END_GROUP;
SHF.R.S32.HI R9, RZ, 0x1f, R5 ?trans1;
MOV R8, R5 ?WAIT5_END_GROUP;
IADD.64 R6, R8, UR4 ?WAIT7_END_GROUP;
LDG.E.U8 R6, desc[UR8][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B1, 0x280 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
LEA R6, P0, R5, UR10, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R7, R5, UR11, R9, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR8][R6.64] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R6, R11, PT &req={2} ?WAIT13_END_GROUP;
@P0 STS [R2], R5 &rd=0x0 ?trans1;
@P0 MOV R11, R6 ?WAIT3_END_GROUP;
@P0 STS [R4], R6 &rd=0x0 ?trans4;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R5, PT, PT, R10, R5, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR12, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x190 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0x7f, PT ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDS R5, [R4+0x200] ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x3f, PT ?WAIT3_END_GROUP;
LDS R7, [R4] &wr=0x0 ?trans2;
ISETP.GT.AND P0, PT, R5, R7, PT &req={0} ?WAIT13_END_GROUP;
@P0 LDS R11, [R2+0x200] &wr=0x0 ?trans4;
@P0 LDS R9, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R11 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x200], R9 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R5 &rd=0x0 ?trans4;
@P0 STS [R4+0x200], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R6, [R4+0x100] &wr=0x1 ?trans1;
@P0 MOV R7, R5 &req={0} ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1f, PT ?WAIT4_END_GROUP;
ISETP.GT.AND P0, PT, R6, R7, PT &req={1} ?WAIT13_END_GROUP;
@P0 LDS R9, [R2+0x100] &wr=0x0 ?trans4;
@P0 LDS R5, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R9 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x100], R5 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R6 &rd=0x0 ?trans4;
@P0 STS [R4+0x100], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R5, [R4+0x80] &req={0} &wr=0x0 ?trans1;
@P0 MOV R7, R6 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0xf, PT ?WAIT4_END_GROUP;
ISETP.GT.AND P0, PT, R5, R7, PT &req={0} ?WAIT13_END_GROUP;
@P0 LDS R11, [R2+0x80] &wr=0x0 ?trans4;
@P0 LDS R9, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R11 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x80], R9 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R5 &rd=0x0 ?trans4;
@P0 STS [R4+0x80], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R6, [R4+0x40] &wr=0x1 ?trans1;
@P0 MOV R7, R5 &req={0} ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x7, PT ?WAIT4_END_GROUP;
ISETP.GT.AND P0, PT, R6, R7, PT &req={1} ?WAIT13_END_GROUP;
@P0 LDS R9, [R2+0x40] &wr=0x0 ?trans4;
@P0 LDS R5, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R9 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x40], R5 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R6 &rd=0x0 ?trans4;
@P0 STS [R4+0x40], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R5, [R4+0x20] &req={0} &wr=0x0 ?trans1;
@P0 MOV R7, R6 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x3, PT ?WAIT4_END_GROUP;
ISETP.GT.AND P0, PT, R5, R7, PT &req={0} ?WAIT13_END_GROUP;
@P0 LDS R11, [R2+0x20] &wr=0x0 ?trans4;
@P0 LDS R9, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R11 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x20], R9 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R5 &rd=0x0 ?trans4;
@P0 STS [R4+0x20], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R6, [R4+0x10] &wr=0x1 ?trans1;
@P0 MOV R7, R5 &req={0} ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1, PT ?WAIT4_END_GROUP;
ISETP.GT.AND P0, PT, R6, R7, PT &req={1} ?WAIT13_END_GROUP;
@P0 LDS R9, [R2+0x10] &wr=0x0 ?trans4;
@P0 LDS R5, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R9 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x10], R5 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R6 &rd=0x0 ?trans4;
@P0 STS [R4+0x10], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
LDS R5, [R4+0x8] &req={0} &wr=0x0 ?trans1;
@P0 MOV R7, R6 ?trans1;
ISETP.NE.AND P1, PT, R3, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.AND P0, PT, R5, R7, PT &req={0} ?WAIT13_END_GROUP;
@P0 LDS R11, [R2+0x8] &wr=0x0 ?trans4;
@P0 LDS R9, [R2] &wr=0x1 ?trans4;
@P0 STS [R2], R11 &req={0} &rd=0x0 ?trans4;
@P0 STS [R2+0x8], R9 &req={1} &rd=0x0 ?trans4;
@P0 STS [R4], R5 &rd=0x0 ?trans4;
@P0 STS [R4+0x8], R7 &rd=0x0 ?trans1;
@P1 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x398] &req={0} &wr=0x0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT8_END_GROUP;
LDS.64 R4, [UR4+0x400] &wr=0x0 ?trans4;
LDS.64 R6, [UR4] &wr=0x1 ?trans1;
ISETP.GT.AND P0, PT, R5, R4.reuse, PT &req={0} ?trans1;
MOV R11, R4 ?trans1;
MOV R10, R5 ?trans1;
MOV R9, R6 &req={1} ?trans1;
MOV R8, R7 ?WAIT9_END_GROUP;
@P0 MOV R6, R7 ?trans1;
@P0 MOV R4, R5 ?trans1;
@P0 STS.64 [UR4+0x400], R10 ?trans4;
@P0 STS.64 [UR4], R8 ?trans4;
STG.E desc[UR8][R2.64], R6 ?trans4;
STG.E desc[UR8][R2.64+0x190], R4 ?trans1;
EXIT ?trans5;
BRA 0x8f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: findtopobs(int, char const*, int const*, int*)
_Z10findtopobsiPKcPKiPi:
s_clause 0x3
s_load_b32 s10, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s0, s0, 32
s_mov_b32 s2, s15
s_addc_u32 s1, s1, 0
v_lshlrev_b32_e32 v7, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v8, 0x400, v7
ds_store_2addr_stride64_b32 v7, v9, v9 offset1:4
s_waitcnt lgkmcnt(0)
s_and_b32 s11, s10, 0xffff
s_mov_b32 s10, exec_lo
v_mad_u64_u32 v[1:2], null, s2, s11, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB5_7
s_load_b32 s0, s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_add_co_u32 v3, vcc_lo, s4, v1
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
s_waitcnt lgkmcnt(0)
s_mul_i32 s4, s0, s11
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[6:7], s[4:5], 2
.LBB5_2:
global_load_u8 v2, v[3:4], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_eq_u16_e32 0, v2
s_cbranch_execz .LBB5_6
global_load_b32 v2, v[5:6], off
s_mov_b32 s11, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_gt_i32_e64 v2, v9
s_cbranch_execz .LBB5_5
v_mov_b32_e32 v9, v2
ds_store_b32 v7, v1
ds_store_b32 v8, v2
.LBB5_5:
s_or_b32 exec_lo, exec_lo, s11
.LBB5_6:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v1, s4, v1
v_add_co_u32 v3, vcc_lo, v3, s4
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s3, v1
v_add_co_u32 v5, s0, v5, s6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB5_2
.LBB5_7:
s_or_b32 exec_lo, exec_lo, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 0x80, v0
s_cbranch_execz .LBB5_10
v_or_b32_e32 v1, 0x80, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_10
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_gt_u32_e32 64, v0
s_cbranch_execz .LBB5_13
v_or_b32_e32 v1, 64, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_13
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_13:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB5_16
v_or_b32_e32 v1, 32, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_16
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_16:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_gt_u32_e32 16, v0
s_cbranch_execz .LBB5_19
v_or_b32_e32 v1, 16, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_19
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_19:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_gt_u32_e32 8, v0
s_cbranch_execz .LBB5_22
v_or_b32_e32 v1, 8, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_22
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_22:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_gt_u32_e32 4, v0
s_cbranch_execz .LBB5_25
v_or_b32_e32 v1, 4, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_25
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_25:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_gt_u32_e32 2, v0
s_cbranch_execz .LBB5_28
v_or_b32_e32 v1, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v3, v1 offset:1024
ds_load_b32 v2, v8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v3, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB5_28
ds_load_b32 v4, v1
ds_load_b32 v5, v7
v_add_nc_u32_e32 v6, 0x400, v1
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v4
ds_store_b32 v8, v3
s_waitcnt lgkmcnt(2)
ds_store_b32 v1, v5
ds_store_b32 v6, v2
.LBB5_28:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB5_32
v_mov_b32_e32 v0, 0
s_mov_b32 s0, exec_lo
ds_load_b32 v2, v0 offset:1028
ds_load_b32 v1, v8
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 v2, v1
s_cbranch_execz .LBB5_31
ds_load_b32 v3, v0 offset:4
ds_load_b32 v4, v7
v_add_nc_u32_e64 v5, 4, 0
s_waitcnt lgkmcnt(1)
ds_store_b32 v7, v3
ds_store_b32 v8, v2
s_waitcnt lgkmcnt(2)
ds_store_2addr_stride64_b32 v5, v4, v1 offset1:4
.LBB5_31:
s_or_b32 exec_lo, exec_lo, s0
ds_load_2addr_stride64_b32 v[1:2], v0 offset1:4
s_add_i32 s0, s2, 0x64
s_mov_b32 s1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[4:5], s[0:1], 2
s_mov_b32 s3, s1
s_add_u32 s0, s8, s4
s_addc_u32 s1, s9, s5
s_lshl_b64 s[2:3], s[2:3], 2
s_add_u32 s2, s8, s2
s_addc_u32 s3, s9, s3
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b32 v0, v1, s[2:3]
global_store_b32 v0, v2, s[0:1]
.LBB5_32:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| findtopobs | 3,350 | 3,962 | stackv2-00001-of-00015 |
// Demangled: union_area(int, int, int, int, int const*, unsigned long long const*, int, int, int, int, char const*, int, int, int, unsigned long long const*, int*, int*)
Function : _Z10union_areaiiiiPKiPKyiiiiPKciiiS2_PiS5_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR5, c[0x0][0x3ac] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x3d8] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x38c] &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x1 ?trans1;
ISETP.LT.AND P0, PT, RZ, UR5, PT &req={0} ?trans1;
IMAD R3, R3, UR4, RZ &req={2} ?WAIT12_END_GROUP;
@P0 BRA 0x2b0 &req={4,3} ?trans5;
SHF.R.S32.HI R7, RZ, 0x1f, R0 ?trans1;
MOV R6, R0 ?WAIT5_END_GROUP;
IADD.64 R6, R6, UR6 &req={1} ?WAIT7_END_GROUP;
LDG.E.U8 R6, desc[UR10][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x270 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x260 ?trans5;
S2R R7, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR4, UPT, PT ?trans2;
FLO.U32 R2, UR4 &wr=0x0 ?trans1;
POPC R11, UR4 &wr=0x1 ?trans1;
ISETP.EQ.U32.AND P0, PT, R2, R7, PT &req={0} ?trans1;
IADD.64 R6, R4, 0x1e847c ?WAIT12_END_GROUP;
@P0 ATOMG.E.ADD.STRONG.GPU PT, R7, desc[UR10][R6.64], R11 &req={1} &wr=0x2 ?trans1;
S2R R8, SR_LTMASK &wr=0x0 ?trans2;
LOP3.LUT R10, R8, UR4, RZ, 0xc0, !PT &req={0} ?WAIT6_END_GROUP;
POPC R10, R10 &wr=0x0 ?trans1;
SHFL.IDX PT, R9, R7, R2, 0x1f &req={2} &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R9, R10, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R4 ?WAIT5_END_GROUP;
STG.E desc[UR10][R8.64], R0 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R0, PT, PT, R3, R0, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR8, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x110 ?trans5;
EXIT ?trans5;
LDCU UR12, c[0x0][0x388] &wr=0x0 ?trans1;
LDC R2, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x3d8] &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x384] &req={1} &wr=0x1 ?trans6;
LDC.64 R6, c[0x0][0x3d8] &wr=0x4 ?trans1;
UMOV.64 UR4, 0x1e847c ?trans1;
LDCU UR19, c[0x0][0x38c] &wr=0x2 ?trans1;
LDCU.64 UR14, c[0x0][0x3b0] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR12, PT &req={0} ?trans1;
LDCU UR13, c[0x0][0x3bc] &wr=0x0 ?trans1;
UIMAD.WIDE.U32 UR4, UR8, 0x1, UR4 &req={3} ?trans1;
UIADD3 UR6, UPT, UPT, UR6, UR6, URZ &req={1} ?trans1;
LDCU UR18, c[0x0][0x3c0] &wr=0x1 ?trans2;
UIADD3 UR7, UPT, UPT, UR5, UR9, URZ ?WAIT2_END_GROUP;
MOV.64 R4, UR4 ?trans2;
LDCU.64 UR16, c[0x0][0x390] &wr=0x3 ?trans1;
UIMAD UR6, UR6, UR6, URZ ?trans1;
MOV R5, UR7 ?trans1;
@!P0 BRA 0x900 ?trans10;
LDC R2, c[0x0][0x380] &req={2} &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x3a8] &wr=0x5 ?trans1;
LDCU UR13, c[0x0][0x38c] &req={0} &wr=0x0 ?trans6;
LDC.64 R6, c[0x0][0x3d8] &req={4} &wr=0x4 ?trans1;
LDCU.64 UR14, c[0x0][0x3b0] &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x3bc] &wr=0x1 ?trans6;
LDC.64 R8, c[0x0][0x3c8] &wr=0x0 ?trans1;
LDCU UR12, c[0x0][0x3c0] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
USHF.L.U32 UR4, UR4, 0x6, URZ &req={5} ?WAIT12_END_GROUP;
SHF.R.S32.HI R13, RZ, 0x1f, R0 ?trans1;
MOV R12, R0 ?WAIT5_END_GROUP;
IADD.64 R10, R12, UR14 &req={3} ?WAIT7_END_GROUP;
LDG.E.U8 R10, desc[UR10][R10.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x8c0 ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x8b0 ?trans5;
LEA R10, P0, R0, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R0, UR9, R13, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R19, desc[UR10][R10.64] &wr=0x3 ?trans1;
IABS R15, R2 &req={2} ?WAIT4_END_GROUP;
I2F.RP R14, R15 &wr=0x0 ?trans2;
MUFU.RCP R14, R14 &req={0} &wr=0x0 ?trans2;
IADD3 R12, PT, PT, R14, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R17, R16, R15, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R13, R13, R17, R12 ?trans1;
IABS R10, R19 &req={3} ?WAIT5_END_GROUP;
IMAD.HI.U32 R13, R13, R10, RZ ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, -R13, RZ, RZ ?WAIT5_END_GROUP;
IMAD R10, R15, R11, R10 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, R10, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R10, PT, PT, R10, -R15, RZ ?trans2;
@!P0 IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R10, R15, PT ?trans1;
LOP3.LUT R10, R19, R2, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R10, RZ, PT ?WAIT7_END_GROUP;
@P1 IADD3 R13, PT, PT, R13, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R2, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT8_END_GROUP;
@!P1 LOP3.LUT R13, RZ, R2, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, -R13.reuse, RZ, RZ ?trans2;
IADD3 R10, PT, PT, R13, -UR7, RZ &req={1} ?WAIT3_END_GROUP;
IMAD R12, R2, R11, R19 ?trans2;
IMAD R10, R10, R10, RZ ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R12, -UR12, RZ ?WAIT5_END_GROUP;
IMAD R10, R11, R11, R10 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R10, UR6, PT ?WAIT13_END_GROUP;
@P0 BRA 0x8b0 ?trans5;
IMAD R12, R13, UR4, R12 ?WAIT5_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x1f, R12 ?WAIT4_END_GROUP;
LEA.HI R13, R11, R12, RZ, 0x6 ?WAIT4_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x6, R13 ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x8, R8 ?WAIT6_END_GROUP;
LDG.E.64 R10, desc[UR10][R10.64] &wr=0x2 ?trans1;
LOP3.LUT R13, R13, 0xffffffc0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R13, 0x3f, -R12 ?WAIT4_END_GROUP;
SHF.R.U64 R13, R10, R13, R11 &req={2} ?WAIT4_END_GROUP;
LOP3.LUT R12, R13, 0x1, RZ, 0xc0, !PT ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.U64.AND P0, PT, R12, 0x1, PT ?WAIT14_END_GROUP;
@P0 BRA 0x8b0 ?trans5;
S2R R11, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR5, UPT, PT ?trans2;
FLO.U32 R12, UR5 &wr=0x0 ?trans1;
POPC R13, UR5 &wr=0x1 ?trans1;
ISETP.EQ.U32.AND P0, PT, R12, R11, PT &req={0} ?WAIT13_END_GROUP;
@P0 ATOMG.E.ADD.STRONG.GPU PT, R13, desc[UR10][R4.64], R13 &req={1} &wr=0x2 ?trans1;
S2R R14, SR_LTMASK &wr=0x0 ?trans2;
LOP3.LUT R14, R14, UR5, RZ, 0xc0, !PT &req={0} ?WAIT6_END_GROUP;
POPC R14, R14 &wr=0x0 ?trans1;
SHFL.IDX PT, R11, R13, R12, 0x1f &req={2} &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R11, R14, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R6 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R10.64], R0 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 &req={1,0} ?trans5;
IADD3 R0, PT, PT, R3, R0, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR13, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x480 ?trans5;
EXIT ?trans5;
SHF.R.S32.HI R11, RZ, 0x1f, R0 ?trans1;
MOV R10, R0 ?WAIT5_END_GROUP;
IADD.64 R8, R10, UR14 &req={2} ?WAIT7_END_GROUP;
LDG.E.U8 R8, desc[UR10][R8.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xc70 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0xc60 ?trans5;
LEA R8, P0, R0, UR16, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R9, R0, UR17, R11, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R13, desc[UR10][R8.64] &rd=0x2 &wr=0x3 ?trans1;
IABS R12, R2 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
I2F.RP R14, R12 &wr=0x5 ?trans2;
MUFU.RCP R14, R14 &req={5} &wr=0x5 ?trans2;
IADD3 R11, PT, PT, R14, 0xffffffe, RZ &req={5} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R11 &wr=0x5 ?trans2;
IADD3 R15, PT, PT, RZ, -R11, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R15, R15, R12, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R11, R15, R10 &req={2} ?trans1;
IABS R9, R13 &req={3} ?WAIT5_END_GROUP;
IMAD.HI.U32 R8, R8, R9, RZ ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, -R8, RZ, RZ ?WAIT5_END_GROUP;
IMAD R9, R12, R10, R9 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R12, R9, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, -R12, RZ ?trans2;
@!P1 IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R9, R12, PT ?trans1;
LOP3.LUT R9, R13, R2, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT7_END_GROUP;
@P0 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT8_END_GROUP;
@!P0 LOP3.LUT R8, RZ, R2, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, -R8.reuse, RZ, RZ ?trans2;
IADD3 R8, PT, PT, R8, -UR13, RZ &req={0} ?WAIT3_END_GROUP;
IMAD R9, R2, R9, R13 ?trans2;
IMAD R8, R8, R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R9, -UR18, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R8, R9, R9, R8 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, UR6, PT ?WAIT13_END_GROUP;
@P0 BRA 0xc60 ?trans5;
S2R R9, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR4, UPT, PT ?trans2;
FLO.U32 R10, UR4 &wr=0x0 ?trans1;
POPC R11, UR4 &wr=0x1 ?trans1;
ISETP.EQ.U32.AND P0, PT, R10, R9, PT &req={0} ?WAIT13_END_GROUP;
@P0 ATOMG.E.ADD.STRONG.GPU PT, R11, desc[UR10][R4.64], R11 &req={1} &wr=0x2 ?trans1;
S2R R12, SR_LTMASK &wr=0x0 ?trans2;
LOP3.LUT R12, R12, UR4, RZ, 0xc0, !PT &req={0} ?WAIT6_END_GROUP;
POPC R12, R12 &wr=0x0 ?trans1;
SHFL.IDX PT, R9, R11, R10, 0x1f &req={2} &wr=0x0 ?trans2;
IADD3 R9, PT, PT, R9, R12, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R6 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR10][R8.64], R0 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 &req={3,1,0} ?trans5;
IADD3 R0, PT, PT, R3, R0, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR19, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x900 ?trans5;
EXIT ?trans5;
BRA 0xcb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: union_area(int, int, int, int, int const*, unsigned long long const*, int, int, int, int, char const*, int, int, int, unsigned long long const*, int*, int*)
_Z10union_areaiiiiPKiPKyiiiiPKciiiS2_PiS5_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x6c
s_load_b128 s[4:7], s[0:1], 0x0
s_add_u32 s16, s0, 0x60
s_addc_u32 s17, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s21, s2, 0xffff
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s21, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB4_16
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x28
s_load_b64 s[2:3], s[0:1], 0x58
s_load_b32 s23, s[16:17], 0x0
s_mov_b32 s16, 0
v_mov_b32_e32 v3, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s9, 0
s_cselect_b32 s18, -1, 0
s_lshl_b32 s22, s5, 1
s_cmp_lg_u32 s6, 0
s_mul_i32 s17, s22, s22
s_cselect_b32 s5, -1, 0
s_lshl_b32 s6, s8, 6
s_add_u32 s8, s2, 0x1e847c
s_addc_u32 s9, s3, 0
s_ashr_i32 s19, s4, 31
s_mul_i32 s21, s23, s21
s_add_i32 s12, s4, s19
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_xor_b32 s20, s12, s19
s_load_b64 s[12:13], s[0:1], 0x10
v_cvt_f32_u32_e32 v0, s20
s_sub_i32 s14, 0, s20
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v2, s14, v0
s_clause 0x1
s_load_b64 s[14:15], s[0:1], 0x3c
s_load_b64 s[0:1], s[0:1], 0x48
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v0, v2
v_add_nc_u32_e32 v4, v0, v2
.LBB4_2:
v_ashrrev_i32_e32 v2, 31, v1
v_add_co_u32 v5, vcc_lo, s10, v1
s_mov_b32 s22, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v2, vcc_lo
global_load_u8 v0, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_eq_u16_e32 0, v0
s_cbranch_execz .LBB4_15
s_and_not1_b32 vcc_lo, exec_lo, s18
s_cbranch_vccnz .LBB4_7
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_mov_b32 s24, 0
s_mov_b32 s23, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s12, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
global_load_b32 v0, v[5:6], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v2, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, v0, v2
v_xor_b32_e32 v5, v5, v2
v_xor_b32_e32 v2, s19, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v6, v5, v4
v_mul_lo_u32 v7, v6, s20
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, v5, v7
v_add_nc_u32_e32 v7, 1, v6
v_subrev_nc_u32_e32 v8, s20, v5
v_cmp_le_u32_e32 vcc_lo, s20, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v6, v6, v7 :: v_dual_cndmask_b32 v5, v5, v8
v_add_nc_u32_e32 v7, 1, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s20, v5
v_cndmask_b32_e32 v5, v6, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v2
v_sub_nc_u32_e32 v2, v5, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v5, v2, s4
v_subrev_nc_u32_e32 v6, s14, v2
v_sub_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v5, v6, v6
v_subrev_nc_u32_e32 v8, s15, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, v8, v8, v[5:6]
v_cmpx_ge_u32_e64 s17, v6
s_cbranch_execz .LBB4_10
s_and_b32 vcc_lo, exec_lo, s5
s_cbranch_vccz .LBB4_8
v_mad_u64_u32 v[5:6], null, s6, v2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v0, 31, v5
v_lshrrev_b32_e32 v0, 26, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v5, v0
v_ashrrev_i32_e32 v6, 6, v0
v_and_b32_e32 v0, 0xffffffc0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v7, 31, v6
v_sub_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_add_nc_u32_e32 v0, 63, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
global_load_b64 v[6:7], v[6:7], off
s_waitcnt vmcnt(0)
v_lshrrev_b64 v[5:6], v0, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_and_b32_e32 v0, 1, v5
v_cmp_eq_u32_e32 vcc_lo, 1, v0
s_or_not1_b32 s24, vcc_lo, exec_lo
s_branch .LBB4_9
.LBB4_7:
s_mov_b32 s24, -1
s_branch .LBB4_11
.LBB4_8:
s_mov_b32 s24, -1
.LBB4_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s24, s24, exec_lo
.LBB4_10:
s_or_b32 exec_lo, exec_lo, s23
.LBB4_11:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s24
s_cbranch_execz .LBB4_15
s_mov_b32 s24, exec_lo
s_mov_b32 s23, exec_lo
v_mbcnt_lo_u32_b32 v0, s24, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB4_14
s_bcnt1_i32_b32 s24, s24
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v2, s24
global_atomic_add_u32 v2, v3, v2, s[8:9] glc
.LBB4_14:
s_or_b32 exec_lo, exec_lo, s23
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s23, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, s23, v0
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
global_store_b32 v[5:6], v1, off
.LBB4_15:
s_or_b32 exec_lo, exec_lo, s22
v_add_nc_u32_e32 v1, s21, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s7, v1
s_or_b32 s16, vcc_lo, s16
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB4_2
.LBB4_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| union_area | 5,334 | 3,314 | stackv2-00001-of-00015 |
// Demangled: matrixTranspose(float*, float*, int, int)
Function : _Z15matrixTransposePfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R6, SR_TID.Y &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans1;
LDCU.128 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD R2, R6, UR7, RZ &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R2, R2, R4 &req={1} ?WAIT5_END_GROUP;
LEA R8, P0, R2, UR8, 0x2 &req={2} ?WAIT4_END_GROUP;
LEA.HI.X R9, R2, UR9, R3, 0x2, P0 ?WAIT6_END_GROUP;
LDG.E R9, desc[UR4][R8.64] &req={3} &wr=0x2 ?trans1;
IMAD R4, R4, UR6, RZ ?trans1;
MOV R7, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
IADD.64 R4, R4, R6 ?WAIT5_END_GROUP;
LEA R2, P0, R4, UR10, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R3, R4, UR11, R5, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x150;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixTranspose(float*, float*, int, int)
_Z15matrixTransposePfS_ii:
s_load_b64 s[4:5], s[0:1], 0x10
v_bfe_u32 v3, v0, 10, 10
s_load_b128 s[0:3], s[0:1], 0x0
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v1, v3, s5
v_lshlrev_b32_e32 v3, 2, v3
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_lshlrev_b32_e32 v2, 2, v4
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, v0, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
global_load_b32 v2, v[0:1], off
v_mul_lo_u32 v0, v4, s4
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, v0, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixTranspose | 572 | 732 | stackv2-00001-of-00015 |
// Demangled: conv_Kernel(float const*, float const*, float*, int)
Function : _Z11conv_KernelPKfS0_Pfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R11, c[0x0][0x398] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?trans1;
IADD3 R3, PT, PT, R11, -0x1, R11 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.AND P0, PT, R11, 0x1, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?WAIT11_END_GROUP;
@!P0 BRA 0x5b0 ?trans5;
ISETP.GE.U32.AND P0, PT, R11.reuse, 0x4, PT ?trans1;
IADD3 R7, PT, PT, R0, -R11, RZ ?trans2;
LOP3.LUT R8, R11, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R6, RZ ?trans1;
MOV R9, RZ ?WAIT8_END_GROUP;
@!P0 BRA 0x440 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R9, R11, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans1;
MOV R6, RZ ?WAIT4_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE R4, R0, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
IADD.64 R4, R4, -0x4 ?trans2;
IADD.64 R2, R2, 0x8 &req={3,2} ?WAIT8_END_GROUP;
ISETP.GT.AND P0, PT, R10.reuse, R0.reuse, PT ?trans1;
ISETP.GT.AND P2, PT, R10.reuse, R7.reuse, PT ?trans1;
IADD3 R11, PT, PT, R10.reuse, 0x2, RZ ?trans1;
ISETP.GE.AND P5, PT, R10.reuse, R0.reuse, PT ?trans1;
ISETP.GE.AND P6, PT, R10, R7.reuse, PT ?trans1;
ISETP.LT.AND P0, PT, R0.reuse, UR6, !P0 ?trans1;
ISETP.GE.AND P2, PT, R0, UR6, P2 ?trans1;
IADD3 R12, PT, PT, R10, 0x3, RZ ?trans1;
ISETP.GT.AND P4, PT, R11.reuse, R0.reuse, PT ?trans1;
ISETP.GT.AND P3, PT, R11, R7.reuse, PT ?trans1;
ISETP.LT.AND P5, PT, R0.reuse, UR6, !P5 ?trans1;
PLOP3.LUT P0, PT, P0, P2, PT, 0xf8, 0x8f ?trans1;
ISETP.GE.AND P6, PT, R0, UR6, P6 ?trans1;
ISETP.GT.AND P1, PT, R12.reuse, R0, PT ?trans1;
ISETP.GT.AND P2, PT, R12, R7, PT ?trans1;
ISETP.LT.AND P4, PT, R0.reuse, UR6, !P4 ?trans1;
ISETP.GE.AND P3, PT, R0.reuse, UR6, P3 ?trans1;
PLOP3.LUT P5, PT, P5, P6, PT, 0xf8, 0x8f ?trans1;
ISETP.LT.AND P1, PT, R0.reuse, UR6, !P1 ?trans1;
ISETP.GE.AND P2, PT, R0, UR6, P2 ?WAIT2_END_GROUP;
PLOP3.LUT P3, PT, P4, P3, PT, 0xf8, 0x8f ?WAIT3_END_GROUP;
@P0 LDG.E.CONSTANT R11, desc[UR4][R2.64+-0x8] &req={0} &wr=0x2 ?trans1;
PLOP3.LUT P1, PT, P1, P2, PT, 0xf8, 0x8f ?WAIT3_END_GROUP;
@P0 LDG.E.CONSTANT R12, desc[UR4][R4.64+0x4] &wr=0x2 ?trans4;
@P5 LDG.E.CONSTANT R13, desc[UR4][R2.64+-0x4] &wr=0x3 ?trans4;
@P5 LDG.E.CONSTANT R14, desc[UR4][R4.64] &wr=0x3 ?trans4;
@P3 LDG.E.CONSTANT R15, desc[UR4][R2.64] &wr=0x4 ?trans4;
@P3 LDG.E.CONSTANT R16, desc[UR4][R4.64+-0x4] &wr=0x4 ?trans4;
@P1 LDG.E.CONSTANT R17, desc[UR4][R2.64+0x4] &rd=0x0 &wr=0x5 ?trans4;
@P1 LDG.E.CONSTANT R18, desc[UR4][R4.64+-0x8] &rd=0x1 &wr=0x5 ?trans1;
IADD3 R10, PT, PT, R10, 0x4, RZ ?trans1;
IADD.64 R2, R2, 0x10 &req={0} ?WAIT2_END_GROUP;
IADD.64 R4, R4, -0x10 &req={1} ?trans2;
@P0 FFMA R6, R11, R12, R6 &req={2} ?trans1;
ISETP.NE.AND P0, PT, R10, R9, PT ?WAIT3_END_GROUP;
@P5 FFMA R6, R13, R14, R6 &req={3} ?WAIT4_END_GROUP;
@P3 FFMA R6, R15, R16, R6 &req={4} ?WAIT4_END_GROUP;
@P1 FFMA R6, R17, R18, R6 &req={5} ?trans2;
@P0 BRA 0x1c0 ?trans5;
MOV R9, R10 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x5b0 ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, RZ ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R4, R0, 0x4, -R2 ?trans1;
IADD.64 R2, R2, UR8 &req={1} ?WAIT4_END_GROUP;
IADD.64 R4, R4, UR10 ?WAIT8_END_GROUP;
ISETP.GT.AND P0, PT, R9.reuse, R0, PT ?trans1;
ISETP.GT.AND P1, PT, R9, R7, PT ?WAIT4_END_GROUP;
ISETP.LT.AND P0, PT, R0.reuse, UR6, !P0 &req={2} ?trans1;
ISETP.GE.AND P1, PT, R0, UR6, P1 ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 LDG.E.CONSTANT R11, desc[UR4][R2.64] &req={0} &rd=0x0 &wr=0x2 ?trans4;
@P0 LDG.E.CONSTANT R10, desc[UR4][R4.64] &rd=0x1 &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?trans1;
IADD.64 R2, R2, 0x4 &req={0} ?trans2;
IADD.64 R4, R4, -0x4 &req={1} ?trans2;
@P0 FFMA R6, R11, R10, R6 &req={2} ?WAIT8_END_GROUP;
@P1 BRA 0x4d0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x5f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv_Kernel(float const*, float const*, float*, int)
_Z11conv_KernelPKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_lshl_b32 s2, s3, 1
s_add_i32 s2, s2, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_8
v_ashrrev_i32_e32 v2, 31, v1
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB0_6
s_load_b128 s[4:7], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_cmp_gt_i32_e32 vcc_lo, s3, v1
v_subrev_nc_u32_e32 v5, s3, v1
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, s2, s6, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v4, s2, s7, v4, s2
s_mov_b32 s6, 0
.LBB0_3:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s6, v1
s_mov_b32 s7, exec_lo
v_cndmask_b32_e64 v6, 0, 1, s2
v_cmp_gt_i32_e64 s2, s6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 0, 1, s2
v_cndmask_b32_e32 v6, v7, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_and_b32_e32 v6, 1, v6
v_cmpx_eq_u32_e32 1, v6
s_cbranch_execz .LBB0_5
global_load_b32 v6, v[3:4], off
s_load_b32 s2, s[4:5], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v0, s2, v6
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s7
v_add_co_u32 v3, s2, v3, -4
s_add_i32 s6, s6, 1
v_add_co_ci_u32_e64 v4, s2, -1, v4, s2
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s3, s6
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_7
.LBB0_6:
v_mov_b32_e32 v0, 0
.LBB0_7:
s_load_b64 s[0:1], s[0:1], 0x10
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv_Kernel | 2,570 | 1,190 | stackv2-00001-of-00015 |
// Demangled: conv_const_Kernel(float const*, float*, int)
Function : _Z17conv_const_KernelPKfPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R7, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?trans1;
IADD3 R3, PT, PT, R7, -0x1, R7 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.AND P0, PT, R7, 0x1, PT ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?WAIT11_END_GROUP;
@!P0 BRA 0x5b0 ?trans5;
ISETP.GE.U32.AND P0, PT, R7.reuse, 0x4, PT ?trans1;
IADD3 R5, PT, PT, R0, -R7, RZ ?trans2;
LOP3.LUT R8, R7, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R4, RZ ?trans1;
MOV R9, RZ ?WAIT8_END_GROUP;
@!P0 BRA 0x440 ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R9, R7, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x2 ?trans1;
MOV R4, RZ ?trans1;
UMOV.64 UR4, 0x8 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
IADD.64 R2, R2, -0x4 &req={2} ?WAIT8_END_GROUP;
ISETP.GT.AND P0, PT, R10.reuse, R0.reuse, PT ?trans1;
ISETP.GT.AND P3, PT, R10.reuse, R5.reuse, PT ?trans1;
IADD3 R6, PT, PT, R10.reuse, 0x2, RZ ?trans1;
ISETP.GE.AND P4, PT, R10.reuse, R0.reuse, PT ?trans1;
ISETP.GE.AND P1, PT, R10, R5.reuse, PT ?trans1;
ISETP.LT.AND P0, PT, R0.reuse, UR8, !P0 ?trans1;
ISETP.GE.AND P3, PT, R0, UR8, P3 ?trans1;
IADD3 R7, PT, PT, R10, 0x3, RZ ?trans1;
ISETP.GT.AND P6, PT, R6.reuse, R0.reuse, PT ?trans1;
ISETP.GT.AND P5, PT, R6, R5.reuse, PT ?trans1;
ISETP.LT.AND P4, PT, R0.reuse, UR8, !P4 ?trans1;
PLOP3.LUT P0, PT, P0, P3, PT, 0xf8, 0x8f ?trans1;
ISETP.GE.AND P1, PT, R0.reuse, UR8, P1 ?trans1;
ISETP.GT.AND P2, PT, R7.reuse, R0, PT ?trans1;
ISETP.GT.AND P3, PT, R7, R5, PT ?trans1;
ISETP.LT.AND P6, PT, R0.reuse, UR8, !P6 ?trans1;
ISETP.GE.AND P5, PT, R0.reuse, UR8, P5 ?trans1;
PLOP3.LUT P1, PT, P4, P1, PT, 0xf8, 0x8f ?trans1;
ISETP.LT.AND P2, PT, R0.reuse, UR8, !P2 ?trans1;
ISETP.GE.AND P3, PT, R0, UR8, P3 ?WAIT2_END_GROUP;
PLOP3.LUT P5, PT, P6, P5, PT, 0xf8, 0x8f ?WAIT3_END_GROUP;
@P0 LDG.E.CONSTANT R11, desc[UR6][R2.64+0x4] &req={0} &wr=0x2 ?trans1;
PLOP3.LUT P2, PT, P2, P3, PT, 0xf8, 0x8f ?WAIT5_END_GROUP;
@P1 LDG.E.CONSTANT R12, desc[UR6][R2.64] &wr=0x3 ?trans4;
@P5 LDG.E.CONSTANT R14, desc[UR6][R2.64+-0x4] &wr=0x4 ?trans4;
@P2 LDG.E.CONSTANT R16, desc[UR6][R2.64+-0x8] &rd=0x0 &wr=0x5 ?trans1;
MOV.64 R6, UR4 ?WAIT7_END_GROUP;
@P0 LDC R7, c[0x3][R6+-0x8] &wr=0x2 ?trans8;
@P1 LDC R13, c[0x3][R6+-0x4] &wr=0x3 ?trans8;
@P5 LDC R15, c[0x3][R6] &wr=0x4 ?trans1;
IADD3 R10, PT, PT, R10, 0x4, RZ ?WAIT7_END_GROUP;
@P2 LDC R17, c[0x3][R6+0x4] &wr=0x5 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ ?trans1;
IADD.64 R2, R2, -0x10 &req={0} ?trans2;
@P0 FFMA R4, R7, R11, R4 &req={2} ?trans1;
ISETP.NE.AND P0, PT, R10, R9, PT ?WAIT3_END_GROUP;
@P1 FFMA R4, R13, R12, R4 &req={3} ?WAIT4_END_GROUP;
@P5 FFMA R4, R15, R14, R4 &req={4} ?WAIT4_END_GROUP;
@P2 FFMA R4, R17, R16, R4 &req={5} ?trans2;
@P0 BRA 0x1b0 ?trans5;
MOV R9, R10 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x5b0 ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, RZ ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
LDCU UR8, c[0x0][0x390] &wr=0x2 ?trans2;
IMAD.WIDE R2, R0, 0x4, -R6 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR4 &req={1} ?WAIT8_END_GROUP;
ISETP.GT.AND P0, PT, R9.reuse, R0, PT ?trans1;
ISETP.GT.AND P1, PT, R9, R5, PT ?WAIT4_END_GROUP;
ISETP.LT.AND P0, PT, R0.reuse, UR8, !P0 &req={2} ?trans1;
ISETP.GE.AND P1, PT, R0, UR8, P1 ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 LDG.E.CONSTANT R10, desc[UR6][R2.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV R11, R6 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
IADD.64 R6, R6, 0x4 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
@P0 LDC R11, c[0x3][R11] &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R8, RZ, PT ?trans1;
IADD.64 R2, R2, -0x4 &req={0} ?trans2;
@P0 FFMA R4, R11, R10, R4 &req={2} ?WAIT10_END_GROUP;
@P1 BRA 0x4c0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x5f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: conv_const_Kernel(float const*, float*, int)
_Z17conv_const_KernelPKfPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_lshl_b32 s2, s3, 1
s_add_i32 s2, s2, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB1_8
v_ashrrev_i32_e32 v2, 31, v1
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB1_6
s_load_b64 s[6:7], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_cmp_gt_i32_e32 vcc_lo, s3, v1
v_subrev_nc_u32_e32 v5, s3, v1
v_mov_b32_e32 v0, 0
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, cA@rel32@lo+4
s_addc_u32 s5, s5, cA@rel32@hi+12
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, s2, s6, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v4, s2, s7, v4, s2
s_mov_b32 s6, 0
.LBB1_3:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s6, v1
s_mov_b32 s7, exec_lo
v_cndmask_b32_e64 v6, 0, 1, s2
v_cmp_gt_i32_e64 s2, s6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 0, 1, s2
v_cndmask_b32_e32 v6, v7, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_and_b32_e32 v6, 1, v6
v_cmpx_eq_u32_e32 1, v6
s_cbranch_execz .LBB1_5
global_load_b32 v6, v[3:4], off
s_load_b32 s2, s[4:5], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v0, s2, v6
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s7
v_add_co_u32 v3, s2, v3, -4
s_add_i32 s6, s6, 1
v_add_co_ci_u32_e64 v4, s2, -1, v4, s2
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmp_eq_u32 s3, s6
s_cbranch_scc0 .LBB1_3
s_branch .LBB1_7
.LBB1_6:
v_mov_b32_e32 v0, 0
.LBB1_7:
s_load_b64 s[0:1], s[0:1], 0x8
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB1_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| conv_const_Kernel | 2,485 | 1,225 | stackv2-00001-of-00015 |
// Demangled: pow3(float*)
Function : _Z4pow3Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans2;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R5, 0xf423f, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
FMUL R5, R0, R0 &req={2} ?WAIT4_END_GROUP;
FMUL R5, R0, R5 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: pow3(float*)
_Z4pow3Pf:
s_load_b32 s2, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0xf4240, v1
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, v2, v2
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| pow3 | 402 | 456 | stackv2-00001-of-00015 |
// Demangled: copymat_x(int, int, double***, double***)
Function : _Z9copymat_xiiPPPdS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R5, UR4, R0 &req={1} ?trans1;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, R3, !P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R2.reuse, 0x8, PT ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x1 ?trans1;
LOP3.LUT R8, R2, 0x7, RZ, 0xc0, !PT ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
LDG.E.64 R4, desc[UR4][R4.64] &req={0} &wr=0x5 ?trans4;
LDG.E.64 R6, desc[UR4][R6.64] &req={1} &wr=0x5 ?trans1;
@!P1 BRA 0x510 ?trans7;
LOP3.LUT R16, R2, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IADD.64 R10, R4, 0x20 &req={5} ?trans2;
IADD.64 R14, R6, 0x20 ?trans2;
IMAD.SHL.U32 R12, R0.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R13, R0, 0x3, R3 ?trans1;
MOV R9, RZ ?trans1;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT7_END_GROUP;
LDG.E.64 R18, desc[UR4][R10.64+-0x20] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR4][R14.64+-0x20] &wr=0x3 ?trans1;
IADD.64 R18, R12, R18 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
IADD.64 R20, R12, R20 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R20.64], R18 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R22, desc[UR4][R10.64+-0x18] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR4][R14.64+-0x18] &wr=0x3 ?trans1;
IADD.64 R22, R12, R22 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R22, desc[UR4][R22.64] &wr=0x2 ?trans1;
IADD.64 R24, R12, R24 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R24.64], R22 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R26, desc[UR4][R10.64+-0x10] &wr=0x2 ?trans4;
LDG.E.64 R28, desc[UR4][R14.64+-0x10] &wr=0x3 ?trans1;
IADD.64 R26, R12, R26 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R26, desc[UR4][R26.64] &wr=0x2 ?trans1;
IADD.64 R28, R12, R28 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R28.64], R26 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R10.64+-0x8] &req={0} &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR4][R14.64+-0x8] &wr=0x4 ?trans1;
IADD.64 R18, R12, R18 &req={3} ?WAIT7_END_GROUP;
LDG.E.64 R18, desc[UR4][R18.64] &wr=0x3 ?trans1;
IADD.64 R20, R12, R20 &req={4} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R20.64], R18 &req={3} &rd=0x0 ?trans4;
LDG.E.64 R22, desc[UR4][R10.64] &req={1} &wr=0x3 ?trans4;
LDG.E.64 R24, desc[UR4][R14.64] &wr=0x4 ?trans1;
IADD.64 R22, R12, R22 &req={3} ?WAIT7_END_GROUP;
LDG.E.64 R22, desc[UR4][R22.64] &wr=0x3 ?trans1;
IADD.64 R24, R12, R24 &req={4} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R24.64], R22 &req={3} &rd=0x1 ?trans4;
LDG.E.64 R26, desc[UR4][R10.64+0x8] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R28, desc[UR4][R14.64+0x8] &wr=0x3 ?trans1;
IADD.64 R26, R12, R26 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R26, desc[UR4][R26.64] &wr=0x2 ?trans1;
IADD.64 R28, R12, R28 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R28.64], R26 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R10.64+0x10] &req={0} &wr=0x3 ?trans4;
LDG.E.64 R20, desc[UR4][R14.64+0x10] &wr=0x4 ?trans1;
IADD.64 R18, R12, R18 &req={3} ?WAIT7_END_GROUP;
LDG.E.64 R18, desc[UR4][R18.64] &wr=0x3 ?trans1;
IADD.64 R20, R12, R20 &req={4} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R20.64], R18 &req={3} &rd=0x2 ?trans4;
LDG.E.64 R22, desc[UR4][R10.64+0x18] &req={1} &wr=0x3 ?trans4;
LDG.E.64 R24, desc[UR4][R14.64+0x18] &wr=0x4 ?trans1;
IADD3 R16, PT, PT, R16, 0x8, RZ ?trans1;
IADD.64 R22, R12, R22 &req={3} ?WAIT7_END_GROUP;
LDG.E.64 R22, desc[UR4][R22.64] &wr=0x3 ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT ?trans1;
IADD.64 R24, R12, R24 &req={4} ?trans2;
IADD.64 R10, R10, 0x40 ?trans2;
IADD.64 R14, R14, 0x40 ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R9, 0x8, RZ ?trans1;
STG.E.64 desc[UR4][R24.64], R22 &req={3} &rd=0x2 ?trans4;
@P1 BRA 0x1b0 ?trans5;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R8, 0x4, PT ?trans1;
LOP3.LUT R24, R2, 0x3, RZ, 0xc0, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R24, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x730 ?trans6;
IMAD.WIDE.U32 R14, R9, 0x8, R4 &req={5} ?WAIT5_END_GROUP;
LDG.E.64 R16, desc[UR4][R14.64] &wr=0x2 ?trans1;
SHF.L.U64.HI R13, R0.reuse, 0x3, R3 ?trans1;
IMAD.SHL.U32 R12, R0, 0x8, RZ ?trans2;
IMAD.WIDE.U32 R10, R9, 0x8, R6 ?WAIT5_END_GROUP;
LDG.E.64 R18, desc[UR4][R10.64] &wr=0x3 ?trans1;
IADD.64 R16, R12, R16 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R16, desc[UR4][R16.64] &wr=0x2 ?trans1;
IADD.64 R18, R12, R18 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R18.64], R16 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R20, desc[UR4][R14.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R22, desc[UR4][R10.64+0x8] &wr=0x3 ?trans1;
IADD.64 R20, R12, R20 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R20, desc[UR4][R20.64] &wr=0x2 ?trans1;
IADD.64 R22, R12, R22 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R22.64], R20 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R26, desc[UR4][R14.64+0x10] &wr=0x2 ?trans4;
LDG.E.64 R28, desc[UR4][R10.64+0x10] &wr=0x3 ?trans1;
IADD.64 R26, R12, R26 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R26, desc[UR4][R26.64] &wr=0x2 ?trans1;
IADD.64 R28, R12, R28 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R28.64], R26 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R16, desc[UR4][R14.64+0x18] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R18, desc[UR4][R10.64+0x18] &wr=0x3 ?trans1;
IADD.64 R16, R12, R16 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R16, desc[UR4][R16.64] &wr=0x2 ?trans1;
IADD.64 R18, R12, R18 &req={3} ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R9, 0x4, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R18.64], R16 &req={2} &rd=0x1 ?trans4;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R24, 0x1, PT ?trans1;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x890 ?trans6;
IMAD.WIDE.U32 R18, R9, 0x8, R4 &req={5,1} ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR4][R18.64] &wr=0x2 ?trans1;
SHF.L.U64.HI R21, R0.reuse, 0x3, R3 ?trans1;
IMAD.SHL.U32 R20, R0, 0x8, RZ ?trans2;
IMAD.WIDE.U32 R22, R9, 0x8, R6 ?WAIT5_END_GROUP;
LDG.E.64 R12, desc[UR4][R22.64] &wr=0x3 ?trans1;
IADD.64 R10, R20, R10 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD.64 R12, R20, R12 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R12.64], R10 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R14, desc[UR4][R18.64+0x8] &wr=0x2 ?trans4;
LDG.E.64 R16, desc[UR4][R22.64+0x8] &wr=0x3 ?trans1;
IADD.64 R14, R20, R14 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R14, desc[UR4][R14.64] &wr=0x2 ?trans1;
IADD.64 R16, R20, R16 &req={3} ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R9, 0x2, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R16.64], R14 &req={2} &rd=0x0 ?trans4;
@P1 EXIT ?trans5;
IMAD.WIDE.U32 R4, R9, 0x8, R4 &req={5} ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
SHF.L.U64.HI R11, R0.reuse, 0x3, R3 &req={0} ?trans1;
IMAD.SHL.U32 R10, R0, 0x8, RZ ?trans2;
IMAD.WIDE.U32 R6, R9, 0x8, R6 ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR4][R6.64] &wr=0x3 ?trans1;
IADD.64 R2, R10, R4 &req={2} ?WAIT7_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD.64 R8, R10, R6 &req={3} ?WAIT6_END_GROUP;
STG.E.64 desc[UR4][R8.64], R2 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x950;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: copymat_x(int, int, double***, double***)
_Z9copymat_xiiPPPdS1_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_cmp_gt_i32 s2, 0
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_cselect_b32 s3, -1, 0
s_and_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s3
s_cbranch_execz .LBB2_3
s_load_b128 s[4:7], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt lgkmcnt(0)
s_load_b64 s[0:1], s[4:5], 0x0
s_load_b64 s[4:5], s[6:7], 0x0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
.LBB2_2:
s_waitcnt lgkmcnt(0)
s_load_b64 s[6:7], s[0:1], 0x0
s_add_i32 s2, s2, -1
s_add_u32 s0, s0, 8
s_addc_u32 s1, s1, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
s_load_b64 s[6:7], s[4:5], 0x0
s_add_u32 s4, s4, 8
s_addc_u32 s5, s5, 0
global_load_b64 v[2:3], v[2:3], off
s_cmp_lg_u32 s2, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b64 v[4:5], v[2:3], off
s_cbranch_scc1 .LBB2_2
.LBB2_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| copymat_x | 4,430 | 733 | stackv2-00001-of-00015 |
// Demangled: setup_arrays2d_cuda(int, int, double*, double**, double***)
Function : _Z19setup_arrays2d_cudaiiPdPS_PS0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 BRA 0x6a0 &req={2,0} ?trans5;
ISETP.GE.U32.AND P0, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R35, R0, 0x7, RZ, 0xc0, !PT ?trans1;
HFMA2 R32, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R35, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x3b0 ?trans6;
LDC R16, c[0x0][0x384] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x1 ?trans1;
LOP3.LUT R34, R0, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
CS2R R32, SRZ ?WAIT3_END_GROUP;
IADD3 R34, PT, PT, -R34, RZ, RZ ?trans2;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={1} ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R16 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R16, R16 ?WAIT4_END_GROUP;
IADD.64 R4, R16, R2 ?trans2;
IMAD.SHL.U32 R14, R2.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R15, R2, 0x3, R3 ?trans1;
IADD.64 R2, R16, R4 ?trans2;
IMAD.SHL.U32 R12, R4.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R13, R4, 0x3, R5 ?trans1;
IADD.64 R4, R16, R2 ?trans2;
IMAD.SHL.U32 R8, R2.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R9, R2, 0x3, R3 ?trans1;
IADD.64 R2, R16, R4 ?WAIT2_END_GROUP;
IMAD.SHL.U32 R6, R4.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R7, R4, 0x3, R5 ?trans1;
IADD.64 R18, R16, R2 ?trans2;
IMAD.SHL.U32 R4, R2.reuse, 0x8, RZ ?trans1;
SHF.L.U64.HI R5, R2, 0x3, R3 ?trans2;
SHF.L.U64.HI R3, R18.reuse, 0x3, R19 ?trans1;
IMAD.SHL.U32 R2, R18, 0x8, RZ ?trans1;
MOV.64 R18, UR4 &req={2} ?WAIT8_END_GROUP;
IMAD.WIDE R20, R33, 0x8, R10 ?trans1;
IADD3 R34, PT, PT, R34, 0x8, RZ ?trans2;
IADD3 R32, PT, PT, R32, 0x8, RZ ?trans1;
IMAD R33, R16, 0x8, R33 ?trans1;
IADD.64 R22, R20, R14 ?trans2;
ISETP.NE.AND P0, PT, R34, RZ, PT ?trans1;
IADD.64 R24, R20.reuse, R8 ?trans2;
IADD.64 R26, R20, R6 ?WAIT2_END_GROUP;
STG.E.64 desc[UR6][R18.64+-0x10], R22 &rd=0x0 ?trans1;
IADD.64 R28, R20.reuse, R4 ?trans2;
IADD.64 R30, R20, R2 ?trans2;
IMAD.WIDE R36, R16, 0x8, R20 ?trans1;
STG.E.64 desc[UR6][R18.64+-0x20], R20 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x18], R36 ?trans1;
IADD.64 R22, R20, R12 &req={0} ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R18.64], R24 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x8], R22 ?trans4;
STG.E.64 desc[UR6][R18.64+0x8], R26 ?trans4;
STG.E.64 desc[UR6][R18.64+0x10], R28 ?trans4;
STG.E.64 desc[UR6][R18.64+0x18], R30 &rd=0x0 ?trans2;
IADD.64 R18, R18, 0x40 &req={0} ?WAIT2_END_GROUP;
@P0 BRA 0x250 ?trans6;
@!P1 BRA 0x6a0 ?trans5;
ISETP.GE.U32.AND P1, PT, R35, 0x4, PT ?trans1;
LOP3.LUT R16, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x530 ?trans6;
LDC R6, c[0x0][0x384] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 &req={0} ?trans1;
IMAD R9, R32, R6, RZ ?WAIT4_END_GROUP;
IADD.64 R12, R6, R6 ?trans2;
IMAD.WIDE R2, R9, 0x8, R2 &req={1} ?trans2;
IADD.64 R14, R6, R12 ?WAIT3_END_GROUP;
LEA R8, P1, R12, R2.reuse, 0x3 ?trans1;
IMAD.WIDE R6, R6, 0x8, R2 ?trans1;
LEA R10, P2, R14, R2, 0x3 ?trans2;
LEA.HI.X R9, R12, R3.reuse, R13, 0x3, P1 ?trans1;
IMAD.WIDE.U32 R4, R32, 0x8, R4 &req={2} ?trans1;
LEA.HI.X R11, R14, R3, R15, 0x3, P2 ?trans2;
IADD3 R32, PT, PT, R32, 0x4, RZ ?trans2;
STG.E.64 desc[UR6][R4.64], R2 &rd=0x0 ?trans4;
STG.E.64 desc[UR6][R4.64+0x8], R6 &rd=0x0 ?trans4;
STG.E.64 desc[UR6][R4.64+0x10], R8 &rd=0x0 ?trans4;
STG.E.64 desc[UR6][R4.64+0x18], R10 &rd=0x0 ?trans2;
@!P0 BRA 0x6a0 ?trans5;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?trans1;
LOP3.LUT R0, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x620 ?trans6;
LDC R7, c[0x0][0x384] &req={0} &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R9, R32, R7, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R9, 0x8, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R7, 0x8, R2 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R32.reuse, 0x8, R4 &req={2} ?trans1;
IADD3 R32, PT, PT, R32, 0x2, RZ ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R4.64], R2 &rd=0x1 ?trans4;
STG.E.64 desc[UR6][R4.64+0x8], R6 &rd=0x1 ?trans2;
@P1 BRA 0x6a0 ?trans5;
LDC.64 R4, c[0x0][0x390] &req={1,0} &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x384] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD R7, R32.reuse, UR4, RZ &req={1} ?trans2;
IMAD.WIDE.U32 R32, R32, 0x8, R4 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x8, R2 &req={2} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R32.64], R2 &rd=0x2 ?trans2;
LDC.64 R4, c[0x0][0x390] &req={1,0} &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x398] &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R2.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x6e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: setup_arrays2d_cuda(int, int, double*, double**, double***)
_Z19setup_arrays2d_cudaiiPdPS_PS0_:
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_3
v_mov_b32_e32 v0, 0
s_mov_b32 s8, 0
s_mov_b64 s[10:11], s[6:7]
.LBB0_2:
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[8:9], 3
s_add_u32 s12, s4, s12
s_addc_u32 s13, s5, s13
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v1, s12 :: v_dual_mov_b32 v2, s13
s_add_i32 s2, s2, -1
s_add_i32 s8, s8, s3
global_store_b64 v0, v[1:2], s[10:11]
s_add_u32 s10, s10, 8
s_addc_u32 s11, s11, 0
s_cmp_eq_u32 s2, 0
s_cbranch_scc0 .LBB0_2
.LBB0_3:
v_mov_b32_e32 v0, s6
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
global_store_b64 v2, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| setup_arrays2d_cuda | 2,952 | 520 | stackv2-00001-of-00015 |
// Demangled: add(int*, int*, int*, int)
Function : _Z3addPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R9, UR4, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={3} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={4} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(int*, int*, int*, int)
_Z3addPiS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[4:5]
global_load_b32 v2, v0, s[6:7]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 509 | 273 | stackv2-00001-of-00015 |
// Demangled: compute_kernel(float, float*, float*, int)
Function : _Z14compute_kernelfPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R6, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
ISETP.GE.AND P0, PT, R6, 0x8, PT ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R6 ?WAIT12_END_GROUP;
@!P0 EXIT ?trans5;
LEA.HI R0, R0, R6, RZ, 0x3 ?trans1;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans2;
SHF.R.S32.HI R0, RZ, 0x3, R0 ?WAIT4_END_GROUP;
LOP3.LUT R10, R0.reuse, 0xf, RZ, 0xc0, !PT ?trans1;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R0, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R6, 0xf, PT ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT8_END_GROUP;
@!P1 BRA 0x4e0 &req={1} ?trans5;
LDG.E R7, desc[UR4][R4.64] &rd=0x0 &wr=0x5 ?trans1;
LOP3.LUT R6, R0, 0xffffff0, RZ, 0xc0, !PT ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x1 ?trans3;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT7_END_GROUP;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans2;
FFMA R7, R8, UR6, R7 &req={5,3,2,1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans2;
FFMA R9, R8, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R11, R8, UR6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x4 ?trans2;
FFMA R13, R8, UR6, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x4 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x1 ?trans2;
FFMA R7, R8, UR6, R13 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans2;
FFMA R9, R8, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R11, R8, UR6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x4 ?trans2;
FFMA R13, R8, UR6, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x4 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x1 ?trans2;
FFMA R7, R8, UR6, R13 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans2;
FFMA R9, R8, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x1 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R11, R8, UR6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x2 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x4 ?trans2;
FFMA R13, R8, UR6, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x4 ?trans2;
FFMA R15, R8, UR6, R13 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R15 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x1 ?trans2;
FFMA R9, R8, UR6, R15 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x10, RZ ?trans1;
FFMA R11, R8, UR6, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x3 ?trans4;
LDG.E R8, desc[UR4][R2.64] &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
FFMA R7, R8, UR6, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x3 ?trans7;
@P1 BRA 0x1b0 ?trans5;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x8, PT ?trans1;
LOP3.LUT R8, R0, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x6d0 ?trans6;
LDG.E R6, desc[UR4][R2.64] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans3;
LDG.E R7, desc[UR4][R4.64] &req={3} &wr=0x2 ?trans2;
FFMA R7, R6, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x2 ?trans2;
FFMA R9, R6, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R11, R6, UR6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x3 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x4 ?trans2;
FFMA R13, R6, UR6, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x4 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x1 ?trans2;
FFMA R7, R6, UR6, R13 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x2 ?trans2;
FFMA R9, R6, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R11, R6, UR6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x4 ?trans2;
FFMA R13, R6, UR6, R11 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x1 ?trans2;
@!P1 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R8, 0x4, PT ?trans1;
LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R0, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x800 ?trans6;
LDG.E R6, desc[UR4][R2.64] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans3;
LDG.E R7, desc[UR4][R4.64] &req={3,1} &wr=0x2 ?trans2;
FFMA R7, R6, UR6, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R9, R6, UR6, R7 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R11, R6, UR6, R9 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R11 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R2.64] &wr=0x3 ?trans2;
FFMA R13, R6, UR6, R11 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 &rd=0x2 ?trans2;
@!P1 EXIT ?trans5;
LDG.E R7, desc[UR4][R4.64] &req={3,2,1} &rd=0x1 &wr=0x5 ?trans1;
IADD3 R0, PT, PT, -R0, RZ, RZ ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x2 ?trans6;
LDG.E R6, desc[UR4][R2.64] &req={3} &wr=0x3 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
FFMA R7, R6, UR6, R7 &req={5,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x3 ?trans7;
@P0 BRA 0x840 ?trans5;
EXIT ?trans5;
BRA 0x8b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: compute_kernel(float, float*, float*, int)
_Z14compute_kernelfPfS_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_4
s_cmp_lt_i32 s2, 8
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_load_b32 s0, s[0:1], 0x0
s_ashr_i32 s1, s2, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_lshr_b32 s1, s1, 29
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_add_i32 s2, s2, s1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_ashr_i32 s1, s2, 3
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b32 v4, v[0:1], off
.LBB0_3:
global_load_b32 v5, v[2:3], off
s_add_i32 s1, s1, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s1, 0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v4, s0, v5
global_store_b32 v[0:1], v4, off
s_cbranch_scc1 .LBB0_3
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| compute_kernel | 3,612 | 710 | stackv2-00001-of-00015 |
// Demangled: sum_matrices(float*, float*, float*, int, int)
Function : _Z12sum_matricesPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R3, SR_TID.Y &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans1;
IMAD R7, R7, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR7, PT &req={3} ?trans1;
IMAD R0, R0, UR4, R3 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R9, R0, UR6, R7 ?WAIT6_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: sum_matrices(float*, float*, float*, int, int)
_Z12sum_matricesPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s5, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
s_load_b128 s[8:11], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| sum_matrices | 709 | 820 | stackv2-00001-of-00015 |
// Demangled: block_sum(double const*, double*, unsigned long)
Function : _Z9block_sumPKdPdm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R10, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
MOV.64 R2, RZ ?trans2;
S2R R11, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD R4, R11, UR4, R10 &req={1} ?WAIT5_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R4, R8, PT &req={2} ?WAIT14_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans2;
@!P0 LEA R6, P1, R4, R6, 0x3 &req={1} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R7, R4, R7, R5, 0x3, P1 ?WAIT5_END_GROUP;
@!P0 LDG.E.64 R2, desc[UR6][R6.64] &req={3} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.NE.S64.AND P0, PT, R8, 0x1, PT ?trans2;
ISETP.NE.AND P1, PT, R10, RZ, PT ?WAIT4_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R9, R10, UR4, 0x3 ?WAIT5_END_GROUP;
STS.64 [R9], R2 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans8;
BAR.RED.OR.DEFER_BLOCKING 0x0, P0 ?trans6;
B2R.RESULT RZ, P2 &wr=0x2 ?trans2;
@!P2 BRA 0x2f0 &req={2,1,0} ?trans5;
HFMA2 R7, -RZ, RZ, 0, 6.103515625e-05 ?trans1;
PRMT R6, R0, 0x7610, R6 ?trans2;
LOP3.LUT R0, RZ, R10, RZ, 0x33, !PT ?WAIT7_END_GROUP;
IADD3 R2, PT, PT, R7.reuse, 0x1, RZ ?trans2;
IADD3 R8, PT, PT, R0, R7, RZ ?trans2;
IADD3 R7, PT, PT, R7, -0x1, RZ ?trans2;
LEA.HI R2, R2, R2, RZ, 0x1 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, 0x2, PT ?trans1;
SHF.R.S32.HI R13, RZ, 0x1, R2 ?WAIT4_END_GROUP;
SEL R6, R6, RZ, P0 ?trans1;
ISETP.GE.AND P2, PT, R8, R13.reuse, PT ?trans1;
MOV R7, R13 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R6, 0xff, RZ, 0xc0, !PT ?WAIT9_END_GROUP;
@P2 LEA R8, R8, UR4, 0x3 ?trans1;
@P2 LDS.64 R4, [R9] ?trans4;
@P2 LDS.64 R2, [R8] &wr=0x0 ?trans2;
@P2 DADD R2, R2, R4 &req={0} &wr=0x0 ?trans2;
@P2 STS.64 [R9], R2 &req={0} &rd=0x0 ?trans1;
BAR.RED.OR.DEFER_BLOCKING 0x0, P0 ?trans6;
B2R.RESULT RZ, P0 &wr=0x1 ?trans2;
@P0 BRA 0x1d0 &req={1,0} ?trans5;
@P1 EXIT ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?trans1;
IMAD.WIDE.U32 R4, R11, 0x8, R4 &req={1} ?WAIT8_END_GROUP;
LDS.64 R2, [UR4] &wr=0x0 ?trans4;
STG.E.64 desc[UR6][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x380;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: block_sum(double const*, double*, unsigned long)
_Z9block_sumPKdPdm:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
s_add_u32 s0, s0, 24
s_mov_b32 s2, s15
s_addc_u32 s1, s1, 0
s_mov_b32 s10, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[4:5], null, s2, s3, v[1:2]
v_mov_b32_e32 v2, 0
v_mov_b32_e32 v3, 0
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u64_e64 s[8:9], v[4:5]
s_cbranch_execz .LBB0_2
v_lshlrev_b64 v[2:3], 3, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[2:3], v[2:3], off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s10
v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v4, 3, v1
s_cmp_lg_u64 s[8:9], 1
s_movk_i32 s5, 0x400
s_waitcnt vmcnt(0)
ds_store_b64 v4, v[2:3]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
global_load_b32 v2, v5, s[0:1] offset:14
s_cselect_b32 s1, -1, 0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s0, v2
v_bfe_u32 v2, v0, 10, 10
v_bfe_u32 v0, v0, 20, 10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_and_b32 s4, s0, 0xffff
s_lshr_b32 s0, s0, 16
v_mad_u32_u24 v0, v0, s4, v2
s_mul_i32 s4, s3, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_bfe_i32 s4, s4, 0x180000
v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
s_mul_i32 s0, s4, s0
v_mbcnt_lo_u32_b32 v0, -1, 0
s_add_i32 s0, s0, 31
s_mov_b32 s4, 0
s_and_not1_b32 s0, s0, 31
s_delay_alu instid0(VALU_DEP_2)
v_lshrrev_b32_e32 v3, 5, v2
s_cmp_lg_u32 s0, 32
v_cmp_lt_u32_e64 s0, 31, v2
v_not_b32_e32 v2, v1
s_cselect_b32 s3, -1, 0
v_or_b32_e32 v3, v0, v3
.LBB0_3:
v_cndmask_b32_e64 v6, 0, 1, s1
s_and_not1_b32 vcc_lo, exec_lo, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_dpp v6, v6, v6 row_shl:1 row_mask:0xf bank_mask:0xf bound_ctrl:1
v_or_b32_dpp v6, v6, v6 row_shl:2 row_mask:0xf bank_mask:0xf bound_ctrl:1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_dpp v6, v6, v6 row_shl:4 row_mask:0xf bank_mask:0xf bound_ctrl:1
v_or_b32_dpp v6, v6, v6 row_shl:8 row_mask:0xf bank_mask:0xf bound_ctrl:1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_dpp v6, v6 row_share:0 row_mask:0xf bank_mask:0xf bound_ctrl:1
v_permlanex16_b32 v7, v6, 0, 0 op_sel:[0,1]
s_delay_alu instid0(VALU_DEP_1)
v_or_b32_e32 v6, v7, v6
s_cbranch_vccnz .LBB0_12
s_mov_b32 s8, exec_lo
v_cmpx_eq_u32_e32 0, v3
s_cbranch_execz .LBB0_6
ds_store_b32 v5, v6 offset:8192
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s8
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 s9, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s8, s9
s_cbranch_execz .LBB0_11
s_mov_b32 s10, exec_lo
s_mov_b32 s9, 0
.LBB0_8:
s_ctz_i32_b32 s11, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_readlane_b32 s12, v6, s11
s_lshl_b32 s11, 1, s11
s_and_not1_b32 s10, s10, s11
s_delay_alu instid0(VALU_DEP_1)
s_or_b32 s9, s9, s12
s_cmp_lg_u32 s10, 0
s_cbranch_scc1 .LBB0_8
v_mbcnt_lo_u32_b32 v6, exec_lo, 0
s_mov_b32 s10, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v6
s_xor_b32 s10, exec_lo, s10
s_cbranch_execz .LBB0_11
v_mov_b32_e32 v6, s9
ds_or_b32 v5, v6 offset:8192
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v6, v5 offset:8192
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_12:
s_mov_b32 s10, -1
s_mov_b32 s9, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ne_u32_e32 0, v6
s_cbranch_execz .LBB0_16
s_add_i32 s8, s5, 1
v_add_nc_u32_e32 v6, s5, v2
s_lshr_b32 s10, s8, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_i32 s8, s8, s10
s_mov_b32 s10, exec_lo
s_ashr_i32 s8, s8, 1
v_cmpx_le_i32_e64 s8, v6
s_cbranch_execz .LBB0_15
v_lshlrev_b32_e32 v6, 3, v6
ds_load_b64 v[6:7], v6
ds_load_b64 v[8:9], v4
s_waitcnt lgkmcnt(0)
v_add_f64 v[6:7], v[6:7], v[8:9]
ds_store_b64 v4, v[6:7]
.LBB0_15:
s_or_b32 exec_lo, exec_lo, s10
s_add_i32 s5, s5, -3
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_u32 s5, -2
s_cselect_b32 s5, -1, 0
s_xor_b32 s10, exec_lo, -1
s_and_b32 s1, s5, s1
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s9
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s5, exec_lo, s10
s_or_b32 s4, s5, s4
s_mov_b32 s5, s8
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s4
s_mov_b32 s3, 0
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB0_19
ds_load_b64 v[0:1], v4
s_lshl_b64 s[0:1], s[2:3], 3
v_mov_b32_e32 v2, 0
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
s_waitcnt lgkmcnt(0)
global_store_b64 v2, v[0:1], s[0:1]
.LBB0_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| block_sum | 1,430 | 2,763 | stackv2-00001-of-00015 |
// Demangled: fullFilterKernel(_Graph_node_A*, int*, int*, int*, int*)
Function : _Z16fullFilterKernelP13_Graph_node_APiS1_S1_S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x1 ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
S2R R0, SR_CTAID.Y &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans1;
S2R R8, SR_TID.X &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R8, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R8, 0x18f, PT ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R5, desc[UR4][R2.64] &wr=0x1 ?trans1;
@!P0 S2R R7, SR_CgaCtaId &wr=0x0 ?trans1;
@!P0 IMAD.WIDE R4, R5, 0x640, R10 &req={1} ?WAIT4_END_GROUP;
@!P0 IMAD.WIDE.U32 R4, R8, 0x4, R4 ?WAIT6_END_GROUP;
@!P0 LDG.E R4, desc[UR4][R4.64+-0x640] &wr=0x2 ?trans1;
@!P0 MOV R6, 0x400 ?trans1;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans1;
BSSY.RECONVERGENT B1, 0x920 ?trans1;
MOV R9, RZ ?trans1;
IMAD.WIDE.U32 R10, R8, 0x640, R10 ?trans1;
@!P0 LEA R7, R7, R6, 0x18 &req={0} ?WAIT5_END_GROUP;
@!P0 IMAD R7, R8, 0x4, R7 ?WAIT5_END_GROUP;
@!P0 STS [R7], R4 &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
IMAD.WIDE.U32 R4, R13, 0x4, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR4][R4.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R12, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x910 ?trans5;
S2R R5, SR_CgaCtaId &wr=0x0 ?trans1;
MOV R4, 0x400 ?trans1;
HFMA2 R14, -RZ, RZ, 0, 0 ?trans1;
BSSY.RECONVERGENT B0, 0x8e0 ?trans3;
LEA R17, R5, R4, 0x18 &req={0} ?WAIT7_END_GROUP;
IMAD R16, R14, 0x4, R17 ?WAIT5_END_GROUP;
LDS.128 R4, [R16] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x8d0 ?trans5;
ISETP.NE.AND P0, PT, R12, R4, PT ?trans1;
BSSY.RELIABLE B2, 0x370 ?WAIT12_END_GROUP;
@P0 BRA 0x330 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R15, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x8d0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
ISETP.NE.AND P0, PT, R12, R5, PT ?trans1;
BSSY.RELIABLE B2, 0x430 ?WAIT12_END_GROUP;
@P0 BRA 0x3f0 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x8d0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
ISETP.NE.AND P0, PT, R12, R6, PT ?trans1;
BSSY.RELIABLE B2, 0x4f0 ?WAIT12_END_GROUP;
@P0 BRA 0x4b0 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x8d0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
ISETP.NE.AND P0, PT, R12, R7, PT ?trans1;
BSSY.RELIABLE B2, 0x580 ?WAIT12_END_GROUP;
@P0 BRA 0x570 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
LDS.128 R4, [R16+0x10] &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x8d0 ?trans5;
ISETP.NE.AND P0, PT, R12, R4, PT ?trans1;
BSSY.RELIABLE B2, 0x670 ?WAIT12_END_GROUP;
@P0 BRA 0x630 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R15, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R15, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x8d0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
ISETP.NE.AND P0, PT, R12, R5, PT ?trans1;
BSSY.RELIABLE B2, 0x730 ?WAIT12_END_GROUP;
@P0 BRA 0x6f0 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
ISETP.NE.AND P0, PT, R6, RZ, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x8d0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
ISETP.NE.AND P0, PT, R12, R6, PT ?trans1;
BSSY.RELIABLE B2, 0x7f0 ?WAIT12_END_GROUP;
@P0 BRA 0x7b0 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x8d0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
ISETP.NE.AND P0, PT, R12, R7, PT ?trans1;
BSSY.RELIABLE B2, 0x880 ?WAIT12_END_GROUP;
@P0 BRA 0x870 ?trans5;
LDG.E R4, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R5, R8, PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x8c0 ?trans5;
BSYNC.RELIABLE B2 ?trans5;
IADD3 R14, PT, PT, R14, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R14, 0x190, PT ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
BRA 0x8d0 ?trans5;
IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R13, 0x190, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1e0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
WARPSYNC.ALL ?trans5;
NOP ?trans1;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LDG.E R4, desc[UR4][R4.64] &req={0} &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R0, 0x1, RZ ?WAIT5_END_GROUP;
IMAD R7, R7, R4, R8 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x9c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: fullFilterKernel(_Graph_node_A*, int*, int*, int*, int*)
_Z16fullFilterKernelP13_Graph_node_APiS1_S1_S1_:
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s3, s[10:11], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s3
s_cbranch_scc1 .LBB1_22
s_load_b64 s[0:1], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s3, v0
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB1_22
s_mov_b32 s2, s15
s_mov_b32 s3, exec_lo
v_cmpx_lt_u32_e32 0x18f, v0
s_xor_b32 s10, exec_lo, s3
v_mov_b32_e32 v3, 0
s_ashr_i32 s3, s2, 31
s_or_saveexec_b32 s10, s10
v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v4, s2
s_xor_b32 exec_lo, exec_lo, s10
s_cbranch_execz .LBB1_6
s_ashr_i32 s3, s2, 31
v_lshlrev_b32_e32 v1, 2, v0
s_lshl_b64 s[12:13], s[2:3], 2
v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v4, s2
s_add_u32 s12, s8, s12
s_addc_u32 s13, s9, s13
v_mov_b32_e32 v3, 0
s_load_b32 s11, s[12:13], 0x0
s_waitcnt lgkmcnt(0)
s_mul_i32 s12, s11, 0x640
s_mul_hi_i32 s11, s11, 0x640
s_add_u32 s12, s4, s12
s_addc_u32 s13, s5, s11
global_load_b32 v2, v1, s[12:13] offset:-1600
s_waitcnt vmcnt(0)
ds_store_b32 v1, v2
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s10
v_mad_u64_u32 v[1:2], null, 0x640, v0, s[4:5]
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_mov_b32 s5, 0
s_mov_b32 s3, 0
s_mov_b32 s4, s5
s_waitcnt lgkmcnt(0)
s_barrier
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[6:7], null, 0x640, v3, v[2:3]
v_add_co_u32 v2, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v5, vcc_lo
buffer_gl0_inv
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, v6
.LBB1_7:
s_lshl_b64 s[10:11], s[4:5], 2
s_or_b32 s8, s8, exec_lo
v_add_co_u32 v6, vcc_lo, v1, s10
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo
s_mov_b32 s9, exec_lo
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e32 0, v6
s_cbranch_execz .LBB1_20
s_mov_b32 s10, 0
s_mov_b32 s12, 0
.LBB1_9:
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v7, s12
s_or_b32 s13, s13, exec_lo
s_or_b32 s14, s14, exec_lo
ds_load_b32 v7, v7
s_waitcnt lgkmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v7
s_cbranch_vccnz .LBB1_15
s_mov_b32 s14, -1
s_mov_b32 s16, -1
s_mov_b32 s15, -1
s_mov_b32 s17, exec_lo
v_cmpx_eq_u32_e64 v6, v7
s_cbranch_execz .LBB1_12
global_load_b32 v7, v[2:3], off
s_xor_b32 s15, exec_lo, -1
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v7, -1, v7
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, v7, v0
s_or_not1_b32 s16, vcc_lo, exec_lo
.LBB1_12:
s_or_b32 exec_lo, exec_lo, s17
s_and_saveexec_b32 s17, s16
s_add_i32 s12, s12, 4
s_delay_alu instid0(SALU_CYCLE_1)
s_cmpk_eq_i32 s12, 0x640
s_cselect_b32 s14, -1, 0
s_or_b32 s15, s15, exec_lo
s_or_not1_b32 s14, s14, exec_lo
s_or_b32 exec_lo, exec_lo, s17
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s13, s13, exec_lo
s_and_b32 s15, s15, exec_lo
s_or_b32 s13, s13, s15
s_branch .LBB1_16
.LBB1_15:
.LBB1_16:
s_and_b32 s15, exec_lo, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_or_b32 s10, s15, s10
s_and_not1_b32 s11, s11, exec_lo
s_and_b32 s15, s13, exec_lo
s_or_b32 s11, s11, s15
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB1_9
s_or_b32 exec_lo, exec_lo, s10
s_xor_b32 s10, s11, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_saveexec_b32 s11, s10
s_xor_b32 s10, exec_lo, s11
v_add_nc_u32_e32 v4, 1, v4
s_or_b32 exec_lo, exec_lo, s10
s_add_i32 s4, s4, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_cmpk_eq_i32 s4, 0x190
s_cselect_b32 s10, -1, 0
s_and_not1_b32 s8, s8, exec_lo
s_and_b32 s10, s10, exec_lo
s_or_b32 s8, s8, s10
.LBB1_20:
s_or_b32 exec_lo, exec_lo, s9
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s9, exec_lo, s8
s_or_b32 s3, s9, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB1_7
s_or_b32 exec_lo, exec_lo, s3
s_load_b32 s0, s[0:1], 0x0
s_add_i32 s1, s2, 1
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[1:2], null, s0, s1, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v4, off
.LBB1_22:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| fullFilterKernel | 3,428 | 2,481 | stackv2-00001-of-00015 |
// Demangled: step_type2(long, double, double*, double*, double*)
Function : _Z10step_type2ldPdS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R4, R3, UR4, R4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.S64.AND P0, PT, R4, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
IMAD R2, R3, UR4, RZ &req={0} ?trans1;
MOV R3, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R4, R2 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P0, PT, R8.reuse, UR6, PT ?trans2;
IMNMX.U64 PT, PT, R10, R8, UR6, !PT, !PT ?WAIT4_END_GROUP;
SEL.64 R6, RZ, 0x1, P0 ?WAIT4_END_GROUP;
IADD.64 R8, R8, R6 ?WAIT4_END_GROUP;
IADD.64 R10, R10, -R8 ?WAIT6_END_GROUP;
ISETP.NE.U32.AND P0, PT, R11, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x290 ?trans5;
I2F.U32.RP R0, R2 &wr=0x0 ?trans1;
IADD3 R11, PT, PT, RZ, -R2, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R2, RZ, PT ?trans1;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans2;
MOV R8, RZ &req={0} ?trans1;
IMAD R11, R11, R9, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R11, R8 ?WAIT6_END_GROUP;
IMAD.HI.U32 R8, R9, R10, RZ ?WAIT4_END_GROUP;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
IADD3 R11, PT, PT, -R8, RZ, RZ ?WAIT5_END_GROUP;
IMAD R11, R2, R11, R10 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R11, R2, PT ?WAIT13_END_GROUP;
@P0 IADD3 R11, PT, PT, -R2, R11, RZ ?trans2;
@P0 IADD3 R8, PT, PT, R8, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R11, R2, PT ?WAIT13_END_GROUP;
@P1 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R8, RZ, R2, RZ, 0x33, !PT ?trans1;
BRA 0x2b0 ?trans6;
MOV R0, 0x2b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x760 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R8, R6, R8 ?trans2;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x470 ?trans1;
IADD.64 R6, R8.reuse, 0x1 ?trans2;
MOV R7, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x1 ?trans1;
ISETP.GE.U64.AND P0, PT, R8, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR8, c[0x0][0x3a0] &wr=0x2 ?trans4;
ISETP.NE.S64.AND P1, PT, R6, RZ, PT ?trans2;
LDCU.64 UR10, c[0x0][0x388] &wr=0x3 ?WAIT12_END_GROUP;
@!P1 BRA 0x460 &req={2,1,0} ?trans5;
SHF.L.U64.HI R9, R4.reuse, 0x3, R5 ?trans1;
IMAD.SHL.U32 R8, R4, 0x8, RZ ?WAIT7_END_GROUP;
IADD.64 R14, R8.reuse, UR8 ?trans2;
IADD.64 R10, R8, UR6 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R14, desc[UR4][R14.64] &wr=0x2 ?trans4;
LDG.E.64 R12, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD.64 R6, R6, -0x1 ?trans2;
IADD.64 R4, R2, R4 ?WAIT3_END_GROUP;
LEA R8, P2, R2, R8, 0x3 ?trans1;
ISETP.NE.S64.AND P1, PT, R6, RZ, PT ?WAIT3_END_GROUP;
LEA.HI.X R9, R2, R9, RZ, 0x3, P2 ?trans1;
DFMA R12, R14, UR10, R12 &req={3,2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64], R12 &req={0} &rd=0x0 ?trans8;
@P1 BRA 0x3a0 ?trans5;
BSYNC.RECONVERGENT B0 &req={3} ?trans5;
@!P0 EXIT ?trans5;
IMAD.SHL.U32 R6, R2, 0x8, RZ ?trans1;
SHF.R.U32.HI R7, RZ, 0x1d, R2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU.128 UR12, c[0x0][0x380] &wr=0x3 ?trans4;
SHF.L.U64.HI R9, R4.reuse, 0x3, R5 &req={4} ?trans1;
IMAD.SHL.U32 R8, R4, 0x8, RZ ?WAIT5_END_GROUP;
IADD.64 R10, R8.reuse, UR6 &req={1,0} ?trans2;
IADD.64 R12, R8, UR8 &req={2} ?WAIT4_END_GROUP;
LDG.E.64 R8, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR4][R12.64] &wr=0x2 ?trans1;
IADD.64 R16, R6.reuse, R10 ?trans2;
IADD.64 R18, R6.reuse, R12 ?trans2;
DFMA R8, R14, UR14, R8 &req={3,2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64], R8 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R14, desc[UR4][R16.64] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR4][R18.64] &wr=0x2 ?trans1;
IADD.64 R22, R6, R16 ?WAIT2_END_GROUP;
IADD.64 R24, R6, R18 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R20, UR14, R14 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R16.64], R14 &req={1} &rd=0x4 ?trans4;
LDG.E.64 R12, desc[UR4][R22.64] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR4][R24.64] &wr=0x2 ?trans1;
IADD.64 R28, R6, R24 ?WAIT2_END_GROUP;
IADD.64 R26, R6, R22 ?trans2;
IADD.64 R4, R2, R4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R20, UR14, R12 &req={2} &wr=0x1 ?trans2;
STG.E.64 desc[UR4][R22.64], R12 &req={1} &rd=0x4 ?trans4;
LDG.E.64 R28, desc[UR4][R28.64] &wr=0x2 ?trans4;
LDG.E.64 R8, desc[UR4][R26.64] &req={0} &wr=0x2 ?trans1;
IADD.64 R4, R2, R4 ?WAIT4_END_GROUP;
IADD.64 R4, R2, R4 ?WAIT4_END_GROUP;
IADD.64 R4, R2, R4 ?WAIT6_END_GROUP;
ISETP.GE.S64.AND P0, PT, R4, UR12, PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R28, UR14, R8 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R26.64], R8 &req={0} &rd=0x4 ?trans1;
@!P0 BRA 0x4d0 ?trans5;
EXIT ?trans5;
MOV R8, R2 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
I2F.U64.RP R16, R8 &wr=0x0 ?trans2;
MUFU.RCP R16, R16 &req={0} &wr=0x0 ?trans2;
IADD3 R12, PT, PT, R16, 0x1ffffffe, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.U64.TRUNC R12, R12 &wr=0x0 ?trans2;
IMAD.WIDE.U32 R14, R12, R2, RZ &req={0} ?WAIT4_END_GROUP;
IMAD R15, R13, R2, R15 ?trans1;
IADD3 R17, P0, PT, RZ, -R14, RZ ?WAIT4_END_GROUP;
IADD3.X R19, PT, PT, RZ, ~R15, RZ, P0, !PT ?trans1;
IMAD.HI.U32 R14, R12, R17, RZ ?trans1;
MOV R15, R12 ?WAIT3_END_GROUP;
IMAD R21, R13, R19.reuse, RZ ?trans2;
IMAD.WIDE.U32 R14, P0, R12, R19, R14 ?WAIT4_END_GROUP;
IMAD.HI.U32 R19, R13, R19, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R14, P1, R13, R17, R14 ?WAIT5_END_GROUP;
IADD3 R15, P2, PT, R21, R14, RZ ?trans2;
IADD3.X R14, PT, PT, R19, R13, RZ, P0, !PT ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R12, R15, R2, RZ ?trans1;
IADD3.X R17, PT, PT, RZ, RZ, R14, P2, P1 ?trans2;
IADD3 R19, P0, PT, RZ, -R12, RZ ?WAIT3_END_GROUP;
IMAD R12, R17, R2, R13 ?trans2;
HFMA2 R13, -RZ, RZ, 0, 0 ?trans2;
IMAD.HI.U32 R14, R15, R19, RZ ?trans1;
IADD3.X R12, PT, PT, RZ, ~R12, RZ, P0, !PT ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R14, P0, R15, R12, R14 ?WAIT4_END_GROUP;
IMAD R16, R17.reuse, R12, RZ ?trans2;
IMAD.HI.U32 R15, P1, R17, R19, R14 ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R17, R12, RZ ?trans1;
IADD3 R15, P2, PT, R16, R15, RZ ?WAIT4_END_GROUP;
IADD3.X R17, PT, PT, R12, R17, RZ, P0, !PT ?trans1;
IMAD.HI.U32 R12, R15, R10, RZ ?WAIT3_END_GROUP;
IADD3.X R17, PT, PT, RZ, RZ, R17, P2, P1 ?trans1;
IMAD.WIDE.U32 R12, R15, R11, R12 ?WAIT4_END_GROUP;
IMAD.HI.U32 R14, R17, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R13, P0, R17, R10, R12 ?WAIT4_END_GROUP;
IMAD R16, R17, R11, RZ ?trans1;
IADD3.X R12, PT, PT, R14, RZ, RZ, P0, !PT ?WAIT4_END_GROUP;
IADD3 R15, P0, PT, R16, R13, RZ ?WAIT4_END_GROUP;
IADD3.X R17, PT, PT, RZ, R12, RZ, P0, !PT ?trans1;
IMAD.WIDE.U32 R12, R15, R2, RZ ?WAIT4_END_GROUP;
IMAD R13, R17, R2, R13 ?WAIT5_END_GROUP;
IADD.64 R10, R10, -R12 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P0, PT, R10, R8, PT ?WAIT14_END_GROUP;
@P0 IADD.64 R10, -R8, R10 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P1, PT, R10, R8, PT ?trans2;
MOV R10, R15 ?trans1;
MOV R11, R17 ?WAIT5_END_GROUP;
@P0 IADD.64 R10, R10, 0x1 ?trans2;
ISETP.NE.S64.AND P0, PT, R8, RZ, PT ?WAIT4_END_GROUP;
@P1 IADD.64 R10, R10, 0x1 ?WAIT4_END_GROUP;
SEL.64 R8, R10, -0x1, P0 ?trans2;
MOV R10, R0 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 ?trans5;
BRA 0xb00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: step_type2(long, double, double*, double*, double*)
_Z10step_type2ldPdS_S_:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x0
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s8, 0xffff
s_mov_b32 s8, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i64_e64 s[4:5], v[1:2]
s_cbranch_execz .LBB0_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[8:11], s[0:1], 0x18
v_lshlrev_b64 v[3:4], 3, v[1:2]
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[12:13], s[2:3], 3
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
v_add_co_u32 v5, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
v_add_co_u32 v7, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v4, vcc_lo
v_add_co_u32 v1, vcc_lo, v1, s2
global_load_b64 v[9:10], v[5:6], off
global_load_b64 v[7:8], v[7:8], off
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
v_add_co_u32 v3, s0, v3, s12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v4, s0, s13, v4, s0
v_cmp_le_i64_e32 vcc_lo, s[4:5], v[1:2]
s_or_b32 s3, vcc_lo, s3
s_waitcnt vmcnt(0)
v_fma_f64 v[7:8], v[7:8], s[6:7], v[9:10]
global_store_b64 v[5:6], v[7:8], off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| step_type2 | 4,332 | 800 | stackv2-00001-of-00015 |
// Demangled: propagate(int, int*, int*)
Function : _Z9propagateiPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R7, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R7, -0x1, RZ ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &req={3} &wr=0x2 ?trans1;
IMAD R7, R7, UR6, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R0, R5, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: propagate(int, int*, int*)
_Z9propagateiPiS_:
s_cmp_eq_u32 s15, 0
s_cbranch_scc1 .LBB1_2
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s3, 0xffff
s_ashr_i32 s3, s15, 31
v_mad_u64_u32 v[1:2], null, s2, s0, v[0:1]
s_lshl_b64 s[0:1], s[2:3], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_add_u32 s0, s4, s0
s_addc_u32 s1, s5, s1
s_add_u32 s0, s0, -4
s_addc_u32 s1, s1, -1
v_ashrrev_i32_e32 v2, 31, v1
s_load_b32 s0, s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v2, s0, v2
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| propagate | 518 | 534 | stackv2-00001-of-00015 |
// Demangled: scan(int, int*, int*)
Function : _Z4scaniPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD R7, R0, UR6, R5 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={2} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR8][R2.64] &req={3} &wr=0x2 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR4, 0x400 ?trans1;
LOP3.LUT P0, R6, R5.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R5, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R10, 0x3, PT ?trans1;
LOP3.LUT R10, R5, 0x1f, RZ, 0xc0, !PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?WAIT6_END_GROUP;
LEA R4, R5, UR4, 0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR6, -0x1, URZ ?WAIT4_END_GROUP;
STS [R4], R7 &req={2} &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
LOP3.LUT R7, R5, 0x7, RZ, 0xc0, !PT &req={1} ?WAIT5_END_GROUP;
@P0 LDS R8, [R4] ?trans4;
@P0 LDS R9, [R4+-0x4] &wr=0x1 ?trans2;
@P0 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@P0 STS [R4], R9 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R7, 0x7, PT ?trans1;
LOP3.LUT R9, R5, 0xf, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
@!P1 LDS R8, [R4] ?trans4;
@!P1 LDS R11, [R4+-0x8] &wr=0x1 ?trans2;
@!P1 IADD3 R11, PT, PT, R8, R11, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R9, 0xf, PT ?WAIT5_END_GROUP;
@!P0 LDS R7, [R4] ?trans4;
@!P0 LDS R8, [R4+-0x10] &wr=0x1 ?trans2;
@!P0 IADD3 R7, PT, PT, R7, R8, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R7 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R10, 0x1f, PT ?trans1;
IADD3 R10, PT, PT, R5.reuse, 0x1, RZ ?trans2;
LOP3.LUT R7, R5, 0x3f, RZ, 0xc0, !PT &req={1} ?trans2;
@!P1 LDS R8, [R4] ?trans4;
@!P1 LDS R9, [R4+-0x20] &wr=0x1 ?trans2;
@!P1 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R9 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R7, 0x3f, PT ?trans1;
LOP3.LUT R9, R5, 0x7f, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
@!P0 LDS R8, [R4] ?trans4;
@!P0 LDS R11, [R4+-0x40] &wr=0x1 ?trans2;
@!P0 IADD3 R11, PT, PT, R8, R11, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R11 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R9, 0x7f, PT ?trans1;
LOP3.LUT R11, R10, 0x7f, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
@!P1 LDS R7, [R4] ?trans4;
@!P1 LDS R8, [R4+-0x80] &wr=0x1 ?trans2;
@!P1 IADD3 R7, PT, PT, R7, R8, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x40, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P1, PT, R11, 0x40, !P1 ?trans1;
LOP3.LUT R11, R10, 0x3f, RZ, 0xc0, !PT ?trans1;
@!P0 LDS R8, [R4] ?trans4;
@!P0 LDS R9, [R4+-0x100] &wr=0x1 ?trans2;
@!P0 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R5, 0x20, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R11, 0x20, !P0 ?trans1;
LOP3.LUT R11, R10, 0x1f, RZ, 0xc0, !PT ?trans1;
@!P1 LDS R7, [R4] ?trans4;
@!P1 LDS R8, [R4+-0x100] &wr=0x1 ?trans2;
@!P1 IADD3 R7, PT, PT, R7, R8, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x10, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P1, PT, R11, 0x10, !P1 ?trans1;
LOP3.LUT R11, R10, 0xf, RZ, 0xc0, !PT ?trans1;
@!P0 LDS R8, [R4] ?trans4;
@!P0 LDS R9, [R4+-0x80] &wr=0x1 ?trans2;
@!P0 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R5, 0x8, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R11, 0x8, !P0 ?trans1;
LOP3.LUT R11, R10.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R10, 0x3, RZ, 0xc0, !PT ?trans1;
@!P1 LDS R8, [R4] ?trans4;
@!P1 LDS R7, [R4+-0x40] &wr=0x1 ?trans2;
@!P1 IADD3 R7, PT, PT, R8, R7, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x4, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P1, PT, R11, 0x4, !P1 ?trans1;
@!P0 LDS R8, [R4] ?trans4;
@!P0 LDS R9, [R4+-0x20] &wr=0x1 ?trans2;
@!P0 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R5, 0x2, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R10, 0x2, !P0 ?trans1;
@!P1 LDS R8, [R4] ?trans4;
@!P1 LDS R7, [R4+-0x10] &wr=0x1 ?trans2;
@!P1 IADD3 R7, PT, PT, R8, R7, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R7 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R5, RZ, PT ?WAIT5_END_GROUP;
ISETP.NE.OR P1, PT, R6, RZ, !P1 ?trans1;
@!P0 LDS R8, [R4] ?trans4;
@!P0 LDS R9, [R4+-0x8] &wr=0x1 ?trans2;
@!P0 IADD3 R9, PT, PT, R8, R9, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R4], R9 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P0, PT, R5, UR4, PT ?WAIT5_END_GROUP;
@!P1 LDS R6, [R4] ?trans4;
@!P1 LDS R11, [R4+-0x4] &wr=0x1 ?trans2;
@!P1 IADD3 R11, PT, PT, R6, R11, RZ &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R4], R11 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R7, [R4] &wr=0x1 ?trans4;
STG.E desc[UR8][R2.64], R7 &req={1} &rd=0x1 ?trans1;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x390] &req={1} &wr=0x0 ?trans2;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x800;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: scan(int, int*, int*)
_Z4scaniPiS_:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b128 s[0:3], s[0:1], 0x8
s_mov_b32 s4, s15
v_lshlrev_b32_e32 v3, 2, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_mov_b32 s0, 1
s_mov_b32 s1, 1
global_load_b32 v4, v[1:2], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_1:
v_and_b32_e32 v4, s0, v0
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e64 s0, v4
s_cbranch_execz .LBB0_3
v_subrev_nc_u32_e32 v4, s1, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b32_e32 v4, 2, v4
ds_load_b32 v5, v3
ds_load_b32 v4, v4
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v4, v4, v5
ds_store_b32 v3, v4
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s6
s_lshl_b32 s0, s0, 1
s_lshl_b32 s6, s1, 1
s_or_b32 s0, s0, 1
s_cmp_gt_u32 s1, 63
s_mov_b32 s1, s6
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_1
v_add_nc_u32_e32 v4, 1, v0
s_mov_b32 s1, 64
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_lshl_b32 s0, s1, 1
v_subrev_nc_u32_e32 v5, s1, v0
s_add_i32 s0, s0, -1
v_and_b32_e32 v6, s0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_i32_e64 s0, -1, v5
v_cmp_eq_u32_e32 vcc_lo, s1, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s6, vcc_lo, s0
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB0_7
v_lshlrev_b32_e32 v5, 2, v5
ds_load_b32 v6, v3
ds_load_b32 v5, v5
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v5, v5, v6
ds_store_b32 v3, v5
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s0
s_lshr_b32 s0, s1, 1
s_cmp_lt_u32 s1, 2
s_mov_b32 s1, s0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_5
ds_load_b32 v3, v3
s_add_i32 s5, s5, -1
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[1:2], v3, off
v_cmpx_eq_u32_e64 s5, v0
s_cbranch_execz .LBB0_10
s_mov_b32 s5, 0
v_mov_b32_e32 v0, 0
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s2, s0
s_addc_u32 s1, s3, s1
global_store_b32 v0, v3, s[0:1]
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| scan | 3,177 | 1,381 | stackv2-00001-of-00015 |
// Demangled: dUpdateSignif(float const*, unsigned long, float*)
Function : _Z13dUpdateSignifPKfmPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans1;
S2R R3, SR_CTAID.X &wr=0x3 ?trans1;
IMAD.SHL.U32 R4, R4, 0x20, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R3, 0x200, R4 &req={3} ?WAIT5_END_GROUP;
ISETP.GT.U64.AND P0, PT, R4, UR4, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV.64 R10, RZ ?trans2;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x2 ?trans4;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans2;
IADD.64 R12, R4, R10 ?WAIT6_END_GROUP;
IMAD R3, R13, 0x14, RZ ?trans2;
IMAD.WIDE.U32 R14, R12, 0x14, R6 &req={0} ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, R15, R3, RZ ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R14.64+0xc] &req={1} &wr=0x4 ?trans4;
LDG.E R16, desc[UR4][R14.64+0x10] &rd=0x0 &wr=0x5 ?trans1;
UMOV.64 UR6, 0x3feff7ced916872b ?trans1;
BSSY.RECONVERGENT B0, 0x3d0 ?trans1;
HFMA2 R0, -RZ, RZ, 6.109375, 2 ?trans1;
F2F.F64.F32 R18, R2 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GE.AND P0, PT, R18, UR6, PT &req={1} &wr=0x1 ?trans2;
@P0 BRA 0x3c0 &req={1,0} ?trans5;
FFMA R21, -R2, R2, 1 ?trans1;
FADD R0, R16, -2 &req={5} ?trans1;
BSSY.RECONVERGENT B1, 0x2d0 ?trans2;
MUFU.RCP R3, R21 &wr=0x0 ?trans1;
FCHK P0, R0, R21 &wr=0x1 ?trans1;
FFMA R18, -R21, R3, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R3, R18, R3 ?WAIT4_END_GROUP;
FFMA R18, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R17, -R21, R18, R0 ?WAIT4_END_GROUP;
FFMA R3, R3, R17, R18 ?trans1;
@!P0 BRA 0x2c0 &req={1} ?trans6;
MOV R18, 0x2b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xfc0 &req={3,2} ?trans5;
MOV R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 &req={2} ?trans5;
IADD3 R0, PT, PT, R3, -0xd000000, RZ ?trans1;
MUFU.RSQ R18, R3 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x3b0 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x360 &req={0} ?trans5;
MOV R0, R3 ?trans1;
MOV R21, 0x350 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xe60 &req={3,1} ?trans5;
BRA 0x3a0 ?trans5;
FMUL.FTZ R0, R18.reuse, R3 &req={1} ?trans1;
FMUL.FTZ R17, R18, 0.5 ?WAIT3_END_GROUP;
FFMA R3, -R0, R0, R3 ?WAIT4_END_GROUP;
FFMA R3, R3, R17, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL R0, R2, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={2} ?trans5;
F2I.TRUNC.NTZ R20, R16 &req={5} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xd00 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.AND P0, PT, R20, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xcf0 ?trans5;
ISETP.GT.U32.AND P0, PT, R20, 0x1e, PT ?trans1;
BSSY.RECONVERGENT B1, 0x6a0 ?WAIT12_END_GROUP;
@!P0 IADD3 R3, PT, PT, R20, -0x1, RZ ?trans1;
@!P0 BRA 0x690 ?trans6;
ISETP.GT.U32.AND P0, PT, R20, 0x32, PT ?WAIT13_END_GROUP;
@!P0 LOP3.LUT R3, R20, 0x1, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -0x20, R20 ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R18, R3, 0x80, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
@!P0 LEA.HI R18, R18, R3, RZ, 0x19 ?WAIT4_END_GROUP;
@!P0 PRMT R3, R18, 0x8880, RZ ?WAIT4_END_GROUP;
@!P0 PRMT R3, R3, 0x7710, RZ ?WAIT4_END_GROUP;
@!P0 LEA.HI R3, R3, 0x1e, RZ, 0x1f ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ?trans1;
@!P0 BRA 0x690 ?trans6;
ISETP.GT.U32.AND P0, PT, R20, 0x46, PT ?WAIT13_END_GROUP;
@P0 BRA 0x5d0 ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x38, PT ?trans1;
MOV R3, 0x28 ?WAIT12_END_GROUP;
@!P0 BRA 0x690 ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x3d, PT ?trans1;
HFMA2 R3, -RZ, RZ, 0, 2.443790435791015625e-06 ?WAIT12_END_GROUP;
@!P0 BRA 0x690 ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x42, PT ?trans1;
MOV.64 R18, 0x2a ?WAIT4_END_GROUP;
SEL.64 R18, R18, 0x2b, !P0 ?WAIT6_END_GROUP;
MOV R3, R18 ?trans1;
BRA 0x690 ?trans6;
ISETP.GE.U32.AND P0, PT, R20, 0x51, PT ?trans1;
MOV R3, 0x2c ?WAIT12_END_GROUP;
@!P0 BRA 0x690 ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x65, PT ?trans1;
HFMA2 R3, -RZ, RZ, 0, 2.682209014892578125e-06 ?WAIT12_END_GROUP;
@!P0 BRA 0x690 ?trans5;
ISETP.GE.U32.AND P0, PT, R20, 0x97, PT ?trans1;
MOV R3, 0x2e ?WAIT12_END_GROUP;
@P0 ISETP.GE.U32.AND P1, PT, R20, 0xc9, PT ?trans1;
@P0 MOV.64 R18, 0x2f ?WAIT4_END_GROUP;
@P0 SEL.64 R18, R18, 0x30, !P1 ?WAIT6_END_GROUP;
@P0 MOV R3, R18 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IMAD.SHL.U32 R17, R3, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.EQ.AND P1, PT, R17.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x8, PT ?WAIT11_END_GROUP;
@P1 MOV R3, 0x441f4000 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0xc, PT ?trans1;
@P2 MOV R3, 0x41fccccd ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x10, PT ?trans1;
@P0 MOV R3, 0x403ae148 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x14, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4109c28f ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x18, PT ?trans1;
@P2 MOV R3, 0x40dbced9 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x1c, PT ?trans1;
@P0 MOV R3, 0x40beb021 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x20, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x40ad0e56 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x24, PT ?trans1;
@P2 MOV R3, 0x40a14fdf ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x28, PT ?trans1;
@P0 MOV R3, 0x4098fdf4 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x2c, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4092c8b4 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x30, PT ?trans1;
@P2 MOV R3, 0x408dfbe7 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x34, PT ?trans1;
@P0 MOV R3, 0x408a2d0e ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x38, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4087126f ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x3c, PT ?trans1;
@P2 MOV R3, 0x40847ae1 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x40, PT ?trans1;
@P0 MOV R3, 0x40825604 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x44, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x40807ae1 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x48, PT ?trans1;
@P2 MOV R3, 0x407dc28f ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x4c, PT ?trans1;
@P0 MOV R3, 0x407b020c ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x50, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x40788312 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x54, PT ?trans1;
@P2 MOV R3, 0x40766666 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x58, PT ?trans1;
@P0 MOV R3, 0x40746a7f ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x5c, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4072b021 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x60, PT ?trans1;
@P2 MOV R3, 0x407126e9 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x64, PT ?trans1;
@P0 MOV R3, 0x406fae14 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x68, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x406e6666 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x6c, PT ?trans1;
@P2 MOV R3, 0x406d3f7d ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x70, PT ?trans1;
@P0 MOV R3, 0x406c28f6 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x74, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x406b22d1 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x78, PT ?trans1;
@P2 MOV R3, 0x406a2d0e ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x7c, PT ?trans1;
@P0 MOV R3, 0x40695810 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x80, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4067ced9 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x84, PT ?trans1;
@P2 MOV R3, 0x406676c9 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x88, PT ?trans1;
@P0 MOV R3, 0x40653f7d ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x8c, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x40643958 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x90, PT ?trans1;
@P2 MOV R3, 0x40634396 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0x94, PT ?trans1;
@P0 MOV R3, 0x40626e98 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x98, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4061a9fc ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0x9c, PT ?trans1;
@P2 MOV R3, 0x4060f5c3 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0xa0, PT ?trans1;
@P0 MOV R3, 0x406051ec ?trans1;
ISETP.EQ.AND P0, PT, R17, 0xa4, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x405fbe77 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0xa8, PT ?trans1;
@P2 MOV R3, 0x405e76c9 ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0xac, PT ?trans1;
@P0 MOV R3, 0x405d70a4 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0xb0, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x405c9ba6 ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, 0xb4, PT ?trans1;
@P2 MOV R3, 0x405bd70a ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, 0xb8, PT ?trans1;
@P0 MOV R3, 0x405a9fbe ?trans1;
ISETP.EQ.AND P0, PT, R17, 0xbc, PT ?WAIT9_END_GROUP;
@P1 MOV R3, 0x4058f5c3 ?trans1;
ISETP.EQ.AND P1, PT, R17, 0xc0, PT ?trans1;
@P2 MOV R3, 0x4056d917 ?trans2;
@P0 MOV R3, 0x4055c28f ?WAIT10_END_GROUP;
@P1 MOV R3, 0x40528f5c ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R0|, R3, PT ?WAIT5_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT13_END_GROUP;
@P0 LDG.E R3, desc[UR4][R14.64] &wr=0x2 ?trans1;
IMAD R17, R13, 0x18, RZ ?trans2;
IMAD.WIDE.U32 R12, R12, 0x18, R8 &req={3} ?WAIT5_END_GROUP;
IADD3 R13, PT, PT, R13, R17, RZ ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R12.64], R3 &req={2} &rd=0x4 ?trans4;
@P0 LDG.E R17, desc[UR4][R14.64+0x4] &wr=0x2 ?trans1;
IADD.64 R18, R10, 0x1 ?trans2;
@!P0 MOV R25, 0xbf800000 ?trans1;
@P0 STG.E desc[UR4][R12.64+0x4], R17 &req={2} &rd=0x4 ?trans4;
@P0 LDG.E R23, desc[UR4][R14.64+0x8] &wr=0x2 ?trans1;
IADD.64 R20, R4, R18 ?WAIT2_END_GROUP;
ISETP.LT.U64.AND P1, PT, R10, 0x1f, PT ?trans2;
@P0 STG.E desc[UR4][R12.64+0xc], R2 &rd=0x4 ?trans1;
MOV.64 R10, R18 ?WAIT3_END_GROUP;
@P0 STG.E desc[UR4][R12.64+0x10], R0 &rd=0x4 ?trans4;
@P0 STG.E desc[UR4][R12.64+0x14], R16 &rd=0x4 ?trans4;
@!P0 STG.E desc[UR4][R12.64], R25 &rd=0x4 ?trans4;
@P0 STG.E desc[UR4][R12.64+0x8], R23 &req={2} &rd=0x4 ?trans1;
ISETP.GT.U64.AND P0, PT, R20, UR8, PT ?WAIT14_END_GROUP;
@!P0 BRA P1, 0xe0 &req={4} ?trans5;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R3, R0 ?trans1;
@!P0 BRA 0xf90 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R3, 0x7fffffff ?trans1;
@!P0 BRA 0xf90 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R3, R0, 1 ?trans1;
@P0 BRA 0xf90 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R17, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R18, R17 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R20, R17, R18 &req={0} ?trans1;
@P0 FMUL.FTZ R18, R18, 0.5 ?WAIT3_END_GROUP;
@P0 FADD.FTZ R3, -R20, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R19, R20, R3, R17 ?trans1;
@!P0 MOV R3, R0 ?WAIT3_END_GROUP;
@P0 FFMA R18, R19, R18, R20 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R3, R18, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R18, R21 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R18 0x0 ?trans5;
SHF.R.U32.HI R19, RZ, 0x17, R21 ?trans1;
BSSY.RECONVERGENT B2, 0x1620 ?trans1;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans2;
LOP3.LUT R19, R19, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R24, R3, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R20, R0 ?trans1;
IADD3 R23, PT, PT, R19, -0x1, RZ ?trans2;
IADD3 R22, PT, PT, R24, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R23, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R17, RZ ?trans1;
@!P0 BRA 0x1200 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R21|, +INF , PT ?trans1;
MOV R3, R21 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1600 ?trans5;
LOP3.LUT P0, RZ, R21, 0x7fffffff, R20, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15e0 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x15e0 ?trans5;
LOP3.LUT P2, RZ, R20, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x15c0 ?trans5;
LOP3.LUT P1, RZ, R21, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1590 ?trans5;
ISETP.GE.AND P0, PT, R22, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R23, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R17, RZ ?trans1;
@!P0 MOV R17, 0xffffffc0 ?trans1;
@!P0 FFMA R20, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R21, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, 0x40, RZ ?WAIT7_END_GROUP;
LEA R0, R19, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0x1580 ?trans1;
IADD3 R3, PT, PT, R24, -0x7f, RZ ?trans2;
IADD3 R21, PT, PT, -R0, R21, RZ ?WAIT3_END_GROUP;
IMAD R0, R3, -0x800000, R20 ?trans1;
MUFU.RCP R22, R21 &wr=0x0 ?trans1;
FADD.FTZ R23, -R21, -RZ ?WAIT4_END_GROUP;
FFMA R25, R22, R23, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R27, R22, R25, R22 ?WAIT4_END_GROUP;
FFMA R20, R0, R27, RZ ?WAIT4_END_GROUP;
FFMA R25, R23, R20, R0 ?WAIT4_END_GROUP;
FFMA R24, R27, R25, R20 ?trans1;
IADD3 R20, PT, PT, R3, 0x7f, -R19 ?WAIT3_END_GROUP;
FFMA R23, R23, R24, R0 ?trans1;
IADD3 R20, PT, PT, R20, R17, RZ ?WAIT3_END_GROUP;
FFMA R0, R27, R23, R24 ?WAIT5_END_GROUP;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, R3, R20, RZ ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R19, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1560 ?trans5;
ISETP.GT.AND P0, PT, R19, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1530 ?trans5;
ISETP.GE.AND P0, PT, R19, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1570 ?trans5;
ISETP.GE.AND P0, PT, R19, -0x18, PT ?trans1;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1570 ?trans5;
FFMA.RZ R3, R27, R23.reuse, R24.reuse ?trans1;
IADD3 R22, PT, PT, R19, 0x20, RZ ?trans1;
FFMA.RM R20, R27, R23.reuse, R24.reuse ?trans1;
ISETP.NE.AND P1, PT, R19.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R19, RZ, PT ?trans1;
LOP3.LUT R3, R3, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R19, PT, PT, -R19, RZ, RZ ?trans2;
LOP3.LUT R17, R3, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R3, R27, R23, R24 ?WAIT3_END_GROUP;
SHF.L.U32 R22, R17, R22, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R3, R20, PT ?trans1;
SEL R20, R19, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R22, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R20, RZ, R20, R17 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R22, RZ, 0x1, R20 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R22, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R20, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R22, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R3, R0, RZ, 0xfc, !PT ?trans1;
BRA 0x1570 ?trans6;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1570 ?trans6;
IMAD R0, R20, 0x800000, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0x1610 ?trans5;
LOP3.LUT R0, R21, 0x80000000, R20, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1610 ?trans6;
LOP3.LUT R0, R21, 0x80000000, R20, 0x48, !PT ?trans1;
BRA 0x1610 ?trans6;
MUFU.RSQ R0, -QNAN &wr=0x0 ?trans1;
BRA 0x1610 ?trans5;
FADD.FTZ R0, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R19, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R18 0x0 &req={0} ?trans5;
BRA 0x1640;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: dUpdateSignif(float const*, unsigned long, float*)
_Z13dUpdateSignifPKfmPf:
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s4, s15
s_mov_b32 s5, 0
s_mul_i32 s13, s15, 0x3000
s_lshl_b64 s[10:11], s[4:5], 9
s_mul_hi_u32 s12, s15, 0x3000
s_mul_i32 s4, s15, 0x2800
s_mul_hi_u32 s14, s15, 0x2800
v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v3, 5, v0
v_mov_b32_e32 v13, -1.0
s_mov_b32 s6, 0xd916872b
s_mov_b32 s7, 0x3feff7ce
s_waitcnt lgkmcnt(0)
s_add_u32 s8, s8, s13
s_addc_u32 s9, s9, s12
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s14
v_mad_u64_u32 v[7:8], null, 0x300, v0, s[8:9]
v_mad_u64_u32 v[1:2], null, 0x280, v0, s[0:1]
v_add_co_u32 v5, s0, s10, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v6, null, s11, 0, s0
s_mov_b64 s[8:9], 0
v_add_co_u32 v9, vcc_lo, v1, 16
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v10, vcc_lo, 0, v2, vcc_lo
.LBB7_1:
s_or_b32 s1, s1, exec_lo
s_mov_b32 s4, exec_lo
v_cmpx_ge_u64_e64 s[2:3], v[5:6]
s_cbranch_execz .LBB7_25
global_load_b64 v[11:12], v[9:10], off offset:-4
v_mov_b32_e32 v2, 0x461c4000
s_mov_b32 s10, exec_lo
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[0:1], v11
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_nle_f64_e32 s[6:7], v[0:1]
s_cbranch_execz .LBB7_4
v_add_f32_e32 v0, -2.0, v12
v_fma_f32 v1, -v11, v11, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f32 v2, null, v1, v1, v0
v_rcp_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_fma_f32 v14, -v2, v3, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v3, v14, v3
v_div_scale_f32 v15, vcc_lo, v0, v1, v0
v_mul_f32_e32 v14, v15, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v16, -v2, v14, v15
v_fmac_f32_e32 v14, v16, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v2, -v2, v14, v15
v_div_fmas_f32 v2, v2, v3, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v0, v2, v1, v0
v_mul_f32_e32 v1, 0x4f800000, v0
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v1, vcc_lo
v_sqrt_f32_e32 v1, v0
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v2, -1, v1
v_add_nc_u32_e32 v3, 1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v14, -v2, v1, v0
v_fma_f32 v15, -v3, v1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, 0, v14
v_cndmask_b32_e64 v1, v1, v2, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s0, 0, v15
v_cndmask_b32_e64 v1, v1, v3, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v2, 0x37800000, v1
v_cndmask_b32_e32 v1, v1, v2, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v0, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v1, v0, vcc_lo
v_mul_f32_e32 v2, v11, v0
.LBB7_4:
s_or_b32 exec_lo, exec_lo, s10
v_cvt_i32_f32_e32 v0, v12
v_mov_b32_e32 v1, 0
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_lt_i32_e32 0, v0
s_cbranch_execz .LBB7_20
s_mov_b32 s10, exec_lo
v_cmpx_lt_u32_e32 30, v0
s_xor_b32 s10, exec_lo, s10
s_cbranch_execz .LBB7_17
s_mov_b32 s11, exec_lo
v_cmpx_lt_u32_e32 50, v0
s_xor_b32 s11, exec_lo, s11
s_cbranch_execz .LBB7_14
s_mov_b32 s12, exec_lo
v_cmpx_lt_u32_e32 0x46, v0
s_xor_b32 s12, exec_lo, s12
s_cbranch_execz .LBB7_11
v_mov_b32_e32 v3, 44
s_mov_b32 s13, exec_lo
v_cmpx_lt_u32_e32 0x50, v0
v_cmp_gt_u32_e32 vcc_lo, 0xc9, v0
v_cndmask_b32_e64 v1, 48, 47, vcc_lo
v_cmp_lt_u32_e32 vcc_lo, 0x96, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v1, 46, v1, vcc_lo
v_cmp_lt_u32_e32 vcc_lo, 0x64, v0
v_cndmask_b32_e32 v3, 45, v1, vcc_lo
s_or_b32 exec_lo, exec_lo, s13
.LBB7_11:
s_and_not1_saveexec_b32 s12, s12
v_cmp_gt_u32_e32 vcc_lo, 0x42, v0
v_cndmask_b32_e64 v1, 43, 42, vcc_lo
v_cmp_lt_u32_e32 vcc_lo, 60, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v1, 41, v1, vcc_lo
v_cmp_lt_u32_e32 vcc_lo, 55, v0
v_cndmask_b32_e32 v3, 40, v1, vcc_lo
s_or_b32 exec_lo, exec_lo, s12
.LBB7_14:
s_and_not1_saveexec_b32 s11, s11
v_and_b32_e32 v1, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_sub_nc_u16 v0, v0, 32
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshrrev_b16 v1, 7, v0
v_and_b32_e32 v1, 1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u16 v0, v0, v1
v_bfe_i32 v0, v0, 0, 8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshrrev_b16 v0, 1, v0
v_add_nc_u16 v0, v0, 30
s_delay_alu instid0(VALU_DEP_1)
v_and_b32_e32 v3, 0xff, v0
s_or_b32 exec_lo, exec_lo, s11
.LBB7_17:
s_and_not1_saveexec_b32 s10, s10
v_add_nc_u32_e32 v3, -1, v0
s_or_b32 exec_lo, exec_lo, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_getpc_b64 s[10:11]
s_add_u32 s10, s10, __const._Z14dIsSignificantfi.tcutoffs@rel32@lo+4
s_addc_u32 s11, s11, __const._Z14dIsSignificantfi.tcutoffs@rel32@hi+12
v_add_co_u32 v0, vcc_lo, v0, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_nlt_f32_e64 s10, |v2|, v0
v_cndmask_b32_e64 v1, 0, 1, s10
.LBB7_20:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_mov_b32 s0, exec_lo
v_cmpx_ne_u32_e32 0, v1
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB7_22
global_load_b32 v0, v[9:10], off offset:-16
v_add_co_u32 v14, vcc_lo, v7, s8
v_add_co_ci_u32_e32 v15, vcc_lo, s9, v8, vcc_lo
v_mov_b32_e32 v1, v11
v_mov_b32_e32 v3, v12
s_waitcnt vmcnt(0)
global_store_b32 v[14:15], v0, off
global_load_b32 v0, v[9:10], off offset:-12
s_waitcnt vmcnt(0)
global_store_b32 v[14:15], v0, off offset:4
global_load_b32 v0, v[9:10], off offset:-8
s_waitcnt vmcnt(0)
global_store_b128 v[14:15], v[0:3], off offset:8
.LBB7_22:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB7_24
v_add_co_u32 v0, vcc_lo, v7, s8
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v8, vcc_lo
global_store_b32 v[0:1], v13, off
.LBB7_24:
s_or_b32 exec_lo, exec_lo, s0
s_add_u32 s8, s8, 24
s_addc_u32 s9, s9, 0
v_add_co_u32 v5, vcc_lo, v5, 1
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_cmp_eq_u64 s[8:9], 0x300
v_add_co_u32 v9, vcc_lo, v9, 20
s_cselect_b32 s0, -1, 0
v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
s_and_not1_b32 s1, s1, exec_lo
s_and_b32 s0, s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s1, s1, s0
.LBB7_25:
s_or_b32 exec_lo, exec_lo, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, exec_lo, s1
s_or_b32 s5, s0, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB7_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| dUpdateSignif | 8,855 | 4,047 | stackv2-00001-of-00015 |
// Demangled: gpuMeans(float const*, unsigned long, float const*, unsigned long, unsigned long, float*, float*)
Function : _Z8gpuMeansPKfmS0_mmPfS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
UMOV UR5, URZ ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans8;
S2UR UR10, SR_CTAID.X &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
ISETP.LE.U64.AND P0, PT, R6, UR4, PT &req={1} ?WAIT2_END_GROUP;
MOV R2, UR10 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.U64.OR P0, PT, R2, R4, P0 &req={3} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
S2UR UR9, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR6, 0x400 ?trans1;
LDCU.64 UR14, c[0x0][0x3a0] &wr=0x2 ?trans1;
MOV R7, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x950 ?trans1;
UIADD3 UR7, UPT, UPT, UR6, 0x40, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR6, 0x80, URZ ?trans2;
MOV R13, R7 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x3 ?trans1;
LDCU.64 UR16, c[0x0][0x3a0] &wr=0x4 ?trans1;
ULEA UR6, UR9, UR6, 0x18 &req={1} ?trans1;
ULEA UR7, UR9, UR7, 0x18 ?trans1;
ULEA UR8, UR9, UR8, 0x18 ?WAIT4_END_GROUP;
LEA R2, R0.reuse, UR6, 0x2 &req={0} ?trans2;
LEA R3, R0.reuse, UR7, 0x2 ?trans2;
LEA R4, R0, UR8, 0x2 ?trans1;
STS [R2], RZ &rd=0x0 ?trans1;
MOV R12, R0.reuse ?trans1;
MOV R5, R0 ?trans2;
STS [R3], RZ &rd=0x0 ?trans2;
ISETP.GE.U64.AND P0, PT, R12, UR14, PT &req={2} ?WAIT2_END_GROUP;
STS [R4], RZ &rd=0x0 ?WAIT12_END_GROUP;
@P0 BRA 0x940 &req={4,3,0} ?trans5;
LOP3.LUT R8, RZ, R0, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x530 ?trans1;
LOP3.LUT R9, RZ, R7, RZ, 0x33, !PT ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
IADD.64 R8, R8, UR14 ?WAIT5_END_GROUP;
SHF.R.U64 R16, R8.reuse, 0x4, R9 ?trans1;
ISETP.GE.U64.AND P1, PT, R8, 0x30, PT ?WAIT3_END_GROUP;
SHF.R.U32.HI R17, RZ, 0x4, R9 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
IADD.64 R16, R16, 0x1 ?trans2;
MOV R17, RZ ?WAIT3_END_GROUP;
LOP3.LUT R16, R16, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x520 ?trans5;
LDC.64 R14, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R14, UR4, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R18, R14, UR10, R12 ?trans1;
LEA R14, P0, R10, UR6, 0x2 &req={1} ?WAIT3_END_GROUP;
IMAD R13, R15.reuse, UR4, R11 ?trans1;
LEA R12, P2, R18, UR8, 0x2 &req={2} ?trans1;
IMAD R11, R15, UR10, R19 ?WAIT3_END_GROUP;
LEA.HI.X R15, R10, UR7, R13, 0x2, P0 ?trans2;
LEA.HI.X R13, R18, UR9, R11, 0x2, P2 ?trans1;
MOV R11, RZ ?WAIT7_END_GROUP;
LDG.E R19, desc[UR12][R14.64] &rd=0x0 &wr=0x2 ?trans4;
LDG.E R8, desc[UR12][R12.64] &rd=0x1 &wr=0x3 ?trans1;
IADD.64 R16, R16, -0x1 ?trans2;
MOV R18, R0 ?trans1;
IADD.64 R14, R14, 0x40 &req={0} ?trans2;
IADD.64 R12, R12, 0x40 &req={1} ?WAIT2_END_GROUP;
FSETP.NAN.AND P0, PT, |R19|, |R19|, PT &req={2} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R8|, |R8|, P0 &req={3} ?WAIT13_END_GROUP;
@!P0 FADD R9, R9, R8 ?trans1;
@!P0 FADD R6, R6, R19 ?trans1;
@!P0 FADD R11, R11, 1 ?trans1;
MOV R19, R7 ?trans2;
@!P0 STS [R2], R9 &rd=0x0 ?trans3;
IADD.64 R18, R18, 0x10 ?trans2;
@!P0 STS [R3], R6 &rd=0x0 ?trans4;
@!P0 STS [R4], R11 &rd=0x0 ?trans1;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT2_END_GROUP;
MOV R0, R18 ?trans1;
MOV R7, R19 ?WAIT11_END_GROUP;
@P0 BRA 0x3e0 &req={0} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0x940 ?trans5;
LDC.64 R18, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R12, R0 ?trans1;
MOV R13, R7 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R14, R18, UR10, R12 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R18, UR4, R12 ?trans1;
LEA R12, P0, R14, UR6, 0x2 &req={1} ?WAIT3_END_GROUP;
IMAD R13, R19.reuse, UR10, R15 ?trans1;
LEA R18, P1, R16, UR8, 0x2 &req={2} ?trans1;
IMAD R19, R19, UR4, R17 ?WAIT3_END_GROUP;
LEA.HI.X R13, R14, UR7, R13, 0x2, P0 ?trans2;
LEA.HI.X R19, R16, UR9, R19, 0x2, P1 ?WAIT3_END_GROUP;
IADD.64 R12, R12, 0x80 ?trans2;
IADD.64 R14, R18, 0x80 ?WAIT8_END_GROUP;
LDG.E R17, desc[UR12][R14.64+-0x80] &wr=0x2 ?trans4;
LDG.E R8, desc[UR12][R12.64+-0x80] &wr=0x3 ?trans4;
LDG.E R19, desc[UR12][R14.64+-0x40] &wr=0x4 ?trans4;
LDG.E R10, desc[UR12][R12.64+-0x40] &wr=0x5 ?trans4;
LDG.E R21, desc[UR12][R14.64] &wr=0x5 ?trans4;
LDG.E R16, desc[UR12][R12.64] &wr=0x5 ?trans4;
LDG.E R23, desc[UR12][R14.64+0x40] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R18, desc[UR12][R12.64+0x40] &rd=0x1 &wr=0x5 ?trans1;
IADD.64 R14, R14, 0x100 &req={0} ?WAIT2_END_GROUP;
IADD.64 R12, R12, 0x100 &req={1} ?trans2;
FSETP.NAN.AND P0, PT, |R17|, |R17|, PT &req={2} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R8|, |R8|, P0 &req={3} ?trans1;
FSETP.NAN.AND P1, PT, |R19|, |R19|, PT &req={4} ?WAIT5_END_GROUP;
FSETP.NAN.OR P1, PT, |R10|, |R10|, P1 &req={5} ?trans1;
FSETP.NAN.AND P3, PT, |R21|, |R21|, PT ?WAIT6_END_GROUP;
@!P0 FADD R9, R9, R8 ?trans1;
@!P0 FADD R6, R6, R17 ?trans1;
FSETP.NAN.OR P3, PT, |R16|, |R16|, P3 ?trans1;
@!P0 FADD R11, R11, 1 ?trans1;
FSETP.NAN.AND P2, PT, |R23|, |R23|, PT ?trans1;
@!P0 STS [R2], R9 &rd=0x0 ?trans4;
FSETP.NAN.OR P2, PT, |R18|, |R18|, P2 ?trans1;
@!P0 STS [R3], R6 &rd=0x1 ?trans4;
@!P0 STS [R4], R11 &rd=0x2 ?trans1;
@!P1 FADD R9, R9, R10 &req={0} ?trans1;
@!P1 FADD R6, R6, R19 &req={1} ?WAIT4_END_GROUP;
@!P1 STS [R2], R9 &rd=0x0 ?trans1;
@!P1 FADD R11, R11, 1 &req={2} ?WAIT3_END_GROUP;
@!P1 STS [R3], R6 &rd=0x1 ?trans4;
@!P1 STS [R4], R11 &rd=0x2 ?trans1;
@!P3 FADD R9, R9, R16 &req={0} ?trans1;
@!P3 FADD R6, R6, R21 &req={1} ?WAIT4_END_GROUP;
@!P3 STS [R2], R9 &rd=0x0 ?trans1;
@!P3 FADD R11, R11, 1 &req={2} ?WAIT3_END_GROUP;
@!P3 STS [R3], R6 &rd=0x1 ?trans1;
MOV R16, R0 ?trans1;
MOV R17, R7 ?trans2;
@!P3 STS [R4], R11 &rd=0x2 ?trans1;
@!P2 FADD R9, R9, R18 &req={0} ?trans1;
@!P2 FADD R6, R6, R23 &req={1} ?WAIT4_END_GROUP;
@!P2 STS [R2], R9 &rd=0x0 ?trans1;
@!P2 FADD R11, R11, 1 &req={2} ?trans1;
IADD.64 R16, R16, 0x40 ?trans2;
@!P2 STS [R3], R6 &rd=0x0 ?trans4;
@!P2 STS [R4], R11 &rd=0x0 ?trans1;
ISETP.GE.U64.AND P0, PT, R16, UR16, PT ?trans2;
MOV R0, R16 ?trans1;
MOV R7, R17 ?WAIT11_END_GROUP;
@!P0 BRA 0x630 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R5.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R5.reuse, 0x3, PT ?trans1;
ISETP.GT.U32.AND P2, PT, R5.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P3, PT, R5, RZ, PT ?trans2;
BSSY.RECONVERGENT B0, 0xa90 ?trans8;
@P0 BRA 0xa80 ?trans5;
LDS R0, [R2+0x20] ?trans4;
LDS R5, [R2] &wr=0x0 ?trans2;
FADD R5, R0, R5 &req={0} ?WAIT5_END_GROUP;
STS [R2], R5 ?trans4;
LDS R0, [R3+0x20] ?trans4;
LDS R7, [R3] &wr=0x0 ?trans2;
FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
STS [R3], R0 ?trans4;
LDS R6, [R4+0x20] ?trans4;
LDS R7, [R4] &wr=0x0 ?trans2;
FADD R7, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R4], R7 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xb90 ?trans4;
@P1 BRA 0xb80 ?trans5;
LDS R0, [R2+0x10] ?trans4;
LDS R5, [R2] &wr=0x1 ?trans2;
FADD R5, R0, R5 &req={1} ?WAIT5_END_GROUP;
STS [R2], R5 ?trans4;
LDS R0, [R3+0x10] ?trans4;
LDS R7, [R3] &req={0} &wr=0x0 ?trans2;
FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
STS [R3], R0 ?trans4;
LDS R6, [R4+0x10] ?trans4;
LDS R7, [R4] &wr=0x0 ?trans2;
FADD R7, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R4], R7 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xc90 ?trans4;
@P2 BRA 0xc80 ?trans5;
LDS R0, [R2+0x8] ?trans4;
LDS R5, [R2] &wr=0x2 ?trans2;
FADD R5, R0, R5 &req={2} ?WAIT5_END_GROUP;
STS [R2], R5 ?trans4;
LDS R0, [R3+0x8] ?trans4;
LDS R7, [R3] &req={1,0} &wr=0x0 ?trans2;
FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
STS [R3], R0 ?trans4;
LDS R6, [R4+0x8] ?trans4;
LDS R7, [R4] &wr=0x0 ?trans2;
FADD R7, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R4], R7 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xdc0 ?trans4;
@P3 BRA 0xdb0 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR6, 0x400 ?trans1;
LDS R5, [R2] ?trans1;
ULEA UR6, UR7, UR6, 0x18 &req={3} ?WAIT9_END_GROUP;
LDS R0, [UR6+0x4] &wr=0x3 ?trans2;
FADD R5, R0, R5 &req={3} ?WAIT5_END_GROUP;
STS [R2], R5 ?trans4;
LDS R0, [UR6+0x44] ?trans4;
LDS R7, [R3] &req={2,1,0} &wr=0x0 ?trans2;
FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
STS [R3], R0 ?trans4;
LDS R6, [UR6+0x84] ?trans4;
LDS R7, [R4] &wr=0x0 ?trans2;
FADD R7, R6, R7 &req={0} ?WAIT5_END_GROUP;
STS [R4], R7 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P3 EXIT ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x4 ?trans1;
UMOV UR6, 0x400 ?trans2;
ULEA UR6, UR7, UR6, 0x18 &req={4} ?WAIT9_END_GROUP;
LDS R3, [UR6+0x80] &wr=0x4 ?trans4;
LDS R0, [UR6] &wr=0x5 ?trans1;
MUFU.RCP R2, R3 &req={4} &wr=0x4 ?trans1;
FCHK P0, R0, R3 &req={5} &wr=0x5 ?trans1;
FFMA R5, -R3, R2, 1 &req={4} ?WAIT4_END_GROUP;
FFMA R5, R2, R5, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R4, -R3, R2, R0 &req={3,2,1,0} ?WAIT4_END_GROUP;
FFMA R7, R5, R4, R2 ?trans1;
@!P0 BRA 0xee0 &req={5} ?trans6;
MOV R2, 0xed0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x10f0 ?trans5;
MOV R7, R9 ?WAIT7_END_GROUP;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x1 ?trans1;
MUFU.RCP R0, R3 &wr=0x2 ?trans2;
FFMA R9, -R3, R0, 1 &req={2} ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x0 ?trans2;
FFMA R0, R0, R9, R0 ?WAIT6_END_GROUP;
LDS R2, [UR5+0x40] &wr=0x2 ?trans1;
UMOV UR5, URZ ?trans2;
UIMAD.WIDE.U32 UR4, UR10, UR6, UR4 &req={0} ?WAIT4_END_GROUP;
UIMAD UR10, UR10, UR7, UR5 ?trans1;
ULEA UR6, UP0, UR4, UR8, 0x3 &req={1} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR9, UR10, 0x3, UP0 ?trans2;
MOV R4, UR6 ?WAIT4_END_GROUP;
MOV R5, UR7 ?WAIT5_END_GROUP;
STG.E desc[UR12][R4.64], R7 &rd=0x0 ?trans1;
FCHK P0, R2, R3 &req={2} &wr=0x1 ?trans1;
FFMA R9, R0, R2, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R9, R2 ?WAIT4_END_GROUP;
FFMA R9, R0, R6, R9 ?trans1;
@!P0 BRA 0x1070 &req={1,0} ?trans6;
MOV R0, R2 ?trans1;
MOV R2, 0x1070 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x10f0 ?trans5;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x0 ?trans1;
STG.E desc[UR12][R4.64+0x4], R9 ?trans1;
ULEA UR6, UP0, UR4, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR7, UR10, 0x2, UP0 ?trans2;
MOV R6, UR6 ?WAIT4_END_GROUP;
MOV R7, UR7 ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64], R3 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R12, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R3 ?trans1;
IADD3 R9, PT, PT, R12, -0x1, RZ ?trans2;
IADD3 R8, PT, PT, R10, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R8, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R6, RZ ?trans1;
@!P0 BRA 0x1310 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x16f0 ?trans5;
LOP3.LUT P0, RZ, R7, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x16d0 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P2 BRA !P1, 0x16d0 ?trans5;
LOP3.LUT P1, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P2, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x16b0 ?trans5;
LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1680 ?trans5;
ISETP.GE.AND P0, PT, R8, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R6, RZ ?trans1;
@!P0 MOV R6, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R7, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R6, PT, PT, R6, 0x40, RZ ?WAIT7_END_GROUP;
LEA R8, R12, 0xc0800000, 0x17 ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, -R8, R7, RZ ?trans2;
IADD3 R7, PT, PT, R10, -0x7f, RZ ?trans2;
MUFU.RCP R9, R8 &wr=0x0 ?trans1;
FADD.FTZ R11, -R8, -RZ ?trans2;
IMAD R0, R7.reuse, -0x800000, R0 ?trans1;
IADD3 R7, PT, PT, R7, 0x7f, -R12 ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R7, R6, RZ ?trans1;
FFMA R10, R9, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R14, R9, R10, R9 ?WAIT4_END_GROUP;
FFMA R9, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R9, R0 ?WAIT4_END_GROUP;
FFMA R13, R14, R10, R9 ?WAIT4_END_GROUP;
FFMA R10, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R9, R14, R10, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R9 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1660 ?trans5;
ISETP.GT.AND P0, PT, R8, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1630 ?trans5;
ISETP.GE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1700 ?trans5;
ISETP.GE.AND P0, PT, R8, -0x18, PT ?trans1;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1700 ?trans5;
FFMA.RZ R0, R14, R10.reuse, R13.reuse ?trans1;
IADD3 R11, PT, PT, R8, 0x20, RZ ?trans1;
FFMA.RM R7, R14, R10.reuse, R13.reuse ?trans1;
ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans2;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R10, R13 ?WAIT3_END_GROUP;
SHF.L.U32 R11, R6, R11, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R11, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R11, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R11, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, R9, RZ, 0xfc, !PT ?trans1;
BRA 0x1700 ?trans6;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1700 ?trans6;
IMAD R9, R7, 0x800000, R9 ?trans1;
BRA 0x1700 ?trans6;
LOP3.LUT R0, R7, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1700 ?trans6;
LOP3.LUT R9, R7, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1700 ?trans6;
MUFU.RSQ R9, -QNAN &wr=0x0 ?trans1;
BRA 0x1700 ?trans5;
FADD.FTZ R9, R0, R3 ?WAIT7_END_GROUP;
MOV R6, R2 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 &req={0} ?trans5;
BRA 0x1730;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuMeans(float const*, unsigned long, float const*, unsigned long, unsigned long, float*, float*)
_Z8gpuMeansPKfmS0_mmPfS1_:
s_load_b256 s[16:23], s[0:1], 0x0
s_mov_b32 s2, s15
s_mov_b32 s15, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mov_b32 s3, s15
s_waitcnt lgkmcnt(0)
v_cmp_ge_u64_e64 s4, s[14:15], s[18:19]
v_cmp_ge_u64_e64 s5, s[2:3], s[22:23]
s_or_b32 s4, s4, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_12
s_load_b256 s[4:11], s[0:1], 0x20
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v8, 2, v0
s_mov_b32 s1, exec_lo
ds_store_2addr_b32 v8, v1, v1 offset1:16
ds_store_b32 v8, v1 offset:128
v_add_nc_u32_e32 v9, 64, v8
v_add_nc_u32_e32 v10, 0x80, v8
s_waitcnt lgkmcnt(0)
v_cmpx_gt_u64_e64 s[4:5], v[0:1]
s_cbranch_execz .LBB0_6
s_mul_i32 s0, s5, s2
s_mul_hi_u32 s11, s4, s2
s_mul_i32 s10, s4, s2
s_add_i32 s11, s11, s0
v_dual_mov_b32 v11, v1 :: v_dual_lshlrev_b32 v4, 2, v0
s_lshl_b64 s[10:11], s[10:11], 2
s_mul_hi_u32 s12, s4, s14
s_add_u32 s0, s20, s10
s_mul_i32 s10, s5, s14
s_addc_u32 s13, s21, s11
s_add_i32 s11, s12, s10
s_mul_i32 s10, s4, s14
v_add_co_u32 v2, s0, s0, v4
s_lshl_b64 s[10:11], s[10:11], 2
v_add_co_ci_u32_e64 v3, null, s13, 0, s0
s_add_u32 s0, s16, s10
s_addc_u32 s10, s17, s11
v_add_co_u32 v4, s0, s0, v4
v_mov_b32_e32 v7, v1
v_add_co_ci_u32_e64 v5, null, s10, 0, s0
v_mov_b32_e32 v12, v1
v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v6, v0
s_mov_b32 s10, 0
.LBB0_3:
global_load_b32 v15, v[4:5], off
global_load_b32 v14, v[2:3], off
s_waitcnt vmcnt(1)
v_cmp_o_f32_e32 vcc_lo, v15, v15
s_waitcnt vmcnt(0)
v_cmp_o_f32_e64 s0, v14, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s11, vcc_lo, s0
s_and_saveexec_b32 s0, s11
s_cbranch_execz .LBB0_5
v_dual_add_f32 v13, v15, v13 :: v_dual_add_f32 v12, v14, v12
v_add_f32_e32 v11, 1.0, v11
ds_store_b32 v8, v13
ds_store_b32 v9, v12
ds_store_b32 v10, v11
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_co_u32 v6, vcc_lo, v6, 16
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 64
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u64_e32 vcc_lo, s[4:5], v[6:7]
v_add_co_u32 v4, s0, v4, 64
v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
s_or_b32 s10, vcc_lo, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB0_3
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b64 s[0:1], 8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_7:
s_mov_b32 s4, exec_lo
v_cmpx_gt_u64_e64 s[0:1], v[0:1]
s_cbranch_execz .LBB0_9
s_lshl_b32 s5, s0, 2
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v2, s5, v8
v_add_nc_u32_e32 v3, s5, v9
v_add_nc_u32_e32 v4, s5, v10
ds_load_b32 v5, v8
ds_load_b32 v6, v9
ds_load_b32 v2, v2
ds_load_b32 v3, v3
ds_load_b32 v4, v4
ds_load_b32 v7, v10
s_waitcnt lgkmcnt(2)
v_dual_add_f32 v2, v2, v5 :: v_dual_add_f32 v3, v3, v6
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v4, v4, v7
ds_store_b32 v8, v2
ds_store_b32 v9, v3
ds_store_b32 v10, v4
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s4
v_cmp_gt_u64_e64 s4, s[0:1], 1
s_lshr_b64 s[0:1], s[0:1], 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_7
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v2, 0
s_mul_i32 s1, s14, s23
s_mul_hi_u32 s5, s14, s22
s_mul_i32 s4, s14, s22
s_add_i32 s5, s5, s1
ds_load_2addr_b32 v[0:1], v2 offset1:16
ds_load_b32 v3, v2 offset:128
s_add_u32 s10, s4, s2
s_addc_u32 s11, s5, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[10:11], 3
s_add_u32 s6, s6, s10
s_addc_u32 s7, s7, s11
s_lshl_b64 s[4:5], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s8, s4
s_addc_u32 s5, s9, s5
s_waitcnt lgkmcnt(0)
v_div_scale_f32 v4, null, v3, v3, v0
v_div_scale_f32 v5, null, v3, v3, v1
v_div_scale_f32 v10, vcc_lo, v0, v3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_f32_e32 v6, v4
v_rcp_f32_e32 v7, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v8, -v4, v6, 1.0
v_fma_f32 v9, -v5, v7, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_dual_fmac_f32 v7, v9, v7 :: v_dual_fmac_f32 v6, v8, v6
v_div_scale_f32 v8, s0, v1, v3, v1
v_mul_f32_e32 v11, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v13, -v5, v11, v8
v_fmac_f32_e32 v11, v13, v7
v_mul_f32_e32 v9, v10, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v5, -v5, v11, v8
v_fma_f32 v12, -v4, v9, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v9, v12, v6
v_fma_f32 v4, -v4, v9, v10
s_delay_alu instid0(VALU_DEP_1)
v_div_fmas_f32 v4, v4, v6, v9
s_mov_b32 vcc_lo, s0
s_lshl_b64 s[0:1], s[2:3], 2
v_div_fmas_f32 v5, v5, v7, v11
s_add_u32 s0, s4, s0
v_div_fixup_f32 v0, v4, v3, v0
s_addc_u32 s1, s5, s1
s_delay_alu instid0(VALU_DEP_2)
v_div_fixup_f32 v1, v5, v3, v1
s_clause 0x1
global_store_b64 v2, v[0:1], s[6:7]
global_store_b32 v2, v3, s[0:1]
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuMeans | 8,514 | 2,976 | stackv2-00001-of-00015 |
// Demangled: gpuMeansNoTest(float const*, unsigned long, float const*, unsigned long, unsigned long, float*, float*)
Function : _Z14gpuMeansNoTestPKfmS0_mmPfS1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
UMOV UR5, URZ ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans8;
S2UR UR10, SR_CTAID.X &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
ISETP.LE.U64.AND P0, PT, R6, UR4, PT &req={1} ?WAIT2_END_GROUP;
MOV R2, UR10 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.U64.OR P0, PT, R2, R4, P0 &req={3} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R2, SR_TID.X &wr=0x0 ?trans1;
S2UR UR9, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR6, 0x400 ?trans1;
LDCU.64 UR14, c[0x0][0x3a0] &wr=0x2 ?trans1;
MOV R3, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xcc0 ?trans1;
UIADD3 UR7, UPT, UPT, UR6, 0x40, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR6, 0x80, URZ ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x3 ?trans1;
ULEA UR6, UR9, UR6, 0x18 &req={1} ?trans1;
ULEA UR7, UR9, UR7, 0x18 ?trans1;
ULEA UR8, UR9, UR8, 0x18 ?WAIT4_END_GROUP;
LEA R16, R2.reuse, UR6, 0x2 &req={0} ?trans1;
ISETP.GE.U64.AND P0, PT, R2, UR14, PT &req={2} ?WAIT3_END_GROUP;
LEA R14, R2.reuse, UR7, 0x2 ?trans1;
STS [R16], RZ &rd=0x0 ?trans1;
LEA R15, R2, UR8, 0x2 ?WAIT3_END_GROUP;
STS [R14], RZ &rd=0x0 ?trans4;
STS [R15], RZ &rd=0x0 ?trans2;
@P0 BRA 0xcb0 &req={3} ?trans5;
LOP3.LUT R4, RZ, R2.reuse, RZ, 0x33, !PT ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
MOV R5, 0xffffffff ?trans1;
BSSY.RECONVERGENT B1, 0x6f0 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R10, R2 ?trans2;
IADD.64 R4, R4, UR14 ?trans2;
MOV R0, RZ ?trans1;
MOV R19, RZ ?WAIT2_END_GROUP;
SHF.R.U64 R6, R4.reuse, 0x4, R5 ?trans1;
ISETP.GE.U64.AND P1, PT, R4, 0x70, PT ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, 0x4, R5 ?WAIT5_END_GROUP;
IADD.64 R6, R6, 0x1 ?WAIT5_END_GROUP;
LOP3.LUT R24, R6, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R24, RZ, PT ?trans2;
@!P1 BRA 0x6e0 ?WAIT12_END_GROUP;
LDC.64 R20, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
LOP3.LUT R26, R6, 0xfffffff8, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R27, R7, 0x1fffffff, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR16, c[0x0][0x390] &wr=0x3 ?trans1;
MOV R0, RZ ?trans1;
IMAD.WIDE.U32 R8, R20, UR10, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R20, UR4, R2 ?trans1;
LEA R12, P1, R8, UR8, 0x2 &req={2} ?WAIT3_END_GROUP;
IMAD R13, R21.reuse, UR10, R9 ?trans1;
LEA R20, P2, R10, UR16, 0x2 &req={3} ?trans1;
IMAD R9, R21, UR4, R11 ?WAIT3_END_GROUP;
LEA.HI.X R13, R8, UR9, R13, 0x2, P1 ?trans2;
LEA.HI.X R21, R10, UR17, R9, 0x2, P2 ?trans1;
MOV.64 R10, R2 ?trans2;
IADD.64 R8, R12, 0x100 ?trans2;
IADD.64 R12, R20, 0x100 ?WAIT8_END_GROUP;
LDG.E R32, desc[UR12][R8.64+-0x100] &wr=0x2 ?trans4;
LDG.E R34, desc[UR12][R12.64+-0x100] &wr=0x3 ?trans4;
LDG.E R31, desc[UR12][R8.64+-0xc0] &wr=0x4 ?trans4;
LDG.E R18, desc[UR12][R12.64+-0xc0] &wr=0x5 ?trans4;
LDG.E R20, desc[UR12][R8.64+-0x80] &wr=0x5 ?trans4;
LDG.E R21, desc[UR12][R12.64+-0x80] &wr=0x5 ?trans4;
LDG.E R22, desc[UR12][R8.64+-0x40] &wr=0x5 ?trans4;
LDG.E R23, desc[UR12][R12.64+-0x40] &wr=0x5 ?trans4;
LDG.E R28, desc[UR12][R8.64] &wr=0x5 ?trans4;
LDG.E R29, desc[UR12][R12.64] &wr=0x5 ?trans4;
LDG.E R30, desc[UR12][R8.64+0x40] &wr=0x5 ?trans4;
LDG.E R33, desc[UR12][R8.64+0xc0] &wr=0x5 ?trans1;
FADD R36, R32, R19 &req={2} ?WAIT3_END_GROUP;
LDG.E R19, desc[UR12][R12.64+0x40] &wr=0x2 ?trans1;
FADD R35, R34, R17 &req={3} ?WAIT3_END_GROUP;
LDG.E R32, desc[UR12][R8.64+0x80] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R17, desc[UR12][R12.64+0x80] &wr=0x3 ?trans1;
FADD R37, R36, R31 &req={4} ?WAIT3_END_GROUP;
LDG.E R31, desc[UR12][R12.64+0xc0] &rd=0x4 &wr=0x3 ?trans1;
FADD R0, R0, 1 ?trans1;
FADD R18, R35, R18 &req={5} ?trans1;
IADD.64 R26, R26, -0x8 ?trans2;
FADD R0, R0, 1 ?trans1;
FADD R37, R37, R20 ?trans1;
FADD R18, R18, R21 ?trans2;
FADD R0, R0, 1 ?trans1;
FADD R37, R37, R22 ?trans1;
ISETP.NE.S64.AND P1, PT, R26, RZ, PT ?WAIT2_END_GROUP;
FADD R0, R0, 1 ?trans1;
FADD R18, R18, R23 ?WAIT3_END_GROUP;
FADD R0, R0, 1 ?trans1;
FADD R37, R37, R28 ?trans1;
FADD R18, R18, R29 ?trans2;
FADD R0, R0, 1 ?trans1;
FADD R37, R37, R30 ?WAIT3_END_GROUP;
FADD R0, R0, 1 ?trans1;
IADD.64 R10, R10, 0x80 ?trans2;
IADD.64 R8, R8, 0x200 &req={1} ?trans2;
IADD.64 R12, R12, 0x200 &req={4} ?trans2;
FADD R0, R0, 1 ?trans1;
FADD R18, R18, R19 &req={2} ?trans1;
FADD R32, R37, R32 &req={3} ?WAIT3_END_GROUP;
FADD R18, R18, R17 ?trans1;
FADD R19, R32, R33 ?WAIT3_END_GROUP;
FADD R17, R18, R31 ?trans1;
@P1 BRA 0x400 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
BSSY.RECONVERGENT B1, 0xc80 ?trans4;
@!P0 BRA 0xc70 ?trans5;
ISETP.GE.U64.AND P0, PT, R24, 0x4, PT ?trans2;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x980 ?trans4;
ISETP.NE.S64.AND P1, PT, R6, RZ, PT ?WAIT6_END_GROUP;
@!P0 BRA 0x970 ?trans8;
LDC.64 R12, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR16, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R20, R12, UR10, R10 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R22, R12, UR4, R10 ?trans1;
LEA R8, P0, R20, UR8, 0x2 &req={2} ?WAIT3_END_GROUP;
IMAD R9, R13.reuse, UR10, R21 ?trans1;
LEA R12, P2, R22, UR16, 0x2 &req={3} ?trans1;
IMAD R13, R13, UR4, R23 ?WAIT3_END_GROUP;
LEA.HI.X R9, R20, UR9, R9, 0x2, P0 ?trans2;
LEA.HI.X R13, R22, UR17, R13, 0x2, P2 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR12][R8.64] &wr=0x2 ?trans4;
LDG.E R20, desc[UR12][R12.64] &wr=0x3 ?trans4;
LDG.E R21, desc[UR12][R8.64+0x40] &wr=0x4 ?trans4;
LDG.E R23, desc[UR12][R12.64+0x40] &wr=0x5 ?trans4;
LDG.E R25, desc[UR12][R8.64+0x80] &wr=0x5 ?trans4;
LDG.E R27, desc[UR12][R12.64+0x80] &wr=0x5 ?trans4;
LDG.E R29, desc[UR12][R8.64+0xc0] &wr=0x5 ?trans4;
LDG.E R31, desc[UR12][R12.64+0xc0] &wr=0x5 ?trans1;
FADD R0, R0, 1 ?trans1;
IADD.64 R10, R10, 0x40 ?WAIT3_END_GROUP;
FADD R0, R0, 1 ?WAIT4_END_GROUP;
FADD R0, R0, 1 ?WAIT4_END_GROUP;
FADD R0, R0, 1 ?trans1;
FADD R18, R19, R18 &req={2} ?trans1;
FADD R20, R17, R20 &req={3} ?WAIT3_END_GROUP;
FADD R18, R18, R21 &req={4} ?trans1;
FADD R20, R20, R23 &req={5} ?WAIT3_END_GROUP;
FADD R18, R18, R25 ?trans1;
FADD R20, R20, R27 ?WAIT3_END_GROUP;
FADD R19, R18, R29 ?trans1;
FADD R17, R20, R31 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@!P1 BRA 0xc70 ?trans5;
ISETP.NE.S64.AND P1, PT, R6, 0x1, PT ?trans2;
BSSY.RECONVERGENT B2, 0xb40 ?trans1;
LOP3.LUT P0, RZ, R4, 0x10, RZ, 0xc0, !PT ?WAIT11_END_GROUP;
@!P1 BRA 0xb30 ?trans5;
LDC.64 R6, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR16, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R6, UR10, R10 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R6, UR4, R10 ?trans1;
LEA R6, P1, R4, UR8, 0x2 &req={2} ?WAIT3_END_GROUP;
IMAD R5, R7.reuse, UR10, R5 ?trans1;
LEA R12, P2, R8, UR16, 0x2 &req={3} ?trans1;
IMAD R9, R7, UR4, R9 ?WAIT3_END_GROUP;
LEA.HI.X R7, R4, UR9, R5, 0x2, P1 ?trans2;
LEA.HI.X R13, R8, UR17, R9, 0x2, P2 ?WAIT3_END_GROUP;
LDG.E R4, desc[UR12][R6.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR12][R12.64] &wr=0x3 ?trans4;
LDG.E R5, desc[UR12][R6.64+0x40] &wr=0x4 ?trans4;
LDG.E R9, desc[UR12][R12.64+0x40] &wr=0x5 ?trans1;
FADD R0, R0, 1 ?trans1;
IADD.64 R10, R10, 0x20 ?WAIT3_END_GROUP;
FADD R0, R0, 1 ?trans1;
FADD R4, R19, R4 &req={2} ?trans1;
FADD R8, R17, R8 &req={3} ?WAIT3_END_GROUP;
FADD R19, R4, R5 &req={4} ?trans1;
FADD R17, R8, R9 &req={5} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@P0 BRA 0xc70 ?trans5;
LDC.64 R12, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR16, c[0x0][0x390] &wr=0x2 ?trans1;
MOV R6, R10 ?trans1;
MOV R7, R11 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x3 ?trans3;
IMAD.WIDE.U32 R4, R12, UR10, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R12, UR4, R6 ?trans1;
LEA R6, P0, R4, UR8, 0x2 &req={3} ?WAIT3_END_GROUP;
IMAD R7, R13.reuse, UR10, R5 ?trans1;
LEA R10, P1, R8, UR16, 0x2 &req={2} ?trans1;
IMAD R5, R13, UR4, R9 ?WAIT3_END_GROUP;
LEA.HI.X R7, R4, UR9, R7, 0x2, P0 ?trans2;
LEA.HI.X R11, R8, UR17, R5, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R6, desc[UR12][R6.64] &wr=0x2 ?trans4;
LDG.E R10, desc[UR12][R10.64] &wr=0x3 ?trans1;
FADD R0, R0, 1 ?trans1;
FADD R19, R19, R6 &req={2} ?trans1;
FADD R17, R17, R10 &req={3} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
STS [R16], R19 &rd=0x1 ?trans4;
STS [R14], R17 &rd=0x1 ?trans4;
STS [R15], R0 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R2.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R2.reuse, 0x3, PT ?trans1;
ISETP.GT.U32.AND P2, PT, R2.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P3, PT, R2, RZ, PT ?trans2;
BSSY.RECONVERGENT B0, 0xe00 ?trans8;
@P0 BRA 0xdf0 ?trans5;
LDS R0, [R16+0x20] &req={1} ?trans4;
LDS R3, [R16] &wr=0x1 ?trans2;
FADD R3, R0, R3 &req={1} ?WAIT5_END_GROUP;
STS [R16], R3 ?trans4;
LDS R0, [R14+0x20] ?trans4;
LDS R5, [R14] &wr=0x1 ?trans2;
FADD R5, R0, R5 &req={1} ?WAIT5_END_GROUP;
STS [R14], R5 ?trans4;
LDS R0, [R15+0x20] ?trans4;
LDS R7, [R15] &wr=0x1 ?trans2;
FADD R0, R0, R7 &req={1} ?WAIT5_END_GROUP;
STS [R15], R0 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xf00 ?trans4;
@P1 BRA 0xef0 ?trans5;
LDS R0, [R16+0x10] &req={2,1} ?trans4;
LDS R3, [R16] &wr=0x1 ?trans2;
FADD R3, R0, R3 &req={1} ?WAIT5_END_GROUP;
STS [R16], R3 ?trans4;
LDS R0, [R14+0x10] ?trans4;
LDS R5, [R14] &wr=0x1 ?trans2;
FADD R5, R0, R5 &req={1} ?WAIT5_END_GROUP;
STS [R14], R5 ?trans4;
LDS R0, [R15+0x10] ?trans4;
LDS R7, [R15] &wr=0x1 ?trans2;
FADD R0, R0, R7 &req={1} ?WAIT5_END_GROUP;
STS [R15], R0 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1000 ?trans4;
@P2 BRA 0xff0 ?trans5;
LDS R0, [R16+0x8] &req={3,2,1} ?trans4;
LDS R3, [R16] &wr=0x1 ?trans2;
FADD R3, R0, R3 &req={1} ?WAIT5_END_GROUP;
STS [R16], R3 ?trans4;
LDS R0, [R14+0x8] ?trans4;
LDS R5, [R14] &wr=0x1 ?trans2;
FADD R5, R0, R5 &req={1} ?WAIT5_END_GROUP;
STS [R14], R5 ?trans4;
LDS R0, [R15+0x8] ?trans4;
LDS R7, [R15] &wr=0x1 ?trans2;
FADD R0, R0, R7 &req={1} ?WAIT5_END_GROUP;
STS [R15], R0 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1100 ?trans4;
@P3 BRA 0x10f0 ?trans5;
LDS R0, [UR6+0x4] &req={4,3,2,1} ?trans4;
LDS R3, [R16] &wr=0x1 ?trans2;
FADD R3, R0, R3 &req={1} ?WAIT5_END_GROUP;
STS [R16], R3 ?trans4;
LDS R0, [UR6+0x44] ?trans4;
LDS R5, [R14] &wr=0x1 ?trans2;
FADD R5, R0, R5 &req={1} ?WAIT5_END_GROUP;
STS [R14], R5 ?trans4;
LDS R0, [UR6+0x84] ?trans4;
LDS R7, [R15] &wr=0x1 ?trans2;
FADD R0, R0, R7 &req={1} ?WAIT5_END_GROUP;
STS [R15], R0 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P3 EXIT ?trans5;
LDS R3, [UR6+0x80] &wr=0x5 ?trans4;
LDS R0, [UR6] &req={4,3,2,1} &wr=0x1 ?trans1;
MUFU.RCP R2, R3 &req={5} &wr=0x2 ?trans1;
FCHK P0, R0, R3 &req={1} &wr=0x1 ?trans1;
FFMA R5, -R3, R2, 1 &req={2} ?WAIT4_END_GROUP;
FFMA R5, R2, R5, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R4, -R3, R2, R0 ?WAIT4_END_GROUP;
FFMA R7, R5, R4, R2 ?trans1;
@!P0 BRA 0x11f0 &req={1} ?trans6;
MOV R2, 0x11e0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1400 &req={0} ?trans5;
MOV R7, R9 ?WAIT7_END_GROUP;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x2 ?trans1;
MUFU.RCP R0, R3 &wr=0x3 ?trans2;
FFMA R9, -R3, R0, 1 &req={3} ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x1 ?trans2;
FFMA R0, R0, R9, R0 ?WAIT6_END_GROUP;
LDS R2, [UR5+0x40] &wr=0x3 ?trans1;
UMOV UR5, URZ ?trans2;
UIMAD.WIDE.U32 UR4, UR10, UR6, UR4 &req={1} ?WAIT4_END_GROUP;
UIMAD UR10, UR10, UR7, UR5 ?trans1;
ULEA UR6, UP0, UR4, UR8, 0x3 &req={2} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR9, UR10, 0x3, UP0 ?trans2;
MOV R4, UR6 ?WAIT4_END_GROUP;
MOV R5, UR7 ?WAIT5_END_GROUP;
STG.E desc[UR12][R4.64], R7 &rd=0x1 ?trans1;
FCHK P0, R2, R3 &req={3} &wr=0x2 ?trans1;
FFMA R9, R0, R2, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R9, R2 ?WAIT4_END_GROUP;
FFMA R9, R0, R6, R9 ?trans1;
@!P0 BRA 0x1380 &req={2,1} ?trans6;
MOV R0, R2 ?trans1;
MOV R2, 0x1380 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1400 &req={0} ?trans5;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x1 ?trans1;
STG.E desc[UR12][R4.64+0x4], R9 ?trans1;
ULEA UR6, UP0, UR4, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR7, UR10, 0x2, UP0 ?trans2;
MOV R6, UR6 ?WAIT4_END_GROUP;
MOV R7, UR7 ?WAIT5_END_GROUP;
STG.E desc[UR12][R6.64], R3 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R12, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R3 ?trans1;
IADD3 R9, PT, PT, R12, -0x1, RZ ?trans2;
IADD3 R8, PT, PT, R10, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R8, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R6, RZ ?trans1;
@!P0 BRA 0x1620 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1a00 ?trans5;
LOP3.LUT P0, RZ, R7, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x19e0 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P2 BRA !P1, 0x19e0 ?trans5;
LOP3.LUT P1, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P2, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x19c0 ?trans5;
LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1990 ?trans5;
ISETP.GE.AND P0, PT, R8, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R6, RZ ?trans1;
@!P0 MOV R6, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R7, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R6, PT, PT, R6, 0x40, RZ ?WAIT7_END_GROUP;
LEA R8, R12, 0xc0800000, 0x17 ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, -R8, R7, RZ ?trans2;
IADD3 R7, PT, PT, R10, -0x7f, RZ ?trans2;
MUFU.RCP R9, R8 &wr=0x0 ?trans1;
FADD.FTZ R11, -R8, -RZ ?trans2;
IMAD R0, R7.reuse, -0x800000, R0 ?trans1;
IADD3 R7, PT, PT, R7, 0x7f, -R12 ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R7, R6, RZ ?trans1;
FFMA R10, R9, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R14, R9, R10, R9 ?WAIT4_END_GROUP;
FFMA R9, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R9, R0 ?WAIT4_END_GROUP;
FFMA R13, R14, R10, R9 ?WAIT4_END_GROUP;
FFMA R10, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R9, R14, R10, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R9 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1970 ?trans5;
ISETP.GT.AND P0, PT, R8, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1940 ?trans5;
ISETP.GE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1a10 ?trans5;
ISETP.GE.AND P0, PT, R8, -0x18, PT ?trans1;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1a10 ?trans5;
FFMA.RZ R0, R14, R10.reuse, R13.reuse ?trans1;
IADD3 R11, PT, PT, R8, 0x20, RZ ?trans1;
FFMA.RM R7, R14, R10.reuse, R13.reuse ?trans1;
ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans2;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R10, R13 ?WAIT3_END_GROUP;
SHF.L.U32 R11, R6, R11, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R11, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R11, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R11, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, R9, RZ, 0xfc, !PT ?trans1;
BRA 0x1a10 ?trans6;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1a10 ?trans6;
IMAD R9, R7, 0x800000, R9 ?trans1;
BRA 0x1a10 ?trans6;
LOP3.LUT R0, R7, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1a10 ?trans6;
LOP3.LUT R9, R7, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1a10 ?trans6;
MUFU.RSQ R9, -QNAN &wr=0x0 ?trans1;
BRA 0x1a10 ?trans5;
FADD.FTZ R9, R0, R3 ?WAIT7_END_GROUP;
MOV R6, R2 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 &req={0} ?trans5;
BRA 0x1a40;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuMeansNoTest(float const*, unsigned long, float const*, unsigned long, unsigned long, float*, float*)
_Z14gpuMeansNoTestPKfmS0_mmPfS1_:
s_load_b256 s[16:23], s[0:1], 0x0
s_mov_b32 s2, s15
s_mov_b32 s15, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mov_b32 s3, s15
s_waitcnt lgkmcnt(0)
v_cmp_ge_u64_e64 s4, s[14:15], s[18:19]
v_cmp_ge_u64_e64 s5, s[2:3], s[22:23]
s_or_b32 s4, s4, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB3_11
s_load_b256 s[4:11], s[0:1], 0x20
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v8, 2, v0
s_mov_b32 s1, exec_lo
ds_store_2addr_b32 v8, v1, v1 offset1:16
ds_store_b32 v8, v1 offset:128
v_add_nc_u32_e32 v9, 64, v8
v_add_nc_u32_e32 v10, 0x80, v8
s_waitcnt lgkmcnt(0)
v_cmpx_gt_u64_e64 s[4:5], v[0:1]
s_cbranch_execz .LBB3_5
s_mul_i32 s0, s5, s2
s_mul_hi_u32 s11, s4, s2
s_mul_i32 s10, s4, s2
s_add_i32 s11, s11, s0
v_dual_mov_b32 v11, v1 :: v_dual_lshlrev_b32 v4, 2, v0
s_lshl_b64 s[10:11], s[10:11], 2
s_mul_hi_u32 s12, s4, s14
s_add_u32 s0, s20, s10
s_mul_i32 s10, s5, s14
s_addc_u32 s13, s21, s11
s_add_i32 s11, s12, s10
s_mul_i32 s10, s4, s14
v_add_co_u32 v2, s0, s0, v4
s_lshl_b64 s[10:11], s[10:11], 2
v_add_co_ci_u32_e64 v3, null, s13, 0, s0
s_add_u32 s0, s16, s10
s_addc_u32 s10, s17, s11
v_add_co_u32 v4, s0, s0, v4
v_mov_b32_e32 v7, v1
v_add_co_ci_u32_e64 v5, null, s10, 0, s0
v_mov_b32_e32 v12, v1
v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v6, v0
s_mov_b32 s10, 0
.LBB3_3:
global_load_b32 v14, v[4:5], off
global_load_b32 v15, v[2:3], off
v_add_co_u32 v6, vcc_lo, v6, 16
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, 64
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cmp_le_u64_e64 s0, s[4:5], v[6:7]
v_add_co_u32 v4, vcc_lo, v4, 64
v_add_f32_e32 v11, 1.0, v11
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_or_b32 s10, s0, s10
s_waitcnt vmcnt(0)
v_dual_add_f32 v13, v14, v13 :: v_dual_add_f32 v12, v15, v12
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB3_3
s_or_b32 exec_lo, exec_lo, s10
ds_store_b32 v8, v13
ds_store_b32 v9, v12
ds_store_b32 v10, v11
.LBB3_5:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b64 s[0:1], 8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB3_6:
s_mov_b32 s4, exec_lo
v_cmpx_gt_u64_e64 s[0:1], v[0:1]
s_cbranch_execz .LBB3_8
s_lshl_b32 s5, s0, 2
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v2, s5, v8
v_add_nc_u32_e32 v3, s5, v9
v_add_nc_u32_e32 v4, s5, v10
ds_load_b32 v5, v8
ds_load_b32 v6, v9
ds_load_b32 v2, v2
ds_load_b32 v3, v3
ds_load_b32 v4, v4
ds_load_b32 v7, v10
s_waitcnt lgkmcnt(2)
v_dual_add_f32 v2, v2, v5 :: v_dual_add_f32 v3, v3, v6
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v4, v4, v7
ds_store_b32 v8, v2
ds_store_b32 v9, v3
ds_store_b32 v10, v4
.LBB3_8:
s_or_b32 exec_lo, exec_lo, s4
v_cmp_gt_u64_e64 s4, s[0:1], 1
s_lshr_b64 s[0:1], s[0:1], 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB3_6
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB3_11
v_mov_b32_e32 v2, 0
s_mul_i32 s1, s14, s23
s_mul_hi_u32 s5, s14, s22
s_mul_i32 s4, s14, s22
s_add_i32 s5, s5, s1
ds_load_2addr_b32 v[0:1], v2 offset1:16
ds_load_b32 v3, v2 offset:128
s_add_u32 s10, s4, s2
s_addc_u32 s11, s5, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[10:11], s[10:11], 3
s_add_u32 s6, s6, s10
s_addc_u32 s7, s7, s11
s_lshl_b64 s[4:5], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s8, s4
s_addc_u32 s5, s9, s5
s_waitcnt lgkmcnt(0)
v_div_scale_f32 v4, null, v3, v3, v0
v_div_scale_f32 v5, null, v3, v3, v1
v_div_scale_f32 v10, vcc_lo, v0, v3, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_f32_e32 v6, v4
v_rcp_f32_e32 v7, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v8, -v4, v6, 1.0
v_fma_f32 v9, -v5, v7, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_dual_fmac_f32 v7, v9, v7 :: v_dual_fmac_f32 v6, v8, v6
v_div_scale_f32 v8, s0, v1, v3, v1
v_mul_f32_e32 v11, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v13, -v5, v11, v8
v_fmac_f32_e32 v11, v13, v7
v_mul_f32_e32 v9, v10, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v5, -v5, v11, v8
v_fma_f32 v12, -v4, v9, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v9, v12, v6
v_fma_f32 v4, -v4, v9, v10
s_delay_alu instid0(VALU_DEP_1)
v_div_fmas_f32 v4, v4, v6, v9
s_mov_b32 vcc_lo, s0
s_lshl_b64 s[0:1], s[2:3], 2
v_div_fmas_f32 v5, v5, v7, v11
s_add_u32 s0, s4, s0
v_div_fixup_f32 v0, v4, v3, v0
s_addc_u32 s1, s5, s1
s_delay_alu instid0(VALU_DEP_2)
v_div_fixup_f32 v1, v5, v3, v1
s_clause 0x1
global_store_b64 v2, v[0:1], s[6:7]
global_store_b32 v2, v3, s[0:1]
.LBB3_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuMeansNoTest | 9,721 | 2,837 | stackv2-00001-of-00015 |
// Demangled: gpuPMCC(float const*, unsigned long, float const*, unsigned long, unsigned long, float const*, float const*, float const*, float*)
Function : _Z7gpuPMCCPKfmS0_mmS0_S0_S0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
UMOV UR5, URZ ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x398] &wr=0x1 ?trans8;
S2UR UR14, SR_CTAID.X &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
ISETP.LE.U64.AND P0, PT, R6, UR4, PT &req={1} ?WAIT2_END_GROUP;
MOV R2, UR14 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.U64.OR P0, PT, R2, R4, P0 &req={3} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R22, SR_TID.X &wr=0x0 ?trans1;
S2UR UR18, SR_CgaCtaId &wr=0x1 ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans1;
MOV R4, 0x7fc00000 ?trans1;
UMOV UR15, 0x400 ?trans1;
ISETP.NE.AND P0, PT, R22, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2b0 &req={2,1} ?trans5;
LDCU.64 UR8, c[0x0][0x398] &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x3b0] &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x3a8] &wr=0x2 ?trans7;
LDC.64 R6, c[0x0][0x3b8] &wr=0x3 ?trans1;
UIMAD.WIDE.U32 UR6, UR14, UR8, UR4 &req={0} ?WAIT4_END_GROUP;
UIMAD UR8, UR14, UR9, UR7 ?trans1;
USHF.L.U32 UR12, UR6, 0x3, URZ ?WAIT3_END_GROUP;
USHF.L.U64.HI UR13, UR6, 0x3, UR8 ?WAIT6_END_GROUP;
IADD.64 R2, R2, UR12 &req={1} ?trans2;
IADD.64 R6, R6, UR12 &req={3} ?WAIT4_END_GROUP;
LDG.E R12, desc[UR16][R2.64] &wr=0x3 ?trans4;
LDG.E R13, desc[UR16][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R14, desc[UR16][R6.64] &wr=0x3 ?trans4;
LDG.E R15, desc[UR16][R6.64+0x4] &wr=0x3 ?trans1;
ULEA UR7, UP0, UR6, UR10, 0x2 &req={2} ?WAIT4_END_GROUP;
ULEA.HI.X UR6, UR6, UR11, UR8, 0x2, UP0 ?trans2;
MOV R8, UR7 ?WAIT4_END_GROUP;
MOV R9, UR6 ?WAIT5_END_GROUP;
LDG.E R8, desc[UR16][R8.64] &wr=0x2 ?trans1;
S2UR UR7, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR6, 0x400 ?trans2;
ULEA UR6, UR7, UR6, 0x18 &req={0} ?WAIT9_END_GROUP;
STS.128 [UR6], R12 &req={3} &rd=0x0 ?trans2;
FADD R4, R8, -1 &req={2,0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
UIADD3 UR6, UPT, UPT, UR15, 0x10, URZ ?trans1;
MOV R23, RZ ?WAIT3_END_GROUP;
ULEA UR6, UR18, UR6, 0x18 ?trans1;
LDCU.64 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x13a0 ?trans1;
LDCU.64 UR12, c[0x0][0x3a0] &wr=0x1 ?trans3;
LEA R5, R22, UR6, 0x2 ?WAIT5_END_GROUP;
STS [R5], RZ &rd=0x2 ?trans1;
ISETP.GE.U64.AND P0, PT, R22, UR8, PT &req={0} ?WAIT14_END_GROUP;
@P0 BRA 0x1390 &req={2,1} ?trans5;
LOP3.LUT R30, RZ, R22.reuse, RZ, 0x33, !PT ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 ?trans1;
MOV R31, 0xffffffff ?trans1;
ULEA UR6, UR18, UR15, 0x18 ?trans1;
BSSY.RECONVERGENT B3, 0x810 ?trans1;
MOV.64 R20, R22 ?trans2;
IADD.64 R30, R30, UR8 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
SHF.R.U64 R2, R30, 0x4, R31.reuse ?trans1;
LDS.128 R8, [UR6] &wr=0x0 ?trans1;
SHF.R.U32.HI R3, RZ, 0x4, R31 ?WAIT5_END_GROUP;
IADD.64 R2, R2, 0x1 ?WAIT5_END_GROUP;
LOP3.LUT R28, R2, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R28, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x800 ?trans5;
LDC.64 R14, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x2 ?trans1;
MOV.64 R20, R22 ?trans2;
LDCU.64 UR6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R14, UR4, R22 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R6, R14, UR14, R22 ?trans1;
LEA R18, P0, R2, UR6, 0x2 &req={3} ?WAIT3_END_GROUP;
IMAD R13, R15.reuse, UR4, R3 ?trans1;
LEA R16, P1, R6, UR10, 0x2 &req={2} ?trans1;
IMAD R3, R15, UR14, R7 ?WAIT3_END_GROUP;
LEA.HI.X R19, R2, UR7, R13, 0x2, P0 ?trans2;
LEA.HI.X R17, R6, UR11, R3, 0x2, P1 ?trans1;
MOV R6, RZ ?WAIT7_END_GROUP;
LDG.E R14, desc[UR16][R18.64] &wr=0x2 ?trans4;
LDG.E R7, desc[UR16][R16.64] &wr=0x3 ?trans1;
IADD.64 R28, R28, -0x1 ?trans2;
BSSY.RECONVERGENT B4, 0x7c0 ?trans4;
ISETP.NE.S64.AND P2, PT, R28, RZ, PT ?WAIT2_END_GROUP;
FSETP.NAN.AND P0, PT, |R14|, |R14|, PT &req={2} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R7|, |R7|, P0 &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0x7b0 &req={1} ?trans5;
MUFU.RCP R3, R10 &req={0} &wr=0x0 ?trans1;
FADD R0, -R8, R7 ?trans1;
BSSY.RECONVERGENT B5, 0x6a0 ?trans3;
FCHK P0, R0, R10 &wr=0x1 ?trans1;
FFMA R2, R3, -R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R3, R2, R3 ?WAIT4_END_GROUP;
FFMA R13, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R2, R13, -R10, R0 ?WAIT4_END_GROUP;
FFMA R13, R3, R2, R13 ?trans1;
@!P0 BRA 0x690 &req={1} ?trans6;
MOV R3, R10 ?trans1;
MOV R2, 0x680 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 ?trans5;
MOV R13, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B5 ?trans5;
MUFU.RCP R2, R11 &wr=0x0 ?trans1;
FADD R0, R14, -R9 ?trans1;
BSSY.RECONVERGENT B5, 0x790 ?trans3;
FCHK P0, R0, R11 &wr=0x1 ?trans1;
FFMA R3, R2, -R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R2, R3, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R7, R2, -R11, R0 ?WAIT4_END_GROUP;
FFMA R3, R3, R7, R2 ?trans1;
@!P0 BRA 0x780 &req={1} ?trans6;
MOV R3, R11 ?trans1;
MOV R2, 0x770 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 ?trans5;
MOV R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B5 ?trans5;
FFMA R6, R3, R13, R6 ?WAIT5_END_GROUP;
STS [R5], R6 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B4 ?trans5;
IADD.64 R20, R20, 0x10 ?trans2;
IADD.64 R18, R18, 0x40 ?trans2;
IADD.64 R16, R16, 0x40 ?trans2;
@P2 BRA 0x530 ?trans6;
BSYNC.RECONVERGENT B3 ?trans5;
ISETP.GE.U64.AND P0, PT, R30, 0x30, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x1390 ?trans5;
LDC.64 R14, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R2, R14, UR14, R20 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R14, UR4, R20 ?trans1;
LEA R18, P0, R2, UR6, 0x2 &req={3} ?WAIT3_END_GROUP;
IMAD R7, R15.reuse, UR14, R3 ?trans1;
LEA R16, P1, R12, UR10, 0x2 &req={4} ?trans1;
IMAD R3, R15, UR4, R13 ?WAIT3_END_GROUP;
LEA.HI.X R19, R2, UR7, R7, 0x2, P0 ?trans2;
LEA.HI.X R17, R12, UR11, R3, 0x2, P1 ?WAIT3_END_GROUP;
IADD.64 R18, R18, 0x80 ?trans2;
IADD.64 R16, R16, 0x80 ?WAIT8_END_GROUP;
LDG.E R14, desc[UR16][R16.64+-0x80] &req={2} &wr=0x2 ?trans4;
LDG.E R3, desc[UR16][R18.64+-0x80] &req={3} &wr=0x3 ?trans1;
BSSY.RECONVERGENT B3, 0xb90 ?trans1;
FSETP.NAN.AND P0, PT, |R14|, |R14|, PT &req={2} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R3|, |R3|, P0 &req={3} ?WAIT13_END_GROUP;
@P0 BRA 0xb80 &req={4} ?trans5;
MUFU.RCP R13, R10 &req={0} &wr=0x0 ?trans1;
FADD R7, -R8, R3 ?trans1;
BSSY.RECONVERGENT B4, 0xa60 ?trans3;
FCHK P0, R7, R10 &wr=0x2 ?trans1;
FFMA R0, R13, -R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R13, R13, R0, R13 ?WAIT4_END_GROUP;
FFMA R0, R13, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R0, -R10, R7 ?WAIT4_END_GROUP;
FFMA R13, R13, R3, R0 ?trans1;
@!P0 BRA 0xa50 &req={2} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R10 ?trans1;
MOV R2, 0xa40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={1} ?trans5;
MOV R13, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
MUFU.RCP R0, R11 &wr=0x0 ?trans1;
FADD R7, R14, -R9 ?trans1;
BSSY.RECONVERGENT B4, 0xb60 ?trans3;
FCHK P0, R7, R11 &wr=0x2 ?trans1;
FFMA R3, R0, -R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R3, R0 ?WAIT4_END_GROUP;
FFMA R2, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R11, R7 ?WAIT4_END_GROUP;
FFMA R3, R0, R3, R2 ?trans1;
@!P0 BRA 0xb50 &req={2} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R11 ?trans1;
MOV R2, 0xb40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={1} ?trans5;
MOV R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
FFMA R6, R3, R13, R6 &req={1} ?WAIT5_END_GROUP;
STS [R5], R6 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B3 ?trans5;
LDG.E R14, desc[UR16][R16.64+-0x40] &wr=0x3 ?trans4;
LDG.E R3, desc[UR16][R18.64+-0x40] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B3, 0xe20 ?trans1;
FSETP.NAN.AND P0, PT, |R14|, |R14|, PT &req={3} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R3|, |R3|, P0 &req={4} ?WAIT13_END_GROUP;
@P0 BRA 0xe10 ?trans5;
MUFU.RCP R13, R10 &req={0} &wr=0x0 ?trans1;
FADD R7, -R8, R3 ?trans1;
BSSY.RECONVERGENT B4, 0xcf0 ?trans3;
FCHK P0, R7, R10 &wr=0x3 ?trans1;
FFMA R0, R13, -R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R13, R13, R0, R13 ?WAIT4_END_GROUP;
FFMA R0, R13, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R0, -R10, R7 ?WAIT4_END_GROUP;
FFMA R13, R13, R3, R0 ?trans1;
@!P0 BRA 0xce0 &req={3} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R10 ?trans1;
MOV R2, 0xcd0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={2,1} ?trans5;
MOV R13, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
MUFU.RCP R0, R11 &wr=0x0 ?trans1;
FADD R7, R14, -R9 ?trans1;
BSSY.RECONVERGENT B4, 0xdf0 ?trans3;
FCHK P0, R7, R11 &wr=0x3 ?trans1;
FFMA R3, R0, -R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R3, R0 ?WAIT4_END_GROUP;
FFMA R2, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R11, R7 ?WAIT4_END_GROUP;
FFMA R3, R0, R3, R2 ?trans1;
@!P0 BRA 0xde0 &req={3} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R11 ?trans1;
MOV R2, 0xdd0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={2,1} ?trans5;
MOV R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
FFMA R6, R3, R13, R6 &req={2,1} ?WAIT5_END_GROUP;
STS [R5], R6 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B3 ?trans5;
LDG.E R14, desc[UR16][R16.64] &wr=0x4 ?trans4;
LDG.E R3, desc[UR16][R18.64] &wr=0x5 ?trans1;
BSSY.RECONVERGENT B3, 0x10b0 ?trans1;
FSETP.NAN.AND P0, PT, |R14|, |R14|, PT &req={4} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R3|, |R3|, P0 &req={5} ?WAIT13_END_GROUP;
@P0 BRA 0x10a0 ?trans5;
MUFU.RCP R13, R10 &req={0} &wr=0x0 ?trans1;
FADD R7, -R8, R3 ?trans1;
BSSY.RECONVERGENT B4, 0xf80 ?trans3;
FCHK P0, R7, R10 &wr=0x4 ?trans1;
FFMA R0, R13, -R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R13, R13, R0, R13 ?WAIT4_END_GROUP;
FFMA R0, R13, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R0, -R10, R7 ?WAIT4_END_GROUP;
FFMA R13, R13, R3, R0 ?trans1;
@!P0 BRA 0xf70 &req={4} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R10 ?trans1;
MOV R2, 0xf60 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={3,2,1} ?trans5;
MOV R13, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
MUFU.RCP R0, R11 &wr=0x0 ?trans1;
FADD R7, R14, -R9 ?trans1;
BSSY.RECONVERGENT B4, 0x1080 ?trans3;
FCHK P0, R7, R11 &wr=0x4 ?trans1;
FFMA R3, R0, -R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R3, R0 ?WAIT4_END_GROUP;
FFMA R2, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R11, R7 ?WAIT4_END_GROUP;
FFMA R3, R0, R3, R2 ?trans1;
@!P0 BRA 0x1070 &req={4} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R11 ?trans1;
MOV R2, 0x1060 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={3,2,1} ?trans5;
MOV R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
FFMA R6, R3, R13, R6 &req={3,2,1} ?WAIT5_END_GROUP;
STS [R5], R6 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B3 ?trans5;
LDG.E R14, desc[UR16][R16.64+0x40] &wr=0x5 ?trans4;
LDG.E R3, desc[UR16][R18.64+0x40] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B3, 0x1340 ?trans1;
FSETP.NAN.AND P0, PT, |R14|, |R14|, PT &req={5} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R3|, |R3|, P0 &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x1330 ?trans5;
MUFU.RCP R13, R10 &req={0} &wr=0x0 ?trans1;
FADD R7, -R8, R3 ?trans1;
BSSY.RECONVERGENT B4, 0x1210 ?trans3;
FCHK P0, R7, R10 &wr=0x2 ?trans1;
FFMA R0, R13, -R10, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R13, R13, R0, R13 ?WAIT4_END_GROUP;
FFMA R0, R13, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R0, -R10, R7 ?WAIT4_END_GROUP;
FFMA R13, R13, R3, R0 ?trans1;
@!P0 BRA 0x1200 &req={2} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R10 ?trans1;
MOV R2, 0x11f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={4,3,1} ?trans5;
MOV R13, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
MUFU.RCP R0, R11 &wr=0x0 ?trans1;
FADD R7, R14, -R9 ?trans1;
BSSY.RECONVERGENT B4, 0x1310 ?trans3;
FCHK P0, R7, R11 &wr=0x2 ?trans1;
FFMA R3, R0, -R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R3, R0 ?WAIT4_END_GROUP;
FFMA R2, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R2, -R11, R7 ?WAIT4_END_GROUP;
FFMA R3, R0, R3, R2 ?trans1;
@!P0 BRA 0x1300 &req={2} ?trans6;
MOV R0, R7 ?trans1;
MOV R3, R11 ?trans1;
MOV R2, 0x12f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={4,3,1} ?trans5;
MOV R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B4 ?trans5;
FFMA R6, R3, R13, R6 &req={4,3,1} ?WAIT5_END_GROUP;
STS [R5], R6 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B3 ?trans5;
IADD.64 R20, R20, 0x40 ?trans2;
IADD.64 R18, R18, 0x100 ?trans2;
IADD.64 R16, R16, 0x100 ?trans2;
ISETP.GE.U64.AND P0, PT, R20, UR12, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x900 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R22.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R22.reuse, 0x3, PT ?trans1;
ISETP.NE.AND P2, PT, R22, RZ, PT ?WAIT13_END_GROUP;
@!P2 S2R R7, SR_CgaCtaId &wr=0x5 ?trans1;
@!P0 LDS R0, [R5+0x20] ?trans4;
@!P0 LDS R3, [R5] &wr=0x1 ?trans2;
@!P0 FADD R0, R0, R3 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R0 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R22, 0x1, PT ?trans1;
@!P2 MOV R0, 0x400 &req={1} ?WAIT5_END_GROUP;
@!P2 LEA R7, R7, R0, 0x18 &req={5} ?trans1;
@!P1 LDS R2, [R5+0x10] ?trans4;
@!P1 LDS R3, [R5] &wr=0x1 ?trans2;
@!P1 FADD R2, R2, R3 &req={1} ?WAIT5_END_GROUP;
@!P1 STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 LDS R3, [R5+0x8] ?trans4;
@!P0 LDS R6, [R5] &req={4,3,2} &wr=0x1 ?trans2;
@!P0 FADD R6, R3, R6 &req={1} ?WAIT5_END_GROUP;
@!P0 STS [R5], R6 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P2 LDS R0, [R7+0x14] ?trans4;
@!P2 LDS R3, [R5] &wr=0x1 ?trans2;
@!P2 FADD R0, R0, R3 &req={1} ?WAIT5_END_GROUP;
@!P2 STS [R5], R0 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 EXIT ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR6, 0x400 ?trans1;
MUFU.RCP R3, R4 &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x1690 ?trans1;
FFMA R2, R3, -R4, 1 &req={3} ?trans1;
ULEA UR6, UR7, UR6, 0x18 &req={2} ?WAIT3_END_GROUP;
FFMA R3, R3, R2, R3 ?WAIT6_END_GROUP;
LDS R0, [UR6+0x10] &req={1} &wr=0x1 ?trans2;
FCHK P0, R0, R4 &req={1} &wr=0x1 ?trans1;
FFMA R5, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R2, R5, -R4, R0 ?WAIT4_END_GROUP;
FFMA R5, R3, R2, R5 ?trans1;
@!P0 BRA 0x1680 &req={1} ?trans6;
MOV R3, R4 ?trans1;
MOV R2, 0x1670 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1740 &req={0} ?trans5;
MOV R5, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR10, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x3c0] &wr=0x2 ?trans1;
UMOV UR5, URZ ?trans2;
UIMAD.WIDE.U32 UR6, UR14, UR10, UR4 &req={1} ?WAIT4_END_GROUP;
UIMAD UR11, UR14, UR11, UR7 ?trans1;
ULEA UR5, UP0, UR6, UR8, 0x2 &req={2} ?WAIT4_END_GROUP;
ULEA.HI.X UR6, UR6, UR9, UR11, 0x2, UP0 ?trans2;
MOV R2, UR5 ?WAIT4_END_GROUP;
MOV R3, UR6 ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R5 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0x1d80 ?trans1;
SHF.R.U32.HI R15, RZ, 0x17, R0 ?trans2;
LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R15, R15, 0xff, RZ, 0xc0, !PT ?trans2;
IADD3 R24, PT, PT, R7, -0x1, RZ ?trans2;
IADD3 R25, PT, PT, R15, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R24, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R25, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R12, RZ ?trans1;
@!P0 BRA 0x1960 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1d60 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1d40 ?trans5;
FSETP.NEU.FTZ.AND P3, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P3, 0x1d40 ?trans5;
LOP3.LUT P3, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P3, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1d20 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1cf0 ?trans5;
ISETP.GE.AND P0, PT, R25, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R24, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R12, RZ ?trans1;
@!P0 MOV R12, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R12, PT, PT, R12, 0x40, RZ ?WAIT7_END_GROUP;
LEA R24, R7, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0x1ce0 ?trans1;
IADD3 R15, PT, PT, R15, -0x7f, RZ ?trans2;
IADD3 R27, PT, PT, -R24, R3, RZ ?WAIT3_END_GROUP;
IMAD R0, R15.reuse, -0x800000, R0 ?trans1;
IADD3 R15, PT, PT, R15, 0x7f, -R7 ?trans1;
MUFU.RCP R24, R27 &wr=0x0 ?trans1;
FADD.FTZ R3, -R27, -RZ ?trans2;
IADD3 R15, PT, PT, R15, R12, RZ ?trans2;
FFMA R25, R24, R3, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R25, R24, R25, R24 ?WAIT4_END_GROUP;
FFMA R24, R0, R25, RZ ?WAIT4_END_GROUP;
FFMA R26, R3, R24, R0 ?WAIT4_END_GROUP;
FFMA R26, R25, R26, R24 ?WAIT4_END_GROUP;
FFMA R3, R3, R26, R0 ?WAIT4_END_GROUP;
FFMA R0, R25, R3, R26 ?WAIT5_END_GROUP;
SHF.R.U32.HI R7, RZ, 0x17, R0 ?WAIT4_END_GROUP;
LOP3.LUT R12, R7, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R12, R15, RZ ?WAIT4_END_GROUP;
IADD3 R12, PT, PT, R7, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R12, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1cc0 ?trans5;
ISETP.GT.AND P0, PT, R7, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1c90 ?trans5;
ISETP.GE.AND P0, PT, R7, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1cd0 ?trans5;
ISETP.GE.AND P0, PT, R7, -0x18, PT ?trans1;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x1cd0 ?trans5;
FFMA.RZ R15, R25, R3.reuse, R26.reuse ?trans1;
IADD3 R12, PT, PT, R7, 0x20, RZ ?trans1;
FFMA.RP R24, R25.reuse, R3.reuse, R26.reuse ?trans1;
FFMA.RM R3, R25, R3, R26 ?trans1;
ISETP.NE.AND P1, PT, R7, RZ, PT ?trans1;
LOP3.LUT R15, R15, 0x7fffff, RZ, 0xc0, !PT ?trans1;
ISETP.NE.AND P3, PT, R7.reuse, RZ, PT ?trans1;
IADD3 R7, PT, PT, -R7, RZ, RZ ?trans2;
LOP3.LUT R15, R15, 0x800000, RZ, 0xfc, !PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, R24, R3, PT ?WAIT3_END_GROUP;
SHF.L.U32 R12, R15, R12, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R12, RZ, P1 ?trans1;
SEL R12, R7, RZ, P3 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R12, RZ, R12, R15 ?WAIT3_END_GROUP;
SEL R24, RZ, 0x1, !P0 ?trans1;
SHF.R.U32.HI R3, RZ, 0x1, R12 ?WAIT4_END_GROUP;
LOP3.LUT R7, R24, 0x1, R3, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R12, R7, R12, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R3, R12, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R3, R0, RZ, 0xfc, !PT ?trans1;
BRA 0x1cd0 ?trans6;
LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1cd0 ?trans6;
IMAD R0, R15, 0x800000, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1d70 ?trans5;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1d70 ?trans6;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1d70 ?trans6;
MUFU.RSQ R0, -QNAN &wr=0x0 ?trans1;
BRA 0x1d70 ?trans5;
FADD.FTZ R0, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x1da0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuPMCC(float const*, unsigned long, float const*, unsigned long, unsigned long, float const*, float const*, float const*, float*)
_Z7gpuPMCCPKfmS0_mmS0_S0_S0_Pf:
s_load_b512 s[16:31], s[0:1], 0x0
s_mov_b32 s4, s15
s_mov_b32 s15, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mov_b32 s5, s15
s_waitcnt lgkmcnt(0)
v_cmp_ge_u64_e64 s2, s[14:15], s[18:19]
v_cmp_ge_u64_e64 s3, s[4:5], s[22:23]
s_or_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s2
s_cbranch_vccnz .LBB2_14
v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v12, 0x7fc00000
v_cmp_eq_u32_e64 s2, 0, v0
s_mul_i32 s10, s14, s23
s_mul_hi_u32 s11, s14, s22
s_mul_i32 s6, s14, s22
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_3
s_add_i32 s7, s11, s10
s_add_u32 s8, s6, s4
s_addc_u32 s9, s7, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[8:9], 3
s_add_u32 s12, s28, s8
s_addc_u32 s13, s29, s9
s_add_u32 s8, s30, s8
s_addc_u32 s9, s31, s9
s_lshl_b64 s[18:19], s[6:7], 2
s_load_b64 s[12:13], s[12:13], 0x0
s_add_u32 s7, s26, s18
s_addc_u32 s15, s27, s19
s_lshl_b64 s[18:19], s[4:5], 2
s_load_b64 s[8:9], s[8:9], 0x0
s_add_u32 s18, s7, s18
s_addc_u32 s19, s15, s19
s_load_b32 s7, s[18:19], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v4, s12 :: v_dual_mov_b32 v5, s13
v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
v_add_f32_e64 v12, s7, -1.0
ds_store_b128 v1, v[2:5] offset:64
.LBB2_3:
s_or_b32 exec_lo, exec_lo, s3
v_lshlrev_b32_e32 v13, 2, v0
s_mov_b32 s7, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_store_b32 v13, v1
v_cmpx_gt_u64_e64 s[24:25], v[0:1]
s_cbranch_execz .LBB2_8
v_dual_mov_b32 v14, 0 :: v_dual_mov_b32 v11, v1
s_mul_i32 s3, s25, s4
s_mul_hi_u32 s8, s24, s4
s_mul_hi_u32 s12, s24, s14
ds_load_b128 v[2:5], v14 offset:64
s_add_i32 s9, s8, s3
s_mul_i32 s8, s24, s4
v_mov_b32_e32 v10, v0
s_lshl_b64 s[8:9], s[8:9], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s3, s20, s8
s_mul_i32 s8, s25, s14
s_addc_u32 s13, s21, s9
s_add_i32 s9, s12, s8
s_mul_i32 s8, s24, s14
v_add_co_u32 v6, s3, s3, v13
s_lshl_b64 s[8:9], s[8:9], 2
v_add_co_ci_u32_e64 v7, null, s13, 0, s3
s_add_u32 s3, s16, s8
s_addc_u32 s8, s17, s9
v_add_co_u32 v8, s3, s3, v13
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v9, null, s8, 0, s3
s_mov_b32 s8, 0
.LBB2_5:
global_load_b32 v16, v[8:9], off
global_load_b32 v15, v[6:7], off
s_waitcnt vmcnt(1)
v_cmp_o_f32_e32 vcc_lo, v16, v16
s_waitcnt vmcnt(0)
v_cmp_o_f32_e64 s3, v15, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s3, vcc_lo, s3
s_and_saveexec_b32 s9, s3
s_cbranch_execz .LBB2_7
s_waitcnt lgkmcnt(0)
v_dual_sub_f32 v16, v16, v4 :: v_dual_sub_f32 v15, v15, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_scale_f32 v17, null, v2, v2, v16
v_div_scale_f32 v18, null, v3, v3, v15
v_div_scale_f32 v23, vcc_lo, v16, v2, v16
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_rcp_f32_e32 v19, v17
v_rcp_f32_e32 v20, v18
s_waitcnt_depctr 0xfff
v_fma_f32 v21, -v17, v19, 1.0
v_fma_f32 v22, -v18, v20, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_fmac_f32 v19, v21, v19 :: v_dual_fmac_f32 v20, v22, v20
v_div_scale_f32 v21, s3, v15, v3, v15
v_mul_f32_e32 v22, v23, v19
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v24, v21, v20
v_fma_f32 v25, -v17, v22, v23
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v26, -v18, v24, v21
v_fmac_f32_e32 v22, v25, v19
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v24, v26, v20
v_fma_f32 v17, -v17, v22, v23
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v18, -v18, v24, v21
v_div_fmas_f32 v17, v17, v19, v22
s_mov_b32 vcc_lo, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fmas_f32 v18, v18, v20, v24
v_div_fixup_f32 v16, v17, v2, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v15, v18, v3, v15
v_fmac_f32_e32 v14, v16, v15
ds_store_b32 v13, v14
.LBB2_7:
s_or_b32 exec_lo, exec_lo, s9
v_add_co_u32 v10, vcc_lo, v10, 16
v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
v_add_co_u32 v6, vcc_lo, v6, 64
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u64_e32 vcc_lo, s[24:25], v[10:11]
v_add_co_u32 v8, s3, v8, 64
v_add_co_ci_u32_e64 v9, s3, 0, v9, s3
s_or_b32 s8, vcc_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB2_5
.LBB2_8:
s_or_b32 exec_lo, exec_lo, s7
s_mov_b64 s[8:9], 8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB2_9:
s_mov_b32 s3, exec_lo
v_cmpx_gt_u64_e64 s[8:9], v[0:1]
s_cbranch_execz .LBB2_11
v_lshl_add_u32 v2, s8, 2, v13
ds_load_b32 v2, v2
ds_load_b32 v3, v13
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v3
ds_store_b32 v13, v2
.LBB2_11:
s_or_b32 exec_lo, exec_lo, s3
v_cmp_gt_u64_e64 s3, s[8:9], 1
s_lshr_b64 s[8:9], s[8:9], 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 vcc_lo, exec_lo, s3
s_cbranch_vccnz .LBB2_9
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_14
v_mov_b32_e32 v0, 0
s_load_b64 s[0:1], s[0:1], 0x40
s_add_i32 s7, s11, s10
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[2:3], s[6:7], 2
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s0, s2
s_addc_u32 s3, s1, s3
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
s_add_u32 s0, s2, s0
v_div_scale_f32 v2, null, v12, v12, v1
v_div_scale_f32 v5, vcc_lo, v1, v12, v1
s_addc_u32 s1, s3, s1
v_rcp_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_fma_f32 v4, -v2, v3, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v3, v4, v3
v_mul_f32_e32 v4, v5, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, -v2, v4, v5
v_fmac_f32_e32 v4, v6, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v2, -v2, v4, v5
v_div_fmas_f32 v2, v2, v3, v4
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v1, v2, v12, v1
global_store_b32 v0, v1, s[0:1]
.LBB2_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuPMCC | 10,624 | 3,622 | stackv2-00001-of-00015 |
// Demangled: gpuSD(float const*, unsigned long, float const*, unsigned long, unsigned long, float const*, float const*, float*)
Function : _Z5gpuSDPKfmS0_mmS0_S0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R5, RZ ?WAIT5_END_GROUP;
S2UR UR6, SR_CTAID.X &wr=0x3 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x4 ?trans1;
MOV R2, UR4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR8, PT &req={2} ?trans2;
MOV R4, UR6 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.U64.OR P0, PT, R4, R6, P0 &req={4} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x1 ?trans1;
S2R R15, SR_CgaCtaId &wr=0x2 ?trans1;
MOV R14, 0x400 ?trans1;
LDCU.64 UR8, c[0x0][0x3a0] &wr=0x3 ?trans1;
LDCU.64 UR16, c[0x0][0x3a0] &wr=0x4 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={0} ?WAIT13_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans8;
@!P0 LDC.64 R8, c[0x0][0x3a8] &wr=0x5 ?trans8;
@!P0 LDC.64 R10, c[0x0][0x3b0] &wr=0x1 ?trans1;
@!P0 IMAD.WIDE.U32 R4, R6, UR6, R2 &req={0} ?WAIT4_END_GROUP;
@!P0 IMAD R5, R7, UR6, R5 ?trans1;
@!P0 LEA R2, P1, R4, R8, 0x3 &req={5} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R3, R4.reuse, R9, R5, 0x3, P1 ?trans2;
@!P0 LEA R6, P2, R4, R10, 0x2 &req={1} ?WAIT3_END_GROUP;
@!P0 LDG.E R8, desc[UR12][R2.64] &wr=0x5 ?trans1;
@!P0 LEA.HI.X R7, R4, R11, R5, 0x2, P2 ?WAIT3_END_GROUP;
@!P0 LDG.E R9, desc[UR12][R2.64+0x4] &wr=0x5 ?trans4;
@!P0 LDG.E R11, desc[UR12][R6.64] &rd=0x0 &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R14, 0x4c, RZ ?WAIT4_END_GROUP;
LEA R13, R15.reuse, R10, 0x18 &req={2} ?trans2;
@!P0 LEA R10, R15, R14, 0x18 ?trans2;
IADD3 R4, PT, PT, R14, 0xc, RZ ?WAIT4_END_GROUP;
LEA R5, R15, R4, 0x18 ?trans1;
MOV R7, RZ &req={0} ?WAIT4_END_GROUP;
IMAD R4, R0.reuse, 0x4, R5 ?trans2;
IMAD R5, R0, 0x4, R13 ?trans1;
BSSY.RECONVERGENT B0, 0xa40 ?trans1;
MOV R6, R0.reuse ?trans1;
@!P0 STS.64 [R10], R8 &req={5} ?trans4;
@!P0 STS [R10+0x8], R11 &req={3} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
MOV R10, R0 &req={0} ?trans1;
MOV R11, R7 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R10, UR8, PT ?trans2;
STS [R4], RZ &rd=0x0 ?trans4;
STS [R5], RZ &rd=0x0 ?trans8;
@P0 BRA 0xa30 &req={4,0} ?trans5;
LOP3.LUT R2, RZ, R0, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x620 ?trans1;
LOP3.LUT R3, RZ, R7, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IADD.64 R12, R2, UR8 ?WAIT3_END_GROUP;
LEA R2, R15, R14, 0x18 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
SHF.R.U64 R8, R12.reuse, 0x4, R13 ?trans1;
ISETP.GE.U64.AND P1, PT, R12, 0x30, PT ?WAIT3_END_GROUP;
LDS.64 R2, [R2] &wr=0x0 ?trans1;
SHF.R.U32.HI R9, RZ, 0x4, R13 ?WAIT5_END_GROUP;
IADD.64 R8, R8, 0x1 ?WAIT5_END_GROUP;
LOP3.LUT R14, R8, 0x3, RZ, 0xc0, !PT ?trans1;
CS2R R8, SRZ ?WAIT4_END_GROUP;
ISETP.NE.S64.AND P0, PT, R14, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0x610 ?trans5;
LDC.64 R12, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x2 ?trans1;
MOV R8, RZ ?trans1;
LDCU.64 UR14, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R16, R12, UR4, R10 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R18, R12, UR6, R10 ?trans1;
LEA R10, P0, R16, UR10, 0x2 &req={2} ?WAIT3_END_GROUP;
IMAD R11, R13.reuse, UR4, R17 ?trans1;
LEA R12, P2, R18, UR14, 0x2 &req={3} ?trans1;
IMAD R13, R13, UR6, R19 ?WAIT3_END_GROUP;
LEA.HI.X R11, R16, UR11, R11, 0x2, P0 ?trans2;
LEA.HI.X R13, R18, UR15, R13, 0x2, P2 ?WAIT7_END_GROUP;
LDG.E R18, desc[UR12][R10.64] &rd=0x1 &wr=0x2 ?trans4;
LDG.E R17, desc[UR12][R12.64] &rd=0x3 &wr=0x4 ?trans1;
IADD.64 R14, R14, -0x1 ?trans2;
IADD.64 R10, R10, 0x40 &req={1} ?trans2;
IADD.64 R12, R12, 0x40 &req={3} ?trans2;
FSETP.NAN.AND P0, PT, |R18|, |R18|, PT &req={2} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R17|, |R17|, P0 &req={4} ?WAIT13_END_GROUP;
@!P0 FADD R16, -R2, R17 &req={0} ?trans1;
@!P0 FADD R17, R18, -R3 ?WAIT3_END_GROUP;
@!P0 FFMA R9, R16, R16, R9 ?trans1;
@!P0 FFMA R8, R17, R17, R8 ?trans1;
MOV R16, R0 ?trans1;
MOV R17, R7 ?trans2;
@!P0 STS [R4], R9 &rd=0x1 ?trans3;
IADD.64 R16, R16, 0x10 ?trans2;
@!P0 STS [R5], R8 &rd=0x1 ?trans1;
ISETP.NE.S64.AND P0, PT, R14, RZ, PT ?WAIT3_END_GROUP;
MOV R0, R16 ?trans1;
MOV R7, R17 ?WAIT10_END_GROUP;
@P0 BRA 0x4d0 &req={1} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@!P1 BRA 0xa30 ?trans5;
LDC.64 R16, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x2 ?trans1;
MOV R10, R0 ?trans1;
MOV R11, R7 ?trans1;
LDCU.64 UR14, c[0x0][0x390] &wr=0x3 ?trans3;
IMAD.WIDE.U32 R12, R16, UR6, R10 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R14, R16, UR4, R10 ?trans1;
LEA R10, P0, R12, UR10, 0x2 &req={2} ?WAIT3_END_GROUP;
IMAD R11, R17.reuse, UR6, R13 ?trans1;
LEA R16, P1, R14, UR14, 0x2 &req={3} ?trans1;
IMAD R17, R17, UR4, R15 ?WAIT3_END_GROUP;
LEA.HI.X R11, R12, UR11, R11, 0x2, P0 ?trans2;
LEA.HI.X R17, R14, UR15, R17, 0x2, P1 ?WAIT3_END_GROUP;
IADD.64 R10, R10, 0x80 ?trans2;
IADD.64 R12, R16, 0x80 ?WAIT8_END_GROUP;
LDG.E R16, desc[UR12][R12.64+-0x80] &wr=0x2 ?trans4;
LDG.E R15, desc[UR12][R10.64+-0x80] &wr=0x3 ?trans4;
LDG.E R18, desc[UR12][R12.64+-0x40] &wr=0x4 ?trans4;
LDG.E R17, desc[UR12][R10.64+-0x40] &wr=0x5 ?trans4;
LDG.E R20, desc[UR12][R12.64] &wr=0x5 ?trans4;
LDG.E R19, desc[UR12][R10.64] &wr=0x5 ?trans4;
LDG.E R22, desc[UR12][R12.64+0x40] &rd=0x1 &wr=0x5 ?trans4;
LDG.E R21, desc[UR12][R10.64+0x40] &rd=0x0 &wr=0x5 ?trans1;
IADD.64 R12, R12, 0x100 &req={1} ?WAIT2_END_GROUP;
IADD.64 R10, R10, 0x100 &req={0} ?trans2;
FSETP.NAN.AND P0, PT, |R16|, |R16|, PT &req={2} ?WAIT5_END_GROUP;
FSETP.NAN.OR P0, PT, |R15|, |R15|, P0 &req={3} ?trans1;
FSETP.NAN.AND P1, PT, |R18|, |R18|, PT &req={4} ?WAIT5_END_GROUP;
FSETP.NAN.OR P1, PT, |R17|, |R17|, P1 &req={5} ?trans1;
FSETP.NAN.AND P2, PT, |R20|, |R20|, PT ?WAIT6_END_GROUP;
@!P0 FADD R14, -R2, R15 ?trans1;
@!P0 FADD R15, R16, -R3 ?trans1;
FSETP.NAN.OR P2, PT, |R19|, |R19|, P2 ?trans1;
FSETP.NAN.AND P3, PT, |R22|, |R22|, PT ?trans1;
@!P0 FFMA R9, R14, R14, R9 ?trans1;
@!P0 FFMA R8, R15, R15, R8 ?trans1;
@!P1 FADD R14, -R2, R17 ?trans1;
@!P1 FADD R15, R18, -R3 ?trans1;
FSETP.NAN.OR P3, PT, |R21|, |R21|, P3 ?trans1;
@!P0 STS [R4], R9 &rd=0x0 ?trans4;
@!P0 STS [R5], R8 &rd=0x1 ?trans1;
@!P1 FFMA R9, R14, R14, R9 &req={0} ?trans1;
@!P2 FADD R14, -R2, R19 ?trans1;
@!P1 FFMA R8, R15, R15, R8 &req={1} ?trans1;
@!P2 FADD R15, R20, -R3 ?WAIT2_END_GROUP;
@!P1 STS [R4], R9 &rd=0x0 ?trans4;
@!P1 STS [R5], R8 &rd=0x1 ?trans1;
@!P2 FFMA R9, R14, R14, R9 &req={0} ?trans1;
@!P3 FADD R14, -R2, R21 ?trans1;
@!P2 FFMA R8, R15, R15, R8 &req={1} ?trans1;
@!P3 FADD R15, R22, -R3 ?trans2;
@!P2 STS [R4], R9 &rd=0x0 ?trans4;
@!P2 STS [R5], R8 &rd=0x1 ?trans1;
@!P3 FFMA R9, R14, R14, R9 &req={0} ?trans1;
MOV R14, R0 ?trans1;
@!P3 FFMA R8, R15, R15, R8 &req={1} ?trans1;
MOV R15, R7 ?WAIT2_END_GROUP;
@!P3 STS [R4], R9 &rd=0x1 ?trans3;
IADD.64 R14, R14, 0x40 ?trans2;
@!P3 STS [R5], R8 &rd=0x1 ?trans4;
ISETP.GE.U64.AND P0, PT, R14, UR16, PT ?trans2;
MOV R0, R14 ?trans1;
MOV R7, R15 ?WAIT11_END_GROUP;
@!P0 BRA 0x720 &req={1} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R6.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R6, 0x3, PT ?WAIT4_END_GROUP;
BSSY.RECONVERGENT B0, 0xd20 ?trans8;
@!P0 LDS R0, [R4+0x20] ?trans4;
@!P0 LDS R3, [R4] &req={0} &wr=0x0 ?trans2;
@!P0 FADD R3, R0, R3 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R4], R3 ?trans4;
@!P0 LDS R0, [R5+0x20] ?trans4;
@!P0 LDS R7, [R5] &wr=0x0 ?trans2;
@!P0 FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R5], R0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R6, 0x1, PT ?WAIT5_END_GROUP;
@!P1 LDS R2, [R4+0x10] ?trans4;
@!P1 LDS R7, [R4] &wr=0x0 ?trans2;
@!P1 FADD R7, R2, R7 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R4], R7 ?trans4;
@!P1 LDS R2, [R5+0x10] ?trans4;
@!P1 LDS R3, [R5] &wr=0x0 ?trans2;
@!P1 FADD R2, R2, R3 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R5], R2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT5_END_GROUP;
@!P0 LDS R0, [R4+0x8] ?trans4;
@!P0 LDS R3, [R4] &wr=0x0 ?trans2;
@!P0 FADD R3, R0, R3 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R4], R3 ?trans4;
@!P0 LDS R0, [R5+0x8] ?trans4;
@!P0 LDS R7, [R5] &wr=0x0 ?trans2;
@!P0 FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R5], R0 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0xd10 ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDS R3, [R4] ?trans1;
ULEA UR5, UR7, UR5, 0x18 &req={1} ?WAIT9_END_GROUP;
LDS R0, [UR5+0x10] &req={0} &wr=0x0 ?trans2;
FADD R3, R0, R3 &req={0} ?WAIT5_END_GROUP;
STS [R4], R3 ?trans4;
LDS R0, [UR5+0x50] ?trans4;
LDS R7, [R5] &wr=0x0 ?trans2;
FADD R0, R0, R7 &req={0} ?WAIT5_END_GROUP;
STS [R5], R0 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT ?trans5;
S2UR UR7, SR_CgaCtaId &wr=0x2 ?trans1;
UMOV UR5, 0x400 ?trans2;
ULEA UR5, UR7, UR5, 0x18 &req={2} ?WAIT9_END_GROUP;
LDS.64 R6, [UR5+0x8] &wr=0x2 ?trans2;
FADD R3, R6, -1 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R0, R3 &req={1,0} &wr=0x0 ?trans1;
FCHK P0, R7, R3 &wr=0x1 ?trans1;
FFMA R5, -R3, R0, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R0, R0, R5, R0 ?WAIT4_END_GROUP;
FFMA R5, R7, R0, RZ ?WAIT4_END_GROUP;
FFMA R2, -R3, R5, R7 ?WAIT4_END_GROUP;
FFMA R0, R0, R2, R5 ?trans1;
@!P0 BRA 0xe40 &req={1} ?trans6;
MOV R0, R7 ?trans1;
MOV R2, 0xe40 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x12d0 ?trans5;
IADD3 R2, PT, PT, R0, -0xd000000, RZ ?trans1;
MUFU.RSQ R5, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R2, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xec0 &req={0} ?trans5;
MOV R6, 0xea0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1170 &req={1} ?trans5;
MOV R7, R2 ?trans1;
BRA 0xf00 ?trans6;
FMUL.FTZ R7, R5.reuse, R0 &req={1} ?trans1;
FMUL.FTZ R2, R5, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R7, R7, R0 ?WAIT4_END_GROUP;
FFMA R7, R0, R2, R7 ?WAIT7_END_GROUP;
S2UR UR7, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?trans1;
LDCU.64 UR10, c[0x0][0x398] &wr=0x1 ?trans1;
MUFU.RCP R0, R3 &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x3b8] &wr=0x3 ?trans1;
FFMA R9, -R3, R0, 1 &req={2} ?trans1;
ULEA UR5, UR7, UR5, 0x18 &req={0} ?WAIT3_END_GROUP;
FFMA R0, R0, R9, R0 ?WAIT6_END_GROUP;
LDS R2, [UR5+0x4c] &wr=0x0 ?trans1;
UMOV UR5, URZ ?trans2;
UIMAD.WIDE.U32 UR4, UR6, UR10, UR4 &req={1} ?WAIT4_END_GROUP;
UIMAD UR11, UR6, UR11, UR5 ?trans1;
ULEA UR5, UP0, UR4, UR8, 0x3 &req={3} ?WAIT4_END_GROUP;
ULEA.HI.X UR4, UR4, UR9, UR11, 0x3, UP0 ?trans2;
MOV R4, UR5 ?WAIT4_END_GROUP;
MOV R5, UR4 ?WAIT5_END_GROUP;
STG.E desc[UR12][R4.64], R7 &rd=0x1 ?trans1;
FCHK P0, R2, R3 &req={0} &wr=0x0 ?trans1;
FFMA R9, R0, R2, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R9, R2 ?WAIT4_END_GROUP;
FFMA R0, R0, R6, R9 ?trans1;
@!P0 BRA 0x1090 &req={1,0} ?trans6;
MOV R0, R2 ?trans1;
MOV R2, 0x1090 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x12d0 ?trans5;
IADD3 R2, PT, PT, R0, -0xd000000, RZ ?trans1;
MUFU.RSQ R7, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R2, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1110 &req={0} ?trans5;
MOV R6, 0x10f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1170 &req={1} ?trans5;
MOV R3, R2 ?trans1;
BRA 0x1150 ?trans6;
FMUL.FTZ R3, R7.reuse, R0 &req={1} ?trans1;
FMUL.FTZ R2, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R0 ?WAIT4_END_GROUP;
FFMA R3, R0, R2, R3 ?WAIT7_END_GROUP;
STG.E desc[UR12][R4.64+0x4], R3 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x12b0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0x12b0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0x12b0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x12b0 ?trans6;
FFMA R0, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
MUFU.RSQ R7, R0 &wr=0x0 ?trans2;
FMUL.FTZ R9, R0, R7 &req={0} ?trans1;
FMUL.FTZ R7, R7, 0.5 ?WAIT3_END_GROUP;
FADD.FTZ R2, -R9, -RZ ?WAIT4_END_GROUP;
FFMA R2, R9, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R2, R7, R9 ?WAIT4_END_GROUP;
FMUL.FTZ R2, R2, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 ?trans5;
SHF.R.U32.HI R7, RZ, 0x17, R3 ?trans2;
SHF.R.U32.HI R6, RZ, 0x17, R0 ?trans2;
LOP3.LUT R12, R7, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R10, R6, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R3 ?trans1;
IADD3 R9, PT, PT, R12, -0x1, RZ ?trans2;
IADD3 R8, PT, PT, R10, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R8, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R6, RZ ?trans1;
@!P0 BRA 0x14f0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x18d0 ?trans5;
LOP3.LUT P0, RZ, R7, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x18b0 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P2 BRA !P1, 0x18b0 ?trans5;
LOP3.LUT P1, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P2, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1890 ?trans5;
LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x1860 ?trans5;
ISETP.GE.AND P0, PT, R8, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R6, RZ ?trans1;
@!P0 MOV R6, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R7, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R6, PT, PT, R6, 0x40, RZ ?WAIT7_END_GROUP;
LEA R8, R12, 0xc0800000, 0x17 ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, -R8, R7, RZ ?trans2;
IADD3 R7, PT, PT, R10, -0x7f, RZ ?trans2;
MUFU.RCP R9, R8 &wr=0x0 ?trans1;
FADD.FTZ R11, -R8, -RZ ?trans2;
IMAD R0, R7.reuse, -0x800000, R0 ?trans1;
IADD3 R7, PT, PT, R7, 0x7f, -R12 ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R7, R6, RZ ?trans1;
FFMA R10, R9, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R14, R9, R10, R9 ?WAIT4_END_GROUP;
FFMA R9, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R10, R11, R9, R0 ?WAIT4_END_GROUP;
FFMA R13, R14, R10, R9 ?WAIT4_END_GROUP;
FFMA R10, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R9, R14, R10, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R9 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1840 ?trans5;
ISETP.GT.AND P0, PT, R8, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1810 ?trans5;
ISETP.GE.AND P0, PT, R8, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x18e0 ?trans5;
ISETP.GE.AND P0, PT, R8, -0x18, PT ?trans1;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x18e0 ?trans5;
FFMA.RZ R0, R14, R10.reuse, R13.reuse ?trans1;
IADD3 R11, PT, PT, R8, 0x20, RZ ?trans1;
FFMA.RM R7, R14, R10.reuse, R13.reuse ?trans1;
ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans2;
LOP3.LUT R6, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R10, R13 ?WAIT3_END_GROUP;
SHF.L.U32 R11, R6, R11, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R7, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R11, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R7, RZ, R7, R6 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R11, RZ, 0x1, R7 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R11, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, R9, RZ, 0xfc, !PT ?trans1;
BRA 0x18e0 ?trans6;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x18e0 ?trans6;
IMAD R9, R7, 0x800000, R9 ?trans1;
BRA 0x18e0 ?trans6;
LOP3.LUT R0, R7, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x18e0 ?trans6;
LOP3.LUT R9, R7, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x18e0 ?trans6;
MUFU.RSQ R9, -QNAN &wr=0x0 ?trans1;
BRA 0x18e0 ?trans5;
FADD.FTZ R9, R0, R3 ?WAIT7_END_GROUP;
MOV R6, R2 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
MOV R0, R9 &req={0} ?WAIT3_END_GROUP;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0x1920;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuSD(float const*, unsigned long, float const*, unsigned long, unsigned long, float const*, float const*, float*)
_Z5gpuSDPKfmS0_mmS0_S0_Pf:
s_load_b512 s[16:31], s[0:1], 0x0
s_mov_b32 s2, s15
s_mov_b32 s15, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_mov_b32 s3, s15
s_waitcnt lgkmcnt(0)
v_cmp_ge_u64_e64 s0, s[14:15], s[18:19]
v_cmp_ge_u64_e64 s1, s[2:3], s[22:23]
s_or_b32 s0, s0, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB1_14
v_mov_b32_e32 v1, 0
v_cmp_eq_u32_e64 s0, 0, v0
s_mul_i32 s8, s14, s23
s_mul_hi_u32 s9, s14, s22
s_mul_i32 s4, s14, s22
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_3
s_add_i32 s5, s9, s8
s_add_u32 s6, s4, s2
s_addc_u32 s7, s5, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[6:7], s[6:7], 3
s_add_u32 s6, s26, s6
s_addc_u32 s7, s27, s7
s_lshl_b64 s[10:11], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_u32 s5, s28, s10
s_addc_u32 s12, s29, s11
s_lshl_b64 s[10:11], s[2:3], 2
s_add_u32 s10, s5, s10
s_addc_u32 s11, s12, s11
s_load_b64 s[6:7], s[6:7], 0x0
s_load_b32 s3, s[10:11], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v2, s3
v_mov_b32_e32 v4, s7
ds_store_b96 v1, v[2:4] offset:128
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s1
v_lshlrev_b32_e32 v10, 2, v0
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_add_nc_u32_e32 v11, 64, v10
ds_store_2addr_b32 v10, v1, v1 offset1:16
v_cmpx_gt_u64_e64 s[24:25], v[0:1]
s_cbranch_execz .LBB1_8
v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, 0
s_mul_i32 s1, s25, s2
s_mul_hi_u32 s5, s24, s2
s_mul_i32 s6, s24, s2
ds_load_2addr_b32 v[2:3], v12 offset0:33 offset1:34
s_add_i32 s7, s5, s1
s_mul_i32 s5, s25, s14
s_lshl_b64 s[6:7], s[6:7], 2
v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
s_add_u32 s1, s20, s6
s_mul_hi_u32 s6, s24, s14
s_addc_u32 s10, s21, s7
s_add_i32 s7, s6, s5
s_mul_i32 s6, s24, s14
v_add_co_u32 v4, s1, s1, v10
s_lshl_b64 s[6:7], s[6:7], 2
v_add_co_ci_u32_e64 v5, null, s10, 0, s1
s_add_u32 s1, s16, s6
s_addc_u32 s5, s17, s7
v_add_co_u32 v6, s1, s1, v10
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, null, s5, 0, s1
s_mov_b32 s5, 0
.LBB1_5:
global_load_b32 v14, v[6:7], off
global_load_b32 v15, v[4:5], off
s_waitcnt vmcnt(1)
v_cmp_o_f32_e32 vcc_lo, v14, v14
s_waitcnt vmcnt(0)
v_cmp_o_f32_e64 s1, v15, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s6, vcc_lo, s1
s_and_saveexec_b32 s1, s6
s_cbranch_execz .LBB1_7
s_waitcnt lgkmcnt(0)
v_dual_sub_f32 v14, v14, v2 :: v_dual_sub_f32 v15, v15, v3
s_delay_alu instid0(VALU_DEP_1)
v_dual_fmac_f32 v13, v14, v14 :: v_dual_fmac_f32 v12, v15, v15
ds_store_b32 v10, v13
ds_store_b32 v11, v12
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s1
v_add_co_u32 v8, vcc_lo, v8, 16
v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
v_add_co_u32 v4, vcc_lo, v4, 64
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u64_e32 vcc_lo, s[24:25], v[8:9]
v_add_co_u32 v6, s1, v6, 64
v_add_co_ci_u32_e64 v7, s1, 0, v7, s1
s_or_b32 s5, vcc_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB1_5
.LBB1_8:
s_or_b32 exec_lo, exec_lo, s3
s_mov_b64 s[6:7], 8
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB1_9:
s_mov_b32 s1, exec_lo
v_cmpx_gt_u64_e64 s[6:7], v[0:1]
s_cbranch_execz .LBB1_11
s_lshl_b32 s3, s6, 2
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v2, s3, v11
v_add_nc_u32_e32 v3, s3, v10
ds_load_b32 v4, v10
ds_load_b32 v2, v2
ds_load_b32 v3, v3
ds_load_b32 v5, v11
s_waitcnt lgkmcnt(0)
v_dual_add_f32 v3, v3, v4 :: v_dual_add_f32 v2, v2, v5
ds_store_b32 v10, v3
ds_store_b32 v11, v2
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s1
v_cmp_gt_u64_e64 s1, s[6:7], 1
s_lshr_b64 s[6:7], s[6:7], 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB1_9
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_14
v_mov_b32_e32 v2, 0
s_add_i32 s9, s9, s8
s_add_u32 s2, s4, s2
s_addc_u32 s3, s9, 0
ds_load_b32 v3, v2 offset:128
ds_load_2addr_b32 v[0:1], v2 offset1:16
s_waitcnt lgkmcnt(1)
v_add_f32_e32 v3, -1.0, v3
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_div_scale_f32 v4, null, v3, v3, v0
v_div_scale_f32 v5, null, v3, v3, v1
v_div_scale_f32 v10, vcc_lo, v0, v3, v0
v_rcp_f32_e32 v6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v7, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v8, -v4, v6, 1.0
v_fma_f32 v9, -v5, v7, 1.0
v_dual_fmac_f32 v6, v8, v6 :: v_dual_fmac_f32 v7, v9, v7
v_div_scale_f32 v8, s0, v1, v3, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v9, v10, v6
v_mul_f32_e32 v11, v8, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v12, -v4, v9, v10
v_fma_f32 v13, -v5, v11, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v9, v12, v6
v_fmac_f32_e32 v11, v13, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v4, -v4, v9, v10
v_fma_f32 v5, -v5, v11, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f32 v4, v4, v6, v9
s_mov_b32 vcc_lo, s0
v_div_fmas_f32 v5, v5, v7, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f32 v0, v4, v3, v0
v_div_fixup_f32 v1, v5, v3, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_f32_e32 v3, 0x4f800000, v0
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
v_mul_f32_e32 v4, 0x4f800000, v1
v_cmp_gt_f32_e64 s0, 0xf800000, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v1, v1, v4, s0
v_sqrt_f32_e32 v4, v1
s_waitcnt_depctr 0xfff
v_dual_cndmask_b32 v0, v0, v3 :: v_dual_add_nc_u32 v9, 1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_sqrt_f32_e32 v3, v0
v_add_nc_u32_e32 v6, -1, v4
v_fma_f32 v10, -v6, v4, v1
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v5, -1, v3
v_add_nc_u32_e32 v7, 1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v8, -v5, v3, v0
v_fma_f32 v11, -v7, v3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s1, 0, v8
v_cndmask_b32_e64 v3, v3, v5, s1
v_cmp_ge_f32_e64 s1, 0, v10
v_fma_f32 v5, -v9, v4, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v6, s1
v_cmp_lt_f32_e64 s1, 0, v11
v_cndmask_b32_e64 v3, v3, v7, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_f32_e64 s1, 0, v5
v_mul_f32_e32 v5, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v9, s1
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_mul_f32 v6, 0x37800000, v4
v_cmp_class_f32_e64 vcc_lo, v0, 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v4, v4, v6, s0
v_cndmask_b32_e32 v0, v3, v0, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v1, 0x260
s_lshl_b64 s[0:1], s[2:3], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s30, s0
s_addc_u32 s1, s31, s1
v_cndmask_b32_e32 v1, v4, v1, vcc_lo
global_store_b64 v2, v[0:1], s[0:1]
.LBB1_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuSD | 9,571 | 4,249 | stackv2-00001-of-00015 |
// Demangled: gpuSignif(float const*, float const*, unsigned long, float*)
Function : _Z9gpuSignifPKfS0_mPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x3 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
UIMAD.WIDE.U32 UR4, UR6, 0x200, URZ &req={2} ?trans1;
IMAD.SHL.U32 R14, R7, 0x20, RZ &req={1} ?WAIT5_END_GROUP;
IADD.64 R2, R14, UR4 ?WAIT6_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR8, PT &req={3} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LOP3.LUT R2, RZ, R14, RZ, 0x33, !PT ?trans1;
BSSY.RECONVERGENT B0, 0xb60 ?trans1;
MOV R3, 0xffffffff ?trans1;
MOV.64 R10, RZ ?trans2;
MOV R13, RZ ?trans2;
IADD.64 R2, R2, UR8 ?trans2;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans2;
IADD.64 R2, R2, -UR4 ?WAIT6_END_GROUP;
IMNMX.U64 PT, PT, R4, R2.reuse, 0x1f, PT, !PT ?trans2;
ISETP.GE.U64.AND P0, PT, R2, 0x3, PT ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x1 ?WAIT6_END_GROUP;
MOV R18, R4 ?WAIT5_END_GROUP;
LOP3.LUT R12, R18, 0x3, RZ, 0xc0, !PT ?trans1;
@!P0 BRA 0xb50 &req={0} ?trans6;
USHF.R.U32.HI UR10, URZ, 0x15, UR6 ?trans1;
USHF.L.U32 UR7, UR6, 0xb, URZ ?trans1;
LDCU.128 UR12, c[0x0][0x380] &wr=0x0 ?trans1;
MOV.64 R10, RZ ?WAIT3_END_GROUP;
MOV R3, UR10 ?trans1;
MOV R2, UR7 ?trans1;
LOP3.LUT R18, R18, 0x3c, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
LDCU.64 UR10, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R7, 0x80, R2 ?WAIT3_END_GROUP;
LOP3.LUT R2, R2, 0x8, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
IADD.64 R8, R2.reuse, UR12 &req={0} ?trans2;
IADD.64 R6, R2.reuse, UR14 ?trans2;
IADD.64 R4, R2, UR10 &req={1} ?WAIT8_END_GROUP;
LDG.E R19, desc[UR8][R6.64+-0x8] &wr=0x2 ?trans4;
LDG.E R0, desc[UR8][R8.64+-0x8] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B1, 0x370 ?trans1;
FFMA R17, -R19, R19, 1 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R2, R17 &wr=0x0 ?trans1;
FADD R0, R0, -2 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R17 &wr=0x1 ?trans1;
FFMA R3, -R17, R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R2, R3, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R16, -R17, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R3, R16, R2 ?trans1;
@!P0 BRA 0x360 &req={1} ?trans6;
MOV R3, R17 ?trans1;
MOV R2, 0x350 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1040 ?trans5;
MOV R2, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R0, PT, PT, R2, -0xd000000, RZ ?trans1;
MUFU.RSQ R17, R2 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x450 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x400 &req={0} ?trans5;
MOV R0, R2 ?trans1;
MOV R21, 0x3f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xed0 &req={1} ?trans5;
BRA 0x440 ?trans5;
FMUL.FTZ R3, R17.reuse, R2 &req={1} ?trans1;
FMUL.FTZ R16, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R0, R0, R16, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL R3, R19, R0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64+-0x8], R3 &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R6.64+-0x4] &wr=0x2 ?trans4;
LDG.E R0, desc[UR8][R8.64+-0x4] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B1, 0x590 ?trans1;
FFMA R21, -R19, R19, 1 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R2, R21 &wr=0x1 ?trans1;
FADD R0, R0, -2 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R21 &wr=0x2 ?trans1;
FFMA R17, -R21, R2, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R17, R2, R17, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R17, RZ ?WAIT4_END_GROUP;
FFMA R16, -R21, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R17, R16, R2 ?trans1;
@!P0 BRA 0x580 &req={2,0} ?trans6;
MOV R3, R21 ?trans1;
MOV R2, 0x570 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1040 ?trans5;
MOV R2, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R0, PT, PT, R2, -0xd000000, RZ ?trans1;
MUFU.RSQ R17, R2 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x670 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x620 &req={0} ?trans5;
MOV R0, R2 ?trans1;
MOV R21, 0x610 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xed0 &req={1} ?trans5;
BRA 0x660 ?trans5;
FMUL.FTZ R3, R17.reuse, R2 &req={1} ?trans1;
FMUL.FTZ R16, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R0, R0, R16, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL R3, R19, R0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64+-0x4], R3 &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R6.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR8][R8.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B1, 0x7b0 ?trans1;
FFMA R21, -R19, R19, 1 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R2, R21 &wr=0x1 ?trans1;
FADD R0, R0, -2 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R21 &wr=0x2 ?trans1;
FFMA R17, -R21, R2, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R17, R2, R17, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R17, RZ ?WAIT4_END_GROUP;
FFMA R16, -R21, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R17, R16, R2 ?trans1;
@!P0 BRA 0x7a0 &req={2,0} ?trans6;
MOV R3, R21 ?trans1;
MOV R2, 0x790 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1040 ?trans5;
MOV R2, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R0, PT, PT, R2, -0xd000000, RZ ?trans1;
MUFU.RSQ R17, R2 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0x890 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x840 &req={0} ?trans5;
MOV R0, R2 ?trans1;
MOV R21, 0x830 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xed0 &req={1} ?trans5;
BRA 0x880 ?trans5;
FMUL.FTZ R3, R17.reuse, R2 &req={1} ?trans1;
FMUL.FTZ R16, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R0, R0, R16, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL R3, R19, R0 ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R3 &rd=0x0 ?trans4;
LDG.E R19, desc[UR8][R6.64+0x4] &wr=0x2 ?trans4;
LDG.E R0, desc[UR8][R8.64+0x4] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B1, 0x9d0 ?trans1;
FFMA R21, -R19, R19, 1 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R2, R21 &wr=0x1 ?trans1;
FADD R0, R0, -2 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R21 &wr=0x2 ?trans1;
FFMA R17, -R21, R2, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R17, R2, R17, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R17, RZ ?WAIT4_END_GROUP;
FFMA R16, -R21, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R17, R16, R2 ?trans1;
@!P0 BRA 0x9c0 &req={2,0} ?trans6;
MOV R3, R21 ?trans1;
MOV R2, 0x9b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1040 ?trans5;
MOV R2, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R0, PT, PT, R2, -0xd000000, RZ ?trans1;
MUFU.RSQ R17, R2 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0xab0 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa60 &req={0} ?trans5;
MOV R0, R2 ?trans1;
MOV R21, 0xa50 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xed0 &req={1} ?trans5;
BRA 0xaa0 ?trans5;
FMUL.FTZ R3, R17.reuse, R2 &req={1} ?trans1;
FMUL.FTZ R16, R17, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R0, R0, R16, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
FMUL R19, R19, R0 ?trans1;
IADD.64 R10, R10, 0x4 ?trans2;
IADD.64 R8, R8, 0x10 ?trans2;
STG.E desc[UR8][R4.64+0x4], R19 &rd=0x0 ?trans1;
IADD.64 R6, R6, 0x10 ?trans2;
HFMA2 R19, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD.64 R4, R4, 0x10 ?WAIT4_END_GROUP;
IADD.64 R2, R10, -R18 ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P0, PT, R2, RZ, PT ?WAIT14_END_GROUP;
@P0 BRA 0x250 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.128 UR12, c[0x0][0x380] &wr=0x0 ?trans1;
IADD.64 R10, R10, UR4 ?trans2;
LDCU.64 UR4, c[0x0][0x398] &wr=0x1 ?trans2;
IADD.64 R10, R14, R10 ?WAIT3_END_GROUP;
IADD3 R12, P0, PT, RZ, -R12, RZ ?trans2;
SHF.L.U64.HI R9, R10.reuse, 0x2, R11 ?trans1;
IMAD.SHL.U32 R8, R10, 0x4, RZ ?trans1;
IADD3.X R13, PT, PT, RZ, -0x1, RZ, P0, !PT ?WAIT4_END_GROUP;
IADD.64 R4, R8.reuse, UR14 &req={0} ?trans2;
IADD.64 R6, R8.reuse, UR12 ?trans2;
IADD.64 R8, R8, UR4 &req={1} ?WAIT8_END_GROUP;
LDG.E R10, desc[UR8][R4.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR8][R6.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xd50 ?trans1;
FFMA R15, -R10, R10, 1 &req={2} ?WAIT4_END_GROUP;
MUFU.RCP R2, R15 &wr=0x0 ?trans1;
FADD R0, R0, -2 &req={3} ?WAIT4_END_GROUP;
FCHK P0, R0, R15 &wr=0x1 ?trans1;
FFMA R3, -R15, R2, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R2, R3, R2 ?WAIT4_END_GROUP;
FFMA R2, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R11, -R15, R2, R0 ?WAIT4_END_GROUP;
FFMA R2, R3, R11, R2 ?trans1;
@!P0 BRA 0xd40 &req={1} ?trans6;
MOV R3, R15 ?trans1;
MOV R2, 0xd30 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1040 ?trans5;
MOV R2, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R0, PT, PT, R2, -0xd000000, RZ ?trans1;
MUFU.RSQ R11, R2 &rd=0x0 &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0xe40 ?trans3;
ISETP.GT.U32.AND P0, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xdf0 &req={0} ?trans5;
MOV R0, R2 ?trans1;
MOV R21, 0xdd0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xed0 &req={1} ?trans5;
MOV R3, R0 ?trans1;
BRA 0xe30 ?trans6;
FMUL.FTZ R3, R11.reuse, R2 &req={1} ?trans1;
FMUL.FTZ R0, R11, 0.5 ?WAIT3_END_GROUP;
FFMA R2, -R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R3, R2, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R12, R12, 0x1 ?trans2;
FMUL R3, R10, R3 ?trans1;
IADD.64 R4, R4, 0x4 ?trans2;
IADD.64 R6, R6, 0x4 ?trans2;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?trans2;
STG.E desc[UR8][R8.64], R3 &rd=0x0 ?trans2;
IADD.64 R8, R8, 0x4 &req={0} ?WAIT10_END_GROUP;
@P0 BRA 0xc30 ?trans5;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x1000 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0x1000 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0x1000 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R2, R3 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R16, R3, R2 &req={0} ?trans1;
@P0 FMUL.FTZ R20, R2, 0.5 ?trans1;
@!P0 MOV R2, R0 ?trans2;
@P0 FADD.FTZ R17, -R16, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R17, R16, R17, R3 ?WAIT4_END_GROUP;
@P0 FFMA R17, R17, R20, R16 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R2, R17, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R0, R2 ?trans1;
MOV R2, R21 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
SHF.R.U32.HI R16, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B2, 0x1680 ?trans1;
SHF.R.U32.HI R20, RZ, 0x17, R0 ?trans2;
LOP3.LUT R16, R16, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R20, R20, 0xff, RZ, 0xc0, !PT ?trans2;
IADD3 R22, PT, PT, R16, -0x1, RZ ?trans2;
IADD3 R21, PT, PT, R20, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R21, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R17, RZ ?trans1;
@!P0 BRA 0x1260 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0x1660 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1640 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0x1640 ?trans5;
LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0x1620 ?trans5;
LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0x15f0 ?trans5;
ISETP.GE.AND P0, PT, R21, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R22, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R17, RZ ?trans1;
@!P0 MOV R17, 0xffffffc0 ?trans1;
@!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, 0x40, RZ ?WAIT7_END_GROUP;
LEA R22, R16, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0x15e0 ?trans1;
IADD3 R21, PT, PT, R20, -0x7f, RZ ?trans2;
IADD3 R24, PT, PT, -R22, R3, RZ ?WAIT3_END_GROUP;
IMAD R0, R21.reuse, -0x800000, R0 ?trans1;
MUFU.RCP R22, R24 &rd=0x0 &wr=0x1 ?trans1;
FADD.FTZ R23, -R24, -RZ ?trans1;
IADD3 R24, PT, PT, R21, 0x7f, -R16 &req={0} ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R24, R17, RZ ?trans1;
FFMA R3, R22, R23, 1 &req={1} ?WAIT4_END_GROUP;
FFMA R20, R22, R3, R22 ?WAIT4_END_GROUP;
FFMA R3, R0, R20, RZ ?WAIT4_END_GROUP;
FFMA R22, R23, R3, R0 ?WAIT4_END_GROUP;
FFMA R3, R20, R22, R3 ?WAIT4_END_GROUP;
FFMA R0, R23, R3, R0 ?WAIT4_END_GROUP;
FFMA R22, R20, R0, R3 ?WAIT5_END_GROUP;
SHF.R.U32.HI R16, RZ, 0x17, R22 ?WAIT4_END_GROUP;
LOP3.LUT R16, R16, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R16, PT, PT, R16, R17, RZ ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, R16, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R21, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x15c0 ?trans5;
ISETP.GT.AND P0, PT, R16, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1590 ?trans5;
ISETP.GE.AND P0, PT, R16, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x15d0 ?trans5;
ISETP.GE.AND P0, PT, R16, -0x18, PT ?trans1;
LOP3.LUT R22, R22, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x15d0 ?trans5;
FFMA.RZ R17, R20, R0.reuse, R3.reuse ?trans1;
IADD3 R24, PT, PT, R16, 0x20, RZ ?trans1;
FFMA.RP R21, R20.reuse, R0.reuse, R3.reuse ?trans1;
FFMA.RM R0, R20, R0, R3 ?trans1;
ISETP.NE.AND P1, PT, R16.reuse, RZ, PT ?trans1;
LOP3.LUT R17, R17, 0x7fffff, RZ, 0xc0, !PT ?trans1;
ISETP.NE.AND P2, PT, R16.reuse, RZ, PT ?trans1;
IADD3 R16, PT, PT, -R16, RZ, RZ ?trans2;
LOP3.LUT R17, R17, 0x800000, RZ, 0xfc, !PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, R21, R0, PT ?WAIT3_END_GROUP;
SHF.L.U32 R24, R17, R24, RZ ?trans1;
SEL R0, R16, RZ, P2 ?WAIT4_END_GROUP;
ISETP.NE.AND P1, PT, R24, RZ, P1 ?trans1;
SHF.R.U32.HI R0, RZ, R0, R17 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R16, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R16, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R16, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R22, R3, R22, RZ, 0xfc, !PT ?trans1;
BRA 0x15d0 ?trans6;
LOP3.LUT R22, R22, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R22, R22, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x15d0 ?trans6;
IMAD R22, R17, 0x800000, R22 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0x1670 ?trans5;
LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R22, R0, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1670 ?trans6;
LOP3.LUT R22, R3, 0x80000000, R0, 0x48, !PT ?trans1;
BRA 0x1670 ?trans6;
MUFU.RSQ R22, -QNAN &wr=0x0 ?trans1;
BRA 0x1670 ?trans5;
FADD.FTZ R22, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0x16a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpuSignif(float const*, float const*, unsigned long, float*)
_Z9gpuSignifPKfS0_mPf:
s_load_b256 s[0:7], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 7, v0
s_mov_b32 s8, s15
s_mov_b32 s9, 0
v_lshlrev_b32_e32 v0, 5, v0
s_lshl_b64 s[12:13], s[8:9], 11
s_lshl_b64 s[10:11], s[8:9], 9
v_add_co_u32 v6, s8, s12, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, null, s13, 0, s8
v_add_co_u32 v0, s8, s10, v0
v_add_co_ci_u32_e64 v1, null, s11, 0, s8
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v7, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v6
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, s0, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
s_mov_b64 s[2:3], 0
.LBB6_1:
s_or_b32 s1, s1, exec_lo
s_mov_b32 s6, exec_lo
v_cmpx_gt_u64_e64 s[4:5], v[0:1]
s_cbranch_execz .LBB6_3
v_add_co_u32 v8, vcc_lo, v6, s2
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v7, vcc_lo
v_add_co_u32 v10, vcc_lo, v4, s2
v_add_co_ci_u32_e32 v11, vcc_lo, s3, v5, vcc_lo
global_load_b32 v8, v[8:9], off
global_load_b32 v10, v[10:11], off
s_waitcnt vmcnt(1)
v_add_f32_e32 v8, -2.0, v8
s_waitcnt vmcnt(0)
v_fma_f32 v9, -v10, v10, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v11, null, v9, v9, v8
v_div_scale_f32 v14, vcc_lo, v8, v9, v8
v_rcp_f32_e32 v12, v11
s_waitcnt_depctr 0xfff
v_fma_f32 v13, -v11, v12, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v12, v13, v12
v_mul_f32_e32 v13, v14, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v15, -v11, v13, v14
v_fmac_f32_e32 v13, v15, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v11, -v11, v13, v14
v_div_fmas_f32 v11, v11, v12, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v8, v11, v9, v8
v_mul_f32_e32 v9, 0x4f800000, v8
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v11, v8, v9, vcc_lo
v_sqrt_f32_e32 v8, v11
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v9, -1, v8
v_add_nc_u32_e32 v12, 1, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v13, -v9, v8, v11
v_fma_f32 v14, -v12, v8, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, 0, v13
v_cndmask_b32_e64 v8, v8, v9, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_f32_e64 s0, 0, v14
v_cndmask_b32_e64 v8, v8, v12, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v9, 0x37800000, v8
v_cndmask_b32_e32 v12, v8, v9, vcc_lo
v_add_co_u32 v8, vcc_lo, v2, s2
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v3, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v11, 0x260
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
s_cmp_eq_u64 s[2:3], 0x80
v_cndmask_b32_e32 v11, v12, v11, vcc_lo
v_add_co_u32 v0, vcc_lo, v0, 1
s_cselect_b32 s0, -1, 0
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
v_mul_f32_e32 v10, v10, v11
s_and_not1_b32 s1, s1, exec_lo
s_and_b32 s0, s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s1, s1, s0
global_store_b32 v[8:9], v10, off
.LBB6_3:
s_or_b32 exec_lo, exec_lo, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, exec_lo, s1
s_or_b32 s9, s0, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB6_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpuSignif | 8,251 | 2,055 | stackv2-00001-of-00015 |
// Demangled: noNAsPmccMeans(int, int, float*, float*)
Function : _Z14noNAsPmccMeansiiPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x384] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?trans2;
IMAD R0, R3, UR5, RZ &req={3} ?trans1;
MOV R3, UR5 ?trans2;
ISETP.GE.AND P0, PT, R2, UR6, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R11, SR_TID.Y &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x1d0 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R11, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1c0 &req={1} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
MOV R9, R11 ?WAIT7_END_GROUP;
IMAD R5, R2, UR4, R9 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R3, R9, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR4, PT ?trans1;
FADD R8, R5, R8 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0x150 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P1, PT, R3, 0x2, PT ?trans1;
IADD3 R4, PT, PT, R0, R11, RZ ?trans1;
ISETP.NE.AND P0, PT, R11, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R5, R4, UR4, 0x2 ?WAIT5_END_GROUP;
STS [R5], R8 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x320 ?trans5;
SHF.R.U32.HI R8, RZ, 0x1, R3 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R11, R8, PT ?WAIT13_END_GROUP;
@!P1 IMAD R4, R8, 0x4, R5 ?trans1;
@!P1 LDS R7, [R5] ?trans5;
@!P1 LDS R4, [R4] &wr=0x0 ?trans2;
@!P1 FADD R6, R4, R7 &req={0} ?WAIT5_END_GROUP;
@!P1 STS [R5], R6 &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x3, PT ?trans1;
MOV R3, R8 ?WAIT12_END_GROUP;
@P1 BRA 0x270 &req={1} ?trans5;
@P0 EXIT ?trans5;
LEA R0, R0, UR4, 0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x430 ?trans4;
LDS R0, [R0] &wr=0x2 ?trans1;
I2FP.F32.S32 R3, UR5 &req={1} ?WAIT4_END_GROUP;
MUFU.RCP R4, R3 &wr=0x1 ?trans2;
FFMA R5, -R3, R4, 1 &req={1,0} ?WAIT4_END_GROUP;
FFMA R5, R4, R5, R4 ?trans1;
FCHK P0, R0, R3 &req={2} &wr=0x0 ?trans3;
FFMA R4, R0, R5, RZ ?WAIT4_END_GROUP;
FFMA R6, -R3, R4, R0 ?WAIT4_END_GROUP;
FFMA R7, R5, R6, R4 ?trans1;
@!P0 BRA 0x420 &req={0} ?trans6;
MOV R4, 0x420 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x470 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans2;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R7 ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R6, RZ, 0x17, R3 ?trans1;
BSSY.RECONVERGENT B1, 0xad0 ?trans1;
SHF.R.U32.HI R5, RZ, 0x17, R0 ?trans2;
LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R7, R0 ?trans1;
IADD3 R11, PT, PT, R6, -0x1, RZ ?trans1;
MOV R8, R3 ?trans1;
IADD3 R10, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R9, RZ ?trans1;
@!P0 BRA 0x6b0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xab0 ?trans5;
LOP3.LUT P0, RZ, R8, 0x7fffffff, R7, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa90 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0xa90 ?trans5;
LOP3.LUT P2, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xa70 ?trans5;
LOP3.LUT P1, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xa40 ?trans5;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R11, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R9, RZ ?trans1;
@!P0 MOV R9, 0xffffffc0 ?trans1;
@!P0 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R8, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R6, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B2, 0xa30 ?trans1;
IADD3 R5, PT, PT, R5, -0x7f, RZ ?trans2;
IADD3 R3, PT, PT, -R3, R8, RZ ?WAIT3_END_GROUP;
IMAD R0, R5.reuse, -0x800000, R7 ?trans1;
IADD3 R6, PT, PT, R5, 0x7f, -R6 ?trans1;
MUFU.RCP R8, R3 &wr=0x0 ?trans1;
FADD.FTZ R11, -R3, -RZ ?trans2;
IADD3 R6, PT, PT, R6, R9, RZ ?trans2;
FFMA R13, R8, R11, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R10, R8, R13, R8 ?WAIT4_END_GROUP;
FFMA R7, R0, R10, RZ ?WAIT4_END_GROUP;
FFMA R8, R11, R7, R0 ?WAIT4_END_GROUP;
FFMA R13, R10, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R11, R13, R0 ?WAIT4_END_GROUP;
FFMA R7, R10, R8, R13 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R7 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R9, PT, PT, R0, R6, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa10 ?trans5;
ISETP.GT.AND P0, PT, R9, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0x9e0 ?trans5;
ISETP.GE.AND P0, PT, R9, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xa20 ?trans5;
ISETP.GE.AND P0, PT, R9, -0x18, PT ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xa20 ?trans5;
FFMA.RZ R0, R10.reuse, R8.reuse, R13.reuse ?trans1;
IADD3 R6, PT, PT, R9.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R10, R8, R13 ?trans1;
ISETP.NE.AND P1, PT, R9.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R10, R8, R13 ?trans1;
IADD3 R8, PT, PT, -R9, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R3, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R3, RZ ?WAIT4_END_GROUP;
LOP3.LUT R7, R6, R7, RZ, 0xfc, !PT ?trans1;
BRA 0xa20 ?trans6;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xa20 ?trans6;
IMAD R7, R6, 0x800000, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0xac0 ?trans5;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R7, R7, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xac0 ?trans6;
LOP3.LUT R7, R8, 0x80000000, R7, 0x48, !PT ?trans1;
BRA 0xac0 ?trans6;
MUFU.RSQ R7, -QNAN &wr=0x0 ?trans1;
BRA 0xac0 ?trans5;
FADD.FTZ R7, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0xaf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: noNAsPmccMeans(int, int, float*, float*)
_Z14noNAsPmccMeansiiPfS_:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x0
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s6, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s5, v1
s_cbranch_execz .LBB8_12
s_load_b128 s[0:3], s[0:1], 0x8
v_bfe_u32 v0, v0, 10, 10
v_mov_b32_e32 v4, 0
s_lshr_b32 s5, s6, 16
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB8_5
v_mul_lo_u32 v2, v1, s4
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, v0
s_mov_b32 s7, 0
.LBB8_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v2, v5
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s0, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_dual_add_f32 v4, v4, v6 :: v_dual_add_nc_u32 v5, s5, v5
v_cmp_le_i32_e32 vcc_lo, s4, v5
s_or_b32 s7, vcc_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB8_3
s_or_b32 exec_lo, exec_lo, s7
.LBB8_5:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s6
v_mul_u32_u24_e32 v2, s5, v3
s_cmp_lt_u32 s5, 2
v_add_lshl_u32 v3, v2, v0, 2
ds_store_b32 v3, v4
s_waitcnt lgkmcnt(0)
s_barrier
.LBB8_6:
buffer_gl0_inv
s_cbranch_scc1 .LBB8_10
s_lshr_b32 s0, s5, 1
s_mov_b32 s1, exec_lo
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB8_9
v_lshl_add_u32 v4, s0, 2, v3
ds_load_b32 v4, v4
ds_load_b32 v5, v3
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v4, v4, v5
ds_store_b32 v3, v4
.LBB8_9:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
s_barrier
s_cmp_lt_u32 s5, 4
s_mov_b32 s5, s0
s_branch .LBB8_6
.LBB8_10:
v_cmp_eq_u32_e32 vcc_lo, 0, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB8_12
v_lshlrev_b32_e32 v0, 2, v2
v_cvt_f32_i32_e32 v4, s4
ds_load_b32 v3, v0
s_waitcnt lgkmcnt(0)
v_div_scale_f32 v0, null, v4, v4, v3
v_div_scale_f32 v6, vcc_lo, v3, v4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v0
s_waitcnt_depctr 0xfff
v_fma_f32 v2, -v0, v5, 1.0
v_fmac_f32_e32 v5, v2, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v6, v5
v_fma_f32 v2, -v0, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v7, v2, v5
v_ashrrev_i32_e32 v2, 31, v1
v_fma_f32 v6, -v0, v7, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_div_fmas_f32 v2, v6, v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_div_fixup_f32 v2, v2, v4, v3
global_store_b32 v[0:1], v2, off
.LBB8_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| noNAsPmccMeans | 4,085 | 1,778 | stackv2-00001-of-00015 |
// Demangled: initializeDevice(float*, unsigned int)
Function : _Z16initializeDevicePfj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans2;
FMUL R5, R0, 0.89999997615814208984 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initializeDevice(float*, unsigned int)
_Z16initializeDevicePfj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB3_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, 0x3f666666, v2
global_store_b32 v[0:1], v2, off
.LBB3_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initializeDevice | 442 | 444 | stackv2-00001-of-00015 |
// Demangled: loop(float*, unsigned int, unsigned int)
Function : _Z4loopPfjj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x38c] &wr=0x1 ?trans2;
ISETP.NE.AND P0, PT, R0, RZ, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x10, PT ?trans1;
LOP3.LUT R20, R0, 0xf, RZ, 0xc0, !PT ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
UMOV.64 UR4, URZ ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans3;
ISETP.NE.S64.AND P0, PT, R20, RZ, PT ?WAIT6_END_GROUP;
@!P1 BRA 0x990 ?trans8;
LDCU.64 UR4, c[0x0][0x380] &wr=0x1 ?trans1;
LOP3.LUT R4, R0, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x20, URZ &req={1} ?WAIT6_END_GROUP;
MOV.64 R2, UR4 ?trans2;
UMOV.64 UR4, URZ ?WAIT6_END_GROUP;
LDG.E R32, desc[UR8][R2.64+-0x20] &req={0} &wr=0x2 ?trans4;
LDG.E R34, desc[UR8][R2.64+-0x1c] &wr=0x3 ?trans4;
LDG.E R5, desc[UR8][R2.64+0x10] &wr=0x4 ?trans4;
LDG.E R10, desc[UR8][R2.64+-0x18] &wr=0x5 ?trans4;
LDG.E R16, desc[UR8][R2.64+-0x14] &wr=0x2 ?trans4;
LDG.E R18, desc[UR8][R2.64+-0x10] &wr=0x2 ?trans4;
LDG.E R17, desc[UR8][R2.64+-0xc] &wr=0x2 ?trans4;
LDG.E R9, desc[UR8][R2.64+-0x8] &wr=0x2 ?trans4;
LDG.E R12, desc[UR8][R2.64+-0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR8][R2.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR8][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R13, desc[UR8][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R11, desc[UR8][R2.64+0xc] &wr=0x2 ?trans4;
LDG.E R8, desc[UR8][R2.64+0x14] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+0x18] &wr=0x2 ?trans4;
LDG.E R6, desc[UR8][R2.64+0x1c] &wr=0x2 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x1, URZ ?WAIT9_END_GROUP;
I2F.U64 R33, UR6 &wr=0x3 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x2, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R19, UR6 &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x3, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R23, UR6 &wr=0x2 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x4, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R25, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x5, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R22, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x6, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R24, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x7, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R27, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x8, URZ ?trans1;
FADD R33, R33, R34 &req={3} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R26, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x9, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R29, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0xa, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R28, UR6 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0xb, URZ ?trans1;
FADD R19, R19, R10 &req={5} ?trans1;
FADD R23, R23, R16 &req={2} ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R31, UR4 &wr=0x0 ?trans2;
FADD R35, R31, R32 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+-0x20], R35 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R30, UR6 &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0xc, URZ ?trans1;
FADD R25, R25, R18 ?trans1;
FADD R17, R22, R17 ?trans1;
FADD R9, R24, R9 ?trans1;
FADD R27, R27, R12 ?trans1;
FADD R15, R26, R15 ?trans1;
FADD R29, R29, R14 ?trans1;
FADD R13, R28, R13 ?trans1;
STG.E desc[UR8][R2.64+-0x1c], R33 ?trans1;
FADD R11, R30, R11 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R32, UR6 &wr=0x4 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0xd, URZ ?trans1;
FADD R5, R32, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+0x10], R5 &rd=0x0 ?trans2;
HFMA2 R5, -RZ, RZ, 0, 0 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R31, UR6 &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0xe, URZ ?trans1;
STG.E desc[UR8][R2.64+-0x18], R19 ?trans4;
STG.E desc[UR8][R2.64+-0x14], R23 ?trans4;
STG.E desc[UR8][R2.64+-0x10], R25 ?trans1;
FADD R31, R31, R8 &req={0} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64+-0xc], R17 ?trans4;
STG.E desc[UR8][R2.64+-0x8], R9 ?trans4;
STG.E desc[UR8][R2.64+-0x4], R27 ?trans4;
STG.E desc[UR8][R2.64], R15 ?trans4;
STG.E desc[UR8][R2.64+0x4], R29 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R34, UR6 &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0xf, URZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P1, PT, R4, UR4, PT ?trans2;
STG.E desc[UR8][R2.64+0x8], R13 ?trans1;
FADD R7, R34, R7 &req={0} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64+0xc], R11 ?trans4;
STG.E desc[UR8][R2.64+0x14], R31 ?trans4;
STG.E desc[UR8][R2.64+0x18], R7 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R35, UR6 &wr=0x0 ?trans2;
FADD R35, R35, R6 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+0x1c], R35 &rd=0x0 ?trans2;
IADD.64 R2, R2, 0x40 &req={0} ?trans2;
@P1 BRA 0x100 ?trans6;
@!P0 EXIT &req={0} ?trans5;
ISETP.GE.U64.AND P0, PT, R20, 0x8, PT ?trans2;
MOV R15, RZ ?trans1;
LOP3.LUT R14, R0, 0x7, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P1, PT, R14, RZ, PT ?WAIT6_END_GROUP;
@!P0 BRA 0xe40 ?trans8;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans2;
ULEA UR6, UP0, UR4, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR7, UR5, 0x2, UP0 ?trans2;
MOV R2, UR6 ?WAIT4_END_GROUP;
MOV R3, UR7 ?WAIT5_END_GROUP;
LDG.E R5, desc[UR8][R2.64] &wr=0x2 ?trans4;
LDG.E R7, desc[UR8][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R9, desc[UR8][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R11, desc[UR8][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R13, desc[UR8][R2.64+0x10] &wr=0x5 ?trans4;
LDG.E R17, desc[UR8][R2.64+0x14] &wr=0x5 ?trans4;
LDG.E R19, desc[UR8][R2.64+0x18] &wr=0x5 ?trans4;
LDG.E R21, desc[UR8][R2.64+0x1c] &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x1, URZ ?WAIT2_END_GROUP;
I2F.U64 R4, UR4 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R6, UR6 &wr=0x3 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x2, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R8, UR6 &wr=0x4 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x3, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R10, UR6 &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x4, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R12, UR6 &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x5, URZ ?trans1;
FADD R5, R4, R5 &req={2} ?trans1;
FADD R7, R6, R7 &req={3} ?WAIT4_END_GROUP;
STG.E desc[UR8][R2.64], R5 &rd=0x1 ?trans1;
FADD R9, R8, R9 &req={4} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64+0x4], R7 &rd=0x1 ?trans1;
FADD R11, R10, R11 &req={5} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64+0x8], R9 &rd=0x1 ?trans1;
FADD R13, R12, R13 &req={0} ?WAIT3_END_GROUP;
STG.E desc[UR8][R2.64+0xc], R11 &rd=0x1 ?trans4;
STG.E desc[UR8][R2.64+0x10], R13 &rd=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R16, UR6 &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x6, URZ ?trans1;
FADD R17, R16, R17 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+0x14], R17 &rd=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R18, UR6 &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x7, URZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
FADD R19, R18, R19 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+0x18], R19 &rd=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R20, UR6 &wr=0x0 ?trans2;
FADD R21, R20, R21 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64+0x1c], R21 &rd=0x1 ?trans2;
@!P1 EXIT ?trans5;
ISETP.GE.U64.AND P0, PT, R14, 0x4, PT ?trans2;
HFMA2 R3, -RZ, RZ, 0, 0 &req={1} ?trans1;
LOP3.LUT R2, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P1, PT, R2, RZ, PT ?WAIT6_END_GROUP;
@!P0 BRA 0x10f0 ?trans8;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans2;
ULEA UR6, UP0, UR4, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR7, UR5, 0x2, UP0 ?trans2;
MOV R4, UR6 ?WAIT4_END_GROUP;
MOV R5, UR7 ?WAIT5_END_GROUP;
LDG.E R0, desc[UR8][R4.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR8][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R8, desc[UR8][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R10, desc[UR8][R4.64+0xc] &wr=0x5 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x1, URZ ?WAIT2_END_GROUP;
I2F.U64 R7, UR4 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R9, UR6 &wr=0x3 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x2, URZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R11, UR6 &wr=0x4 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR4, 0x3, URZ ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x4, URZ ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.U64 R13, UR6 &wr=0x5 ?trans1;
FADD R7, R7, R0 &req={2} ?trans1;
FADD R9, R9, R6 &req={3} ?WAIT4_END_GROUP;
STG.E desc[UR8][R4.64], R7 &rd=0x0 ?trans1;
FADD R11, R11, R8 &req={4} ?WAIT3_END_GROUP;
STG.E desc[UR8][R4.64+0x4], R9 &rd=0x0 ?trans1;
FADD R13, R13, R10 &req={5} ?WAIT3_END_GROUP;
STG.E desc[UR8][R4.64+0x8], R11 &rd=0x0 ?trans4;
STG.E desc[UR8][R4.64+0xc], R13 &rd=0x0 ?trans2;
@!P1 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x380] &wr=0x1 ?trans2;
ULEA UR6, UP0, UR4, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
ULEA.HI.X UR7, UR4, UR7, UR5, 0x2, UP0 ?WAIT6_END_GROUP;
MOV.64 R4, UR6 &req={0} ?WAIT8_END_GROUP;
LDG.E R0, desc[UR8][R4.64] &wr=0x2 ?trans1;
I2F.U64 R7, UR4 &wr=0x2 ?trans1;
IADD.64 R2, R2, -0x1 ?trans2;
UIADD3.64 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT4_END_GROUP;
ISETP.NE.S64.AND P0, PT, R2, RZ, PT ?trans2;
FADD R7, R7, R0 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R7 &rd=0x0 ?trans2;
IADD.64 R4, R4, 0x4 &req={0} ?WAIT5_END_GROUP;
@P0 BRA 0x1140 ?trans5;
EXIT ?trans5;
BRA 0x11e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: loop(float*, unsigned int, unsigned int)
_Z4loopPfjj:
s_load_b32 s2, s[0:1], 0xc
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB4_3
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_mov_b64 s[4:5], 0
.LBB4_2:
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_clz_i32_u32 s6, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_min_u32 s8, s6, 32
s_lshl_b64 s[6:7], s[4:5], s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_min_u32 s6, s6, 1
s_or_b32 s6, s7, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v2, s6
s_sub_i32 s6, 32, s8
s_add_u32 s4, s4, 1
s_addc_u32 s5, s5, 0
v_ldexp_f32 v2, v2, s6
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v1, v1, v2
global_store_b32 v0, v1, s[0:1]
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_lg_u64 s[2:3], s[4:5]
s_cbranch_scc1 .LBB4_2
.LBB4_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| loop | 5,768 | 557 | stackv2-00001-of-00015 |
// Demangled: nop()
Function : _Z3nopv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: nop()
_Z3nopv:
s_endpgm
| nop | 91 | 11 | stackv2-00001-of-00015 |
// Demangled: trivialLoop()
Function : _Z11trivialLoopv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: trivialLoop()
_Z11trivialLoopv:
s_endpgm
| trivialLoop | 94 | 14 | stackv2-00001-of-00015 |
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