text stringlengths 0 1.99k |
|---|
http://developer.amd.com/wordpress/media/2013/02/ |
livevirtualmachinemigrationonamdprocessors.pdf |
[5] A Performance Evaluation of Platform-Independent Methods to Search for |
Hidden Instructions on RISC Processors. |
[6] Breaking the x86 ISA. BlackHat, USA, 2017. |
[7] Uisfuzz: An efficient fuzzing method for CPU undocumented instruction |
searching. |
[8] Uncovering Hidden Instructions in Armv8-A Implementations. |
[9] VIA C3 Nehemiah Datasheet, 2004. |
http://datasheets.chipdb.org/VIA/Samuel2/VIA%20C3%20Samuel%202%20 |
Datasheet%20V1.12.pdf |
[10] Christopher Domas. Hardware backdoors in x86 CPUs. Black Hat, 2018. |
[11] Apparatus and method for limiting access to model specific registers |
in a microprocessor, December 25 2012. US Patent 8,341,419. |
[12] Microprocessor that performs X86 ISA and arm ISA machine language |
program instructions by hardware translation into microinstructions |
executed by common execution pipeline, November 4 2014. US Patent |
8,880,851. |
[13] Microprocessor with boot indicator that indicates a boot ISA of the |
microprocessor as either the X86 ISA or the ARM ISA, April 19 2016. |
US Patent 9,317,301. |
[14] Microprocessor that enables ARM ISA program to access 64-bit general |
purpose registers written by x86 ISA program, March 22 2016. US |
Patent 9,292,470. |
[15] 'Super-secret' debugger discovered in AMD CPUs |
ERROR: type should be string, got " https://www.theregister.com/2010/11/15/amd_secret_debugger/" |
[16] AMD Undocumented Machine-Specific Registers |
http://cbid.softnology.biz/html/undocmsrs.html |
[17] https://sourceware.org/glibc/wiki/GNU_IFUNC |
[18] Designing and implementing malicious hardware |
[19] https://openpower.foundation/specifications/isa/ |
[20] Alexander Krog and Alexander Skovsende. Backdoor in the Core - |
Altering the Intel x86 Instruction Set at Runtime. Defcon 31, 2023 |
[21] RISC86 INSTRUCTION SET. US Patent US5926642, 1999 |
[22] AMD-K6 Processor Technical Brief |
ERROR: type should be string, got " https://www.ardent-tool.com/CPU/docs/AMD/K6/k6_techb.pdf" |
[23] IntelTXE-PoC. https://github.com/ptresearch/IntelTXE-PoC |
[24] https://www.intel.com/content/www/us/en/security-center/advisory/ |
intel-sa-00086.html |
[25] uCodeDisam. https://github.com/chip-red-pill/uCodeDisasm |
[26] udbgInstr https://github.com/chip-red-pill/udbgInstr |
[27] lib-micro. https://libmicro.dev |
[28] https://kakaroto.ca/2019/11/exploiting-intels-management-engine-part-1 |
-understanding-pts-txe-poc/ |
[29] EFFICIENT RANGE - BASED MEMORY WRITEBACK TO IMPROVE HOST TO DEVICE |
COMMUNICATION FOR OPTIMAL POWER AND PERFORMANCE. US Patent |
US 10,552,153 B2. 2020 |
[30] Ermolov, M., Sklyarov, D. & Goryachy, M. Undocumented x86 instructions |
to control the CPU at the microarchitecture level in modern Intel |
processors. J Comput Virol Hack Tech 19. 2023 |
[31] CONTROL REGISTER BUS ACCESS THROUGH A STANDARDIZED TEST ACCESS PORT. |
US Patent US006055656A. 2000 |
[32] Intel LDAT notes. https://pbx.sh/ldat/ |
[33] crbus_scripts. https://github.com/chip-red-pill/crbus_scripts |
[34] Live Migration With AMD-V Extended Migration Technology. |
ERROR: type should be string, got " https://kipdf.com/live-migration-with-amd-v-extended-migration-" |
technology_5acde91c7f8b9a7f9b8b45f1.html |
--[ 8. Appendix: Code |
Due to the large size of the OpenSPARCT1 and QEMU projects, only the |
portion of code containing the backdoor implementation is included in the |
code.tar.gz file. For the full projects, please visit the following links: |
https://www.oracle.com/servers/technologies/opensparc-t1-page.html |
https://github.com/qemu/QEMU |
I’ve uploaded microcode-related projects to GitHub: |
https://github.com/whensungoesdown/lib-micro |
https://github.com/whensungoesdown/coreboot |
begin 664 code.tar.gz |
M'XL(`````````^P\:W?:2I+WLW]%W\RY64@P!OS*&#N[!(/##K8)X#QN)J,C |
MI`:T$9*N)/S8B>>W;U4_I-8+<!Z^NV>C<X)1=W5UO;JZNKJ(X9ITYY<?^]3@ |
M.3S<Q[_UP_V:^E<^O]3W&ON-W7KC@+4?-@[V?B'[/Y@N]BR#4/<)^66Y#NXQ |
MB'G\QT#]_T$7R^V#:J-:V_:-W>]N#AOKO[&_O[=W\$NM7M\];/S4_V,\>?H' |
M@<QH^/W,X$'Z/T3]-PX.=G_J_S&>%?H//-TWOH<5/%S_NX>'/_7_*,]:_5M. |
M>+"GS:GM4;]J?-4<J.`#V-#S]=]H[.[64_H_V-L#_=>^,Z^YS_]S_>\\VR+/ |
MR`A5?;!'0-G4]Y=>2+C"`^C$?M)VO3O?FLU#4C+*I%&K[6[#QS[IZA/?,BAY |
M16U;]TT!/IY;`;&MB:_[=P2^3GU*2>!.PQO=ITURYRZ)H3O$IZ85A+XU68:4 |
M6"'1'7/']1'!PC6MZ1VV+1V3^B2<4P*4+0+B3MG+V<45Z=,@@+XSZE!?M\E@ |
M.;$M`T?W@2(GH$0/B(>-P9R:9'+'!G:1E)$@A71=P*^'ENLT";6@G\U^#8Q# |
M$VE4ZW(^@;)"7)^4]!!9\(GKX<@RT'U';!WHDR.K!7*(V35!U`SQW/6`M3F@ |
M!&9O+-LF$TJ6`9TN[0JB`&#RKC=^?7DU)JV+#^1=:SAL78P_-`$XG+O02Z\I |
M1V4M/-L"S,"9KSOA'=".&,X[P_9K&-)ZU>OWQA^0@VYO?-$9C4CW<DA:9-`: |
MCGOMJWYK2`97P\'EJ%,E9$2I%#03:9ZL(T%/`>?"!7F:--0M.Y#\?P!%!T"D |
M;9*Y?DU!X0:UKH%$G1A@4`]3INTZ,\8TC(G%VB36E#AN6"$!4'P\#T/O:&?G |
MYN:F.G.65=>?[=@<0;#S$LG:V=KZB^48]M*DY`GZO1TW,*E7G3])MR]TR]FV |
M73?59WC+9`.]I<8.7R[;GN^&;DZW[<Z2K:&O&Q2;MOYBTJGE4'+:>75UI@W: |
MK7X?29Q"<Z(-W%0((C=<)PB),0>?]4R\T%O#TQQ]08./M=L7M4_DA/QSB\#S |
M<3S6QMW657^,;4]Z`.PO#;19TC(,$#@LWZ4=/JG$T.>]T:@(^/S\BIQ;0:#` |
MMR]/.UJKW>X4C^KXONLK0WK]OM:[&%UP>-NF,U"W,DX!'0Q[;V/8@6]=6P`. |
MYI,/?M$=7,7@\$).K4"?V-14@+H#K?.^/8A`.K<&]5*(QI=ONPQ@K,_():SI |
MJ>W>J%SWA^]Z?):V3<&1O;,<T[U1!7,*E/_>&5XRH%,@G#F45W?D=^J[*ERL |
MGE,]U(OT<AKI187*4<AI:]Q2%:*"IS5Q.AA>*E,/P'8I5UT:\NJBU>^=771. |
M&?25H]O6S`$]G%-8]7<"?UIQK?8XK;=66F6=]^/>Q9A\(;7;.@/NW((;=9A% |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.