text stringlengths 0 1.99k |
|---|
15: 1 0x141e 0x7c96 |
16: 1 0x24bc 0x7c8a |
17: 1 0x623a 0x7d16 |
18: 0 0x0000 0x0000 |
19: 0 0x0000 0x0000 |
20: 0 0x0000 0x0000 |
21: 0 0x0000 0x0000 |
22: 0 0x0000 0x0000 |
23: 0 0x0000 0x0000 |
24: 0 0x0000 0x0000 |
25: 0 0x0000 0x0000 |
26: 0 0x0000 0x0000 |
27: 0 0x0000 0x0000 |
28: 0 0x0000 0x0000 |
29: 0 0x0000 0x0000 |
30: 1 0x3de8 0x7dc8 |
31: 1 0x58ba 0x017a |
--[ 4. Miscellaneous |
----[ 4.1 x86 SSE/AVX Instruction Set |
When examining the strcmp() function on Linux x86_64 systems, we find it |
uses __strcmp_avx2(), a version optimized with AVX2 instructions, as seen |
in the disassembly output below. |
(gdb) disassemble |
Dump of assembler code for function __strcmp_avx2: |
=> 0x00007ffff7f30ae0 <+0>: endbr64 |
0x00007ffff7f30ae4 <+4>: mov %edi,%eax |
0x00007ffff7f30ae6 <+6>: xor %edx,%edx |
0x00007ffff7f30ae8 <+8>: vpxor %ymm7,%ymm7,%ymm7 |
0x00007ffff7f30aec <+12>: or %esi,%eax |
0x00007ffff7f30aee <+14>: and $0xfff,%eax |
0x00007ffff7f30af3 <+19>: cmp $0xf80,%eax |
0x00007ffff7f30af8 <+24>: jg 0x7ffff7f30e50 <__strcmp_avx2+880> |
0x00007ffff7f30afe <+30>: vmovdqu (%rdi),%ymm1 |
0x00007ffff7f30b02 <+34>: vpcmpeqb (%rsi),%ymm1,%ymm0 |
0x00007ffff7f30b06 <+38>: vpminub %ymm1,%ymm0,%ymm0 |
0x00007ffff7f30b0a <+42>: vpcmpeqb %ymm7,%ymm0,%ymm0 |
0x00007ffff7f30b0e <+46>: vpmovmskb %ymm0,%ecx |
0x00007ffff7f30b12 <+50>: test %ecx,%ecx |
0x00007ffff7f30b14 <+52>: je 0x7ffff7f30b90 <__strcmp_avx2+176> |
... |
AVX (Advanced Vector Extensions) is a feature in modern Intel and AMD |
processors that speeds up computations by processing multiple data elements |
at once. It uses special 256-bit registers (YMM) to perform SIMD (Single |
Instruction, Multiple Data) operations, making tasks like multimedia |
processing and scientific calculations much faster. |
In the GNU C Library (glibc), functions like strcmp() have multiple |
optimized variants, each designed to take advantage of specific CPU |
instruction sets, as illustrated in the code snippet below: |
/* Support sysdeps/x86_64/multiarch/strcmp.c. */ |
IFUNC_IMPL (i, name, strcmp, |
IFUNC_IMPL_ADD (array, i, strcmp, |
HAS_ARCH_FEATURE (AVX2_Usable), |
__strcmp_avx2) |
IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSE4_2), |
__strcmp_sse42) |
IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSSE3), |
__strcmp_ssse3) |
IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_sse2_unaligned) |
IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_sse2)) |
This mechanism, called IFUNC (Indirect Function) [17], is a GNU toolchain |
feature that allows multiple function implementations to be selected at |
runtime via a resolver. The dynamic loader invokes this resolver during |
startup to choose the optimal version (e.g., AVX2), which then remains |
fixed for the process's lifetime. |
String comparison using AVX2 is performed through vectorized operations |
where two 256-bit ymm registers are compared using VPCMPEQ. As each ymm |
register holds 32 bytes (VEC_SIZE), this allows comparing 32-byte string |
chunks in a single operation. For example: |
vmovdqu (%rdi),%ymm1 |
vpcmpeqb (%rsi),%ymm1,%ymm0 |
The vmovdqu instruction loads 32 bytes from the memory address in RDI into |
YMM1. The vpcmpeqb instruction then compares these 32 bytes against the |
contents at RSI's memory address, storing the comparison result in YMM0. |
Each byte position in YMM0 is set to 0xFF (all 1s) for matching bytes or |
0x00 (all 0s) for mismatches. |
The string comparison is performed using vpcmpeqb rather than traditional |
CMPS instructions. From the backdoor's perspective, this approach is more |
advantageous because these extended instruction sets are specialized and |
less frequently used than basic x86 instructions. Additionally, vpcmpeqb |
can compare significantly more bytes in a single operation, making it |
easier to identify the target hash string while minimizing the risk of |
accidental triggers. Note, complex instruction like vpcmpeqb are typically |
implemented through microcode. |
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