id stringlengths 22 129 | text stringlengths 60 19.5k | arch stringclasses 9
values | syntax stringclasses 5
values | kind stringclasses 4
values | repo stringclasses 32
values | path stringlengths 7 108 | license stringclasses 10
values | commit stringlengths 40 40 | source_host stringclasses 1
value | category stringclasses 15
values | source_url stringlengths 85 192 | line_start int64 1 5.48k | line_end int64 4 5.5k |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
zephyrproject-rtos/zephyr:soc/espressif/esp32c5/start_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .text.vectors
.global reset_vector
reset_vector:
la t0, _vector_table
csrw mtvec, t0
j __start
__start:
/* setup the stack pointer */
la sp, __stack_top
/* Clear BSS se... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c5/start_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c5/start_lpcore.S | 1 | 32 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c5/vector_table_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .init.vector,"ax"
.global _vector_table
.type _vector_table, @function
_vector_table:
.option push
.option norvc
/*
* Entry 0: LP core boots from 0x50000000 (first entry of vector tab... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c5/vector_table_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c5/vector_table_lpcore.S | 1 | 28 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c5/vectors.S:1 | /* Copyright 2026 Espressif Systems (Shanghai) PTE LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/soc.h"
#include "soc/interrupt_reg.h"
#include "riscv/rvruntime-frames.h"
#include "soc/soc_caps.h"
#include <zephyr/toolchain.h>
/* Imports */
GTEXT(_isr_wrapper)
/*
* CLIC non-vectored exception entr... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c5/vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c5/vectors.S | 1 | 44 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c5/vectors_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "riscv/rvruntime-frames.h"
#include <soc/soc_caps.h>
.equ SAVE_REGS, 32
.equ CONTEXT_SIZE, (SAVE_REGS * 4)
.macro save_general_regs cxt_size=CONTEXT_SIZE
addi sp, sp, -\cxt_size
sw ra, ... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/espressif/esp32c5/vectors_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c5/vectors_lpcore.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c5/vectors_lpcore.S:2 | sw t4, RV_STK_T4(sp)
sw t5, RV_STK_T5(sp)
sw t6, RV_STK_T6(sp)
.endm
.macro save_mepc
csrr t0, mepc
sw t0, RV_STK_MEPC(sp)
.endm
.macro restore_general_regs cxt_size=CONTEXT_SIZE
lw ra, RV_STK_RA(sp)
lw tp, RV_STK_TP(sp)
lw t0, RV_STK_T0(sp)
lw t1, RV_STK_T1(sp)
lw t2, RV_STK_T2(sp)
lw s... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/espressif/esp32c5/vectors_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c5/vectors_lpcore.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c5/vectors_lpcore.S:3 | addi sp,sp, \cxt_size
.endm
.macro restore_mepc
lw t0, RV_STK_MEPC(sp)
csrw mepc, t0
.endm
.section .text.handlers,"ax"
.global _panic_handler
.type _panic_handler, @function
_panic_handler:
save_general_regs RV_STK_FRMSZ
save_mepc
addi t0, sp, RV_STK_FRMSZ
sw t0, RV_STK_SP(sp)
csrr t0, mstat... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/espressif/esp32c5/vectors_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c5/vectors_lpcore.S | 81 | 128 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/Kconfig.mac:1 | # Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_ESP32C6
choice ESP32C6_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address"
default ESP32C6_UNIVERSAL_MAC_ADDRESSES_FOUR
help
Configure the number of universally adm... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/Kconfig.mac | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c6/Kconfig.mac | 1 | 49 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/start_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .text.vectors
.global reset_vector
/* The reset vector, jumps to startup code */
reset_vector:
/* _vector_table: Only 256-byte aligned addresses are allowed */
la t0, _vector_table
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/start_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c6/start_lpcore.S | 1 | 35 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/start_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .text.vectors
.global reset_vector
/* The reset vector, jumps to startup code */
reset_vector:
/* _vector_table: Only 256-byte aligned addresses are allowed */
la t0, _vector_table
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/start_lpcore.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/espressif/esp32c6/start_lpcore.S | 1 | 25 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/vector_table_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .init.vector,"ax"
.global _vector_table
.type _vector_table, @function
_vector_table:
.option push
.option norvc
/*
* Entry 0: LP core boots from 0x50000000 (first entry of vector tab... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/vector_table_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c6/vector_table_lpcore.S | 1 | 28 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/vector_table_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .init.vector,"ax"
.global _vector_table
.type _vector_table, @function
_vector_table:
.option push
.option norvc
.rept 30
j _panic_handler
.endr
j _interrupt_handler // All interrupt... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/vector_table_lpcore.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/espressif/esp32c6/vector_table_lpcore.S | 1 | 22 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/vectors_lpcore.S:1 | /*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "riscv/rvruntime-frames.h"
#include <soc/soc_caps.h>
.equ SAVE_REGS, 32
.equ CONTEXT_SIZE, (SAVE_REGS * 4)
/* Macro which first allocates space on the stack to save general
* purpose regist... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/vectors_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c6/vectors_lpcore.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/vectors_lpcore.S:3 | lw s10, RV_STK_S10(sp)
lw s11, RV_STK_S11(sp)
lw t3, RV_STK_T3(sp)
lw t4, RV_STK_T4(sp)
lw t5, RV_STK_T5(sp)
lw t6, RV_STK_T6(sp)
addi sp,sp, \cxt_size
.endm
.macro restore_mepc
lw t0, RV_STK_MEPC(sp)
csrw mepc, t0
.endm
/* _panic_handler: handle all exception */
.section .text.handlers,... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/vectors_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c6/vectors_lpcore.S | 81 | 140 |
zephyrproject-rtos/zephyr:soc/espressif/esp32c6/vectors_lpcore.S:4 | mv a0, sp /* RvExcFrame *regs */
call ulp_lp_core_panic_handler
_end:
j _end /* loop forever */
/* _interrupt_handler: handle all interrupt */
.section .text.handlers,"ax"
.global _interrupt_handler
.type _interrupt_handler, @function
_interrupt_handler:
/* Save registers & mepc to stack */
save_general_regs... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/espressif/esp32c6/vectors_lpcore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32c6/vectors_lpcore.S | 121 | 142 |
zephyrproject-rtos/zephyr:soc/espressif/esp32h2/Kconfig.mac:1 | # Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_ESP32H2
choice ESP32H2_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address"
default ESP32H2_UNIVERSAL_MAC_ADDRESSES_TWO
help
Configure the number of universally admi... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32h2/Kconfig.mac | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32h2/Kconfig.mac | 1 | 26 |
zephyrproject-rtos/zephyr:soc/espressif/esp32h2/soc_irq.S:1 | /* Copyright 2025 Espressif Systems (Shanghai) PTE LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/offsets.h>
#include <zephyr/toolchain.h>
/* Exports */
GTEXT(__soc_handle_irq)
SECTION_FUNC(exception.other, __soc_handle_irq)
/* int status clearing is done at ISR */
ret | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32h2/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32h2/soc_irq.S | 1 | 15 |
zephyrproject-rtos/zephyr:soc/espressif/esp32h2/vectors.S:1 | /* Copyright 2025 Espressif Systems (Shanghai) PTE LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/soc.h"
#include "soc/interrupt_reg.h"
#include "riscv/rvruntime-frames.h"
#include "soc/soc_caps.h"
#include <zephyr/toolchain.h>
/* Imports */
GTEXT(_isr_wrapper)
/* This is the vector table. MTVEC po... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32h2/vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32h2/vectors.S | 1 | 35 |
zephyrproject-rtos/zephyr:soc/espressif/esp32s2/Kconfig.mac:1 | # Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_ESP32S2
choice ESP32S2_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address"
default ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO
help
Configure the number of universally admi... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32s2/Kconfig.mac | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32s2/Kconfig.mac | 1 | 42 |
zephyrproject-rtos/zephyr:soc/espressif/esp32s3/Kconfig.mac:1 | # Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_ESP32S3
choice ESP32S3_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address"
default ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR
help
Configure the number of universally adm... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/espressif/esp32s3/Kconfig.mac | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/espressif/esp32s3/Kconfig.mac | 1 | 47 |
zephyrproject-rtos/zephyr:soc/gd/gd32/gd32vf103/entry.S:1 | /*
* Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nuclei_csr.h>
#include <zephyr/toolchain.h>
#include <zephyr/arch/riscv/csr.h>
GTEXT(__nuclei_start)
SECTION_FUNC(init, __nuclei_start)
/* Disable Global Interrupt */
csrc mstatus, MSTATUS_MI... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/gd/gd32/gd32vf103/entry.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/gd/gd32/gd32vf103/entry.S | 1 | 36 |
zephyrproject-rtos/zephyr:soc/gd/gd32/gd32vf103/soc_irq.S:1 | /*
* Copyright (c) 2024 Andes Technology Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/offsets.h>
#include <zephyr/toolchain.h>
#include <zephyr/arch/riscv/irq.h>
/* Exports */
#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
GTEXT(__soc_save_context)
GTEXT(__soc_restore_context)
#endif
#ifdef CONF... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/gd/gd32/gd32vf103/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/gd/gd32/gd32vf103/soc_irq.S | 1 | 40 |
zephyrproject-rtos/zephyr:soc/infineon/edge/pse84/cy_syslib_ext.S:1 | /*
* SPDX-FileCopyrightText: <text>Copyright (c) 2026 Infineon Technologies AG,
* or an affiliate of Infineon Technologies AG. All rights reserved.</text>
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .text,"ax"
.text
/*******************************************************************************
* Funct... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/infineon/edge/pse84/cy_syslib_ext.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/infineon/edge/pse84/cy_syslib_ext.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/infineon/edge/pse84/cy_syslib_ext.S:2 | /*******************************************************************************
* Function Name: Cy_SysLib_EnterCriticalSection
****************************************************************************//**
*
* Cy_SysLib_EnterCriticalSection disables interrupts and returns a value
* indicating whether interrupts wer... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/infineon/edge/pse84/cy_syslib_ext.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/infineon/edge/pse84/cy_syslib_ext.S | 41 | 90 |
zephyrproject-rtos/zephyr:soc/infineon/edge/pse84/cy_syslib_ext.S:3 | .type Cy_SysLib_ExitCriticalSection, %function
Cy_SysLib_ExitCriticalSection:
MSR PRIMASK, r0 /* Restore interrupt state */
BX lr
.end
/* [] END OF FILE */ | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/infineon/edge/pse84/cy_syslib_ext.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/infineon/edge/pse84/cy_syslib_ext.S | 81 | 90 |
zephyrproject-rtos/zephyr:soc/infineon/edge/pse84/cy_syslib_ext.S:1 | /*
* Copyright (c) 2025 Infineon Technologies AG,
* or an affiliate of Infineon Technologies AG.
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .text,"ax"
.text
/*******************************************************************************
* Function Name: Cy_SysLib_DelayCycles
**************************... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/infineon/edge/pse84/cy_syslib_ext.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/infineon/edge/pse84/cy_syslib_ext.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/ace/power_down.S:1 | /* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include "asm_memory_management.h"
.section .text, "ax"
.align 64
power_down_literals:
.literal_position
ipc_flag:
.word 0x80000000 // IPC_DIPCTDR_BUSY
sram_dis_loop_cnt:
.word 4096
.global power_down
.type power_down, @functio... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/ace/power_down.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/ace/power_down.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/ace/power_down.S:2 | #define u32_ipc_response_mask a14
#define pfl_reg a15
power_down:
entry sp, 32
/**
* effectively executes:
* xthal_dcache_region_lock(&literals, 128);
* xthal_icache_region_lock(&powerdown, 256);
*/
movi pfl_reg, power_down_literals
dpfl pfl_reg, 0
dpfl pfl_reg, 64
movi pfl_reg, power_down
ipfl pfl... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/ace/power_down.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/ace/power_down.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/ace/power_down.S:3 | * simplicity and directness, despite the potential performance benefits
* of the TLB way9 approach. The TLB way9 approach would also reserve
* way9, potentially limiting its use for other purposes in the future.
*/
l32i pfl_reg, p_ipc_regs, 0
#endif
_PD_DISABLE_LPSRAM:
/**
* effectively executes:
* if (b_disa... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/ace/power_down.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/ace/power_down.S | 81 | 140 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/ace/power_down.S:4 | * temp_reg0 = temp_reg0 | u32_ipc_response_mask;
* *(p_ipc_regs + 0x180) = 0x0;
* *(p_ipc_regs + 0x10) = temp_reg0;
* }
*/
beqz b_ipc_response, _PD_SLEEP
/* copy value from IPCxTDR */
l32i temp_reg0, p_ipc_regs, 0
/* set IPC Busy bit to 1 */
movi temp_reg1, 1
slli temp_reg1, temp_reg1, 31
or ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/ace/power_down.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/ace/power_down.S | 121 | 157 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/cavs/power_down_cavs.S:1 | /* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include "asm_ldo_management.h"
#include "asm_memory_management.h"
#include "adsp_memory.h"
#define IPC_HOST_BASE 0x00071E00
#define IPC_DIPCIDD 0x18
#define IPC_DIPCIDR 0x10
.section .text, "ax"
.align 64
power_down_literals:
.... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/cavs/power_down_cavs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/cavs/power_down_cavs.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/cavs/power_down_cavs.S:2 | #define temp_reg2 a8
#define temp_reg3 a9
#define host_base a10
#define pfl_reg a15
power_down_cavs:
entry sp, 32
/**
* effectively executes:
* xthal_dcache_region_lock(&literals, 128);
* xthal_icache_region_lock(&powerdown, 256);
* xthal_dcache_re... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/cavs/power_down_cavs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/cavs/power_down_cavs.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/cavs/power_down_cavs.S:3 | (hpsram_pwrgating_mask) - do not disable hpsram. */
beqz pu32_hpsram_mask, _PD_SEND_IPC
/* mandatory sequence for LDO ON - effectively executes:
* m_cavs_s_set_ldo_hpsram_on_state();
* WAIT_300NS();
*/
movi temp_reg0, SHIM_LDOCTL_HPSRAM_LDO_ON
m_cavs_set_hpldo_state temp_reg0, temp_reg1, temp_reg2
movi temp_reg... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/cavs/power_down_cavs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/cavs/power_down_cavs.S | 81 | 140 |
zephyrproject-rtos/zephyr:soc/intel/intel_adsp/cavs/power_down_cavs.S:4 | movi temp_reg0, 128
1 :
addi temp_reg0, temp_reg0, -1
bnez temp_reg0, 1b
movi temp_reg0, SHIM_LDOCTL_HPSRAM_LDO_OFF
m_cavs_set_hpldo_state temp_reg0, temp_reg1, temp_reg2
_PD_SEND_IPC:
/* Send IPC reply for SET_DX message */
movi temp_reg1, 0
s32i temp_reg1, host_base, IPC_DIPCIDD
movi temp_reg1, set_dx_reply... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/intel/intel_adsp/cavs/power_down_cavs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/intel/intel_adsp/cavs/power_down_cavs.S | 121 | 154 |
zephyrproject-rtos/zephyr:soc/ite/ec/it51xxx/vector.S:1 | /*
* Copyright (c) 2025 ITE Corporation. All Rights Reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/sys/util_macro.h>
#include <zephyr/toolchain.h>
#define FSPI_INTF_AND_MIRROR_FUNC_DISABLED CONFIG_SOC_IT51XXX_SIGNATURE_FLAG & BIT(5)
#if FSPI_INTF_AND_MIRROR_FUNC_DISABLED && CONFIG_SOC_IT51... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ite/ec/it51xxx/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ite/ec/it51xxx/vector.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/ite/ec/it51xxx/vector.S:2 | tail __initialize
/*
* eflash signature used to enable specific function after power-on reset.
* (HW mechanism)
* The content of 16-bytes must be the following and at offset 0x40 of binary.
* ----------------------------------------------------------------------------
* 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 1... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ite/ec/it51xxx/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ite/ec/it51xxx/vector.S | 41 | 71 |
zephyrproject-rtos/zephyr:soc/ite/ec/it51xxx/vector.S:1 | /*
* Copyright (c) 2025 ITE Corporation. All Rights Reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* exports */
GTEXT(__start)
/* imports */
GTEXT(__initialize)
GTEXT(_isr_wrapper)
SECTION_FUNC(vectors, __start)
#ifdef CONFIG_RISCV_GP
.option push
.option norelax
/* Confi... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ite/ec/it51xxx/vector.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/ite/ec/it51xxx/vector.S | 1 | 59 |
zephyrproject-rtos/zephyr:soc/ite/ec/it8xxx2/__arithmetic.S:1 | /*
* Copyright (c) 2022 ITE Corporation.
* SPDX-License-Identifier: Apache-2.0
*
* When the 'M' extension is disabled, compiler can not recognize div/mul
* instructions. So mul/div instructions in the below integer arithmetic
* routines are hard coded by opcodes.
*
* IMPORTANT:
* The workaround requires the no... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | soc/ite/ec/it8xxx2/__arithmetic.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ite/ec/it8xxx2/__arithmetic.S | 1 | 50 |
zephyrproject-rtos/zephyr:soc/ite/ec/it8xxx2/vector.S:1 | /*
* Copyright (c) 2020 ITE Corporation. All Rights Reserved.
* Jyunlin Chen <jyunlin.chen@ite.com.tw>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "chip_chipregs.h"
#include <zephyr/toolchain.h>
/* exports */
GTEXT(__start)
/* imports */
GTEXT(__initialize)
GTEXT(_isr_wrapper)
SECTION_FUNC(vectors, __s... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ite/ec/it8xxx2/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ite/ec/it8xxx2/vector.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/ite/ec/it8xxx2/vector.S:2 | sb t1, 1(t0)
/* Configure GPIOA4 as TDO function */
sb t1, 4(t0)
/* Configure GPIOA5 as TMS function */
sb t1, 5(t0)
/* Configure GPIOA6 as TRST function */
sb t1, 6(t0)
/* I/O voltage is 3.3V */
la t0, IT8XXX2_JTAG_VOLT_SET
sb t1, 0(t0)
#endif
/*
* Set mtvec (Machine Trap-Vector Base-Address Register)
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ite/ec/it8xxx2/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ite/ec/it8xxx2/vector.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/ite/ec/it8xxx2/vector.S:3 | * ----------------------------------------------------------------------------
* A5h A5h A5h A5h A5h A5h [host] [flag] 85h 12h 5Ah 5Ah AAh AAh 55h 55h
* ----------------------------------------------------------------------------
* [host]: A4h = enable eSPI, A5h = enable LPC
* [flag]:
* bit7: it must be 1b.... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ite/ec/it8xxx2/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ite/ec/it8xxx2/vector.S | 81 | 111 |
zephyrproject-rtos/zephyr:soc/lowrisc/opentitan/rom_header.S:1 | /*
* Copyright (c) 2023 Rivos Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* exports */
GTEXT(__rom_header)
/* OpenTitan manifest consists of 1024 bytes (256 words) of manifest
* containing signature, device ID, version info, etc. The test ROM
* ignores all of these fields exc... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/lowrisc/opentitan/rom_header.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/lowrisc/opentitan/rom_header.S | 1 | 29 |
zephyrproject-rtos/zephyr:soc/neorv32/reset.S:1 | /*
* Copyright (c) 2021,2025 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* exports */
GTEXT(__reset)
/* imports */
GTEXT(__initialize)
SECTION_FUNC(reset, __reset)
/* Disable interrupts */
csrw mstatus, x0
csrw mie, x0
#ifdef CONFIG... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/neorv32/reset.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/neorv32/reset.S | 1 | 36 |
zephyrproject-rtos/zephyr:soc/neorv32/soc_irq.S:1 | /*
* Copyright (c) 2021 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
GTEXT(__soc_handle_irq)
/*
* SOC-specific function to handle pending IRQ number generating the interrupt.
* Exception number is given as parameter via register a0.
*/
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/neorv32/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/neorv32/soc_irq.S | 1 | 16 |
zephyrproject-rtos/zephyr:soc/nordic/common/vpr/soc_context.S:1 | /*
* Copyright (C) 2024 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/offsets.h>
#include <zephyr/toolchain.h>
GTEXT(__soc_save_context)
GTEXT(__soc_restore_context)
SECTION_FUNC(exception.other, __soc_save_context)
csrr t0, 0x347
sw t0, __soc_esf_t_minttresh_OFFSET(a0)
re... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nordic/common/vpr/soc_context.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nordic/common/vpr/soc_context.S | 1 | 22 |
zephyrproject-rtos/zephyr:soc/nxp/imx/imx9/imx93/m33/imx93_m33_startup.S:1 | /*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
GTEXT(soc_reset_hook)
SECTION_FUNC(TEXT, soc_reset_hook)
mov r0, #0
ldr r1, = DT_REG_ADDR(DT_NODELABEL(dtcm))
ldr r2, = DT_RE... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/imx/imx9/imx93/m33/imx93_m33_startup.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/imx/imx9/imx93/m33/imx93_m33_startup.S | 1 | 26 |
zephyrproject-rtos/zephyr:soc/nxp/imx/imx9/imx943/m33/soc.S:1 | /*
* SPDX-FileCopyrightText: Copyright 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
GTEXT(soc_early_reset_hook)
SECTION_FUNC(TEXT, soc_early_reset_hook)
/*
* Initialize DTCM with word wr... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/imx/imx9/imx943/m33/soc.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/imx/imx9/imx943/m33/soc.S | 1 | 30 |
zephyrproject-rtos/zephyr:soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S:1 | /*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016 - 2019 , NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#if defined(CONFIG_SOC_RESET_HOOK) && defined(CONFIG_SOC_LPC541... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S:2 | movs r4, 0
movs r5, 1
push {lr}
bl SystemInit
pop {lr}
/* Determine which core (M0+ or M4) this code is running on */
/* r2 = (((*cpu_id) >> 4) & 0xFFF); (M4 core == 0xC24) */
get_current_core_id:
ldr r0, [r6, #0]
ldr r1, [r0] /* r1 = CPU ID status *... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S:3 | cmp r2, #0 /* Slave boot address = 0 (not set up)? */
beq cpu_sleep
ldr r0, [r6, #12]
ldr r1, [r0] /* r5 = SYSCON co-processor stack address */
mov sp, r1 /* Update slave CPU stack pointer */
/* Be sure t... | arm64 | intel-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/lpc/lpc54xxx/gcc/startup_LPC54114_cm4.S | 81 | 103 |
zephyrproject-rtos/zephyr:soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S:1 | /*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#define MC_RGM_BASE DT_REG_ADDR(DT_NODELABEL(mc_rgm))
#define MC_RGM_DES 0x0
#define MC_RGM_FES 0x8
_ASM_FILE_PROLOGUE
GTEXT(soc_reset_hook)
SECT... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S:2 | ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
subs r2, #1
ble SRAM_LOOP_END
movs r0, 0
movs r3, 0
SRAM_LOOP:
stm r1!, {r0,r3}
subs r2, 8
bge SRAM_LOOP
SRAM_LOOP_END:
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
ldr r1, = DT_REG_ADDR(DT_CHOSEN(zephyr_itcm))
ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S:3 | #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(itcm1), okay)
ldr r1, = DT_REG_ADDR(DT_NODELABEL(itcm1))
ldr r2, = DT_REG_SIZE(DT_NODELABEL(itcm1))
subs r2, #1
ITCM1_LOOP:
stm r1!, {r0,r3}
subs r2, 8
bge ITCM1_LOOP
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(dtcm1), okay)
ldr r1, = DT_REG_ADDR(DT_NODELABEL(dtcm1... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/mcx/mcxe/mcxe31x/mcxe31x_soc_initialization.S | 81 | 115 |
zephyrproject-rtos/zephyr:soc/nxp/mcx/mcxw/mcxw7xx/mcxw70_platform_init.S:1 | /*
* Copyright 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief MCXW70 Platform-Specific Initialization
*
* MCXW70 SOC reset code that initializes RAM
* to prevent ECC causing faults, and calls SystemInit
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/mcx/mcxw/mcxw7xx/mcxw70_platform_init.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/mcx/mcxw/mcxw7xx/mcxw70_platform_init.S | 1 | 44 |
zephyrproject-rtos/zephyr:soc/nxp/mcx/mcxw/mcxw7xx/mcxw71_platform_init.S:1 | /*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief MCXW71 Platform-Specific Initialization
*
* MCXW71 SOC reset code that initializes RAM
* to prevent ECC causing faults, and calls SystemInit
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/mcx/mcxw/mcxw7xx/mcxw71_platform_init.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/mcx/mcxw/mcxw7xx/mcxw71_platform_init.S | 1 | 55 |
zephyrproject-rtos/zephyr:soc/nxp/mcx/mcxw/mcxw7xx/mcxw72_platform_init.S:1 | /*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief MCXW72 Platform-Specific Initialization
*
* When compared to MCXW71, the Ram Banks with ECC
* are located in different addresses.
*
* MCXW72 SOC reset code that initializes RAM
* to prevent ECC causing faults, and calls... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/mcx/mcxw/mcxw7xx/mcxw72_platform_init.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/mcx/mcxw/mcxw7xx/mcxw72_platform_init.S | 1 | 58 |
zephyrproject-rtos/zephyr:soc/nxp/s32/s32k3/s32k3xx_startup.S:1 | /*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#define MC_RGM_BASE 0x4028C000
#define MC_RGM_DES 0x0
#define MC_RGM_FES 0x8
_ASM_FILE_PROLOGUE
GTEXT(soc_early_reset_hook)
SECTION_FUNC(TEXT, so... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/s32/s32k3/s32k3xx_startup.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/s32/s32k3/s32k3xx_startup.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/nxp/s32/s32k3/s32k3xx_startup.S:2 | ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
subs r2, #1
ble SRAM_LOOP_END
movs r0, 0
movs r3, 0
SRAM_LOOP:
stm r1!, {r0,r3}
subs r2, 8
bge SRAM_LOOP
SRAM_LOOP_END:
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
ldr r1, = DT_REG_ADDR(DT_CHOSEN(zephyr_itcm))
ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/s32/s32k3/s32k3xx_startup.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/s32/s32k3/s32k3xx_startup.S | 41 | 84 |
zephyrproject-rtos/zephyr:soc/nxp/s32/s32k3/s32k3xx_startup.S:1 | /*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#define MC_RGM_BASE 0x4028C000
#define MC_RGM_DES 0x0
#define MC_RGM_FES 0x8
_ASM_FILE_PROLOGUE
GTEXT(soc_reset_hook)
SECTION_FUNC(TEXT, soc_rese... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/s32/s32k3/s32k3xx_startup.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/nxp/s32/s32k3/s32k3xx_startup.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/nxp/s32/s32k5/m7/s32k5xx_startup.S:1 | /*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
GTEXT(soc_early_reset_hook)
SECTION_FUNC(TEXT, soc_early_reset_hook)
/*
* SRAM must be initialized to a known value using a 6... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/s32/s32k5/m7/s32k5xx_startup.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/s32/s32k5/m7/s32k5xx_startup.S | 1 | 41 |
zephyrproject-rtos/zephyr:soc/nxp/s32/s32k5/r52/s32k5xx_startup.S:1 | /*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/devicetree.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#define LPE_MC_RGM_BASE 0x42074000
#define LPE_MC_RGM_DES 0x0
#define LPE_MC_RGM_FES 0x8
_ASM_FILE_PROLOGUE
GTEXT(soc... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/s32/s32k5/r52/s32k5xx_startup.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/s32/s32k5/r52/s32k5xx_startup.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/nxp/s32/s32k5/r52/s32k5xx_startup.S:2 | *
* This is implemented directly in ASM, to ensure no stack access is performed.
*/
ldr r1, =DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
ldr r2, =DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
subs r2, r2, #1
ble ECC_END
mov r0, #0
mov r3, #0
SRAM_LOOP:
stmia r1!, {r0, r3}
subs r2, r2, #8
bge SRAM_LOOP
ECC_END:
#endif /... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/nxp/s32/s32k5/r52/s32k5xx_startup.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/nxp/s32/s32k5/r52/s32k5xx_startup.S | 41 | 62 |
zephyrproject-rtos/zephyr:soc/openisa/rv32m1/soc_irq.S:1 | /*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/offsets.h>
#include <zephyr/toolchain.h>
#include <soc.h>
#ifdef CONFIG_SOC_OPENISA_RV32M1_RI5CY
#include <csr_irq.inc>
#endif /* CONFIG_SOC_OPENISA_RV32M1_RI5CY */
/* Exports */
GTEXT(__soc_handle_irq)
#ifdef C... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/openisa/rv32m1/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/openisa/rv32m1/soc_irq.S | 1 | 59 |
zephyrproject-rtos/zephyr:soc/openisa/rv32m1/soc_irq.S:2 | ret
#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
/*
* The RI5CY core has ISA extensions for faster loop performance
* that use extra registers.
*
* If the toolchain generates instructions that use them, they must be saved
* prior to handling an interrupt/exception. This case is handled using
* Zephyr's generic RISC-V me... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/openisa/rv32m1/soc_irq.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/openisa/rv32m1/soc_irq.S | 41 | 67 |
zephyrproject-rtos/zephyr:soc/openisa/rv32m1/vector.S:1 | /*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* Imports */
GTEXT(__initialize)
GTEXT(_isr_wrapper)
/* Exports */
GTEXT(__start)
/*
* Interrupts work the same way for both the RI5CY and ZERO-RISCY cores
* in this SoC; the only difference is t... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/openisa/rv32m1/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/openisa/rv32m1/vector.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/openisa/rv32m1/vector.S:2 | j _isr_wrapper /* IRQ 5 */
j _isr_wrapper /* IRQ 6 */
j _isr_wrapper /* IRQ 7 */
j _isr_wrapper /* IRQ 8 */
j _isr_wrapper /* IRQ 9 */
j _isr_wrapper /* IRQ 10 */
j _isr_wrapper /* IRQ 11 */
j _isr_wrapper /* IRQ 12 */
j _isr_wrapper /* IRQ 13 */
j _isr_wrapper /* IRQ 14 */
j _isr_wrapper /* IRQ 15 */
j _isr... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/openisa/rv32m1/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/openisa/rv32m1/vector.S | 41 | 80 |
zephyrproject-rtos/zephyr:soc/openisa/rv32m1/wdog.S:1 | /*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/linker/sections.h>
#include <zephyr/toolchain.h>
#include <zephyr/arch/cpu.h>
/* Exports */
GTEXT(_WdogInit)
/* WDOG instance base address. */
#ifdef CONFIG_SOC_OPENISA_RV32M1_RI5CY
#define WDOG_BASE 0x4002A000 /... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/openisa/rv32m1/wdog.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/openisa/rv32m1/wdog.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/openisa/rv32m1/wdog.S:2 | /* Disable interrupts if they're on. This is timing-sensitive code. */
csrrc t0, mstatus, MSTATUS_IEN
/* Get base address. */
li t1, WDOG_BASE
/* Unlock the watchdog. */
li t2, WDOG_CNT_UNLOCK
sw t2, WDOG_CNT_OFFSET(t1)
/* Disable the watchdog. Allow updates later. */
lw t2, WDOG_CS_OFFSET(t1)
andi t2, t2, ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/openisa/rv32m1/wdog.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/openisa/rv32m1/wdog.S | 41 | 63 |
zephyrproject-rtos/zephyr:soc/qemu/malta/vector.S:1 | /*
* Copyright (c) 2021 Antony Pavlov <antonynpavlov@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <mips/regdef.h>
/* Imports */
GTEXT(__initialize)
/* Exports */
GTEXT(__start)
SECTION_FUNC(vectors, __start)
/* Call into Zephyr initialization. */
la v0, __initia... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/qemu/malta/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/qemu/malta/vector.S | 1 | 19 |
zephyrproject-rtos/zephyr:soc/raspberrypi/rpi_pico/rp2350/vector.S:1 | /*
* Copyright (c) 2025 Andrew Featherstone <andrew.featherstone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* exports */
GTEXT(__start)
/* imports */
GTEXT(_isr_wrapper)
SECTION_FUNC(vectors, __start)
.option norvc;
call soc_reset_hook
/*
* Set mtvec (Machine Tra... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/raspberrypi/rpi_pico/rp2350/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/raspberrypi/rpi_pico/rp2350/vector.S | 1 | 28 |
zephyrproject-rtos/zephyr:soc/renesas/rz/common/loader_program.S:1 | /*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/linker/sections.h>
/* Require CONFIG_XIP=n */
#define ROM_START (CONFIG_FLASH_BASE_ADDRESS + DT_REG_ADDR(DT_CHOSEN(zephyr_code_partition)))
#define APP_SIZE _flash_use... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/renesas/rz/common/loader_program.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/renesas/rz/common/loader_program.S | 1 | 42 |
zephyrproject-rtos/zephyr:soc/renesas/rz/common/loader_program.S:1 | /*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/linker/sections.h>
/* Require CONFIG_XIP=n */
#define ROM_START (CONFIG_FLASH_BASE_ADDRESS + DT_REG_ADDR(DT_CHOSEN(zephyr_code_partition)))
#define RAM_START CONFIG_SR... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/renesas/rz/common/loader_program.S | Apache-2.0 | 3b3697732a76bf036d46241a1ca8187ca1d2e564 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/3b3697732a76bf036d46241a1ca8187ca1d2e564/soc/renesas/rz/common/loader_program.S | 1 | 41 |
zephyrproject-rtos/zephyr:soc/renesas/rz/common/loader_program.S:1 | /*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/linker/sections.h>
/* Require CONFIG_XIP=n */
#define ROM_START DT_REG_ADDR(DT_CHOSEN(zephyr_code_partition))
#define RAM_START CONFIG_SRAM_BASE_ADDRESS
#define APP_SI... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/renesas/rz/common/loader_program.S | Apache-2.0 | 762b01be9e2fc8e0019a033e5d1f8921d0bbe548 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/762b01be9e2fc8e0019a033e5d1f8921d0bbe548/soc/renesas/rz/common/loader_program.S | 1 | 41 |
zephyrproject-rtos/zephyr:soc/sensry/ganymed/sy1xx/common/crt0.S:1 | # SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2024 sensry.io
#include <zephyr/toolchain.h>
GTEXT(__initialize)
# abs 0x0000 - entry point after bootloader
.section .pre_start, "ax"
.global __pre_start
__pre_start:
jal x0, __prestart_routine
# abs 0x0080 - will be checked by bootloader
.section .... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/sensry/ganymed/sy1xx/common/crt0.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/sensry/ganymed/sy1xx/common/crt0.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/sensry/ganymed/sy1xx/common/crt0.S:2 | j __no_irq_handler0
j __no_irq_handler1
j __no_irq_handler2
j __no_irq_handler3
j __no_irq_handler4
j __no_irq_handler5
j __no_irq_handler6
j __no_irq_handler7
j __no_irq_handler8
j __no_irq_handler9
j __no_irq_handler10
j __no_irq_handler11
j __no_irq_handler12
j __no_irq_handler13
j __no_i... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/sensry/ganymed/sy1xx/common/crt0.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/sensry/ganymed/sy1xx/common/crt0.S | 41 | 100 |
zephyrproject-rtos/zephyr:soc/sensry/ganymed/sy1xx/common/crt0.S:3 | __no_irq_handler3:
j __no_irq_handler3
__no_irq_handler4:
j __no_irq_handler4
__no_irq_handler5:
j __no_irq_handler5
__no_irq_handler6:
j __no_irq_handler6
__no_irq_handler7:
j __no_irq_handler7
__no_irq_handler8:
j __no_irq_handler8
__no_irq_handler9:
j __no_irq_handler9
__no_irq_handler10:
j __no_irq_... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/sensry/ganymed/sy1xx/common/crt0.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/sensry/ganymed/sy1xx/common/crt0.S | 81 | 138 |
zephyrproject-rtos/zephyr:soc/sensry/ganymed/sy1xx/common/crt0.S:4 | __no_irq_handler23:
j __no_irq_handler23
__no_irq_handler24:
j __no_irq_handler24
__no_irq_handler25:
j __no_irq_handler25
__no_irq_handler26:
j __no_irq_handler26
__no_irq_handler27:
j __no_irq_handler27
__no_irq_handler28:
j __no_irq_handler28
__no_irq_handler29:
j __no_irq_handler29
__no_irq_handler30:... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/sensry/ganymed/sy1xx/common/crt0.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/sensry/ganymed/sy1xx/common/crt0.S | 121 | 138 |
zephyrproject-rtos/zephyr:soc/st/stm32/stm32wb0x/s2ram_marking.S:1 | /*
* Copyright (c) 2025 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* STM32WB0-specific support code for suspend-to-RAM
*/
#include <zephyr/toolchain.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/arch/common/pm_s2ram.h>
#include <zephyr/linker/sections.h>
/* ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/st/stm32/stm32wb0x/s2ram_marking.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/st/stm32/stm32wb0x/s2ram_marking.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/st/stm32/stm32wb0x/s2ram_marking.S:2 | GTEXT(pm_s2ram_mark_check_and_clear)
SECTION_FUNC(TEXT, pm_s2ram_mark_check_and_clear)
/*
* Check for Deepstop exit on wakeup event:
* - RCC_CSR is zero
* - PWRC.EXTSRR has bit DEEPSTOPF set
* (optional; RCC_CSR check suffices)
* - Either PWRC_SR1 or PWRC_SR3 is non-zero
*
* Note that we don't have to c... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/st/stm32/stm32wb0x/s2ram_marking.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/st/stm32/stm32wb0x/s2ram_marking.S | 41 | 67 |
zephyrproject-rtos/zephyr:soc/st/stm32/stm32wb0x/s2ram_marking.S:1 | /*
* Copyright (c) 2025 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* STM32WB0-specific support code for suspend-to-RAM
*/
#include <zephyr/toolchain.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/arch/common/pm_s2ram.h>
/* Read RCC and PWRC base from Device T... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/st/stm32/stm32wb0x/s2ram_marking.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/st/stm32/stm32wb0x/s2ram_marking.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/st/stm32/stm32wb0x/s2ram_marking.S:2 | SECTION_FUNC(TEXT, pm_s2ram_mark_check_and_clear)
/*
* Check for Deepstop exit on wakeup event:
* - RCC_CSR is zero
* - PWRC.EXTSRR has bit DEEPSTOPF set
* (optional; RCC_CSR check suffices)
* - Either PWRC_SR1 or PWRC_SR3 is non-zero
*
* Note that we don't have to clear any register since
* they are ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/st/stm32/stm32wb0x/s2ram_marking.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/soc/st/stm32/stm32wb0x/s2ram_marking.S | 41 | 66 |
zephyrproject-rtos/zephyr:soc/telink/tlsr/tlsr951x/soc_irq.S:1 | /*
* Copyright (c) 2021 Telink Semiconductor
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/offsets.h>
#include <zephyr/toolchain.h>
#include <csr_irq.inc>
#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
/* Exports */
GTEXT(__soc_save_context)
GTEXT(__soc_restore_context)
SECTION_FUNC(exception.other, __soc_s... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/telink/tlsr/tlsr951x/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/telink/tlsr/tlsr951x/soc_irq.S | 1 | 29 |
zephyrproject-rtos/zephyr:soc/telink/tlsr/tlsr951x/start.S:1 | /*
* Copyright (c) 2021 Telink Semiconductor
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
.option push
.option norelax
.org 0x0
/* exports */
GTEXT(entry)
SECTION_FUNC(init, init)
entry:
j start
.org 0x20
.word ('T'<<24 | 'L'<<16 | 'N'<<8 | 'K')
.org 0x26
.short (0x173B)
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/telink/tlsr/tlsr951x/start.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/telink/tlsr/tlsr951x/start.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/telink/tlsr/tlsr951x/start.S:2 | _RETENTION_DATA_INIT:
la t1, _RETENTION_DATA_LMA_START
la t2, _RETENTION_DATA_VMA_START
la t3, _RETENTION_DATA_VMA_END
_RETENTION_DATA_INIT_BEGIN:
bleu t3, t2, _RAMCODE_INIT
lw t0, 0(t1)
sw t0, 0(t2)
addi t1, t1, 4
addi t2, t2, 4
j _RETENTION_DATA_INIT_BEGIN
_RAMCODE_INIT:
la ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/telink/tlsr/tlsr951x/start.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/telink/tlsr/tlsr951x/start.S | 41 | 68 |
zephyrproject-rtos/zephyr:soc/ti/lm3s6965/reboot.S:1 | /*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <offsets_short.h>
_ASM_FILE_PROLOGUE
GDATA(z_interrupt_stacks)
GTEXT(z_do_software_reboot)
SECTION_FUNC(TEXT,z_... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/ti/lm3s6965/reboot.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/ti/lm3s6965/reboot.S | 1 | 60 |
zephyrproject-rtos/zephyr:soc/wch/ch32v/qingke_v2c/soc_irq.S:1 | /*
* Copyright (c) 2024 Michael Hope
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <offsets.h>
#include <zephyr/toolchain.h>
/* Exports */
GTEXT(__soc_handle_irq)
SECTION_FUNC(exception.other, __soc_handle_irq)
ret | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/wch/ch32v/qingke_v2c/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/wch/ch32v/qingke_v2c/soc_irq.S | 1 | 14 |
zephyrproject-rtos/zephyr:soc/wch/ch32v/qingke_v2c/vector.S:1 | /*
* Copyright (c) 2024 Michael Hope
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#ifndef CONFIG_VECTOR_TABLE_SIZE
#error "VECTOR_TABLE_SIZE must be defined"
#endif
/* Exports */
GTEXT(__start)
/* Imports */
GTEXT(__initialize)
SECTION_FUNC(vectors, ivt)
.option norvc
j __st... | arm | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/wch/ch32v/qingke_v2c/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/wch/ch32v/qingke_v2c/vector.S | 1 | 29 |
zephyrproject-rtos/zephyr:soc/wch/ch32v/qingke_v4c/soc_irq.S:1 | /* Copyright (c) 2024 Michael Hope
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <offsets.h>
#include <zephyr/toolchain.h>
/* Exports */
GTEXT(__soc_handle_irq)
SECTION_FUNC(exception.other, __soc_handle_irq)
ret | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/wch/ch32v/qingke_v4c/soc_irq.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/wch/ch32v/qingke_v4c/soc_irq.S | 1 | 13 |
zephyrproject-rtos/zephyr:soc/wch/ch32v/qingke_v4c/vector.S:1 | /*
* Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#ifndef CONFIG_VECTOR_TABLE_SIZE
#error "VECTOR_TABLE_SIZE must be defined"
#endif
/* Exports */
GTEXT(__start)
/* Imports */
GTEXT(__initialize)
SECTION_FUNC(vectors, ivt)
.option... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/wch/ch32v/qingke_v4c/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/wch/ch32v/qingke_v4c/vector.S | 1 | 32 |
zephyrproject-rtos/zephyr:soc/wch/ch32v/qingke_v4f/vector.S:1 | /*
* Copyright (c) 2024 Michael Hope
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#ifndef CONFIG_VECTOR_TABLE_SIZE
#error "VECTOR_TABLE_SIZE must be defined"
#endif
/* Exports */
GTEXT(__start)
/* Imports */
GTEXT(__initialize)
SECTION_FUNC(vectors, ivt)
.option norvc
/* Jump to 0... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | soc/wch/ch32v/qingke_v4f/vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/soc/wch/ch32v/qingke_v4f/vector.S | 1 | 32 |
zephyrproject-rtos/zephyr:subsys/bindesc/x86/bindesc_skip.S:1 | /*
* Copyright (c) 2023 Yonatan Schachter
*
* SPDX-License-Identifier: Apache-2.0
*/
.section .bindesc_skip
_bindesc_skip:
jmp __start | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | subsys/bindesc/x86/bindesc_skip.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/subsys/bindesc/x86/bindesc_skip.S | 1 | 9 |
zephyrproject-rtos/zephyr:tests/arch/riscv/fatal/src/main.S:1 | /*
* Copyright (c) 2025 Meta Platforms.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
/**
* Load up a bunch of known values into registers
* and expect them to show up in the core dump.
* Value is register ABI name kinda spelled out,
* followed by... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/arch/riscv/fatal/src/main.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/arch/riscv/fatal/src/main.S | 1 | 60 |
zephyrproject-rtos/zephyr:tests/arch/riscv/fatal/src/main.S:2 | #ifndef CONFIG_FRAME_POINTER
li s0, 0xC0FF0000FF000808
#endif /* CONFIG_FRAME_POINTER */
li s1, 0xC1FF0000FF000909
li a0, 0xA0FF0000FF000A10
li a1, 0xA1FF0000FF000B11
li a2, 0xA2FF0000FF000C12
li a3, 0xA3FF0000FF000D13
li a4, 0xA4FF0000FF000E14
li a5, 0xA5FF0000FF000F15
#ifndef CONFIG_RISCV_ISA_RV32E
li a6,... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/arch/riscv/fatal/src/main.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/arch/riscv/fatal/src/main.S | 41 | 83 |
zephyrproject-rtos/zephyr:tests/arch/x86/cet/src/asm.S:1 | /*
* Copyright (c) 2025 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/x86/ia32/asm.h>
GTEXT(should_work)
GTEXT(should_not_work)
#if defined(CONFIG_X86_64)
should_work:
endbr64
mov %rdi, %rax
inc %rax
ret
should_not_work:
mov %rdi, %rax
inc %rax
ret... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | tests/arch/x86/cet/src/asm.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/arch/x86/cet/src/asm.S | 1 | 39 |
zephyrproject-rtos/zephyr:tests/arch/x86/static_idt/src/test_stubs.S:1 | /* test_stubs.S - Exception and interrupt stubs */
/*
* Copyright (c) 2012-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
DESCRIPTION
This module implements assembler exception and interrupt stubs for regression
testing.
*/
#ifdef CONFIG_X86
#include <zephyr/arch/cpu.h>
#include <z... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/arch/x86/static_idt/src/test_stubs.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/arch/x86/static_idt/src/test_stubs.S | 1 | 37 |
zephyrproject-rtos/zephyr:tests/arch/xtensa/save_restore_hifi/src/hifi.S:1 | /*
* Copyright (c) 2024, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* hifi_get - Retrieve the HiFi aedX registers
*/
.global hifi_get
.align 4
hifi_get:
entry a1, 32
ae_s64.i aed0, a2, 0
ae_s64.i aed1, a2, 8
ae_s64.i aed2, a2, 16
ae_s64.i aed3, a2, 24
ae_s64.i aed4, a2, 32
ae_s64.i a... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/arch/xtensa/save_restore_hifi/src/hifi.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/arch/xtensa/save_restore_hifi/src/hifi.S | 1 | 60 |
zephyrproject-rtos/zephyr:tests/arch/xtensa/save_restore_hifi/src/hifi.S:2 | .align 4
hifi_set:
entry a1, 32
ae_l64.i aed0, a2, 0
ae_l64.i aed1, a2, 8
ae_l64.i aed2, a2, 16
ae_l64.i aed3, a2, 24
ae_l64.i aed4, a2, 32
ae_l64.i aed5, a2, 40
ae_l64.i aed6, a2, 48
ae_l64.i aed7, a2, 56
addi a2, a2, 64
ae_l64.i aed8, a2, 0
ae_l64.i aed9, a2, 8
ae_l64.i aed10, a2, 16
ae_l64.i aed11, ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/arch/xtensa/save_restore_hifi/src/hifi.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/arch/xtensa/save_restore_hifi/src/hifi.S | 41 | 65 |
zephyrproject-rtos/zephyr:tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S:1 | /*
* Copyright (c) 2024 CISPA Helmholtz Center for Information Security
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
GTEXT(_riscv_edge_case_cb_trigger_backward)
/*
* Tests that jumping 256 bytes (the maximum) backwards
* using CB-type instruction is feasible
*/
SECTION_FUNC(TEXT, _... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S | 1 | 60 |
zephyrproject-rtos/zephyr:tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S:2 | * _backward_jump_target itself needs 4 bytes (two compressed instructions)
* so we need to insert 252 additional padding bytes
* we pad with return instructions here, causing the test to return 0 (failure)
*/
.rept 126
/* explicit compressed return - 2 bytes */
c.jr ra
.endr
_do_... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S | 41 | 100 |
zephyrproject-rtos/zephyr:tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S:3 | /*
* in case the relocation is incorrect and the c.beqz jumps BACKWARDS,
* e.g., after arithmetic overflow, we jump into the following return sled
* the return sled is 256 bytes long, covering the maximum backward jump
*/
.rept 128
/* explicit compressed return - 2 bytes */
c.jr ... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/subsys/llext/src/riscv_edge_case_cb_type_trigger.S | 81 | 120 |
zephyrproject-rtos/zephyr:tests/subsys/llext/src/riscv_edge_case_non_paired_hi20_lo12_trigger.S:1 | /*
* Copyright (c) 2025 CISPA Helmholtz Center for Information Security
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
/* 32-bit global defined in C */
GDATA(_data_segment_symbol)
GTEXT(_riscv_edge_case_non_paired_hi20_lo12)
/*
* Tests an edge case in the RISC-V PSABI: In the medany a... | riscv | gas-like | handwritten | zephyrproject-rtos/zephyr | tests/subsys/llext/src/riscv_edge_case_non_paired_hi20_lo12_trigger.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/tests/subsys/llext/src/riscv_edge_case_non_paired_hi20_lo12_trigger.S | 1 | 54 |
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