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values | syntax stringclasses 5
values | kind stringclasses 4
values | repo stringclasses 32
values | path stringlengths 7 108 | license stringclasses 10
values | commit stringlengths 40 40 | source_host stringclasses 1
value | category stringclasses 15
values | source_url stringlengths 85 192 | line_start int64 1 5.48k | line_end int64 4 5.5k |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:3 | popl %eax
#endif
/*
* Push all non-volatile registers onto the stack; do not copy
* any of these registers into the k_thread. Only the 'esp' register
* after all the pushes have been performed) will be stored in the
* k_thread.
*/
pushl %edi
movl $_kernel, %edi
pushl %esi
pushl %ebx
pushl %ebp
/*
... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:5 | *
* Indeed, it's possible that none of the aforementioned instructions
* need to be executed, for example, the incoming thread doesn't
* utilize floating point operations. However, the code responsible
* for setting the CR0[TS] bit appropriately for the incoming thread
* (just after the 'restoreContext_NoFlo... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:6 | jz restoreContext_NoFloatSave
/*
* The incoming thread uses floating point registers and it was _not_
* the last thread to use those registers _and_ the current FP context
* needs to be saved.
*
* Given that the ST[0] -> ST[7] and XMM0 -> XMM7 registers are all
* 'volatile', only save the registers if th... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:7 | floatSaveDone:
restoreContext_NoFloatSave:
/*********************************************************
* Restore floating point context of the incoming thread.
*********************************************************/
/*
* Again, given that the ST[0] -> ST[7] and XMM0 -> XMM7 registers are
* all 'volatile',... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:8 | * Branch point when none of the floating point registers need to be
* swapped because: a) the incoming thread does not use them OR
* b) the incoming thread is the last thread that used those registers.
*/
restoreContext_NoFloatSwap:
/*
* Leave CR0[TS] clear if incoming thread utilizes the floating point
* ... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 281 | 340 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:9 | /* Since segment descriptor has changed, need to reload */
movw $GS_TLS_SEG, %ax
movw %ax, %gs
popl %eax
popl %edx
#endif
#ifdef CONFIG_HW_SHADOW_STACK
cmpl $0, _thread_offset_to_shstk_addr(%edx)
jz __sh_stk_verify
/* Create a ssp token "by hand", as next thread may not have shadow
* stack enabled to use rs... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 321 | 380 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:10 | #endif /* CONFIG_X86_CET_VERIFY_KERNEL_SHADOW_STACK */
__sh_stk_out:
#endif
/* recover thread stack pointer from k_thread */
movl _thread_offset_to_esp(%eax), %esp
/* load return value from a possible arch_thread_return_value_set() */
popl %eax
/* pop the non-volatile registers from the stack */
popl %ebp
... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 361 | 420 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:11 | orl $X86_S_CET_MSR_SHSTK_EN, %eax
wrmsr
#ifdef CONFIG_X86_CET_SOC_PREPARE_SHADOW_STACK_SWITCH
pushl %edi
soc_prepare_shadow_stack_switch
popl %edi
#endif
rstorssp (%ebx)
discard_previous_ssp_token %ebx
jmp __sh_stk_done
__sh_stk_disable:
movl $X86_S_CET_MSR, %ecx
rdmsr
andl $~X86_S_CET_MSR_SHSTK_EN, %eax
... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 401 | 460 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:13 | * invoked. It will either be z_thread_entry, or if userspace is enabled,
* _arch_drop_to_user_mode if this is a user thread.
*
* @return this routine does NOT return.
*/
SECTION_FUNC(PINNED_TEXT, z_x86_thread_entry_wrapper)
movl $0, (%esp)
jmp *%edi
#endif /* _THREAD_WRAPPER_REQUIRED */
#ifdef CONFIG_HW_SHADOW_... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 481 | 540 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:14 | movl $z_thread_entry, %ebx
#endif
wrssd %ebx, (%ecx)
/* Set "shstk[-3]", token high bits, 0 */
xorl %ebx, %ebx
wrssd %ebx, -4(%ecx)
/* Set "shstk[-4]", token low bits */
wrssd %edx, -8(%ecx)
/* Set thread->shstk_addr to point to the token on the stack */
subl $8, %ecx
movl %ecx, _thread_offset_to_shstk_addr... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/swap.S | 521 | 546 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:3 | popl %eax
#endif
/*
* Push all non-volatile registers onto the stack; do not copy
* any of these registers into the k_thread. Only the 'esp' register
* after all the pushes have been performed) will be stored in the
* k_thread.
*/
pushl %edi
movl $_kernel, %edi
pushl %esi
pushl %ebx
pushl %ebp
/*
... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 3944b0cfc7f9f7a9d31479f2a2bd5a89e6ca82a5 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/3944b0cfc7f9f7a9d31479f2a2bd5a89e6ca82a5/arch/x86/core/ia32/swap.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:5 | *
* Indeed, it's possible that none of the aforementioned instructions
* need to be executed, for example, the incoming thread doesn't
* utilize floating point operations. However, the code responsible
* for setting the CR0[TS] bit appropriately for the incoming thread
* (just after the 'restoreContext_NoFlo... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/x86/core/ia32/swap.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:6 | jz restoreContext_NoFloatSave
/*
* The incoming thread uses floating point registers and it was _not_
* the last thread to use those registers _and_ the current FP context
* needs to be saved.
*
* Given that the ST[0] -> ST[7] and XMM0 -> XMM7 registers are all
* 'volatile', only save the registers if th... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/x86/core/ia32/swap.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:7 | floatSaveDone:
restoreContext_NoFloatSave:
/*********************************************************
* Restore floating point context of the incoming thread.
*********************************************************/
/*
* Again, given that the ST[0] -> ST[7] and XMM0 -> XMM7 registers are
* all 'volatile',... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/x86/core/ia32/swap.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/swap.S:8 | * Branch point when none of the floating point registers need to be
* swapped because: a) the incoming thread does not use them OR
* b) the incoming thread is the last thread that used those registers.
*/
restoreContext_NoFloatSwap:
/*
* Leave CR0[TS] clear if incoming thread utilizes the floating point
* ... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/swap.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/x86/core/ia32/swap.S | 281 | 340 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:1 | /*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/x86/ia32/asm.h>
#include <zephyr/arch/cpu.h>
#include <offsets_short.h>
#include <zephyr/syscall.h>
#include <zephyr/kernel/mm.h>
#include <x86_mmu.h>
/* Exports */
GTEXT(z_x86_syscall_entry_stub)
GTEXT(z_x8... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:2 | */
SECTION_FUNC(PINNED_TEXT, z_x86_trampoline_to_kernel)
/* Check interrupted code segment to see if we came from ring 3
* and hence on the trampoline stack
*/
testb $3, 16(%esp) /* Offset of CS */
jz 1f
/* Stash these regs as we need to use them */
pushl %esi
pushl %edi
/* Switch to kernel page table */
... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:3 | xchgl %edi, (%edi) /* Exchange old edi to restore it and put
old sp in the storage area */
/* Trampoline stack should have nothing sensitive in it at this point */
1:
ret
/* Copy interrupt return stack context to the trampoline stack, switch back
* to the user page table, and only then 'iret'. We jump to th... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:4 | cli
movl $z_trampoline_stack_end, %esp
/* Copy context */
pushl 20(%edi) /* SS */
pushl 16(%edi) /* ESP */
pushl 12(%edi) /* EFLAGS */
pushl 8(%edi) /* CS */
pushl 4(%edi) /* EIP */
xchgl %edi, (%edi) /* Exchange old edi to restore it and put
trampoline stack address in its old storage
area... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:5 | /* Save old trampoline stack pointer in %edi */
movl %esp, %edi
/* Switch to privilege elevation stack */
movl $_kernel, %esi
movl _kernel_offset_to_current(%esi), %esi
movl _thread_offset_to_psp(%esi), %esp
/* Transplant context according to layout above. Variant of logic
* in x86_trampoline_to_kernel */
pu... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:6 | */
push %esp /* ssf */
push %ebp /* arg6 */
push %edi /* arg5 */
push %ebx /* arg4 */
push %ecx /* arg3 */
push %edx /* arg2 */
push %eax /* arg1 */
/* from the call ID in ESI, load EBX with the actual function pointer
* to call by looking it up in the system call dispatch table
*/
xor %edi, %edi
... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:7 | /*
* size_t arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
*/
SECTION_FUNC(TEXT, arch_user_string_nlen)
push %ebp
mov %esp, %ebp
/* error value, set to -1 initially. This location is -4(%ebp) */
push $-1
/* Do the strlen operation, based on disassembly of minimal libc */
xor %eax, %eax /*... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:8 | /* FUNC_NORETURN void z_x86_userspace_enter(k_thread_entry_t user_entry,
* void *p1, void *p2, void *p3,
* uint32_t stack_end,
* uint32_t stack_start)
*
* A one-way trip to userspace.
*/
SECTION_FUNC(TEXT, z_x86_userspace_enter)
pop %esi /* Discard return address on stack */
/* Fetch param... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 281 | 340 |
zephyrproject-rtos/zephyr:arch/x86/core/ia32/userspace.S:9 | */
mov %ebx, %esp
/* Set segment registers (except CS and SS which are done in
* a special way by 'iret' below)
*/
mov $USER_DATA_SEG, %bx
mov %bx, %ds
mov %bx, %es
/* Push arguments to z_thread_entry() */
push %esi /* p3 */
push %ecx /* p2 */
push %edx /* p1 */
push %eax /* user_entry */
/* NULL retur... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/ia32/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/ia32/userspace.S | 321 | 355 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:1 | /*
* Copyright (c) 2019 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#define LOAPIC_BASE_ADDRESS DT_REG_ADDR(DT_NODELABEL(intc_loapic))
#include <zephyr/toolchain.h>
#include <zephyr/arch/x86/multiboot.h>
#include <zephyr/arch/x86/efi.h>
#include <zephyr/sys/util.h>
#include <zephyr/arch/x86/msr.h>
#i... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:2 | .macro install_pagetables_32
movl %cr4, %eax
orl $CR4_BITS, %eax
movl %eax, %cr4
clts
/* Page tables created at build time by gen_mmu.py
* NOTE: Presumes phys=virt
*/
movl $K_MEM_PHYS_ADDR(z_x86_kernel_ptables), %eax
movl %eax, %cr3
set_efer
movl %cr0, %eax
orl $CR0_BITS, %eax
movl %eax, %cr0
.endm
.... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:3 | */
orl $CR0_BITS, %eax
movq %rax, %cr0
.endm
.macro DEFINE_TSS_STACK_ARRAY
.irp idx, DEFINE_STACK_ARRAY_IDX
.word __X86_TSS64_SIZEOF-1
.word tss\idx
.word 0x8900
.word 0, 0, 0, 0, 0
.endr
.endm
/* The .locore section begins the page-aligned initialization region
* of low memory. The first address is use... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:4 | nop
nop
nop
nop
nop
nop
.code16
.global x86_ap_start
x86_ap_start:
/*
* First, we move to 32-bit protected mode, and set up the
* same flat environment that the BSP gets from the loader.
*/
lgdt gdt48
lidt idt48
movl %cr0, %eax
or $1, %eax
movl %eax, %cr0
jmpl $X86_KERNEL_CS_32, $1f
.code32
1: movw ... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:5 | jz unknown_loapic_id
cmpb %al, x86_cpu_loapics(%ebx)
je go64 /* proceed to 64-bit mode */
incl %ebx
addl $__X86_CPUBOOT_SIZEOF, %ebp
jmp 1b
unknown_loapic_id:
jmp unknown_loapic_id
.code32
.globl __start32
__start32:
/*
* kernel execution begins here in 32-bit mode, with flat-mode
* descriptors in all s... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:6 | movl $x86_cpu_boot_arg, %ebp
/* Inserting boot type */
movl $MULTIBOOT_BOOT_TYPE, __x86_boot_arg_t_boot_type_OFFSET(%ebp)
/* and multiboot info */
movl %ebx, __x86_boot_arg_t_arg_OFFSET(%ebp)
movl $x86_cpuboot, %ebp /* BSP is always logical CPU id 0 */
go64: /* Install page tables and transition to long... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:7 | /* Set up MSRs for GS / KERNEL_GS base */
movq __x86_cpuboot_t_gs_base_OFFSET(%rbp), %rax
movq %rax, %rdx
shrq $32, %rdx
/* X86_KERNEL_GS_BASE and X86_GS_BASE are swapped by the 'swapgs'
* instruction.
*/
movl $X86_KERNEL_GS_BASE, %ecx
wrmsr
/* X86_GS_BASE shadows base fields of %gs, effectively setting %gs ... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:8 | /* 64 bit OS entry point, used by EFI support. UEFI
* guarantees an identity-mapped page table that covers
* physical memory, and the loader stub already used it to
* write all of the Zephyr image, so we know it works for what
* we need. Other things need fixups to match what multiboot
* 32 bit startup does... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 281 | 340 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:9 | /*
* void x86_sse_init(struct k_thread *thread);
*
* Initialize floating-point state to something sane. If 'thread' is
* not NULL, then the resulting FP state is saved to thread->arch.sse.
*/
.global x86_sse_init
x86_sse_init:
fninit
ldmxcsr mxcsr
testq %rdi, %rdi
jz 1f
fxsave _thread_offset_to_sse(%rdi)
1: ... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 321 | 380 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:10 | movq %rax, _thread_offset_to_rip(%rsi)
pushfq
popq %rax
movq %rax, _thread_offset_to_rflags(%rsi)
movq %rsp, _thread_offset_to_rsp(%rsi)
movq %rbx, _thread_offset_to_rbx(%rsi)
movq %rbp, _thread_offset_to_rbp(%rsi)
movq %r12, _thread_offset_to_r12(%rsi)
movq %r13, _thread_offset_to_r13(%rsi)
movq %r14, _thread... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 361 | 420 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:11 | /* Save LIP */
wrssq %r10, -8(%rcx)
/* Save SSP */
movq %rcx, %r11
addq $8, %r11 /* SSP has to point to before previous entry. */
wrssq %r11, -16(%rcx)
/* Create and "push" new token */
movq %rcx, %r11
subq $16, %r11
orq $1, %r11
wrssq %r11, -24(%rcx)
/* Finally, save SSP on thread struct */
subq $24, %r... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 401 | 460 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:12 | __sh_stk_out:
#endif
/* Store the handle (i.e. our thread struct address) into the
* switch handle field, this is a synchronization signal that
* must occur after the last data from the old context is
* saved.
*/
movq %rsi, ___thread_t_switch_handle_OFFSET(%rsi)
movq %gs:__x86_tss64_t_ist1_OFFSET, %rsp
/... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 441 | 500 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:13 | testq %r10, %r10
jz __sh_stk_disable
movl $X86_S_CET_MSR, %ecx
rdmsr
orl $X86_S_CET_MSR_SHSTK_EN, %eax
wrmsr
rstorssp (%r10)
movq $1, %r10
incsspq %r10 /* Ignore previous ssp token */
jmp __sh_stk_done
__sh_stk_disable:
movl $X86_S_CET_MSR, %ecx
rdmsr
andl $~X86_S_CET_MSR_SHSTK_EN, %eax
andl $~X86_S_CET_M... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 481 | 540 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:14 | #else
pushq $X86_KERNEL_DS /* SS */
#endif /* CONFIG_USERSPACE */
pushq _thread_offset_to_rsp(%rdi) /* RSP */
pushq _thread_offset_to_rflags(%rdi) /* RFLAGS */
#ifdef CONFIG_USERSPACE
pushq _thread_offset_to_cs(%rdi) /* CS */
#else
pushq $X86_KERNEL_CS /* CS */
#endif
pushq _thread_offset_to_rip(%rdi) /* RIP ... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 521 | 580 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:15 | movq _thread_offset_to_rax(%rdi), %rax
movq _thread_offset_to_rcx(%rdi), %rcx
movq _thread_offset_to_rdx(%rdi), %rdx
movq _thread_offset_to_rsi(%rdi), %rsi
movq _thread_offset_to_r8(%rdi), %r8
movq _thread_offset_to_r9(%rdi), %r9
movq _thread_offset_to_r10(%rdi), %r10
movq _thread_offset_to_r11(%rdi), %r11
movq... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 561 | 620 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:16 | #define EXCEPT(nr) vector_ ## nr: endbr64; pushq $0; pushq $nr; jmp except
#endif
/*
* When we arrive at 'except' from one of the EXCEPT(X) stubs,
* we're on the exception stack with irqs unlocked (or the trampoline stack
* with irqs locked if KPTI is enabled) and it contains:
*
* SS
* RSP
* RFLAGS
* C... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 601 | 660 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:17 | #endif /* CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION */
#ifdef CONFIG_X86_KPTI
/* Save old trampoline stack pointer in R11 */
movq %rsp, %r11
/* Switch to the correct stack */
movq 16(%r11), %rsp
/* Transplant trampoline stack contents */
pushq 64(%r11) /* SS */
pushq 56(%r11) /* RSP */
pushq 48(%r11) /* RFLAG... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 641 | 700 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:18 | /* Callee saved regs */
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
#endif /* CONFIG_EXCEPTION_DEBUG */
movq %rsp, %rdi
call z_x86_exception
/* If we returned, the exception was handled successfully and the
* thread may resume (the pushed RIP may have been modified)
*/
#ifdef CONFIG_EXCEPTION_D... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 681 | 740 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:19 | jz 1f
cli
#ifdef CONFIG_X86_KPTI
jmp z_x86_trampoline_to_user
#else
swapgs
#endif /* CONFIG_X86_KPTI */
1:
#endif /* CONFIG_USERSPACE */
iretq
#ifdef CONFIG_X86_KPTI
EXCEPT ( 0, 7); EXCEPT ( 1, 7); EXCEPT (2, 6); EXCEPT ( 3, 7)
EXCEPT ( 4, 7); EXCEPT ( 5, 7); EXCEPT (6, 7); EX... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 721 | 780 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:20 | #endif /* CONFIG_X86_KPTI */
/*
* When we arrive at 'irq' from one of the IRQ(X) stubs,
* we're on the "freshest" IRQ stack (or the trampoline stack if we came from
* user mode and KPTI is enabled) and it contains:
*
* SS
* RSP
* RFLAGS
* CS
* RIP
* (vector number - IV_IRQS) <-- RSP points here
... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 761 | 820 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:21 | /* Switch to the interrupt stack stack */
movq %gs:__x86_tss64_t_ist1_OFFSET, %rsp
/* Transplant trampoline stack contents */
pushq 48(%rsi) /* SS */
pushq 40(%rsi) /* RSP */
pushq 32(%rsi) /* RFLAGS */
pushq 24(%rsi) /* CS */
pushq 16(%rsi) /* RIP */
pushq 8(%rsi) /* Vector */
pushq (%rsi) /* Stashed RSI val... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 801 | 860 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:22 | *
* SS RSP RFLAGS CS RIP RAX RSI
* RCX RDX RDI R8 R9 R10 R11
* X86_FXSAVE_SIZE bytes of SSE data <-- RSP points here
*
* note that the final value of RSP must be 16-byte aligned here,
* both to satisfy FXSAVE/FXRSTOR but also to honor the C ABI.
*/
irq_enter_nested: /* Nested IRQ: dump register state to ... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 841 | 900 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:23 | movq %r11, _thread_offset_to_r11(%rsi)
popq %rax /* RSI */
movq %rax, _thread_offset_to_rsi(%rsi)
popq %rcx /* vector number */
popq %rax /* RIP */
movq %rax, _thread_offset_to_rip(%rsi)
popq %rax /* CS */
#ifdef CONFIG_USERSPACE
movq %rax, _thread_offset_to_cs(%rsi)
#endif
popq %rax /* RFLAGS */
movq %rax, _t... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 881 | 940 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:24 | wrssq %r9, -8(%rax)
/* Save LIP */
wrssq %r11, -16(%rax)
/* Save SSP */
wrssq %r10, -24(%rax)
/* Create and "push" new token */
movq %rax, %r10
subq $24, %r10
orq $1, %r10
wrssq %r10, -32(%rax)
/* Finally, save SSP on thread struct */
subq $32, %rax
movq %rax, _thread_offset_to_shstk_addr(%rsi)
jmp __... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 921 | 980 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:25 | irq_dispatch:
#ifdef CONFIG_SCHED_THREAD_USAGE
pushq %rcx
call z_sched_usage_stop
popq %rcx
#endif
movq x86_irq_funcs(,%rcx,8), %rax
movq x86_irq_args(,%rcx,8), %rdi
call *%rax
xorq %rax, %rax
#ifdef CONFIG_X2APIC
xorl %edx, %edx
movl $(X86_X2APIC_BASE_MSR + (LOAPIC_EOI >> 4)), %ecx
wrmsr
#else /* xAPIC */
... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 961 | 1,020 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:26 | */
movl $X86_S_CET_MSR, %ecx
rdmsr
testl $X86_S_CET_MSR_SHSTK_EN, %eax
jz 1f
movq $3, %rax /* Discard SSP, LIP and CS from shadow stack */
incsspq %rax
rdsspq %rax
clrssbsy (%rax) /* Free shadow stack */
1:
#endif
jmp __resume
irq_exit_nested:
fxrstor (%rsp)
addq $X86_FXSAVE_SIZE, %rsp
popq %r11
popq %r... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,001 | 1,060 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:27 | /* Set "shstk[-2]", CS */
subq $16, %rdx
addq %rdx, %rcx
movq $X86_KERNEL_CS, %rsi
wrssq %rsi, (%rcx)
/* Set "shstk[-3]", z_thread_entry */
movq $z_thread_entry, %rsi
wrssq %rsi, -8(%rcx)
/* Set "shstk[-4]", ssp, "&shstk[-1]" */
movq %rcx, %rsi
addq $8, %rsi
wrssq %rsi, -16(%rcx)
/* Set "shstk[-5]", toke... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,041 | 1,100 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:28 | IRQ(112); IRQ(113); IRQ(114); IRQ(115); IRQ(116); IRQ(117); IRQ(118); IRQ(119)
IRQ(120); IRQ(121); IRQ(122); IRQ(123); IRQ(124); IRQ(125); IRQ(126); IRQ(127)
IRQ(128); IRQ(129); IRQ(130); IRQ(131); IRQ(132); IRQ(133); IRQ(134); IRQ(135)
IRQ(136); IRQ(137); IRQ(138); IRQ(139); IRQ(140); IRQ(141); IRQ(142); IRQ(143)
IRQ(... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,081 | 1,140 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:29 | #define IDT(nr, type, ist) \
.word vector_ ## nr, X86_KERNEL_CS; \
.byte ist, type; \
.word 0, 0, 0, 0, 0
/* Which IST entry in TSS to use for automatic stack switching, or 0 if
* no automatic switch is to take place. Stack page must be present in
* the current page tables, if KPTI is on only the trampoline stack... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,121 | 1,180 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:30 | IDT( 22, TRAP, EXC_STACK); IDT( 23, TRAP, EXC_STACK)
IDT( 24, TRAP, EXC_STACK); IDT( 25, TRAP, EXC_STACK)
IDT( 26, TRAP, EXC_STACK); IDT( 27, TRAP, EXC_STACK)
IDT( 28, TRAP, EXC_STACK); IDT( 29, TRAP, EXC_STACK)
IDT( 30, TRAP, EXC_STACK); IDT( 31, TRAP, EXC_STACK)
/* Oops vector can be invoked from Ring 3 and run... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,161 | 1,220 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:31 | IDT( 98, INTR, IRQ_STACK); IDT( 99, INTR, IRQ_STACK)
IDT(100, INTR, IRQ_STACK); IDT(101, INTR, IRQ_STACK)
IDT(102, INTR, IRQ_STACK); IDT(103, INTR, IRQ_STACK)
IDT(104, INTR, IRQ_STACK); IDT(105, INTR, IRQ_STACK)
IDT(106, INTR, IRQ_STACK); IDT(107, INTR, IRQ_STACK)
IDT(108, INTR, IRQ_STACK); IDT(109, INTR, IRQ_STAC... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,201 | 1,260 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:32 | IDT(178, INTR, IRQ_STACK); IDT(179, INTR, IRQ_STACK)
IDT(180, INTR, IRQ_STACK); IDT(181, INTR, IRQ_STACK)
IDT(182, INTR, IRQ_STACK); IDT(183, INTR, IRQ_STACK)
IDT(184, INTR, IRQ_STACK); IDT(185, INTR, IRQ_STACK)
IDT(186, INTR, IRQ_STACK); IDT(187, INTR, IRQ_STACK)
IDT(188, INTR, IRQ_STACK); IDT(189, INTR, IRQ_STAC... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,241 | 1,300 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/locore.S:33 | idt48: /* LIDT descriptor for 32 bit mode */
.word (idt_end - idt - 1)
.long idt
idt80: /* LIDT descriptor for 64 bit mode */
.word (idt_end - idt - 1)
.quad idt
.section .gdt,"ad"
/*
* GDT - a single GDT is shared by all threads (and, eventually, all CPUs).
* This layout must agree with the selectors in
* ... | x86_64 | gas-att | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/core/intel64/locore.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/locore.S | 1,281 | 1,327 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:1 | /*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/arch/cpu.h>
#include <offsets_short.h>
#include <zephyr/syscall.h>
#include <zephyr/kernel/mm.h>
#ifdef CONFIG_X86_KPTI
/* Copy interrupt return stack context to the trampoline stack... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:2 | pushq 8(%rdi) /* RIP */
xchgq %rdi, (%rdi) /* Exchange old rdi to restore it and put
trampoline stack address in its old storage
area */
/* Switch to thread's page table */
pushq %rax
movq %gs:__x86_tss64_t_cpu_OFFSET, %rax
movq ___cpu_t_current_OFFSET(%rax), %rax
movq _thread_offset_to_ptables(... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:3 | /* We need to switch to the trampoline stack so that we can
* switch to the kernel's page table
*/
movq %gs:__x86_tss64_t_ist2_OFFSET, %rsp
/* Load kernel's page table */
pushq %rax
/* NOTE: Presumes phys=virt */
movq $K_MEM_PHYS_ADDR(z_x86_kernel_ptables), %rax
movq %rax, %cr3
popq %rax
movq $0, -8(%rsp)... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:4 | #endif
/* Remaining registers not involved in the syscall operation are
* RBX, RBP, R12-R15, plus floating point / SIMD registers.
*
* We save caller-saved registers so we can restore to original values
* when we call 'sysretq' at the end.
*/
pushq %rdi
subq $X86_FXSAVE_SIZE, %rsp
fxsave (%rsp)
pushq %r... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:5 | * the syscall was made. This also preserves these registers if they
* were not used as arguments.
*
* We also can't have RCX and R11 clobbered as we need the original
* values to successfully 'sysretq'.
*/
addq $8, %rsp /* Discard ssf */
popq %rcx /* Restore return address for 'sysretq' */
popq %r11 /* Res... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:6 | #else
/* Restore user stack pointer */
popq %rsp
/* Return to user mode, locking interrupts as the normal interrupt
* handling path will get very confused if it occurs between
* 'swapgs' and 'sysretq'
*/
cli
#endif /* CONFIG_X86_KPTI */
swapgs
sysretq
_bad_syscall:
/* RAX had a bogus syscall value in it... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:7 | z_x86_user_string_nlen_fault_start:
cmpb $0x0, (%rdi, %rax, 1) /* *(RDI + RAX) == 0? Could fault. */
.global z_x86_user_string_nlen_fault_end
z_x86_user_string_nlen_fault_end:
je strlen_done
cmp %rsi, %rax /* Max length reached? */
je strlen_done
inc %rax /* EAX++ and loop again */
jmp strlen_loop
strlen_don... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:8 | /* RCX is sysret return address, pass along p3 in r10,
* z_x86_userspace_landing_site will fix this up
*/
movq %rcx, %r10
/* switch to privilege mode stack so we can erase thread stack buffer,
* the buffer is the page immediately before the thread stack
*/
movq %r9, %rsp
/* Push callee-saved regs and go b... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 281 | 337 |
zephyrproject-rtos/zephyr:arch/x86/core/intel64/userspace.S:9 | xorq %r13, %r13
xorq %r14, %r14
xorq %r15, %r15
cli
#ifdef CONFIG_X86_KPTI
/* Switch to thread's page table. We have free registers so no need
* to involve the trampoline stack.
*/
movq %gs:__x86_tss64_t_cpu_OFFSET, %rax
movq ___cpu_t_current_OFFSET(%rax), %rax
movq _thread_offset_to_ptables(%rax), %rax
m... | x86_64 | gas-att | handwritten | zephyrproject-rtos/zephyr | arch/x86/core/intel64/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/core/intel64/userspace.S | 321 | 337 |
zephyrproject-rtos/zephyr:arch/x86/include/cet_asm.inc:1 | /*
* Copyright (c) 2017-2025 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#ifndef CONFIG_X86_64
/* Save SSP restore on current shadow stack. It takes care of aligning the
* shadow stack token to 8 bytes boundary. First scratch will contain current
* SSP after the macro finishes.
* r0 - scratc... | x86_64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/x86/include/cet_asm.inc | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/x86/include/cet_asm.inc | 1 | 40 |
zephyrproject-rtos/zephyr:arch/xtensa/core/crt1.S:4 | * (they'll be wiped out by the following BSS clear), nor can it
* assume they are yet initialized to zero.
*
* The __memmap_init() function is optional. It is marked as a
* weak symbol, so that it gets valued zero if not defined.
*/
.weak __memmap_init
movi a4, __memmap_init
beqz a4, 1f
CALLX a4
1:
... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/crt1.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/crt1.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/xtensa/core/crt1.S:5 | s32i a0, a8, 0 /* clear 4 bytes to make len multiple of 8 */
addi a8, a8, 4
.L1zte: bbci.l a10, 3, .L2zte
s32i a0, a8, 0 /* clear 8 bytes to make len multiple of 16 */
s32i a0, a8, 4
addi a8, a8, 8
.L2zte: srli a10, a10, 4 /* len is now multiple of 16, divide by 16 */
floopnez a10, clearzte
s32i a0, a8, 0 /* cle... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/crt1.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/crt1.S | 161 | 184 |
zephyrproject-rtos/zephyr:arch/xtensa/core/crt1.S:4 | *
* NOTE: This hook works where the reset vector does not unpack
* segments (see "ROM packing" in the LSP manual), or where
* unpacking of segments is not affected by memory remapping.
* If ROM unpacking is affected, TLB setup must be done in
* assembler from the reset vector.
*
* The __memmap_init... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/crt1.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/xtensa/core/crt1.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/xtensa/core/crt1.S:5 | */
movi a6, _bss_table_start
movi a7, _bss_table_end
bgeu a6, a7, .L3zte
.L0zte: l32i a8, a6, 0 /* get start address, assumed multiple of 4 */
l32i a9, a6, 4 /* get end address, assumed multiple of 4 */
addi a6, a6, 8 /* next entry */
sub a10, a9, a8 /* a10 = length, assumed a multiple of 4 */
bbci.l a... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/crt1.S | Apache-2.0 | 94ed533c31ee1dde8117e995630e27373927a17c | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/94ed533c31ee1dde8117e995630e27373927a17c/arch/xtensa/core/crt1.S | 161 | 194 |
zephyrproject-rtos/zephyr:arch/xtensa/core/debug_helpers_asm.S:1 | /*
* Copyright (c) 2020 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <xtensa/coreasm.h>
#include <xtensa/corebits.h>
#include <xtensa/config/system.h>
#include <xtensa/hal.h>
#include <xtensa_asm2_context.h>
#include <zephyr/offsets.h>
.section .iram1, "ax"
.ali... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/debug_helpers_asm.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/debug_helpers_asm.S | 1 | 40 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:2 | .size __start, . - __start
#if XCHAL_HAVE_HALT
/*
* Xtensa TX: reset vector segment is only 4 bytes, so must place the
* unpacker code elsewhere in the memory that contains the reset
* vector.
*/
#if XCHAL_RESET_VECTOR_VADDR == XCHAL_INSTRAM0_VADDR
.section .iram0.text, "ax"
#elif XCHAL_RESET_VECTOR_VADDR... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:3 | .begin no-absolute-literals
/*
* If we have dynamic cache way support, init the caches as soon
* as we can, which is now. Except, if we are waking up from a
* PSO event, then we need to do this slightly later.
*/
#if XCHAL_HAVE_ICACHE_DYN_WAYS || XCHAL_HAVE_DCACHE_DYN_WAYS
# if XCHAL_HAVE_PSO_CDM && !XCHAL_HA... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:4 | #if XCHAL_USE_MEMCTL
/* Load saved MEMCTL value */
l32i a4, a3, CS_SA_memctl
movi a0, ~MEMCTL_INV_EN
/* Clear invalidate bit */
and a0, a4, a0
wsr a0, MEMCTL
#endif
j .Lwarm_start
.Lcold_start:
#if XCHAL_HAVE_ICACHE_DYN_WAYS || XCHAL_HAVE_DCACHE_DYN_WAYS
/*
* Enable and invalidate all ways of both caches. I... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:6 | # if XCHAL_HW_MIN_VERSION < XTENSA_HWVERSION_RA_2004_1
/*
* Starting in Xtensa LX, ICOUNTLEVEL resets to zero (not 15), so no
* need to initialize it. Prior to that we do, otherwise we get an
* ICOUNT exception, 2^32 instructions after reset.
*/
/* are we being debugged? (detected by ICOUNTLEVEL not 15, ... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:7 | * a3 - pointer to save area base address (xthal_pso_savearea)
* a5 - saved state signature (CORE_STATE_SIGNATURE)
* a7 - contents of PWRSTAT register
*/
/* load save area signature */
l32i a4, a3, CS_SA_signature
/* compare signature with expected one */
sub a4, a4, a5
# if XTOS_PSO_TEST
/* pretend PSO warm... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:8 | movi a2, _ResetSync /* address of sync variable */
rsr.prid a3 /* core and multiprocessor ID */
extui a3, a3, 0, 8 /* extract core ID (FIXME: need proper
* constants for PRID bits to extract) */
beqz a2, .Ldonesync /* skip if no sync variable */
bnez a3, .Ldonesync /* only do this on core 0 */
s32i a... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 281 | 340 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:10 | .Lcoldstart:
#endif
#if XCHAL_HAVE_PREFETCH
/* Enable cache prefetch if present. */
movi a2, XCHAL_CACHE_PREFCTL_DEFAULT
wsr a2, PREFCTL
#endif
/*
* Now setup the memory attributes. On some cores this "enables"
* caches. We do this ahead of unpacking, so it can proceed more
* efficiently.
*
* The... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 361 | 420 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:11 | .popsection
/*
* We assume reset state: all MPU entries zeroed and disabled.
* Otherwise we'd need a loop to zero everything.
*/
/* note: absolute symbol, not a ptr */
movi a2, _memmap_cacheattr_reset
movi a3, _xtos_mpu_attribs
movi a4, 0x20000000 /* 512 MB delta */
movi a6, 8
movi a7, 1 /* MPU entry va... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 401 | 460 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:12 | wsr.cacheadrdis a9 /* update cacheadrdis */
#elif XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR \
|| XCHAL_HAVE_XLT_CACHEATTR \
|| (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY)
/* note: absolute symbol, not a ptr */
movi a2, _memmap_cacheattr_reset
/* set CACHEATTR from a2 (clobbers a3-a8) */
cacheatt... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 441 | 500 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:13 | #endif /* !XCHAL_HAVE_HALT */
/*
* Unpack code and data (eg. copy ROMed segments to RAM, vectors into
* their proper location, etc).
*/
#if defined(XTOS_UNPACK)
movi a2, _rom_store_table
beqz a2, unpackdone
unpack: l32i a3, a2, 0 /* start vaddr */
l32i a4, a2, 4 /* end vaddr */
l32i a5, a2, 8 /* store... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 481 | 540 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:16 | /* wait for WSR to CPENABLE to complete before accessing FP coproc
* state
*/
rsync
wur a0, FCR /* clear FCR (default rounding mode, round-nearest) */
wur a0, FSR /* clear FSR */
# endif
#endif /* pre-LX2 */
/*
* Initialize memory error handler address.
* Putting this address in a register allows multip... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 601 | 660 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:17 | movi a4, _Level&level&FromVector
wsr a4, EXCSAVE+\level
.if GREATERTHAN(\level,XCHAL_EXCM_LEVEL)
movi a5, _Pri_&level&_HandlerAddress
s32i a4, a5, 0
/* If user provides their own handler, that handler might
* not provide its own _Pri_<n>_HandlerAddress variable for
* linking ha... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 641 | 700 |
zephyrproject-rtos/zephyr:arch/xtensa/core/startup/reset_vector.S:18 | */
call0 _start /* jump to _start (in crt1-*.S) */
/* does not return */
#else /* XCHAL_HAVE_HALT */
j _start /* jump to _start (in crt1-*.S) */
/* (TX has max 64kB IRAM, so J always in range) */
/* Paranoia -- double-check requirements / assumptions of this Xtensa
* TX code:
*/
# if !defined(__XTENS... | arm64 | gas-like | macro-heavy | zephyrproject-rtos/zephyr | arch/xtensa/core/startup/reset_vector.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/startup/reset_vector.S | 681 | 714 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:1 | /*
* Copyright (c) 2022, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <xtensa_asm2.inc.S>
#include <zephyr/offsets.h>
#include <offsets_short.h>
#include <zephyr/syscall.h>
#include <zephyr/zsr.h>
#include <xtensa/config/core-isa.h>
/**
* syscall number arg1, arg2, arg3, arg4, arg5... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 1 | 60 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:2 | * so we won't be leaking which ring we are in
* right now.
*/
beqz a2, _is_user_context_return
movi a2, 1
_is_user_context_return:
rsr a0, ZSR_A0SAVE
rfe
_not_checking_user_context:
rsr a2, ZSR_SYSCALL_SCRATCH
#endif
/* Need to disable any interrupts while we are saving
* register content to avoid any ... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:3 | * the instruction after it. We need to increment it to
* execute the next instruction when we return.
* The instruction size is 3 bytes, so lets just add it.
*/
rsr.epc1 a3
addi a3, a3, 3
s32i a3, a0, ___xtensa_irq_bsa_t_pc_OFFSET
/* Need to setup PS so we can spill all registers.
* EXCM and RING bits need... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:4 | movi a3, _k_syscall_table
addx4 a2, a2, a3
l32i a2, a2, 0
#if XCHAL_HAVE_THREADPTR
/* Clear up the threadptr because it is used
* to check if a thread is running on user mode. Since
* we are in a interruption we don't want the system
* thinking it is possibly running in user mode.
*/
#ifdef CONFIG_THREAD_LO... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:5 | * Subtract 16 bytes as stack needs to be 16-byte aligned.
*/
mov a3, a1
addi a1, a1, -16
s32i a3, a1, 0
l32i a3, a1, 16
l32i a7, a3, ___xtensa_irq_bsa_t_a3_OFFSET
/* Since we are unmasking EXCM, we need to set RING bits to kernel
* mode, otherwise we won't be able to run the exception handler in C.
*/
m... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:6 | #if XCHAL_HAVE_THREADPTR
#ifdef CONFIG_THREAD_LOCAL_STORAGE
l32i a3, a1, ___xtensa_irq_bsa_t_threadptr_OFFSET
movi a0, is_user_mode@tpoff
add a0, a3, a0
movi a3, 1
s32i a3, a0, 0
#endif
#endif /* XCHAL_HAVE_THREADPTR */
l32i a3, a1, ___xtensa_irq_bsa_t_ps_OFFSET
wsr.ZSR_EPS a3
l32i a3, a1, ___xtensa_irq_bsa_t... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 201 | 260 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:7 | .align 4
xtensa_userspace_enter:
/* Call entry to set a bit in the windowstart and
* do the rotation, but we are going to set our own
* stack.
*/
entry a1, 16
SPILL_ALL_WINDOWS
/* We have to switch to kernel stack before spill kernel data and
* erase user stack to avoid leak from previous context.
*/
m... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 241 | 300 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:8 | #endif
#if XCHAL_HAVE_THREADPTR
#ifdef CONFIG_THREAD_LOCAL_STORAGE
rur.threadptr a3
movi a0, is_user_mode@tpoff
add a0, a3, a0
movi a3, 1
s32i a3, a0, 0
#else
rsr a3, ZSR_CPU
l32i a3, a3, ___cpu_t_current_OFFSET
wur.THREADPTR a3
#endif
#endif /* XCHAL_HAVE_THREADPTR */
/* Set now z_thread_entry parameters, w... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 281 | 331 |
zephyrproject-rtos/zephyr:arch/xtensa/core/userspace.S:9 | #ifdef CONFIG_XTENSA_MPU
/* MPU only has RING 0 and 1. */
movi a0, PS_WOE|PS_CALLINC(1)|PS_UM|PS_RING(1)
#endif
wsr.ZSR_EPS a0
/* Wipe out a0 (thre is no return from this function */
movi a0, 0
rfi ZSR_RFI_LEVEL | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/userspace.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/userspace.S | 321 | 331 |
zephyrproject-rtos/zephyr:arch/xtensa/core/window_vectors.S:2 | *
* Invoked if a call[i] referenced a register (a4-a15)
* that contains data from ancestor call[j];
* call[j] had done a call4 to call[j+1].
* On entry here:
* window rotated to call[j] start point;
* a0-a3 are registers to be saved;
* a4-a15 must be preserved;
* a5 is call[j+1]'s stack pointer.
*/... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/window_vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/window_vectors.S | 41 | 100 |
zephyrproject-rtos/zephyr:arch/xtensa/core/window_vectors.S:3 | l32e a3, a5, -4 /* restore a3 from call[i+1]'s stack frame */
rfwu
/* Handle alloca exception generated by interruptee executing 'movsp'.
* This uses space between the window vectors, so is essentially
* "free". All interruptee's regs are intact except a0 which is saved
* in $ZSR_A0SAVE (assigned at bu... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/window_vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/window_vectors.S | 81 | 140 |
zephyrproject-rtos/zephyr:arch/xtensa/core/window_vectors.S:4 | * call[j] had done a call8 to call[j+1].
* On entry here:
* window rotated to call[j] start point;
* a0-a7 are registers to be saved;
* a8-a15 must be preserved;
* a9 is call[j+1]'s stack pointer.
*/
.org 0x80
.global _WindowOverflow8
_WindowOverflow8:
s32e a0, a9, -16 /* s... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/window_vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/window_vectors.S | 121 | 180 |
zephyrproject-rtos/zephyr:arch/xtensa/core/window_vectors.S:5 | l32e a0, a9, -16 /* restore a0 from call[i+1]'s stack frame */
l32e a1, a9, -12 /* restore a1 from call[i+1]'s stack frame */
l32e a2, a9, -8 /* restore a2 from call[i+1]'s stack frame */
l32e a7, a1, -12 /* a7 <- call[i-1]'s sp
(used to find end o... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/window_vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/window_vectors.S | 161 | 220 |
zephyrproject-rtos/zephyr:arch/xtensa/core/window_vectors.S:6 | s32e a8, a0, -32 /* save a8 to end of call[j]'s stack frame */
s32e a9, a0, -28 /* save a9 to end of call[j]'s stack frame */
s32e a10, a0, -24 /* save a10 to end of call[j]'s stack frame */
s32e a11, a0, -20 /* save a11 to end of call[j]'s stack frame */
rfwo ... | arm64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/window_vectors.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/window_vectors.S | 201 | 242 |
zephyrproject-rtos/zephyr:arch/xtensa/core/xtensa_asm2_util.S:1 | /*
* Copyright (c) 2017, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <xtensa_asm2.inc.S>
#include <zephyr/offsets.h>
#include <zephyr/zsr.h>
#if defined(CONFIG_SIMULATOR_XTENSA) || defined(XT_SIMULATOR)
#include <xtensa/simcall.h>
#endif
/*
* xtensa_spill_reg_windows
*
* Spill all reg... | x86_64 | gas-like | handwritten | zephyrproject-rtos/zephyr | arch/xtensa/core/xtensa_asm2_util.S | Apache-2.0 | 5e802fe73d979b1e0aa9d675429be303a0d2e7b2 | github | rtos | https://github.com/zephyrproject-rtos/zephyr/blob/5e802fe73d979b1e0aa9d675429be303a0d2e7b2/arch/xtensa/core/xtensa_asm2_util.S | 1 | 60 |
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