text stringlengths 14 100k | source stringclasses 1
value | repo stringclasses 810
values | language stringclasses 13
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|---|---|---|---|
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/cache.h>
#include <zephyr/arch/xtensa/arch.h>
#include <zephyr/arch/xtensa/xtensa_mmu.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/logging/log.h>
#include <zephyr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> register uintptr_t r6 __asm__("%a5") = arg4;
__asm__ volatile(SEMIHOST_INSTR
: "=r"(r2)
: "r"(r2), "r"(r3), "r"(r4), "r"(r5), "r"(r6)
: "memory");
return r2;
}
#endif /* CONFIG_SIMULATOR_XTENSA */
static inline uintptr_t xtensa_semihost_call_3(uintptr_t arg1, uintptr_t arg2, uintptr_t ar... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>emove) continuous NOPs.
* So force no optimization to avoid that.
*/
__no_optimization
void arch_spin_relax(void)
{
#define NOP1(_, __) __asm__ volatile("nop.n;");
LISTIFY(CONFIG_XTENSA_NUM_SPIN_RELAX_NOPS, NOP1, (;))
#undef NOP1
}
#endif /* CONFIG_XTENSA_MORE_SPIN_RELAX_NOPS */
/**
* init for multi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <zephyr/arch/xtensa/syscall.h>
#include <zephyr/internal/syscall_handler.h>
#include <zephyr/llext/symbol.h>
#include<|fim_suffix|>r" (a4),
"r" (a5)
: "memory");
return a2;
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017, 2023 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <string.h>
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <xtensa_asm2_context.h>
#include <xtensa_internal.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ULL;
}
<|fim_prefix|>/* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
void arch_timing_init(void)
{
}
void arch_ti<|fim_middle|>ming_start(void)
{
}
void arch_timing_stop(void)
{
}
uint64_t arch_timing_freq_get(void)
{
return CONFIG_XTENSA_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>) * 2;
/*
* Set thread TLS pointer which is used in
* context switch to point to TLS area.
*/
new_thread->tls = POINTER_TO_UINT(stack_ptr);
return (z_tls_data_size() + (sizeof(uintptr_t) * 2));
}
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "xtensa/corebits.h"
#include <string.h>
#include <xtensa_asm2_context.h>
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <kswap.h>
#include <zephyr/toolchain.h>
#include <zephyr/logging/log.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Int<|fim_suffix|>* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
__weak int atexit(void (*function)(void))
{
ARG_UNUSED(function);
return 0;
}
<|fim_middle|>el Corporation
*
<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>G_EXCEPTION_DUMP_HOOK_ONLY)
printk("0x%08x:0x%08x ", xtensa_cpu_process_stack_pc(stk_frame.pc), stk_frame.sp);
#endif
}
/* Print backtrace termination marker */
int ret = 0;
#if defined(CONFIG_XTENSA_BACKTRACE_EXCEPTION_DUMP_HOOK)
if (corrupted) {
arch_exception_call_dump_hook("CORRUPTED");
re... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ite them back
* later on top of the stack's legitimate owner!
*
* This work comes in two flavors. In interrupts, the
* outgoing context has already been saved for us, so we can
* do the flush right here. In direct context switches, we
* are still using the stack, so we do the invalidate of t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 I<|fim_suffix|>OFFSET)
#define _k_mem_domain_offset_to_arch_reg_ptevaddr \
(__k_mem_domain_t_arch_OFFSET + __arch_mem_domain_t_reg_ptevaddr_OFFSET)
#define _k_mem_domain_offset_to_arch_reg_ptepin_as \
(__k_mem_domain_t_arch_OFFSET + __arch_mem_domain_t_reg_ptepin_as_OFFSET)
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_INCL<|fim_suffix|>nterrupted stack pointer points here
*
* SP-4 Caller A3 spill slot \
* SP-8 Caller A2 spill slot |
* SP-12 Caller A1 spill slot + (Part of ABI standard)
* SP-16 ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_CORE_INCLUDE_XTENSA_BACKTRACE_H_
#define ZEPHYR_ARCH_XTENSA_CORE_INCLUDE_XTENSA_BACKTRACE_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __ASSEMBLER__
#include <s... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2026 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_EXC_H_
#define ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_EXC_H_
/**
* @ingroup xtensa_internal_apis
* @{
*/
/** Custom EXCCAUSE code used to indicate Zephyr exception (e.g. assert) */
#define... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2014 Wind River Systems, Inc.
* Copyright (c) 2016 Cadence Design Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_INTERNAL_H_
#define ZEPHYR_ARCH_XTENSA_INCLUDE_XTENSA_INTERNAL_H_
#include <stdint.h>
#include <zephyr/arch/xtensa... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Xtensa MMU support
*
* Private data declarations
*
* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_XTENSA_MMU_PRIV_H_
#define ZEPHYR_ARCH_XTENSA_XTENSA_MMU_PRIV_H_
#include <stdint.h>
#include <xtensa/config/core-isa.h>
#include <zep... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>enb_read(void)
{
uint32_t mpuenb;
__asm__ __volatile__("rsr.mpuenb %0" : "=a" (mpuenb));
return mpuenb;
}
/**
* @brief Write MPUENB register.
*
* This writes the enable bits for MPU entries.
*
* @param mpuenb Value to be written.
*/
static ALWAYS_INLINE void xtensa_mpu_mpuenb_write(uint32_t mp... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_XTENSA_XTENSA_STACK_H_
#define ZEPHYR_ARCH_XTENSA_XTENSA_STACK_H_
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <xtensa_asm2_context.h>
/**
* @defgroup xtensa_stack_int... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Linaro Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#i<|fim_suffix|>pios);
const struct gpio_dt_spec rf2 =
GPIO_DT_SPEC_GET(DT_NODELABEL(rf_switch), rf2_gpios);
const struct gpio_dt_spec rf3 =
GPIO_DT_SPEC_GET(DT_NODELABEL(rf_switch), rf3_gpios);
/* configure RFSW8... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>Ds for each logical CPU */
uint8_t x86_cpu_loapics[] = { 0x00, 0x02, 0x04, 0x06 };
<|fim_prefix|>/*
* Copyright (c) 2021 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#inc<|fim_middle|>lude <stdint.h>
/* Local APIC I<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021-2022 Actinius
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/logging/log.h>
#if DT_HAS_COMPAT_STATUS_OKAY(actinius_sim_select) \
|| DT_HAS_COMPAT_STATUS_OKAY(actinius_charge... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Leon Rinkel <leon@rinkel.me>
* Copyright (c) 2025 Philipp Steiner <philipp.steiner1987@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*
* Automatically turns on backlight if display is configured, i.e. display DT
* node has status okay.
*/
#include <zephyr/devicetree.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>HAS_STATUS(DISPLAY_NODE, okay)
static const struct gpio_dt_spec backlight = GPIO_DT_SPEC_GET(DT_ALIAS(backlight), gpios);
#endif
void board_late_init_hook(void)
{
#if DT_NODE_HAS_STATUS(DISPLAY_NODE, okay)
if (gpio_is_ready_dt(&backlight)) {
gpio_pin_configure_dt(&backlight, GPIO_OUTPUT_ACTIVE);
}
#e... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2024 Leon Rinkel <leon@rinkel.me>
*
* SPDX-License-Identifier: Apache-2.0
*
* Automatically turns on backlight if display is configured, i.e. display DT
* node has status okay.
*/
#include <zephyr/devicetree.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/init.h>
#define DISPLAY_NODE DT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 LEDCity AG.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
/* External edge connector pin mappings to nRF52 GPIO pin numb<|fim_suffix|>alog in */
#define EXT_A2_GPIO_PIN 4 /* P4, Analog in */
#define EXT_A3_GPIO_PIN 5 /* P5,... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>gr_clock_config(AM_HAL_CLKMGR_CLK_ID_HFRC2,
AM_HAL_CLKMGR_HFRC2_FREQ_FREE_RUN_APPROX_250MHZ, NULL);
}
<|fim_prefix|>/*
* Copyright 2025 Ambiq Micro Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <am_mcu_apollo.h>
#if DT_HAS_CHOSEN... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Jefferson Lee.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
static int board_init(void)
{
int res;
static const struct gpio_dt_spec pull_up<|fim_suffix|>C_GET(DT_PATH(zephyr_user), pull_up_gpios);
static const struct... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>L_1 to be executed before the standard STM clock
* setup code.
*/
LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOH);
LL_GPIO_SetPinMode(GPIOH, LL_GPIO_PIN_1, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinSpeed(GPIOH, LL_GPIO_PIN_1, LL_GPIO_SPEED_FREQ_LOW);
LL_GPIO_SetPinOutputType(GPIOH, LL_GPIO_PIN_1, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>lock_control_on(cam_ext_clk_dev, (clock_control_subsys_t)0);
if (ret < 0) {
LOG_ERR("Failed to enable camera external clock error: (%d)", ret);
return ret;
}
ret = clock_control_get_rate(cam_ext_clk_dev, (clock_control_subsys_t)0, &rate);
if (ret < 0) {
LOG_ERR("Failed to get camera external cl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>-2.0
*/
#ifndef __ARDUINO_OPTA_BOARD_H
#define __ARDUINO_OPTA_BOARD_H
#include <stdint.h>
#define OPTA_OTP_MAGIC 0xB5
#define OPTA_SERIAL_NUMBER_SIZE 24
struct __packed opta_board_info {
uint8_t magic;
uint8_t version;
union {
uint16_t board_functionalities;
struct {
uint8_t wifi: 1;
ui... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 DNDG srl
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/init.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_gpio.h>
static int board_gpio_init(void)
{
/* The external oscillator that drives the HSE clock should be enabled
* by setting ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>l_number[0], HAL_GetUIDw0());
uint32tohex(&serial_number[8], HAL_GetUIDw1());
uint32tohex(&serial_number[16], HAL_GetUIDw2());
}
return serial_number;
}
<|fim_prefix|>/*
* Copyright (c) 2024 DNDG srl
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/devicetr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>k_enable, POST_KERNEL, CONFIG_CLOCK_CONTROL_PWM_INIT_PRIORITY);
#endif
<|fim_prefix|>/*
* Copyright 2025 Arduino SA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/logging/log.h>
LOG_MODULE_RE... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Benjamin Björnsson <benjamin.bjornsson@gmail.com>.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
static int board_init(void)
{
/* Set led1 inactive since the Arduino bootloader leaves it active */
const struct gpio_dt_spec led1 = GP... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/sys/atomic.h>
#include <zephyr/toolchain.h>
/*
* ARM64 atomic operations with explicit YIELD hints, for FVP.
*
* This is a workaround for the FastModel's quantum-based execution model,
* not for any ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2021 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
extern void wakeup_cpu1(void);
int main(void)
{
/* Simply wake-up the remote core */
wakeup_cpu1();
while (1) {
}
return 0;
}
<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include <zephyr/sys/sys_io.h>
#define IOMUX_MAIN_INSEL (0x68 >> 2)
#define IOMUX_MAIN_OUTSEL (0x70 >> 2)
#define IOMUX_MAIN_OENSEL (0x7... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> for LEDS */
scc[IOMUX_ALTF1_OUTSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
scc[IOMUX_ALTF1_OENSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
scc[IOMUX_ALTF2_OUTSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
scc[IOMUX_ALTF2_OENSEL] &= ~(BIT(2) | BIT(3) | BIT(4));
}
#endif
static int arm_musca_pinmux_init(void)
{
arm_musca_s1... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>EXT_P4_GPIO_PIN 5 /* P4, Analog in, LED Col 2 */
#define EXT_P5_GPIO_PIN 17 /* P5, Button A */
#define EXT_P6_GPIO_PIN 12 /* P6, LED Col 9 */
#define EXT_P7_GPIO_PIN 11 /* P7, LED Col 8 */
#define EXT_P8_GPIO_PIN 18 /* P8 */
#define EXT_P9_GPIO_PIN 10 /* P9, LED Col 7 */
#de... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Florin Stancu
* Copyright (c) 2021 Jason Kridner, BeagleBoard.org Foundation
* Copyright (c) 2024 Ayush Singh <ayush@beagleboard.org>
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Implements the RF driver callback to configure the on-board antenna
* switch.
*/
#define ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>int board_init(void)
{
/*
* Automatically select normal mode unless the DAPLink shield is fitted
* in which case the CPU will have the off-board QSPI NOR flash
* memory-mapped at 0x0.
*/
if (!board_daplink_is_fitted()) {
board_daplink_qspi_mux_select(
BOARD_DAPLINK_QSPI_MUX_MODE_NORMAL);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
enum board_daplink_qspi_mux_mode {
/* eXecute-In-Place mode */
BOARD_DAPLINK_QSPI_MUX_MODE_XIP,
/* Normal mode */
BOARD_DAPLINK_QSPI_MUX_MO... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Grant Ramsay <grant.ramsay@hotmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.<|fim_suffix|>PIO_OUTPUT_INIT_HIGH);
return res;
}
SYS_INIT(board_esp32_ethernet_kit_init, PRE_KERNEL_2, CONFIG_GPIO_INIT_PRIORITY);
<|f... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {
;
}
/* a reset is required for changes to take effect */
NVIC_SystemReset();
}
}
<|fim_prefix|>/*
* Copyright (c) 2018 Nordic Semiconductor ASA.
* Copyright (c) 2025 Ezurio... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/init.h>
#define VEXT_PIN DT_GPIO_PIN(DT_NODELABEL(vext), gpios)
#define OLED_RST DT_GPIO_PIN(DT_NODELABEL(oledrst), gp... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_0_region_info_storage[7],
&sfdp_slave_slot_0_region_info_storage[8],
&sfdp_slave_slot_0_region_info_storage[9],
&sfdp_slave_slot_0_region_info_storage[10],
&sfdp_slave_slot_0_region_info_storage[11],
&sfdp_slave_slot_0_region_info_storage[12],
&sfdp_slave_slot_0_region_info_storage[13],
&sfdp_slav... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-FileCopyrightText: <text>Copyright (c) 2026 Infineon Technologies AG,
* or an affiliate of Infineon Technologies AG. All rights reserved.</text>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef QSPI_MEMSLOT_H
#de<|fim_suffix|>OT_H
#include "cy_smif_memslot.h"
/* Slave Select Pin */
#de... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019, MADMACHINE LIMITED
*
* refer to hal_nxp board file
*
* SPDX-Li<|fim_suffix|>),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD,
0x06, READ_SDR,
FLEXSPI_4PAD, 0x04),
},
},
.page_size = 256u,
.sector_size = 4u * 1024u,
.block_size = 256u * 1024u,
.is_uniform_block_s... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021, MADMACHINE LIMITED
*
* refer to hal_nxp board file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/types.h>
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
#if def... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019, MADMACHINE LIMITED
*
* refer to hal_nxp board f<|fim_suffix|>00MHZ,
.sflash_a1_size = 8u * 1024u * 1024u,
.lookup_table = {
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
0xEB, RADDR_SDR,
FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD,
0x06, READ_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019, MADMACHINE LIMITED
*
* refer to hal_nxp board file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/types.h>
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
#if def... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2015 Intel Corporation
*
* SPDX-License-Identifier: Apache-<|fim_suffix|>clude <soc.h>
#endif /* __INC_BOARD_H */
<|fim_middle|>2.0
*/
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
#in<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>#!/usr/bin/env python3
#
# Copyright (c) 2023 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
'''
This script allows flashing a mec172xevb_assy6906 board
attached to a remote system.
Usage:
west flash -r misc-flasher -- mec172x_remote_flasher.py <remote host>
Note:
1. SSH access to remote h... | fim | zephyrproject-rtos/zephyr | python |
<|fim_prefix|>/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include <ctype.h>
#include <zephyr/toolchain.h>
#include <posix_native_task.h>
#include <nsi_cmdline_main_if.h>
#include <nsi_host_trampolines.h>
#include <nsi_tracing.h>
static void remo... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>tch
*
* Note that this convention is changed relative to the ARM and x86 archs
*
* All pre/post irq work of the interrupt is handled in the board
* posix_irq_handler() both for direct and normal interrupts together
*/
#define ARCH_ISR_DIRECT_DECLARE(name) \
static inline int name##_body(void); \
i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> 1);
NATIVE_TASK(sdl_cleanup, ON_EXIT, 2);
K_THREAD_DEFINE(sdl, CONFIG_ARCH_POSIX_RECOMMENDED_STACK_SIZE,
sdl_handle_events, NULL, NULL, NULL,
CONFIG_SDL_THREAD_PRIORITY, K_ESSENTIAL, 0);
<|fim_prefix|>/*
* Copyright (c) 2018 Jan Van Winkel <jan.van_winkel@dxplore.eu>
*
* SPDX-License-Identifier: ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>rn 0;
}
/*
* Initialize the SDL library
*
* Returns 0 on success, something else on failure.
*/
int sdl_init_video(void)
{
return SDL_Init(SDL_INIT_VIDEO);
}
/*
* Trampoline to SDL_GetError
*/
const char *sdl_get_error(void)
{
return SDL_GetError();
}
/*
* Trampoline to SDL_Quit()
*/
void sdl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef BOARDS_POSIX_COMMON_SDL_SDL_EVENTS_BOTTOM_H
#define BOARDS_POSIX_COMMON_SDL_SDL_EVENTS_BOTTOM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Note: None of these functions are public interfaces. But internal to the SDL event handling */
int sdl_ha... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyrig<|fim_suffix|>/
#ifndef BOARDS_POSIX_NATIVE_SIM_BOARD_IRQ_H
#define BOARDS_POSIX_NATIVE_SIM_BOARD_IRQ_H
#include "../common/irq/board_irq.h"
#endif /* BOARDS_POSIX_NATIVE_SIM_BOARD_IRQ_H */
<|fim_middle|>ht (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*<|end... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Oticon <|fim_suffix|>D_SOC_H
#define BOARDS_POSIX_NATIVE_SIM_BOARD_SOC_H
#include "nsi_cpu0_interrupts.h"
#define NSOS_IRQ 3
#endif /* BOARDS_POSIX_NATIVE_SIM_BOARD_SOC_H */
<|fim_middle|>A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>s(int *argc, char ***argv)
{
nsi_get_cmd_line_args(argc, argv);
}
void native_get_test_cmd_line_args(int *argc, char ***argv)
{
nsi_get_test_cmd_line_args(argc, argv);
}
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "nsi_cmdline.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-Lice<|fim_suffix|>ine
* arguments
*/
void native_get_cmd_line_args(int *argc, char ***argv);
void native_get_test_cmd_line_args(int *argc, char ***argv);
void native_add_command_line_opts(struct args_struct_t *... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>refore the whole Zephyr) during usec_to_waste
*
* Very similar to arch_busy_wait(), but if an interrupt or context switch
* occurs this function will continue waiting after, ensuring that
* usec_to_waste are spent in this context, irrespectively of how much more
* time would be spent on interrupt han... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>/* CONFIG_IRQ_OFFLOAD */
<|fim_prefix|>/*
* Copyright (c) 2014 Wind River Systems, Inc.
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*
* SW side of the IRQ handling
*/
#include <stdint.h>
#include <zephyr/irq_offload.h>
#inc... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_IRQ_HANDLER_H
#define BOARDS_POSIX_NATIVE_SIM_IRQ_HANDLER_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
void posix_sw_set_pending_IRQ(unsign... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "posix_native<|fim_suffix|>DOWN_TO_REAL_TIME */
<|fim_middle|>_task.h"
#include "nsi_timer_model.h"
#if defined(CONFIG_NATIVE_SIM_SLOWDOWN_TO_REAL_TIME)
static void set_realtime_default(void)
{
hwt... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <posix_native_task.h>
#include <nsi_cpu_if.h>
void nsif_cpu0_pre_cmdline_hooks(void)
{
run_native_tasks(_NATIVE_PRE_BOOT_1_LEVEL);
}
void nsif_cpu0_pre_hw_init_hooks(void)
{
run_native_tasks(_N... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ble_args;
va_start(variable_args, format);
nsi_vprint_trace(format, variable_args);
va_end(variable_args);
}
int posix_trace_over_tty(int file_number)
{
return nsi_trace_over_tty(file_number);
}
uint64_t posix_get_hw_cycle(void)
{
return nsi_hws_get_time();
}
<|fim_prefix|>/*
* Copyright (c) 2023... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>clude "posix_board_if.h"
void sys_arch_reboot(int type)
{
(void)type;
native_set_reboot_on_exit();
posix_exit(0);
}
<|fim_prefix|>/*
* Copyright (c) 2025 GARDENA GmbH
* Copyright (c) 2025 No<|fim_middle|>rdic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "reboot_bottom.h"... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 GARDENA GmbH
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include <errno.h>
#include <string.h>
#include <unistd.h>
#include <nsi_main.h>
#include <nsi_tasks.h>
#include <nsi_tracing.h>
#include <nsi_cmdline.h>... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>E_NATIVE_SIM_REBOOT_BOTTOM_H
#ifdef __cplusplus
extern "C" {
#endif
void native_set_reboot_on_exit(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_NATIVE_NATIVE_SIM_REBOOT_BOTTOM_H */
<|fim_prefix|>/*
* Copyright (c) 2025 GARDENA GmbH
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-Lice... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include <stdlib.h>
#include "bs_tracing.h"
#include "bstests.h"
#include "bs_cmd_line.h"
#include "bs_dynargs.h"
#include "posix_native_task.h"
#include "nsi_tracing.h"
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>sts */
#endif
<|fim_prefix|>/*
* Copyright (c) 2017 Oticon A/S
*
<|fim_middle|> * SPDX-License-Identifier: Apache-2.0
*/
#ifndef BSIM_NRF_ARGS_H
#define BSIM_NRF_ARGS_H
#include "bsim_args_runner.h"
/* This header is present to avoid breaking backwards compatibility with old bsim te<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>.h"
#ifdef __cplusplus
extern "C" {
#endif
void nrfbsim_WFE_model(void);
void nrfbsim_SEV_model(void);
#define IRQ_ZERO_LATENCY BIT(1) /* Unused in this board*/
#define IRQ_PRIO_LOWEST UINT8_MAX
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_NRF52_BSIM_BOARD_IRQ_H */
<|fim_prefix|>/*
* Copyrigh... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>s
}
#endif
#endif /* BOARDS_POSIX_NRF_BSIM_BOARD_SOC_H */
<|fim_prefix|>/*
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file Extra definitions provided by the board to soc.h
*
* Background:
* The POSIX ARCH/SOC/board layering is different than in normal archs
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>l_args.p_id = (char *)default_phy;
}
if (global_args.rseed == UINT_MAX) {
global_args.rseed = 0x1000 + global_args.device_nbr;
}
bs_random_init(global_args.rseed);
}
NSI_TASK(postcheck_cmd_line, PRE_BOOT_2, 0);
/*
* Get the simulation id
*/
char *bsim_args_get_simid(void)
{
return global_args... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef BOARDS_POSIX_BSIM_COMMON_BSIM_ARGS_RUNNER_H
#define BOARDS_POSIX_BSIM_COMMON_BSIM_ARGS_RUNNER_H
#include <stdint.h>
#include "bs_cmd_line.h"
#ifde<|fim_suffix|>_device... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c)<|fim_suffix|>us
}
#endif
#endif /* BOARDS_NATIVE_BSIM_COMMON_BSIM_CONTROL_H */
<|fim_middle|> 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef BOARDS_NATIVE_BSIM_COMMON_BSIM_CONTROL_H
#define BOARDS_NATIVE_BSIM_COMMON_BSIM_CONTROL_H
#include <stdint... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ded MCU images
* or the user tries to target a non-existent MCU
*/
static void save_test_arg_warn(const char *func, char *argv)
{
bs_trace_warning("%s not defined. You may be passing a test argument to a CPU without"
" image or a non-existent CPU. Argument \"%s\" will be ignored\n",
func, argv... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ill be called (in the HW models thread) when the CPU goes to sleep
* for the first time
*/
typedef void (*bst_test_post_init_t)(void);
/* It will be called (in the HW models thread) each time the bst_timer ticks */
typedef void (*bst_test_tick_t)(bs_time_t time);
/*
* It will be called (in the HW model... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017-2018 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <stdint.h>
#include <string.h>
#include "bs_types.h"
#include "bs_tracing.h"
#include "bstests.h"
#include "bs_oswrap.h"
#include "nsi_host_trampolines.h"
/*
* Result of the testcase ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>rts these so the native_sim call to dynamically register
* command line arguments is passed to the nrf*_bsim one
*/
#ifndef BOARDS_POSIX_NRF_BSIM_CMDLINE_H
#define BOARDS_POSIX_NRF_BSIM_CMDLINE_H
#include "../../../native/src/include/nsi_cmdline.h"
#ifdef __cplusplus
extern "C" {
#endif
static inlin... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Nordic Semiconductor ASA
* Copyright (c) 2020 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "irq_ctrl.h"
#include "posix_core.h"
#include "posix_board_if.h"
#include "board_soc.h"
#include "bs_tracing.h"
/*
* Replacement for ARMs NVIC f... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>SystemReset(void);
void nrfbsim_clear_excl_access(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_NRF52_BSIM_CMSIS_H */
<|fim_prefix|>/*
* Copyright (c) 2020 Oticon A/S
*
* SPDX-License-Identifier: Apach<|fim_middle|>e-2.0
*/
/**
* This header defines replacements for inline
* ARM Cort... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_COMPILER_H
#include <zephyr/toolchain.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __PACKED
#define __PACKED __packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed
#endif
#ifdef __cplusplus
}
#endif
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
* Copyright (c) 2020 Oticon A/S
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifi<|fim_suffix|>()
#endif
#ifndef __ISB
#define __ISB()
#endif
#ifndef __NOP
#define __NOP()
#endif
void __WFE(void);
void __WFI(void)... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include <stdbool.h>
#include "bs_cmd_line.h"
#include "bs_dynargs.h"
#include "bs_utils.h"
#include "bs_types.h"
#include "bs_tracing.h"
#include "nsi_tasks.h"
#include ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> BOARDS_POSIX_BSIM_COMMON_PHY_SYNC_CTRL_H */
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef BOARDS_POSIX_BSIM_COMMON_PHY_SYNC_CTRL_H
#define BOARDS_POSIX_BSIM_COMMON_PHY_SYNC_CTRL_H
#include "bs_types.h"
#ifdef __cplusplus
extern "C... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>x_exit(int exit_code)
{
nsi_exit(exit_code);
}
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.<|fim_middle|>0
*/
#include "nsi_main.h"
void posi<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*
* Note this run in the runner context, and therefore
* this file should therefore only be built once for all CPUs.
*/
#include "bs_tracing.h"
#include "bs_dump_files.h"
#include "bs_pc_backchannel.h"
#includ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdarg.h>
#include "bs_tracing.h"
/*
* Provide the posix_print_* functions required from all POSIX arch boards
* (This functions provide a lower level, more direct, print mechanism than
* Zephyr's printk or logger and theref... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ad may lose context.
* Therefore the wait time may be considerably longer.
*
* All this function ensures is that it will return after usec_to_wait or later.
*/
void arch_busy_wait(uint32_t usec_to_wait)
{
bs_time_t time_end = nsi_hws_get_time() + usec_to_wait;
while (nsi_hws_get_time() < time_end) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <nrfx_gpiote.h>
#include "gpiote_nrfx.h"
#define GPIOTE_NRFX_INST_IDX(idx) DT_CAT3(NRFX_GPIOTE, idx, _INST_IDX)
#define GPIOTE_INST_IDX(node_id) GPIOTE_NRFX_INST_IDX(DT_PROP(n... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Here we define the shared memory buffers for the RPMSG IPC back-end in simulation.
* In real HW, these are booked in RAM thru device tree configuration.
* In this simulated target, we just define them ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*
* SW side of the IRQ handling
*/
#include <stdint.h>
#include <zephyr/irq_offload.h>
#include <zephyr/kernel_structs.h>
#include "kernel_internal.h"
#include "kswap.h"
#include "irq_ctrl.h"
#include "posix_core.h"
#include... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>0
*/
#include <stdbool.h>
#include "NHW_misc.h"
bool native_emb_addr_remap(void **addr)
{
return nhw_convert_RAM_addr(addr);
}
<|fim_prefix|>/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* <|fim_middle|>SPDX-License-Identifier: Apache-2.<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdio.h>
#include <stdlib.h>
#include <soc.h>
#include <posix_native_task.h>
#include <nsi_cpu_if.h>
#include "bstests.h"
#include "bs_tracing.h"
#include "phy_sync_ctrl.h"
#include "nsi_hw_scheduler... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <kernel_internal.h>
/*
* Replacement for the nrfx nrfx_coredep_delay_us()
* which busy waits for the given number of microseconds.
*
* This function will replace at *link* tim... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#<|fim_suffix|>def BOARDS_POSIX_NRF_BSIM_SOC_PINCTRL_SOC_H
#define BOARDS_POSIX_NRF_BSIM_SOC_PINCTRL_SOC_H
/* We reuse the real SOC's header: */
#include "../soc/nordic/common/pinctrl_soc.h"
#endif /* BOARDS... | fim | zephyrproject-rtos/zephyr | c |
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