text stringlengths 14 100k | source stringclasses 1
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<|fim_suffix|>ephyr/types.h>
#include <zephyr/sys/dlist.h>
#include <zephyr/sys/atomic.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct arch_esf _esf_t;
typedef struct __basic_sf _basic_sf_t;
#ifdef __cplusplus
}
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_ARM64_INCLUDE_KERNEL_ARCH_DATA_H_ */
<|... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com<
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions (ARM64)
*
* This file contains private kernel function definitions and various
* other<|fim_suffix|>E void arch_kernel_init(void)
{
soc_per_core... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>d_x25_x26 \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t_x25_x26_OFFSET)
#define _thread_offset_to_callee_saved_x27_x28 \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t_x27_x28_OFFSET)
#define _thread_offset_to_callee_saved_x29_sp_el0 \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "acpi.h"
#include "accommon.h"
#include "acapps.h"
#include <aecommon.h>
#include <zephyr/drivers/pcie/pcie.h>
#include <zephyr/acpi/acpi.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(ACPI, CONFIG... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nterruptCount: %d", ext_irq_res->InterruptCount);
shell_print(sh, "\tInterrupts[0]: %d", ext_irq_res->Interrupts[0]);
break;
}
case ACPI_RESOURCE_TYPE_GENERIC_REGISTER:
shell_print(sh, "ACPI_RESOURCE_TYPE_GENERIC_REGISTER");
break;
case ACPI_RESOURCE_TYPE_GPIO:
shell_print(sh, "ACPI_R... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e status for ARM GIC since the SGI
* type interrupts are always enabled and attempting to install an ISR
* for them will cause the assertion to fail.
*/
#ifndef CONFIG_GIC
__ASSERT(!irq_is_enabled(irq), "IRQ %d is enabled", irq);
#endif /* !CONFIG_GIC */
table_idx = z_get_sw_isr_table_idx(irq);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/exception.h>
arch_exception_dump_hook_t arch_<|fim_suffix|>mp_hook;
arch_exception_drain_hook_t arch_exception_drain_hook;
<|fim_middle|>exception_du<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2010, 2012, 2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Macros to generate structure member offset definitions
*
* This header contains macros to allow a kernel implementation to generate
* absolute symbols whose values represents the member... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022, Commonwealth Scientific and Industrial Research
* Organisation (CSIRO) ABN 41 687 119 230.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_ARCH_COMMON_SEMIHOST_TYPES_H_
#define ZEPHYR_INCLUDE_ARCH_COMMON_SEMIHOST_TYPES_H_
struct semihost_poll_in_args {
long zero;
} __p... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023, Meta
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private header for the software-managed ISR table's functions
*/
#ifndef ZEPHYR_ARCH_COMMON_INCLUDE_SW_ISR_COMMON_H_
#define ZEPHYR_ARCH_COMMON_INCLUDE_SW_ISR_COMMON_H_
#if !defined(_ASMLANGUAGE)
#inclu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>efore
* paging is initialized.
*/
__boot_func
void arch_bss_zero_boot(void)
{
arch_early_memset(&lnkr_boot_bss_start, 0,
(uintptr_t)&lnkr_boot_bss_end
- (uintptr_t)&lnkr_boot_bss_start);
}
#endif /* CONFIG_LINKER_USE_BOOT_SECTION */
#ifdef CONFIG_LINKER_USE_PINNED_SECTION
/**
* @bri... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/sw_isr_table.h>
#include <zephyr/arch/cpu.h>
/* There is an additional member at the end populated by the linker script
* which in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Meta Platforms.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/debug/symtab.h>
#include <zephyr/shell/shell.h>
#include <zephyr/sw_isr<|fim_suffix|>E_SIZE);
for (int idx = 0; idx < IRQ_TABLE_SIZE; idx++) {
dump_isr_table_entry(sh, idx, &_sw_isr_table[idx]);
}... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>able_idx -= CONFIG_GEN_IRQ_START_VECTOR;
__ASSERT(table_idx < IRQ_TABLE_SIZE, "table_idx(%d) < IRQ_TABLE_SIZE(%d)", table_idx,
IRQ_TABLE_SIZE);
return table_idx;
}
<|fim_prefix|>/*
* Copyright (c) 2018 Intel Corporation.
* Copyright (c) 2023 Meta.
*
* SPDX-License-Identifier: Apache-2.0
*/
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>eturn 0;
}
void __weak arch_pm_state_set_finish(unsigned int key)
{
ARG_UNUSED(key);
}
<|fim_prefix|>/*
* Copyright 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/sys/util.h>
#include <zephyr/toolchain.h>
unsigned int __<|fim_middle|>weak arch_pm_state_set_prepare(void)
{
r<... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t semihost_write_args args = {
.fd = fd,
.buf = buf,
.len = len
};
return semihost_exec(SEMIHOST_WRITE, &args);
}
<|fim_prefix|>/*
* Copyright (c) 2022, Commonwealth Scientific and Industrial Research
* Organisation (CSIRO) ABN 41 687 119 230.
*
* SPDX-License-Identifier: Apache-2.0
*/
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>arg = param;
k_spin_unlock(&lock, key);
return;
} else if (entry->isr != z_shared_isr) {
/* INTID is being used by another ISR/arg pair.
* Push back the ISR/arg pair registered in _sw_isr_table
* to the list of clients and hijack the pair stored in
* _sw_isr_table with our own z_shared_i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>RT_VECTOR;
__ASSERT_NO_MSG(table_idx < IRQ_TABLE_SIZE);
return table_idx;
}
<|fim_prefix|>/*
* Copyright (c) 2018 Intel Co<|fim_middle|>rporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sw_isr_common.h"
#include <zephyr/sw_isr_table.h>
#include <zephyr/irq.h>
#include <zephyr/sys/__... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>else
return k_cycle_get_32();
#endif
}
uint64_t arch_timing_cycles_get(volatile timing_t *const start,
volatile timing_t *const end)
{
#if CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER
return (*end - *start);
#else
return ((uint32_t)*end - (uint32_t)*start);
#endif
}
uint64_t arch_timing_freq_get(void)
{... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/arch/common/init.h>
#ifdef CONFIG_REQUIRES_STACK_C... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/irq.h>
#include <zephyr/tracing/tracing.h>
static ALWAYS_INLINE void mips_idle(unsigned int key)
{
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
/* unlock interrupts */
irq_unloc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c)<|fim_suffix|><zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
FUNC_NORETURN void z_mips_fatal_error(unsigned int reason,
const struct arch_esf *esf)
{
#ifdef CONFIG_EXCEPTION_DEBUG
if (esf != NULL) {
EXCEPTION_DUMP("$ 0 : (ze) %08lx(at) %08lx... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|><|fim_suffix|>phyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
uint32_t mips_cp0_status_int_mask;
FUNC_NORETURN void z_irq_spurious(const void *unused)
{
unsigned long cause;
ARG_UNUSED(unused);
cause = (read_c0_cause() & CAUSE_EXP_MASK) >> CAUSE_EXP_SHIFT;
LOG_ERR("Spurious ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e, const void *parameter)
{
unsigned int key;
key = irq_lock();
_offload_routine = routine;
offload_param = parameter;
/* Generate irq offload trap */
__asm__ volatile ("syscall");
irq_unlock(key);
}
void arch_irq_offload_init(void)
{
}
<|fim_prefix|>/*
* Copyright (c) 2020 Antony Pavlov <anto... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Antony Pavlov <antonynpavlov@gmail.com>
*
* based on arch/riscv/core/offsets/offsets.c
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <kernel_arch_data.h>
#include <gen_offset.h>
#include <kernel_offsets.h>
GEN_OFFSET_SYM(_thread_arch_t, swap_return_value);
GEN_OFFSET... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Full C support initialization
*/
#include <zephyr/irq.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#include <zephyr/arch/common/xip.h>
#include <zephyr/arch/co... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Antony Pavlov <antonynpavlov@gmail.com>
*
* based on arch/riscv/core/thread.c
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
extern uint32_t mips_cp0_status_int_mask;
void z_thread_entry(k_thread_entry_t thread,
void *arg1,
void *arg2,
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
*
* based on arch/riscv/include/kernel_arch_data.h
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private kernel structures definitions and various
* other definit... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>YR_ARCH_MIPS_INCLUDE_KERNEL_ARCH_FUNC_H_ */
<|fim_prefix|>/*
* Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
*
* based on arch/riscv/include/kernel_arch_func.h
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_H_
#define _ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_MIPSREGS_H_
#define CP0_BADVADDR $8
#define CP0_COUNT $9
#define CP0_COMPARE $11
#define CP0_STATUS $12
#define CP0_CAUSE $13
#define CP0_EPC $14
/* CP0_STATUS bits */
#define ST0_IE 0x00000001
#define ST0_EXL 0x00000002
#define ST0_ERL 0x00000004
#define S... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Antony Pavlov <antonynpavlov@gmail.com>
*
* Register names for o32 ABI, see [1] for details.
*
* [1] See MIPS Run (The Morgan Kaufmann Series in Computer
* Architecture and Design) 2nd Edition by Dominic Sweetman
*
* S<|fim_suffix|> variable */
#define fp $30
#define s8... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> (___thread_t_arch_OFFSET + ___thread_arch_t_swap_return_value_OFFSET)
#endif /* ZEPHYR_ARCH_MIPS_INCLUDE_OFFSETS_SHORT_ARCH_H_ */
<|fim_prefix|>/*
* Copyright (c) 2021 Antony Pavlov <antonynpavlov@gmail.com>
*
* based on arch/riscv/include/offsets_short_arch.h
*
* SPDX-License-Identifier: Apache-2.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ed int key)
{
sys_trace_idle();
/* unlock interrupts */
irq_unlock(key);
/* wait for interrupt */
if (openrisc_read_spr(SPR_UPR) & SPR_UPR_PMP) {
openrisc_write_spr(SPR_PMR, openrisc_read_spr(SPR_PMR) | SPR_PMR_DME);
}
}
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{
openri... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> return "Range Exception";
case 0xC:
return "Syscall";
case 0xD:
return "Floating Point Exception";
case 0xE:
return "Trap";
default:
return "unknown";
}
}
void z_openrisc_fault(struct arch_esf *esf, unsigned int reason)
{
LOG_ERR("");
LOG_ERR(" reason: %d, %s", reason, reason_str(reason)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <kswap.h>
LOG_<|fim_suffix|>, uint32_t flags)
{
ARG_UNUSED(flags);
ARG_UNUSED(priority);
z_isr_install(irq, routine,... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/irq_offload.h>
#include <zeph<|fim_suffix|>ffload_routine_t routine, const void *parameter)
{
arch_syscall_invoke2((uintptr_t)routine, (uintptr_t)parameter, OR_SYSCALL_IRQ_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ET_SYM(_callee_saved_t, r30);
GEN_ABSOLUTE_SYM(_callee_saved_t_SIZEOF, sizeof(_callee_saved_t));
GEN_OFFSET_STRUCT(arch_esf, r3);
GEN_OFFSET_STRUCT(arch_esf, r4);
GEN_OFFSET_STRUCT(arch_esf, r5);
GEN_OFFSET_STRUCT(arch_esf, r6);
GEN_OFFSET_STRUCT(arch_esf, r7);
GEN_OFFSET_STRUCT(arch_esf, r8);
GEN_OFFSE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Full C support initialization
*/
#include <kernel_internal.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#include <zephyr/arch/common/init.h>
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>RG_UNUSED(type);
__asm__("l.nop 13");
}
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief OpenRISC reboot interface
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sys/uti... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>R_SR_TEE
#ifdef CONFIG_DCACHE
| SPR_SR_DCE
#endif
#ifdef CONFIG_ICACHE
| SPR_SR_ICE
#endif
;
void z_thread_entry(k_thread_entry_t thread,
void *arg1,
void *arg2,
void *arg3);
void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
char *stack_ptr, k_thread_entr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>NT(stack_ptr);
return z_tls_data_size() + TLS_OFFSET;
}
<|fim_prefix|>/*
* Copyright (c) 2026 Keith Packard <keithp@keithp.com>
<|fim_middle|> *
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <kernel_tls.h>
#include <zephyr/app_memory/app_me... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e <zephyr/sys/dlist.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_OPENRISC_INCLUDE_KERNEL_ARCH_DATA_H_ */
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.0... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private kernel function/macro definitions and various
* other definitions for the OpenRISC processor architecture.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>aved_t_r28_OFFSET)
#define _thread_offset_to_r30 \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t_r30_OFFSET)
#endif /* ZEPHYR_ARCH_OPENRISC_INCLUDE_OFFSETS_SHORT_ARCH_H_ */
<|fim_prefix|>/*
* Copyright (c) 2025 NVIDIA Corporation <jholdsworth@nvidia.com>
*
* SPDX-License-Identifier: Apache-2.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_spr(spr, val) \
({ \
__asm__ __volatile__ ("l.mtspr r0,%0,%1" \
: \
: "r" (val), "K" (spr)); \
})
#define openrisc_read_spr(spr) \
({ \
uint32_t val; \
__asm__ __volatile__ ("l.mfspr %0,r0,%1" \
: "=r" (val) \
: "K" (spr)); \
val; \
})
#endif /* _ZEPHYR_ARCH_OPENRISC_INCLUDE_OPENRISC_OPENRISCRE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ints to counters */
#define SPR_DMR2_AWTC_OFF 2 /* Bit offset to AWTC field */
#define SPR_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */
#define SPR_DMR2_WGB_OFF 12 /* Bit offset to WGB field */
#define SPR_DMR2_WBS 0xffc00000 /* JPB: Watchpoint status */
#define SPR_D... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>g("%s called with type %d. Exiting\n",
__func__, type);
posix_exit(1);
}
#endif /* CONFIG_REBOOT */
<|fim_prefix|>/*
* Copyright (c) 2011-2015 Wind River Systems, Inc.
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file CPU power management code for POSIX
... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2016 Intel Corporation
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sys/printk.h>
#include <inttypes.h>
#include <zephyr/logging/log_ctrl.h>
#include <zephyr/arch/posix/posix_soc_if.h>
extern... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>>
void nsi_raise_sigtrap(void)
{
raise(SIGTRAP);
}
<|fim_prefix|>/*
* Copyright (c) 2023 Nordic Sem<|fim_middle|>iconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <signal.h<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2019 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/posix/posix_soc_if.h>
#include "board_irq.h"
#ifdef CONFIG_IRQ_OFFLOAD
#include <zephyr/irq_offload.h>
void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
{
posix_irq_offload(routine, para... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Kernel structure member offset definition file
*
* This module is responsible for the generation of the absolute symbols whose
* value rep... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>c void *te_state;
/*
* Initialize the posix architecture
*/
void posix_arch_init(void)
{
extern void posix_arch_thread_entry(void *pa_thread_status);
te_state = nct_init(posix_arch_thread_entry);
}
/*
* Clear the state of the POSIX architecture
* free whatever memory it may have allocated, etc.
*... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>just a version of arch_swap() in which we do not save anything
* about the current thread.
*
* Note that we will never come back to this thread: posix_main_thread_start()
* does never return.
*/
void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
k_thread_entry_t _main)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2010-2015 Wind River Systems, Inc.
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Thread support primitives
*
* This module provides core thread related primitives for the POSIX
* architecture
*/
#include <stdio.h>
#include <... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>d(__GNUC__)
#include <asm_inline_gcc.h> /* The empty one.. */
#include <zephyr/arch/posix/asm_inline_gcc.h>
#else
#include <asm_inline_other.h>
#endif /* __GNUC__ */
#endif /* ZEPHYR_ARCH_POSIX_INCLUDE_ASM_INLINE_H_ */
<|fim_prefix|>/* Inline assembler kernel functions and macros */
/*
* Copyright (c) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/* EMPTY ON PURPOSE. Why<|fim_suffix|>rsions of it? */
<|fim_middle|> do the intel and ARM arch have 2 ve<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2013-2016 Wind River Systems, Inc.
* Copyright (c<|fim_suffix|>H_ */
<|fim_middle|>) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions (POSIX)
*
*/
#ifndef ZEPHYR_ARCH_POSIX_INCLUDE_KERNEL_ARCH_DATA_H_
#define ZEPHYR_AR... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Wind River Systems, Inc.
* Copyright (c) 2017 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
/* This file is only meant to be included by kernel_structs.h */
#ifndef ZEPHYR_ARCH_POSIX_INCLUDE_KERNEL_ARCH_FUNC_H_
#define ZEPHYR_ARCH_POSIX_INCLUDE_KERNEL_ARCH_FUNC_H_
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_POSIX_INCLUDE_OFFSETS_<|fim_suffix|>E_OFFSETS_SHORT_ARCH_H_
#include <zephyr/offsets.h>
/* kernel */
/* end - kernel */
/* threads */
/* end - threads */
#endif /* ZEPHYR_ARCH_POSIX_I... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2018 Oticon A/S
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_POSIX_INCLUDE_POSIX_ARCH_INTERNAL_H_
#define ZEPHYR_ARCH_POSIX_INCLUDE_POSIX_ARCH_INTERNAL_H_
#include <zephyr/toolchain.h>
#define PC_SAFE_CALL(a) pc_safe_call(a, #a)
#ifdef __cplusplus
extern "C" {
#endif
static... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>E_STACK_INFO adds 1 pointer + 1 size_t
* (32-bit: 8 bytes, 64-bit: 16 bytes).
*/
} posix_thread_status_t;
void posix_irq_check_idle_exit(void);
void posix_arch_init(void);
void posix_arch_clean_up(void);
void posix_swap(int next_allowed_thread_nbr, int this_th_nbr);
void posix_main_thread_start(in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Undef<|fim_suffix|>linux
#undef __linux__
#undef linux
#undef __unix
#undef __unix__
#undef unix
<|fim_middle|>ine all system-specific macros defined internally, by the compiler.
* Run 'gcc -dM -E - < /dev/null | so... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Facebook, Inc. and its affiliates
* Copyright (c) 2026 Mirai SHINJO
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <zephyr/kernel.h>
#include <zephyr/debug/coredump.h>
#ifndef CONFIG_64BIT
#define ARCH_HDR_VER 3
#else
#define ARCH_HDR_VER 4
#endif
e... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>defined(CONFIG_TRACING)
sys_trace_idle_exit();
#endif
irq_unlock(RV_STATUS_IE);
}
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
void arch_cpu_atomic_idle(unsigned int key)
{
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
__asm__ volatile("wfi");
#if defined(CONFIG_TRACING)
sys_trace_id... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>A - P */
modified_compressed_operand = UNALIGNED_GET(loc16);
compressed_imm8 = jump_target;
modified_compressed_operand =
R_RISCV_CLEAR_CJTYPE_IMM8(modified_compressed_operand);
modified_compressed_operand =
R_RISCV_SET_CJTYPE_IMM8(modified_compressed_operand, compressed_imm8);
UNALIGNED_P... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> ra: " PR_REG, esf->ra);
EXCEPTION_DUMP(" mepc: " PR_REG, esf->mepc);
EXCEPTION_DUMP("mstatus: " PR_REG, esf->mstatus);
EXCEPTION_DUMP("");
csf = esf->csf;
}
if (csf != NULL) {
#if defined(CONFIG_RISCV_ISA_RV32E)
EXCEPTION_DUMP(" s0: " PR_REG, csf->s0);
EXCEPTION_DUMP(" s1: " PR_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 BayLibre SAS
* Written by: Nicolas Pitre
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_arch_interface.h>
#include <zephyr/sys/atomic.h<|fim_suffix|>omic_ptr_clear(&_current_cpu->arch.fpu_owner);
DBG("disable", owner);
}
}
#ifdef CO... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ected_ipi(IPI_ALL_CPUS_MASK);
}
<|fim_prefix|>/*
* Copyright (c) 2021 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <ipi.h>
#include <zephyr<|fim_middle|>/kernel.h>
void arch_sched_broadcast_ipi(void)
{
arch_sched_dir<|endoftext|> | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_IRQ_MSOFT, 0, sched_ipi_handler, NULL, 0);
irq_enable(RISCV_IRQ_MSOFT);
return 0;
}
<|fim_prefix|>/*
* Copyright (c) 2021 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_arch_interface.h>
#include <ipi.h>
#define CLINT_NODE DT_NODELABEL(cl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/logging/log.h>
#include <zephyr/arch/riscv/csr.h>
#include <zephyr/irq_multilevel.h>
#include <zephyr/sw_isr_table.h>
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> z_riscv_fpu_enter_exc(void);
extern void z_riscv_fpu_irq_offload_exit(void);
#endif
#endif
void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
{
#ifdef CONFIG_RISCV_S_MODE
/*
* In S-mode, ecall (cause=9) is routed to the M-mode SBI handler
* which does not know about RV_ECAL... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief RISCV32 kernel structure member offset definition file
*
* This module is responsible for the generation of the absolute symbols whose
* value represents the member offsets for va... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright The Zephyr Project Contributors
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/linker/sections.h>
#include <zephyr/sys/util.h>
#include <zephyr/arch/common/pm_s2ram.h>
#include <pm_s2ram_struct.h>
/* Refuse to build under configurations the ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>#endif
#endif
}
/**
* @brief Reads the PMP address CSRs (pmpaddrX) for all configured slots.
*
* This helper function abstracts the iterative logic required to read the
* individual PMP address registers (pmpaddr0, pmpaddr1, ..., pmpaddrN)
* up to the total number of PMP slots configured by CONFIG_P... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ddef.h>
#include <zephyr/toolchain.h>
#include <zephyr/kernel_structs.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#include <zephyr/arch/common/xip.h>
#include <zephyr/arch/common/init.h>
#if defined(CONFIG_RISCV_SOC_INTERRUPT_INIT)
void soc_interrupt_init(void);
#endif
/**
*
*... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ch/cpu.h>
#include <zephyr/sys/util.h>
/**
* @brief Reset the system
*
* This is stub function to avoid build error with CONFIG_REBOOT=y
* RISC-V specification does not have a common interface for system reset.
* Each RISC-V SoC that has reset feature should implement own reset function.
*/
void _... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022, Commonwealth Scientific and Industrial Research
* Organisation (CSIRO) ABN 41 687 119 230.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/arch/common/semihost.h>
/*
* QEMU requires that the semihosting trap instruction sequence, c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/irq.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/arch/riscv/irq.h>
#include <zephyr/drivers/pm_cpu_ops.h>
#inclu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>MP("call trace:");
walk_stackframe(print_trace_address, &i, _current, esf, in_fatal_stack_bound, csf);
EXCEPTION_DUMP("");
}
#endif /* CONFIG_EXCEPTION_STACK_TRACE */
<|fim_prefix|>/*
* Copyright (c) 2024 Meta Platforms
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/debug/symtab.h>
#in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
* Copyright (c) 2020 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/arch/riscv/csr.h>
#include <pmp.h>
#ifdef CONFIG_USERSPACE
/*
* Per-thread (TLS)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.<|fim_suffix|>tls_size;
z_tls_copy(stack_ptr);
/*
* Set tp directly to point to the TLS ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>DA
#define NDS_PMAADDR11 0xBDB
#define NDS_PMAADDR12 0xBDC
#define NDS_PMAADDR13 0xBDD
#define NDS_PMAADDR14 0xBDE
#define NDS_PMAADDR15 0xBDF
/* Control and Status Registers (CSRs) available for Andes V5 StackSafe extension */
#d... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Andes Technology Corporation
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Extra definitions required for CONFIG_RISCV_SOC_CONTEXT_SAVE.
*/
#ifndef ZEPHYR_ARCH_RISCV_CUSTOM_ANDES_CSR_CONTEXT_H_
#define ZEPHYR_ARCH_RISCV_CUSTOM_ANDES_CSR_CONTEXT_H_
#ifdef CONFIG_RISCV_SOC_CO... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>FSET_SYM(soc_esf_t, ucode)
#endif
#endif /* CONFIG_RISCV_SOC_OFFSETS */
#endif /* ZEPHYR_ARCH_RISCV_CUSTOM_ANDES_CSR_OFFSETS_H_ */
<|fim_prefix|>/*
* Copyright (c) 2025 Andes Technology Corporation
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Extra definitions required for CONFIG_RISCV_SOC_OFFSET... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>the interrupt stack */
bound = (unsigned long)K_KERNEL_STACK_BUFFER(z_interrupt_stacks[_current_cpu->id]);
} else {
#ifdef CONFIG_MULTITHREADING
/* Skip enabling the custom stack guard for dummy threads */
if (thread->base.thread_state & _THREAD_DUMMY) {
return;
}
/* Default: use the bottom... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Andes Technology Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/arch/riscv/csr.h>
#include <andes_csr.h>
#ifndef CONFIG_ASSERT
#define... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>PMA_H_
#define ZEPHYR_ARCH_RISCV_CUSTOM_ANDES_PMA_H_
/*
* @brief Init PMA CSRs of each CPU core
*
* In SMP, each CPU has it's own PMA CSR and PMA CSR only affect one CPU.
* We should configure CSRs of all CPUs to make memory attribute
* (e.g. uncacheable) affects all CPUs.
*/
void pma_init_per_core... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> 0x5CBU
#define CSR_CCM_SCOMMAND 0x5CCU
#define CSR_CCM_SDATA 0x5CDU
#define CSR_CCM_UBEGINADDR 0x4CBU
#define CSR_CCM_UCOMMAND 0x4CCU
#define CSR_CCM_UDATA 0x4CDU
#define CSR_CCM_FPIPE 0x4CFU
#define CAUSE_MISALIGNED_FETCH... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024, CISPA Helmholtz Center for Information Security
* SPDX-License-Identifier: Apache-2.0
*/
/*
* @file
* OpenHwGroup CVA6 declarations
*/
#i<|fim_suffix|>def ZEPHYR_ARCH_RISCV_CUSTOM_OPENHWGROUP_CVA6_CSR_H_
#define ZEPHYR_ARCH_RISCV_CUSTOM_OPENHWGROUP_CVA6_CSR_H_
#ifdef __cp... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Extra definitions required for CONFIG_RISCV_SOC_CONTEXT_SAVE.
*/
#ifndef ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_RI5CY_CSR_CONTEXT_H_
#define ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_RI5CY_CSR_CONTEXT_H_
#ifdef CONFIG_RISCV_SOC_CONTEXT_S... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Extra definitions required for CONFIG_RISCV_SOC_OFFSETS.
*/
#ifndef ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_RI5CY_CSR_OFFSE<|fim_suffix|>TS */
#endif /* ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_RI5CY_CSR_OFFSETS_H_ */
<|fim... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_RI5CY_CSR_H_
#define ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_RI5CY_CSR_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Control and Status Registers (CSRs) available for RI5CY. */
#defi... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2018 Foundries.io Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_ZERO_RISCY_CSR_H_
#define ZEPHYR_ARCH_RISCV_CUSTOM_OPENISA_ZERO_RISCY_CSR_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Control and Status Registers (CSRs) available for ZERO_RISCY. */
#def... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/cache.h>
int arch_dcache_invd_all(void)
{
__asm__ volatile (
"fence\n"
"fence.i\n"
"th.dcache.iall\n"
"fence\n"
"fence.i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_enable(void)
{
uint32_t tmp;
__asm__ volatile (
"fence\n"
"fence.i\n"
"th.dcache.iall\n"
);
__asm__ volatile(
"csrr %0, " THEAD_MHCR
: "=r"(tmp));
tmp |= (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4);
__asm__ volatile(
"csrw " THEAD_MHCR ", %0"
:
: "r"(tmp));
__asm__ volatile (
"fen... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>icache_flush_all();
}
int arch_icache_invd_range(void *addr_in __unused, size_t size __unused)
{
return arch_icache_flush_all();
}
int arch_icache_flush_and_invd_all(void)
{
return arch_icache_flush_all();
}
int arch_icache_flush_range(void *addr __unused, size_t size __unused)
{
return arch_icache_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
<|fim_suffix|>_H_
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#ifndef _ASMLANGUAGE
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private kernel function/macro definitions and various
* other definitions for the RISCV processor architecture.
*/... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_
#define ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_
#include <zephyr/offsets.h>
#define _thread_offset_to_sp \
(___thread_t_call... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright The Zephyr Project Contributors
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_RISCV_PM_S2RAM_STRUCT_H_
#define ZEPHYR_ARCH_RISCV_PM_S2RAM_STRUCT_H_
#ifdef CONFIG_PM_S2RAM
struct __cpu_context {
unsigned long mstatu<|fim_suffix|>d long mtvt;
#else
unsigned long mie;... | fim | zephyrproject-rtos/zephyr | c |
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