text stringlengths 14 100k | source stringclasses 1
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/*
* Copyright (c) 2022 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef PMP_H_
#define PMP_H_
#include <zephyr/arch/riscv/pmp.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-riscv.h>
#define PMPCFG_STRIDE (__riscv_xlen / 8)
#define DT_MEM_RISCV_TO_PMP_PERM(dt_attr) ( \
(((dt_attr) & D... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/irq.h>
#include <zephyr/tracing/tracing.h>
void arch_cpu_idle(void)
{
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Fatal fault handling
*
* This module implements the routines necessary for handling fatal faults on
* RX CPUs.
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/fatal.h>
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/util.h>
#include <zephyr/irq.h>
#define IR_BASE_ADDRESS DT_R... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apac<|fim_suffix|>oftware interrupt (SWINT) of the RX processor
* should this interrupt ever be used for something else, this has to be
* changed - maybe to ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/sw_isr_table.h>
#include <zephyr/irq.h>
#include <kswap.h>
#include <zephyr/tracing/tracing.h>
#include <zephyr/arch/rx/sw_nmi_table.h>
#define NMI_NMIST_MASK 0x01
#define NMI_OSTST_MASK... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief RX Kernel structure member offset definition file
*
* This module is responsible for the generation of the absolute sy... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>rporation
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Full C support initialization
*
*
* Initialization of full C support: zero the .bss and call z_cstart().
*
* Stack is available in this module, but not the global data/bss until their
* initialization is performed.
*/
#in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>phyr/sys/util.h>
/**
* @brief Reset the system
*
* This is stub function to avoid build error with CONFIG_REBOOT=y
* RX specification does not have a common interface for system reset.
* Each RX SoC that has reset feature should implement own reset function.
*/
void __weak sys_arch_reboot(int type... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
<|fim_suffix|> *arg3)
{
struct arch_esf *iframe;
iframe = Z_STACK_PTR_TO_FRAME(struct arch_esf, stack_ptr);
/* initial value for the PSW (bits... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>20,
int_demux_21, int_demux_22, int_demux_23,
int_demux_24, int_demux_25, int_demux_26,
int_demux_27, int_demux_28, int_demux_29,
int_demux_30, int_demux_31, int_demux_32,
int_demux_33, int_demux_34, int_demux_35,
int_demux_36, int_demux_37, int_demux_38,
i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions (rx)
*
* This file contains private kernel structures definitions and various
* other defi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
* Copyright (c) 2024 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_RX_INCLUDE_KERNEL_ARC<|fim_suffix|>vice initialization functions must be called here */
}
static inline bool arch_is_in_is... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>__callee_saved_t_topOfStack_OFFSET)
#define _thread_offset_to_retval (___thread_t_callee_saved_OFFSET + ___callee_saved_t_retval_OFFSET)
#define _thread_offset_to_coopCoprocReg \
(___thread_t_arch_OFFSET + ___thread_arch_t_coopCoprocReg_OFFSET)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
/*
* EXAMPLE OUTPUT
*
* ---------------------------------------------------------------------
*
*... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>current_cpu->nested--;
#ifdef CONFIG_STACK_SENTINEL
z_check_stack_sentinel();
#endif
}
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <kswap.h>
#include <zephyr/logging/log.h>
LO... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/irq.h>
#include <zephyr/irq_offload.h>
volatile irq_offload_routine_t _offload_routine;
static volatile const void *offload_param;
void z_irq_do_offload(void)
{
irq... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>sf, out);
GEN_OFFSET_STRUCT(arch_esf, global);
GEN_OFFSET_STRUCT(arch_esf, npc);
GEN_OFFSET_STRUCT(arch_esf, psr);
GEN_OFFSET_STRUCT(arch_esf, tbr);
GEN_ABSOLUTE_SYM(__struct_arch_esf_SIZEOF, sizeof(struct arch_esf));
GEN_ABS_SYM_END
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPD... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e to and run C code
*
* This routine prepares for the execution of and runs C code.
*/
FUNC_NORETURN void z_prep_c(void)
{
soc_prep_hook();
arch_data_copy();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
z_cstart();
CODE_UNREACHABLE;
}
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_SPARC_CORE_STACK_H_
#define ZEPHYR_ARCH_SPARC_CORE_STACK_H_
/*
* Offsets for SPARC ABI stack frame.
*
* Reference: System V Application Binary Interface, SPARC Processor
* Supplement, Th... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <ksched.h>
void z_thread_entry_wrapper(k_thread_entry_t thread,
void *arg1,
void *arg2,
void *arg3);
/*
* Frame used by _thread_entry_wrapper
*
* Allocate a 16 reg... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ys/util.h>
size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr)
{
new_thread->tls = POINTER_TO_UINT(stack_ptr);
stack_ptr -= z_tls_data_size();
z_tls_copy(stack_ptr);
return z_tls_data_size();
}
<|fim_prefix|>/*
* Copyright (c) 201<|fim_middle|>9-2020 Cobham Gaisler AB
*
* S... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> ZEPHYR_ARCH_SPARC_INCLUDE_KERNEL_ARCH_DATA_H_ */
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private kernel structures definitions and various
* other definitions f... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_is_in_isr(void)
{
return _current_cpu->nested != 0U;
}
#ifdef CONFIG_IRQ_OFFLOAD
void z_irq_do_offload(void);
#endif
#endif /* _ASMLANGUAGE */
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_ARCH_SPARC_INCLUDE_KERNEL_ARCH_FUNC_H_ */
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SP... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Cobham Gaisler AB
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
#define ZEPHYR_ARCH_SPARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
#include <zephyr<|fim_suffix|>aved_OFFSET + ___callee_saved_t_i0_OFFSET)
#define _thread_offset_t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Cadence Design Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#if defined(CONFIG_MULTIBOOT_INFO)
__pinned_noinit char multiboot_cmdline[CONFIG_BOOTARGS_ARGS_BUFFER_SIZE];
const char *get_bootargs(void)
{
return multiboot_cmdline;
}
#el... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2021 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Cache manipulation
*
* This module contains functions for manipulation caches.
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Indirect Branch Tracking
*
* Indirect Branch Tracking (IBT) setup routines.
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/x86/msr.h>
#include <zephyr/arch/x86/cet.h>
#include <zephyr/l... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2011-2015 Wind River Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/tracing/tracing.h>
#include <zephyr/arch/cpu.h>
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
__pinned_func
void arch_cpu_idle(void)
{
#if defined(CONFIG_TRACING)
sys_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>O_1,
&eax, &ebx, &ecx, &edx) == 0) {
return 0;
}
edx = (ebx >> INITIAL_APIC_ID_SHIFT);
}
return (uint8_t)(edx & INITIAL_APIC_ID_MASK);
}
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <cpuid.h> /* Header provided by the toolc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>L_PCIDEV
struct pcie_bar mbar;
pcie_get_mbar(X86_SOC_EARLY_SERIAL_PCIDEV, 0, &mbar);
pcie_set_cmd(X86_SOC_EARLY_SERIAL_PCIDEV, PCIE_CONF_CMDSTAT_MEM, true);
device_map(&mmio, mbar.phys_addr, mbar.size, K_MEM_CACHE_NONE);
#else
device_map(&mmio, X86_SOC_EARLY_SERIAL_MMIO8_ADDR, 0x1000, K_MEM_CACHE_NON... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/spinlock.h>
#include <zephyr/arch/x86/efi.h>
#include <zephyr/kernel/mm.h>
#include "../zefi/efi.h" /* ZEFI not on include path */
#include <zephyr/kernel.h>
#include <kernel_arch_func.h>
#define EFI_CON_BUFSZ 12... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/llext/llext_internal.h>
#include <zephyr/llext/loader.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/logging/log.h>
#include <x86_mmu.h>
#include <mmu.h>
#if defined(CONFIG_DEMAND_PAGING) && defined(CONFI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>d for output */
coredump_buffer_output((uint8_t *)&hdr, sizeof(hdr));
coredump_buffer_output((uint8_t *)&arch_blk, sizeof(arch_blk));
}
uint16_t arch_coredump_tgt_code_get(void)
{
return COREDUMP_TGT_X86;
}
#if defined(CONFIG_DEBUG_COREDUMP_DUMP_THREAD_PRIV_STACK)
void arch_coredump_priv_stack_dump(s... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Kernel fatal error handler
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/drivers/interrupt_controller/sysapic.h>
#include <zephyr/arch/x86/ia32/segme... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Floating point register sharing routines
*
* This module allows multiple preemptible threads to safely share the system's
* floating point registers, by allowing the system to save FPU state i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ers),
sizeof(ctx->registers), buf, buflen);
}
return ret;
}
size_t arch_gdb_reg_writeall(struct gdb_ctx *ctx, uint8_t *hex, size_t hexlen)
{
size_t ret;
if (hexlen != (sizeof(ctx->registers) * 2)) {
ret = 0;
} else {
ret = hex2bin(hex, hexlen,
(uint8_t *)&(ctx->registers),
... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Interrupt support for IA-32 arch
*
* INTERNAL
* The _idt_base_address symbol is used to determine the base address of the IDT.
* (It is generated by the linker script, and doesn't correspond ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2015 Intel corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file IRQ offload - x86 implementation
*/
#include <zephyr/kernel.h>
#include <zephyr/irq_offload.h>
extern void (*_irq_sw_handler)(void);
NANO_CPU_INT_REGISTER(_irq_sw_handler, NANO_SOFT_IRQ,
CONFIG_IRQ_OFFLOAD_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>xf2(long double a, int b)
{
k_oops();
}
<|fim_prefix|>/*
* Copyright (c) 2021 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/toolchain.h>
/**
* @file
* @brief Provide soft float function stubs for long double operations.
*
* GCC soft flo... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2010-2015 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Thread support primitives
*
* This module provides core thread related primitives for the IA-32
* processor architecture.
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/x8... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_NO_STACK_PROTECTOR
void z_x86_early_tls_update_gdt(char *stack_ptr)
{
uintptr_t *self_ptr;
uintptr_t tls_seg = GS_TLS_SEG;
struct segment_descriptor *sd = &_gdt.entries[ENTRY_NUM];
/*
* Since we are populating things backwards, store
* the pointer to the TLS area at top of stack.
*/
stack_ptr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <zephyr/kernel.h>
#include <zephyr/debug/coredump.h>
#define ARCH_HDR_VER 1
struct x86_64_arch_block {
uint64_t vector;
uint64_t code;
struct {
uint64_t rax;
uint64_t rcx;
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <cpuid.h>
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <kernel_arch_data.h>
#include <kernel_arch_func.h>
#include <kernel_internal.h>
#include <zephyr/arch/x86/multiboot.h>
#include <x86_mm... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_KERNEL_OOPS, NULL);
}
#endif /* CONFIG_USERSPACE */
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
/* NMI handler... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>s
* have been initialized based on content stored in the irq_alloc linker
* section in ROM.
*/
#define IRQ_LIST_INITIALIZED 0
static ATOMIC_DEFINE(irq_reserved, CONFIG_MAX_IRQ_LINES);
static void irq_init(void)
{
TYPE_SECTION_FOREACH(const uint8_t, irq_alloc, irq) {
__ASSERT_NO_MSG(*irq < CONFIG_M... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Intel corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file IRQ offload - x8<|fim_suffix|> key = arch_irq_lock();
uint8_t cpu_id = _current_cpu->id;
irq_offload_funcs[cpu_id] = routine;
irq_offload_args[cpu_id] = parameter;
__asm__ volatile("int %0" : : "i"... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>lear exactly how/where/why to abstract this, as it
* assumes the use of a local APIC (but there's no other mechanism).
*/
void arch_sched_broadcast_ipi(void)
{
z_loapic_ipi(0, LOAPIC_ICR_IPI_OTHERS, CONFIG_SCHED_IPI_VECTOR);
}
void arch_sched_directed_ipi(uint32_t cpu_bitmap)
{
unsigned int num_cpus ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>float_disable(struct k_thread *thread)
{
/* x86-64 always has FP/SSE enabled so cannot be disabled */
ARG_UNUSED(thread);
return -ENOTSUP;
}
int arch_float_enable(struct k_thread *thread, unsigned int options)
{
/* x86-64 always has FP/SSE enabled so nothing to do here */
ARG_UNUSED(thread);
ARG_U... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ards, store
* the pointer to the TLS area at top of stack.
*/
stack_ptr -= sizeof(uintptr_t);
self_ptr = (void *)stack_ptr;
*self_ptr = POINTER_TO_UINT(stack_ptr);
__asm__ volatile(
"movl %0, %%ecx;\n\t"
"movq %1, %%rax;\n\t"
"movq %1, %%rdx;\n\t"
"shrq $32, %%rdx;\n\t"
"wrmsr;\n\t"
:... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Intel Corporation
*
* SPDX-License-Identifier: Apa<|fim_suffix|>arch_length)
{
uint64_t *search_buff;
k_mem_map_phys_bare((uint8_t **)&search_buff, search_phy_add, search_length, 0);
if (!search_buff) {
return 0;
}
for (int i = 0; i < search_length / 8u; i++) {
if (se... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ult map symbols are weak so that an application
* can override with a hardcoded manual map if desired.
*/
__weak enum x86_memmap_source x86_memmap_source = X86_MEMMAP_SOURCE_DEFAULT;
__weak struct x86_memmap_entry x86_memmap[CONFIG_X86_MEMMAP_ENTRIES] = {
{
DT_REG_ADDR(DT_CHOSEN(zephyr_sram)),
DT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>NFIG_MULTIBOOT_MEMMAP */
}
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <string.h>
#include <zephyr/arch/x86/multiboot.h>
#include <zephyr/arch/x86/memmap.h>
struct multiboot_info multiboot_info;
/*
* called ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Kernel structure member offset definition file
*
* This module is r<|fim_suffix|>shstk_size);
GEN_OFFSET_SYM(_cpu_arch_t, shstk_base);
#endif
/**
* size of the struct k_thread s... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corp.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _X86_OFFSETS_INC_
#define _X86_OFFSETS_INC_
GEN_OFFSET_SYM(_callee_saved_t, rsp);
GEN_OFFSET_SYM(_callee_saved_t, rbp);
GEN_OFFSET_SYM(_callee_saved_t, rbx);
GEN_OFFSET_SYM(_callee_saved_t, r12);
GEN_OFFSET_SYM(_call... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corp.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zeph<|fim_suffix|>
#endif
#ifdef CONFIG_MULTIBOOT_INFO
#include <zephyr/arch/x86/multiboot_info.h>
#endif
GEN_OFFSET_SYM(x86_boot_arg_t, boot_type);
GEN_OFFSET_SYM(x86_boot_arg_t, arg);
GEN_OFFSET_SYM(_thread_arc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>E_MSI_X)
if (vector->msix) {
return 0x4000U | vector->arch.vector;
}
#endif
}
return 0x4000U | Z_IRQ_TO_INTERRUPT_VECTOR(irq);
}
#if defined(CONFIG_INTEL_VTD_ICTL) || defined(CONFIG_PCIE_MSI_X)
uint8_t arch_pcie_msi_vectors_allocate(unsigned int priority,
msi_vector_t *vectors,
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>IBOOT_INFO) &&
cpu_arg->boot_type == MULTIBOOT_BOOT_TYPE) {
z_multiboot_init((struct multiboot_info *)cpu_arg->arg);
} else if (IS_ENABLED(CONFIG_X86_EFI) &&
cpu_arg->boot_type == EFI_BOOT_TYPE) {
efi_init((struct efi_boot_arg *)cpu_arg->arg);
} else {
ARG_UNUSED(cpu_arg);
}
#ifdef CONFIG_X8... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2015 Wind River Systems, Inc.
*
*<|fim_suffix|>ot through Reset Control Register (I/O port 0xcf9) */
#define X86_RST_CNT_REG 0xcf9
#define X86_RST_CNT_SYS_RST 0x02
#define X86_RST_CNT_CPU_RST 0x4
#define X86_RST_CNT_FULL_RST 0x08
static inline void cold_reboot(void)
{
uint8_t rese... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2018 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <kernel_arch_data.h>
#include <kernel_arch_func.h>
#include <zephyr/arch/x86/msr.h>
#include <zephyr/arch/x86/cpuid.h>
/*
* See:
* https://software.intel.com/security... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>-= z_tls_data_size();
z_tls_copy(stack_ptr);
return (z_tls_data_size() + sizeof(uintptr_t));
}
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <kernel_tls.h>
#include <zephyr/sys/uti... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>tack[0],
sizeof(hdr_stack_obj->privilege_stack),
unused_ptr);
}
<|fim_prefix|>/*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/sys/speculation.h>
#include <zephyr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/acpi/acpi.h>
#include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
uint32_t arch_acpi_encode_irq_flag<|fim_suffix|>VERY_LOWEST;
if (trigger == ACPI_LEVEL_SENSITIVE) {
irq_flag |= IRQ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t phys)
{
page_map_set(z_x86_page_tables_get(), K_MEM_SCRATCH_PAGE,
phys | MMU_P | MMU_RW | MMU_XD, NULL, MASK_ALL,
OPTION_FLUSH);
}
__pinned_func
uintptr_t arch_page_info_get(void *addr, uintptr_t *phys, bool clear_accessed)
{
pentry_t all_pte, mask;
uint32_t options;
/* What to chang... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> 0))
if num_entries >= 7:
# Selector 0x28: code descriptor, dpl = 3
output_fp.write(
create_code_data_entry(0, 0xFFFFF, 3, FLAGS_GRAN, ACCESS_EX | ACCESS_RW)
)
# Selector 0x30: data descriptor, dpl = 3
output_fp.write(cr... | fim | zephyrproject-rtos/zephyr | python |
<|fim_prefix|>#!/usr/bin/env python3
#
# Copyright (c) 2017 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
"""Generate Interrupt Descriptor Table for x86 CPUs.
This script generates the interrupt descriptor table (IDT) for x86.
Please consult the IA Architecture SW Developer Manual, volume 3,
for more deta... | fim | zephyrproject-rtos/zephyr | python |
<|fim_prefix|>#!/usr/bin/env python3
#
# Copyright (c) 2020 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
"""Create the kernel's page tables for x86 CPUs.
For additional detail on paging and x86 memory management, please
consult the IA Architecture SW Developer Manual, volume 3a, chapter 4.
This script p... | fim | zephyrproject-rtos/zephyr | python |
<|fim_suffix|>trip())
if line.startswith("CONFIG_ISR_STACK_SIZE="):
stack_size = int(line.split("=")[1].strip())
if line.startswith("CONFIG_X86_CET_SHADOW_STACK_ALIGNMENT="):
alignment = int(line.split("=")[1].strip())
if line.startswith("CONFIG_HW_SHADOW_STACK_PERCENTAGE... | fim | zephyrproject-rtos/zephyr | python |
<|fim_suffix|>W_STACK)
static inline void z_x86_setup_interrupt_ssp_table(uintptr_t issp_table)
{
z_x86_msr_write(X86_INTERRUPT_SSP_TABLE_MSR, issp_table);
}
#endif
#ifdef CONFIG_X86_CET_VERIFY_KERNEL_SHADOW_STACK
void z_x86_cet_shadow_stack_panic(void);
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_X86_IN... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_X86_INCLUDE_IA32_EXCEPTION_H_
#define ZEPHYR_ARCH_X86_INCLUDE_IA32_EXCEPTION_H_
#ifndef _ASMLANGUAGE
#include <zephyr/toolchain/common.h>
#define _EXCEPTION_INTLIST(vector, dpl) \
".pushsectio... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Private kernel definitions (IA-32)
*
* This file contains private kernel structures definitions and various
* other definitions for the Intel Architecture 32 bit (IA-32) processor
* architect... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>void z_x86_enable_paging(void);
#ifdef __cplusplus
}
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_X86_INCLUDE_IA32_KERNEL_ARCH_FUNC_H_ */
<|fim_prefix|>/*
* Copyright (c) 2016 Wind River Systems, Inc.
* Copyright (c) 2018 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/* t... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2016 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_X86_INCLUDE_IA32_OFFSETS_SHORT_ARCH_H_
#define ZEPHYR_ARCH_X86_INCLUDE_IA32_OFFSETS_SHORT_ARCH_H_
#include <zephyr/offsets.h>
/* kernel */
#define _kernel_offset_to_isf \
(___kernel_t_arch_OFFSET + _... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>h_thread_hw_shadow_stack_t) - 1)
#define IRQ_SHSTK_LAST_ENTRY sizeof(__z_interrupt_stacks_shstk_arr[0]) / \
sizeof(arch_thread_hw_shadow_stack_t) - 1
#define X86_INTERRUPT_SSP_TABLE_INIT(n, _) \
{ \
.ist1 = (uintptr_t)&__z_interrupt_stacks_shstk_arr[n][IRQ_SHSTK_LAST_ENTRY], \
.i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_X86_INCLUDE_INTEL64_KERNEL_ARCH_FUNC_H_
#define ZEPHYR_ARCH_X86_INCLUDE_INTEL64_KERNEL_ARCH_FUNC_H_
#include <zephyr/kernel_structs.h>
#include <zephyr/platform/hoo<|fim_suffix|>bool z_x86_do_kerne... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ne _thread_offset_to_sse \
(___thread_t_arch_OFFSET + ___thread_arch_t_sse_OFFSET)
#define _thread_offset_to_ss \
(___thread_t_arch_OFFSET + ___thread_arch_t_ss_OFFSET)
#define _thread_offset_to_cs \
(___thread_t_arch_OFFSET + ___thread_arch_t_cs_OFFSET)
#ifdef CONFIG_HW_SHADOW_STACK
#define _thread... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ne IV_STACK_FAULT 12
#define IV_GENERAL_PROTECTION 13
#define IV_PAGE_FAULT 14
#define IV_RESERVED 15
#define IV_X87_FPU_FP_ERROR 16
#define IV_ALIGNMENT_CHECK 17
#define IV_MACHINE_CHECK 18
#define IV_SIMD_FP 19
#define IV_VIRT_EXCEPTION 20
#define IV_CTRL_PROTECTION_EXCEPTION 21
#define IV_SECURITY_EXCE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>n the
* instructions, we need to work with both architectures here)
*/
bool ret;
__asm__ volatile ("pushf; cli");
ret = arch_curr_cpu()->nested != 0;
__asm__ volatile ("popf");
return ret;
#else
return _kernel.cpus[0].nested != 0U;
#endif
}
struct multiboot_info;
extern FUNC_NORETURN void z_p... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>FSET)
#endif /* CONFIG_USERSPACE */
#endif /* ZEPHYR_ARCH_X86_INCLUDE_OFFSETS_SHORT_ARCH_H_ */
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
* SPDX-License-Ident<|fim_middle|>ifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_X86_INCLUDE_OFFSETS_SHORT_ARCH_H_
#define ZEPHYR_ARCH_X86_INCLUDE_OFFSETS_S... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>acked page, fix it up (restore P, clear the tracking
* bit), fill *phys with its physical address, and return true. Otherwise
* return false. Called from the x86 page fault handler.
*/
bool z_x86_lru_fault_try_handle(void *addr, uintptr_t *phys);
#endif
/* Early-boot paging setup tasks, called from pr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/x86/arch.h>
#include <zephyr/kernel.h>
#include <zephyr/sys_clock.h>
#include <zephyr/timing/timing.h>
#include <zephyr/app_memory/app_memdomain.h>
K_APP_BMEM(z_libc_partition) static uint64_t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_X86_EFI_H_
#define ZEPHYR_ARCH_X86_EFI_H_
#ifndef _ASMLANGUAGE
#include <stdbool.h>
#include <zephyr/autoconf.h>
#define __abi __attribute__((ms_abi))
/*
* This is a quick installment of EFI ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> *f, ...)
{
int ret;
struct _pfr r = {0};
CALL_VPF(&r);
return ret;
}
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdarg.h>
#include <stdbool.h>
#include <stddef.h>
/* Tiny, but not-as-primitive-as-it-looks implementation of someth... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <stddef.h>
#include <string.h>
#include "efi.h"
#include "printf.h"
#include <zefi-segments.h>
#include <zephyr/arch/x86/efi.h>
#define PUTCHAR_BUFSZ 128
/* EFI GUID for RSDP
* See "Finding the RSDP ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>))
cf.write("};\n\n")
cf.write("struct zero_seg { uint64_t addr; uint32_t sz; };\n\n")
cf.write("static struct zero_seg zefi_zsegs[] = {\n")
for s in zero_segs:
cf.write(" { 0x%x, %d },\n"
% (s[0], s[1]))
cf.write("};\n\n")
cf.write("static uintptr_t z... | fim | zephyrproject-rtos/zephyr | python |
<|fim_suffix|>)thread->switch_handle;
}
#endif /* CONFIG_DEBUG_COREDUMP_THREAD_STACK_TOP */
<|fim_prefix|>/*
* Copyright (c) 2021 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <zephyr/kernel.h>
#include <zephyr/debug/coredump.h>
#include <xtensa_asm2_context.h>
#include... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2016 Cadence Design Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/toolchain.h>
#include <zephyr/tracing/tracing.h>
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
__asm__ volatile ("waiti 0");
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> ELF_R_SYM(rel->r_info) * sizeof(elf_sym_t));
if (!ret) {
ret = llext_read(ldr, &rsym, sizeof(elf_sym_t));
}
if (ret) {
LOG_ERR("Failed to read a symbol table entry, LLEXT linking might fail.");
return ret;
}
/*
* So far in all observed use-cases
* llext_loaded_sect_ptr(ldr, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Cadence Design Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <inttypes.h>
#include <xtensa/config/specreg.h>
#include <xtensa_backtrace.h>
#include <zephyr/arch/common/exc_handle.h>
#include <xtensa_exc.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> memory write packets to replace
* instructions. So there is no need to implement
* software breakpoint here.
*/
__fallthrough;
default:
/* Breakpoint type not supported */
ret = -2;
break;
}
out:
return ret;
}
int arch_gdb_remove_breakpoint(struct gdb_ctx *ctx, uint8_t type,
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>#!/usr/bin/env python3
# Copyright 2023 The ChromiumOS Authors
# SPDX-License-Identifier: Apache-2.0
import re
import sys
# Xtensa Vector Table linker generator
#
# Takes a pre-processed (gcc -dM) cor<|fim_suffix|>ls as long as their
# code is declared using standard conventions (see below).
#
# The sect... | fim | zephyrproject-rtos/zephyr | python |
<|fim_prefix|>#!/usr/bin/env python3
# Copyright (c) 2022 Intel corporation
# SPDX-License-Identifier: Apache-2<|fim_suffix|>they're for
regs = [f"MISC{n}" for n in range(0, int(get("XCHAL_NUM_MISC_REGS")))]
if args.syscall_scratch:
# If there is no THREADPTR, we need to use syscall for
# arch_is_user_context(... | fim | zephyrproject-rtos/zephyr | python |
/*
* Copyright (c) 2016 Cadence Design Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/types.h>
#include <stdio.h>
#include <zephyr/arch/xtensa/irq.h>
#include <zephyr/sys/__assert.h>
#include <kernel_arch_func.h>
#include <xtensa_internal.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DEC... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/irq_offload.h>
#include <zephyr/zsr.h>
#include <zephyr/irq.h>
static struct {
irq_offload_routine_t fn;
const void *arg;
} offload_params[CONFIG_MP_MAX_NUM_CPUS];
static ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ync");
}
<|fim_prefix|>/*
* Copyright 2023 Google LLC
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <stdbool.h>
#include <zephyr/kernel.h>
#include <xtensa/config/core-isa.h>
#include <xtensa_mmu_priv.h>
#include <zephyr/cache.h>
#ifdef CONFIG_USERSPACE
BUILD_ASSERT((CONFIG_PRI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> {
goto out;
}
aligned_size = ROUND_UP(size + addr_offset, XCHAL_MPU_ALIGN);
for (size_t offset = 0; offset < aligned_size;
offset += XCHAL_MPU_ALIGN) {
uint32_t probed = xtensa_pptlb_probe(aligned_addr + offset);
if ((probed & XTENSA_MPU_PROBE_VALID_ENTRY_MASK) == 0U) {
/* There is n... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <zephyr/kernel.h>
#include <zephyr/spinlock.h>
#include <zephyr/toolchain.h>
#include <zephyr/arch/xtensa/arch_inlines.h>
#include <zephyr/arch/xt... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>d_arch_t, return_ps);
GEN_OFFSET_SYM(_thread_t, switch_handle);
#ifdef CONFIG_XTENSA_MMU
GEN_OFFSET_SYM(_thread_arch_t, ptables);
GEN_OFFSET_SYM(_thread_t, mem_domain_info);
GEN_OFFSET_SYM(_mem_domain_info_t, mem_domain);
GEN_OFFSET_SYM(k_mem_domain_t, arch);
GEN_OFFSET_SYM(arch_mem_domain_t, reg_asid);... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_arch_func.h>
#include <kernel_arch_interface.h>
#inclu<|fim_suffix|>interrupt_stacks[0]);
char *stack_end = stack_start + stack_sz;
uint32_t sp;
__asm__ volatile("mov ... | fim | zephyrproject-rtos/zephyr | c |
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