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/*
* Copyright (c) 2022 Thomas Stranger
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT maxim_ds2485
/**
* @brief Driver for the Analog Devices DS2485 1-Wire Master
*/
#include "w1_ds2477_85_common.h"
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/w1.h>
#include <zephyr/kernel.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Thomas Stranger
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/internal/syscall_handler.h>
#include <zephyr/drivers/w1.h>
static inline int z_vrfy_w1_reset_bus(const struct device *dev)
{
K_OOPS(K_SYSCALL_DRIVER_W1(dev, reset_bus));
return z_impl_w1_reset_bus(... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023-2024 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/w1.h>
#include <zephyr/logging/log.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/clock_control/adi_max32_clock_control.h>
#include <wrap_max32_owm.h>
#define DT_DRV_COMPAT adi_m... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Thomas Stranger
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief 1-Wire network related functions.
*
* The following procedures wrap basic w1 syscalls, they should be callable
* from user mode as well as supervisor mode, therefore _ZEPHYR_SUPERVISOR__
* is not defi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Diego Sueiro
* Copyright (c) 2022 Thomas Stranger
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdlib.h>
#include <zephyr/drivers/w1.h>
#include <zephyr/shell/shell.h>
#include <zephyr/kernel.h>
#define BUF_SIZE CONFIG_W1_SHELL_BUFFER_SIZE
static uint8_t msg_buf[BUF... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Thomas Stranger
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT vnd_w1
/*
* This is not a real 1-Wire driver. It is only used to instantiate struct
* devices for the "vnd,w1" devicetree compatible used in test code.
*/
#include <zephyr/drivers/w1.h>
struct w1_vnd_confi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
#define W1_ZEPHYR_GPIO_INIT(inst) \
static const struct w1_gpio_config w1_gpio_cfg_##inst = { \
.master_config.slave_count = W1_INST_SLAVE_COUNT(inst), \
.spec = GPIO_DT_SPE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Thomas Stranger
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT zephyr_w1_serial
/**
* @brief 1-Wire Bus Master driver using Zephyr serial interface.
*
* This driver implements the 1-Wire interface using an uart.
* The driver uses a uart peripheral with a... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Analog Devices, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT adi_max42500_watchdog
#include <zephyr/sys/util_macro.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
.cfg_func = ambiq_wdt_cfg_func_##n}; \
\
DEVICE_DT_INST_DEFINE(n, wdt_ambiq_init, NULL, &wdt_ambiq_data##n, &wdt_ambiq_config##n, \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Realtek Semiconductor Corp.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT realtek_ameba_watchdog
/* Include <soc.h> before <ameba_soc.h> to avoid redefining unlikely() macro */
#include <soc.h>
#include <ameba_soc.h>
#include <zephyr/drivers/watchdog.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>s_write32(WDT_WREN_NUM, WDT_WREN(wdt_addr));
sys_write32(reg, WDT_CTRL(wdt_addr));
k_spin_unlock(&data->lock, key);
return 0;
}
static int wdt_atcwdt200_feed(const struct device *dev, int channel_id)
{
uint32_t wdt_addr = ((const struct wdt_atcwdt200_config *)(dev->config))->base;
ARG_UNUSED(chann... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>RUPT_CPU;
data->callback = config->callback;
break;
case WDT_FLAG_RESET_CPU_CORE:
data->wdt_mode = RESET_ALL_EXCEPT_AON;
data->callback = NULL;
break;
case WDT_FLAG_RESET_SOC:
data->wdt_mode = RESET_ALL;
data->callback = NULL;
break;
default:
LOG_ERR("Unsupported watchdog config flag:... | fim | zephyrproject-rtos/zephyr | c |
/*
* SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT bflb_wdt
#include <zephyr/drivers/watchdog.h>
#include <zephyr/irq.h>
#include <zephyr/sys/util.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(wdt_bflb, CONFIG_WDT_LOG_LEVE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Florin Stancu <niflostancu@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc13xx_cc26xx_watchdog
#include <zephyr/drivers/watchdog.h>
#include <zephyr/irq.h>
#include <soc.h>
#include <errno.h>
#define LOG_LEVEL CONFIG_WDT_LOG_LEVEL
#include <... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nclude <inc/hw_types.h>
#include <inc/hw_memmap.h>
#define LOG_LEVEL CONFIG_WDT_LOG_LEVEL
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(wdt_cc23x0);
#define CC23X0_WDT_UNLOCK(_base) (HWREG((_base) + CKMD_O_WDTLOCK) = 0x1ACCE551)
#define CC23X0_WDT_LOCK(_base) (HWREG((_base) + CKMD... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Pavlo Hamov <pasha.gamov@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc32xx_watchdog
#include <zephyr/drivers/watchdog.h>
#include <soc.h>
#include <errno.h>
/* Driverlib includes */
#include <inc/hw_types.h>
#include <inc/hw_wdt.h>
#includ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
#endif
return 0;
}
DEVICE_DT_INST_DEFINE(0,
wdog_cmsdk_apb_init,
NULL,
NULL, NULL,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&wdog_cmsdk_apb_api);
<|fim_prefix|>/*
* Copyright (c) 2016 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>dt_counter_config *config = dev->config;
struct wdt_counter_data *data = dev->data;
uint8_t ch_cnt = counter_get_num_of_channels(config->counter);
data->alloc_cnt = MIN(ch_cnt, CONFIG_WDT_COUNTER_CH_COUNT);
return 0;
}
DEVICE_DT_DEFINE(DT_WDT_COUNTER, wdt_counter_init, NULL,
&wdt_data, &wdt_coun... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ev_data->callback = config->callback;
#endif
return dw_wdt_calc_period((uint32_t)reg_base, dev_data->clk_freq, config,
&dev_data->config);
}
static int dw_wdt_feed(const struct device *dev, int channel_id)
{
uintptr_t reg_base = DEVICE_MMIO_GET(dev);
/* Only channel 0 is supported */
if (chan... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>w_wdt_dflt_timeout_period_get(const uint32_t base)
{
return FIELD_GET(WDT_DFLT_TOP, sys_read32(base + WDT_COMP_PARAM_1));
}
/**
* @brief The reset pulse length that is available directly after reset.
*
* @param base Device base address.
* @return Reset pulse length
*/
static inline uint32_t dw_wdt_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>2G */
*period_out = WDT_DW_FLAG_CONFIGURED | (period >= 15 ? period - 15 : 0);
return 0;
}
int dw_wdt_probe(const uint32_t base, const uint32_t reset_pulse_length)
{
/* Check component type */
const uint32_t type = dw_wdt_comp_type_get(base);
if (type != WDT_COMP_TYPE_VALUE) {
LOG_ERR("Invalid co... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>n success.
*/
int dw_wdt_probe(const uint32_t base, const uint32_t reset_pulse_length);
/**
* @brief Watchdog disable function
*
* @param dev Device structure.
* @return -ENOTSUP. The hardware does not support disabling.
*/
int dw_wdt_disable(const struct device *dev);
#endif /* ZEPHYR_DRIVERS_WAT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>TON_ENABLE) | WDT_DISABLE_PASSWORD;
/* Clear Pending Flag */
cfg->wdt->WDTPF = (WDT_HALF_WAY_EVENT | WDT_RESET_EVENT);
/* Need disable IE,or the wdt-half-event interrupt will be entered */
cfg->wdt->WDTIE &= ~WDT_HALF_WAY_EVENT;
data->timeout_installed = false;
return 0;
}
static int wdt_kb106x_in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>dt_kb1200_data *data = dev->data;
/* Watchdog Counter Match Value */
if (config->window.min > 0U) {
data->timeout_installed = false;
return -EINVAL;
}
cfg->wdt->WDTM = (config->window.max * 1000) / WDT_TICK_TIME_US;
/* (HW design) The counter match value must be >= 3 */
if (cfg->wdt->WDTM < WDT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2017 Intel Corporation
* Copyright (c) 2025-2026 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT espressif_esp32_watchdog
#if defined(CONFIG_SOC_SERIES_ESP32C5) || defined(CONFIG_SOC_SERIES_ESP32C6) || \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 TOKITA Hiroshi
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT gd_gd32_fwdgt
#include <zephyr/drivers/watchdog.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys_clock.h>
#include <gd32_fwdgt.h>
LOG_MODULE_REGISTER(wdt_fwdgt_gd32, CONFIG_WDT_LOG_LEVEL)... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2019 Interay Solutions B.V.
* Copyright (c) 2019 Oane Kingma
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_gecko_wdog
#include <soc.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/irq.h>
#include <em_wdog.h>
#include <em_cmu.h>
#include <zephyr/logging/log.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>clude <zephyr/syscalls/wdt_feed_mrsh.c>
<|fim_prefix|>/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/watchdog.h>
#include <zephyr/internal/syscall_handler.h>
static inline int z_vrfy_wdt_setup(const struct device *dev, <|fim_middle|>uint... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-FileCopyrightText: <text>Copyright (c) 2026 Infineon Technologies AG,
* or an affiliate of Infineon Technologies AG. All rights reserved.</text>
*
* SPDX-License-Identifier: Apache-2.0
*/
/* Watchdog timer driver for the Infineon MCU family. */
#define DT_DRV_COMPAT infineon_watchdog
#in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/* SPDX-License-Identifier: Apache-2.0 */
/*
* Copyright (c) 2023 Intel Corporation
*
* Author: Adrian Warecki <adrian.warecki@intel.com>
*/
/**
* @file
*
* @brief Intel ACE per-core watchdogs driver
*
* The ace platform has a set of designware watchdogs, one for each core. This driver is respon... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>DE_VALUE);
sys_write32(control, reg_addr);
}
/**
* @brief Clear pause signal
*
* Clears the pause signal to resume the watchdog timing
*
* @param base Device base address.
* @param core Core ID
*/
static inline void intel_adsp_wdt_resume(uint32_t base, const uint32_t core)
{
const uint32_t reg_a... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>RNEL_INIT_PRIORITY_DEFAULT, &wdt_it51xxx_api);
BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
"only one ite,it51xxx-watchdog compatible node can be supported");
<|fim_prefix|>/*
* Copyright (c) 2025 ITE Corporation. All Rights Reserved.
* SPDX-License-Identifier: Apache-2.0
*/
#defin... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> IT8XXX2_WDT_LET1PS);
LOG_DBG("WDT Setup and enabled");
return 0;
}
/*
* reload the WDT and pre-warning timer1 counter
*
* @param dev Pointer to the device structure for the driver instance.
* @param channel_id Index of the fed channel, and we only support
* channel_id = 0 now.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e the iwdg here but during wdt_setup() */
return 0;
}
static int iwdg_stm32_feed(const struct device *dev, int channel_id)
{
const struct iwdg_stm32_config *cfg = dev->config;
ARG_UNUSED(channel_id);
LL_IWDG_ReloadCounter(cfg->instance);
return 0;
}
static DEVICE_API(wdt, iwdg_stm32_api) = {
.se... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> peripheral instance. */
IWDG_TypeDef *instance;
};
struct iwdg_stm32_data {
uint32_t prescaler;
uint32_t reload;
/* IWDG user defined callback on EWI */
wdt_callback_t callback;
};
#endif /* ZEPHYR_DRIVERS_WATCHDOG_IWDG_STM32_H_ */
<|fim_prefix|>/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
* Copy... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Michael Hope <michaelh@juju.nz>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT wch_iwdg
#include <zephyr/drivers/watchdog.h>
#include <zephyr/kernel.h>
#include <zephyr/sys_clock.h>
#include <errno.h>
#include <hal_ch32fun.h>
static int iwdg_wch_setup(cons... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2024 Vogl Electronic GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT litex_watchdog
#include <zephyr/kernel.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/device.h>
#include <zephyr/sys_clock.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(w... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 The Zephyr Project Contributors
*
* SPDX-L<|fim_suffix|>
static int wdt_m5pm1_install_timeout(const struct device *dev,
const struct wdt_timeout_cfg *timeout)
{
struct wdt_m5pm1_data *data = dev->data;
uint32_t seconds;
if (data->timeout_valid) {
return -ENOMEM;
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT adi_max32_watchdog
#include <zephyr/drivers/watchdog.h>
#include <zephyr/irq.h>
#include <zephyr/drivers/clock_control/adi_max32_clock_control.h>
#include <soc.h>
#include <errno.h>
#includ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025-2026 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <stdio.h>
#include <zephyr/irq.h>
#include <zephyr/logging/log.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/clock_control/mchp_clock_control.h>
#define DT_DRV_COMPAT micr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/* wdt_xec.c - Microchip XEC watchdog driver */
#define DT_DRV_COMPAT microchip_xec_watchdog
/*
* Copyright (c) 2019 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/irq.h>
#include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
#define LOG_LEVEL CONFIG_WDT_... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Alexandre Rey
* Copyright 2025 NXP
*
* Based on wdt_mcux_rtwdog.c, which is:
* Copyright 2024, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_cop
/**
* @brief Watchdog (WDT) Driver for NXP MCUX Computer Operating Properly (COP)
*
* Note:
* - Once the watch... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2020, 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_imx_wdog
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/sys/device_mmio.h>
#include <zephyr/sys_clock.h>
#include <fsl_wdog.h>
#define LOG_LEVEL CONFIG_W... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_rtwdog
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/sys_clock.h>
#include <fsl_rtwdog.h>
#define LOG_LEVEL CONFIG_WDT_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>T_GET(0), 0);
irq_enable(DT_INST_IRQN(0));
}
<|fim_prefix|>/*
*
* Copyright (c) 2018, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_wdog
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/irq.h>
#include <fsl_wdog.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (2) 2019 Vestas Wind Systems A/S
* Copyright 2025-2026 NXP
*
* Based on wdt_mcux_wdog.c, which is:
* Copyright (c) 2018, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_wdog32
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/clock_control.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>return 0;
}
static int mcux_wwdt_disable(const struct device *dev)
{
const struct mcux_wwdt_config *config = dev->config;
struct mcux_wwdt_data *data = dev->data;
WWDT_Type *base = config->base;
WWDT_Deinit(base);
data->timeout_valid = false;
data->active_before_sleep = false;
LOG_DBG("Disabled t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Texas Instruments Inc.
* Copyright (c) 2026 Linumiz.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/logging/log.h>
/* Driverlib includes */
#include <ti/driverlib/dl_wwdt.h>
#define DT_DRV_COMPAT t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>g 5Ch to WDSDM */
inst->WDSDM = 0x5C;
data->last_watchdog_touch = k_uptime_get();
/* Reload and restart T0 timer */
return wdt_t0out_reload(dev);
}
/* WDT driver registration */
static DEVICE_API(wdt, wdt_npcx_driver_api) = {
.setup = wdt_npcx_setup,
.disable = wdt_npcx_disable,
.install_timeout ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
static const struct wdt_npm10xx_config wdt_npm10xx_config##n = { \
.mfd = DEVICE_DT_GET(DT_INST_PARENT(n)), \
.i2c = I2C_DT_SPEC_GET(DT_INST_PARENT(n)), \
DT_FOREACH_CHILD_STATUS_OK... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
\
DEVICE_DT_INST_DEFINE(n, &wdt_npm13xx_init, NULL, &wdt_##partno##_data##n, \
&wdt_##partno##_config##n, POST_KERNEL, \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>100_DEFINE)
<|fim_prefix|>/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nordic_npm2100_wdt
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/mfd... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ERVALUE_MS_LSB) +
1U);
if ((window < NPM6001_WDTRIGGERVALUE_MIN) ||
(window > NPM6001_WDTRIGGERVALUE_MAX)) {
return -EINVAL;
}
/* enable OSC/COUNTER/LS */
buf[0] = NPM6001_WDPWRUPVALUE;
buf[1] = NPM6001_WDPWRUPVALUE_OSC_ENABLE |
NPM6001_WDPWRUPVALUE_COUNTER_ENABLE |
NPM6001_WDPWRUPV... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
int err_code; \
struct wdt_nrfx_data *data = dev->data; \
WDT_NRFX_WDT_IRQ(inst); \
err_code = nrfx_wdt_init(&data->wdt, \
NULL, \
IS_ENABLED(CONFIG_WDT_NRFX_NO_IRQ) \
? NULL \
: wdt_##inst##_eve... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nuvoton_numaker_wdt
#include <zephyr/kernel.h>
#include <zephyr/drivers/reset.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/clock_control_num... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
IRQ_CONNECT(DT_INST_IRQN(n), \
DT_INST_IRQ(n, priority), \
nxp_ewm_isr, DEVICE_DT_INST_GET(n), 0); \
\
irq_enable(DT_INST_IRQN(n)); \
}
DT_INST_FOREACH_STATUS_OKAY(WDT_EWM_INIT)
<|fim_prefix|>/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>= fs26_wd_compute_answer(data->token);
if (fs26_setreg(&config->spi, FS26_FS_WD_ANSWER, answer)) {
LOG_ERR("Failed to write answer");
retval = -EIO;
}
}
} else {
retval = -EINVAL;
}
/* Check if watchdog refresh was successful */
if (!retval) {
if (!fs26_getreg(&config->spi, FS26_F... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ine FCCU_CFG_FCCU1_FCCU2_PAIR (0x1 << FCCU_CFG_SHIFT)
#define FCCU_CFG_FCCU1_FCCU2_SINGLE (0x2 << FCCU_CFG_SHIFT)
#define FCCU_CFG_FCCU1_ONLY (0x3 << FCCU_CFG_SHIFT)
#define FCCU_CFG_FCCU2_ONLY (0x4 << FCCU_CFG_SHIFT)
#define FCCU_CFG_FCCU1_FCCU2_PWM ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_s32_swt
#include <zephyr/kernel.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/irq.h>
#define LOG_LEVEL CONFIG_WDT_LOG_LEVEL
#include <zephyr/logging... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>bark = cfg->callback;
sys_write32((uint32_t) bark_thold, reg_base + OT_REG_WDOG_BARK_THOLD_OFFSET);
sys_write32((uint32_t) bite_thold, reg_base + OT_REG_WDOG_BITE_THOLD_OFFSET);
#else
bite_thold = ((uint64_t) cfg->window.max * dev_cfg->clk_freq / 1000);
/* Saturate this config value; min is verified t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>eep mode not supported");
return -ENOTSUP;
}
wdt_renesas_ra_inst_lock(dev);
if (atomic_test_bit(&data->device_state, WDT_RENESAS_RA_ATOMIC_ENABLE)) {
LOG_ERR("wdt has been already setup");
ret = -EBUSY;
goto end;
}
if (!atomic_test_bit(&data->device_state, WDT_RENESAS_RA_ATOMIC_TIMEOUT_SET... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation and/or its affiliates
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Independent Watchdog (IWDT) Driver for Renesas RX
*/
#define DT_DRV_COMPAT renesas_rx_iwdt
#include <zephyr/drivers/watchdog.h>
#include <soc.h>
#include <zephyr/k... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rz_wdt
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/drivers/watchdog.h>
#include "r_wdt.h"
#include <math.h>
LOG_MODULE_REGISTER(wdt_renesa... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>lk_id), \
}; \
static struct wdt_rpi_pico_data wdt_##idx##_data = { \
.reset_type = WDT_FLAG_RESET_SOC, \
.load = 0, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Realtek Semiconductor, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#<|fim_suffix|>wdt_config rts_fp_config = {
.base = DT_INST_REG_ADDR(0),
};
DEVICE_DT_INST_DEFINE(0, &rts_fp_wdt_init, NULL, NULL, &rts_fp_config, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>8
#define WDOG_INT_MASK BIT(8)
#define WDOG_INT_SEL_OFFSET 9
#define WDOG_INT_SEL_MASK BIT(9)
#define WDOG_CNT_OFFSET 16
#define WDOG_CNT_MASK GENMASK(31, 16)
#endif /* ZEPHYR_DRIVERS_WATCHDOG_WDT_RTS_RTS5817_H_ */
<|fim_prefix|>/*
* Copyright (c) 2025 Realtek Semiconductor, Inc.
*
* SPDX-Lice... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7, Dylan Hsieh
*/
#define DT_DRV_COMPAT realtek_rts5912_watchdog
#include <soc.h>
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/drivers/cloc... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (C) 2017 Intel Deutschland GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam_watchdog
/**
* @brief Watchdog (WDT) Driver for Atmel SAM MCUs
*
* Note:
* - Once the watchdog disable bit is set, it cannot be cleared till next
* power reset, i.e, the watchdog cannot... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_WDT
| GCLK_CLKCTRL_GEN_GCLK2
| GCLK_CLKCTRL_CLKEN;
#endif
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority), wdt_sam0_isr,
DEVICE_DT_INST_GET(0), 0);
irq_enable(DT_INST_IRQN(0));
return 0;
}
static struct wdt_sam0_dev_data wdt_sam0_data;
DEVI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2024-2025, Gerson Fernando Budke <nandojve@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam4l_watchdog
/**
* @brief Watchdog (WDT) Driver for Atmel SAM4L MCUs
*
* Note:
* - SAM4L watchdog has a fuse bit to automatically enable the watchdog ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025, Qingsong Gou <gouqs@hotmail.com>
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT sifli_sf32lb_wdt
#include <zephyr/arch/cpu.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/logging/log.h>
#include <register.h>
LOG_MODULE_REGISTER(wdt_sf32lb, CONFIG_WDT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Centralp
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdlib.h>
#include <zephyr/shell/shell.h>
#include <zephyr/drivers/watchdog.h>
#define WDT_SETUP_HELP \
SHELL_HELP("Set up watchdog insta... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2020 Katsuhiro Suzuki
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Watchdog (WDT) Driver for SiFive Freedom
*/
#define DT_DRV_COMPAT sifive_wdt
#include <zephyr/kernel.h>
#include <soc.h>
#include <zephyr/drivers/watchdog.h>
#define LOG_LEVEL CONFIG_WDT_LOG_LEVEL
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
static struct siwx91x_wdt_data siwx91x_wdt_data_##inst; \
static void siwx91x_wdt_irq_configure_##inst(void) \
{ \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Renesas Electronics Corporation and/or its affiliates
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <zephyr/arch/arm/nmi.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(wdog_smartbon... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT intel_tco_wdt
#include <zephyr/kernel.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(wdt_tco, CONFIG_WDT_LOG_LEVEL);
#define BASE(d) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Ayush Singh, BeagleBoard.org Foundation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_j7_rti_wdt
#include <zephyr/drivers/watchdog.h>
#include <zephyr/irq.h>
#include <zephyr/kernel.h>
#include <stdint.h>
#define WDENABLE_KEY 0xa98559da
#define WDDISAB... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>indow timeouts not supported");
return -EINVAL;
} else if (cfg->callback != NULL) {
LOG_ERR("Callbacks not supported");
return -EINVAL;
}
return 0;
}
static int ti_tps382x_feed(const struct device *dev, int channel_id)
{
const struct ti_tps382x_config *config = dev->config;
return gpio_pin_t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>2_DATA(dev);
WWDG_TypeDef *wwdg = WWDG_STM32_STRUCT(dev);
uint32_t timeout = config->window.max * USEC_PER_MSEC;
uint32_t calculated_timeout;
uint32_t prescaler_exp = 0U;
uint32_t counter = 0U;
if (config->callback != NULL) {
data->callback = config->callback;
}
wwdg_stm32_convert_timeout(dev,... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_WATCHDOG_WWDG_STM32_H_<|fim_suffix|> STM32 MCUs
*
* The driver targets all STM32 SoCs. For details please refer to
* an appropriate reference manual and look for chapter called:
*
* ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>T_COUNTER_MIN to this as a offset value.
*/
static inline uint32_t gd32_wwdgt_calc_ticks(const struct device *dev,
uint32_t timeout, uint32_t exp)
{
const struct gd32_wwdgt_config *config = dev->config;
uint32_t pclk;
(void)clock_control_get_rate(GD32_CLOCK_CONTROLLER,
(clock_cont... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>wwdt_numaker_api) = {
.setup = wwdt_numaker_setup,
.disable = wwdt_numaker_disable,
.install_timeout = wwdt_numaker_install_timeout,
.feed = wwdt_numaker_feed,
};
static int wwdt_numaker_init(const struct device *dev)
{
const struct wwdt_numaker_config *cfg = dev->config;
struct numaker_scc_subsys ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>y = k_spin_lock(&data->lock);
uint32_t twcsr0 = sys_read32(config->base + REG_TWCSR0);
if ((twcsr0 & CSR0_WRS) != 0) {
twcsr0 |= CSR0_WRS;
sys_write32(twcsr0, config->base + REG_TWCSR0);
}
k_spin_unlock(&data->lock, key);
return 0;
}
int z_impl_hwinfo_get_supported_reset_cause(uint32_t *suppo... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Advanced Micro Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT xlnx_versal_wwdt
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/hwinfo.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/log... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>this is a level triggered interrupt. the event must be cleared */
XMC_SCU_INTERRUPT_ClearEventStatus(XMC_SCU_INTERRUPT_EVENT_WDT_WARN);
data->is_serviced = false;
if (data->cb) {
data->cb(dev, 0);
}
/* Ensure that watchdog is serviced if RESET_NONE mode is used */
if (data->mode == WDT_FLAG_RES... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2024-2025 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT espressif_esp32_xt_wdt
#include <soc/rtc_cntl_reg.h>
#include <hal/xt_wdt_hal.h>
#include <esp_attr.h>
#include <string.h>
#include <zephyr/drivers/watchdog.h>
#include <zephyr/driv... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Realtek Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_WIFI_AMEBA_AMEBA_WIFI_H_
#define ZEPHYR_DRIVERS_WIFI_AMEBA_AMEBA_WIFI_H_
#include "os_wrapper_semaphore.h"
#include "rtw_wifi_defs.h"
#include "wifi_intf_drv_to_app_basic.h"
#include "os_wra... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ic const struct net_wifi_mgmt_offload rtk_api = {
.wifi_iface.iface_api.init = ameba_wifi_init,
.wifi_iface.send = ameba_wifi_send,
.wifi_mgmt_api = &ameba_wifi_mgmt,
};
/* inst replace by DT_DRV_COMPAT(inst) */
NET_DEVICE_DT_INST_DEFINE(0, ameba_wifi_dev_init, NULL, &ameba_data[STA_WLAN_INDEX], NULL,... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nk_mode = WIFI_LINK_MODE_UNKNOWN;
sta_info.twt_capable = false; /* Only support in 802.11ax */
sta_info.mac_length = WIFI_MAC_ADDR_LEN;
memcpy(sta_info.mac, event->mac, WIFI_MAC_ADDR_LEN);
/* Expect the return value to always be ESP_OK,
* since it is called in esp_wifi_event_handler()
*/
(void)e... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>mac_addr), NET_LINK_ETHERNET);
if (IS_ENABLED(CONFIG_WIFI_ESP_AT_VERSION_1_7)) {
/* This is the mode entered in above setup commands */
dev->mode = ESP_MODE_STA;
/*
* In case of ESP 1.7 this is the first time CWMODE is entered
* STA mode, so request hostname change now.
*/
esp_configur... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>uct esp_data esp_driver_data;
enum esp_socket_flags {
ESP_SOCK_IN_USE = BIT(1),
ESP_SOCK_CONNECTING = BIT(2),
ESP_SOCK_CONNECTED = BIT(3),
ESP_SOCK_CLOSE_PENDING = BIT(4),
ESP_SOCK_WORKQ_STOPPED = BIT(5),
};
struct esp_socket {
/* internal */
struct k_mutex lock;
atomic_t refcount;
uint8_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>static int _sock_send(struct esp_socket *sock, struct net_pkt *pkt)
{
struct esp_data *dev = esp_socket_to_dev(sock);
char cmd_buf[sizeof("AT+CIPSEND=0,,\"\",") +
sizeof(STRINGIFY(ESP_MTU)) - 1 +
NET_IPV4_ADDR_LEN + sizeof("65535") - 1];
char addr_str[NET_IPV4_ADDR_LEN];
int ret, write_l... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>f(pkt);
return;
}
}
#endif /* CONFIG_NET_SOCKETS */
k_mutex_lock(&sock->lock, K_FOREVER);
if (sock->recv_cb) {
sock->recv_cb(sock->context, pkt, NULL, NULL,
0, sock->recv_user_data);
k_sem_give(&sock->sem_data_ready);
} else {
/* Discard */
net_pkt_unref(pkt);
}
k_mutex_unlock(... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Arduino SA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <string.h>
#include <zephyr/kernel.h>
#include "esp_hosted_wifi.h"
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(esp_hosted_hal, CONFIG_WIFI_LOG_LEVEL);
int esp_hosted_hal_init(const st... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ef ZEPHYR_INCLUDED_DRIVERS_ESP_HOSTED_HAL_H
#define ZEPHYR_INCLUDED_DRIVERS_ESP_HOSTED_HAL_H
int esp_hosted_hal_init(const struct device *dev);
bool esp_hosted_hal_data_ready(const struct device *dev);
int esp_hosted_hal_spi_transfer(const struct device *dev, void *tx, void *rx, uint32_t size);
#endif /* ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>sgId_Resp_GetCountryCode:
return ctrl_msg->resp_get_country_code.resp;
case CtrlMsgId_Resp_Custom_RPC_Unserialised_Msg:
return ctrl_msg->resp_custom_rpc_unserialised_msg.resp;
default:
return -1;
}
}
#if defined(CONFIG_WIFI_ESP_HOSTED_DEBUG)
static void esp_hosted_frame_dump(esp_frame_t *frame)
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Arduino SA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <pb_encode.h>
#include <pb_decode.h>
#include <esp_hosted_proto.pb.h>
#include <esp_hosted_wifi.h>
#include <esp_hosted_hal.h>
#include <esp_hosted_util.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(esp_... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Arduino SA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_WIFI_ESP_HOSTED_WIFI_H_
#define ZEPHYR_DRIVERS_WIFI_ESP_HOSTED_WIFI_H_
#include <zephyr/kernel.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/net/wifi.h>
#include <zephyr/net... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/**
* Copyright (c) 2018 Linaro
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_WIFI_ESWIFI_ESWIFI_H_
#define ZEPHYR_DRIVERS_WIFI_ESWIFI_ESWIFI_H_
#include <zephyr/kernel.h>
#include <stdio.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/net/wifi_mgmt.h>
#include "eswifi_off... | fim | zephyrproject-rtos/zephyr | c |
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