system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
__global__ void end()
{
if(threadIdx.x==31 && blockIdx.x == 1023)
{
printf("end\n");
}
}
int main()
{
end<<<1024,32>>>();
cudaDeviceSynchronize();
} | .file "tmpxft_000db2df_00000000-6_threadIdx_blockIdx.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
__global__ void end()
{
if(threadIdx.x==31 && blockIdx.x == 1023)
{
printf("end\n");
}
}
int main()
{
end<<<1024,32>>>();
cudaDeviceSynchronize();
} | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void end()
{
if(threadIdx.x==31 && blockIdx.x == 1023)
{
printf("end\n");
}
}
int main()
{
end<<<1024,32>>>();
hipDeviceSynchronize();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void end()
{
if(threadIdx.x==31 && blockIdx.x == 1023)
{
printf("end\n");
}
}
int main()
{
end<<<1024,32>>>();
hipDeviceSynchronize();
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3endv
.globl _Z3endv
.p2align 8
.type _Z3endv,@function
_Z3endv:
v_cmp_eq_u32_e32 vcc_lo, 31, v0
s_cmpk_eq_i32 s15, 0x3ff
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(S... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void end()
{
if(threadIdx.x==31 && blockIdx.x == 1023)
{
printf("end\n");
}
}
int main()
{
end<<<1024,32>>>();
hipDeviceSynchronize();
} | .text
.file "threadIdx_blockIdx.hip"
.globl _Z18__device_stub__endv # -- Begin function _Z18__device_stub__endv
.p2align 4, 0x90
.type _Z18__device_stub__endv,@function
_Z18__device_stub__endv: # @_Z18__device_stub__endv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp),... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3endv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3endv
.globl _Z3endv
.p2align 8
.type _Z3endv,@function
_Z3endv:
v_cmp_eq_u32_e32 vcc_lo, 31, v0
s_cmpk_eq_i32 s15, 0x3ff
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(S... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000db2df_00000000-6_threadIdx_blockIdx.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "threadIdx_blockIdx.hip"
.globl _Z18__device_stub__endv # -- Begin function _Z18__device_stub__endv
.p2align 4, 0x90
.type _Z18__device_stub__endv,@function
_Z18__device_stub__endv: # @_Z18__device_stub__endv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp),... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"
#include <stdio.h>
#include <stdlib.h>
#define THREADS 5
#define BLOCKS 1
__global__ void testFunction(float *dev_a, float *dev_b, float dev_c)
{
int thread = threadIdx.x;
if(thread == 0)
{
printf("dev[%d] = %.2f;\n", thread, dev_a[thread... | code for sm_80
Function : _Z12testFunctionPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"
#include <stdio.h>
#include <stdlib.h>
#define THREADS 5
#define BLOCKS 1
__global__ void testFunction(float *dev_a, float *dev_b, float dev_c)
{
int thread = threadIdx.x;
if(thread == 0)
{
printf("dev[%d] = %.2f;\n", thread, dev_a[thread... | .file "tmpxft_0001f249_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"
#include <stdio.h>
#include <stdlib.h>
#define THREADS 5
#define BLOCKS 1
__global__ void testFunction(float *dev_a, float *dev_b, float dev_c)
{
int thread = threadIdx.x;
if(thread == 0)
{
printf("dev[%d] = %.2f;\n", thread, dev_a[thread... | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#define THREADS 5
#define BLOCKS 1
__global__ void testFunction(float *dev_a, float *dev_b, float dev_c)
{
int thread = threadIdx.x;
if(thread == 0)
{
printf("dev[%d] = %.2f;\n", thread, dev_a[thread]);
printf("b = %.2f;\n", *dev_b);
printf("c 1 = %.2f... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#define THREADS 5
#define BLOCKS 1
__global__ void testFunction(float *dev_a, float *dev_b, float dev_c)
{
int thread = threadIdx.x;
if(thread == 0)
{
printf("dev[%d] = %.2f;\n", thread, dev_a[thread]);
printf("b = %.2f;\n", *dev_b);
printf("c 1 = %.2f... | .text
.file "main.hip"
.globl _Z27__device_stub__testFunctionPfS_f # -- Begin function _Z27__device_stub__testFunctionPfS_f
.p2align 4, 0x90
.type _Z27__device_stub__testFunctionPfS_f,@function
_Z27__device_stub__testFunctionPfS_f: # @_Z27__device_stub__testFunctionPfS_f
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_d... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001f249_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "main.hip"
.globl _Z27__device_stub__testFunctionPfS_f # -- Begin function _Z27__device_stub__testFunctionPfS_f
.p2align 4, 0x90
.type _Z27__device_stub__testFunctionPfS_f,@function
_Z27__device_stub__testFunctionPfS_f: # @_Z27__device_stub__testFunctionPfS_f
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_d... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* Face Factor Distance
* (MP3, Fall 2019, GPU Programming/Yifan Liu)
*/
#include <assert.h>
#include <cuda.h>
#include <stdio.h>
#include <math.h>
#include <iostream>
#include <fstream>
#include <ctime>
#include <string>
#include <sstream>
/* Usage message displayed when invalid command line arguments are supplied *... | .file "tmpxft_000c4c8b_00000000-6_vector_distance_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL15getDistance_gpuPfS_ii, @function
_ZL15getDistance_gpuPfS_ii:
.LFB3886:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %ea... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* Face Factor Distance
* (MP3, Fall 2019, GPU Programming/Yifan Liu)
*/
#include <assert.h>
#include <cuda.h>
#include <stdio.h>
#include <math.h>
#include <iostream>
#include <fstream>
#include <ctime>
#include <string>
#include <sstream>
/* Usage message displayed when invalid command line arguments are supplied *... | /*
* Face Factor Distance
* (MP3, Fall 2019, GPU Programming/Yifan Liu)
*/
#include <assert.h>
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <iostream>
#include <fstream>
#include <ctime>
#include <string>
#include <sstream>
/* Usage message displayed when invalid command line arguments are... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
* Face Factor Distance
* (MP3, Fall 2019, GPU Programming/Yifan Liu)
*/
#include <assert.h>
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <iostream>
#include <fstream>
#include <ctime>
#include <string>
#include <sstream>
/* Usage message displayed when invalid command line arguments are... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZL15getDistance_gpuPfS_ii,"axG",@progbits,_ZL15getDistance_gpuPfS_ii,comdat
.globl _ZL15getDistance_gpuPfS_ii
.p2align 8
.type _ZL15getDistance_gpuPfS_ii,@function
_ZL15getDistance_gpuPfS_ii:
s_load_b32 s3, s[0:1], 0x10
v_bfe_u32 v1, v... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | template<int nt, int vt, typename func_t>
__global__ void index_elementwise_kernel(int N, func_t f) {
int tid = threadIdx.x;
int nv = nt * vt;
int idx = nv * blockIdx.x + tid;
#pragma unroll
for (int i = 0; i < vt; i++) {
if (idx < N) {
f(idx);
idx += nt;
}
}
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | template<int nt, int vt, typename func_t>
__global__ void index_elementwise_kernel(int N, func_t f) {
int tid = threadIdx.x;
int nv = nt * vt;
int idx = nv * blockIdx.x + tid;
#pragma unroll
for (int i = 0; i < vt; i++) {
if (idx < N) {
f(idx);
idx += nt;
}
}
} | .file "tmpxft_0012110a_00000000-6_index.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | template<int nt, int vt, typename func_t>
__global__ void index_elementwise_kernel(int N, func_t f) {
int tid = threadIdx.x;
int nv = nt * vt;
int idx = nv * blockIdx.x + tid;
#pragma unroll
for (int i = 0; i < vt; i++) {
if (idx < N) {
f(idx);
idx += nt;
}
}
} | #include <hip/hip_runtime.h>
template<int nt, int vt, typename func_t>
__global__ void index_elementwise_kernel(int N, func_t f) {
int tid = threadIdx.x;
int nv = nt * vt;
int idx = nv * blockIdx.x + tid;
#pragma unroll
for (int i = 0; i < vt; i++) {
if (idx < N) {
f(idx);
idx += nt;
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
template<int nt, int vt, typename func_t>
__global__ void index_elementwise_kernel(int N, func_t f) {
int tid = threadIdx.x;
int nv = nt * vt;
int idx = nv * blockIdx.x + tid;
#pragma unroll
for (int i = 0; i < vt; i++) {
if (idx < N) {
f(idx);
idx += nt;
}
}
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
template<int nt, int vt, typename func_t>
__global__ void index_elementwise_kernel(int N, func_t f) {
int tid = threadIdx.x;
int nv = nt * vt;
int idx = nv * blockIdx.x + tid;
#pragma unroll
for (int i = 0; i < vt; i++) {
if (idx < N) {
f(idx);
idx += nt;
}
}
} | .text
.file "index.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project ro... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012110a_00000000-6_index.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "index.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project ro... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* Noopur Maheshwari : 111464061
* Rahul Rane : 111465246
*/
#include <pthread.h>
#include <iostream>
using namespace std;
extern pthread_mutex_t lock;
int get_shared_var_value(int *ptr) {
int ret;
//cout<<"About to lock 1"<<endl;
pthread_mutex_lock(&lock);
//cout<<"lock 1"<<endl;
ret = *ptr;
//cout<<"About to unlock... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* Noopur Maheshwari : 111464061
* Rahul Rane : 111465246
*/
#include <pthread.h>
#include <iostream>
using namespace std;
extern pthread_mutex_t lock;
int get_shared_var_value(int *ptr) {
int ret;
//cout<<"About to lock 1"<<endl;
pthread_mutex_lock(&lock);
//cout<<"lock 1"<<endl;
ret = *ptr;
//cout<<"About to unlock... | .file "tmpxft_001a8933_00000000-6_atomic.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnr... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* Noopur Maheshwari : 111464061
* Rahul Rane : 111465246
*/
#include <pthread.h>
#include <iostream>
using namespace std;
extern pthread_mutex_t lock;
int get_shared_var_value(int *ptr) {
int ret;
//cout<<"About to lock 1"<<endl;
pthread_mutex_lock(&lock);
//cout<<"lock 1"<<endl;
ret = *ptr;
//cout<<"About to unlock... | /*
* Noopur Maheshwari : 111464061
* Rahul Rane : 111465246
*/
#include <hip/hip_runtime.h>
#include <pthread.h>
#include <iostream>
using namespace std;
extern pthread_mutex_t lock;
int get_shared_var_value(int *ptr) {
int ret;
//cout<<"About to lock 1"<<endl;
pthread_mutex_lock(&lock);
//cout<<"lock 1"<<endl;
ret = *... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
* Noopur Maheshwari : 111464061
* Rahul Rane : 111465246
*/
#include <hip/hip_runtime.h>
#include <pthread.h>
#include <iostream>
using namespace std;
extern pthread_mutex_t lock;
int get_shared_var_value(int *ptr) {
int ret;
//cout<<"About to lock 1"<<endl;
pthread_mutex_lock(&lock);
//cout<<"lock 1"<<endl;
ret = *... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* Noopur Maheshwari : 111464061
* Rahul Rane : 111465246
*/
#include <hip/hip_runtime.h>
#include <pthread.h>
#include <iostream>
using namespace std;
extern pthread_mutex_t lock;
int get_shared_var_value(int *ptr) {
int ret;
//cout<<"About to lock 1"<<endl;
pthread_mutex_lock(&lock);
//cout<<"lock 1"<<endl;
ret = *... | .text
.file "atomic.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20get_shared_var_valuePi # -- Begin function _Z20get_shared_var_valuePi
.p2align 4, 0x90
.typ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a8933_00000000-6_atomic.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnr... | .text
.file "atomic.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20get_shared_var_valuePi # -- Begin function _Z20get_shared_var_valuePi
.p2align 4, 0x90
.typ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ double min2(double a, double b)
{
if (b < a) return b;
return a;
}
__device__ double max2(double a, double b)
{
if (b > a) return b;
return a;
}
__global__ void ConditionCFLKernel2D1 (double *Rsup, double *Rinf, double *Rmed, int nsec, int nrad, double *Vresidual, double *Vtheta, double... | .file "tmpxft_0017efb6_00000000-6_ConditionCFLKernel2D1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ double min2(double a, double b)
{
if (b < a) return b;
return a;
}
__device__ double max2(double a, double b)
{
if (b > a) return b;
return a;
}
__global__ void ConditionCFLKernel2D1 (double *Rsup, double *Rinf, double *Rmed, int nsec, int nrad, double *Vresidual, double *Vtheta, double... | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ double min2(double a, double b)
{
if (b < a) return b;
return a;
}
__device__ double max2(double a, double b)
{
if (b > a) return b;
return a;
}
__global__ void ConditionCFLKernel2D1 (double *Rsup, double *Rinf, double *Rmed, int nsec, int nrad, double *Vres... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ double min2(double a, double b)
{
if (b < a) return b;
return a;
}
__device__ double max2(double a, double b)
{
if (b > a) return b;
return a;
}
__global__ void ConditionCFLKernel2D1 (double *Rsup, double *Rinf, double *Rmed, int nsec, int nrad, double *Vres... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_
.globl _Z21ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_
.p2align 8
.type _Z21ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_,@function
_Z21ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_:
s_clause 0x1
s_load_b32 s2, s[0:1]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ double min2(double a, double b)
{
if (b < a) return b;
return a;
}
__device__ double max2(double a, double b)
{
if (b > a) return b;
return a;
}
__global__ void ConditionCFLKernel2D1 (double *Rsup, double *Rinf, double *Rmed, int nsec, int nrad, double *Vres... | .text
.file "ConditionCFLKernel2D1.hip"
.globl _Z36__device_stub__ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_ # -- Begin function _Z36__device_stub__ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_
.p2align 4, 0x90
.type _Z36__device_stub__ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_,@function
_Z36__device_stub__ConditionCFLKer... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017efb6_00000000-6_ConditionCFLKernel2D1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... | .text
.file "ConditionCFLKernel2D1.hip"
.globl _Z36__device_stub__ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_ # -- Begin function _Z36__device_stub__ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_
.p2align 4, 0x90
.type _Z36__device_stub__ConditionCFLKernel2D1PdS_S_iiS_S_S_iS_S_S_,@function
_Z36__device_stub__ConditionCFLKer... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void TanhBackKernel(float* Z, float* dZ, int size){
int id = blockIdx.x * blockDim.x + threadIdx.x;
if(id < size){
float t = (Z[id]);
dZ[id] = dZ[id] * (1-t*t) ;
}
} | code for sm_80
Function : _Z14TanhBackKernelPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void TanhBackKernel(float* Z, float* dZ, int size){
int id = blockIdx.x * blockDim.x + threadIdx.x;
if(id < size){
float t = (Z[id]);
dZ[id] = dZ[id] * (1-t*t) ;
}
} | .file "tmpxft_000136e9_00000000-6_TanhBackKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void TanhBackKernel(float* Z, float* dZ, int size){
int id = blockIdx.x * blockDim.x + threadIdx.x;
if(id < size){
float t = (Z[id]);
dZ[id] = dZ[id] * (1-t*t) ;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void TanhBackKernel(float* Z, float* dZ, int size){
int id = blockIdx.x * blockDim.x + threadIdx.x;
if(id < size){
float t = (Z[id]);
dZ[id] = dZ[id] * (1-t*t) ;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void TanhBackKernel(float* Z, float* dZ, int size){
int id = blockIdx.x * blockDim.x + threadIdx.x;
if(id < size){
float t = (Z[id]);
dZ[id] = dZ[id] * (1-t*t) ;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14TanhBackKernelPfS_i
.globl _Z14TanhBackKernelPfS_i
.p2align 8
.type _Z14TanhBackKernelPfS_i,@function
_Z14TanhBackKernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void TanhBackKernel(float* Z, float* dZ, int size){
int id = blockIdx.x * blockDim.x + threadIdx.x;
if(id < size){
float t = (Z[id]);
dZ[id] = dZ[id] * (1-t*t) ;
}
} | .text
.file "TanhBackKernel.hip"
.globl _Z29__device_stub__TanhBackKernelPfS_i # -- Begin function _Z29__device_stub__TanhBackKernelPfS_i
.p2align 4, 0x90
.type _Z29__device_stub__TanhBackKernelPfS_i,@function
_Z29__device_stub__TanhBackKernelPfS_i: # @_Z29__device_stub__TanhBackKernelPfS_i
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14TanhBackKernelPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14TanhBackKernelPfS_i
.globl _Z14TanhBackKernelPfS_i
.p2align 8
.type _Z14TanhBackKernelPfS_i,@function
_Z14TanhBackKernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000136e9_00000000-6_TanhBackKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "TanhBackKernel.hip"
.globl _Z29__device_stub__TanhBackKernelPfS_i # -- Begin function _Z29__device_stub__TanhBackKernelPfS_i
.p2align 4, 0x90
.type _Z29__device_stub__TanhBackKernelPfS_i,@function
_Z29__device_stub__TanhBackKernelPfS_i: # @_Z29__device_stub__TanhBackKernelPfS_i
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | extern "C" {
__global__ void Vector_Addition(int *a, int *b, int *c)
{
int tid = blockIdx.x;
if (tid < 100)
c[tid] = a[tid] + b[tid];
}
} | code for sm_80
Function : Vector_Addition
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e240000002500 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | extern "C" {
__global__ void Vector_Addition(int *a, int *b, int *c)
{
int tid = blockIdx.x;
if (tid < 100)
c[tid] = a[tid] + b[tid];
}
} | .file "tmpxft_0010bdaf_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | extern "C" {
__global__ void Vector_Addition(int *a, int *b, int *c)
{
int tid = blockIdx.x;
if (tid < 100)
c[tid] = a[tid] + b[tid];
}
} | #include <hip/hip_runtime.h>
extern "C" {
__global__ void Vector_Addition(int *a, int *b, int *c)
{
int tid = blockIdx.x;
if (tid < 100)
c[tid] = a[tid] + b[tid];
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
extern "C" {
__global__ void Vector_Addition(int *a, int *b, int *c)
{
int tid = blockIdx.x;
if (tid < 100)
c[tid] = a[tid] + b[tid];
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected Vector_Addition
.globl Vector_Addition
.p2align 8
.type Vector_Addition,@function
Vector_Addition:
s_cmpk_gt_i32 s15, 0x63
s_cbranch_scc1 .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_load_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
extern "C" {
__global__ void Vector_Addition(int *a, int *b, int *c)
{
int tid = blockIdx.x;
if (tid < 100)
c[tid] = a[tid] + b[tid];
}
} | .text
.file "kernel.hip"
.globl __device_stub__Vector_Addition # -- Begin function __device_stub__Vector_Addition
.p2align 4, 0x90
.type __device_stub__Vector_Addition,@function
__device_stub__Vector_Addition: # @__device_stub__Vector_Addition
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
mov... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : Vector_Addition
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e240000002500 */
/*0020*/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected Vector_Addition
.globl Vector_Addition
.p2align 8
.type Vector_Addition,@function
Vector_Addition:
s_cmpk_gt_i32 s15, 0x63
s_cbranch_scc1 .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
s_load_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010bdaf_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl __device_stub__Vector_Addition # -- Begin function __device_stub__Vector_Addition
.p2align 4, 0x90
.type __device_stub__Vector_Addition,@function
__device_stub__Vector_Addition: # @__device_stub__Vector_Addition
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
mov... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define N 16
extern __global__
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);
int main(int argc, char** argv)
{
int* A[N];
int* B[N];
// result
int* C[N];
// cuda guys
int* A_c[N];
int* B_c[N];
int* C_c[N];
// cuda result placed in this value
int* ret[N];
int i = ... | code for sm_80
Function : _Z10cudaMatMulPA16_iS0_S0_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x178] ; /* 0x0000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define N 16
extern __global__
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);
int main(int argc, char** argv)
{
int* A[N];
int* B[N];
// result
int* C[N];
// cuda guys
int* A_c[N];
int* B_c[N];
int* C_c[N];
// cuda result placed in this value
int* ret[N];
int i = ... | .file "tmpxft_0013fbe2_00000000-6_prac_cuda_matmul.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define N 16
extern __global__
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);
int main(int argc, char** argv)
{
int* A[N];
int* B[N];
// result
int* C[N];
// cuda guys
int* A_c[N];
int* B_c[N];
int* C_c[N];
// cuda result placed in this value
int* ret[N];
int i = ... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 16
extern __global__
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);
int main(int argc, char** argv)
{
int* A[N];
int* B[N];
// result
int* C[N];
// cuda guys
int* A_c[N];
int* B_c[N];
int* C_c[N];
// cuda result placed in thi... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 16
extern __global__
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);
int main(int argc, char** argv)
{
int* A[N];
int* B[N];
// result
int* C[N];
// cuda guys
int* A_c[N];
int* B_c[N];
int* C_c[N];
// cuda result placed in thi... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10cudaMatMulPA16_iS0_S0_i
.globl _Z10cudaMatMulPA16_iS0_S0_i
.p2align 8
.type _Z10cudaMatMulPA16_iS0_S0_i,@function
_Z10cudaMatMulPA16_iS0_S0_i:
s_load_b32 s20, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s20, 1
s_cbranch_scc1 .LBB0_7
s_clau... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 16
extern __global__
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);
int main(int argc, char** argv)
{
int* A[N];
int* B[N];
// result
int* C[N];
// cuda guys
int* A_c[N];
int* B_c[N];
int* C_c[N];
// cuda result placed in thi... | .text
.file "prac_cuda_matmul.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1016, %rsp # imm ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10cudaMatMulPA16_iS0_S0_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x178] ; /* 0x0000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10cudaMatMulPA16_iS0_S0_i
.globl _Z10cudaMatMulPA16_iS0_S0_i
.p2align 8
.type _Z10cudaMatMulPA16_iS0_S0_i,@function
_Z10cudaMatMulPA16_iS0_S0_i:
s_load_b32 s20, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s20, 1
s_cbranch_scc1 .LBB0_7
s_clau... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013fbe2_00000000-6_prac_cuda_matmul.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "prac_cuda_matmul.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1016, %rsp # imm ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /**
* Primality Testing with CUDA (Fall 2016):
*
* Members:
* Emanuelle Crespi, Tolga Keskinoglu
*
* This test implements an algorithm to test for primality discussed in the methodology section
* of Optimizing CPU-GPU Interactions.
*
* The following code makes use of the kernel call is_prime(int n, char *factor, char... | code for sm_80
Function : _Z8is_primeiPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e280000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /**
* Primality Testing with CUDA (Fall 2016):
*
* Members:
* Emanuelle Crespi, Tolga Keskinoglu
*
* This test implements an algorithm to test for primality discussed in the methodology section
* of Optimizing CPU-GPU Interactions.
*
* The following code makes use of the kernel call is_prime(int n, char *factor, char... | .file "tmpxft_000f214b_00000000-6_is_prime.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
* Primality Testing with CUDA (Fall 2016):
*
* Members:
* Emanuelle Crespi, Tolga Keskinoglu
*
* This test implements an algorithm to test for primality discussed in the methodology section
* of Optimizing CPU-GPU Interactions.
*
* The following code makes use of the kernel call is_prime(int n, char *factor, char... | /**
* Primality Testing with CUDA (Fall 2016):
*
* Members:
* Emanuelle Crespi, Tolga Keskinoglu
*
* This test implements an algorithm to test for primality discussed in the methodology section
* of Optimizing CPU-GPU Interactions.
*
* The following code makes use of the kernel call is_prime(int n, char *factor, char... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
* Primality Testing with CUDA (Fall 2016):
*
* Members:
* Emanuelle Crespi, Tolga Keskinoglu
*
* This test implements an algorithm to test for primality discussed in the methodology section
* of Optimizing CPU-GPU Interactions.
*
* The following code makes use of the kernel call is_prime(int n, char *factor, char... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8is_primeiPiS_
.globl _Z8is_primeiPiS_
.p2align 8
.type _Z8is_primeiPiS_,@function
_Z8is_primeiPiS_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* Primality Testing with CUDA (Fall 2016):
*
* Members:
* Emanuelle Crespi, Tolga Keskinoglu
*
* This test implements an algorithm to test for primality discussed in the methodology section
* of Optimizing CPU-GPU Interactions.
*
* The following code makes use of the kernel call is_prime(int n, char *factor, char... | .text
.file "is_prime.hip"
.globl _Z23__device_stub__is_primeiPiS_ # -- Begin function _Z23__device_stub__is_primeiPiS_
.p2align 4, 0x90
.type _Z23__device_stub__is_primeiPiS_,@function
_Z23__device_stub__is_primeiPiS_: # @_Z23__device_stub__is_primeiPiS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offse... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8is_primeiPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e280000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8is_primeiPiS_
.globl _Z8is_primeiPiS_
.p2align 8
.type _Z8is_primeiPiS_,@function
_Z8is_primeiPiS_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f214b_00000000-6_is_prime.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "is_prime.hip"
.globl _Z23__device_stub__is_primeiPiS_ # -- Begin function _Z23__device_stub__is_primeiPiS_
.p2align 4, 0x90
.type _Z23__device_stub__is_primeiPiS_,@function
_Z23__device_stub__is_primeiPiS_: # @_Z23__device_stub__is_primeiPiS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offse... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "nne.cuh"
#include "cuda.h"
#include "cuda_runtime_api.h"
#include "device_launch_parameters.h"
#include <cstdlib>
__global__ void nodeCal(float* inList, float* wList, float* outList);
__global__ void nodeLog(float* outputList, float sigmoidConst);
__global__ void nodeGradCal(float* wList, float* outputList, f... | #pragma once
#include <vector>
#include "hip/hip_runtime.h"
class Node {
public:
Node();//first input: constant/offset = 0
Node(int inputNum);//inputNum: nuber of input (first input: constant/offset = 0)
Node(std::vector<float>& inputWeightList, int nodeIndex, int inputWeightLength);
~Node();
std::vector<float> inputWe... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #pragma once
#include <vector>
#include "hip/hip_runtime.h"
class Node {
public:
Node();//first input: constant/offset = 0
Node(int inputNum);//inputNum: nuber of input (first input: constant/offset = 0)
Node(std::vector<float>& inputWeightList, int nodeIndex, int inputWeightLength);
~Node();
std::vector<float> inputWe... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #pragma once
#include <vector>
#include "hip/hip_runtime.h"
class Node {
public:
Node();//first input: constant/offset = 0
Node(int inputNum);//inputNum: nuber of input (first input: constant/offset = 0)
Node(std::vector<float>& inputWeightList, int nodeIndex, int inputWeightLength);
~Node();
std::vector<float> inputWe... | .text
.file "nne.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#define N_MEMELEM 32
__global__ void init_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] = blockIdx.x*blockDim.x + threadIdx.x;
}
__global__ void double_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] *= 2;
}
void do_cuda_init(double *dev_mem)
{
init_devmem<<<N_MEMELEM... | code for sm_80
Function : _Z13double_devmemPd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#define N_MEMELEM 32
__global__ void init_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] = blockIdx.x*blockDim.x + threadIdx.x;
}
__global__ void double_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] *= 2;
}
void do_cuda_init(double *dev_mem)
{
init_devmem<<<N_MEMELEM... | .file "tmpxft_0012f8b5_00000000-6_cuda_ipcmemhandle.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
cal... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#define N_MEMELEM 32
__global__ void init_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] = blockIdx.x*blockDim.x + threadIdx.x;
}
__global__ void double_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] *= 2;
}
void do_cuda_init(double *dev_mem)
{
init_devmem<<<N_MEMELEM... | #include <hip/hip_runtime.h>
#include <iostream>
#define N_MEMELEM 32
__global__ void init_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] = blockIdx.x*blockDim.x + threadIdx.x;
}
__global__ void double_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] *= 2;
}
void do_cuda_init(double *dev_m... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#define N_MEMELEM 32
__global__ void init_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] = blockIdx.x*blockDim.x + threadIdx.x;
}
__global__ void double_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] *= 2;
}
void do_cuda_init(double *dev_m... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11init_devmemPd
.globl _Z11init_devmemPd
.p2align 8
.type _Z11init_devmemPd,@function
_Z11init_devmemPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_del... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#define N_MEMELEM 32
__global__ void init_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] = blockIdx.x*blockDim.x + threadIdx.x;
}
__global__ void double_devmem(double *mem)
{
mem[blockIdx.x*blockDim.x + threadIdx.x] *= 2;
}
void do_cuda_init(double *dev_m... | .text
.file "cuda_ipcmemhandle.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__init_devmemPd # -- Begin function _Z26__device_stub__init_devmemPd
.p2... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13double_devmemPd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*00... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11init_devmemPd
.globl _Z11init_devmemPd
.p2align 8
.type _Z11init_devmemPd,@function
_Z11init_devmemPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_del... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012f8b5_00000000-6_cuda_ipcmemhandle.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
cal... | .text
.file "cuda_ipcmemhandle.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__init_devmemPd # -- Begin function _Z26__device_stub__init_devmemPd
.p2... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // $Smake: nvcc -O2 -o %F %f
//
// add-vectors.cu - addition of two arrays on GPU device
//
// This program follows a very standard pattern:
// 1) allocate memory on host
// 2) allocate memory on device
// 3) initialize memory on host
// 4) copy memory from host to device
// 5) execute kernel(s) on device
// 6) copy re... | code for sm_80
Function : _Z11add_vectorsPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // $Smake: nvcc -O2 -o %F %f
//
// add-vectors.cu - addition of two arrays on GPU device
//
// This program follows a very standard pattern:
// 1) allocate memory on host
// 2) allocate memory on device
// 3) initialize memory on host
// 4) copy memory from host to device
// 5) execute kernel(s) on device
// 6) copy re... | .file "tmpxft_0006ca38_00000000-6_add-vectors.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // $Smake: nvcc -O2 -o %F %f
//
// add-vectors.cu - addition of two arrays on GPU device
//
// This program follows a very standard pattern:
// 1) allocate memory on host
// 2) allocate memory on device
// 3) initialize memory on host
// 4) copy memory from host to device
// 5) execute kernel(s) on device
// 6) copy re... | // $Smake: nvcc -O2 -o %F %f
//
// add-vectors.cu - addition of two arrays on GPU device
//
// This program follows a very standard pattern:
// 1) allocate memory on host
// 2) allocate memory on device
// 3) initialize memory on host
// 4) copy memory from host to device
// 5) execute kernel(s) on device
// 6) copy re... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // $Smake: nvcc -O2 -o %F %f
//
// add-vectors.cu - addition of two arrays on GPU device
//
// This program follows a very standard pattern:
// 1) allocate memory on host
// 2) allocate memory on device
// 3) initialize memory on host
// 4) copy memory from host to device
// 5) execute kernel(s) on device
// 6) copy re... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11add_vectorsPfS_S_i
.globl _Z11add_vectorsPfS_S_i
.p2align 8
.type _Z11add_vectorsPfS_S_i,@function
_Z11add_vectorsPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xfff... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // $Smake: nvcc -O2 -o %F %f
//
// add-vectors.cu - addition of two arrays on GPU device
//
// This program follows a very standard pattern:
// 1) allocate memory on host
// 2) allocate memory on device
// 3) initialize memory on host
// 4) copy memory from host to device
// 5) execute kernel(s) on device
// 6) copy re... | .text
.file "add-vectors.hip"
.globl _Z26__device_stub__add_vectorsPfS_S_i # -- Begin function _Z26__device_stub__add_vectorsPfS_S_i
.p2align 4, 0x90
.type _Z26__device_stub__add_vectorsPfS_S_i,@function
_Z26__device_stub__add_vectorsPfS_S_i: # @_Z26__device_stub__add_vectorsPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11add_vectorsPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11add_vectorsPfS_S_i
.globl _Z11add_vectorsPfS_S_i
.p2align 8
.type _Z11add_vectorsPfS_S_i,@function
_Z11add_vectorsPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xfff... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006ca38_00000000-6_add-vectors.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "add-vectors.hip"
.globl _Z26__device_stub__add_vectorsPfS_S_i # -- Begin function _Z26__device_stub__add_vectorsPfS_S_i
.p2align 4, 0x90
.type _Z26__device_stub__add_vectorsPfS_S_i,@function
_Z26__device_stub__add_vectorsPfS_S_i: # @_Z26__device_stub__add_vectorsPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void binZeros(int *d_bin_count, int bin_size){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < bin_size){
d_bin_count[i] = 0;
}
} | code for sm_80
Function : _Z8binZerosPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void binZeros(int *d_bin_count, int bin_size){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < bin_size){
d_bin_count[i] = 0;
}
} | .file "tmpxft_00169fae_00000000-6_binZeros.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void binZeros(int *d_bin_count, int bin_size){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < bin_size){
d_bin_count[i] = 0;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void binZeros(int *d_bin_count, int bin_size){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < bin_size){
d_bin_count[i] = 0;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void binZeros(int *d_bin_count, int bin_size){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < bin_size){
d_bin_count[i] = 0;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8binZerosPii
.globl _Z8binZerosPii
.p2align 8
.type _Z8binZerosPii,@function
_Z8binZerosPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu ins... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void binZeros(int *d_bin_count, int bin_size){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < bin_size){
d_bin_count[i] = 0;
}
} | .text
.file "binZeros.hip"
.globl _Z23__device_stub__binZerosPii # -- Begin function _Z23__device_stub__binZerosPii
.p2align 4, 0x90
.type _Z23__device_stub__binZerosPii,@function
_Z23__device_stub__binZerosPii: # @_Z23__device_stub__binZerosPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
mov... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8binZerosPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8binZerosPii
.globl _Z8binZerosPii
.p2align 8
.type _Z8binZerosPii,@function
_Z8binZerosPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu ins... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00169fae_00000000-6_binZeros.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "binZeros.hip"
.globl _Z23__device_stub__binZerosPii # -- Begin function _Z23__device_stub__binZerosPii
.p2align 4, 0x90
.type _Z23__device_stub__binZerosPii,@function
_Z23__device_stub__binZerosPii: # @_Z23__device_stub__binZerosPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
mov... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/**
*
* Copyright (C) Tyler Hackett 2016
*
* CUDA Triangle Counter
*
* A quickly-written program to determine all possible combinations of
* valid triangles from a grid, allowing for certain coordinates of the
* grid to be marked as unusable.
*
* main.cu
*
* */
__global__ void countTriangles(uint2... | code for sm_80
Function : _Z14countTrianglesP5uint2Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/**
*
* Copyright (C) Tyler Hackett 2016
*
* CUDA Triangle Counter
*
* A quickly-written program to determine all possible combinations of
* valid triangles from a grid, allowing for certain coordinates of the
* grid to be marked as unusable.
*
* main.cu
*
* */
__global__ void countTriangles(uint2... | .file "tmpxft_0011b8c8_00000000-6_countTriangles.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/**
*
* Copyright (C) Tyler Hackett 2016
*
* CUDA Triangle Counter
*
* A quickly-written program to determine all possible combinations of
* valid triangles from a grid, allowing for certain coordinates of the
* grid to be marked as unusable.
*
* main.cu
*
* */
__global__ void countTriangles(uint2... | #include <hip/hip_runtime.h>
#include "includes.h"
/**
*
* Copyright (C) Tyler Hackett 2016
*
* CUDA Triangle Counter
*
* A quickly-written program to determine all possible combinations of
* valid triangles from a grid, allowing for certain coordinates of the
* grid to be marked as unusable.
*
* main.cu
*
* */
__globa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/**
*
* Copyright (C) Tyler Hackett 2016
*
* CUDA Triangle Counter
*
* A quickly-written program to determine all possible combinations of
* valid triangles from a grid, allowing for certain coordinates of the
* grid to be marked as unusable.
*
* main.cu
*
* */
__globa... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14countTrianglesP15HIP_vector_typeIjLj2EEPi
.globl _Z14countTrianglesP15HIP_vector_typeIjLj2EEPi
.p2align 8
.type _Z14countTrianglesP15HIP_vector_typeIjLj2EEPi,@function
_Z14countTrianglesP15HIP_vector_typeIjLj2EEPi:
s_cmp_gt_u32 s13, s14
s_cbranch_scc1 .... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/**
*
* Copyright (C) Tyler Hackett 2016
*
* CUDA Triangle Counter
*
* A quickly-written program to determine all possible combinations of
* valid triangles from a grid, allowing for certain coordinates of the
* grid to be marked as unusable.
*
* main.cu
*
* */
__globa... | .text
.file "countTriangles.hip"
.globl _Z29__device_stub__countTrianglesP15HIP_vector_typeIjLj2EEPi # -- Begin function _Z29__device_stub__countTrianglesP15HIP_vector_typeIjLj2EEPi
.p2align 4, 0x90
.type _Z29__device_stub__countTrianglesP15HIP_vector_typeIjLj2EEPi,@function
_Z29__device_stub__countTrianglesP15HIP_vect... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14countTrianglesP5uint2Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14countTrianglesP15HIP_vector_typeIjLj2EEPi
.globl _Z14countTrianglesP15HIP_vector_typeIjLj2EEPi
.p2align 8
.type _Z14countTrianglesP15HIP_vector_typeIjLj2EEPi,@function
_Z14countTrianglesP15HIP_vector_typeIjLj2EEPi:
s_cmp_gt_u32 s13, s14
s_cbranch_scc1 .... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0011b8c8_00000000-6_countTriangles.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "countTriangles.hip"
.globl _Z29__device_stub__countTrianglesP15HIP_vector_typeIjLj2EEPi # -- Begin function _Z29__device_stub__countTrianglesP15HIP_vector_typeIjLj2EEPi
.p2align 4, 0x90
.type _Z29__device_stub__countTrianglesP15HIP_vector_typeIjLj2EEPi,@function
_Z29__device_stub__countTrianglesP15HIP_vect... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void add(int* d_vec1, int* d_vec2, int* d_vec3)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
d_vec3[idx] = d_vec2[idx] + d_vec1[idx];
}
int main()
{
int i ;
int num_blocks = 1000;
int num_threads = 512;
int SIZE = num_threads*num_blocks;
int BYTE... | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HF... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void add(int* d_vec1, int* d_vec2, int* d_vec3)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
d_vec3[idx] = d_vec2[idx] + d_vec1[idx];
}
int main()
{
int i ;
int num_blocks = 1000;
int num_threads = 512;
int SIZE = num_threads*num_blocks;
int BYTE... | .file "tmpxft_0006ffb4_00000000-6_q2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void add(int* d_vec1, int* d_vec2, int* d_vec3)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
d_vec3[idx] = d_vec2[idx] + d_vec1[idx];
}
int main()
{
int i ;
int num_blocks = 1000;
int num_threads = 512;
int SIZE = num_threads*num_blocks;
int BYTE... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void add(int* d_vec1, int* d_vec2, int* d_vec3)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
d_vec3[idx] = d_vec2[idx] + d_vec1[idx];
}
int main()
{
int i ;
int num_blocks = 1000;
int num_threads = 512;
int SIZE = num_threads*num_block... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void add(int* d_vec1, int* d_vec2, int* d_vec3)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
d_vec3[idx] = d_vec2[idx] + d_vec1[idx];
}
int main()
{
int i ;
int num_blocks = 1000;
int num_threads = 512;
int SIZE = num_threads*num_block... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
__global__ void add(int* d_vec1, int* d_vec2, int* d_vec3)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
d_vec3[idx] = d_vec2[idx] + d_vec1[idx];
}
int main()
{
int i ;
int num_blocks = 1000;
int num_threads = 512;
int SIZE = num_threads*num_block... | .text
.file "q2.hip"
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HF... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006ffb4_00000000-6_q2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... | .text
.file "q2.hip"
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72... |
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