system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // 2nd order FD scheme for gradient with uniform mesh spacing
#include <hip/hip_runtime.h>
#include <stdio.h>
__constant__ int mx, my, mz;
__constant__ double dxInv, dyInv, dzInv;
__global__ void gradient_x(double* f, double* df) {
//f: vector of function values
//df: vector of derivatives (output)
int i = blockIdx.x*b... | .text
.file "gradient2.hip"
.globl _Z25__device_stub__gradient_xPdS_ # -- Begin function _Z25__device_stub__gradient_xPdS_
.p2align 4, 0x90
.type _Z25__device_stub__gradient_xPdS_,@function
_Z25__device_stub__gradient_xPdS_: # @_Z25__device_stub__gradient_xPdS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001bc58a_00000000-6_gradient2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "gradient2.hip"
.globl _Z25__device_stub__gradient_xPdS_ # -- Begin function _Z25__device_stub__gradient_xPdS_
.p2align 4, 0x90
.type _Z25__device_stub__gradient_xPdS_,@function
_Z25__device_stub__gradient_xPdS_: # @_Z25__device_stub__gradient_xPdS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
__global__ void device_greetings()
{
printf("Hello, world from the GPU!\n");
}
int main()
{
printf("Hello, world form the host!\n");
dim3 threadBlocks(8, 16);
dim3 gridBlocks(2, 4);
device_greetings<<<gridBlocks, threadBlocks>>>();
cudaDeviceSynchronize();
return 0;
} | code for sm_80
Function : _Z16device_greetingsv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe2000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
__global__ void device_greetings()
{
printf("Hello, world from the GPU!\n");
}
int main()
{
printf("Hello, world form the host!\n");
dim3 threadBlocks(8, 16);
dim3 gridBlocks(2, 4);
device_greetings<<<gridBlocks, threadBlocks>>>();
cudaDeviceSynchronize();
return 0;
} | .file "tmpxft_000c5ca3_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
__global__ void device_greetings()
{
printf("Hello, world from the GPU!\n");
}
int main()
{
printf("Hello, world form the host!\n");
dim3 threadBlocks(8, 16);
dim3 gridBlocks(2, 4);
device_greetings<<<gridBlocks, threadBlocks>>>();
cudaDeviceSynchronize();
return 0;
} | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void device_greetings()
{
printf("Hello, world from the GPU!\n");
}
int main()
{
printf("Hello, world form the host!\n");
dim3 threadBlocks(8, 16);
dim3 gridBlocks(2, 4);
device_greetings<<<gridBlocks, threadBlocks>>>();
hipDeviceSynchronize();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void device_greetings()
{
printf("Hello, world from the GPU!\n");
}
int main()
{
printf("Hello, world form the host!\n");
dim3 threadBlocks(8, 16);
dim3 gridBlocks(2, 4);
device_greetings<<<gridBlocks, threadBlocks>>>();
hipDeviceSynchronize();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16device_greetingsv
.globl _Z16device_greetingsv
.p2align 8
.type _Z16device_greetingsv,@function
_Z16device_greetingsv:
s_load_b64 s[2:3], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v20, -1, 0
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_2) |... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void device_greetings()
{
printf("Hello, world from the GPU!\n");
}
int main()
{
printf("Hello, world form the host!\n");
dim3 threadBlocks(8, 16);
dim3 gridBlocks(2, 4);
device_greetings<<<gridBlocks, threadBlocks>>>();
hipDeviceSynchronize();
return 0;
} | .text
.file "hello.hip"
.globl _Z31__device_stub__device_greetingsv # -- Begin function _Z31__device_stub__device_greetingsv
.p2align 4, 0x90
.type _Z31__device_stub__device_greetingsv,@function
_Z31__device_stub__device_greetingsv: # @_Z31__device_stub__device_greetingsv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_d... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16device_greetingsv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe2000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16device_greetingsv
.globl _Z16device_greetingsv
.p2align 8
.type _Z16device_greetingsv,@function
_Z16device_greetingsv:
s_load_b64 s[2:3], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v20, -1, 0
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_2) |... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c5ca3_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "hello.hip"
.globl _Z31__device_stub__device_greetingsv # -- Begin function _Z31__device_stub__device_greetingsv
.p2align 4, 0x90
.type _Z31__device_stub__device_greetingsv,@function
_Z31__device_stub__device_greetingsv: # @_Z31__device_stub__device_greetingsv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_d... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64; // number of threads in z d... | code for sm_80
Function : _Z6matmulPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R11, SR_TID.Z ; /* 0x00000000000b7919 */
/* 0x000e22000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64; // number of threads in z d... | .file "tmpxft_00170e50_00000000-6_mat_mult_reduction.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64; // number of threads in z d... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6matmulPiS_S_
.globl _Z6matmulPiS_S_
.p2align 8
.type _Z6matmulPiS_S_,@function
_Z6matmulPiS_S_:
s_load_b32 s2, s[0:1], 0x24
v_and_b32_e32 v4, 0x3ff, v0
s_add_u32 s8, s0, 24
s_addc_u32 s9, s1, 0
v_bfe_u32 v3, v0, 20, 10
s_wa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
// =========== GLOBALS =========================
const int m = 50; // number of elements in array
const int n = 10; // number of elements in array
const int k = 10; // number of elements in array
const int sizeZ = 64... | .text
.file "mat_mult_reduction.hip"
.globl _Z21__device_stub__matmulPiS_S_ # -- Begin function _Z21__device_stub__matmulPiS_S_
.p2align 4, 0x90
.type _Z21__device_stub__matmulPiS_S_,@function
_Z21__device_stub__matmulPiS_S_: # @_Z21__device_stub__matmulPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6matmulPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R11, SR_TID.Z ; /* 0x00000000000b7919 */
/* 0x000e22000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6matmulPiS_S_
.globl _Z6matmulPiS_S_
.p2align 8
.type _Z6matmulPiS_S_,@function
_Z6matmulPiS_S_:
s_load_b32 s2, s[0:1], 0x24
v_and_b32_e32 v4, 0x3ff, v0
s_add_u32 s8, s0, 24
s_addc_u32 s9, s1, 0
v_bfe_u32 v3, v0, 20, 10
s_wa... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00170e50_00000000-6_mat_mult_reduction.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "mat_mult_reduction.hip"
.globl _Z21__device_stub__matmulPiS_S_ # -- Begin function _Z21__device_stub__matmulPiS_S_
.p2align 4, 0x90
.type _Z21__device_stub__matmulPiS_S_,@function
_Z21__device_stub__matmulPiS_S_: # @_Z21__device_stub__matmulPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
#include <cuda.h>
#include <string>
#include <ctime>
#include <chrono>
#include <queue>
#include <vector>
#include <cstdio>
#include <cstdlib>
#include <fstream>
#include <iostream>
// #include "graph.h"
// #include "bfsCPU.h"
#include <cuda.h>
#include <cuda_runtime_api.h>
#define DeviceNum 1
struct ... | #include <cstdio>
#include <hip/hip_runtime.h>
#include <string>
#include <ctime>
#include <chrono>
#include <queue>
#include <vector>
#include <cstdio>
#include <cstdlib>
#include <fstream>
#include <iostream>
// #include "graph.h"
// #include "bfsCPU.h"
#include <hip/hip_runtime_api.h>
#define DeviceNum 1
struct Grap... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* Voxel sampling GPU implementation
* Author Zhaoyu SU
* All Rights Reserved. Sep., 2019.
*/
#include <stdio.h>
#include <iostream>
#include <float.h>
__device__ int binary_search(const long long* input_voxel_idx,
int start_id,
int stop_id,
long long target_voxel_id) {
if (input_voxel_idx[start_id] > target_voxel_id |... | .file "tmpxft_001a4fb2_00000000-6_voxel_sampling.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _Z55cudaOccupancyMaxPotentialBlockSizeVariableSMemWithFlagsI24__cudaOccupancyB2DHelperPFviiifiPfPiEE9cudaErrorS2_S2_T0_T_ij, @function
_Z55cudaOccupancyMaxPotentialBlockSizeVariableSMemWithFlagsI24... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* Voxel sampling GPU implementation
* Author Zhaoyu SU
* All Rights Reserved. Sep., 2019.
*/
#include <stdio.h>
#include <iostream>
#include <float.h>
__device__ int binary_search(const long long* input_voxel_idx,
int start_id,
int stop_id,
long long target_voxel_id) {
if (input_voxel_idx[start_id] > target_voxel_id |... | /* Voxel sampling GPU implementation
* Author Zhaoyu SU
* All Rights Reserved. Sep., 2019.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <float.h>
__device__ int binary_search(const long long* input_voxel_idx,
int start_id,
int stop_id,
long long target_voxel_id) {
if (input_voxel_idx[... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* Voxel sampling GPU implementation
* Author Zhaoyu SU
* All Rights Reserved. Sep., 2019.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <float.h>
__device__ int binary_search(const long long* input_voxel_idx,
int start_id,
int stop_id,
long long target_voxel_id) {
if (input_voxel_idx[... | .text
.file "voxel_sampling.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z37__device_stub__output_init_gpu_kerneliiifiPfPi # -- Begin function _Z37__device_stub__ou... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <math.h>
// Kernel function to color the buffer according to the gradient
__global__ void color(float *buffer)
{
int x = threadIdx.x;
int y = blockIdx.x;
int nx = blockDim.x;
int ny = gridDim.x;
float r = (float) x / nx;
float g = (float) y / ny;
float b = 0.2;
float* triplet = buffer + 3*(... | code for sm_80
Function : _Z5colorPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <math.h>
// Kernel function to color the buffer according to the gradient
__global__ void color(float *buffer)
{
int x = threadIdx.x;
int y = blockIdx.x;
int nx = blockDim.x;
int ny = gridDim.x;
float r = (float) x / nx;
float g = (float) y / ny;
float b = 0.2;
float* triplet = buffer + 3*(... | .file "tmpxft_0001118c_00000000-6_color.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <math.h>
// Kernel function to color the buffer according to the gradient
__global__ void color(float *buffer)
{
int x = threadIdx.x;
int y = blockIdx.x;
int nx = blockDim.x;
int ny = gridDim.x;
float r = (float) x / nx;
float g = (float) y / ny;
float b = 0.2;
float* triplet = buffer + 3*(... | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
// Kernel function to color the buffer according to the gradient
__global__ void color(float *buffer)
{
int x = threadIdx.x;
int y = blockIdx.x;
int nx = blockDim.x;
int ny = gridDim.x;
float r = (float) x / nx;
float g = (float) y / ny;
float b = 0.2;
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
// Kernel function to color the buffer according to the gradient
__global__ void color(float *buffer)
{
int x = threadIdx.x;
int y = blockIdx.x;
int nx = blockDim.x;
int ny = gridDim.x;
float r = (float) x / nx;
float g = (float) y / ny;
float b = 0.2;
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5colorPf
.globl _Z5colorPf
.p2align 8
.type _Z5colorPf,@function
_Z5colorPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b32 s3, s[0:1], 0x8
v_cvt_f32_i32_e32 v7, v0
v_cvt_f32_i32_e32 v5, s15
s_load_b64 s[0:1],... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
// Kernel function to color the buffer according to the gradient
__global__ void color(float *buffer)
{
int x = threadIdx.x;
int y = blockIdx.x;
int nx = blockDim.x;
int ny = gridDim.x;
float r = (float) x / nx;
float g = (float) y / ny;
float b = 0.2;
... | .text
.file "color.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20__device_stub__colorPf # -- Begin function _Z20__device_stub__colorPf
.p2align 4, 0x90
.type... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5colorPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5colorPf
.globl _Z5colorPf
.p2align 8
.type _Z5colorPf,@function
_Z5colorPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b32 s3, s[0:1], 0x8
v_cvt_f32_i32_e32 v7, v0
v_cvt_f32_i32_e32 v5, s15
s_load_b64 s[0:1],... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001118c_00000000-6_color.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... | .text
.file "color.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20__device_stub__colorPf # -- Begin function _Z20__device_stub__colorPf
.p2align 4, 0x90
.type... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <assert.h>
#include <cuda_runtime.h>
#define SIZE 3
#define BLOCKSIZE 512
__global__ void minvec(int *idata, int size){
__shared__ int sdata[BLOCKSIZE];
int s;
int tid = threadIdx.x;
int i = blockIdx.x*blockDim.x + threadIdx.x;
int pseudoIf = i < size;
/*
if (i < size)
sdata[tid] = idata[i];... | code for sm_80
Function : _Z6minvecPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff047624 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <assert.h>
#include <cuda_runtime.h>
#define SIZE 3
#define BLOCKSIZE 512
__global__ void minvec(int *idata, int size){
__shared__ int sdata[BLOCKSIZE];
int s;
int tid = threadIdx.x;
int i = blockIdx.x*blockDim.x + threadIdx.x;
int pseudoIf = i < size;
/*
if (i < size)
sdata[tid] = idata[i];... | .file "tmpxft_000ba666_00000000-6_vector_red.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <assert.h>
#include <cuda_runtime.h>
#define SIZE 3
#define BLOCKSIZE 512
__global__ void minvec(int *idata, int size){
__shared__ int sdata[BLOCKSIZE];
int s;
int tid = threadIdx.x;
int i = blockIdx.x*blockDim.x + threadIdx.x;
int pseudoIf = i < size;
/*
if (i < size)
sdata[tid] = idata[i];... | #include <stdio.h>
#include <assert.h>
#include <hip/hip_runtime.h>
#define SIZE 3
#define BLOCKSIZE 512
__global__ void minvec(int *idata, int size){
__shared__ int sdata[BLOCKSIZE];
int s;
int tid = threadIdx.x;
int i = blockIdx.x*blockDim.x + threadIdx.x;
int pseudoIf = i < size;
/*
if (i < size)
sdata[tid] = idata[... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <assert.h>
#include <hip/hip_runtime.h>
#define SIZE 3
#define BLOCKSIZE 512
__global__ void minvec(int *idata, int size){
__shared__ int sdata[BLOCKSIZE];
int s;
int tid = threadIdx.x;
int i = blockIdx.x*blockDim.x + threadIdx.x;
int pseudoIf = i < size;
/*
if (i < size)
sdata[tid] = idata[... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6minvecPii
.globl _Z6minvecPii
.p2align 8
.type _Z6minvecPii,@function
_Z6minvecPii:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_load_b32 s0, s[0:1], 0x8
s_waitcnt lgkmcn... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <assert.h>
#include <hip/hip_runtime.h>
#define SIZE 3
#define BLOCKSIZE 512
__global__ void minvec(int *idata, int size){
__shared__ int sdata[BLOCKSIZE];
int s;
int tid = threadIdx.x;
int i = blockIdx.x*blockDim.x + threadIdx.x;
int pseudoIf = i < size;
/*
if (i < size)
sdata[tid] = idata[... | .text
.file "vector_red.hip"
.globl _Z21__device_stub__minvecPii # -- Begin function _Z21__device_stub__minvecPii
.p2align 4, 0x90
.type _Z21__device_stub__minvecPii,@function
_Z21__device_stub__minvecPii: # @_Z21__device_stub__minvecPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %r... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6minvecPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff047624 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6minvecPii
.globl _Z6minvecPii
.p2align 8
.type _Z6minvecPii,@function
_Z6minvecPii:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_load_b32 s0, s[0:1], 0x8
s_waitcnt lgkmcn... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ba666_00000000-6_vector_red.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "vector_red.hip"
.globl _Z21__device_stub__minvecPii # -- Begin function _Z21__device_stub__minvecPii
.p2align 4, 0x90
.type _Z21__device_stub__minvecPii,@function
_Z21__device_stub__minvecPii: # @_Z21__device_stub__minvecPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %r... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // fermi
// Avoid mangling of function names
extern "C" {
__global__ void kmeans(int npoints, int nclusters, int nfeatures, const float* points, const float* clusters, int* pointsCluster);
}
__global__ void kmeans(int npoints, int nclusters, int nfeatures,
const float* points, const float* clusters, int* pointsCluster... | code for sm_80
Function : kmeans
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ ISETP.LT.A... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // fermi
// Avoid mangling of function names
extern "C" {
__global__ void kmeans(int npoints, int nclusters, int nfeatures, const float* points, const float* clusters, int* pointsCluster);
}
__global__ void kmeans(int npoints, int nclusters, int nfeatures,
const float* points, const float* clusters, int* pointsCluster... | .file "tmpxft_000c48e3_00000000-6_kmeans.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // fermi
// Avoid mangling of function names
extern "C" {
__global__ void kmeans(int npoints, int nclusters, int nfeatures, const float* points, const float* clusters, int* pointsCluster);
}
__global__ void kmeans(int npoints, int nclusters, int nfeatures,
const float* points, const float* clusters, int* pointsCluster... | #include <hip/hip_runtime.h>
// fermi
// Avoid mangling of function names
extern "C" {
__global__ void kmeans(int npoints, int nclusters, int nfeatures, const float* points, const float* clusters, int* pointsCluster);
}
__global__ void kmeans(int npoints, int nclusters, int nfeatures,
const float* points, const float*... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// fermi
// Avoid mangling of function names
extern "C" {
__global__ void kmeans(int npoints, int nclusters, int nfeatures, const float* points, const float* clusters, int* pointsCluster);
}
__global__ void kmeans(int npoints, int nclusters, int nfeatures,
const float* points, const float*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected kmeans
.globl kmeans
.p2align 8
.type kmeans,@function
kmeans:
s_load_b32 s3, s[0:1], 0x4
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s3, 1
s_cbranch_scc1 .LBB0_7
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// fermi
// Avoid mangling of function names
extern "C" {
__global__ void kmeans(int npoints, int nclusters, int nfeatures, const float* points, const float* clusters, int* pointsCluster);
}
__global__ void kmeans(int npoints, int nclusters, int nfeatures,
const float* points, const float*... | .text
.file "kmeans.hip"
.globl __device_stub__kmeans # -- Begin function __device_stub__kmeans
.p2align 4, 0x90
.type __device_stub__kmeans,@function
__device_stub__kmeans: # @__device_stub__kmeans
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 20(%rsp)
movl %esi,... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c48e3_00000000-6_kmeans.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kmeans.hip"
.globl __device_stub__kmeans # -- Begin function __device_stub__kmeans
.p2align 4, 0x90
.type __device_stub__kmeans,@function
__device_stub__kmeans: # @__device_stub__kmeans
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 20(%rsp)
movl %esi,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void calc_output(unsigned char * img_out, unsigned char * img_in, int * lut, int img_size){
/* Get the result image */
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
const int gridW = gridDim.x * blockDim.x;
int img_position1 = iy * gridW... | code for sm_80
Function : _Z11calc_outputPhS_Pii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void calc_output(unsigned char * img_out, unsigned char * img_in, int * lut, int img_size){
/* Get the result image */
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
const int gridW = gridDim.x * blockDim.x;
int img_position1 = iy * gridW... | .file "tmpxft_00056e9c_00000000-6_calc_output.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void calc_output(unsigned char * img_out, unsigned char * img_in, int * lut, int img_size){
/* Get the result image */
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
const int gridW = gridDim.x * blockDim.x;
int img_position1 = iy * gridW... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void calc_output(unsigned char * img_out, unsigned char * img_in, int * lut, int img_size){
/* Get the result image */
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
const int gridW = gridDim.x * blockDim.x;
i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void calc_output(unsigned char * img_out, unsigned char * img_in, int * lut, int img_size){
/* Get the result image */
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
const int gridW = gridDim.x * blockDim.x;
i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11calc_outputPhS_Pii
.globl _Z11calc_outputPhS_Pii
.p2align 8
.type _Z11calc_outputPhS_Pii,@function
_Z11calc_outputPhS_Pii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void calc_output(unsigned char * img_out, unsigned char * img_in, int * lut, int img_size){
/* Get the result image */
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
const int gridW = gridDim.x * blockDim.x;
i... | .text
.file "calc_output.hip"
.globl _Z26__device_stub__calc_outputPhS_Pii # -- Begin function _Z26__device_stub__calc_outputPhS_Pii
.p2align 4, 0x90
.type _Z26__device_stub__calc_outputPhS_Pii,@function
_Z26__device_stub__calc_outputPhS_Pii: # @_Z26__device_stub__calc_outputPhS_Pii
.cfi_startproc
# %bb.0:
subq $120, ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11calc_outputPhS_Pii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11calc_outputPhS_Pii
.globl _Z11calc_outputPhS_Pii
.p2align 8
.type _Z11calc_outputPhS_Pii,@function
_Z11calc_outputPhS_Pii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00056e9c_00000000-6_calc_output.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "calc_output.hip"
.globl _Z26__device_stub__calc_outputPhS_Pii # -- Begin function _Z26__device_stub__calc_outputPhS_Pii
.p2align 4, 0x90
.type _Z26__device_stub__calc_outputPhS_Pii,@function
_Z26__device_stub__calc_outputPhS_Pii: # @_Z26__device_stub__calc_outputPhS_Pii
.cfi_startproc
# %bb.0:
subq $120, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <chrono>
#include <stdio.h>
#define GRID_DIM 8
#define BLOCK_DIM 256
#define ITERATIONS 1000000
using namespace std;
__global__ void kernel()
{
}
int main()
{
// Measure kernel invocation
chrono::high_resolution_clock::time_point start_time = chrono::high_resolution_clock::now();
for (int i = 0; i < ITERATIONS... | code for sm_80
Function : _Z6kernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfff... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <chrono>
#include <stdio.h>
#define GRID_DIM 8
#define BLOCK_DIM 256
#define ITERATIONS 1000000
using namespace std;
__global__ void kernel()
{
}
int main()
{
// Measure kernel invocation
chrono::high_resolution_clock::time_point start_time = chrono::high_resolution_clock::now();
for (int i = 0; i < ITERATIONS... | .file "tmpxft_000d6532_00000000-6_kernel_launch_time.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2161:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <chrono>
#include <stdio.h>
#define GRID_DIM 8
#define BLOCK_DIM 256
#define ITERATIONS 1000000
using namespace std;
__global__ void kernel()
{
}
int main()
{
// Measure kernel invocation
chrono::high_resolution_clock::time_point start_time = chrono::high_resolution_clock::now();
for (int i = 0; i < ITERATIONS... | #include <hip/hip_runtime.h>
#include <chrono>
#include <stdio.h>
#define GRID_DIM 8
#define BLOCK_DIM 256
#define ITERATIONS 1000000
using namespace std;
__global__ void kernel()
{
}
int main()
{
// Measure kernel invocation
chrono::high_resolution_clock::time_point start_time = chrono::high_resolution_clock::now();
f... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <chrono>
#include <stdio.h>
#define GRID_DIM 8
#define BLOCK_DIM 256
#define ITERATIONS 1000000
using namespace std;
__global__ void kernel()
{
}
int main()
{
// Measure kernel invocation
chrono::high_resolution_clock::time_point start_time = chrono::high_resolution_clock::now();
f... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelv
.globl _Z6kernelv
.p2align 8
.type _Z6kernelv,@function
_Z6kernelv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_se... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <chrono>
#include <stdio.h>
#define GRID_DIM 8
#define BLOCK_DIM 256
#define ITERATIONS 1000000
using namespace std;
__global__ void kernel()
{
}
int main()
{
// Measure kernel invocation
chrono::high_resolution_clock::time_point start_time = chrono::high_resolution_clock::now();
f... | .text
.file "kernel_launch_time.hip"
.globl _Z21__device_stub__kernelv # -- Begin function _Z21__device_stub__kernelv
.p2align 4, 0x90
.type _Z21__device_stub__kernelv,@function
_Z21__device_stub__kernelv: # @_Z21__device_stub__kernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6kernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfff... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelv
.globl _Z6kernelv
.p2align 8
.type _Z6kernelv,@function
_Z6kernelv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_se... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d6532_00000000-6_kernel_launch_time.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2161:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "kernel_launch_time.hip"
.globl _Z21__device_stub__kernelv # -- Begin function _Z21__device_stub__kernelv
.p2align 4, 0x90
.type _Z21__device_stub__kernelv,@function
_Z21__device_stub__kernelv: # @_Z21__device_stub__kernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdlib.h>
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>
timeval t1, t2;
__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, int padding)
{
int row = block... | code for sm_80
Function : _Z16Submanifold_convPfS_S_iiiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdlib.h>
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>
timeval t1, t2;
__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, int padding)
{
int row = block... | .file "tmpxft_000115aa_00000000-6_submanifold_cuda.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdlib.h>
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>
timeval t1, t2;
__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, int padding)
{
int row = block... | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>
timeval t1, t2;
__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>
timeval t1, t2;
__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16Submanifold_convPfS_S_iiiiiii
.globl _Z16Submanifold_convPfS_S_iiiiiii
.p2align 8
.type _Z16Submanifold_convPfS_S_iiiiiii,@function
_Z16Submanifold_convPfS_S_iiiiiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b64 s[2:3], s[0:1], 0x28
v_bfe_u3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <iostream>
#include <math.h>
#include <time.h>
#include <sys/time.h>
timeval t1, t2;
__global__ void Submanifold_conv(float* image, float* filter, float* result, int image_Rows, int image_Cols, int filterRC, int filter_Depth, int result_Rows, int result_Cols, i... | .text
.file "submanifold_cuda.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__Submanifold_convPfS_S_iiiiiii # -- Begin function _Z31__device_stub__Su... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16Submanifold_convPfS_S_iiiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16Submanifold_convPfS_S_iiiiiii
.globl _Z16Submanifold_convPfS_S_iiiiiii
.p2align 8
.type _Z16Submanifold_convPfS_S_iiiiiii,@function
_Z16Submanifold_convPfS_S_iiiiiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b64 s[2:3], s[0:1], 0x28
v_bfe_u3... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000115aa_00000000-6_submanifold_cuda.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call... | .text
.file "submanifold_cuda.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__Submanifold_convPfS_S_iiiiiii # -- Begin function _Z31__device_stub__Su... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/generate.h>
#include <thrust/reduce.h>
#include <thrust/random.h>
int my_rand()
{
static thrust::default_random_engine rng;
static thrust::uniform_int_distribution<int> dist(0, 999);
return dist(rng);
}
int main(int a... | #include <hip/hip_runtime.h>
#include <iostream>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/generate.h>
#include <thrust/reduce.h>
#include <thrust/random.h>
int my_rand()
{
static thrust::default_random_engine rng;
static thrust::uniform_int_distribution<int> dist(0, 999);
retur... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void sub3(float *val1, float *val2, int *num_elem)
{
int i = threadIdx.x;
val1[i] += val2[i]+1;
} | code for sm_80
Function : _Z4sub3PfS_Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e220000002100 */
/*0020*/ HFM... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void sub3(float *val1, float *val2, int *num_elem)
{
int i = threadIdx.x;
val1[i] += val2[i]+1;
} | .file "tmpxft_000b6374_00000000-6_sub3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void sub3(float *val1, float *val2, int *num_elem)
{
int i = threadIdx.x;
val1[i] += val2[i]+1;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sub3(float *val1, float *val2, int *num_elem)
{
int i = threadIdx.x;
val1[i] += val2[i]+1;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sub3(float *val1, float *val2, int *num_elem)
{
int i = threadIdx.x;
val1[i] += val2[i]+1;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4sub3PfS_Pi
.globl _Z4sub3PfS_Pi
.p2align 8
.type _Z4sub3PfS_Pi,@function
_Z4sub3PfS_Pi:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[2:3]
global... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sub3(float *val1, float *val2, int *num_elem)
{
int i = threadIdx.x;
val1[i] += val2[i]+1;
} | .text
.file "sub3.hip"
.globl _Z19__device_stub__sub3PfS_Pi # -- Begin function _Z19__device_stub__sub3PfS_Pi
.p2align 4, 0x90
.type _Z19__device_stub__sub3PfS_Pi,@function
_Z19__device_stub__sub3PfS_Pi: # @_Z19__device_stub__sub3PfS_Pi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rd... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4sub3PfS_Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e220000002100 */
/*0020*/ HFM... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4sub3PfS_Pi
.globl _Z4sub3PfS_Pi
.p2align 8
.type _Z4sub3PfS_Pi,@function
_Z4sub3PfS_Pi:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_load_b32 v1, v0, s[2:3]
global... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b6374_00000000-6_sub3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "sub3.hip"
.globl _Z19__device_stub__sub3PfS_Pi # -- Begin function _Z19__device_stub__sub3PfS_Pi
.p2align 4, 0x90
.type _Z19__device_stub__sub3PfS_Pi,@function
_Z19__device_stub__sub3PfS_Pi: # @_Z19__device_stub__sub3PfS_Pi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rd... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //pass
//--blockDim=64 --gridDim=64 --no-inline
//
#include "cuda.h"
__global__ void foo (int* p, int* q, int* r){
int a, b, c;
int* d;
a = 10;
d = &a;
d = &b;
if (a > 10)
{
d = &c;
}
else
{
p = q;
q = p;
}
d[1] = 200;
p[100] = q[100] + 1;
} | code for sm_80
Function : _Z3fooPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe200000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //pass
//--blockDim=64 --gridDim=64 --no-inline
//
#include "cuda.h"
__global__ void foo (int* p, int* q, int* r){
int a, b, c;
int* d;
a = 10;
d = &a;
d = &b;
if (a > 10)
{
d = &c;
}
else
{
p = q;
q = p;
}
d[1] = 200;
p[100] = q[100] + 1;
} | .file "tmpxft_000bccc2_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //pass
//--blockDim=64 --gridDim=64 --no-inline
//
#include "cuda.h"
__global__ void foo (int* p, int* q, int* r){
int a, b, c;
int* d;
a = 10;
d = &a;
d = &b;
if (a > 10)
{
d = &c;
}
else
{
p = q;
q = p;
}
d[1] = 200;
p[100] = q[100] + 1;
} | //pass
//--blockDim=64 --gridDim=64 --no-inline
//
#include "hip/hip_runtime.h"
__global__ void foo (int* p, int* q, int* r){
int a, b, c;
int* d;
a = 10;
d = &a;
d = &b;
if (a > 10)
{
d = &c;
}
else
{
p = q;
q = p;
}
d[1] = 200;
p[100] = q[100] + 1;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //pass
//--blockDim=64 --gridDim=64 --no-inline
//
#include "hip/hip_runtime.h"
__global__ void foo (int* p, int* q, int* r){
int a, b, c;
int* d;
a = 10;
d = &a;
d = &b;
if (a > 10)
{
d = &c;
}
else
{
p = q;
q = p;
}
d[1] = 200;
p[100] = q[100] + 1;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3fooPiS_S_
.globl _Z3fooPiS_S_
.p2align 8
.type _Z3fooPiS_S_,@function
_Z3fooPiS_S_:
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3fooPiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segme... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //pass
//--blockDim=64 --gridDim=64 --no-inline
//
#include "hip/hip_runtime.h"
__global__ void foo (int* p, int* q, int* r){
int a, b, c;
int* d;
a = 10;
d = &a;
d = &b;
if (a > 10)
{
d = &c;
}
else
{
p = q;
q = p;
}
d[1] = 200;
p[100] = q[100] + 1;
} | .text
.file "kernel.hip"
.globl _Z18__device_stub__fooPiS_S_ # -- Begin function _Z18__device_stub__fooPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__fooPiS_S_,@function
_Z18__device_stub__fooPiS_S_: # @_Z18__device_stub__fooPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3fooPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe200000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3fooPiS_S_
.globl _Z3fooPiS_S_
.p2align 8
.type _Z3fooPiS_S_,@function
_Z3fooPiS_S_:
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3fooPiS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segme... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000bccc2_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z18__device_stub__fooPiS_S_ # -- Begin function _Z18__device_stub__fooPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__fooPiS_S_,@function
_Z18__device_stub__fooPiS_S_: # @_Z18__device_stub__fooPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define d_vx(z,x) d_vx[(x)*(nz)+(z)]
#define d_vz(z,x) d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*(nz)+(z)]
#define d_mem_dsxz_... | .file "tmpxft_0003f1a6_00000000-6_el_stress_adj.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define d_vx(z,x) d_vx[(x)*(nz)+(z)]
#define d_vz(z,x) d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*(nz)+(z)]
#define d_mem_dsxz_... | #include <hip/hip_runtime.h>
#define d_vx(z,x) d_vx[(x)*(nz)+(z)]
#define d_vz(z,x) d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define d_vx(z,x) d_vx[(x)*(nz)+(z)]
#define d_vz(z,x) d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
.globl _Z13el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
.p2align 8
.type _Z13el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define d_vx(z,x) d_vx[(x)*(nz)+(z)]
#define d_vz(z,x) d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*... | .text
.file "el_stress_adj.hip"
.globl _Z28__device_stub__el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii # -- Begin function _Z28__device_stub__el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
.p2align 4, 0x90
.type _Z28__device_stub__el_stress_adjPf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0003f1a6_00000000-6_el_stress_adj.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "el_stress_adj.hip"
.globl _Z28__device_stub__el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii # -- Begin function _Z28__device_stub__el_stress_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
.p2align 4, 0x90
.type _Z28__device_stub__el_stress_adjPf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include<cuda_runtime.h>
#include<device_launch_parameters.h>
__device__ int intToBin(int x){
return 5;
}
__global__ void add(int *A, int *B, int m, int n) {
int row = threadIdx.y;
int col = threadIdx.x;
if ((row%(m-1) == 0) || (col%(n-1) == 0)){
B[row*n + col] = A[row*n + col];
}else{
B[row*n + col] ... | code for sm_80
Function : _Z3addPiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff047624 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<cuda_runtime.h>
#include<device_launch_parameters.h>
__device__ int intToBin(int x){
return 5;
}
__global__ void add(int *A, int *B, int m, int n) {
int row = threadIdx.y;
int col = threadIdx.x;
if ((row%(m-1) == 0) || (col%(n-1) == 0)){
B[row*n + col] = A[row*n + col];
}else{
B[row*n + col] ... | .file "tmpxft_00032eee_00000000-6_q4.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<cuda_runtime.h>
#include<device_launch_parameters.h>
__device__ int intToBin(int x){
return 5;
}
__global__ void add(int *A, int *B, int m, int n) {
int row = threadIdx.y;
int col = threadIdx.x;
if ((row%(m-1) == 0) || (col%(n-1) == 0)){
B[row*n + col] = A[row*n + col];
}else{
B[row*n + col] ... | #include<stdio.h>
#include<hip/hip_runtime.h>
__device__ int intToBin(int x){
return 5;
}
__global__ void add(int *A, int *B, int m, int n) {
int row = threadIdx.y;
int col = threadIdx.x;
if ((row%(m-1) == 0) || (col%(n-1) == 0)){
B[row*n + col] = A[row*n + col];
}else{
B[row*n + col] = intToBin(A[row*n + col]);
}
}
in... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
__device__ int intToBin(int x){
return 5;
}
__global__ void add(int *A, int *B, int m, int n) {
int row = threadIdx.y;
int col = threadIdx.x;
if ((row%(m-1) == 0) || (col%(n-1) == 0)){
B[row*n + col] = A[row*n + col];
}else{
B[row*n + col] = intToBin(A[row*n + col]);
}
}
in... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_ii
.globl _Z3addPiS_ii
.p2align 8
.type _Z3addPiS_ii,@function
_Z3addPiS_ii:
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s5, -1
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_add_i32 ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
__device__ int intToBin(int x){
return 5;
}
__global__ void add(int *A, int *B, int m, int n) {
int row = threadIdx.y;
int col = threadIdx.x;
if ((row%(m-1) == 0) || (col%(n-1) == 0)){
B[row*n + col] = A[row*n + col];
}else{
B[row*n + col] = intToBin(A[row*n + col]);
}
}
in... | .text
.file "q4.hip"
.globl _Z18__device_stub__addPiS_ii # -- Begin function _Z18__device_stub__addPiS_ii
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_ii,@function
_Z18__device_stub__addPiS_ii: # @_Z18__device_stub__addPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff047624 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_ii
.globl _Z3addPiS_ii
.p2align 8
.type _Z3addPiS_ii,@function
_Z3addPiS_ii:
s_load_b64 s[2:3], s[0:1], 0x10
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s5, -1
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_add_i32 ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00032eee_00000000-6_q4.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... | .text
.file "q4.hip"
.globl _Z18__device_stub__addPiS_ii # -- Begin function _Z18__device_stub__addPiS_ii
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_ii,@function
_Z18__device_stub__addPiS_ii: # @_Z18__device_stub__addPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
// shared memory size declared at kernel launch
extern __shared__ float sdataVW[];
unsigned int tid = threadIdx.x;
unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;
// For thread ids greater than data space
if (globalid < N)... | code for sm_80
Function : _Z12ComputeLamdaPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
// shared memory size declared at kernel launch
extern __shared__ float sdataVW[];
unsigned int tid = threadIdx.x;
unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;
// For thread ids greater than data space
if (globalid < N)... | .file "tmpxft_000cb2b0_00000000-6_GPU_ComputeLamda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
// shared memory size declared at kernel launch
extern __shared__ float sdataVW[];
unsigned int tid = threadIdx.x;
unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;
// For thread ids greater than data space
if (globalid < N)... | #include <hip/hip_runtime.h>
__global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
// shared memory size declared at kernel launch
extern __shared__ float sdataVW[];
unsigned int tid = threadIdx.x;
unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;
// For thread ids greater than... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
// shared memory size declared at kernel launch
extern __shared__ float sdataVW[];
unsigned int tid = threadIdx.x;
unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;
// For thread ids greater than... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12ComputeLamdaPfS_S_i
.globl _Z12ComputeLamdaPfS_S_i
.p2align 8
.type _Z12ComputeLamdaPfS_S_i,@function
_Z12ComputeLamdaPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void ComputeLamda( float* g_VecV, float* g_VecW, float * g_Lamda,int N)
{
// shared memory size declared at kernel launch
extern __shared__ float sdataVW[];
unsigned int tid = threadIdx.x;
unsigned int globalid = blockIdx.x*blockDim.x + threadIdx.x;
// For thread ids greater than... | .text
.file "GPU_ComputeLamda.hip"
.globl _Z27__device_stub__ComputeLamdaPfS_S_i # -- Begin function _Z27__device_stub__ComputeLamdaPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__ComputeLamdaPfS_S_i,@function
_Z27__device_stub__ComputeLamdaPfS_S_i: # @_Z27__device_stub__ComputeLamdaPfS_S_i
.cfi_startproc
# %bb.0:
su... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12ComputeLamdaPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12ComputeLamdaPfS_S_i
.globl _Z12ComputeLamdaPfS_S_i
.p2align 8
.type _Z12ComputeLamdaPfS_S_i,@function
_Z12ComputeLamdaPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000cb2b0_00000000-6_GPU_ComputeLamda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "GPU_ComputeLamda.hip"
.globl _Z27__device_stub__ComputeLamdaPfS_S_i # -- Begin function _Z27__device_stub__ComputeLamdaPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__ComputeLamdaPfS_S_i,@function
_Z27__device_stub__ComputeLamdaPfS_S_i: # @_Z27__device_stub__ComputeLamdaPfS_S_i
.cfi_startproc
# %bb.0:
su... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void update_bins(unsigned int* bins, int* in_binID, int binNumber, const int size){
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x;
int nt = blockDim.x * blockDim.y;
__shared__ unsigned int temp[1024];
temp[tid] = 0;
__syncthreads();
for(int x=tid; x<size; x+=nt){
if(in_bin... | code for sm_80
Function : _Z11update_binsPjPiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e220... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void update_bins(unsigned int* bins, int* in_binID, int binNumber, const int size){
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x;
int nt = blockDim.x * blockDim.y;
__shared__ unsigned int temp[1024];
temp[tid] = 0;
__syncthreads();
for(int x=tid; x<size; x+=nt){
if(in_bin... | .file "tmpxft_000e536a_00000000-6_update_bins.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void update_bins(unsigned int* bins, int* in_binID, int binNumber, const int size){
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x;
int nt = blockDim.x * blockDim.y;
__shared__ unsigned int temp[1024];
temp[tid] = 0;
__syncthreads();
for(int x=tid; x<size; x+=nt){
if(in_bin... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void update_bins(unsigned int* bins, int* in_binID, int binNumber, const int size){
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x;
int nt = blockDim.x * blockDim.y;
__shared__ unsigned int temp[1024];
temp[tid] = 0;
__syncthreads();
for(int x=t... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void update_bins(unsigned int* bins, int* in_binID, int binNumber, const int size){
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x;
int nt = blockDim.x * blockDim.y;
__shared__ unsigned int temp[1024];
temp[tid] = 0;
__syncthreads();
for(int x=t... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11update_binsPjPiii
.globl _Z11update_binsPjPiii
.p2align 8
.type _Z11update_binsPjPiii,@function
_Z11update_binsPjPiii:
s_load_b32 s5, s[0:1], 0x14
v_lshlrev_b32_e32 v3, 2, v0
v_mov_b32_e32 v1, 0
s_add_u32 s2, s0, 24
s_mov_b32 s4, s15
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void update_bins(unsigned int* bins, int* in_binID, int binNumber, const int size){
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x;
int nt = blockDim.x * blockDim.y;
__shared__ unsigned int temp[1024];
temp[tid] = 0;
__syncthreads();
for(int x=t... | .text
.file "update_bins.hip"
.globl _Z26__device_stub__update_binsPjPiii # -- Begin function _Z26__device_stub__update_binsPjPiii
.p2align 4, 0x90
.type _Z26__device_stub__update_binsPjPiii,@function
_Z26__device_stub__update_binsPjPiii: # @_Z26__device_stub__update_binsPjPiii
.cfi_startproc
# %bb.0:
subq $120, %rsp... |
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