system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17copy_const_kernelPfPKf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17copy_const_kernelPfPKf
.globl _Z17copy_const_kernelPfPKf
.p2align 8
.type _Z17copy_const_kernelPfPKf,@function
_Z17copy_const_kernelPfPKf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s2, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b3... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000dda8a_00000000-6_copy_const_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... | .text
.file "copy_const_kernel.hip"
.globl _Z32__device_stub__copy_const_kernelPfPKf # -- Begin function _Z32__device_stub__copy_const_kernelPfPKf
.p2align 4, 0x90
.type _Z32__device_stub__copy_const_kernelPfPKf,@function
_Z32__device_stub__copy_const_kernelPfPKf: # @_Z32__device_stub__copy_const_kernelPfPKf
.cfi_start... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #ifdef _WIN32
# define IMPORT __declspec(dllimport)
# define EXPORT __declspec(dllexport)
#else
# define IMPORT
# define EXPORT
#endif
int curand_main();
int nppif_main();
EXPORT int shared_version()
{
return curand_main() == 0 && nppif_main() == 0;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #ifdef _WIN32
# define IMPORT __declspec(dllimport)
# define EXPORT __declspec(dllexport)
#else
# define IMPORT
# define EXPORT
#endif
int curand_main();
int nppif_main();
EXPORT int shared_version()
{
return curand_main() == 0 && nppif_main() == 0;
} | .file "tmpxft_000469c1_00000000-6_shared.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #ifdef _WIN32
# define IMPORT __declspec(dllimport)
# define EXPORT __declspec(dllexport)
#else
# define IMPORT
# define EXPORT
#endif
int curand_main();
int nppif_main();
EXPORT int shared_version()
{
return curand_main() == 0 && nppif_main() == 0;
} | #include <hip/hip_runtime.h>
#ifdef _WIN32
# define IMPORT __declspec(dllimport)
# define EXPORT __declspec(dllexport)
#else
# define IMPORT
# define EXPORT
#endif
int curand_main();
int nppif_main();
EXPORT int shared_version()
{
return curand_main() == 0 && nppif_main() == 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#ifdef _WIN32
# define IMPORT __declspec(dllimport)
# define EXPORT __declspec(dllexport)
#else
# define IMPORT
# define EXPORT
#endif
int curand_main();
int nppif_main();
EXPORT int shared_version()
{
return curand_main() == 0 && nppif_main() == 0;
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#ifdef _WIN32
# define IMPORT __declspec(dllimport)
# define EXPORT __declspec(dllexport)
#else
# define IMPORT
# define EXPORT
#endif
int curand_main();
int nppif_main();
EXPORT int shared_version()
{
return curand_main() == 0 && nppif_main() == 0;
} | .text
.file "shared.hip"
.globl _Z14shared_versionv # -- Begin function _Z14shared_versionv
.p2align 4, 0x90
.type _Z14shared_versionv,@function
_Z14shared_versionv: # @_Z14shared_versionv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
callq _Z11curand_mainv
movl %eax, %ecx
xor... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000469c1_00000000-6_shared.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "shared.hip"
.globl _Z14shared_versionv # -- Begin function _Z14shared_versionv
.p2align 4, 0x90
.type _Z14shared_versionv,@function
_Z14shared_versionv: # @_Z14shared_versionv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
callq _Z11curand_mainv
movl %eax, %ecx
xor... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/* ==================================================================
Programmers:
Kevin Wagner
Elijah Malaby
John Casey
Omptimizing SDH histograms for input larger then global memory
==================================================================
*/
#define BOX_SIZE 23000 /* size of the data b... | .file "tmpxft_00063e72_00000000-6_GPUKernelFunction.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/* ==================================================================
Programmers:
Kevin Wagner
Elijah Malaby
John Casey
Omptimizing SDH histograms for input larger then global memory
==================================================================
*/
#define BOX_SIZE 23000 /* size of the data b... | #include <hip/hip_runtime.h>
#include "includes.h"
/* ==================================================================
Programmers:
Kevin Wagner
Elijah Malaby
John Casey
Omptimizing SDH histograms for input larger then global memory
==================================================================
*/
#define BOX_SIZ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/* ==================================================================
Programmers:
Kevin Wagner
Elijah Malaby
John Casey
Omptimizing SDH histograms for input larger then global memory
==================================================================
*/
#define BOX_SIZ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17GPUKernelFunctionyfP8atomdescPyi
.globl _Z17GPUKernelFunctionyfP8atomdescPyi
.p2align 8
.type _Z17GPUKernelFunctionyfP8atomdescPyi,@function
_Z17GPUKernelFunctionyfP8atomdescPyi:
s_clause 0x3
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x10... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/* ==================================================================
Programmers:
Kevin Wagner
Elijah Malaby
John Casey
Omptimizing SDH histograms for input larger then global memory
==================================================================
*/
#define BOX_SIZ... | .text
.file "GPUKernelFunction.hip"
.globl _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi # -- Begin function _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi
.p2align 4, 0x90
.type _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi,@function
_Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi: # @_Z32__device... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00063e72_00000000-6_GPUKernelFunction.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... | .text
.file "GPUKernelFunction.hip"
.globl _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi # -- Begin function _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi
.p2align 4, 0x90
.type _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi,@function
_Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi: # @_Z32__device... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdlib>
#include<iostream>
#include<cuda.h>
#include <sys/time.h>
#include <cuda_fp16.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <cuda_fp16.h>
#define cudaCores 3584
using namespace std;
FILE *fp;
int smCount,totalThreads;
//__float2half
/*void getGPUConfig(){
... | code for sm_80
Function : _Z17multiplyHalfFloatP6__halfS0_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdlib>
#include<iostream>
#include<cuda.h>
#include <sys/time.h>
#include <cuda_fp16.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <cuda_fp16.h>
#define cudaCores 3584
using namespace std;
FILE *fp;
int smCount,totalThreads;
//__float2half
/*void getGPUConfig(){
... | .file "tmpxft_000610dd_00000000-6_CudaBenchmarkingCode.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdlib>
#include<iostream>
#include<cuda.h>
#include <sys/time.h>
#include <cuda_fp16.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <cuda_fp16.h>
#define cudaCores 3584
using namespace std;
FILE *fp;
int smCount,totalThreads;
//__float2half
/*void getGPUConfig(){
... | #include <cstdlib>
#include<iostream>
#include<hip/hip_runtime.h>
#include <sys/time.h>
#include <hip/hip_fp16.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <hip/hip_fp16.h>
#define cudaCores 3584
using namespace std;
FILE *fp;
int smCount,totalThreads;
//__float2half
/*void... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <cstdlib>
#include<iostream>
#include<hip/hip_runtime.h>
#include <sys/time.h>
#include <hip/hip_fp16.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <hip/hip_fp16.h>
#define cudaCores 3584
using namespace std;
FILE *fp;
int smCount,totalThreads;
//__float2half
/*void... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11multiplyIntPiS_i
.globl _Z11multiplyIntPiS_i
.p2align 8
.type _Z11multiplyIntPiS_i,@function
_Z11multiplyIntPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <cstdlib>
#include<iostream>
#include<hip/hip_runtime.h>
#include <sys/time.h>
#include <hip/hip_fp16.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <hip/hip_fp16.h>
#define cudaCores 3584
using namespace std;
FILE *fp;
int smCount,totalThreads;
//__float2half
/*void... | .text
.file "CudaBenchmarkingCode.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__multiplyIntPiS_i # -- Begin function _Z26__device_stub__multiplyInt... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17multiplyHalfFloatP6__halfS0_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11multiplyIntPiS_i
.globl _Z11multiplyIntPiS_i
.p2align 8
.type _Z11multiplyIntPiS_i,@function
_Z11multiplyIntPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <float.h>
#include <limits.h>
#pragma once
#define BLOCK_SIZE 32
#define BLOCK_SIZE_DIM1 1024
// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.width + col)
typedef struct {
int width;
int height;
double* elements;
} Matrix;
//function to ... | #include <stdio.h>
#include <stdlib.h>
#include <float.h>
#include <limits.h>
#pragma once
#include <hip/hip_runtime.h>
#define BLOCK_SIZE 32
#define BLOCK_SIZE_DIM1 1024
// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.width + col)
typedef struct {
int width;
int height;
double* eleme... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void misaligned_read_unrolled4(int* a, int* b, int *c, int size, int offset)
{
int i = blockIdx.x * blockDim.x * 4 + threadIdx.x;
int k = i + offset;
if (k + 3 * blockDim.x < size)
{
c[i] = a[k] + b[k];
c[i + blockDim.x] = a[k + blockDim.x] + b[k + blockDim.x];
c[i + 2* blockDim.x] = a[... | code for sm_80
Function : _Z25misaligned_read_unrolled4PiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void misaligned_read_unrolled4(int* a, int* b, int *c, int size, int offset)
{
int i = blockIdx.x * blockDim.x * 4 + threadIdx.x;
int k = i + offset;
if (k + 3 * blockDim.x < size)
{
c[i] = a[k] + b[k];
c[i + blockDim.x] = a[k + blockDim.x] + b[k + blockDim.x];
c[i + 2* blockDim.x] = a[... | .file "tmpxft_000df8cb_00000000-6_misaligned_read_unrolled4.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void misaligned_read_unrolled4(int* a, int* b, int *c, int size, int offset)
{
int i = blockIdx.x * blockDim.x * 4 + threadIdx.x;
int k = i + offset;
if (k + 3 * blockDim.x < size)
{
c[i] = a[k] + b[k];
c[i + blockDim.x] = a[k + blockDim.x] + b[k + blockDim.x];
c[i + 2* blockDim.x] = a[... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void misaligned_read_unrolled4(int* a, int* b, int *c, int size, int offset)
{
int i = blockIdx.x * blockDim.x * 4 + threadIdx.x;
int k = i + offset;
if (k + 3 * blockDim.x < size)
{
c[i] = a[k] + b[k];
c[i + blockDim.x] = a[k + blockDim.x] + b[k + blockDim.... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void misaligned_read_unrolled4(int* a, int* b, int *c, int size, int offset)
{
int i = blockIdx.x * blockDim.x * 4 + threadIdx.x;
int k = i + offset;
if (k + 3 * blockDim.x < size)
{
c[i] = a[k] + b[k];
c[i + blockDim.x] = a[k + blockDim.x] + b[k + blockDim.... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z25misaligned_read_unrolled4PiS_S_ii
.globl _Z25misaligned_read_unrolled4PiS_S_ii
.p2align 8
.type _Z25misaligned_read_unrolled4PiS_S_ii,@function
_Z25misaligned_read_unrolled4PiS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void misaligned_read_unrolled4(int* a, int* b, int *c, int size, int offset)
{
int i = blockIdx.x * blockDim.x * 4 + threadIdx.x;
int k = i + offset;
if (k + 3 * blockDim.x < size)
{
c[i] = a[k] + b[k];
c[i + blockDim.x] = a[k + blockDim.x] + b[k + blockDim.... | .text
.file "misaligned_read_unrolled4.hip"
.globl _Z40__device_stub__misaligned_read_unrolled4PiS_S_ii # -- Begin function _Z40__device_stub__misaligned_read_unrolled4PiS_S_ii
.p2align 4, 0x90
.type _Z40__device_stub__misaligned_read_unrolled4PiS_S_ii,@function
_Z40__device_stub__misaligned_read_unrolled4PiS_S_ii: # @... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z25misaligned_read_unrolled4PiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z25misaligned_read_unrolled4PiS_S_ii
.globl _Z25misaligned_read_unrolled4PiS_S_ii
.p2align 8
.type _Z25misaligned_read_unrolled4PiS_S_ii,@function
_Z25misaligned_read_unrolled4PiS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000df8cb_00000000-6_misaligned_read_unrolled4.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@... | .text
.file "misaligned_read_unrolled4.hip"
.globl _Z40__device_stub__misaligned_read_unrolled4PiS_S_ii # -- Begin function _Z40__device_stub__misaligned_read_unrolled4PiS_S_ii
.p2align 4, 0x90
.type _Z40__device_stub__misaligned_read_unrolled4PiS_S_ii,@function
_Z40__device_stub__misaligned_read_unrolled4PiS_S_ii: # @... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
__global__ void multiThreads(){
const int block = blockIdx.x;
const int threadx = threadIdx.x;
const int thready = threadIdx.y;
printf("I come from block %d and thread(%d, %d).\n", block, threadx, thready);
}
int main(){
dim3 block_size(2, 4);
multiThreads<<<1, block_size>>>();
return 0;
} | code for sm_80
Function : _Z12multiThreadsv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e220000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
__global__ void multiThreads(){
const int block = blockIdx.x;
const int threadx = threadIdx.x;
const int thready = threadIdx.y;
printf("I come from block %d and thread(%d, %d).\n", block, threadx, thready);
}
int main(){
dim3 block_size(2, 4);
multiThreads<<<1, block_size>>>();
return 0;
} | .file "tmpxft_0018a91c_00000000-6_Multidimensional.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
__global__ void multiThreads(){
const int block = blockIdx.x;
const int threadx = threadIdx.x;
const int thready = threadIdx.y;
printf("I come from block %d and thread(%d, %d).\n", block, threadx, thready);
}
int main(){
dim3 block_size(2, 4);
multiThreads<<<1, block_size>>>();
return 0;
} | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void multiThreads(){
const int block = blockIdx.x;
const int threadx = threadIdx.x;
const int thready = threadIdx.y;
printf("I come from block %d and thread(%d, %d).\n", block, threadx, thready);
}
int main(){
dim3 block_size(2, 4);
multiThreads<<<1, block_size>... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void multiThreads(){
const int block = blockIdx.x;
const int threadx = threadIdx.x;
const int thready = threadIdx.y;
printf("I come from block %d and thread(%d, %d).\n", block, threadx, thready);
}
int main(){
dim3 block_size(2, 4);
multiThreads<<<1, block_size>... | .text
.file "Multidimensional.hip"
.globl _Z27__device_stub__multiThreadsv # -- Begin function _Z27__device_stub__multiThreadsv
.p2align 4, 0x90
.type _Z27__device_stub__multiThreadsv,@function
_Z27__device_stub__multiThreadsv: # @_Z27__device_stub__multiThreadsv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0018a91c_00000000-6_Multidimensional.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "Multidimensional.hip"
.globl _Z27__device_stub__multiThreadsv # -- Begin function _Z27__device_stub__multiThreadsv
.p2align 4, 0x90
.type _Z27__device_stub__multiThreadsv,@function
_Z27__device_stub__multiThreadsv: # @_Z27__device_stub__multiThreadsv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kostelec, Dan Rockmore
This file ... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kostelec, Dan Rockmore
This file ... | .file "tmpxft_0001a000_00000000-6_CUweights.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kostelec, Dan Rockmore
This file ... | #include <hip/hip_runtime.h>
/***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kost... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kost... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected w4
.type w4,@object
.data
.globl w4
.p2align 4, 0x0
w4:
.quad 0x3fb125cb592a9e0f
.quad 0x3fcc8ade5bda2db9
.quad 0x3fd4beea35137917
.quad 0x3fd8b233c6b5f832
.quad 0x3fd8b233c6b60... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kost... | .text
.file "CUweights.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected w4
.type w4,@object
.data
.globl w4
.p2align 4, 0x0
w4:
.quad 0x3fb125cb592a9e0f
.quad 0x3fcc8ade5bda2db9
.quad 0x3fd4beea35137917
.quad 0x3fd8b233c6b5f832
.quad 0x3fd8b233c6b60... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001a000_00000000-6_CUweights.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "CUweights.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void _bcnn_add_scalar_kernel(int n, float a, float *y) {
int i = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
if (i < n) y[i] += a;
} | code for sm_80
Function : _Z23_bcnn_add_scalar_kernelifPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e28000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void _bcnn_add_scalar_kernel(int n, float a, float *y) {
int i = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
if (i < n) y[i] += a;
} | .file "tmpxft_0014d323_00000000-6__bcnn_add_scalar_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PL... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void _bcnn_add_scalar_kernel(int n, float a, float *y) {
int i = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
if (i < n) y[i] += a;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void _bcnn_add_scalar_kernel(int n, float a, float *y) {
int i = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
if (i < n) y[i] += a;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void _bcnn_add_scalar_kernel(int n, float a, float *y) {
int i = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
if (i < n) y[i] += a;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z23_bcnn_add_scalar_kernelifPf
.globl _Z23_bcnn_add_scalar_kernelifPf
.p2align 8
.type _Z23_bcnn_add_scalar_kernelifPf,@function
_Z23_bcnn_add_scalar_kernelifPf:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x1c
s_load_b32 s4, s[0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void _bcnn_add_scalar_kernel(int n, float a, float *y) {
int i = (blockIdx.x + blockIdx.y * gridDim.x) * blockDim.x + threadIdx.x;
if (i < n) y[i] += a;
} | .text
.file "_bcnn_add_scalar_kernel.hip"
.globl _Z38__device_stub___bcnn_add_scalar_kernelifPf # -- Begin function _Z38__device_stub___bcnn_add_scalar_kernelifPf
.p2align 4, 0x90
.type _Z38__device_stub___bcnn_add_scalar_kernelifPf,@function
_Z38__device_stub___bcnn_add_scalar_kernelifPf: # @_Z38__device_stub___bcnn_a... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z23_bcnn_add_scalar_kernelifPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e28000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z23_bcnn_add_scalar_kernelifPf
.globl _Z23_bcnn_add_scalar_kernelifPf
.p2align 8
.type _Z23_bcnn_add_scalar_kernelifPf,@function
_Z23_bcnn_add_scalar_kernelifPf:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x1c
s_load_b32 s4, s[0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014d323_00000000-6__bcnn_add_scalar_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PL... | .text
.file "_bcnn_add_scalar_kernel.hip"
.globl _Z38__device_stub___bcnn_add_scalar_kernelifPf # -- Begin function _Z38__device_stub___bcnn_add_scalar_kernelifPf
.p2align 4, 0x90
.type _Z38__device_stub___bcnn_add_scalar_kernelifPf,@function
_Z38__device_stub___bcnn_add_scalar_kernelifPf: # @_Z38__device_stub___bcnn_a... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
__device__ double lerp1d(int a, int b, float w)
{
return fma(w, (float)b, fma(-w,(float)a,(float)a));
}
__device__ float lerp2d(int f00, int f01, int f10, int f11,
float centroid_h, float centroid_w )
{
centroid_w = (1 + lroundf(centroid_w) - centroid_w)/2;
centroid_h = (1 + lroundf(centroid_h) - cen... | code for sm_80
Function : _Z6testerPhS_iiff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R12, SR_CTAID.X ; /* 0x00000000000c7919 */
/* 0x000e2200... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__device__ double lerp1d(int a, int b, float w)
{
return fma(w, (float)b, fma(-w,(float)a,(float)a));
}
__device__ float lerp2d(int f00, int f01, int f10, int f11,
float centroid_h, float centroid_w )
{
centroid_w = (1 + lroundf(centroid_w) - centroid_w)/2;
centroid_h = (1 + lroundf(centroid_h) - cen... | .file "tmpxft_00133095_00000000-6_resize_ker.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__device__ double lerp1d(int a, int b, float w)
{
return fma(w, (float)b, fma(-w,(float)a,(float)a));
}
__device__ float lerp2d(int f00, int f01, int f10, int f11,
float centroid_h, float centroid_w )
{
centroid_w = (1 + lroundf(centroid_w) - centroid_w)/2;
centroid_h = (1 + lroundf(centroid_h) - cen... | #include <hip/hip_runtime.h>
#include <stdio.h>
__device__ double lerp1d(int a, int b, float w)
{
return fma(w, (float)b, fma(-w,(float)a,(float)a));
}
__device__ float lerp2d(int f00, int f01, int f10, int f11,
float centroid_h, float centroid_w )
{
centroid_w = (1 + lroundf(centroid_w) - centroid_w)/2;
centroid_h = (... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__device__ double lerp1d(int a, int b, float w)
{
return fma(w, (float)b, fma(-w,(float)a,(float)a));
}
__device__ float lerp2d(int f00, int f01, int f10, int f11,
float centroid_h, float centroid_w )
{
centroid_w = (1 + lroundf(centroid_w) - centroid_w)/2;
centroid_h = (... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6testerPhS_iiff
.globl _Z6testerPhS_iiff
.p2align 8
.type _Z6testerPhS_iiff,@function
_Z6testerPhS_iiff:
s_load_b32 s2, s[0:1], 0x2c
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__device__ double lerp1d(int a, int b, float w)
{
return fma(w, (float)b, fma(-w,(float)a,(float)a));
}
__device__ float lerp2d(int f00, int f01, int f10, int f11,
float centroid_h, float centroid_w )
{
centroid_w = (1 + lroundf(centroid_w) - centroid_w)/2;
centroid_h = (... | .text
.file "resize_ker.hip"
.globl _Z21__device_stub__testerPhS_iiff # -- Begin function _Z21__device_stub__testerPhS_iiff
.p2align 4, 0x90
.type _Z21__device_stub__testerPhS_iiff,@function
_Z21__device_stub__testerPhS_iiff: # @_Z21__device_stub__testerPhS_iiff
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00133095_00000000-6_resize_ker.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "resize_ker.hip"
.globl _Z21__device_stub__testerPhS_iiff # -- Begin function _Z21__device_stub__testerPhS_iiff
.p2align 4, 0x90
.type _Z21__device_stub__testerPhS_iiff,@function
_Z21__device_stub__testerPhS_iiff: # @_Z21__device_stub__testerPhS_iiff
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void gaussKernel(float *ptr, int width, int height, int sigma2)
{
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if(x < width && y < height)
{
int xc = width / 2;
int yc = height / 2;
int idx = (width * y + x);
ptr += idx;
float pi = 3.1415926f;
*ptr = expf(-((x... | code for sm_80
Function : _Z11gaussKernelPfiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e28... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void gaussKernel(float *ptr, int width, int height, int sigma2)
{
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if(x < width && y < height)
{
int xc = width / 2;
int yc = height / 2;
int idx = (width * y + x);
ptr += idx;
float pi = 3.1415926f;
*ptr = expf(-((x... | .file "tmpxft_0008396c_00000000-6_blur.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void gaussKernel(float *ptr, int width, int height, int sigma2)
{
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if(x < width && y < height)
{
int xc = width / 2;
int yc = height / 2;
int idx = (width * y + x);
ptr += idx;
float pi = 3.1415926f;
*ptr = expf(-((x... | #include <hip/hip_runtime.h>
__global__ void gaussKernel(float *ptr, int width, int height, int sigma2)
{
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if(x < width && y < height)
{
int xc = width / 2;
int yc = height / 2;
int idx = (width * y + x);
ptr += idx;
float pi =... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void gaussKernel(float *ptr, int width, int height, int sigma2)
{
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if(x < width && y < height)
{
int xc = width / 2;
int yc = height / 2;
int idx = (width * y + x);
ptr += idx;
float pi =... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11gaussKernelPfiii
.globl _Z11gaussKernelPfiii
.p2align 8
.type _Z11gaussKernelPfiii,@function
_Z11gaussKernelPfiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void gaussKernel(float *ptr, int width, int height, int sigma2)
{
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if(x < width && y < height)
{
int xc = width / 2;
int yc = height / 2;
int idx = (width * y + x);
ptr += idx;
float pi =... | .text
.file "blur.hip"
.globl _Z26__device_stub__gaussKernelPfiii # -- Begin function _Z26__device_stub__gaussKernelPfiii
.p2align 4, 0x90
.type _Z26__device_stub__gaussKernelPfiii,@function
_Z26__device_stub__gaussKernelPfiii: # @_Z26__device_stub__gaussKernelPfiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11gaussKernelPfiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e28... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11gaussKernelPfiii
.globl _Z11gaussKernelPfiii
.p2align 8
.type _Z11gaussKernelPfiii,@function
_Z11gaussKernelPfiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0,... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008396c_00000000-6_blur.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "blur.hip"
.globl _Z26__device_stub__gaussKernelPfiii # -- Begin function _Z26__device_stub__gaussKernelPfiii
.p2align 4, 0x90
.type _Z26__device_stub__gaussKernelPfiii,@function
_Z26__device_stub__gaussKernelPfiii: # @_Z26__device_stub__gaussKernelPfiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
# define MAX(a, b) ((a) > (b) ? (a) : (b))
# define GAUSSIAN_KERNEL_SIZE 3
# define SOBEL_KERNEL_SIZE 5
# define TILE_WIDTH 32
# define SMEM_SIZE 128
__global__ void Conv2D(float *d_image, float *kernel, float *d_result, int width, int height, int kernelSize) {
const int sharedMemWidth = TILE_WIDT... | code for sm_80
Function : _Z6Conv2DPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_TID.Y ; /* 0x0000000000067919 */
/* 0x000e220000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
# define MAX(a, b) ((a) > (b) ? (a) : (b))
# define GAUSSIAN_KERNEL_SIZE 3
# define SOBEL_KERNEL_SIZE 5
# define TILE_WIDTH 32
# define SMEM_SIZE 128
__global__ void Conv2D(float *d_image, float *kernel, float *d_result, int width, int height, int kernelSize) {
const int sharedMemWidth = TILE_WIDT... | .file "tmpxft_000fe3bc_00000000-6_Conv2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
# define MAX(a, b) ((a) > (b) ? (a) : (b))
# define GAUSSIAN_KERNEL_SIZE 3
# define SOBEL_KERNEL_SIZE 5
# define TILE_WIDTH 32
# define SMEM_SIZE 128
__global__ void Conv2D(float *d_image, float *kernel, float *d_result, int width, int height, int kernelSize) {
const int sharedMemWidth = TILE_WIDT... | #include <hip/hip_runtime.h>
#include "includes.h"
# define MAX(a, b) ((a) > (b) ? (a) : (b))
# define GAUSSIAN_KERNEL_SIZE 3
# define SOBEL_KERNEL_SIZE 5
# define TILE_WIDTH 32
# define SMEM_SIZE 128
__global__ void Conv2D(float *d_image, float *kernel, float *d_result, int width, int height, int kernelSize) {
const i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
# define MAX(a, b) ((a) > (b) ? (a) : (b))
# define GAUSSIAN_KERNEL_SIZE 3
# define SOBEL_KERNEL_SIZE 5
# define TILE_WIDTH 32
# define SMEM_SIZE 128
__global__ void Conv2D(float *d_image, float *kernel, float *d_result, int width, int height, int kernelSize) {
const i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6Conv2DPfS_S_iii
.globl _Z6Conv2DPfS_S_iii
.p2align 8
.type _Z6Conv2DPfS_S_iii,@function
_Z6Conv2DPfS_S_iii:
v_bfe_u32 v1, v0, 10, 10
v_dual_mov_b32 v7, 0 :: v_dual_and_b32 v2, 0x3ff, v0
s_clause 0x2
s_load_b32 s10, s[0:1], 0x20
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
# define MAX(a, b) ((a) > (b) ? (a) : (b))
# define GAUSSIAN_KERNEL_SIZE 3
# define SOBEL_KERNEL_SIZE 5
# define TILE_WIDTH 32
# define SMEM_SIZE 128
__global__ void Conv2D(float *d_image, float *kernel, float *d_result, int width, int height, int kernelSize) {
const i... | .text
.file "Conv2D.hip"
.globl _Z21__device_stub__Conv2DPfS_S_iii # -- Begin function _Z21__device_stub__Conv2DPfS_S_iii
.p2align 4, 0x90
.type _Z21__device_stub__Conv2DPfS_S_iii,@function
_Z21__device_stub__Conv2DPfS_S_iii: # @_Z21__device_stub__Conv2DPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6Conv2DPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_TID.Y ; /* 0x0000000000067919 */
/* 0x000e220000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6Conv2DPfS_S_iii
.globl _Z6Conv2DPfS_S_iii
.p2align 8
.type _Z6Conv2DPfS_S_iii,@function
_Z6Conv2DPfS_S_iii:
v_bfe_u32 v1, v0, 10, 10
v_dual_mov_b32 v7, 0 :: v_dual_and_b32 v2, 0x3ff, v0
s_clause 0x2
s_load_b32 s10, s[0:1], 0x20
s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000fe3bc_00000000-6_Conv2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "Conv2D.hip"
.globl _Z21__device_stub__Conv2DPfS_S_iii # -- Begin function _Z21__device_stub__Conv2DPfS_S_iii
.p2align 4, 0x90
.type _Z21__device_stub__Conv2DPfS_S_iii,@function
_Z21__device_stub__Conv2DPfS_S_iii: # @_Z21__device_stub__Conv2DPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdint.h>
#include <pthread.h>
#include <unistd.h>
#include <assert.h>
#define MAX_STREAMS 3
uint32_t *bufferA[MAX_STREAMS], *bufferB[MAX_STREAMS];
int flags[MAX_STREAMS] = {1,1,1};
int max_iteration = 10;
pthread_mutex_t lock;
inline
cudaError_t checkCuda(cudaError_t result)
{
if (result !... | code for sm_80
Function : _Z10vector_addPjS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdint.h>
#include <pthread.h>
#include <unistd.h>
#include <assert.h>
#define MAX_STREAMS 3
uint32_t *bufferA[MAX_STREAMS], *bufferB[MAX_STREAMS];
int flags[MAX_STREAMS] = {1,1,1};
int max_iteration = 10;
pthread_mutex_t lock;
inline
cudaError_t checkCuda(cudaError_t result)
{
if (result !... | .file "tmpxft_00195334_00000000-6_read_write_stream.cudafe1.cpp"
.text
#APP
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Starting read_write_controller\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "A : %d\n"
.LC2:
.string "B : %d\n"
.LC3:
.string "iteration (%d) : [%d,%d,%d]\n"
#NO_AP... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdint.h>
#include <pthread.h>
#include <unistd.h>
#include <assert.h>
#define MAX_STREAMS 3
uint32_t *bufferA[MAX_STREAMS], *bufferB[MAX_STREAMS];
int flags[MAX_STREAMS] = {1,1,1};
int max_iteration = 10;
pthread_mutex_t lock;
inline
cudaError_t checkCuda(cudaError_t result)
{
if (result !... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <pthread.h>
#include <unistd.h>
#include <assert.h>
#define MAX_STREAMS 3
uint32_t *bufferA[MAX_STREAMS], *bufferB[MAX_STREAMS];
int flags[MAX_STREAMS] = {1,1,1};
int max_iteration = 10;
pthread_mutex_t lock;
inline
hipError_t checkCuda(hipErr... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <pthread.h>
#include <unistd.h>
#include <assert.h>
#define MAX_STREAMS 3
uint32_t *bufferA[MAX_STREAMS], *bufferB[MAX_STREAMS];
int flags[MAX_STREAMS] = {1,1,1};
int max_iteration = 10;
pthread_mutex_t lock;
inline
hipError_t checkCuda(hipErr... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9init_dataPji
.globl _Z9init_dataPji
.p2align 8
.type _Z9init_dataPji,@function
_Z9init_dataPji:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov_b32 s6, exe... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <pthread.h>
#include <unistd.h>
#include <assert.h>
#define MAX_STREAMS 3
uint32_t *bufferA[MAX_STREAMS], *bufferB[MAX_STREAMS];
int flags[MAX_STREAMS] = {1,1,1};
int max_iteration = 10;
pthread_mutex_t lock;
inline
hipError_t checkCuda(hipErr... | .text
.file "read_write_stream.hip"
.globl _Z24__device_stub__init_dataPji # -- Begin function _Z24__device_stub__init_dataPji
.p2align 4, 0x90
.type _Z24__device_stub__init_dataPji,@function
_Z24__device_stub__init_dataPji: # @_Z24__device_stub__init_dataPji
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10vector_addPjS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*00... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9init_dataPji
.globl _Z9init_dataPji
.p2align 8
.type _Z9init_dataPji,@function
_Z9init_dataPji:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov_b32 s6, exe... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00195334_00000000-6_read_write_stream.cudafe1.cpp"
.text
#APP
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Starting read_write_controller\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "A : %d\n"
.LC2:
.string "B : %d\n"
.LC3:
.string "iteration (%d) : [%d,%d,%d]\n"
#NO_AP... | .text
.file "read_write_stream.hip"
.globl _Z24__device_stub__init_dataPji # -- Begin function _Z24__device_stub__init_dataPji
.p2align 4, 0x90
.type _Z24__device_stub__init_dataPji,@function
_Z24__device_stub__init_dataPji: # @_Z24__device_stub__init_dataPji
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include<math.h>
// #include<omp.h>
#define SIZE 1024
__global__ void min(int * A, int * C)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
A[2*i]<A[2*i+1]?C[i]=A[2*i]:C[i]=A[2*i+1];
}
int main()
{
int A[SIZE];
int *devA,*devC;
//double start,end;
for(int j=0;j<SIZE;j++)
{
A[j]=SIZE-j;
}
cudaMalloc((void ... | code for sm_80
Function : _Z3minPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0020*/ HFMA... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<math.h>
// #include<omp.h>
#define SIZE 1024
__global__ void min(int * A, int * C)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
A[2*i]<A[2*i+1]?C[i]=A[2*i]:C[i]=A[2*i+1];
}
int main()
{
int A[SIZE];
int *devA,*devC;
//double start,end;
for(int j=0;j<SIZE;j++)
{
A[j]=SIZE-j;
}
cudaMalloc((void ... | .file "tmpxft_0009cac5_00000000-6_minimum_element.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<math.h>
// #include<omp.h>
#define SIZE 1024
__global__ void min(int * A, int * C)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
A[2*i]<A[2*i+1]?C[i]=A[2*i]:C[i]=A[2*i+1];
}
int main()
{
int A[SIZE];
int *devA,*devC;
//double start,end;
for(int j=0;j<SIZE;j++)
{
A[j]=SIZE-j;
}
cudaMalloc((void ... | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
// #include<omp.h>
#define SIZE 1024
__global__ void min(int * A, int * C)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
A[2*i]<A[2*i+1]?C[i]=A[2*i]:C[i]=A[2*i+1];
}
int main()
{
int A[SIZE];
int *devA,*devC;
//double start,end;
for(int j=0;j<SIZE;j++)
{
A[j... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
// #include<omp.h>
#define SIZE 1024
__global__ void min(int * A, int * C)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
A[2*i]<A[2*i+1]?C[i]=A[2*i]:C[i]=A[2*i+1];
}
int main()
{
int A[SIZE];
int *devA,*devC;
//double start,end;
for(int j=0;j<SIZE;j++)
{
A[j... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3minPiS_
.globl _Z3minPiS_
.p2align 8
.type _Z3minPiS_,@function
_Z3minPiS_:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
// #include<omp.h>
#define SIZE 1024
__global__ void min(int * A, int * C)
{
int i=blockIdx.x*blockDim.x+threadIdx.x;
A[2*i]<A[2*i+1]?C[i]=A[2*i]:C[i]=A[2*i+1];
}
int main()
{
int A[SIZE];
int *devA,*devC;
//double start,end;
for(int j=0;j<SIZE;j++)
{
A[j... | .text
.file "minimum_element.hip"
.globl _Z18__device_stub__minPiS_ # -- Begin function _Z18__device_stub__minPiS_
.p2align 4, 0x90
.type _Z18__device_stub__minPiS_,@function
_Z18__device_stub__minPiS_: # @_Z18__device_stub__minPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rd... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3minPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0020*/ HFMA... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3minPiS_
.globl _Z3minPiS_
.p2align 8
.type _Z3minPiS_,@function
_Z3minPiS_:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0009cac5_00000000-6_minimum_element.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "minimum_element.hip"
.globl _Z18__device_stub__minPiS_ # -- Begin function _Z18__device_stub__minPiS_
.p2align 4, 0x90
.type _Z18__device_stub__minPiS_,@function
_Z18__device_stub__minPiS_: # @_Z18__device_stub__minPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rd... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
int it, jt, kt, i, j, k;
__shared__ float sA[32][32], sB[32][32];
// (it, jt) => the first element of a specific tile
it = blockIdx.y * 32;
jt = blockIdx.x * 32;
// (i, j) => specific element
i = it + threadIdx.y... | code for sm_80
Function : _Z8mm_tiledPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
int it, jt, kt, i, j, k;
__shared__ float sA[32][32], sB[32][32];
// (it, jt) => the first element of a specific tile
it = blockIdx.y * 32;
jt = blockIdx.x * 32;
// (i, j) => specific element
i = it + threadIdx.y... | .file "tmpxft_000cb360_00000000-6_mm_tiled.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
int it, jt, kt, i, j, k;
__shared__ float sA[32][32], sB[32][32];
// (it, jt) => the first element of a specific tile
it = blockIdx.y * 32;
jt = blockIdx.x * 32;
// (i, j) => specific element
i = it + threadIdx.y... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
int it, jt, kt, i, j, k;
__shared__ float sA[32][32], sB[32][32];
// (it, jt) => the first element of a specific tile
it = blockIdx.y * 32;
jt = blockIdx.x * 32;
// (i, j) => specific... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
int it, jt, kt, i, j, k;
__shared__ float sA[32][32], sB[32][32];
// (it, jt) => the first element of a specific tile
it = blockIdx.y * 32;
jt = blockIdx.x * 32;
// (i, j) => specific... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8mm_tiledPfS_S_iii
.globl _Z8mm_tiledPfS_S_iii
.p2align 8
.type _Z8mm_tiledPfS_S_iii,@function
_Z8mm_tiledPfS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x20
v_bfe_u32 v2, v0, 10, 10
s_lshl_b32 s3, s14, 5
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
int it, jt, kt, i, j, k;
__shared__ float sA[32][32], sB[32][32];
// (it, jt) => the first element of a specific tile
it = blockIdx.y * 32;
jt = blockIdx.x * 32;
// (i, j) => specific... | .text
.file "mm_tiled.hip"
.globl _Z23__device_stub__mm_tiledPfS_S_iii # -- Begin function _Z23__device_stub__mm_tiledPfS_S_iii
.p2align 4, 0x90
.type _Z23__device_stub__mm_tiledPfS_S_iii,@function
_Z23__device_stub__mm_tiledPfS_S_iii: # @_Z23__device_stub__mm_tiledPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.c... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8mm_tiledPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8mm_tiledPfS_S_iii
.globl _Z8mm_tiledPfS_S_iii
.p2align 8
.type _Z8mm_tiledPfS_S_iii,@function
_Z8mm_tiledPfS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x20
v_bfe_u32 v2, v0, 10, 10
s_lshl_b32 s3, s14, 5
s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000cb360_00000000-6_mm_tiled.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "mm_tiled.hip"
.globl _Z23__device_stub__mm_tiledPfS_S_iii # -- Begin function _Z23__device_stub__mm_tiledPfS_S_iii
.p2align 4, 0x90
.type _Z23__device_stub__mm_tiledPfS_S_iii,@function
_Z23__device_stub__mm_tiledPfS_S_iii: # @_Z23__device_stub__mm_tiledPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <ctime>
__global__
void vecAddKernel(float *A, float *B, float *C, int n){
int i = threadIdx.x + blockDim.x * blockIdx.x;
if(i < n) C[i] = A[i] + B[i];
}
void vecAdd(float* A, float* B, float* C, int n){
int size = n*sizeof(float);
float *d_A, *d_B, *d_C;
cudaMalloc((void **) &d_A, size);
cu... | code for sm_80
Function : _Z12vecAddKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e280000002100 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <ctime>
__global__
void vecAddKernel(float *A, float *B, float *C, int n){
int i = threadIdx.x + blockDim.x * blockIdx.x;
if(i < n) C[i] = A[i] + B[i];
}
void vecAdd(float* A, float* B, float* C, int n){
int size = n*sizeof(float);
float *d_A, *d_B, *d_C;
cudaMalloc((void **) &d_A, size);
cu... | .file "tmpxft_000927a9_00000000-6_suma.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <ctime>
__global__
void vecAddKernel(float *A, float *B, float *C, int n){
int i = threadIdx.x + blockDim.x * blockIdx.x;
if(i < n) C[i] = A[i] + B[i];
}
void vecAdd(float* A, float* B, float* C, int n){
int size = n*sizeof(float);
float *d_A, *d_B, *d_C;
cudaMalloc((void **) &d_A, size);
cu... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <ctime>
__global__
void vecAddKernel(float *A, float *B, float *C, int n){
int i = threadIdx.x + blockDim.x * blockIdx.x;
if(i < n) C[i] = A[i] + B[i];
}
void vecAdd(float* A, float* B, float* C, int n){
int size = n*sizeof(float);
float *d_A, *d_B, *d_C;
hipMall... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <ctime>
__global__
void vecAddKernel(float *A, float *B, float *C, int n){
int i = threadIdx.x + blockDim.x * blockIdx.x;
if(i < n) C[i] = A[i] + B[i];
}
void vecAdd(float* A, float* B, float* C, int n){
int size = n*sizeof(float);
float *d_A, *d_B, *d_C;
hipMall... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vecAddKernelPfS_S_i
.globl _Z12vecAddKernelPfS_S_i
.p2align 8
.type _Z12vecAddKernelPfS_S_i,@function
_Z12vecAddKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <ctime>
__global__
void vecAddKernel(float *A, float *B, float *C, int n){
int i = threadIdx.x + blockDim.x * blockIdx.x;
if(i < n) C[i] = A[i] + B[i];
}
void vecAdd(float* A, float* B, float* C, int n){
int size = n*sizeof(float);
float *d_A, *d_B, *d_C;
hipMall... | .text
.file "suma.hip"
.globl _Z27__device_stub__vecAddKernelPfS_S_i # -- Begin function _Z27__device_stub__vecAddKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__vecAddKernelPfS_S_i,@function
_Z27__device_stub__vecAddKernelPfS_S_i: # @_Z27__device_stub__vecAddKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rs... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12vecAddKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e280000002100 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vecAddKernelPfS_S_i
.globl _Z12vecAddKernelPfS_S_i
.p2align 8
.type _Z12vecAddKernelPfS_S_i,@function
_Z12vecAddKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000927a9_00000000-6_suma.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "suma.hip"
.globl _Z27__device_stub__vecAddKernelPfS_S_i # -- Begin function _Z27__device_stub__vecAddKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__vecAddKernelPfS_S_i,@function
_Z27__device_stub__vecAddKernelPfS_S_i: # @_Z27__device_stub__vecAddKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <vector>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <curand.h>
using namespace std;
constexpr unsigned int ITERATIONS = 1 << 24;
constexpr unsigned int ITERATIONS_KERNEL = 1 << 16;
constexpr unsigned int TOTAL_KERNELS = ITERATIONS / ITERATIONS_KERNEL;
__global_... | code for sm_80
Function : _Z14monte_carlo_pijP6float2Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e2200000025... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <vector>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <curand.h>
using namespace std;
constexpr unsigned int ITERATIONS = 1 << 24;
constexpr unsigned int ITERATIONS_KERNEL = 1 << 16;
constexpr unsigned int TOTAL_KERNELS = ITERATIONS / ITERATIONS_KERNEL;
__global_... | .file "tmpxft_00168b70_00000000-6_monte-carlo-pi.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4035:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <vector>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <curand.h>
using namespace std;
constexpr unsigned int ITERATIONS = 1 << 24;
constexpr unsigned int ITERATIONS_KERNEL = 1 << 16;
constexpr unsigned int TOTAL_KERNELS = ITERATIONS / ITERATIONS_KERNEL;
__global_... | #include <iostream>
#include <vector>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
using namespace std;
constexpr unsigned int ITERATIONS = 1 << 24;
constexpr unsigned int ITERATIONS_KERNEL = 1 << 16;
constexpr unsigned int TOTAL_KERNELS = ITERATIONS / ITERATIONS_KERNEL;
__global__ void monte_carlo_pi(cons... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <iostream>
#include <vector>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
using namespace std;
constexpr unsigned int ITERATIONS = 1 << 24;
constexpr unsigned int ITERATIONS_KERNEL = 1 << 16;
constexpr unsigned int TOTAL_KERNELS = ITERATIONS / ITERATIONS_KERNEL;
__global__ void monte_carlo_pi(cons... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc
.globl _Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc
.p2align 8
.type _Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc,@function
_Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc:
s_clause 0x1
s_load_b32 s4, s[0:1]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <iostream>
#include <vector>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
using namespace std;
constexpr unsigned int ITERATIONS = 1 << 24;
constexpr unsigned int ITERATIONS_KERNEL = 1 << 16;
constexpr unsigned int TOTAL_KERNELS = ITERATIONS / ITERATIONS_KERNEL;
__global__ void monte_carlo_pi(cons... | .text
.file "monte-carlo-pi.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z29__device_stub__monte_carlo_piPK15HIP_vector_typeIfLj2EEPc # -- Begin function _Z29__devi... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.