system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14monte_carlo_pijP6float2Pi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e2200000025... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc
.globl _Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc
.p2align 8
.type _Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc,@function
_Z14monte_carlo_piPK15HIP_vector_typeIfLj2EEPc:
s_clause 0x1
s_load_b32 s4, s[0:1]... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00168b70_00000000-6_monte-carlo-pi.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4035:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... | .text
.file "monte-carlo-pi.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z29__device_stub__monte_carlo_piPK15HIP_vector_typeIfLj2EEPc # -- Begin function _Z29__devi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "moment-update.hh"
#include <cassert>
#include <stdexcept>
#include "graph.hh"
#include "mse-grad.hh"
#include "ops-builder.hh"
#include "variable.hh"
#include "../runtime/node.hh"
#include "../memory/alloc.hh"
namespace ops
{
MomentUpdate::MomentUpdate(Variable* var, Op* dt,
dbl_t coeff1, dbl_t coeff2, bool s... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "moment-update.hh"
#include <cassert>
#include <stdexcept>
#include "graph.hh"
#include "mse-grad.hh"
#include "ops-builder.hh"
#include "variable.hh"
#include "../runtime/node.hh"
#include "../memory/alloc.hh"
namespace ops
{
MomentUpdate::MomentUpdate(Variable* var, Op* dt,
dbl_t coeff1, dbl_t coeff2, bool s... | .file "tmpxft_000f367e_00000000-6_moment-update.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4629:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "moment-update.hh"
#include <cassert>
#include <stdexcept>
#include "graph.hh"
#include "mse-grad.hh"
#include "ops-builder.hh"
#include "variable.hh"
#include "../runtime/node.hh"
#include "../memory/alloc.hh"
namespace ops
{
MomentUpdate::MomentUpdate(Variable* var, Op* dt,
dbl_t coeff1, dbl_t coeff2, bool s... | #include <hip/hip_runtime.h>
#include "moment-update.hh"
#include <cassert>
#include <stdexcept>
#include "graph.hh"
#include "mse-grad.hh"
#include "ops-builder.hh"
#include "variable.hh"
#include "../runtime/node.hh"
#include "../memory/alloc.hh"
namespace ops
{
MomentUpdate::MomentUpdate(Variable* var, Op* dt,
dbl_t... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "moment-update.hh"
#include <cassert>
#include <stdexcept>
#include "graph.hh"
#include "mse-grad.hh"
#include "ops-builder.hh"
#include "variable.hh"
#include "../runtime/node.hh"
#include "../memory/alloc.hh"
namespace ops
{
MomentUpdate::MomentUpdate(Variable* var, Op* dt,
dbl_t... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "moment-update.hh"
#include <cassert>
#include <stdexcept>
#include "graph.hh"
#include "mse-grad.hh"
#include "ops-builder.hh"
#include "variable.hh"
#include "../runtime/node.hh"
#include "../memory/alloc.hh"
namespace ops
{
MomentUpdate::MomentUpdate(Variable* var, Op* dt,
dbl_t... | .text
.file "moment-update.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin functio... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f367e_00000000-6_moment-update.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4629:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __... | .text
.file "moment-update.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin functio... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void combineSourceAndBackground ( const int nwl, const int n, const float scale, float *src, const float *bkg ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
if ( i < n && j < nwl ) {
src[i+j*n] = src[i+j*n] + scale * bkg[i+j*n];
}
} | code for sm_80
Function : _Z26combineSourceAndBackgroundiifPfPKf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void combineSourceAndBackground ( const int nwl, const int n, const float scale, float *src, const float *bkg ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
if ( i < n && j < nwl ) {
src[i+j*n] = src[i+j*n] + scale * bkg[i+j*n];
}
} | .file "tmpxft_000e584c_00000000-6_combineSourceAndBackground.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void combineSourceAndBackground ( const int nwl, const int n, const float scale, float *src, const float *bkg ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
if ( i < n && j < nwl ) {
src[i+j*n] = src[i+j*n] + scale * bkg[i+j*n];
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void combineSourceAndBackground ( const int nwl, const int n, const float scale, float *src, const float *bkg ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
if ( i < n && j < nwl ) {
src[i+j*n] = src[i+j*n] ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void combineSourceAndBackground ( const int nwl, const int n, const float scale, float *src, const float *bkg ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
if ( i < n && j < nwl ) {
src[i+j*n] = src[i+j*n] ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26combineSourceAndBackgroundiifPfPKf
.globl _Z26combineSourceAndBackgroundiifPfPKf
.p2align 8
.type _Z26combineSourceAndBackgroundiifPfPKf,@function
_Z26combineSourceAndBackgroundiifPfPKf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void combineSourceAndBackground ( const int nwl, const int n, const float scale, float *src, const float *bkg ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
if ( i < n && j < nwl ) {
src[i+j*n] = src[i+j*n] ... | .text
.file "combineSourceAndBackground.hip"
.globl _Z41__device_stub__combineSourceAndBackgroundiifPfPKf # -- Begin function _Z41__device_stub__combineSourceAndBackgroundiifPfPKf
.p2align 4, 0x90
.type _Z41__device_stub__combineSourceAndBackgroundiifPfPKf,@function
_Z41__device_stub__combineSourceAndBackgroundiifPfPKf... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z26combineSourceAndBackgroundiifPfPKf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26combineSourceAndBackgroundiifPfPKf
.globl _Z26combineSourceAndBackgroundiifPfPKf
.p2align 8
.type _Z26combineSourceAndBackgroundiifPfPKf,@function
_Z26combineSourceAndBackgroundiifPfPKf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1]... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e584c_00000000-6_combineSourceAndBackground.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary... | .text
.file "combineSourceAndBackground.hip"
.globl _Z41__device_stub__combineSourceAndBackgroundiifPfPKf # -- Begin function _Z41__device_stub__combineSourceAndBackgroundiifPfPKf
.p2align 4, 0x90
.type _Z41__device_stub__combineSourceAndBackgroundiifPfPKf,@function
_Z41__device_stub__combineSourceAndBackgroundiifPfPKf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include<stdlib.h>
dim3 grid(10, 10);
dim3 block(10,10,1);
#define BLOCK 16
#define N 200
__global__
void sum_of_array(float *arr1, float *arr2, float *arr3){
printf("blockIdx.x = %d, blockIdx.y = %d, blockIdx.z = %d\n", blockIdx.x, blockIdx.y, blockIdx.z);
printf("threadIdx.x = %d\n", threadIdx.x);
... | code for sm_80
Function : _Z12sum_of_arrayPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R0, SR_CTAID.Z ; /* 0x0000000000007919 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include<stdlib.h>
dim3 grid(10, 10);
dim3 block(10,10,1);
#define BLOCK 16
#define N 200
__global__
void sum_of_array(float *arr1, float *arr2, float *arr3){
printf("blockIdx.x = %d, blockIdx.y = %d, blockIdx.z = %d\n", blockIdx.x, blockIdx.y, blockIdx.z);
printf("threadIdx.x = %d\n", threadIdx.x);
... | .file "tmpxft_00085523_00000000-6_c1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include<stdlib.h>
dim3 grid(10, 10);
dim3 block(10,10,1);
#define BLOCK 16
#define N 200
__global__
void sum_of_array(float *arr1, float *arr2, float *arr3){
printf("blockIdx.x = %d, blockIdx.y = %d, blockIdx.z = %d\n", blockIdx.x, blockIdx.y, blockIdx.z);
printf("threadIdx.x = %d\n", threadIdx.x);
... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include<stdlib.h>
dim3 grid(10, 10);
dim3 block(10,10,1);
#define BLOCK 16
#define N 200
__global__
void sum_of_array(float *arr1, float *arr2, float *arr3){
printf("blockIdx.x = %d, blockIdx.y = %d, blockIdx.z = %d\n", blockIdx.x, blockIdx.y, blockIdx.z);
printf("thread... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include<stdlib.h>
dim3 grid(10, 10);
dim3 block(10,10,1);
#define BLOCK 16
#define N 200
__global__
void sum_of_array(float *arr1, float *arr2, float *arr3){
printf("blockIdx.x = %d, blockIdx.y = %d, blockIdx.z = %d\n", blockIdx.x, blockIdx.y, blockIdx.z);
printf("thread... | .text
.file "c1.hip"
.globl _Z27__device_stub__sum_of_arrayPfS_S_ # -- Begin function _Z27__device_stub__sum_of_arrayPfS_S_
.p2align 4, 0x90
.type _Z27__device_stub__sum_of_arrayPfS_S_,@function
_Z27__device_stub__sum_of_arrayPfS_S_: # @_Z27__device_stub__sum_of_arrayPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00085523_00000000-6_c1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... | .text
.file "c1.hip"
.globl _Z27__device_stub__sum_of_arrayPfS_S_ # -- Begin function _Z27__device_stub__sum_of_arrayPfS_S_
.p2align 4, 0x90
.type _Z27__device_stub__sum_of_arrayPfS_S_,@function
_Z27__device_stub__sum_of_arrayPfS_S_: # @_Z27__device_stub__sum_of_arrayPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <sys/time.h>
#include <time.h>
#define DEFAULT_THRESHOLD 4000
#define DEFAULT_FILENAME "ansel3.ppm"
unsigned int* read_ppm(char* filename, int* image_width, int* image_height, int* maxval);
void write_ppm(char* filename, int image_wi... | code for sm_80
Function : _Z5sobelPiS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <sys/time.h>
#include <time.h>
#define DEFAULT_THRESHOLD 4000
#define DEFAULT_FILENAME "ansel3.ppm"
unsigned int* read_ppm(char* filename, int* image_width, int* image_height, int* maxval);
void write_ppm(char* filename, int image_wi... | .file "tmpxft_000e039b_00000000-6_sobel_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <sys/time.h>
#include <time.h>
#define DEFAULT_THRESHOLD 4000
#define DEFAULT_FILENAME "ansel3.ppm"
unsigned int* read_ppm(char* filename, int* image_width, int* image_height, int* maxval);
void write_ppm(char* filename, int image_wi... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <sys/time.h>
#include <time.h>
#define DEFAULT_THRESHOLD 4000
#define DEFAULT_FILENAME "ansel3.ppm"
unsigned int* read_ppm(char* filename, int* image_width, int* image_height, int* maxval);
void write_ppm... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <sys/time.h>
#include <time.h>
#define DEFAULT_THRESHOLD 4000
#define DEFAULT_FILENAME "ansel3.ppm"
unsigned int* read_ppm(char* filename, int* image_width, int* image_height, int* maxval);
void write_ppm... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5sobelPiS_iii
.globl _Z5sobelPiS_iii
.p2align 8
.type _Z5sobelPiS_iii,@function
_Z5sobelPiS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[8:9], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <sys/time.h>
#include <time.h>
#define DEFAULT_THRESHOLD 4000
#define DEFAULT_FILENAME "ansel3.ppm"
unsigned int* read_ppm(char* filename, int* image_width, int* image_height, int* maxval);
void write_ppm... | .text
.file "sobel_cuda.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3fa0000000000000 # double 0.03125
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5sobelPiS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5sobelPiS_iii
.globl _Z5sobelPiS_iii
.p2align 8
.type _Z5sobelPiS_iii,@function
_Z5sobelPiS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[8:9], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e039b_00000000-6_sobel_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "sobel_cuda.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3fa0000000000000 # double 0.03125
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
struct point
{
float x;
float y;
};
struct dist
{
float da;
float db;
float dc;
};
float eucli(float fx, float fy)
{
return sqrt(fx * fx + fy * fy);
}
__global__ void trilaterate(struct point a, struct point b, struct point c,... | .file "tmpxft_00082c67_00000000-6_trila.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
struct point
{
float x;
float y;
};
struct dist
{
float da;
float db;
float dc;
};
float eucli(float fx, float fy)
{
return sqrt(fx * fx + fy * fy);
}
__global__ void trilaterate(struct point a, struct point b, struct point c,... | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
struct point
{
float x;
float y;
};
struct dist
{
float da;
float db;
float dc;
};
float eucli(float fx, float fy)
{
return sqrt(fx * fx + fy * fy);
}
__global__ void trilaterate(struct point a, struct point b, stru... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
struct point
{
float x;
float y;
};
struct dist
{
float da;
float db;
float dc;
};
float eucli(float fx, float fy)
{
return sqrt(fx * fx + fy * fy);
}
__global__ void trilaterate(struct point a, struct point b, stru... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11trilaterate5pointS_S_P4distPS_i
.globl _Z11trilaterate5pointS_S_P4distPS_i
.p2align 8
.type _Z11trilaterate5pointS_S_P4distPS_i,@function
_Z11trilaterate5pointS_S_P4distPS_i:
s_load_b32 s12, s[0:1], 0x28
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s12, 1
s_cbr... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
struct point
{
float x;
float y;
};
struct dist
{
float da;
float db;
float dc;
};
float eucli(float fx, float fy)
{
return sqrt(fx * fx + fy * fy);
}
__global__ void trilaterate(struct point a, struct point b, stru... | .text
.file "trila.hip"
.globl _Z5eucliff # -- Begin function _Z5eucliff
.p2align 4, 0x90
.type _Z5eucliff,@function
_Z5eucliff: # @_Z5eucliff
.cfi_startproc
# %bb.0:
mulss %xmm0, %xmm0
mulss %xmm1, %xmm1
addss %xmm0, %xmm1
xorps %xmm0, %xmm0
ucomiss %xmm0, %xmm1
jb .LBB... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00082c67_00000000-6_trila.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "trila.hip"
.globl _Z5eucliff # -- Begin function _Z5eucliff
.p2align 4, 0x90
.type _Z5eucliff,@function
_Z5eucliff: # @_Z5eucliff
.cfi_startproc
# %bb.0:
mulss %xmm0, %xmm0
mulss %xmm1, %xmm1
addss %xmm0, %xmm1
xorps %xmm0, %xmm0
ucomiss %xmm0, %xmm1
jb .LBB... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cmath>
#include <iostream>
#include <thrust/extrema.h>
#include <thrust/device_vector.h>
#define HANDLE_ERROR(err) \
do { if (err != cudaSuccess) { printf("ERROR: %s\n", cudaGetErrorString(err)); exit(0);} } while (0)
struct comparator
{
__host__ __device__ bool operator()(double a, double b)
{
return std::fa... | #include <hip/hip_runtime.h>
#include <cmath>
#include <iostream>
#include <thrust/extrema.h>
#include <thrust/device_vector.h>
#define HANDLE_ERROR(err) \
do { if (err != hipSuccess) { printf("ERROR: %s\n", hipGetErrorString(err)); exit(0);} } while (0)
struct comparator
{
__host__ __device__ bool operator()(double a,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
#include <cuda_runtime.h>
#define BLOCKSIZE 1024
__device__ float sigmoid(float x) {
return 1.0/(1+expf(-x));
}
__global__ void gelu_fwd_cuda(float* input, float* ret,
int64_t size) {
int64_t idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx < size) {
ret[idx] = input[idx]*sigmoid(1.702*input[idx]);
}... | code for sm_80
Function : _Z13gelu_bwd_cudaPfS_S_l
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <cuda_runtime.h>
#define BLOCKSIZE 1024
__device__ float sigmoid(float x) {
return 1.0/(1+expf(-x));
}
__global__ void gelu_fwd_cuda(float* input, float* ret,
int64_t size) {
int64_t idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx < size) {
ret[idx] = input[idx]*sigmoid(1.702*input[idx]);
}... | .file "tmpxft_00160f8d_00000000-6_gelu_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <cuda_runtime.h>
#define BLOCKSIZE 1024
__device__ float sigmoid(float x) {
return 1.0/(1+expf(-x));
}
__global__ void gelu_fwd_cuda(float* input, float* ret,
int64_t size) {
int64_t idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx < size) {
ret[idx] = input[idx]*sigmoid(1.702*input[idx]);
}... | #include <hip/hip_runtime.h>
#define BLOCKSIZE 1024
__device__ float sigmoid(float x) {
return 1.0/(1+expf(-x));
}
__global__ void gelu_fwd_cuda(float* input, float* ret,
int64_t size) {
int64_t idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx < size) {
ret[idx] = input[idx]*sigmoid(1.702*input[idx]);
}
}
__global__ v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define BLOCKSIZE 1024
__device__ float sigmoid(float x) {
return 1.0/(1+expf(-x));
}
__global__ void gelu_fwd_cuda(float* input, float* ret,
int64_t size) {
int64_t idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx < size) {
ret[idx] = input[idx]*sigmoid(1.702*input[idx]);
}
}
__global__ v... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13gelu_fwd_cudaPfS_l
.globl _Z13gelu_fwd_cudaPfS_l
.p2align 8
.type _Z13gelu_fwd_cudaPfS_l,@function
_Z13gelu_fwd_cudaPfS_l:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define BLOCKSIZE 1024
__device__ float sigmoid(float x) {
return 1.0/(1+expf(-x));
}
__global__ void gelu_fwd_cuda(float* input, float* ret,
int64_t size) {
int64_t idx = threadIdx.x + blockIdx.x*blockDim.x;
if(idx < size) {
ret[idx] = input[idx]*sigmoid(1.702*input[idx]);
}
}
__global__ v... | .text
.file "gelu_cuda.hip"
.globl _Z28__device_stub__gelu_fwd_cudaPfS_l # -- Begin function _Z28__device_stub__gelu_fwd_cudaPfS_l
.p2align 4, 0x90
.type _Z28__device_stub__gelu_fwd_cudaPfS_l,@function
_Z28__device_stub__gelu_fwd_cudaPfS_l: # @_Z28__device_stub__gelu_fwd_cudaPfS_l
.cfi_startproc
# %bb.0:
subq $104, %r... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13gelu_bwd_cudaPfS_S_l
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13gelu_fwd_cudaPfS_l
.globl _Z13gelu_fwd_cudaPfS_l
.p2align 8
.type _Z13gelu_fwd_cudaPfS_l,@function
_Z13gelu_fwd_cudaPfS_l:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00160f8d_00000000-6_gelu_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "gelu_cuda.hip"
.globl _Z28__device_stub__gelu_fwd_cudaPfS_l # -- Begin function _Z28__device_stub__gelu_fwd_cudaPfS_l
.p2align 4, 0x90
.type _Z28__device_stub__gelu_fwd_cudaPfS_l,@function
_Z28__device_stub__gelu_fwd_cudaPfS_l: # @_Z28__device_stub__gelu_fwd_cudaPfS_l
.cfi_startproc
# %bb.0:
subq $104, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <math.h>
#include <unistd.h>
#include <cuda_runtime_api.h>
#include <time.h>
#include <errno.h>
/*****************************************************************************
*
*
*
*
*
* Compile with:
* nvcc -o 2_3_a 2_3_a.cu
*
* Dr Kevan Buckley, University of Wolverhampton, 2018
****... | code for sm_80
Function : _Z11d_rms_errorPdS_S_P7point_t
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000000210... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <unistd.h>
#include <hip/hip_runtime_api.h>
#include <time.h>
#include <errno.h>
/*****************************************************************************
*
*
*
*
*
* Compile with:
* nvcc -o 2_3_a 2_3_a.cu
*
* Dr Kevan Buckley, Univers... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11d_rms_errorPdS_S_P7point_t
.globl _Z11d_rms_errorPdS_S_P7point_t
.p2align 8
.type _Z11d_rms_errorPdS_S_P7point_t,@function
_Z11d_rms_errorPdS_S_P7point_t:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11d_rms_errorPdS_S_P7point_t
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000000210... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11d_rms_errorPdS_S_P7point_t
.globl _Z11d_rms_errorPdS_S_P7point_t
.p2align 8
.type _Z11d_rms_errorPdS_S_P7point_t,@function
_Z11d_rms_errorPdS_S_P7point_t:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/*
* Implementations
*/
__global__ void ca_backward_kernel_t(const float *dw, const float *t, const float *f, float *dt, int num, int chn, int height, int width) {
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
int sp = height * width;
int len = heigh... | .file "tmpxft_00082fd8_00000000-6_ca_backward_kernel_t.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/*
* Implementations
*/
__global__ void ca_backward_kernel_t(const float *dw, const float *t, const float *f, float *dt, int num, int chn, int height, int width) {
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
int sp = height * width;
int len = heigh... | #include <hip/hip_runtime.h>
#include "includes.h"
/*
* Implementations
*/
__global__ void ca_backward_kernel_t(const float *dw, const float *t, const float *f, float *dt, int num, int chn, int height, int width) {
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
int sp = he... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
* Implementations
*/
__global__ void ca_backward_kernel_t(const float *dw, const float *t, const float *f, float *dt, int num, int chn, int height, int width) {
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
int sp = he... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20ca_backward_kernel_tPKfS0_S0_Pfiiii
.globl _Z20ca_backward_kernel_tPKfS0_S0_Pfiiii
.p2align 8
.type _Z20ca_backward_kernel_tPKfS0_S0_Pfiiii,@function
_Z20ca_backward_kernel_tPKfS0_S0_Pfiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b128 s[4:7], s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
* Implementations
*/
__global__ void ca_backward_kernel_t(const float *dw, const float *t, const float *f, float *dt, int num, int chn, int height, int width) {
int x = blockIdx.x * blockDim.x + threadIdx.x;
int y = blockIdx.y * blockDim.y + threadIdx.y;
int sp = he... | .text
.file "ca_backward_kernel_t.hip"
.globl _Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii # -- Begin function _Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii
.p2align 4, 0x90
.type _Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii,@function
_Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii: ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00082fd8_00000000-6_ca_backward_kernel_t.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "ca_backward_kernel_t.hip"
.globl _Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii # -- Begin function _Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii
.p2align 4, 0x90
.type _Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii,@function
_Z35__device_stub__ca_backward_kernel_tPKfS0_S0_Pfiiii: ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kernelUpdateWeights(float *nabla_w,float *weights,int tws,float eta,float mini_batch_size) {
float rate=eta/mini_batch_size;
if ((blockIdx.x*blockDim.x+threadIdx.x)<tws) {
weights[blockIdx.x*blockDim.x+threadIdx.x]-=rate*nabla_w[blockIdx.x*blockDim.x+threadIdx.x];
}
} | code for sm_80
Function : _Z19kernelUpdateWeightsPfS_iff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kernelUpdateWeights(float *nabla_w,float *weights,int tws,float eta,float mini_batch_size) {
float rate=eta/mini_batch_size;
if ((blockIdx.x*blockDim.x+threadIdx.x)<tws) {
weights[blockIdx.x*blockDim.x+threadIdx.x]-=rate*nabla_w[blockIdx.x*blockDim.x+threadIdx.x];
}
} | .file "tmpxft_000693f0_00000000-6_kernelUpdateWeights.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kernelUpdateWeights(float *nabla_w,float *weights,int tws,float eta,float mini_batch_size) {
float rate=eta/mini_batch_size;
if ((blockIdx.x*blockDim.x+threadIdx.x)<tws) {
weights[blockIdx.x*blockDim.x+threadIdx.x]-=rate*nabla_w[blockIdx.x*blockDim.x+threadIdx.x];
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernelUpdateWeights(float *nabla_w,float *weights,int tws,float eta,float mini_batch_size) {
float rate=eta/mini_batch_size;
if ((blockIdx.x*blockDim.x+threadIdx.x)<tws) {
weights[blockIdx.x*blockDim.x+threadIdx.x]-=rate*nabla_w[blockIdx.x*blockDim.x+th... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernelUpdateWeights(float *nabla_w,float *weights,int tws,float eta,float mini_batch_size) {
float rate=eta/mini_batch_size;
if ((blockIdx.x*blockDim.x+threadIdx.x)<tws) {
weights[blockIdx.x*blockDim.x+threadIdx.x]-=rate*nabla_w[blockIdx.x*blockDim.x+th... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19kernelUpdateWeightsPfS_iff
.globl _Z19kernelUpdateWeightsPfS_iff
.p2align 8
.type _Z19kernelUpdateWeightsPfS_iff,@function
_Z19kernelUpdateWeightsPfS_iff:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernelUpdateWeights(float *nabla_w,float *weights,int tws,float eta,float mini_batch_size) {
float rate=eta/mini_batch_size;
if ((blockIdx.x*blockDim.x+threadIdx.x)<tws) {
weights[blockIdx.x*blockDim.x+threadIdx.x]-=rate*nabla_w[blockIdx.x*blockDim.x+th... | .text
.file "kernelUpdateWeights.hip"
.globl _Z34__device_stub__kernelUpdateWeightsPfS_iff # -- Begin function _Z34__device_stub__kernelUpdateWeightsPfS_iff
.p2align 4, 0x90
.type _Z34__device_stub__kernelUpdateWeightsPfS_iff,@function
_Z34__device_stub__kernelUpdateWeightsPfS_iff: # @_Z34__device_stub__kernelUpdateWei... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z19kernelUpdateWeightsPfS_iff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19kernelUpdateWeightsPfS_iff
.globl _Z19kernelUpdateWeightsPfS_iff
.p2align 8
.type _Z19kernelUpdateWeightsPfS_iff,@function
_Z19kernelUpdateWeightsPfS_iff:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000693f0_00000000-6_kernelUpdateWeights.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... | .text
.file "kernelUpdateWeights.hip"
.globl _Z34__device_stub__kernelUpdateWeightsPfS_iff # -- Begin function _Z34__device_stub__kernelUpdateWeightsPfS_iff
.p2align 4, 0x90
.type _Z34__device_stub__kernelUpdateWeightsPfS_iff,@function
_Z34__device_stub__kernelUpdateWeightsPfS_iff: # @_Z34__device_stub__kernelUpdateWei... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
/**
* @brief cuda kernel -- compute id of a thread
* @param array that stores thread ids
* @return return is not allowed
*/
__global__ void computeThreadID(unsigned int* threadID);
__global__ void computeThreadID(unsigned int* threadID)
{
int tid = (blockI... | code for sm_80
Function : _Z15computeThreadIDPj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Z ; /* 0x0000000000007919 */
/* 0x000e220000002700 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
/**
* @brief cuda kernel -- compute id of a thread
* @param array that stores thread ids
* @return return is not allowed
*/
__global__ void computeThreadID(unsigned int* threadID);
__global__ void computeThreadID(unsigned int* threadID)
{
int tid = (blockI... | .file "tmpxft_00129894_00000000-6_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
/**
* @brief cuda kernel -- compute id of a thread
* @param array that stores thread ids
* @return return is not allowed
*/
__global__ void computeThreadID(unsigned int* threadID);
__global__ void computeThreadID(unsigned int* threadID)
{
int tid = (blockI... | #include <hip/hip_runtime.h>
/**
* @brief cuda kernel -- compute id of a thread
* @param array that stores thread ids
* @return return is not allowed
*/
__global__ void computeThreadID(unsigned int* threadID);
__global__ void computeThreadID(unsigned int* threadID)
{
int tid = (blockIdx.z * gridDim.y * gridDim.x +
bloc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/**
* @brief cuda kernel -- compute id of a thread
* @param array that stores thread ids
* @return return is not allowed
*/
__global__ void computeThreadID(unsigned int* threadID);
__global__ void computeThreadID(unsigned int* threadID)
{
int tid = (blockIdx.z * gridDim.y * gridDim.x +
bloc... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15computeThreadIDPj
.globl _Z15computeThreadIDPj
.p2align 8
.type _Z15computeThreadIDPj,@function
_Z15computeThreadIDPj:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x14
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgk... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/**
* @brief cuda kernel -- compute id of a thread
* @param array that stores thread ids
* @return return is not allowed
*/
__global__ void computeThreadID(unsigned int* threadID);
__global__ void computeThreadID(unsigned int* threadID)
{
int tid = (blockIdx.z * gridDim.y * gridDim.x +
bloc... | .text
.file "kernels.hip"
.globl _Z30__device_stub__computeThreadIDPj # -- Begin function _Z30__device_stub__computeThreadIDPj
.p2align 4, 0x90
.type _Z30__device_stub__computeThreadIDPj,@function
_Z30__device_stub__computeThreadIDPj: # @_Z30__device_stub__computeThreadIDPj
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15computeThreadIDPj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Z ; /* 0x0000000000007919 */
/* 0x000e220000002700 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15computeThreadIDPj
.globl _Z15computeThreadIDPj
.p2align 8
.type _Z15computeThreadIDPj,@function
_Z15computeThreadIDPj:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x14
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgk... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00129894_00000000-6_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "kernels.hip"
.globl _Z30__device_stub__computeThreadIDPj # -- Begin function _Z30__device_stub__computeThreadIDPj
.p2align 4, 0x90
.type _Z30__device_stub__computeThreadIDPj,@function
_Z30__device_stub__computeThreadIDPj: # @_Z30__device_stub__computeThreadIDPj
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
#include <stdio.h>
#include "device_launch_parameters.h"
#define DATA_SIZE 1048576
#define BLOCK_NUM 32
#define THREAD_NUM 256
int data[DATA_SIZE];
clock_t clockBegin, clockEnd;
__global__ static void sumOfSquares(int *num, int* result,... | code for sm_80
Function : _Z12sumOfSquaresPiS_Pl
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
#include <stdio.h>
#include "device_launch_parameters.h"
#define DATA_SIZE 1048576
#define BLOCK_NUM 32
#define THREAD_NUM 256
int data[DATA_SIZE];
clock_t clockBegin, clockEnd;
__global__ static void sumOfSquares(int *num, int* result,... | .file "tmpxft_000e3e36_00000000-6_first_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL12sumOfSquaresPiS_Pl, @function
_ZL12sumOfSquaresPiS_Pl:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 8(%rsp)
movq %rsi, 16(%rsp)
movq %rdx,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
#include <stdio.h>
#include "device_launch_parameters.h"
#define DATA_SIZE 1048576
#define BLOCK_NUM 32
#define THREAD_NUM 256
int data[DATA_SIZE];
clock_t clockBegin, clockEnd;
__global__ static void sumOfSquares(int *num, int* result,... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdio.h>
#define DATA_SIZE 1048576
#define BLOCK_NUM 32
#define THREAD_NUM 256
int data[DATA_SIZE];
clock_t clockBegin, clockEnd;
__global__ static void sumOfSquares(int *num, int* result,
clock_t* time)
{
const int tid = t... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdio.h>
#define DATA_SIZE 1048576
#define BLOCK_NUM 32
#define THREAD_NUM 256
int data[DATA_SIZE];
clock_t clockBegin, clockEnd;
__global__ static void sumOfSquares(int *num, int* result,
clock_t* time)
{
const int tid = t... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZL12sumOfSquaresPiS_Pl,"axG",@progbits,_ZL12sumOfSquaresPiS_Pl,comdat
.globl _ZL12sumOfSquaresPiS_Pl
.p2align 8
.type _ZL12sumOfSquaresPiS_Pl,@function
_ZL12sumOfSquaresPiS_Pl:
s_load_b64 s[4:5], s[0:1], 0x10
v_cmp_eq_u32_e32 vcc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdio.h>
#define DATA_SIZE 1048576
#define BLOCK_NUM 32
#define THREAD_NUM 256
int data[DATA_SIZE];
clock_t clockBegin, clockEnd;
__global__ static void sumOfSquares(int *num, int* result,
clock_t* time)
{
const int tid = t... | .text
.file "first_cuda.hip"
.globl _Z25PrintfContainerElapseTimePcS_l # -- Begin function _Z25PrintfContainerElapseTimePcS_l
.p2align 4, 0x90
.type _Z25PrintfContainerElapseTimePcS_l,@function
_Z25PrintfContainerElapseTimePcS_l: # @_Z25PrintfContainerElapseTimePcS_l
.cfi_startproc
# %bb.0:
movq %rdx, %rcx
movq %rs... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12sumOfSquaresPiS_Pl
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZL12sumOfSquaresPiS_Pl,"axG",@progbits,_ZL12sumOfSquaresPiS_Pl,comdat
.globl _ZL12sumOfSquaresPiS_Pl
.p2align 8
.type _ZL12sumOfSquaresPiS_Pl,@function
_ZL12sumOfSquaresPiS_Pl:
s_load_b64 s[4:5], s[0:1], 0x10
v_cmp_eq_u32_e32 vcc... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e3e36_00000000-6_first_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL12sumOfSquaresPiS_Pl, @function
_ZL12sumOfSquaresPiS_Pl:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
movq %rdi, 8(%rsp)
movq %rsi, 16(%rsp)
movq %rdx,... | .text
.file "first_cuda.hip"
.globl _Z25PrintfContainerElapseTimePcS_l # -- Begin function _Z25PrintfContainerElapseTimePcS_l
.p2align 4, 0x90
.type _Z25PrintfContainerElapseTimePcS_l,@function
_Z25PrintfContainerElapseTimePcS_l: # @_Z25PrintfContainerElapseTimePcS_l
.cfi_startproc
# %bb.0:
movq %rdx, %rcx
movq %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
Finds: TLB misses
For the Tesla V100-SXM2-16GB's TLB
Soure code based on paper https://arxiv.org/pdf/1509.02308.pdf
*/
#include <stdio.h>
#include <stdint.h>
#include "cuda_runtime.h"
#define LEN 256
__global__ void global_latency(unsigned int* my_array, int N, int iterations, unsigned int* duration, unsigned int... | .file "tmpxft_000d0651_00000000-6_volta_tlb.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
Finds: TLB misses
For the Tesla V100-SXM2-16GB's TLB
Soure code based on paper https://arxiv.org/pdf/1509.02308.pdf
*/
#include <stdio.h>
#include <stdint.h>
#include "cuda_runtime.h"
#define LEN 256
__global__ void global_latency(unsigned int* my_array, int N, int iterations, unsigned int* duration, unsigned int... | /*
Finds: TLB misses
For the Tesla V100-SXM2-16GB's TLB
Soure code based on paper https://arxiv.org/pdf/1509.02308.pdf
*/
#include <stdio.h>
#include <stdint.h>
#include "hip/hip_runtime.h"
#define LEN 256
__global__ void global_latency(unsigned int* my_array, int N, int iterations, unsigned int* duration, unsigned ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
Finds: TLB misses
For the Tesla V100-SXM2-16GB's TLB
Soure code based on paper https://arxiv.org/pdf/1509.02308.pdf
*/
#include <stdio.h>
#include <stdint.h>
#include "hip/hip_runtime.h"
#define LEN 256
__global__ void global_latency(unsigned int* my_array, int N, int iterations, unsigned int* duration, unsigned ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14global_latencyPjiiS_S_
.globl _Z14global_latencyPjiiS_S_
.p2align 8
.type _Z14global_latencyPjiiS_S_,@function
_Z14global_latencyPjiiS_S_:
v_mov_b32_e32 v0, 0
s_mov_b32 s2, 0
.LBB0_1:
s_delay_alu instid0(SALU_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
Finds: TLB misses
For the Tesla V100-SXM2-16GB's TLB
Soure code based on paper https://arxiv.org/pdf/1509.02308.pdf
*/
#include <stdio.h>
#include <stdint.h>
#include "hip/hip_runtime.h"
#define LEN 256
__global__ void global_latency(unsigned int* my_array, int N, int iterations, unsigned int* duration, unsigned ... | .text
.file "volta_tlb.hip"
.globl _Z29__device_stub__global_latencyPjiiS_S_ # -- Begin function _Z29__device_stub__global_latencyPjiiS_S_
.p2align 4, 0x90
.type _Z29__device_stub__global_latencyPjiiS_S_,@function
_Z29__device_stub__global_latencyPjiiS_S_: # @_Z29__device_stub__global_latencyPjiiS_S_
.cfi_startproc
# %... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d0651_00000000-6_volta_tlb.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "volta_tlb.hip"
.globl _Z29__device_stub__global_latencyPjiiS_S_ # -- Begin function _Z29__device_stub__global_latencyPjiiS_S_
.p2align 4, 0x90
.type _Z29__device_stub__global_latencyPjiiS_S_,@function
_Z29__device_stub__global_latencyPjiiS_S_: # @_Z29__device_stub__global_latencyPjiiS_S_
.cfi_startproc
# %... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void chooseLaw ( const int nwl, const int *kex, const float *didi11, const float *didi12, const float *didi13, float *didi1 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
didi1[i] = ( kex[i] == 0 ) * didi11[i] + ( kex[i] == 1 ) * didi12[i] + ( kex[i] == 2 ) * didi13... | code for sm_80
Function : _Z9chooseLawiPKiPKfS2_S2_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280000002100 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void chooseLaw ( const int nwl, const int *kex, const float *didi11, const float *didi12, const float *didi13, float *didi1 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
didi1[i] = ( kex[i] == 0 ) * didi11[i] + ( kex[i] == 1 ) * didi12[i] + ( kex[i] == 2 ) * didi13... | .file "tmpxft_0016fa3c_00000000-6_chooseLaw.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void chooseLaw ( const int nwl, const int *kex, const float *didi11, const float *didi12, const float *didi13, float *didi1 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
didi1[i] = ( kex[i] == 0 ) * didi11[i] + ( kex[i] == 1 ) * didi12[i] + ( kex[i] == 2 ) * didi13... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void chooseLaw ( const int nwl, const int *kex, const float *didi11, const float *didi12, const float *didi13, float *didi1 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
didi1[i] = ( kex[i] == 0 ) * didi11[i] + ( kex[i] == 1 ) * didi12[... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void chooseLaw ( const int nwl, const int *kex, const float *didi11, const float *didi12, const float *didi13, float *didi1 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
didi1[i] = ( kex[i] == 0 ) * didi11[i] + ( kex[i] == 1 ) * didi12[... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9chooseLawiPKiPKfS2_S2_Pf
.globl _Z9chooseLawiPKiPKfS2_S2_Pf
.p2align 8
.type _Z9chooseLawiPKiPKfS2_S2_Pf,@function
_Z9chooseLawiPKiPKfS2_S2_Pf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void chooseLaw ( const int nwl, const int *kex, const float *didi11, const float *didi12, const float *didi13, float *didi1 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
didi1[i] = ( kex[i] == 0 ) * didi11[i] + ( kex[i] == 1 ) * didi12[... | .text
.file "chooseLaw.hip"
.globl _Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf # -- Begin function _Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf
.p2align 4, 0x90
.type _Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf,@function
_Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf: # @_Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf
.cfi_sta... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9chooseLawiPKiPKfS2_S2_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280000002100 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9chooseLawiPKiPKfS2_S2_Pf
.globl _Z9chooseLawiPKiPKfS2_S2_Pf
.p2align 8
.type _Z9chooseLawiPKiPKfS2_S2_Pf,@function
_Z9chooseLawiPKiPKfS2_S2_Pf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016fa3c_00000000-6_chooseLaw.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "chooseLaw.hip"
.globl _Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf # -- Begin function _Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf
.p2align 4, 0x90
.type _Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf,@function
_Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf: # @_Z24__device_stub__chooseLawiPKiPKfS2_S2_Pf
.cfi_sta... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* hw04p02.cu
*
* Created on: Oct 04, 2015
* Author: Kazi
* Usage:
* It performs integer multiplication of a 16x32 matrix with a 32x1 vector
* on a GPU. Does not take any arguments. Just generates predefined matrices
* and reports the time taken to do the multiplication.
*/
#include <stdio.h>
#include <stdlib.h>
#inc... | code for sm_80
Function : _Z9multArrayPiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* hw04p02.cu
*
* Created on: Oct 04, 2015
* Author: Kazi
* Usage:
* It performs integer multiplication of a 16x32 matrix with a 32x1 vector
* on a GPU. Does not take any arguments. Just generates predefined matrices
* and reports the time taken to do the multiplication.
*/
#include <stdio.h>
#include <stdlib.h>
#inc... | .file "tmpxft_001b9bca_00000000-6_hw04p02.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUn... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* hw04p02.cu
*
* Created on: Oct 04, 2015
* Author: Kazi
* Usage:
* It performs integer multiplication of a 16x32 matrix with a 32x1 vector
* on a GPU. Does not take any arguments. Just generates predefined matrices
* and reports the time taken to do the multiplication.
*/
#include <stdio.h>
#include <stdlib.h>
#inc... | /*
* hw04p02.cu
*
* Created on: Oct 04, 2015
* Author: Kazi
* Usage:
* It performs integer multiplication of a 16x32 matrix with a 32x1 vector
* on a GPU. Does not take any arguments. Just generates predefined matrices
* and reports the time taken to do the multiplication.
*/
#include <stdio.h>
#include <stdlib.h>
#inc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
* hw04p02.cu
*
* Created on: Oct 04, 2015
* Author: Kazi
* Usage:
* It performs integer multiplication of a 16x32 matrix with a 32x1 vector
* on a GPU. Does not take any arguments. Just generates predefined matrices
* and reports the time taken to do the multiplication.
*/
#include <stdio.h>
#include <stdlib.h>
#inc... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9multArrayPiS_S_ii
.globl _Z9multArrayPiS_S_ii
.p2align 8
.type _Z9multArrayPiS_S_ii,@function
_Z9multArrayPiS_S_ii:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbra... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* hw04p02.cu
*
* Created on: Oct 04, 2015
* Author: Kazi
* Usage:
* It performs integer multiplication of a 16x32 matrix with a 32x1 vector
* on a GPU. Does not take any arguments. Just generates predefined matrices
* and reports the time taken to do the multiplication.
*/
#include <stdio.h>
#include <stdlib.h>
#inc... | .text
.file "hw04p02.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__multArrayPiS_S_ii # -- Begin function _Z24__device_stub__multArrayPiS_S_ii
.p2al... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9multArrayPiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9multArrayPiS_S_ii
.globl _Z9multArrayPiS_S_ii
.p2align 8
.type _Z9multArrayPiS_S_ii,@function
_Z9multArrayPiS_S_ii:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbra... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b9bca_00000000-6_hw04p02.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUn... | .text
.file "hw04p02.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__multArrayPiS_S_ii # -- Begin function _Z24__device_stub__multArrayPiS_S_ii
.p2al... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
__global__
void sum_mat_kernel(float* d_A, float* d_B, float* d_C, int n)
{
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if (col < n && row < n)
{
int idx = row*n + col;
d_C[idx] = d_A[idx] + d_B[idx];
}
}
__global__
void sum_mat_row_kernel(float... | .file "tmpxft_0008587a_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
__global__
void sum_mat_kernel(float* d_A, float* d_B, float* d_C, int n)
{
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if (col < n && row < n)
{
int idx = row*n + col;
d_C[idx] = d_A[idx] + d_B[idx];
}
}
__global__
void sum_mat_row_kernel(float... | #include <hip/hip_runtime.h>
#include <iostream>
__global__
void sum_mat_kernel(float* d_A, float* d_B, float* d_C, int n)
{
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if (col < n && row < n)
{
int idx = row*n + col;
d_C[idx] = d_A[idx] + d_B[idx];
}
}
__global__
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
__global__
void sum_mat_kernel(float* d_A, float* d_B, float* d_C, int n)
{
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if (col < n && row < n)
{
int idx = row*n + col;
d_C[idx] = d_A[idx] + d_B[idx];
}
}
__global__
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14sum_mat_kernelPfS_S_i
.globl _Z14sum_mat_kernelPfS_S_i
.p2align 8
.type _Z14sum_mat_kernelPfS_S_i,@function
_Z14sum_mat_kernelPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
__global__
void sum_mat_kernel(float* d_A, float* d_B, float* d_C, int n)
{
int col = threadIdx.x + blockDim.x * blockIdx.x;
int row = threadIdx.y + blockDim.y * blockIdx.y;
if (col < n && row < n)
{
int idx = row*n + col;
d_C[idx] = d_A[idx] + d_B[idx];
}
}
__global__
... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z29__device_stub__sum_mat_kernelPfS_S_i # -- Begin function _Z29__device_stub__sum_mat_kernelPfS_S_i
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008587a_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z29__device_stub__sum_mat_kernelPfS_S_i # -- Begin function _Z29__device_stub__sum_mat_kernelPfS_S_i
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <assert.h>
#define cudaCheckError() { \
cudaError_t e = cudaGetLastError(); \
if (e != cudaSuccess) { \
printf("CUDA Failure %s:%d: '%s'\n", __FILE__, __LINE__, cudaGetErrorString(e)); \
exit(EXIT_FAILURE); \
} \
}
inline cudaError_t cudaCheckErrorInline(cudaError_t result) {
if (result != c... | code for sm_80
Function : _Z14addVectorsIntoPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <assert.h>
#define cudaCheckError() { \
cudaError_t e = cudaGetLastError(); \
if (e != cudaSuccess) { \
printf("CUDA Failure %s:%d: '%s'\n", __FILE__, __LINE__, cudaGetErrorString(e)); \
exit(EXIT_FAILURE); \
} \
}
inline cudaError_t cudaCheckErrorInline(cudaError_t result) {
if (result != c... | .file "tmpxft_00071642_00000000-6_vector_add_1D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <assert.h>
#define cudaCheckError() { \
cudaError_t e = cudaGetLastError(); \
if (e != cudaSuccess) { \
printf("CUDA Failure %s:%d: '%s'\n", __FILE__, __LINE__, cudaGetErrorString(e)); \
exit(EXIT_FAILURE); \
} \
}
inline cudaError_t cudaCheckErrorInline(cudaError_t result) {
if (result != c... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#define cudaCheckError() { \
hipError_t e = hipGetLastError(); \
if (e != hipSuccess) { \
printf("CUDA Failure %s:%d: '%s'\n", __FILE__, __LINE__, hipGetErrorString(e)); \
exit(EXIT_FAILURE); \
} \
}
inline hipError_t cudaCheckErrorInline(hipError_t re... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#define cudaCheckError() { \
hipError_t e = hipGetLastError(); \
if (e != hipSuccess) { \
printf("CUDA Failure %s:%d: '%s'\n", __FILE__, __LINE__, hipGetErrorString(e)); \
exit(EXIT_FAILURE); \
} \
}
inline hipError_t cudaCheckErrorInline(hipError_t re... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14addVectorsIntoPfS_S_i
.globl _Z14addVectorsIntoPfS_S_i
.p2align 8
.type _Z14addVectorsIntoPfS_S_i,@function
_Z14addVectorsIntoPfS_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s12, s[0:1], 0x18
s_add_u32 s2, s0, 32
s_addc_u32 s3,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#define cudaCheckError() { \
hipError_t e = hipGetLastError(); \
if (e != hipSuccess) { \
printf("CUDA Failure %s:%d: '%s'\n", __FILE__, __LINE__, hipGetErrorString(e)); \
exit(EXIT_FAILURE); \
} \
}
inline hipError_t cudaCheckErrorInline(hipError_t re... | .text
.file "vector_add_1D.hip"
.globl _Z8initWithfPfi # -- Begin function _Z8initWithfPfi
.p2align 4, 0x90
.type _Z8initWithfPfi,@function
_Z8initWithfPfi: # @_Z8initWithfPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB0_3
# %bb.1: # %.lr.ph.pr... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14addVectorsIntoPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14addVectorsIntoPfS_S_i
.globl _Z14addVectorsIntoPfS_S_i
.p2align 8
.type _Z14addVectorsIntoPfS_S_i,@function
_Z14addVectorsIntoPfS_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s12, s[0:1], 0x18
s_add_u32 s2, s0, 32
s_addc_u32 s3,... |
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