system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
// version 1: parallel blocks
// __global__ void add(int *a, int *b, int * c){
// int i = blockIdx.x;
// c[i] = a[i] + b[i];
// }
// version 2: parallel threads
// __global__ void add(int *a, int *b, int * c){
// int i = threadIdx.x;
// c[i] = a[i] + b[i];
// }
// // version 3: Combining Threads and ... | .file "tmpxft_0015cdb7_00000000-6_vector_addition.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
// version 1: parallel blocks
// __global__ void add(int *a, int *b, int * c){
// int i = blockIdx.x;
// c[i] = a[i] + b[i];
// }
// version 2: parallel threads
// __global__ void add(int *a, int *b, int * c){
// int i = threadIdx.x;
// c[i] = a[i] + b[i];
// }
// // version 3: Combining Threads and ... | #include <hip/hip_runtime.h>
#include <stdio.h>
// version 1: parallel blocks
// __global__ void add(int *a, int *b, int * c){
// int i = blockIdx.x;
// c[i] = a[i] + b[i];
// }
// version 2: parallel threads
// __global__ void add(int *a, int *b, int * c){
// int i = threadIdx.x;
// c[i] = a[i] + b[i];
// }
// // vers... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
// version 1: parallel blocks
// __global__ void add(int *a, int *b, int * c){
// int i = blockIdx.x;
// c[i] = a[i] + b[i];
// }
// version 2: parallel threads
// __global__ void add(int *a, int *b, int * c){
// int i = threadIdx.x;
// c[i] = a[i] + b[i];
// }
// // vers... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_i
.globl _Z3addPiS_S_i
.p2align 8
.type _Z3addPiS_S_i,@function
_Z3addPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu inst... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
// version 1: parallel blocks
// __global__ void add(int *a, int *b, int * c){
// int i = blockIdx.x;
// c[i] = a[i] + b[i];
// }
// version 2: parallel threads
// __global__ void add(int *a, int *b, int * c){
// int i = threadIdx.x;
// c[i] = a[i] + b[i];
// }
// // vers... | .text
.file "vector_addition.hip"
.globl _Z18__device_stub__addPiS_S_i # -- Begin function _Z18__device_stub__addPiS_S_i
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_i,@function
_Z18__device_stub__addPiS_S_i: # @_Z18__device_stub__addPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 1... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e280000002100 */
/*0020*/ S2R... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_i
.globl _Z3addPiS_S_i
.p2align 8
.type _Z3addPiS_S_i,@function
_Z3addPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu inst... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015cdb7_00000000-6_vector_addition.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "vector_addition.hip"
.globl _Z18__device_stub__addPiS_S_i # -- Begin function _Z18__device_stub__addPiS_S_i
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_i,@function
_Z18__device_stub__addPiS_S_i: # @_Z18__device_stub__addPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 1... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /* This file is part of the Marching Cubes GPU based algorithm based on
* Paul Bourke's tabulation approach to marching cubes
* http://paulbourke.net/geometry/polygonise/
*
*
* We model cubes with 8 vertices labelled as below
*
*
* 4--------(4)---------5
* /| /|
* / | / |
* / | / |
* (7) | (5) |
* / | / |
* / (8) / (9... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* This file is part of the Marching Cubes GPU based algorithm based on
* Paul Bourke's tabulation approach to marching cubes
* http://paulbourke.net/geometry/polygonise/
*
*
* We model cubes with 8 vertices labelled as below
*
*
* 4--------(4)---------5
* /| /|
* / | / |
* / | / |
* (7) | (5) |
* / | / |
* / (8) / (9... | .file "tmpxft_000d99e4_00000000-6_MC_table.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/* This file is part of the Marching Cubes GPU based algorithm based on
* Paul Bourke's tabulation approach to marching cubes
* http://paulbourke.net/geometry/polygonise/
*
*
* We model cubes with 8 vertices labelled as below
*
*
* 4--------(4)---------5
* /| /|
* / | / |
* / | / |
* (7) |... | .text
.file "MC_table.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d99e4_00000000-6_MC_table.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "MC_table.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void histo_kernel_2 (unsigned char *buffer, int img_w, int img_h, int *histo)
{
int id_x = blockIdx.x * blockDim.x + threadIdx.x ;
int id_y = blockIdx.y * blockDim.y + threadIdx.y ;
atomicAdd (&histo[buffer[id_y*img_w + id_x]] , 1 );
} | code for sm_80
Function : _Z14histo_kernel_2PhiiPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void histo_kernel_2 (unsigned char *buffer, int img_w, int img_h, int *histo)
{
int id_x = blockIdx.x * blockDim.x + threadIdx.x ;
int id_y = blockIdx.y * blockDim.y + threadIdx.y ;
atomicAdd (&histo[buffer[id_y*img_w + id_x]] , 1 );
} | .file "tmpxft_00186061_00000000-6_histo_kernel_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void histo_kernel_2 (unsigned char *buffer, int img_w, int img_h, int *histo)
{
int id_x = blockIdx.x * blockDim.x + threadIdx.x ;
int id_y = blockIdx.y * blockDim.y + threadIdx.y ;
atomicAdd (&histo[buffer[id_y*img_w + id_x]] , 1 );
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void histo_kernel_2 (unsigned char *buffer, int img_w, int img_h, int *histo)
{
int id_x = blockIdx.x * blockDim.x + threadIdx.x ;
int id_y = blockIdx.y * blockDim.y + threadIdx.y ;
atomicAdd (&histo[buffer[id_y*img_w + id_x]] , 1 );
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void histo_kernel_2 (unsigned char *buffer, int img_w, int img_h, int *histo)
{
int id_x = blockIdx.x * blockDim.x + threadIdx.x ;
int id_y = blockIdx.y * blockDim.y + threadIdx.y ;
atomicAdd (&histo[buffer[id_y*img_w + id_x]] , 1 );
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14histo_kernel_2PhiiPi
.globl _Z14histo_kernel_2PhiiPi
.p2align 8
.type _Z14histo_kernel_2PhiiPi,@function
_Z14histo_kernel_2PhiiPi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s5, s[0:1], 0x8
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void histo_kernel_2 (unsigned char *buffer, int img_w, int img_h, int *histo)
{
int id_x = blockIdx.x * blockDim.x + threadIdx.x ;
int id_y = blockIdx.y * blockDim.y + threadIdx.y ;
atomicAdd (&histo[buffer[id_y*img_w + id_x]] , 1 );
} | .text
.file "histo_kernel_2.hip"
.globl _Z29__device_stub__histo_kernel_2PhiiPi # -- Begin function _Z29__device_stub__histo_kernel_2PhiiPi
.p2align 4, 0x90
.type _Z29__device_stub__histo_kernel_2PhiiPi,@function
_Z29__device_stub__histo_kernel_2PhiiPi: # @_Z29__device_stub__histo_kernel_2PhiiPi
.cfi_startproc
# %bb.0:... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14histo_kernel_2PhiiPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14histo_kernel_2PhiiPi
.globl _Z14histo_kernel_2PhiiPi
.p2align 8
.type _Z14histo_kernel_2PhiiPi,@function
_Z14histo_kernel_2PhiiPi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s5, s[0:1], 0x8
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00186061_00000000-6_histo_kernel_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "histo_kernel_2.hip"
.globl _Z29__device_stub__histo_kernel_2PhiiPi # -- Begin function _Z29__device_stub__histo_kernel_2PhiiPi
.p2align 4, 0x90
.type _Z29__device_stub__histo_kernel_2PhiiPi,@function
_Z29__device_stub__histo_kernel_2PhiiPi: # @_Z29__device_stub__histo_kernel_2PhiiPi
.cfi_startproc
# %bb.0:... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <vector>
#include <iostream>
#include <functional>
#include <algorithm>
#define NUM_OF_GPU_THREADS 1024
#define ACCURACY 1
double *jacobi_seq(int m, int n)
{
double d, r, t, *b, *x, *xnew;
int i, it;
b = (double *)malloc(n * sizeof(double));
x = (double ... | #include <hip/hip_runtime.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <vector>
#include <iostream>
#include <functional>
#include <algorithm>
#define NUM_OF_GPU_THREADS 1024
#define ACCURACY 1
double *jacobi_seq(int m, int n)
{
double d, r, t, *b, *x, *xnew;
int i, it;
b = (double *)malloc(n * ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ unsigned int getGid3d3d(){
int blockId = blockIdx.x + blockIdx.y * gridDim.x
+ gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z)
+ (threadIdx.y * blockDim.x)
+ (threadIdx.z * (blockDim.x * blockDim.y)) + threadIdx.x;
return threadId;
}
_... | .file "tmpxft_000789a7_00000000-6_cMultPhi.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ unsigned int getGid3d3d(){
int blockId = blockIdx.x + blockIdx.y * gridDim.x
+ gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z)
+ (threadIdx.y * blockDim.x)
+ (threadIdx.z * (blockDim.x * blockDim.y)) + threadIdx.x;
return threadId;
}
_... | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ unsigned int getGid3d3d(){
int blockId = blockIdx.x + blockIdx.y * gridDim.x
+ gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z)
+ (threadIdx.y * blockDim.x)
+ (threadIdx.z * (blockDim.x * blockDim.y)) + thre... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ unsigned int getGid3d3d(){
int blockId = blockIdx.x + blockIdx.y * gridDim.x
+ gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z)
+ (threadIdx.y * blockDim.x)
+ (threadIdx.z * (blockDim.x * blockDim.y)) + thre... | .text
.file "cMultPhi.hip"
.globl _Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_ # -- Begin function _Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_
.p2align 4, 0x90
.type _Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_,@function
_Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_: ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000789a7_00000000-6_cMultPhi.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "cMultPhi.hip"
.globl _Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_ # -- Begin function _Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_
.p2align 4, 0x90
.type _Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_,@function
_Z23__device_stub__cMultPhiP15HIP_vector_typeIdLj2EEPdS1_: ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
int deviceQuery()
{
int deviceCount;
cudaGetDeviceCount(&deviceCount);
for (int dev = 0; dev < deviceCount; dev++) {
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, dev);
if (dev == 0) {
if (deviceProp.major == 9999 && deviceProp.minor == 9999) {
printf( "No CUDA GPU has been dete... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
int deviceQuery()
{
int deviceCount;
cudaGetDeviceCount(&deviceCount);
for (int dev = 0; dev < deviceCount; dev++) {
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, dev);
if (dev == 0) {
if (deviceProp.major == 9999 && deviceProp.minor == 9999) {
printf( "No CUDA GPU has been dete... | .file "tmpxft_000fef4e_00000000-6_deviceQuery.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
int deviceQuery()
{
int deviceCount;
cudaGetDeviceCount(&deviceCount);
for (int dev = 0; dev < deviceCount; dev++) {
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, dev);
if (dev == 0) {
if (deviceProp.major == 9999 && deviceProp.minor == 9999) {
printf( "No CUDA GPU has been dete... | #include <hip/hip_runtime.h>
#include <cstdio>
int deviceQuery()
{
int deviceCount;
hipGetDeviceCount(&deviceCount);
for (int dev = 0; dev < deviceCount; dev++) {
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, dev);
if (dev == 0) {
if (deviceProp.major == 9999 && deviceProp.minor == 9999) {
printf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
int deviceQuery()
{
int deviceCount;
hipGetDeviceCount(&deviceCount);
for (int dev = 0; dev < deviceCount; dev++) {
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, dev);
if (dev == 0) {
if (deviceProp.major == 9999 && deviceProp.minor == 9999) {
printf... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
int deviceQuery()
{
int deviceCount;
hipGetDeviceCount(&deviceCount);
for (int dev = 0; dev < deviceCount; dev++) {
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, dev);
if (dev == 0) {
if (deviceProp.major == 9999 && deviceProp.minor == 9999) {
printf... | .text
.file "deviceQuery.hip"
.globl _Z11deviceQueryv # -- Begin function _Z11deviceQueryv
.p2align 4, 0x90
.type _Z11deviceQueryv,@function
_Z11deviceQueryv: # @_Z11deviceQueryv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000fef4e_00000000-6_deviceQuery.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "deviceQuery.hip"
.globl _Z11deviceQueryv # -- Begin function _Z11deviceQueryv
.p2align 4, 0x90
.type _Z11deviceQueryv,@function
_Z11deviceQueryv: # @_Z11deviceQueryv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void saxpy_shmem ( float* y, float* x, float a, clock_t * timer_vals)
{
volatile __shared__ float sdata_x0 [COMPUTE_THREADS_PER_CTA];
volatile __shared__ float sdata_y0 [COMPUTE_THREADS_PER_CTA];
int tid = threadIdx.x ;
for (int i=0; i < NUM_ITERS; ++i) {
unsigned int idx = i * COMPUTE_... | code for sm_80
Function : _Z11saxpy_shmemPfS_fPl
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e220000002500 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void saxpy_shmem ( float* y, float* x, float a, clock_t * timer_vals)
{
volatile __shared__ float sdata_x0 [COMPUTE_THREADS_PER_CTA];
volatile __shared__ float sdata_y0 [COMPUTE_THREADS_PER_CTA];
int tid = threadIdx.x ;
for (int i=0; i < NUM_ITERS; ++i) {
unsigned int idx = i * COMPUTE_... | .file "tmpxft_000de176_00000000-6_saxpy_shmem.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void saxpy_shmem ( float* y, float* x, float a, clock_t * timer_vals)
{
volatile __shared__ float sdata_x0 [COMPUTE_THREADS_PER_CTA];
volatile __shared__ float sdata_y0 [COMPUTE_THREADS_PER_CTA];
int tid = threadIdx.x ;
for (int i=0; i < NUM_ITERS; ++i) {
unsigned int idx = i * COMPUTE_... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void saxpy_shmem ( float* y, float* x, float a, clock_t * timer_vals)
{
volatile __shared__ float sdata_x0 [COMPUTE_THREADS_PER_CTA];
volatile __shared__ float sdata_y0 [COMPUTE_THREADS_PER_CTA];
int tid = threadIdx.x ;
for (int i=0; i < NUM_ITERS; ++i) {
un... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void saxpy_shmem ( float* y, float* x, float a, clock_t * timer_vals)
{
volatile __shared__ float sdata_x0 [COMPUTE_THREADS_PER_CTA];
volatile __shared__ float sdata_y0 [COMPUTE_THREADS_PER_CTA];
int tid = threadIdx.x ;
for (int i=0; i < NUM_ITERS; ++i) {
un... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11saxpy_shmemPfS_fPl
.globl _Z11saxpy_shmemPfS_fPl
.p2align 8
.type _Z11saxpy_shmemPfS_fPl,@function
_Z11saxpy_shmemPfS_fPl:
v_lshlrev_b32_e32 v1, 2, v0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x10
s_mov_b64 s[... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void saxpy_shmem ( float* y, float* x, float a, clock_t * timer_vals)
{
volatile __shared__ float sdata_x0 [COMPUTE_THREADS_PER_CTA];
volatile __shared__ float sdata_y0 [COMPUTE_THREADS_PER_CTA];
int tid = threadIdx.x ;
for (int i=0; i < NUM_ITERS; ++i) {
un... | .text
.file "saxpy_shmem.hip"
.globl _Z26__device_stub__saxpy_shmemPfS_fPl # -- Begin function _Z26__device_stub__saxpy_shmemPfS_fPl
.p2align 4, 0x90
.type _Z26__device_stub__saxpy_shmemPfS_fPl,@function
_Z26__device_stub__saxpy_shmemPfS_fPl: # @_Z26__device_stub__saxpy_shmemPfS_fPl
.cfi_startproc
# %bb.0:
subq $120, ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11saxpy_shmemPfS_fPl
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e220000002500 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11saxpy_shmemPfS_fPl
.globl _Z11saxpy_shmemPfS_fPl
.p2align 8
.type _Z11saxpy_shmemPfS_fPl,@function
_Z11saxpy_shmemPfS_fPl:
v_lshlrev_b32_e32 v1, 2, v0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x10
s_mov_b64 s[... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000de176_00000000-6_saxpy_shmem.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "saxpy_shmem.hip"
.globl _Z26__device_stub__saxpy_shmemPfS_fPl # -- Begin function _Z26__device_stub__saxpy_shmemPfS_fPl
.p2align 4, 0x90
.type _Z26__device_stub__saxpy_shmemPfS_fPl,@function
_Z26__device_stub__saxpy_shmemPfS_fPl: # @_Z26__device_stub__saxpy_shmemPfS_fPl
.cfi_startproc
# %bb.0:
subq $120, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //this code taken from https://github.com/cCppProsto/cuda/blob/master/vs/lesson_2/lesson/kernel.cu
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <string.h>
#include <memory.h>
int getSPcores(cudaDeviceProp devProp)
{
int cores = 0;
int mp = devProp.multiProcessorCount;
swit... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //this code taken from https://github.com/cCppProsto/cuda/blob/master/vs/lesson_2/lesson/kernel.cu
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <string.h>
#include <memory.h>
int getSPcores(cudaDeviceProp devProp)
{
int cores = 0;
int mp = devProp.multiProcessorCount;
swit... | .file "tmpxft_000022a1_00000000-6_info.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //this code taken from https://github.com/cCppProsto/cuda/blob/master/vs/lesson_2/lesson/kernel.cu
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <string.h>
#include <memory.h>
int getSPcores(cudaDeviceProp devProp)
{
int cores = 0;
int mp = devProp.multiProcessorCount;
swit... | //this code taken from https://github.com/cCppProsto/cuda/blob/master/vs/lesson_2/lesson/kernel.cu
#include "hip/hip_runtime.h"
#include <stdio.h>
#include <string.h>
#include <memory.h>
int getSPcores(hipDeviceProp_t devProp)
{
int cores = 0;
int mp = devProp.multiProcessorCount;
switch (devProp.major)
{
case 2: // F... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //this code taken from https://github.com/cCppProsto/cuda/blob/master/vs/lesson_2/lesson/kernel.cu
#include "hip/hip_runtime.h"
#include <stdio.h>
#include <string.h>
#include <memory.h>
int getSPcores(hipDeviceProp_t devProp)
{
int cores = 0;
int mp = devProp.multiProcessorCount;
switch (devProp.major)
{
case 2: // F... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //this code taken from https://github.com/cCppProsto/cuda/blob/master/vs/lesson_2/lesson/kernel.cu
#include "hip/hip_runtime.h"
#include <stdio.h>
#include <string.h>
#include <memory.h>
int getSPcores(hipDeviceProp_t devProp)
{
int cores = 0;
int mp = devProp.multiProcessorCount;
switch (devProp.major)
{
case 2: // F... | .text
.file "info.hip"
.globl _Z10getSPcores20hipDeviceProp_tR0600 # -- Begin function _Z10getSPcores20hipDeviceProp_tR0600
.p2align 4, 0x90
.type _Z10getSPcores20hipDeviceProp_tR0600,@function
_Z10getSPcores20hipDeviceProp_tR0600: # @_Z10getSPcores20hipDeviceProp_tR0600
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cf... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000022a1_00000000-6_info.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "info.hip"
.globl _Z10getSPcores20hipDeviceProp_tR0600 # -- Begin function _Z10getSPcores20hipDeviceProp_tR0600
.p2align 4, 0x90
.type _Z10getSPcores20hipDeviceProp_tR0600,@function
_Z10getSPcores20hipDeviceProp_tR0600: # @_Z10getSPcores20hipDeviceProp_tR0600
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void get_iou_cuda_(int nInstance, int nProposal, int *proposals_idx, int *proposals_offset, long *instance_labels, int *instance_pointnum, float *proposals_iou){
for(int proposal_id = blockIdx.x; proposal_id < nProposal; proposal_id += gridDim.x){
int start = proposals_offset[proposal_i... | .file "tmpxft_000835e6_00000000-6_get_iou_cuda_.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void get_iou_cuda_(int nInstance, int nProposal, int *proposals_idx, int *proposals_offset, long *instance_labels, int *instance_pointnum, float *proposals_iou){
for(int proposal_id = blockIdx.x; proposal_id < nProposal; proposal_id += gridDim.x){
int start = proposals_offset[proposal_i... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void get_iou_cuda_(int nInstance, int nProposal, int *proposals_idx, int *proposals_offset, long *instance_labels, int *instance_pointnum, float *proposals_iou){
for(int proposal_id = blockIdx.x; proposal_id < nProposal; proposal_id += gridDim.x){
int start ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void get_iou_cuda_(int nInstance, int nProposal, int *proposals_idx, int *proposals_offset, long *instance_labels, int *instance_pointnum, float *proposals_iou){
for(int proposal_id = blockIdx.x; proposal_id < nProposal; proposal_id += gridDim.x){
int start ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13get_iou_cuda_iiPiS_PlS_Pf
.globl _Z13get_iou_cuda_iiPiS_PlS_Pf
.p2align 8
.type _Z13get_iou_cuda_iiPiS_PlS_Pf,@function
_Z13get_iou_cuda_iiPiS_PlS_Pf:
s_load_b32 s3, s[0:1], 0x4
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s3
s_cbranch_scc1 .LBB0_9
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void get_iou_cuda_(int nInstance, int nProposal, int *proposals_idx, int *proposals_offset, long *instance_labels, int *instance_pointnum, float *proposals_iou){
for(int proposal_id = blockIdx.x; proposal_id < nProposal; proposal_id += gridDim.x){
int start ... | .text
.file "get_iou_cuda_.hip"
.globl _Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf # -- Begin function _Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf
.p2align 4, 0x90
.type _Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf,@function
_Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf: # @_Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000835e6_00000000-6_get_iou_cuda_.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "get_iou_cuda_.hip"
.globl _Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf # -- Begin function _Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf
.p2align 4, 0x90
.type _Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf,@function
_Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf: # @_Z28__device_stub__get_iou_cuda_iiPiS_PlS_Pf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p2.cu -o assignment5-p2
#include <cmath>
#include <cstdint>
#include <iostream>
#include <sys/time.h>
#define THRESHOLD (0.000001)
#define SIZE1 4096
#define SIZE2 4097
#define ITER 100
using namespace std;
__global__ void kernel1(double* A) {
// SB: Write the first k... | code for sm_80
Function : _Z7kernel2Pd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p2.cu -o assignment5-p2
#include <cmath>
#include <cstdint>
#include <iostream>
#include <sys/time.h>
#define THRESHOLD (0.000001)
#define SIZE1 4096
#define SIZE2 4097
#define ITER 100
using namespace std;
__global__ void kernel1(double* A) {
// SB: Write the first k... | .file "tmpxft_00029ba3_00000000-6_template_p2.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3675:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cu... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p2.cu -o assignment5-p2
#include <cmath>
#include <cstdint>
#include <iostream>
#include <sys/time.h>
#define THRESHOLD (0.000001)
#define SIZE1 4096
#define SIZE2 4097
#define ITER 100
using namespace std;
__global__ void kernel1(double* A) {
// SB: Write the first k... | // Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p2.cu -o assignment5-p2
#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdint>
#include <iostream>
#include <sys/time.h>
#define THRESHOLD (0.000001)
#define SIZE1 4096
#define SIZE2 4097
#define ITER 100
using namespace std;
__global__ void kernel1(double* ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p2.cu -o assignment5-p2
#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdint>
#include <iostream>
#include <sys/time.h>
#define THRESHOLD (0.000001)
#define SIZE1 4096
#define SIZE2 4097
#define ITER 100
using namespace std;
__global__ void kernel1(double* ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernel1Pd
.globl _Z7kernel1Pd
.p2align 8
.type _Z7kernel1Pd,@function
_Z7kernel1Pd:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7kernel1Pd
.amdhsa_group_segment_fixed_size 0
.amdhsa_priv... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Compile: nvcc -arch=sm_61 -std=c++11 assignment5-p2.cu -o assignment5-p2
#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdint>
#include <iostream>
#include <sys/time.h>
#define THRESHOLD (0.000001)
#define SIZE1 4096
#define SIZE2 4097
#define ITER 100
using namespace std;
__global__ void kernel1(double* ... | .text
.file "template_p2.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__kernel1Pd # -- Begin function _Z22__device_stub__kernel1Pd
.p2align 4, 0x... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7kernel2Pd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xf... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernel1Pd
.globl _Z7kernel1Pd
.p2align 8
.type _Z7kernel1Pd,@function
_Z7kernel1Pd:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7kernel1Pd
.amdhsa_group_segment_fixed_size 0
.amdhsa_priv... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00029ba3_00000000-6_template_p2.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3675:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cu... | .text
.file "template_p2.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__kernel1Pd # -- Begin function _Z22__device_stub__kernel1Pd
.p2align 4, 0x... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <curand.h>
#include <curand_kernel.h>
#include <assert.h>
#define square(x) x*x
#include <float.h>
__device__ inline double atomicAddDouble(double *address, double val) {
unsigned long long int *address_as_ull = (unsigned long long int *)address;
unsigne... | .file "tmpxft_001407e1_00000000-6_kmeans_new.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2277:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <curand.h>
#include <curand_kernel.h>
#include <assert.h>
#define square(x) x*x
#include <float.h>
__device__ inline double atomicAddDouble(double *address, double val) {
unsigned long long int *address_as_ull = (unsigned long long int *)address;
unsigne... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <assert.h>
#define square(x) x*x
#include <float.h>
__device__ inline double atomicAddDouble(double *address, double val) {
unsigned long long int *address_as_u... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <assert.h>
#define square(x) x*x
#include <float.h>
__device__ inline double atomicAddDouble(double *address, double val) {
unsigned long long int *address_as_u... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19getClusterCentroidsiPdS_iPiS0_i
.globl _Z19getClusterCentroidsiPdS_iPiS0_i
.p2align 8
.type _Z19getClusterCentroidsiPdS_iPiS0_i,@function
_Z19getClusterCentroidsiPdS_iPiS0_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b32 s3, s[0:1], 0x0
s_waitc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <assert.h>
#define square(x) x*x
#include <float.h>
__device__ inline double atomicAddDouble(double *address, double val) {
unsigned long long int *address_as_u... | .text
.file "kmeans_new.hip"
.globl _Z34__device_stub__getClusterCentroidsiPdS_iPiS0_i # -- Begin function _Z34__device_stub__getClusterCentroidsiPdS_iPiS0_i
.p2align 4, 0x90
.type _Z34__device_stub__getClusterCentroidsiPdS_iPiS0_i,@function
_Z34__device_stub__getClusterCentroidsiPdS_iPiS0_i: # @_Z34__device_stub__getC... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kAddMultSign(float* a, float* b, unsigned int numEls, float mult) {
const unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numThreads = blockDim.x * gridDim.x;
for (unsigned int i = idx; i < numEls; i += numThreads) {
a[i] = a[i] + ((b[i] > 0) ? mult : (... | code for sm_80
Function : _Z12kAddMultSignPfS_jf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kAddMultSign(float* a, float* b, unsigned int numEls, float mult) {
const unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numThreads = blockDim.x * gridDim.x;
for (unsigned int i = idx; i < numEls; i += numThreads) {
a[i] = a[i] + ((b[i] > 0) ? mult : (... | .file "tmpxft_0014cb08_00000000-6_kAddMultSign.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kAddMultSign(float* a, float* b, unsigned int numEls, float mult) {
const unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numThreads = blockDim.x * gridDim.x;
for (unsigned int i = idx; i < numEls; i += numThreads) {
a[i] = a[i] + ((b[i] > 0) ? mult : (... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kAddMultSign(float* a, float* b, unsigned int numEls, float mult) {
const unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numThreads = blockDim.x * gridDim.x;
for (unsigned int i = idx; i < numEls; i += numThreads) {
a[i] = ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kAddMultSign(float* a, float* b, unsigned int numEls, float mult) {
const unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numThreads = blockDim.x * gridDim.x;
for (unsigned int i = idx; i < numEls; i += numThreads) {
a[i] = ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12kAddMultSignPfS_jf
.globl _Z12kAddMultSignPfS_jf
.p2align 8
.type _Z12kAddMultSignPfS_jf,@function
_Z12kAddMultSignPfS_jf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kAddMultSign(float* a, float* b, unsigned int numEls, float mult) {
const unsigned int idx = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numThreads = blockDim.x * gridDim.x;
for (unsigned int i = idx; i < numEls; i += numThreads) {
a[i] = ... | .text
.file "kAddMultSign.hip"
.globl _Z27__device_stub__kAddMultSignPfS_jf # -- Begin function _Z27__device_stub__kAddMultSignPfS_jf
.p2align 4, 0x90
.type _Z27__device_stub__kAddMultSignPfS_jf,@function
_Z27__device_stub__kAddMultSignPfS_jf: # @_Z27__device_stub__kAddMultSignPfS_jf
.cfi_startproc
# %bb.0:
subq $120,... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12kAddMultSignPfS_jf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12kAddMultSignPfS_jf
.globl _Z12kAddMultSignPfS_jf
.p2align 8
.type _Z12kAddMultSignPfS_jf,@function
_Z12kAddMultSignPfS_jf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014cb08_00000000-6_kAddMultSign.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "kAddMultSign.hip"
.globl _Z27__device_stub__kAddMultSignPfS_jf # -- Begin function _Z27__device_stub__kAddMultSignPfS_jf
.p2align 4, 0x90
.type _Z27__device_stub__kAddMultSignPfS_jf,@function
_Z27__device_stub__kAddMultSignPfS_jf: # @_Z27__device_stub__kAddMultSignPfS_jf
.cfi_startproc
# %bb.0:
subq $120,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__device__ float sigmoid(float x) {
return 1.0f / (1 + __expf(-x));
}
__global__ void sigmoidActivationForward(float* Z, float* A, int Z_x_dim, int Z_y_dim) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < Z_x_dim * Z_y_dim) {
A[index] = sigmoid(Z[index]);
}
} | code for sm_80
Function : _Z24sigmoidActivationForwardPfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ float sigmoid(float x) {
return 1.0f / (1 + __expf(-x));
}
__global__ void sigmoidActivationForward(float* Z, float* A, int Z_x_dim, int Z_y_dim) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < Z_x_dim * Z_y_dim) {
A[index] = sigmoid(Z[index]);
}
} | .file "tmpxft_00072c61_00000000-6_sigmoidActivationForward.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@P... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ float sigmoid(float x) {
return 1.0f / (1 + __expf(-x));
}
__global__ void sigmoidActivationForward(float* Z, float* A, int Z_x_dim, int Z_y_dim) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < Z_x_dim * Z_y_dim) {
A[index] = sigmoid(Z[index]);
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float sigmoid(float x) {
return 1.0f / (1 + __expf(-x));
}
__global__ void sigmoidActivationForward(float* Z, float* A, int Z_x_dim, int Z_y_dim) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < Z_x_dim * Z_y_dim) {
A[index] = sigmoid(Z[index... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float sigmoid(float x) {
return 1.0f / (1 + __expf(-x));
}
__global__ void sigmoidActivationForward(float* Z, float* A, int Z_x_dim, int Z_y_dim) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < Z_x_dim * Z_y_dim) {
A[index] = sigmoid(Z[index... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24sigmoidActivationForwardPfS_ii
.globl _Z24sigmoidActivationForwardPfS_ii
.p2align 8
.type _Z24sigmoidActivationForwardPfS_ii,@function
_Z24sigmoidActivationForwardPfS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_wai... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float sigmoid(float x) {
return 1.0f / (1 + __expf(-x));
}
__global__ void sigmoidActivationForward(float* Z, float* A, int Z_x_dim, int Z_y_dim) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < Z_x_dim * Z_y_dim) {
A[index] = sigmoid(Z[index... | .text
.file "sigmoidActivationForward.hip"
.globl _Z39__device_stub__sigmoidActivationForwardPfS_ii # -- Begin function _Z39__device_stub__sigmoidActivationForwardPfS_ii
.p2align 4, 0x90
.type _Z39__device_stub__sigmoidActivationForwardPfS_ii,@function
_Z39__device_stub__sigmoidActivationForwardPfS_ii: # @_Z39__device_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z24sigmoidActivationForwardPfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24sigmoidActivationForwardPfS_ii
.globl _Z24sigmoidActivationForwardPfS_ii
.p2align 8
.type _Z24sigmoidActivationForwardPfS_ii,@function
_Z24sigmoidActivationForwardPfS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_wai... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00072c61_00000000-6_sigmoidActivationForward.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@P... | .text
.file "sigmoidActivationForward.hip"
.globl _Z39__device_stub__sigmoidActivationForwardPfS_ii # -- Begin function _Z39__device_stub__sigmoidActivationForwardPfS_ii
.p2align 4, 0x90
.type _Z39__device_stub__sigmoidActivationForwardPfS_ii,@function
_Z39__device_stub__sigmoidActivationForwardPfS_ii: # @_Z39__device_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | ////12163291 °ÇöÁö ¾Ë°í¸®Áò¼³°è HW1
//#pragma warning(disable: 4819) //°æ°í ²ô±â
//
//#include<stdio.h>
//#include<iostream>
//#include <cuda_runtime.h>
//#include <cuda.h>
//#include <time.h> //for³¼ö
//#include <math.h>
//
//using namespace std;
//
//#define DATASIZE 1048576 //2048 131072 262144 1048576¿ø·¡ ¾ÈµÆ´Âµ... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | ////12163291 °ÇöÁö ¾Ë°í¸®Áò¼³°è HW1
//#pragma warning(disable: 4819) //°æ°í ²ô±â
//
//#include<stdio.h>
//#include<iostream>
//#include <cuda_runtime.h>
//#include <cuda.h>
//#include <time.h> //for³¼ö
//#include <math.h>
//
//using namespace std;
//
//#define DATASIZE 1048576 //2048 131072 262144 1048576¿ø·¡ ¾ÈµÆ´Âµ... | .file "tmpxft_000538e3_00000000-6_odd_even_merge.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | ////12163291 °ÇöÁö ¾Ë°í¸®Áò¼³°è HW1
//#pragma warning(disable: 4819) //°æ°í ²ô±â
//
//#include<stdio.h>
//#include<iostream>
//#include <cuda_runtime.h>
//#include <cuda.h>
//#include <time.h> //for³¼ö
//#include <math.h>
//
//using namespace std;
//
//#define DATASIZE 1048576 //2048 131072 262144 1048576¿ø·¡ ¾ÈµÆ´Âµ... | #include <hip/hip_runtime.h>
////12163291 °ÇöÁö ¾Ë°í¸®Áò¼³°è HW1
//#pragma warning(disable: 4819) //°æ°í ²ô±â
//
//#include<stdio.h>
//#include<iostream>
//#include <cuda_runtime.h>
//#include <cuda.h>
//#include <time.h> //for³¼ö
//#include <math.h>
//
//using namespace std;
//
//#define DATASIZE 1048576 //2048 1310... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
////12163291 °ÇöÁö ¾Ë°í¸®Áò¼³°è HW1
//#pragma warning(disable: 4819) //°æ°í ²ô±â
//
//#include<stdio.h>
//#include<iostream>
//#include <cuda_runtime.h>
//#include <cuda.h>
//#include <time.h> //for³¼ö
//#include <math.h>
//
//using namespace std;
//
//#define DATASIZE 1048576 //2048 1310... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
////12163291 °ÇöÁö ¾Ë°í¸®Áò¼³°è HW1
//#pragma warning(disable: 4819) //°æ°í ²ô±â
//
//#include<stdio.h>
//#include<iostream>
//#include <cuda_runtime.h>
//#include <cuda.h>
//#include <time.h> //for³¼ö
//#include <math.h>
//
//using namespace std;
//
//#define DATASIZE 1048576 //2048 1310... | .text
.file "odd_even_merge.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-p... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000538e3_00000000-6_odd_even_merge.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "odd_even_merge.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-p... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //
// main.cpp
//
//
// Created by Elijah Afanasiev on 25.09.2018.
//
//
// System includes
#include <assert.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
// CUDA runtime
#include <cuda.h>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#ifndef MAX
#define MAX(a, b) (a >... | code for sm_80
Function : _Z12vectorAddGPUPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //
// main.cpp
//
//
// Created by Elijah Afanasiev on 25.09.2018.
//
//
// System includes
#include <assert.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
// CUDA runtime
#include <cuda.h>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#ifndef MAX
#define MAX(a, b) (a >... | .file "tmpxft_00155490_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3774:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //
// main.cpp
//
//
// Created by Elijah Afanasiev on 25.09.2018.
//
//
// System includes
#include <assert.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
// CUDA runtime
#include <cuda.h>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#ifndef MAX
#define MAX(a, b) (a >... | //
// main.cpp
//
//
// Created by Elijah Afanasiev on 25.09.2018.
//
//
// System includes
#include <assert.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
// CUDA runtime
#include <hip/hip_runtime.h>
#ifndef MAX
#define MAX(a, b) (a > b ? a : b)
#endif
__global__ void vectorAddGPU(float... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //
// main.cpp
//
//
// Created by Elijah Afanasiev on 25.09.2018.
//
//
// System includes
#include <assert.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
// CUDA runtime
#include <hip/hip_runtime.h>
#ifndef MAX
#define MAX(a, b) (a > b ? a : b)
#endif
__global__ void vectorAddGPU(float... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vectorAddGPUPfS_S_i
.globl _Z12vectorAddGPUPfS_S_i
.p2align 8
.type _Z12vectorAddGPUPfS_S_i,@function
_Z12vectorAddGPUPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //
// main.cpp
//
//
// Created by Elijah Afanasiev on 25.09.2018.
//
//
// System includes
#include <assert.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
// CUDA runtime
#include <hip/hip_runtime.h>
#ifndef MAX
#define MAX(a, b) (a > b ? a : b)
#endif
__global__ void vectorAddGPU(float... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__vectorAddGPUPfS_S_i # -- Begin function _Z27__device_stub__vectorAddGPUPfS_S_i
.p2a... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12vectorAddGPUPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vectorAddGPUPfS_S_i
.globl _Z12vectorAddGPUPfS_S_i
.p2align 8
.type _Z12vectorAddGPUPfS_S_i,@function
_Z12vectorAddGPUPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00155490_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3774:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__vectorAddGPUPfS_S_i # -- Begin function _Z27__device_stub__vectorAddGPUPfS_S_i
.p2a... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void chol_kernel_optimized(float * U, int k, int stride) {
//With stride...
//Iterators
unsigned int j;
unsigned int num_rows = MATRIX_SIZE;
//This call acts as a single K iteration
//Each block does a single i iteration
//Need to consider offset,
int i = blockIdx.x + (k + 1);
//Each th... | code for sm_80
Function : _Z21chol_kernel_optimizedPfii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void chol_kernel_optimized(float * U, int k, int stride) {
//With stride...
//Iterators
unsigned int j;
unsigned int num_rows = MATRIX_SIZE;
//This call acts as a single K iteration
//Each block does a single i iteration
//Need to consider offset,
int i = blockIdx.x + (k + 1);
//Each th... | .file "tmpxft_001a4799_00000000-6_chol_kernel_optimized.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void chol_kernel_optimized(float * U, int k, int stride) {
//With stride...
//Iterators
unsigned int j;
unsigned int num_rows = MATRIX_SIZE;
//This call acts as a single K iteration
//Each block does a single i iteration
//Need to consider offset,
int i = blockIdx.x + (k + 1);
//Each th... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void chol_kernel_optimized(float * U, int k, int stride) {
//With stride...
//Iterators
unsigned int j;
unsigned int num_rows = MATRIX_SIZE;
//This call acts as a single K iteration
//Each block does a single i iteration
//Need to consider offset,
int i = bl... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void chol_kernel_optimized(float * U, int k, int stride) {
//With stride...
//Iterators
unsigned int j;
unsigned int num_rows = MATRIX_SIZE;
//This call acts as a single K iteration
//Each block does a single i iteration
//Need to consider offset,
int i = bl... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21chol_kernel_optimizedPfii
.globl _Z21chol_kernel_optimizedPfii
.p2align 8
.type _Z21chol_kernel_optimizedPfii,@function
_Z21chol_kernel_optimizedPfii:
s_load_b32 s8, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s15, s8
s_delay_alu instid0(SAL... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void chol_kernel_optimized(float * U, int k, int stride) {
//With stride...
//Iterators
unsigned int j;
unsigned int num_rows = MATRIX_SIZE;
//This call acts as a single K iteration
//Each block does a single i iteration
//Need to consider offset,
int i = bl... | .text
.file "chol_kernel_optimized.hip"
.globl _Z36__device_stub__chol_kernel_optimizedPfii # -- Begin function _Z36__device_stub__chol_kernel_optimizedPfii
.p2align 4, 0x90
.type _Z36__device_stub__chol_kernel_optimizedPfii,@function
_Z36__device_stub__chol_kernel_optimizedPfii: # @_Z36__device_stub__chol_kernel_optim... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21chol_kernel_optimizedPfii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21chol_kernel_optimizedPfii
.globl _Z21chol_kernel_optimizedPfii
.p2align 8
.type _Z21chol_kernel_optimizedPfii,@function
_Z21chol_kernel_optimizedPfii:
s_load_b32 s8, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s15, s8
s_delay_alu instid0(SAL... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a4799_00000000-6_chol_kernel_optimized.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... | .text
.file "chol_kernel_optimized.hip"
.globl _Z36__device_stub__chol_kernel_optimizedPfii # -- Begin function _Z36__device_stub__chol_kernel_optimizedPfii
.p2align 4, 0x90
.type _Z36__device_stub__chol_kernel_optimizedPfii,@function
_Z36__device_stub__chol_kernel_optimizedPfii: # @_Z36__device_stub__chol_kernel_optim... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdint.h>
#include <string>
#include <cmath>
#include <algorithm>
using namespace std;
#define CHECK(call)\
{\
const cudaError_t error = call;\
if (error != cudaSuccess)\
{\
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);\
fprintf(stderr, "code: %d, reason: %s\n", error,\
cudaGetErro... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <string>
#include <cmath>
#include <algorithm>
using namespace std;
#define CHECK(call)\
{\
const hipError_t error = call;\
if (error != hipSuccess)\
{\
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);\
fprintf(stderr, "code: %d, reason:... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <string>
#include <cmath>
#include <algorithm>
using namespace std;
#define CHECK(call)\
{\
const hipError_t error = call;\
if (error != hipSuccess)\
{\
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);\
fprintf(stderr, "code: %d, reason:... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21convertRgb2GrayKernelP15HIP_vector_typeIhLj3EEiiPh
.globl _Z21convertRgb2GrayKernelP15HIP_vector_typeIhLj3EEiiPh
.p2align 8
.type _Z21convertRgb2GrayKernelP15HIP_vector_typeIhLj3EEiiPh,@function
_Z21convertRgb2GrayKernelP15HIP_vector_typeIhLj3EEiiPh:
s_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
using namespace std;
// Derived class
class Rectangle
{
public:
Rectangle()
{
width = (int *)malloc(sizeof(int));
height = (int *)malloc(sizeof(int));
}
int getArea()
{
return (*width * *height);
}
int* width;
int* height;
};
// Base class
class Shape
{
public:
Shape()
{
rect = new Rectangle();
... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
using namespace std;
// Derived class
class Rectangle
{
public:
Rectangle()
{
width = (int *)malloc(sizeof(int));
height = (int *)malloc(sizeof(int));
}
int getArea()
{
return (*width * *height);
}
int* width;
int* height;
};
// Base class
class Shape
{
public:
Shape()
{
rect = new Rectangle();
... | .file "tmpxft_000255e8_00000000-6_class_test.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3679:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
using namespace std;
// Derived class
class Rectangle
{
public:
Rectangle()
{
width = (int *)malloc(sizeof(int));
height = (int *)malloc(sizeof(int));
}
int getArea()
{
return (*width * *height);
}
int* width;
int* height;
};
// Base class
class Shape
{
public:
Shape()
{
rect = new Rectangle();
... | #include <hip/hip_runtime.h>
#include <iostream>
using namespace std;
// Derived class
class Rectangle
{
public:
Rectangle()
{
width = (int *)malloc(sizeof(int));
height = (int *)malloc(sizeof(int));
}
int getArea()
{
return (*width * *height);
}
int* width;
int* height;
};
// Base class
class Shape
{
public:
Shape... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
using namespace std;
// Derived class
class Rectangle
{
public:
Rectangle()
{
width = (int *)malloc(sizeof(int));
height = (int *)malloc(sizeof(int));
}
int getArea()
{
return (*width * *height);
}
int* width;
int* height;
};
// Base class
class Shape
{
public:
Shape... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
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