system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
//==========================================================================================================
// A small snippet of code to solve equation of types Ax=B using Gaussian Elimniation
// Author - Anmol Gupta, Naved Ansari
// Course - EC513 - Introduction to Computer Architecture
// Bost... | code for sm_80
Function : _Z22gauss_elimination_cudaPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
//==========================================================================================================
// A small snippet of code to solve equation of types Ax=B using Gaussian Elimniation
// Author - Anmol Gupta, Naved Ansari
// Course - EC513 - Introduction to Computer Architecture
// Bost... | .file "tmpxft_0012f1bd_00000000-6_gauss_elimination_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
//==========================================================================================================
// A small snippet of code to solve equation of types Ax=B using Gaussian Elimniation
// Author - Anmol Gupta, Naved Ansari
// Course - EC513 - Introduction to Computer Architecture
// Bost... | #include <hip/hip_runtime.h>
#include "includes.h"
//==========================================================================================================
// A small snippet of code to solve equation of types Ax=B using Gaussian Elimniation
// Author - Anmol Gupta, Naved Ansari
// Course - EC513 - Introduction to ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//==========================================================================================================
// A small snippet of code to solve equation of types Ax=B using Gaussian Elimniation
// Author - Anmol Gupta, Naved Ansari
// Course - EC513 - Introduction to ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22gauss_elimination_cudaPfS_i
.globl _Z22gauss_elimination_cudaPfS_i
.p2align 8
.type _Z22gauss_elimination_cudaPfS_i,@function
_Z22gauss_elimination_cudaPfS_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x10
s_load_b64 s[4:5], s[0:1], 0x0
v_bfe_u32 v2, v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//==========================================================================================================
// A small snippet of code to solve equation of types Ax=B using Gaussian Elimniation
// Author - Anmol Gupta, Naved Ansari
// Course - EC513 - Introduction to ... | .text
.file "gauss_elimination_cuda.hip"
.globl _Z37__device_stub__gauss_elimination_cudaPfS_i # -- Begin function _Z37__device_stub__gauss_elimination_cudaPfS_i
.p2align 4, 0x90
.type _Z37__device_stub__gauss_elimination_cudaPfS_i,@function
_Z37__device_stub__gauss_elimination_cudaPfS_i: # @_Z37__device_stub__gauss_el... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z22gauss_elimination_cudaPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22gauss_elimination_cudaPfS_i
.globl _Z22gauss_elimination_cudaPfS_i
.p2align 8
.type _Z22gauss_elimination_cudaPfS_i,@function
_Z22gauss_elimination_cudaPfS_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x10
s_load_b64 s[4:5], s[0:1], 0x0
v_bfe_u32 v2, v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012f1bd_00000000-6_gauss_elimination_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... | .text
.file "gauss_elimination_cuda.hip"
.globl _Z37__device_stub__gauss_elimination_cudaPfS_i # -- Begin function _Z37__device_stub__gauss_elimination_cudaPfS_i
.p2align 4, 0x90
.type _Z37__device_stub__gauss_elimination_cudaPfS_i,@function
_Z37__device_stub__gauss_elimination_cudaPfS_i: # @_Z37__device_stub__gauss_el... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <assert.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define warp_size 32
#define Hwarp_size 16
#define N_points 33554432
#define A 0
#define B 15
void checkCUDAError(const char* msg);
__host__ __device__ inline double f(double x)
{
return exp(x)*sin(x);
}
__global__ void f... | .file "tmpxft_0002ea37_00000000-6_ref_simpson.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <assert.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define warp_size 32
#define Hwarp_size 16
#define N_points 33554432
#define A 0
#define B 15
void checkCUDAError(const char* msg);
__host__ __device__ inline double f(double x)
{
return exp(x)*sin(x);
}
__global__ void f... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define warp_size 32
#define Hwarp_size 16
#define N_points 33554432
#define A 0
#define B 15
void checkCUDAError(const char* msg);
__host__ __device__ inline double f(double x)
{
return exp(x... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define warp_size 32
#define Hwarp_size 16
#define N_points 33554432
#define A 0
#define B 15
void checkCUDAError(const char* msg);
__host__ __device__ inline double f(double x)
{
return exp(x... | .text
.file "ref_simpson.hip"
.globl _Z26__device_stub__fn_evalCalcPddd # -- Begin function _Z26__device_stub__fn_evalCalcPddd
.p2align 4, 0x90
.type _Z26__device_stub__fn_evalCalcPddd,@function
_Z26__device_stub__fn_evalCalcPddd: # @_Z26__device_stub__fn_evalCalcPddd
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_de... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002ea37_00000000-6_ref_simpson.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "ref_simpson.hip"
.globl _Z26__device_stub__fn_evalCalcPddd # -- Begin function _Z26__device_stub__fn_evalCalcPddd
.p2align 4, 0x90
.type _Z26__device_stub__fn_evalCalcPddd,@function
_Z26__device_stub__fn_evalCalcPddd: # @_Z26__device_stub__fn_evalCalcPddd
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_de... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <chrono>
#include <cstdint>
#include <fstream>
#include <iostream>
#include <stdio.h>
#include <vector>
using std::cin;
using std::cout;
/*************************************************************************************************************... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <chrono>
#include <cstdint>
#include <fstream>
#include <iostream>
#include <stdio.h>
#include <vector>
using std::cin;
using std::cout;
/*************************************************************************************************************... | #include "hip/hip_runtime.h"
#include <chrono>
#include <cstdint>
#include <fstream>
#include <iostream>
#include <stdio.h>
#include <vector>
using std::cin;
using std::cout;
/************************************************************************************************************************************************... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <chrono>
#include <cstdint>
#include <fstream>
#include <iostream>
#include <stdio.h>
#include <vector>
using std::cin;
using std::cout;
/************************************************************************************************************************************************... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define IX(i,j) ((i)+(N+2)*(j))
#define WARPSIZE 32
/*__global__ void inner_set_bnd(int N, int b, float* x)
{
int i = threadIdx.x + blockIdx.x*blockDim.x;
int j = threadIdx.y + blockIdx.y*blockDim.y;
device_set_bnd(N, b, x, i, j);
if(i <= N)
{
float x1 = x[IX(1, i)], x2 = x[IX(N, i)], x3 = x[IX(i, 1)], x4 = x[IX(i, N)]... | code for sm_80
Function : _Z12inner_advectiiPfS_S_S_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0x000e220000002600... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define IX(i,j) ((i)+(N+2)*(j))
#define WARPSIZE 32
/*__global__ void inner_set_bnd(int N, int b, float* x)
{
int i = threadIdx.x + blockIdx.x*blockDim.x;
int j = threadIdx.y + blockIdx.y*blockDim.y;
device_set_bnd(N, b, x, i, j);
if(i <= N)
{
float x1 = x[IX(1, i)], x2 = x[IX(N, i)], x3 = x[IX(i, 1)], x4 = x[IX(i, N)]... | .file "tmpxft_0004d4fc_00000000-6_set_bnd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define IX(i,j) ((i)+(N+2)*(j))
#define WARPSIZE 32
/*__global__ void inner_set_bnd(int N, int b, float* x)
{
int i = threadIdx.x + blockIdx.x*blockDim.x;
int j = threadIdx.y + blockIdx.y*blockDim.y;
device_set_bnd(N, b, x, i, j);
if(i <= N)
{
float x1 = x[IX(1, i)], x2 = x[IX(N, i)], x3 = x[IX(i, 1)], x4 = x[IX(i, N)]... | #include <hip/hip_runtime.h>
#define IX(i,j) ((i)+(N+2)*(j))
#define WARPSIZE 32
/*__global__ void inner_set_bnd(int N, int b, float* x)
{
int i = threadIdx.x + blockIdx.x*blockDim.x;
int j = threadIdx.y + blockIdx.y*blockDim.y;
device_set_bnd(N, b, x, i, j);
if(i <= N)
{
float x1 = x[IX(1, i)], x2 = x[IX(N, i)], x3 = ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define IX(i,j) ((i)+(N+2)*(j))
#define WARPSIZE 32
/*__global__ void inner_set_bnd(int N, int b, float* x)
{
int i = threadIdx.x + blockIdx.x*blockDim.x;
int j = threadIdx.y + blockIdx.y*blockDim.y;
device_set_bnd(N, b, x, i, j);
if(i <= N)
{
float x1 = x[IX(1, i)], x2 = x[IX(N, i)], x3 = ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13inner_set_bndiiPf
.globl _Z13inner_set_bndiiPf
.p2align 8
.type _Z13inner_set_bndiiPf,@function
_Z13inner_set_bndiiPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v3, 0x3ff, v0
v_bfe_u32 v0, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define IX(i,j) ((i)+(N+2)*(j))
#define WARPSIZE 32
/*__global__ void inner_set_bnd(int N, int b, float* x)
{
int i = threadIdx.x + blockIdx.x*blockDim.x;
int j = threadIdx.y + blockIdx.y*blockDim.y;
device_set_bnd(N, b, x, i, j);
if(i <= N)
{
float x1 = x[IX(1, i)], x2 = x[IX(N, i)], x3 = ... | .text
.file "set_bnd.hip"
.globl _Z28__device_stub__inner_set_bndiiPf # -- Begin function _Z28__device_stub__inner_set_bndiiPf
.p2align 4, 0x90
.type _Z28__device_stub__inner_set_bndiiPf,@function
_Z28__device_stub__inner_set_bndiiPf: # @_Z28__device_stub__inner_set_bndiiPf
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004d4fc_00000000-6_set_bnd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "set_bnd.hip"
.globl _Z28__device_stub__inner_set_bndiiPf # -- Begin function _Z28__device_stub__inner_set_bndiiPf
.p2align 4, 0x90
.type _Z28__device_stub__inner_set_bndiiPf,@function
_Z28__device_stub__inner_set_bndiiPf: # @_Z28__device_stub__inner_set_bndiiPf
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<bits/stdc++.h>
#include<cuda.h>
using namespace std;
#define CEIL(a,b) ((a-1)/b+1)
#define N 1024
__global__ void sum(float* d_a, float* d_b, float* d_c, int size)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index<size)
d_c[index]=d_a[index]+d_b[index];
}
bool verify(float a[], float b[], float c[]... | code for sm_80
Function : _Z3sumPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<bits/stdc++.h>
#include<cuda.h>
using namespace std;
#define CEIL(a,b) ((a-1)/b+1)
#define N 1024
__global__ void sum(float* d_a, float* d_b, float* d_c, int size)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index<size)
d_c[index]=d_a[index]+d_b[index];
}
bool verify(float a[], float b[], float c[]... | .file "tmpxft_00013c41_00000000-6_array_sum.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10863:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<bits/stdc++.h>
#include<cuda.h>
using namespace std;
#define CEIL(a,b) ((a-1)/b+1)
#define N 1024
__global__ void sum(float* d_a, float* d_b, float* d_c, int size)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index<size)
d_c[index]=d_a[index]+d_b[index];
}
bool verify(float a[], float b[], float c[]... | #include<bits/stdc++.h>
#include<hip/hip_runtime.h>
using namespace std;
#define CEIL(a,b) ((a-1)/b+1)
#define N 1024
__global__ void sum(float* d_a, float* d_b, float* d_c, int size)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index<size)
d_c[index]=d_a[index]+d_b[index];
}
bool verify(float a[], float b[]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<bits/stdc++.h>
#include<hip/hip_runtime.h>
using namespace std;
#define CEIL(a,b) ((a-1)/b+1)
#define N 1024
__global__ void sum(float* d_a, float* d_b, float* d_c, int size)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index<size)
d_c[index]=d_a[index]+d_b[index];
}
bool verify(float a[], float b[]... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3sumPfS_S_i
.globl _Z3sumPfS_S_i
.p2align 8
.type _Z3sumPfS_S_i,@function
_Z3sumPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu inst... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<bits/stdc++.h>
#include<hip/hip_runtime.h>
using namespace std;
#define CEIL(a,b) ((a-1)/b+1)
#define N 1024
__global__ void sum(float* d_a, float* d_b, float* d_c, int size)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index<size)
d_c[index]=d_a[index]+d_b[index];
}
bool verify(float a[], float b[]... | .text
.file "array_sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__sumPfS_S_i # -- Begin function _Z18__device_stub__sumPfS_S_i
.p2align 4, 0x9... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3sumPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3sumPfS_S_i
.globl _Z3sumPfS_S_i
.p2align 8
.type _Z3sumPfS_S_i,@function
_Z3sumPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu inst... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00013c41_00000000-6_array_sum.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10863:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "array_sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__sumPfS_S_i # -- Begin function _Z18__device_stub__sumPfS_S_i
.p2align 4, 0x9... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
============================================================================
Name : batched-matmul-cuda.cu
Author : salehjg
Version :
Copyright :
Description :
============================================================================
*/
// System includes
#include <stdio.h>
#include <assert.h>
#include <iostream... | .file "tmpxft_000cd86d_00000000-6_batch-matmul-cuda.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL61__device_stub__Z21kernel_batched_matmulILi6EEvPKfS1_PfiiiiiiiPKfS0_Pfiiiiiii, @function
_ZL61__device_stub__Z21kernel_batched_matmulILi6EEvPKfS1_PfiiiiiiiPKfS0_Pfiiiiiii:
.LFB3742:
.cfi_sta... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
============================================================================
Name : batched-matmul-cuda.cu
Author : salehjg
Version :
Copyright :
Description :
============================================================================
*/
// System includes
#include <stdio.h>
#include <assert.h>
#include <iostream... | /*
============================================================================
Name : batched-matmul-cuda.cu
Author : salehjg
Version :
Copyright :
Description :
============================================================================
*/
// System includes
#include <stdio.h>
#include <assert.h>
#include <iostream... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
============================================================================
Name : batched-matmul-cuda.cu
Author : salehjg
Version :
Copyright :
Description :
============================================================================
*/
// System includes
#include <stdio.h>
#include <assert.h>
#include <iostream... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._Z21kernel_batched_matmulILi6EEvPKfS1_Pfiiiiiii,"axG",@progbits,_Z21kernel_batched_matmulILi6EEvPKfS1_Pfiiiiiii,comdat
.protected _Z21kernel_batched_matmulILi6EEvPKfS1_Pfiiiiiii
.globl _Z21kernel_batched_matmulILi6EEvPKfS1_Pfiiiiiii
.p2align 8
.type _Z21... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void evovle_kernel_shared(int N, char *oldGen, char *newGen, int *allzeros, int *change)
{
// Global
int ix = (blockDim.x - 2) * blockIdx.x + threadIdx.x; //Different indexing as we declared more blocks (see SideGrid)
int iy = (blockDim.y - 2) * blockIdx.y + threadIdx.y;
int id = ix * (... | code for sm_80
Function : _Z20evovle_kernel_sharediPcS_PiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void evovle_kernel_shared(int N, char *oldGen, char *newGen, int *allzeros, int *change)
{
// Global
int ix = (blockDim.x - 2) * blockIdx.x + threadIdx.x; //Different indexing as we declared more blocks (see SideGrid)
int iy = (blockDim.y - 2) * blockIdx.y + threadIdx.y;
int id = ix * (... | .file "tmpxft_000d15d2_00000000-6_evovle_kernel_shared.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void evovle_kernel_shared(int N, char *oldGen, char *newGen, int *allzeros, int *change)
{
// Global
int ix = (blockDim.x - 2) * blockIdx.x + threadIdx.x; //Different indexing as we declared more blocks (see SideGrid)
int iy = (blockDim.y - 2) * blockIdx.y + threadIdx.y;
int id = ix * (... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void evovle_kernel_shared(int N, char *oldGen, char *newGen, int *allzeros, int *change)
{
// Global
int ix = (blockDim.x - 2) * blockIdx.x + threadIdx.x; //Different indexing as we declared more blocks (see SideGrid)
int iy = (blockDim.y - 2) * blockIdx.y +... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void evovle_kernel_shared(int N, char *oldGen, char *newGen, int *allzeros, int *change)
{
// Global
int ix = (blockDim.x - 2) * blockIdx.x + threadIdx.x; //Different indexing as we declared more blocks (see SideGrid)
int iy = (blockDim.y - 2) * blockIdx.y +... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20evovle_kernel_sharediPcS_PiS0_
.globl _Z20evovle_kernel_sharediPcS_PiS0_
.p2align 8
.type _Z20evovle_kernel_sharediPcS_PiS0_,@function
_Z20evovle_kernel_sharediPcS_PiS0_:
s_clause 0x2
s_load_b32 s6, s[0:1], 0x34
s_load_b32 s2, s[0:1], 0x0
s_load_b64... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void evovle_kernel_shared(int N, char *oldGen, char *newGen, int *allzeros, int *change)
{
// Global
int ix = (blockDim.x - 2) * blockIdx.x + threadIdx.x; //Different indexing as we declared more blocks (see SideGrid)
int iy = (blockDim.y - 2) * blockIdx.y +... | .text
.file "evovle_kernel_shared.hip"
.globl _Z35__device_stub__evovle_kernel_sharediPcS_PiS0_ # -- Begin function _Z35__device_stub__evovle_kernel_sharediPcS_PiS0_
.p2align 4, 0x90
.type _Z35__device_stub__evovle_kernel_sharediPcS_PiS0_,@function
_Z35__device_stub__evovle_kernel_sharediPcS_PiS0_: # @_Z35__device_stub... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20evovle_kernel_sharediPcS_PiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20evovle_kernel_sharediPcS_PiS0_
.globl _Z20evovle_kernel_sharediPcS_PiS0_
.p2align 8
.type _Z20evovle_kernel_sharediPcS_PiS0_,@function
_Z20evovle_kernel_sharediPcS_PiS0_:
s_clause 0x2
s_load_b32 s6, s[0:1], 0x34
s_load_b32 s2, s[0:1], 0x0
s_load_b64... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d15d2_00000000-6_evovle_kernel_shared.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "evovle_kernel_shared.hip"
.globl _Z35__device_stub__evovle_kernel_sharediPcS_PiS0_ # -- Begin function _Z35__device_stub__evovle_kernel_sharediPcS_PiS0_
.p2align 4, 0x90
.type _Z35__device_stub__evovle_kernel_sharediPcS_PiS0_,@function
_Z35__device_stub__evovle_kernel_sharediPcS_PiS0_: # @_Z35__device_stub... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void elementwise_1D_1D_sqrt_grad(float* in_x, float* in_d, float* out_x, float * out_d, int size) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = gridDim.x * blockDim.x;
for (; tid < size; tid += stride)
if (tid < size) in_d[tid] += out_d[tid] / out_x[tid] / 2;
} | code for sm_80
Function : _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x00000000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void elementwise_1D_1D_sqrt_grad(float* in_x, float* in_d, float* out_x, float * out_d, int size) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = gridDim.x * blockDim.x;
for (; tid < size; tid += stride)
if (tid < size) in_d[tid] += out_d[tid] / out_x[tid] / 2;
} | .file "tmpxft_00164ad4_00000000-6_elementwise_1D_1D_sqrt_grad.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinar... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void elementwise_1D_1D_sqrt_grad(float* in_x, float* in_d, float* out_x, float * out_d, int size) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = gridDim.x * blockDim.x;
for (; tid < size; tid += stride)
if (tid < size) in_d[tid] += out_d[tid] / out_x[tid] / 2;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void elementwise_1D_1D_sqrt_grad(float* in_x, float* in_d, float* out_x, float * out_d, int size) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = gridDim.x * blockDim.x;
for (; tid < size; tid += stride)
if (tid < size) in_d[tid] += out_d[tid... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void elementwise_1D_1D_sqrt_grad(float* in_x, float* in_d, float* out_x, float * out_d, int size) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = gridDim.x * blockDim.x;
for (; tid < size; tid += stride)
if (tid < size) in_d[tid] += out_d[tid... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i
.globl _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i
.p2align 8
.type _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i,@function
_Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b32 s12, s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void elementwise_1D_1D_sqrt_grad(float* in_x, float* in_d, float* out_x, float * out_d, int size) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = gridDim.x * blockDim.x;
for (; tid < size; tid += stride)
if (tid < size) in_d[tid] += out_d[tid... | .text
.file "elementwise_1D_1D_sqrt_grad.hip"
.globl _Z42__device_stub__elementwise_1D_1D_sqrt_gradPfS_S_S_i # -- Begin function _Z42__device_stub__elementwise_1D_1D_sqrt_gradPfS_S_S_i
.p2align 4, 0x90
.type _Z42__device_stub__elementwise_1D_1D_sqrt_gradPfS_S_S_i,@function
_Z42__device_stub__elementwise_1D_1D_sqrt_grad... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x00000000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i
.globl _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i
.p2align 8
.type _Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i,@function
_Z27elementwise_1D_1D_sqrt_gradPfS_S_S_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b32 s12, s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00164ad4_00000000-6_elementwise_1D_1D_sqrt_grad.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinar... | .text
.file "elementwise_1D_1D_sqrt_grad.hip"
.globl _Z42__device_stub__elementwise_1D_1D_sqrt_gradPfS_S_S_i # -- Begin function _Z42__device_stub__elementwise_1D_1D_sqrt_gradPfS_S_S_i
.p2align 4, 0x90
.type _Z42__device_stub__elementwise_1D_1D_sqrt_gradPfS_S_S_i,@function
_Z42__device_stub__elementwise_1D_1D_sqrt_grad... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__
void addExternalForces(const float dt,
const float2 force,
const float * d_levelset,
const float * d_velIn_x,
const float * d_velIn_y,
float * d_velOut_x,
float * d_velOut_y)
{
// Get Index
// Notes on indexing:
int index = blockDim.x* (blockIdx.x + blockIdx.y*gridDim.x) +
threadIdx.y*blockDim.x + threadIdx.... | code for sm_80
Function : _Z17addExternalForcesf6float2PKfS1_S1_PfS2_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__
void addExternalForces(const float dt,
const float2 force,
const float * d_levelset,
const float * d_velIn_x,
const float * d_velIn_y,
float * d_velOut_x,
float * d_velOut_y)
{
// Get Index
// Notes on indexing:
int index = blockDim.x* (blockIdx.x + blockIdx.y*gridDim.x) +
threadIdx.y*blockDim.x + threadIdx.... | .file "tmpxft_0019fc1e_00000000-6_addExternalForces.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__
void addExternalForces(const float dt,
const float2 force,
const float * d_levelset,
const float * d_velIn_x,
const float * d_velIn_y,
float * d_velOut_x,
float * d_velOut_y)
{
// Get Index
// Notes on indexing:
int index = blockDim.x* (blockIdx.x + blockIdx.y*gridDim.x) +
threadIdx.y*blockDim.x + threadIdx.... | #include <hip/hip_runtime.h>
__global__
void addExternalForces(const float dt,
const float2 force,
const float * d_levelset,
const float * d_velIn_x,
const float * d_velIn_y,
float * d_velOut_x,
float * d_velOut_y)
{
// Get Index
// Notes on indexing:
int index = blockDim.x* (blockIdx.x + blockIdx.y*gridDim.x) +
thread... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__
void addExternalForces(const float dt,
const float2 force,
const float * d_levelset,
const float * d_velIn_x,
const float * d_velIn_y,
float * d_velOut_x,
float * d_velOut_y)
{
// Get Index
// Notes on indexing:
int index = blockDim.x* (blockIdx.x + blockIdx.y*gridDim.x) +
thread... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_
.globl _Z17addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_
.p2align 8
.type _Z17addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_,@function
_Z17addExternalForcesf15HIP_vector_typeIf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__
void addExternalForces(const float dt,
const float2 force,
const float * d_levelset,
const float * d_velIn_x,
const float * d_velIn_y,
float * d_velOut_x,
float * d_velOut_y)
{
// Get Index
// Notes on indexing:
int index = blockDim.x* (blockIdx.x + blockIdx.y*gridDim.x) +
thread... | .text
.file "addExternalForces.hip"
.globl _Z32__device_stub__addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_ # -- Begin function _Z32__device_stub__addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_
.p2align 4, 0x90
.type _Z32__device_stub__addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_,@funct... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17addExternalForcesf6float2PKfS1_S1_PfS2_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_
.globl _Z17addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_
.p2align 8
.type _Z17addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_,@function
_Z17addExternalForcesf15HIP_vector_typeIf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019fc1e_00000000-6_addExternalForces.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... | .text
.file "addExternalForces.hip"
.globl _Z32__device_stub__addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_ # -- Begin function _Z32__device_stub__addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_
.p2align 4, 0x90
.type _Z32__device_stub__addExternalForcesf15HIP_vector_typeIfLj2EEPKfS2_S2_PfS3_,@funct... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <chrono>
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
// cudaGetErrorString is an api that will pop out an error to user screen else all errors in gpu are s... | code for sm_80
Function : _Z20polynomial_expansionPfiiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <chrono>
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
// cudaGetErrorString is an api that will pop out an error to user screen else all errors in gpu are s... | .file "tmpxft_00023b2a_00000000-6_polynomial_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3780:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <chrono>
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
// cudaGetErrorString is an api that will pop out an error to user screen else all errors in gpu are s... | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
// cudaGetErrorString is an api that will pop out an error to user screen e... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
// cudaGetErrorString is an api that will pop out an error to user screen e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20polynomial_expansionPfiiS_
.globl _Z20polynomial_expansionPfiiS_
.p2align 8
.type _Z20polynomial_expansionPfiiS_,@function
_Z20polynomial_expansionPfiiS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0xc
s_waitcnt lgkmcnt(0)
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
// cudaGetErrorString is an api that will pop out an error to user screen e... | .text
.file "polynomial_gpu.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z35__device_stub__polynomial_expansionPfiiS_ # -- Begin function _Z35__device_stub__polynom... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20polynomial_expansionPfiiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20polynomial_expansionPfiiS_
.globl _Z20polynomial_expansionPfiiS_
.p2align 8
.type _Z20polynomial_expansionPfiiS_,@function
_Z20polynomial_expansionPfiiS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0xc
s_waitcnt lgkmcnt(0)
s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00023b2a_00000000-6_polynomial_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3780:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... | .text
.file "polynomial_gpu.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z35__device_stub__polynomial_expansionPfiiS_ # -- Begin function _Z35__device_stub__polynom... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kMultTransFast(float* a, float* b, float* dest, unsigned int width, unsigned int height, unsigned int bJumpWidth) {
const unsigned int idxY = blockIdx.y * blockDim.y + threadIdx.y;
const unsigned int idxX = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int idx = idxY * widt... | code for sm_80
Function : _Z14kMultTransFastPfS_S_jjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0x000e220000002600... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kMultTransFast(float* a, float* b, float* dest, unsigned int width, unsigned int height, unsigned int bJumpWidth) {
const unsigned int idxY = blockIdx.y * blockDim.y + threadIdx.y;
const unsigned int idxX = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int idx = idxY * widt... | .file "tmpxft_00190804_00000000-6_kMultTransFast.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kMultTransFast(float* a, float* b, float* dest, unsigned int width, unsigned int height, unsigned int bJumpWidth) {
const unsigned int idxY = blockIdx.y * blockDim.y + threadIdx.y;
const unsigned int idxX = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int idx = idxY * widt... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kMultTransFast(float* a, float* b, float* dest, unsigned int width, unsigned int height, unsigned int bJumpWidth) {
const unsigned int idxY = blockIdx.y * blockDim.y + threadIdx.y;
const unsigned int idxX = blockIdx.x * blockDim.x + threadIdx.x;
const u... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kMultTransFast(float* a, float* b, float* dest, unsigned int width, unsigned int height, unsigned int bJumpWidth) {
const unsigned int idxY = blockIdx.y * blockDim.y + threadIdx.y;
const unsigned int idxX = blockIdx.x * blockDim.x + threadIdx.x;
const u... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14kMultTransFastPfS_S_jjj
.globl _Z14kMultTransFastPfS_S_jjj
.p2align 8
.type _Z14kMultTransFastPfS_S_jjj,@function
_Z14kMultTransFastPfS_S_jjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v4, v0, 10, 10
v_and... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kMultTransFast(float* a, float* b, float* dest, unsigned int width, unsigned int height, unsigned int bJumpWidth) {
const unsigned int idxY = blockIdx.y * blockDim.y + threadIdx.y;
const unsigned int idxX = blockIdx.x * blockDim.x + threadIdx.x;
const u... | .text
.file "kMultTransFast.hip"
.globl _Z29__device_stub__kMultTransFastPfS_S_jjj # -- Begin function _Z29__device_stub__kMultTransFastPfS_S_jjj
.p2align 4, 0x90
.type _Z29__device_stub__kMultTransFastPfS_S_jjj,@function
_Z29__device_stub__kMultTransFastPfS_S_jjj: # @_Z29__device_stub__kMultTransFastPfS_S_jjj
.cfi_sta... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14kMultTransFastPfS_S_jjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0x000e220000002600... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14kMultTransFastPfS_S_jjj
.globl _Z14kMultTransFastPfS_S_jjj
.p2align 8
.type _Z14kMultTransFastPfS_S_jjj,@function
_Z14kMultTransFastPfS_S_jjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v4, v0, 10, 10
v_and... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00190804_00000000-6_kMultTransFast.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "kMultTransFast.hip"
.globl _Z29__device_stub__kMultTransFastPfS_S_jjj # -- Begin function _Z29__device_stub__kMultTransFastPfS_S_jjj
.p2align 4, 0x90
.type _Z29__device_stub__kMultTransFastPfS_S_jjj,@function
_Z29__device_stub__kMultTransFastPfS_S_jjj: # @_Z29__device_stub__kMultTransFastPfS_S_jjj
.cfi_sta... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define TIME 5.
#define TIME_STEP .1
#define STEP 1.
#define K TIME_STEP / SQUARE(STEP)
#define SQUARE(x) (x * x)
#define HANDLE_ERROR(err) (HandleError(err, __FILE__, __LINE__))
__global__ void Kernel(double * device, const uint size)
{
int i = threadIdx.x + blockIdx.x * blockDim.x;
if (i == 0) {... | code for sm_80
Function : _Z6KernelPdj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e2200000025... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define TIME 5.
#define TIME_STEP .1
#define STEP 1.
#define K TIME_STEP / SQUARE(STEP)
#define SQUARE(x) (x * x)
#define HANDLE_ERROR(err) (HandleError(err, __FILE__, __LINE__))
__global__ void Kernel(double * device, const uint size)
{
int i = threadIdx.x + blockIdx.x * blockDim.x;
if (i == 0) {... | .file "tmpxft_000aece0_00000000-6_Kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define TIME 5.
#define TIME_STEP .1
#define STEP 1.
#define K TIME_STEP / SQUARE(STEP)
#define SQUARE(x) (x * x)
#define HANDLE_ERROR(err) (HandleError(err, __FILE__, __LINE__))
__global__ void Kernel(double * device, const uint size)
{
int i = threadIdx.x + blockIdx.x * blockDim.x;
if (i == 0) {... | #include <hip/hip_runtime.h>
#include "includes.h"
#define TIME 5.
#define TIME_STEP .1
#define STEP 1.
#define K TIME_STEP / SQUARE(STEP)
#define SQUARE(x) (x * x)
#define HANDLE_ERROR(err) (HandleError(err, __FILE__, __LINE__))
__global__ void Kernel(double * device, const uint size)
{
int i = threadIdx.x + blockIdx.... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define TIME 5.
#define TIME_STEP .1
#define STEP 1.
#define K TIME_STEP / SQUARE(STEP)
#define SQUARE(x) (x * x)
#define HANDLE_ERROR(err) (HandleError(err, __FILE__, __LINE__))
__global__ void Kernel(double * device, const uint size)
{
int i = threadIdx.x + blockIdx.... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6KernelPdj
.globl _Z6KernelPdj
.p2align 8
.type _Z6KernelPdj,@function
_Z6KernelPdj:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu ins... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define TIME 5.
#define TIME_STEP .1
#define STEP 1.
#define K TIME_STEP / SQUARE(STEP)
#define SQUARE(x) (x * x)
#define HANDLE_ERROR(err) (HandleError(err, __FILE__, __LINE__))
__global__ void Kernel(double * device, const uint size)
{
int i = threadIdx.x + blockIdx.... | .text
.file "Kernel.hip"
.globl _Z21__device_stub__KernelPdj # -- Begin function _Z21__device_stub__KernelPdj
.p2align 4, 0x90
.type _Z21__device_stub__KernelPdj,@function
_Z21__device_stub__KernelPdj: # @_Z21__device_stub__KernelPdj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6KernelPdj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e2200000025... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6KernelPdj
.globl _Z6KernelPdj
.p2align 8
.type _Z6KernelPdj,@function
_Z6KernelPdj:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu ins... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000aece0_00000000-6_Kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "Kernel.hip"
.globl _Z21__device_stub__KernelPdj # -- Begin function _Z21__device_stub__KernelPdj
.p2align 4, 0x90
.type _Z21__device_stub__KernelPdj,@function
_Z21__device_stub__KernelPdj: # @_Z21__device_stub__KernelPdj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
void helloCPU()
{
printf("Hello from the CPU.\n");
}
/*
* The addition of `__global__` signifies that this function
* should be launced on the GPU.
*/
__global__ void helloGPU()
{
printf("Hello from the GPU.\n");
}
int main()
{
helloCPU();
/*
* Add an execution configuration with the <<<...>>> syntax... | code for sm_80
Function : _Z8helloGPUv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe20000000f00 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
void helloCPU()
{
printf("Hello from the CPU.\n");
}
/*
* The addition of `__global__` signifies that this function
* should be launced on the GPU.
*/
__global__ void helloGPU()
{
printf("Hello from the GPU.\n");
}
int main()
{
helloCPU();
/*
* Add an execution configuration with the <<<...>>> syntax... | .file "tmpxft_0010ac91_00000000-6_hello-gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
void helloCPU()
{
printf("Hello from the CPU.\n");
}
/*
* The addition of `__global__` signifies that this function
* should be launced on the GPU.
*/
__global__ void helloGPU()
{
printf("Hello from the GPU.\n");
}
int main()
{
helloCPU();
/*
* Add an execution configuration with the <<<...>>> syntax... | #include <hip/hip_runtime.h>
#include <stdio.h>
void helloCPU()
{
printf("Hello from the CPU.\n");
}
/*
* The addition of `__global__` signifies that this function
* should be launced on the GPU.
*/
__global__ void helloGPU()
{
printf("Hello from the GPU.\n");
}
int main()
{
helloCPU();
/*
* Add an execution configurat... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
void helloCPU()
{
printf("Hello from the CPU.\n");
}
/*
* The addition of `__global__` signifies that this function
* should be launced on the GPU.
*/
__global__ void helloGPU()
{
printf("Hello from the GPU.\n");
}
int main()
{
helloCPU();
/*
* Add an execution configurat... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8helloGPUv
.globl _Z8helloGPUv
.p2align 8
.type _Z8helloGPUv,@function
_Z8helloGPUv:
s_load_b64 s[2:3], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v20, -1, 0
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
void helloCPU()
{
printf("Hello from the CPU.\n");
}
/*
* The addition of `__global__` signifies that this function
* should be launced on the GPU.
*/
__global__ void helloGPU()
{
printf("Hello from the GPU.\n");
}
int main()
{
helloCPU();
/*
* Add an execution configurat... | .text
.file "hello-gpu.hip"
.globl _Z8helloCPUv # -- Begin function _Z8helloCPUv
.p2align 4, 0x90
.type _Z8helloCPUv,@function
_Z8helloCPUv: # @_Z8helloCPUv
.cfi_startproc
# %bb.0:
movl $.Lstr, %edi
jmp puts@PLT # TAILCALL
.Lfunc_end0:
.size _Z8helloCP... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8helloGPUv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe20000000f00 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8helloGPUv
.globl _Z8helloGPUv
.p2align 8
.type _Z8helloGPUv,@function
_Z8helloGPUv:
s_load_b64 s[2:3], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v20, -1, 0
v_mov_b32_e32 v6, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010ac91_00000000-6_hello-gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "hello-gpu.hip"
.globl _Z8helloCPUv # -- Begin function _Z8helloCPUv
.p2align 4, 0x90
.type _Z8helloCPUv,@function
_Z8helloCPUv: # @_Z8helloCPUv
.cfi_startproc
# %bb.0:
movl $.Lstr, %edi
jmp puts@PLT # TAILCALL
.Lfunc_end0:
.size _Z8helloCP... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__device__ float machine_eps_flt() {
typedef union {
int i32;
float f32;
} flt_32;
flt_32 s;
s.f32 = 1.;
s.i32++;
return (s.f32 - 1.);
}
__device__ double machine_eps_dbl() {
typedef union {
long long i64;
double d64;
} dbl_64;
dbl_64 s;
s.d64 = 1.;
s.i64++;
return (s.d64 - 1.);
}
__global__ void ... | code for sm_80
Function : _Z11calc_constsPfPd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e2... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ float machine_eps_flt() {
typedef union {
int i32;
float f32;
} flt_32;
flt_32 s;
s.f32 = 1.;
s.i32++;
return (s.f32 - 1.);
}
__device__ double machine_eps_dbl() {
typedef union {
long long i64;
double d64;
} dbl_64;
dbl_64 s;
s.d64 = 1.;
s.i64++;
return (s.d64 - 1.);
}
__global__ void ... | .file "tmpxft_001a2279_00000000-6_calc_consts.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ float machine_eps_flt() {
typedef union {
int i32;
float f32;
} flt_32;
flt_32 s;
s.f32 = 1.;
s.i32++;
return (s.f32 - 1.);
}
__device__ double machine_eps_dbl() {
typedef union {
long long i64;
double d64;
} dbl_64;
dbl_64 s;
s.d64 = 1.;
s.i64++;
return (s.d64 - 1.);
}
__global__ void ... | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float machine_eps_flt() {
typedef union {
int i32;
float f32;
} flt_32;
flt_32 s;
s.f32 = 1.;
s.i32++;
return (s.f32 - 1.);
}
__device__ double machine_eps_dbl() {
typedef union {
long long i64;
double d64;
} dbl_64;
dbl_64 s;
s.d64 = 1.;
s.i64++;
return (s.... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float machine_eps_flt() {
typedef union {
int i32;
float f32;
} flt_32;
flt_32 s;
s.f32 = 1.;
s.i32++;
return (s.f32 - 1.);
}
__device__ double machine_eps_dbl() {
typedef union {
long long i64;
double d64;
} dbl_64;
dbl_64 s;
s.d64 = 1.;
s.i64++;
return (s.... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11calc_constsPfPd
.globl _Z11calc_constsPfPd
.p2align 8
.type _Z11calc_constsPfPd,@function
_Z11calc_constsPfPd:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float machine_eps_flt() {
typedef union {
int i32;
float f32;
} flt_32;
flt_32 s;
s.f32 = 1.;
s.i32++;
return (s.f32 - 1.);
}
__device__ double machine_eps_dbl() {
typedef union {
long long i64;
double d64;
} dbl_64;
dbl_64 s;
s.d64 = 1.;
s.i64++;
return (s.... | .text
.file "calc_consts.hip"
.globl _Z26__device_stub__calc_constsPfPd # -- Begin function _Z26__device_stub__calc_constsPfPd
.p2align 4, 0x90
.type _Z26__device_stub__calc_constsPfPd,@function
_Z26__device_stub__calc_constsPfPd: # @_Z26__device_stub__calc_constsPfPd
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11calc_constsPfPd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e2... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11calc_constsPfPd
.globl _Z11calc_constsPfPd
.p2align 8
.type _Z11calc_constsPfPd,@function
_Z11calc_constsPfPd:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a2279_00000000-6_calc_consts.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "calc_consts.hip"
.globl _Z26__device_stub__calc_constsPfPd # -- Begin function _Z26__device_stub__calc_constsPfPd
.p2align 4, 0x90
.type _Z26__device_stub__calc_constsPfPd,@function
_Z26__device_stub__calc_constsPfPd: # @_Z26__device_stub__calc_constsPfPd
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
//
// kernel code
//
__global__ void my_first_kernel() {
printf("Hello from block %d, thread %d\n", blockIdx.x, threadIdx.x);
}
//
// host code
//
int main(int argc, char **argv) {
// set number of blocks, and threads per block
int nblocks = 4, nthreads = 8;
// lanuch the kernel
my_first_kernel<<<... | code for sm_80
Function : _Z15my_first_kernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e2200... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
//
// kernel code
//
__global__ void my_first_kernel() {
printf("Hello from block %d, thread %d\n", blockIdx.x, threadIdx.x);
}
//
// host code
//
int main(int argc, char **argv) {
// set number of blocks, and threads per block
int nblocks = 4, nthreads = 8;
// lanuch the kernel
my_first_kernel<<<... | .file "tmpxft_0006d50c_00000000-6_prac1a.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
//
// kernel code
//
__global__ void my_first_kernel() {
printf("Hello from block %d, thread %d\n", blockIdx.x, threadIdx.x);
}
//
// host code
//
int main(int argc, char **argv) {
// set number of blocks, and threads per block
int nblocks = 4, nthreads = 8;
// lanuch the kernel
my_first_kernel<<<... | #include <hip/hip_runtime.h>
#include <stdio.h>
//
// kernel code
//
__global__ void my_first_kernel() {
printf("Hello from block %d, thread %d\n", blockIdx.x, threadIdx.x);
}
//
// host code
//
int main(int argc, char **argv) {
// set number of blocks, and threads per block
int nblocks = 4, nthreads = 8;
// lanuch ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
//
// kernel code
//
__global__ void my_first_kernel() {
printf("Hello from block %d, thread %d\n", blockIdx.x, threadIdx.x);
}
//
// host code
//
int main(int argc, char **argv) {
// set number of blocks, and threads per block
int nblocks = 4, nthreads = 8;
// lanuch ... | .text
.file "prac1a.hip"
.globl _Z30__device_stub__my_first_kernelv # -- Begin function _Z30__device_stub__my_first_kernelv
.p2align 4, 0x90
.type _Z30__device_stub__my_first_kernelv,@function
_Z30__device_stub__my_first_kernelv: # @_Z30__device_stub__my_first_kernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006d50c_00000000-6_prac1a.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "prac1a.hip"
.globl _Z30__device_stub__my_first_kernelv # -- Begin function _Z30__device_stub__my_first_kernelv
.p2align 4, 0x90
.type _Z30__device_stub__my_first_kernelv,@function
_Z30__device_stub__my_first_kernelv: # @_Z30__device_stub__my_first_kernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* This is a automatically generated test. Do not modify */
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,int var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float var_12,float var_13,float var_1... | .file "tmpxft_000a95a6_00000000-6_test.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* This is a automatically generated test. Do not modify */
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,int var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float var_12,float var_13,float var_1... | /* This is a automatically generated test. Do not modify */
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,int var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float va... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* This is a automatically generated test. Do not modify */
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,int var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float va... | .text
.file "test.hip"
.globl _Z22__device_stub__computefiifffffffffffffffffff # -- Begin function _Z22__device_stub__computefiifffffffffffffffffff
.p2align 4, 0x90
.type _Z22__device_stub__computefiifffffffffffffffffff,@function
_Z22__device_stub__computefiifffffffffffffffffff: # @_Z22__device_stub__computefiiffffffff... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a95a6_00000000-6_test.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "test.hip"
.globl _Z22__device_stub__computefiifffffffffffffffffff # -- Begin function _Z22__device_stub__computefiifffffffffffffffffff
.p2align 4, 0x90
.type _Z22__device_stub__computefiifffffffffffffffffff,@function
_Z22__device_stub__computefiifffffffffffffffffff: # @_Z22__device_stub__computefiiffffffff... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /* Teste la peformance de rsqrt sur un grand nombre de valeurs aléatoires (version GPU)
* À compiler avec `nvcc perf_gpu.cu -o test -O3` (requière CUDA!)
*/
#include <cmath>
#include <chrono>
#include <iostream>
#include <cuda.h>
#define N_FLOAT 100000000
#define MAX_FLOAT 1000
__global__ void rsqrt_vec(float* vec_sour... | code for sm_80
Function : _Z9rsqrt_vecPfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* Teste la peformance de rsqrt sur un grand nombre de valeurs aléatoires (version GPU)
* À compiler avec `nvcc perf_gpu.cu -o test -O3` (requière CUDA!)
*/
#include <cmath>
#include <chrono>
#include <iostream>
#include <cuda.h>
#define N_FLOAT 100000000
#define MAX_FLOAT 1000
__global__ void rsqrt_vec(float* vec_sour... | .file "tmpxft_0004b11c_00000000-6_perf_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3771:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaU... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* Teste la peformance de rsqrt sur un grand nombre de valeurs aléatoires (version GPU)
* À compiler avec `nvcc perf_gpu.cu -o test -O3` (requière CUDA!)
*/
#include <cmath>
#include <chrono>
#include <iostream>
#include <cuda.h>
#define N_FLOAT 100000000
#define MAX_FLOAT 1000
__global__ void rsqrt_vec(float* vec_sour... | /* Teste la peformance de rsqrt sur un grand nombre de valeurs aléatoires (version GPU)
* À compiler avec `nvcc perf_gpu.cu -o test -O3` (requière CUDA!)
*/
#include <cmath>
#include <chrono>
#include <iostream>
#include <hip/hip_runtime.h>
#define N_FLOAT 100000000
#define MAX_FLOAT 1000
__global__ void rsqrt_vec(floa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /* Teste la peformance de rsqrt sur un grand nombre de valeurs aléatoires (version GPU)
* À compiler avec `nvcc perf_gpu.cu -o test -O3` (requière CUDA!)
*/
#include <cmath>
#include <chrono>
#include <iostream>
#include <hip/hip_runtime.h>
#define N_FLOAT 100000000
#define MAX_FLOAT 1000
__global__ void rsqrt_vec(floa... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9rsqrt_vecPfi
.globl _Z9rsqrt_vecPfi
.p2align 8
.type _Z9rsqrt_vecPfi,@function
_Z9rsqrt_vecPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu i... |
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