system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <cstdlib>
#include <cmath>
#include <iostream>
#include <sys/time.h>
#define TIME_RESOLUTION 1000000 // time measuring resolution (us)
#define NUM_BLOCKS 128 // this is wrong
#define NUM_THREADS_PER_BLOCK 256 // this is wrong
#define SIZE 2048
#define TILE_SIZE 1... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16matrixMultKernelPdS_S_
.globl _Z16matrixMultKernelPdS_S_
.p2align 8
.type _Z16matrixMultKernelPdS_S_,@function
_Z16matrixMultKernelPdS_S_:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16matrixMultKernelPdS_S_
.am... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <cstdlib>
#include <cmath>
#include <iostream>
#include <sys/time.h>
#define TIME_RESOLUTION 1000000 // time measuring resolution (us)
#define NUM_BLOCKS 128 // this is wrong
#define NUM_THREADS_PER_BLOCK 256 // this is wrong
#define SIZE 2048
#define TILE_SIZE 1... | .text
.file "lab5.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z9startTimev # -- Begin function _Z9startTimev
.p2align 4, 0x90
.type _Z9startTimev... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16matrixMultKernelPdS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BR... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16matrixMultKernelPdS_S_
.globl _Z16matrixMultKernelPdS_S_
.p2align 8
.type _Z16matrixMultKernelPdS_S_,@function
_Z16matrixMultKernelPdS_S_:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16matrixMultKernelPdS_S_
.am... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0009a5de_00000000-6_lab5.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3679:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "lab5.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z9startTimev # -- Begin function _Z9startTimev
.p2align 4, 0x90
.type _Z9startTimev... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void scatterSum(int N, float *input, float *output){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i >= N) return;
float a = input[i];
for(int j=0;j<N;++j){
atomicAdd(output+(j+i)%N, a);
}
return;
} | code for sm_80
Function : _Z10scatterSumiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void scatterSum(int N, float *input, float *output){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i >= N) return;
float a = input[i];
for(int j=0;j<N;++j){
atomicAdd(output+(j+i)%N, a);
}
return;
} | .file "tmpxft_000c284a_00000000-6_scatterSum.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void scatterSum(int N, float *input, float *output){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i >= N) return;
float a = input[i];
for(int j=0;j<N;++j){
atomicAdd(output+(j+i)%N, a);
}
return;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void scatterSum(int N, float *input, float *output){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i >= N) return;
float a = input[i];
for(int j=0;j<N;++j){
atomicAdd(output+(j+i)%N, a);
}
return;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void scatterSum(int N, float *input, float *output){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i >= N) return;
float a = input[i];
for(int j=0;j<N;++j){
atomicAdd(output+(j+i)%N, a);
}
return;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10scatterSumiPfS_
.globl _Z10scatterSumiPfS_
.p2align 8
.type _Z10scatterSumiPfS_,@function
_Z10scatterSumiPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_del... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void scatterSum(int N, float *input, float *output){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i >= N) return;
float a = input[i];
for(int j=0;j<N;++j){
atomicAdd(output+(j+i)%N, a);
}
return;
} | .text
.file "scatterSum.hip"
.globl _Z25__device_stub__scatterSumiPfS_ # -- Begin function _Z25__device_stub__scatterSumiPfS_
.p2align 4, 0x90
.type _Z25__device_stub__scatterSumiPfS_,@function
_Z25__device_stub__scatterSumiPfS_: # @_Z25__device_stub__scatterSumiPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10scatterSumiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10scatterSumiPfS_
.globl _Z10scatterSumiPfS_
.p2align 8
.type _Z10scatterSumiPfS_,@function
_Z10scatterSumiPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_del... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c284a_00000000-6_scatterSum.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "scatterSum.hip"
.globl _Z25__device_stub__scatterSumiPfS_ # -- Begin function _Z25__device_stub__scatterSumiPfS_
.p2align 4, 0x90
.type _Z25__device_stub__scatterSumiPfS_,@function
_Z25__device_stub__scatterSumiPfS_: # @_Z25__device_stub__scatterSumiPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void swan_fast_fill( uint4 *ptr, int len ) {
int idx = threadIdx.x + blockDim.x * blockIdx.x;
if( idx<len) {
ptr[idx] = make_uint4( 0,0,0,0 );
}
} | code for sm_80
Function : _Z14swan_fast_fillP5uint4i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e280000002100 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void swan_fast_fill( uint4 *ptr, int len ) {
int idx = threadIdx.x + blockDim.x * blockIdx.x;
if( idx<len) {
ptr[idx] = make_uint4( 0,0,0,0 );
}
} | .file "tmpxft_000cf82a_00000000-6_swan_fast_fill.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void swan_fast_fill( uint4 *ptr, int len ) {
int idx = threadIdx.x + blockDim.x * blockIdx.x;
if( idx<len) {
ptr[idx] = make_uint4( 0,0,0,0 );
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void swan_fast_fill( uint4 *ptr, int len ) {
int idx = threadIdx.x + blockDim.x * blockIdx.x;
if( idx<len) {
ptr[idx] = make_uint4( 0,0,0,0 );
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void swan_fast_fill( uint4 *ptr, int len ) {
int idx = threadIdx.x + blockDim.x * blockIdx.x;
if( idx<len) {
ptr[idx] = make_uint4( 0,0,0,0 );
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi
.globl _Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi
.p2align 8
.type _Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi,@function
_Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void swan_fast_fill( uint4 *ptr, int len ) {
int idx = threadIdx.x + blockDim.x * blockIdx.x;
if( idx<len) {
ptr[idx] = make_uint4( 0,0,0,0 );
}
} | .text
.file "swan_fast_fill.hip"
.globl _Z29__device_stub__swan_fast_fillP15HIP_vector_typeIjLj4EEi # -- Begin function _Z29__device_stub__swan_fast_fillP15HIP_vector_typeIjLj4EEi
.p2align 4, 0x90
.type _Z29__device_stub__swan_fast_fillP15HIP_vector_typeIjLj4EEi,@function
_Z29__device_stub__swan_fast_fillP15HIP_vector_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14swan_fast_fillP5uint4i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e280000002100 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi
.globl _Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi
.p2align 8
.type _Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi,@function
_Z14swan_fast_fillP15HIP_vector_typeIjLj4EEi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000cf82a_00000000-6_swan_fast_fill.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "swan_fast_fill.hip"
.globl _Z29__device_stub__swan_fast_fillP15HIP_vector_typeIjLj4EEi # -- Begin function _Z29__device_stub__swan_fast_fillP15HIP_vector_typeIjLj4EEi
.p2align 4, 0x90
.type _Z29__device_stub__swan_fast_fillP15HIP_vector_typeIjLj4EEi,@function
_Z29__device_stub__swan_fast_fillP15HIP_vector_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: nvptx-registered-target
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=sm_20 --cuda-path=%S/Inputs/CUDA/usr/local/cuda 2>&1 %s | \
// RUN: FileCheck %s --check-prefix=OK
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=s... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: nvptx-registered-target
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=sm_20 --cuda-path=%S/Inputs/CUDA/usr/local/cuda 2>&1 %s | \
// RUN: FileCheck %s --check-prefix=OK
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=s... | .file "tmpxft_00034aa9_00000000-6_cuda-version-check.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: nvptx-registered-target
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=sm_20 --cuda-path=%S/Inputs/CUDA/usr/local/cuda 2>&1 %s | \
// RUN: FileCheck %s --check-prefix=OK
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=s... | #include <hip/hip_runtime.h>
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: nvptx-registered-target
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=sm_20 --cuda-path=%S/Inputs/CUDA/usr/local/cuda 2>&1 %s | \
// RUN: FileCheck %s --check-prefix=OK
// RUN: %clang --target=x86_64-li... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: nvptx-registered-target
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=sm_20 --cuda-path=%S/Inputs/CUDA/usr/local/cuda 2>&1 %s | \
// RUN: FileCheck %s --check-prefix=OK
// RUN: %clang --target=x86_64-li... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: nvptx-registered-target
// RUN: %clang --target=x86_64-linux -v -### --cuda-gpu-arch=sm_20 --cuda-path=%S/Inputs/CUDA/usr/local/cuda 2>&1 %s | \
// RUN: FileCheck %s --check-prefix=OK
// RUN: %clang --target=x86_64-li... | .text
.file "cuda-version-check.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/ll... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00034aa9_00000000-6_cuda-version-check.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "cuda-version-check.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/ll... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
typedef struct node{
//TODO template for any data type
int data;
struct node * next;
}node, * pnode;
typedef struct queue{
pnode head;
pnode tail;
}queue, *pqueue;
__device__ int enqueue(int mydata,pqueue myqueue);
__device__ int dequeue... | code for sm_80
Function : _Z7app_bfsP5queue
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ MOV R2, 0x0 ; /* 0x0000000000027802 */
/* 0x000fe20000000f00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
typedef struct node{
//TODO template for any data type
int data;
struct node * next;
}node, * pnode;
typedef struct queue{
pnode head;
pnode tail;
}queue, *pqueue;
__device__ int enqueue(int mydata,pqueue myqueue);
__device__ int dequeue... | .file "tmpxft_0005a6f5_00000000-6_queue.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
typedef struct node{
//TODO template for any data type
int data;
struct node * next;
}node, * pnode;
typedef struct queue{
pnode head;
pnode tail;
}queue, *pqueue;
__device__ int enqueue(int mydata,pqueue myqueue);
__device__ int dequeue... | #include <stdio.h>
#include "hip/hip_runtime.h"
typedef struct node{
//TODO template for any data type
int data;
struct node * next;
}node, * pnode;
typedef struct queue{
pnode head;
pnode tail;
}queue, *pqueue;
__device__ int enqueue(int mydata,pqueue myqueue);
__device__ int dequeue(pnode mynode, pqueue myqueue);
__d... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include "hip/hip_runtime.h"
typedef struct node{
//TODO template for any data type
int data;
struct node * next;
}node, * pnode;
typedef struct queue{
pnode head;
pnode tail;
}queue, *pqueue;
__device__ int enqueue(int mydata,pqueue myqueue);
__device__ int dequeue(pnode mynode, pqueue myqueue);
__d... | .text
.file "queue.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $96, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005a6f5_00000000-6_queue.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "queue.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $96, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void query_ball_point_gpu(int b, int n, int m, const float *radius, int nsample, const float *xyz1, const float *xyz2, int *idx, int *pts_cnt) {
int batch_index = blockIdx.x;
xyz1 += n*3*batch_index;
xyz2 += m*3*batch_index;
idx += m*nsample*batch_index;
pts_cnt += m*batch_index; // cou... | code for sm_80
Function : _Z20query_ball_point_gpuiiiPKfiS0_S0_PiS1_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_TID.X ; /* 0x00000000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void query_ball_point_gpu(int b, int n, int m, const float *radius, int nsample, const float *xyz1, const float *xyz2, int *idx, int *pts_cnt) {
int batch_index = blockIdx.x;
xyz1 += n*3*batch_index;
xyz2 += m*3*batch_index;
idx += m*nsample*batch_index;
pts_cnt += m*batch_index; // cou... | .file "tmpxft_00095e81_00000000-6_query_ball_point_gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void query_ball_point_gpu(int b, int n, int m, const float *radius, int nsample, const float *xyz1, const float *xyz2, int *idx, int *pts_cnt) {
int batch_index = blockIdx.x;
xyz1 += n*3*batch_index;
xyz2 += m*3*batch_index;
idx += m*nsample*batch_index;
pts_cnt += m*batch_index; // cou... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void query_ball_point_gpu(int b, int n, int m, const float *radius, int nsample, const float *xyz1, const float *xyz2, int *idx, int *pts_cnt) {
int batch_index = blockIdx.x;
xyz1 += n*3*batch_index;
xyz2 += m*3*batch_index;
idx += m*nsample*batch_index;
pts... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void query_ball_point_gpu(int b, int n, int m, const float *radius, int nsample, const float *xyz1, const float *xyz2, int *idx, int *pts_cnt) {
int batch_index = blockIdx.x;
xyz1 += n*3*batch_index;
xyz2 += m*3*batch_index;
idx += m*nsample*batch_index;
pts... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20query_ball_point_gpuiiiPKfiS0_S0_PiS1_
.globl _Z20query_ball_point_gpuiiiPKfiS0_S0_PiS1_
.p2align 8
.type _Z20query_ball_point_gpuiiiPKfiS0_S0_PiS1_,@function
_Z20query_ball_point_gpuiiiPKfiS0_S0_PiS1_:
s_load_b32 s12, s[0:1], 0x8
s_mov_b32 s2, exec_lo
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void query_ball_point_gpu(int b, int n, int m, const float *radius, int nsample, const float *xyz1, const float *xyz2, int *idx, int *pts_cnt) {
int batch_index = blockIdx.x;
xyz1 += n*3*batch_index;
xyz2 += m*3*batch_index;
idx += m*nsample*batch_index;
pts... | .text
.file "query_ball_point_gpu.hip"
.globl _Z35__device_stub__query_ball_point_gpuiiiPKfiS0_S0_PiS1_ # -- Begin function _Z35__device_stub__query_ball_point_gpuiiiPKfiS0_S0_PiS1_
.p2align 4, 0x90
.type _Z35__device_stub__query_ball_point_gpuiiiPKfiS0_S0_PiS1_,@function
_Z35__device_stub__query_ball_point_gpuiiiPKfiS... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00095e81_00000000-6_query_ball_point_gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "query_ball_point_gpu.hip"
.globl _Z35__device_stub__query_ball_point_gpuiiiPKfiS0_S0_PiS1_ # -- Begin function _Z35__device_stub__query_ball_point_gpuiiiPKfiS0_S0_PiS1_
.p2align 4, 0x90
.type _Z35__device_stub__query_ball_point_gpuiiiPKfiS0_S0_PiS1_,@function
_Z35__device_stub__query_ball_point_gpuiiiPKfiS... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define IMUL(a, b) __mul24(a, b)
#define iDivUp(a,b) ((a)+(b)-1)/(b)
#define CONV1_THREAD_SIZE 256
#define CONVN_THREAD_SIZE1 16
#define CONVN_THREAD_SIZE2 31 //31 is faster than 32 because shared memory is too full
// 28 space-time orientations of V1 simple cells
#define nrFilters 28
// 8 directi... | .file "tmpxft_0008f8ec_00000000-6_dev_edges.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define IMUL(a, b) __mul24(a, b)
#define iDivUp(a,b) ((a)+(b)-1)/(b)
#define CONV1_THREAD_SIZE 256
#define CONVN_THREAD_SIZE1 16
#define CONVN_THREAD_SIZE2 31 //31 is faster than 32 because shared memory is too full
// 28 space-time orientations of V1 simple cells
#define nrFilters 28
// 8 directi... | #include <hip/hip_runtime.h>
#include "includes.h"
#define IMUL(a, b) __mul24(a, b)
#define iDivUp(a,b) ((a)+(b)-1)/(b)
#define CONV1_THREAD_SIZE 256
#define CONVN_THREAD_SIZE1 16
#define CONVN_THREAD_SIZE2 31 //31 is faster than 32 because shared memory is too full
// 28 space-time orientations of V1 simple cells
#def... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define IMUL(a, b) __mul24(a, b)
#define iDivUp(a,b) ((a)+(b)-1)/(b)
#define CONV1_THREAD_SIZE 256
#define CONVN_THREAD_SIZE1 16
#define CONVN_THREAD_SIZE2 31 //31 is faster than 32 because shared memory is too full
// 28 space-time orientations of V1 simple cells
#def... | .text
.file "dev_edges.hip"
.globl _Z24__device_stub__dev_edgesPfiii # -- Begin function _Z24__device_stub__dev_edgesPfiii
.p2align 4, 0x90
.type _Z24__device_stub__dev_edgesPfiii,@function
_Z24__device_stub__dev_edgesPfiii: # @_Z24__device_stub__dev_edgesPfiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008f8ec_00000000-6_dev_edges.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "dev_edges.hip"
.globl _Z24__device_stub__dev_edgesPfiii # -- Begin function _Z24__device_stub__dev_edgesPfiii
.p2align 4, 0x90
.type _Z24__device_stub__dev_edgesPfiii,@function
_Z24__device_stub__dev_edgesPfiii: # @_Z24__device_stub__dev_edgesPfiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <cmath>
#include <cstdio>
#include <sys/time.h>
using namespace std;
#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define BLOCK_SIZE 32
#define ERROR 1.0e-9
typedef unsigned long long int LONG;
void safe_call(cudaError_t ret, int line)
{
if(ret!=cudaSuccess)
{
cout << "Error at ... | code for sm_80
Function : _Z5gpuMMPdS_S_y
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R25, SR_TID.Y ; /* 0x0000000000197919 */
/* 0x000e22000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <cmath>
#include <cstdio>
#include <sys/time.h>
using namespace std;
#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define BLOCK_SIZE 32
#define ERROR 1.0e-9
typedef unsigned long long int LONG;
void safe_call(cudaError_t ret, int line)
{
if(ret!=cudaSuccess)
{
cout << "Error at ... | .file "tmpxft_00117076_00000000-6_big_Matmul.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <cmath>
#include <cstdio>
#include <sys/time.h>
using namespace std;
#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define BLOCK_SIZE 32
#define ERROR 1.0e-9
typedef unsigned long long int LONG;
void safe_call(cudaError_t ret, int line)
{
if(ret!=cudaSuccess)
{
cout << "Error at ... | #include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
#include <cstdio>
#include <sys/time.h>
using namespace std;
#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define BLOCK_SIZE 32
#define ERROR 1.0e-9
typedef unsigned long long int LONG;
void safe_call(hipError_t ret, int line)
{
if(ret!=hipSu... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
#include <cstdio>
#include <sys/time.h>
using namespace std;
#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define BLOCK_SIZE 32
#define ERROR 1.0e-9
typedef unsigned long long int LONG;
void safe_call(hipError_t ret, int line)
{
if(ret!=hipSu... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5gpuMMPdS_S_y
.globl _Z5gpuMMPdS_S_y
.p2align 8
.type _Z5gpuMMPdS_S_y,@function
_Z5gpuMMPdS_S_y:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
#include <cstdio>
#include <sys/time.h>
using namespace std;
#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define BLOCK_SIZE 32
#define ERROR 1.0e-9
typedef unsigned long long int LONG;
void safe_call(hipError_t ret, int line)
{
if(ret!=hipSu... | .text
.file "big_Matmul.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z9safe_call10hipError_ti # -- Begin function _Z9safe_call10hipError_ti
.p2align 4, 0x90
.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5gpuMMPdS_S_y
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R25, SR_TID.Y ; /* 0x0000000000197919 */
/* 0x000e22000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5gpuMMPdS_S_y
.globl _Z5gpuMMPdS_S_y
.p2align 8
.type _Z5gpuMMPdS_S_y,@function
_Z5gpuMMPdS_S_y:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00117076_00000000-6_big_Matmul.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "big_Matmul.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z9safe_call10hipError_ti # -- Begin function _Z9safe_call10hipError_ti
.p2align 4, 0x90
.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
extern "C"
__global__ void invertVectorElements(float* vector, int n)
{
int i = threadIdx.x;
if (i < n)
{
vector[i] = 1.0f / vector[i];
}
} | code for sm_80
Function : invertVectorElements
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e2400... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
extern "C"
__global__ void invertVectorElements(float* vector, int n)
{
int i = threadIdx.x;
if (i < n)
{
vector[i] = 1.0f / vector[i];
}
} | .file "tmpxft_0012deb5_00000000-6_invertVectorElements.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
extern "C"
__global__ void invertVectorElements(float* vector, int n)
{
int i = threadIdx.x;
if (i < n)
{
vector[i] = 1.0f / vector[i];
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
extern "C"
__global__ void invertVectorElements(float* vector, int n)
{
int i = threadIdx.x;
if (i < n)
{
vector[i] = 1.0f / vector[i];
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
extern "C"
__global__ void invertVectorElements(float* vector, int n)
{
int i = threadIdx.x;
if (i < n)
{
vector[i] = 1.0f / vector[i];
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected invertVectorElements
.globl invertVectorElements
.p2align 8
.type invertVectorElements,@function
invertVectorElements:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbran... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
extern "C"
__global__ void invertVectorElements(float* vector, int n)
{
int i = threadIdx.x;
if (i < n)
{
vector[i] = 1.0f / vector[i];
}
} | .text
.file "invertVectorElements.hip"
.globl __device_stub__invertVectorElements # -- Begin function __device_stub__invertVectorElements
.p2align 4, 0x90
.type __device_stub__invertVectorElements,@function
__device_stub__invertVectorElements: # @__device_stub__invertVectorElements
.cfi_startproc
# %bb.0:
subq $88, ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : invertVectorElements
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e2400... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected invertVectorElements
.globl invertVectorElements
.p2align 8
.type invertVectorElements,@function
invertVectorElements:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbran... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012deb5_00000000-6_invertVectorElements.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "invertVectorElements.hip"
.globl __device_stub__invertVectorElements # -- Begin function __device_stub__invertVectorElements
.p2align 4, 0x90
.type __device_stub__invertVectorElements,@function
__device_stub__invertVectorElements: # @__device_stub__invertVectorElements
.cfi_startproc
# %bb.0:
subq $88, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <cuda_runtime.h>
#include <assert.h>
#include <iostream>
#include <vector>
#include <math.h>
void initKernels()
{
int gpu_count;
cudaGetDeviceCount(&gpu_count);
assert(gpu_count>0);
assert(cudaSetDevice(0) == cudaSuccess);
cudaDeviceProp prop;
cudaGetDeviceProperties(&prop, 0);
std::cout << "... | #include <hip/hip_runtime.h>
#include <assert.h>
#include <iostream>
#include <vector>
#include <math.h>
void initKernels()
{
int gpu_count;
hipGetDeviceCount(&gpu_count);
assert(gpu_count>0);
assert(hipSetDevice(0) == hipSuccess);
hipDeviceProp_t prop;
hipGetDeviceProperties(&prop, 0);
std::cout << ">>> Cuda limits: t... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>
// kernel
__global__ void convolution_2D_Kernel(float* d_m, float* d_mask, float* d_n, size_t a, size_t b, size_t maskWidth)
{
// indexing variables
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
in... | .file "tmpxft_00174273_00000000-6_convolution-2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>
// kernel
__global__ void convolution_2D_Kernel(float* d_m, float* d_mask, float* d_n, size_t a, size_t b, size_t maskWidth)
{
// indexing variables
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + threadIdx.y;
in... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>
// kernel
__global__ void convolution_2D_Kernel(float* d_m, float* d_mask, float* d_n, size_t a, size_t b, size_t maskWidth)
{
// indexing variables
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + thre... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>
// kernel
__global__ void convolution_2D_Kernel(float* d_m, float* d_mask, float* d_n, size_t a, size_t b, size_t maskWidth)
{
// indexing variables
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + thre... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21convolution_2D_KernelPfS_S_mmm
.globl _Z21convolution_2D_KernelPfS_S_mmm
.p2align 8
.type _Z21convolution_2D_KernelPfS_S_mmm,@function
_Z21convolution_2D_KernelPfS_S_mmm:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x18
s_lo... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <stdlib.h>
// kernel
__global__ void convolution_2D_Kernel(float* d_m, float* d_mask, float* d_n, size_t a, size_t b, size_t maskWidth)
{
// indexing variables
int i = blockIdx.x * blockDim.x + threadIdx.x;
int j = blockIdx.y * blockDim.y + thre... | .text
.file "convolution-2D.hip"
.globl _Z36__device_stub__convolution_2D_KernelPfS_S_mmm # -- Begin function _Z36__device_stub__convolution_2D_KernelPfS_S_mmm
.p2align 4, 0x90
.type _Z36__device_stub__convolution_2D_KernelPfS_S_mmm,@function
_Z36__device_stub__convolution_2D_KernelPfS_S_mmm: # @_Z36__device_stub__conv... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00174273_00000000-6_convolution-2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "convolution-2D.hip"
.globl _Z36__device_stub__convolution_2D_KernelPfS_S_mmm # -- Begin function _Z36__device_stub__convolution_2D_KernelPfS_S_mmm
.p2align 4, 0x90
.type _Z36__device_stub__convolution_2D_KernelPfS_S_mmm,@function
_Z36__device_stub__convolution_2D_KernelPfS_S_mmm: # @_Z36__device_stub__conv... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_profiler_api.h>
#include <time.h>
#include <math.h>
#define SIZE 1000
#define BLKS 4
#define THREADSPBLKS 256
#define TILE_WIDTH 8
__global__
void heatCalcKernel(float * g_d,float * h_d, int width, int itr, int new_len, int new_width)
{
int row = b... | code for sm_80
Function : _Z14heatCalcKernelPfS_iiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IABS R6, c[0x0][0x170] ; /* 0x00005c0000067a13 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_profiler_api.h>
#include <time.h>
#include <math.h>
#define SIZE 1000
#define BLKS 4
#define THREADSPBLKS 256
#define TILE_WIDTH 8
__global__
void heatCalcKernel(float * g_d,float * h_d, int width, int itr, int new_len, int new_width)
{
int row = b... | .file "tmpxft_00080404_00000000-6_cuda_version_1000000.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_profiler_api.h>
#include <time.h>
#include <math.h>
#define SIZE 1000
#define BLKS 4
#define THREADSPBLKS 256
#define TILE_WIDTH 8
__global__
void heatCalcKernel(float * g_d,float * h_d, int width, int itr, int new_len, int new_width)
{
int row = b... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <time.h>
#include <math.h>
#define SIZE 1000
#define BLKS 4
#define THREADSPBLKS 256
#define TILE_WIDTH 8
__global__
void heatCalcKernel(float * g_d,float * h_d, int width, int itr, int new_len, int new_width)
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <time.h>
#include <math.h>
#define SIZE 1000
#define BLKS 4
#define THREADSPBLKS 256
#define TILE_WIDTH 8
__global__
void heatCalcKernel(float * g_d,float * h_d, int width, int itr, int new_len, int new_width)
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14heatCalcKernelPfS_iiii
.globl _Z14heatCalcKernelPfS_iiii
.p2align 8
.type _Z14heatCalcKernelPfS_iiii,@function
_Z14heatCalcKernelPfS_iiii:
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x10
s_load_b32 s2, s[0:1], 0x1c
v_bfe_u32 v2, v0, 10, 10
v_an... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <time.h>
#include <math.h>
#define SIZE 1000
#define BLKS 4
#define THREADSPBLKS 256
#define TILE_WIDTH 8
__global__
void heatCalcKernel(float * g_d,float * h_d, int width, int itr, int new_len, int new_width)
... | .text
.file "cuda_version_1000000.hip"
.globl _Z29__device_stub__heatCalcKernelPfS_iiii # -- Begin function _Z29__device_stub__heatCalcKernelPfS_iiii
.p2align 4, 0x90
.type _Z29__device_stub__heatCalcKernelPfS_iiii,@function
_Z29__device_stub__heatCalcKernelPfS_iiii: # @_Z29__device_stub__heatCalcKernelPfS_iiii
.cfi_st... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14heatCalcKernelPfS_iiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IABS R6, c[0x0][0x170] ; /* 0x00005c0000067a13 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14heatCalcKernelPfS_iiii
.globl _Z14heatCalcKernelPfS_iiii
.p2align 8
.type _Z14heatCalcKernelPfS_iiii,@function
_Z14heatCalcKernelPfS_iiii:
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x10
s_load_b32 s2, s[0:1], 0x1c
v_bfe_u32 v2, v0, 10, 10
v_an... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00080404_00000000-6_cuda_version_1000000.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "cuda_version_1000000.hip"
.globl _Z29__device_stub__heatCalcKernelPfS_iiii # -- Begin function _Z29__device_stub__heatCalcKernelPfS_iiii
.p2align 4, 0x90
.type _Z29__device_stub__heatCalcKernelPfS_iiii,@function
_Z29__device_stub__heatCalcKernelPfS_iiii: # @_Z29__device_stub__heatCalcKernelPfS_iiii
.cfi_st... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <iostream>
#include <fstream>
using namespace std;
__global__ void decode(char *msg);
int main(int argc, char *argv[]){
if (argc > 2){
cout << "You have entered too many arguments, the program will now exit.\n";
exit(0);
}else if(argc == 1){
cout << "You have entered too few arguments, the p... | code for sm_80
Function : _Z6decodePc
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <iostream>
#include <fstream>
using namespace std;
__global__ void decode(char *msg);
int main(int argc, char *argv[]){
if (argc > 2){
cout << "You have entered too many arguments, the program will now exit.\n";
exit(0);
}else if(argc == 1){
cout << "You have entered too few arguments, the p... | .file "tmpxft_0012db01_00000000-6_DecodeEmail.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3803:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cu... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <iostream>
#include <fstream>
using namespace std;
__global__ void decode(char *msg);
int main(int argc, char *argv[]){
if (argc > 2){
cout << "You have entered too many arguments, the program will now exit.\n";
exit(0);
}else if(argc == 1){
cout << "You have entered too few arguments, the p... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <fstream>
using namespace std;
__global__ void decode(char *msg);
int main(int argc, char *argv[]){
if (argc > 2){
cout << "You have entered too many arguments, the program will now exit.\n";
exit(0);
}else if(argc == 1){
cout << "You have ent... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <fstream>
using namespace std;
__global__ void decode(char *msg);
int main(int argc, char *argv[]){
if (argc > 2){
cout << "You have entered too many arguments, the program will now exit.\n";
exit(0);
}else if(argc == 1){
cout << "You have ent... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6decodePc
.globl _Z6decodePc
.p2align 8
.type _Z6decodePc,@function
_Z6decodePc:
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
global_load_u8 v1, v0, s[0:1]
s_waitcnt vmcnt(0)
v_cmpx_ne_u1... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <fstream>
using namespace std;
__global__ void decode(char *msg);
int main(int argc, char *argv[]){
if (argc > 2){
cout << "You have entered too many arguments, the program will now exit.\n";
exit(0);
}else if(argc == 1){
cout << "You have ent... | .text
.file "DecodeEmail.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6decodePc
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6decodePc
.globl _Z6decodePc
.p2align 8
.type _Z6decodePc,@function
_Z6decodePc:
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
global_load_u8 v1, v0, s[0:1]
s_waitcnt vmcnt(0)
v_cmpx_ne_u1... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012db01_00000000-6_DecodeEmail.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3803:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cu... | .text
.file "DecodeEmail.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include "cuda_runtime.h"
#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif
__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, float *... | .file "tmpxft_0004a6bb_00000000-6_matmul_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include "cuda_runtime.h"
#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif
__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, float *... | #include <stdio.h>
#include <stdlib.h>
#include "hip/hip_runtime.h"
#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif
__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, floa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include "hip/hip_runtime.h"
#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif
__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, floa... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10matmul_onePfS_S_i
.globl _Z10matmul_onePfS_S_i
.p2align 8
.type _Z10matmul_onePfS_S_i,@function
_Z10matmul_onePfS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include "hip/hip_runtime.h"
#define THREADS_PER_BLOCK 32
#ifndef N
#define N 10
#endif
__global__ void matmul_two(float *A, float *B, float *C);
__global__ void matmul_one(float *A, float *B, float *C, int row);
void matmul_caller_two(float *A_dev, float *B_dev, float*C_dev, floa... | .text
.file "matmul_cuda.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004a6bb_00000000-6_matmul_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "matmul_cuda.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_profiler_api.h>
#define THREADSPBLK 1024
#define THREADSPSM 2048
#define TILE_WIDTH 32
#define TOTAL_ITERATIONS 50
int main_n;
__global__ void iterate(float* originalMatrixD, float* solutionD, int originalMatrixWidth,
int startingIndex) {
// __sha... | code for sm_80
Function : _Z7iteratePfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_profiler_api.h>
#define THREADSPBLK 1024
#define THREADSPSM 2048
#define TILE_WIDTH 32
#define TOTAL_ITERATIONS 50
int main_n;
__global__ void iterate(float* originalMatrixD, float* solutionD, int originalMatrixWidth,
int startingIndex) {
// __sha... | .file "tmpxft_00178d77_00000000-6_cuda-version.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_profiler_api.h>
#define THREADSPBLK 1024
#define THREADSPSM 2048
#define TILE_WIDTH 32
#define TOTAL_ITERATIONS 50
int main_n;
__global__ void iterate(float* originalMatrixD, float* solutionD, int originalMatrixWidth,
int startingIndex) {
// __sha... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#define THREADSPBLK 1024
#define THREADSPSM 2048
#define TILE_WIDTH 32
#define TOTAL_ITERATIONS 50
int main_n;
__global__ void iterate(float* originalMatrixD, float* solutionD, int originalMatrixWidth,
int startingInde... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#define THREADSPBLK 1024
#define THREADSPSM 2048
#define TILE_WIDTH 32
#define TOTAL_ITERATIONS 50
int main_n;
__global__ void iterate(float* originalMatrixD, float* solutionD, int originalMatrixWidth,
int startingInde... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7iteratePfS_ii
.globl _Z7iteratePfS_ii
.p2align 8
.type _Z7iteratePfS_ii,@function
_Z7iteratePfS_ii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x24
s_load_b64 s[8:9], s[0:1], 0x10
v_bfe_u32 v2, v0, 10, 10... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#define THREADSPBLK 1024
#define THREADSPSM 2048
#define TILE_WIDTH 32
#define TOTAL_ITERATIONS 50
int main_n;
__global__ void iterate(float* originalMatrixD, float* solutionD, int originalMatrixWidth,
int startingInde... | .text
.file "cuda-version.hip"
.globl _Z22__device_stub__iteratePfS_ii # -- Begin function _Z22__device_stub__iteratePfS_ii
.p2align 4, 0x90
.type _Z22__device_stub__iteratePfS_ii,@function
_Z22__device_stub__iteratePfS_ii: # @_Z22__device_stub__iteratePfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7iteratePfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7iteratePfS_ii
.globl _Z7iteratePfS_ii
.p2align 8
.type _Z7iteratePfS_ii,@function
_Z7iteratePfS_ii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x24
s_load_b64 s[8:9], s[0:1], 0x10
v_bfe_u32 v2, v0, 10, 10... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00178d77_00000000-6_cuda-version.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "cuda-version.hip"
.globl _Z22__device_stub__iteratePfS_ii # -- Begin function _Z22__device_stub__iteratePfS_ii
.p2align 4, 0x90
.type _Z22__device_stub__iteratePfS_ii,@function
_Z22__device_stub__iteratePfS_ii: # @_Z22__device_stub__iteratePfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void copy_sort_int( const float *orig, const unsigned int *sort_idx, const unsigned int nitems, float *sorted ) {
for( int i = 0; i < nitems; ++ i ) {
sorted[sort_idx[i]] = orig[i];
}
} | code for sm_80
Function : _Z13copy_sort_intPKfPKjjPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void copy_sort_int( const float *orig, const unsigned int *sort_idx, const unsigned int nitems, float *sorted ) {
for( int i = 0; i < nitems; ++ i ) {
sorted[sort_idx[i]] = orig[i];
}
} | .file "tmpxft_0012bf8b_00000000-6_copy_sort_int.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void copy_sort_int( const float *orig, const unsigned int *sort_idx, const unsigned int nitems, float *sorted ) {
for( int i = 0; i < nitems; ++ i ) {
sorted[sort_idx[i]] = orig[i];
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void copy_sort_int( const float *orig, const unsigned int *sort_idx, const unsigned int nitems, float *sorted ) {
for( int i = 0; i < nitems; ++ i ) {
sorted[sort_idx[i]] = orig[i];
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void copy_sort_int( const float *orig, const unsigned int *sort_idx, const unsigned int nitems, float *sorted ) {
for( int i = 0; i < nitems; ++ i ) {
sorted[sort_idx[i]] = orig[i];
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13copy_sort_intPKfPKjjPf
.globl _Z13copy_sort_intPKfPKjjPf
.p2align 8
.type _Z13copy_sort_intPKfPKjjPf,@function
_Z13copy_sort_intPKfPKjjPf:
s_load_b32 s8, s[0:1], 0x10
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s8, 0
s_cbranch_scc1 .LB... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void copy_sort_int( const float *orig, const unsigned int *sort_idx, const unsigned int nitems, float *sorted ) {
for( int i = 0; i < nitems; ++ i ) {
sorted[sort_idx[i]] = orig[i];
}
} | .text
.file "copy_sort_int.hip"
.globl _Z28__device_stub__copy_sort_intPKfPKjjPf # -- Begin function _Z28__device_stub__copy_sort_intPKfPKjjPf
.p2align 4, 0x90
.type _Z28__device_stub__copy_sort_intPKfPKjjPf,@function
_Z28__device_stub__copy_sort_intPKfPKjjPf: # @_Z28__device_stub__copy_sort_intPKfPKjjPf
.cfi_startproc... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13copy_sort_intPKfPKjjPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13copy_sort_intPKfPKjjPf
.globl _Z13copy_sort_intPKfPKjjPf
.p2align 8
.type _Z13copy_sort_intPKfPKjjPf,@function
_Z13copy_sort_intPKfPKjjPf:
s_load_b32 s8, s[0:1], 0x10
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s8, 0
s_cbranch_scc1 .LB... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012bf8b_00000000-6_copy_sort_int.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "copy_sort_int.hip"
.globl _Z28__device_stub__copy_sort_intPKfPKjjPf # -- Begin function _Z28__device_stub__copy_sort_intPKfPKjjPf
.p2align 4, 0x90
.type _Z28__device_stub__copy_sort_intPKfPKjjPf,@function
_Z28__device_stub__copy_sort_intPKfPKjjPf: # @_Z28__device_stub__copy_sort_intPKfPKjjPf
.cfi_startproc... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define THREAD_BLOCK_SIZE 512
#define NUM_BLOCKS 320 // Define the size of a tile
/* This function uses a compare and swap technique to acquire a mutex/lock. */
__device__ void lock(int *mutex)
{
while(atomicCAS(mutex, 0, 1) != 0);
}
/* This function uses an atomic exchange operation to release the mutex/lock. */
__de... | code for sm_80
Function : _Z33vector_dot_product_kernel_atomicsPfS_S_jPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x00000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define THREAD_BLOCK_SIZE 512
#define NUM_BLOCKS 320 // Define the size of a tile
/* This function uses a compare and swap technique to acquire a mutex/lock. */
__device__ void lock(int *mutex)
{
while(atomicCAS(mutex, 0, 1) != 0);
}
/* This function uses an atomic exchange operation to release the mutex/lock. */
__de... | .file "tmpxft_0000b812_00000000-6_vector_dot_product_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define THREAD_BLOCK_SIZE 512
#define NUM_BLOCKS 320 // Define the size of a tile
/* This function uses a compare and swap technique to acquire a mutex/lock. */
__device__ void lock(int *mutex)
{
while(atomicCAS(mutex, 0, 1) != 0);
}
/* This function uses an atomic exchange operation to release the mutex/lock. */
__de... | #include <hip/hip_runtime.h>
#define THREAD_BLOCK_SIZE 512
#define NUM_BLOCKS 320 // Define the size of a tile
/* This function uses a compare and swap technique to acquire a mutex/lock. */
__device__ void lock(int *mutex)
{
while(atomicCAS(mutex, 0, 1) != 0);
}
/* This function uses an atomic exchange operation to re... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define THREAD_BLOCK_SIZE 512
#define NUM_BLOCKS 320 // Define the size of a tile
/* This function uses a compare and swap technique to acquire a mutex/lock. */
__device__ void lock(int *mutex)
{
while(atomicCAS(mutex, 0, 1) != 0);
}
/* This function uses an atomic exchange operation to re... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z33vector_dot_product_kernel_atomicsPfS_S_jPi
.globl _Z33vector_dot_product_kernel_atomicsPfS_S_jPi
.p2align 8
.type _Z33vector_dot_product_kernel_atomicsPfS_S_jPi,@function
_Z33vector_dot_product_kernel_atomicsPfS_S_jPi:
s_clause 0x1
s_load_b32 s4, s[0:1]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define THREAD_BLOCK_SIZE 512
#define NUM_BLOCKS 320 // Define the size of a tile
/* This function uses a compare and swap technique to acquire a mutex/lock. */
__device__ void lock(int *mutex)
{
while(atomicCAS(mutex, 0, 1) != 0);
}
/* This function uses an atomic exchange operation to re... | .text
.file "vector_dot_product_kernel.hip"
.globl _Z48__device_stub__vector_dot_product_kernel_atomicsPfS_S_jPi # -- Begin function _Z48__device_stub__vector_dot_product_kernel_atomicsPfS_S_jPi
.p2align 4, 0x90
.type _Z48__device_stub__vector_dot_product_kernel_atomicsPfS_S_jPi,@function
_Z48__device_stub__vector_dot_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z33vector_dot_product_kernel_atomicsPfS_S_jPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x00000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z33vector_dot_product_kernel_atomicsPfS_S_jPi
.globl _Z33vector_dot_product_kernel_atomicsPfS_S_jPi
.p2align 8
.type _Z33vector_dot_product_kernel_atomicsPfS_S_jPi,@function
_Z33vector_dot_product_kernel_atomicsPfS_S_jPi:
s_clause 0x1
s_load_b32 s4, s[0:1]... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0000b812_00000000-6_vector_dot_product_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@... | .text
.file "vector_dot_product_kernel.hip"
.globl _Z48__device_stub__vector_dot_product_kernel_atomicsPfS_S_jPi # -- Begin function _Z48__device_stub__vector_dot_product_kernel_atomicsPfS_S_jPi
.p2align 4, 0x90
.type _Z48__device_stub__vector_dot_product_kernel_atomicsPfS_S_jPi,@function
_Z48__device_stub__vector_dot_... |
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