system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // simple increment kernel
#include <cuda.h>
#include <stdio.h>
__global__
void inc(unsigned n, float *d_data)
{
d_data[0]+=2;
}
int main(void)
{
// create host array and initialize
int n = 1; // one element
size_t bytes = n * sizeof(float);
float *h_data = (float *)malloc(bytes);
h_data[0] = 40;
// print original valu... | code for sm_80
Function : _Z3incjPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe20000000f00 */
/*0020*/ UL... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // simple increment kernel
#include <cuda.h>
#include <stdio.h>
__global__
void inc(unsigned n, float *d_data)
{
d_data[0]+=2;
}
int main(void)
{
// create host array and initialize
int n = 1; // one element
size_t bytes = n * sizeof(float);
float *h_data = (float *)malloc(bytes);
h_data[0] = 40;
// print original valu... | .file "tmpxft_000dcb8e_00000000-6_increment.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // simple increment kernel
#include <cuda.h>
#include <stdio.h>
__global__
void inc(unsigned n, float *d_data)
{
d_data[0]+=2;
}
int main(void)
{
// create host array and initialize
int n = 1; // one element
size_t bytes = n * sizeof(float);
float *h_data = (float *)malloc(bytes);
h_data[0] = 40;
// print original valu... | // simple increment kernel
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__
void inc(unsigned n, float *d_data)
{
d_data[0]+=2;
}
int main(void)
{
// create host array and initialize
int n = 1; // one element
size_t bytes = n * sizeof(float);
float *h_data = (float *)malloc(bytes);
h_data[0] = 40;
// print or... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // simple increment kernel
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__
void inc(unsigned n, float *d_data)
{
d_data[0]+=2;
}
int main(void)
{
// create host array and initialize
int n = 1; // one element
size_t bytes = n * sizeof(float);
float *h_data = (float *)malloc(bytes);
h_data[0] = 40;
// print or... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3incjPf
.globl _Z3incjPf
.p2align 8
.type _Z3incjPf,@function
_Z3incjPf:
s_load_b64 s[0:1], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v1, s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // simple increment kernel
#include <hip/hip_runtime.h>
#include <stdio.h>
__global__
void inc(unsigned n, float *d_data)
{
d_data[0]+=2;
}
int main(void)
{
// create host array and initialize
int n = 1; // one element
size_t bytes = n * sizeof(float);
float *h_data = (float *)malloc(bytes);
h_data[0] = 40;
// print or... | .text
.file "increment.hip"
.globl _Z18__device_stub__incjPf # -- Begin function _Z18__device_stub__incjPf
.p2align 4, 0x90
.type _Z18__device_stub__incjPf,@function
_Z18__device_stub__incjPf: # @_Z18__device_stub__incjPf
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movl %edi, 4(%rsp... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3incjPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ MOV R2, c[0x0][0x168] ; /* 0x00005a0000027a02 */
/* 0x000fe20000000f00 */
/*0020*/ UL... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3incjPf
.globl _Z3incjPf
.p2align 8
.type _Z3incjPf,@function
_Z3incjPf:
s_load_b64 s[0:1], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v1, s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000dcb8e_00000000-6_increment.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "increment.hip"
.globl _Z18__device_stub__incjPf # -- Begin function _Z18__device_stub__incjPf
.p2align 4, 0x90
.type _Z18__device_stub__incjPf,@function
_Z18__device_stub__incjPf: # @_Z18__device_stub__incjPf
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movl %edi, 4(%rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
// Kernel that executes on the CUDA device
__global__ void square_array(float *a, float *b, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx<N)
{
a[idx] = a[idx] * a[idx];
}
}
// main routine that executes on the host
int main(void)
{
float elap... | code for sm_80
Function : _Z12square_arrayPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
// Kernel that executes on the CUDA device
__global__ void square_array(float *a, float *b, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx<N)
{
a[idx] = a[idx] * a[idx];
}
}
// main routine that executes on the host
int main(void)
{
float elap... | .file "tmpxft_000cf6db_00000000-6_Ejemplo5.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
// Kernel that executes on the CUDA device
__global__ void square_array(float *a, float *b, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx<N)
{
a[idx] = a[idx] * a[idx];
}
}
// main routine that executes on the host
int main(void)
{
float elap... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
// Kernel that executes on the CUDA device
__global__ void square_array(float *a, float *b, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx<N)
{
a[idx] = a[idx] * a[idx];
}
}
// main routine that executes on the hos... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
// Kernel that executes on the CUDA device
__global__ void square_array(float *a, float *b, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx<N)
{
a[idx] = a[idx] * a[idx];
}
}
// main routine that executes on the hos... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12square_arrayPfS_i
.globl _Z12square_arrayPfS_i
.p2align 8
.type _Z12square_arrayPfS_i,@function
_Z12square_arrayPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
// Kernel that executes on the CUDA device
__global__ void square_array(float *a, float *b, int N)
{
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx<N)
{
a[idx] = a[idx] * a[idx];
}
}
// main routine that executes on the hos... | .text
.file "Ejemplo5.hip"
.globl _Z27__device_stub__square_arrayPfS_i # -- Begin function _Z27__device_stub__square_arrayPfS_i
.p2align 4, 0x90
.type _Z27__device_stub__square_arrayPfS_i,@function
_Z27__device_stub__square_arrayPfS_i: # @_Z27__device_stub__square_arrayPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.c... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12square_arrayPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12square_arrayPfS_i
.globl _Z12square_arrayPfS_i
.p2align 8
.type _Z12square_arrayPfS_i,@function
_Z12square_arrayPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000cf6db_00000000-6_Ejemplo5.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "Ejemplo5.hip"
.globl _Z27__device_stub__square_arrayPfS_i # -- Begin function _Z27__device_stub__square_arrayPfS_i
.p2align 4, 0x90
.type _Z27__device_stub__square_arrayPfS_i,@function
_Z27__device_stub__square_arrayPfS_i: # @_Z27__device_stub__square_arrayPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* CURAND API: inizio uso dei PseudoRandom Number Generator
* limitazione a 65535 kernel, lancio monodimensionale/bidimensionale
* attenzione al numero N...non riesco a processare molti dati usando in contemporanea il monitor
*/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <cuda.h>
#include <cura... | .file "tmpxft_000a670e_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2274:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* CURAND API: inizio uso dei PseudoRandom Number Generator
* limitazione a 65535 kernel, lancio monodimensionale/bidimensionale
* attenzione al numero N...non riesco a processare molti dati usando in contemporanea il monitor
*/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <cuda.h>
#include <cura... | /*
* CURAND API: inizio uso dei PseudoRandom Number Generator
* limitazione a 65535 kernel, lancio monodimensionale/bidimensionale
* attenzione al numero N...non riesco a processare molti dati usando in contemporanea il monitor
*/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <hip/hip_runtime.h>
#in... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* CURAND API: inizio uso dei PseudoRandom Number Generator
* limitazione a 65535 kernel, lancio monodimensionale/bidimensionale
* attenzione al numero N...non riesco a processare molti dati usando in contemporanea il monitor
*/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <hip/hip_runtime.h>
#in... | .text
.file "main.hip"
.globl _Z27__device_stub__setup_kernelP18hiprandStateXORWOW # -- Begin function _Z27__device_stub__setup_kernelP18hiprandStateXORWOW
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP18hiprandStateXORWOW,@function
_Z27__device_stub__setup_kernelP18hiprandStateXORWOW: # @_Z27__device_stub__se... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a670e_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2274:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "main.hip"
.globl _Z27__device_stub__setup_kernelP18hiprandStateXORWOW # -- Begin function _Z27__device_stub__setup_kernelP18hiprandStateXORWOW
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP18hiprandStateXORWOW,@function
_Z27__device_stub__setup_kernelP18hiprandStateXORWOW: # @_Z27__device_stub__se... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "FloatVector.cuh"
FloatVector::FloatVector(long height, FLOAT_VEC_TYPE* data) {
this->height = height;
this->data = data;
}
long FloatVector::getHeight() {
return height;
}
FLOAT_VEC_TYPE * FloatVector::getData() {
return data;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "FloatVector.cuh"
FloatVector::FloatVector(long height, FLOAT_VEC_TYPE* data) {
this->height = height;
this->data = data;
}
long FloatVector::getHeight() {
return height;
}
FLOAT_VEC_TYPE * FloatVector::getData() {
return data;
} | .file "tmpxft_000980af_00000000-6_FloatVector.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "FloatVector.cuh"
FloatVector::FloatVector(long height, FLOAT_VEC_TYPE* data) {
this->height = height;
this->data = data;
}
long FloatVector::getHeight() {
return height;
}
FLOAT_VEC_TYPE * FloatVector::getData() {
return data;
} | #pragma once
#include <hip/hip_runtime.h>
#define FLOAT_VEC_TYPE float
class FloatVector{
private:
long height;
FLOAT_VEC_TYPE * data;
public:
FloatVector(long height, FLOAT_VEC_TYPE* data = nullptr);
long getHeight();
FLOAT_VEC_TYPE * getData();
}; |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #pragma once
#include <hip/hip_runtime.h>
#define FLOAT_VEC_TYPE float
class FloatVector{
private:
long height;
FLOAT_VEC_TYPE * data;
public:
FloatVector(long height, FLOAT_VEC_TYPE* data = nullptr);
long getHeight();
FLOAT_VEC_TYPE * getData();
}; | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #pragma once
#include <hip/hip_runtime.h>
#define FLOAT_VEC_TYPE float
class FloatVector{
private:
long height;
FLOAT_VEC_TYPE * data;
public:
FloatVector(long height, FLOAT_VEC_TYPE* data = nullptr);
long getHeight();
FLOAT_VEC_TYPE * getData();
}; | .text
.file "FloatVector.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proj... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000980af_00000000-6_FloatVector.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "FloatVector.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proj... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "planeslicer.cuh"
//#include "stdio.h"
#define flt_eps 1.192092896e-07f
__device__ float dot(float3 a, float3 b)
{
return (a.x * b.x + a.y * b.y + a.z * b.z);
}
__global__ void computeIntersectionWithPlane_Kernel( int numTriangles , float3 *triangles , float3 *edges , int *numEdges , float3 planePosition , flo... | .file "tmpxft_00163cda_00000000-6_planeslicer.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "planeslicer.cuh"
//#include "stdio.h"
#define flt_eps 1.192092896e-07f
__device__ float dot(float3 a, float3 b)
{
return (a.x * b.x + a.y * b.y + a.z * b.z);
}
__global__ void computeIntersectionWithPlane_Kernel( int numTriangles , float3 *triangles , float3 *edges , int *numEdges , float3 planePosition , flo... | #ifndef __PLANESLICER_CUH__
#define __PLANESLICER_CUH__
#include "hip/hip_runtime.h"
#include "hip/hip_runtime_api.h"
hipError_t computeIntersectionWithPlane( int numTriangles, float3 *triangles, float3 planePosition, float3 planeNormal, float3 *edges, int *numEdges );
#endif |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef __PLANESLICER_CUH__
#define __PLANESLICER_CUH__
#include "hip/hip_runtime.h"
#include "hip/hip_runtime_api.h"
hipError_t computeIntersectionWithPlane( int numTriangles, float3 *triangles, float3 planePosition, float3 planeNormal, float3 *edges, int *numEdges );
#endif | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef __PLANESLICER_CUH__
#define __PLANESLICER_CUH__
#include "hip/hip_runtime.h"
#include "hip/hip_runtime_api.h"
hipError_t computeIntersectionWithPlane( int numTriangles, float3 *triangles, float3 planePosition, float3 planeNormal, float3 *edges, int *numEdges );
#endif | .text
.file "planeslicer.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proj... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00163cda_00000000-6_planeslicer.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "planeslicer.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proj... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 2
#define GRID_SIZE 2
#define N GRID_SIZE * BLOCK_SIZE
__global__ void MatrixMul(float *A, float *B, float *C, int n)
{
// Each thread computes a single element of C
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
fl... | code for sm_80
Function : _Z9MatrixMulPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e220000002600 */
/*00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 2
#define GRID_SIZE 2
#define N GRID_SIZE * BLOCK_SIZE
__global__ void MatrixMul(float *A, float *B, float *C, int n)
{
// Each thread computes a single element of C
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
fl... | .file "tmpxft_00168973_00000000-6_Matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 2
#define GRID_SIZE 2
#define N GRID_SIZE * BLOCK_SIZE
__global__ void MatrixMul(float *A, float *B, float *C, int n)
{
// Each thread computes a single element of C
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
fl... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 2
#define GRID_SIZE 2
#define N GRID_SIZE * BLOCK_SIZE
__global__ void MatrixMul(float *A, float *B, float *C, int n)
{
// Each thread computes a single element of C
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 2
#define GRID_SIZE 2
#define N GRID_SIZE * BLOCK_SIZE
__global__ void MatrixMul(float *A, float *B, float *C, int n)
{
// Each thread computes a single element of C
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x... | .text
.file "Matrix.hip"
.globl _Z24__device_stub__MatrixMulPfS_S_i # -- Begin function _Z24__device_stub__MatrixMulPfS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__MatrixMulPfS_S_i,@function
_Z24__device_stub__MatrixMulPfS_S_i: # @_Z24__device_stub__MatrixMulPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00168973_00000000-6_Matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "Matrix.hip"
.globl _Z24__device_stub__MatrixMulPfS_S_i # -- Begin function _Z24__device_stub__MatrixMulPfS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__MatrixMulPfS_S_i,@function
_Z24__device_stub__MatrixMulPfS_S_i: # @_Z24__device_stub__MatrixMulPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#define SIZE 1024
__global__ void VectorAdd(int* a, int* b, int* c, int n)
{
int i = threadIdx.x;
if(i < n)
c[i] = a[i] + b[i];
}
int main()
{
int* a, * b, * c;
cudaMallocManaged(&a, SIZE * sizeof(int));
cudaMallocManaged(&b, SIZE * sizeof(int));
cudaMallocManaged(&c, SIZE * sizeof(int));
for (int i... | code for sm_80
Function : _Z9VectorAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e240000002100 */
/*0020... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#define SIZE 1024
__global__ void VectorAdd(int* a, int* b, int* c, int n)
{
int i = threadIdx.x;
if(i < n)
c[i] = a[i] + b[i];
}
int main()
{
int* a, * b, * c;
cudaMallocManaged(&a, SIZE * sizeof(int));
cudaMallocManaged(&b, SIZE * sizeof(int));
cudaMallocManaged(&c, SIZE * sizeof(int));
for (int i... | .file "tmpxft_000d38ba_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#define SIZE 1024
__global__ void VectorAdd(int* a, int* b, int* c, int n)
{
int i = threadIdx.x;
if(i < n)
c[i] = a[i] + b[i];
}
int main()
{
int* a, * b, * c;
cudaMallocManaged(&a, SIZE * sizeof(int));
cudaMallocManaged(&b, SIZE * sizeof(int));
cudaMallocManaged(&c, SIZE * sizeof(int));
for (int i... |
#include <hip/hip_runtime.h>
#include <stdio.h>
#define SIZE 1024
__global__ void VectorAdd(int* a, int* b, int* c, int n)
{
int i = threadIdx.x;
if(i < n)
c[i] = a[i] + b[i];
}
int main()
{
int* a, * b, * c;
hipMallocManaged(&a, SIZE * sizeof(int));
hipMallocManaged(&b, SIZE * sizeof(int));
hipMallocManaged(&c, SIZE... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. |
#include <hip/hip_runtime.h>
#include <stdio.h>
#define SIZE 1024
__global__ void VectorAdd(int* a, int* b, int* c, int n)
{
int i = threadIdx.x;
if(i < n)
c[i] = a[i] + b[i];
}
int main()
{
int* a, * b, * c;
hipMallocManaged(&a, SIZE * sizeof(int));
hipMallocManaged(&b, SIZE * sizeof(int));
hipMallocManaged(&c, SIZE... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9VectorAddPiS_S_i
.globl _Z9VectorAddPiS_S_i
.p2align 8
.type _Z9VectorAddPiS_S_i,@function
_Z9VectorAddPiS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. |
#include <hip/hip_runtime.h>
#include <stdio.h>
#define SIZE 1024
__global__ void VectorAdd(int* a, int* b, int* c, int n)
{
int i = threadIdx.x;
if(i < n)
c[i] = a[i] + b[i];
}
int main()
{
int* a, * b, * c;
hipMallocManaged(&a, SIZE * sizeof(int));
hipMallocManaged(&b, SIZE * sizeof(int));
hipMallocManaged(&c, SIZE... | .text
.file "kernel.hip"
.globl _Z24__device_stub__VectorAddPiS_S_i # -- Begin function _Z24__device_stub__VectorAddPiS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__VectorAddPiS_S_i,@function
_Z24__device_stub__VectorAddPiS_S_i: # @_Z24__device_stub__VectorAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9VectorAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e240000002100 */
/*0020... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9VectorAddPiS_S_i
.globl _Z9VectorAddPiS_S_i
.p2align 8
.type _Z9VectorAddPiS_S_i,@function
_Z9VectorAddPiS_S_i:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranc... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d38ba_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z24__device_stub__VectorAddPiS_S_i # -- Begin function _Z24__device_stub__VectorAddPiS_S_i
.p2align 4, 0x90
.type _Z24__device_stub__VectorAddPiS_S_i,@function
_Z24__device_stub__VectorAddPiS_S_i: # @_Z24__device_stub__VectorAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /////////////////////////
// matrixVecMult.cu //
// Andrew Krepps //
// Module 6 Assignment //
// 3/12/2018 //
/////////////////////////
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#define MAX_SIZE 8192
///////////////////////////////////////////////////////////////////////////////
/// \brief perform matr... | .file "tmpxft_0007cb44_00000000-6_matrixVecMult.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2167:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /////////////////////////
// matrixVecMult.cu //
// Andrew Krepps //
// Module 6 Assignment //
// 3/12/2018 //
/////////////////////////
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#define MAX_SIZE 8192
///////////////////////////////////////////////////////////////////////////////
/// \brief perform matr... | /////////////////////////
// matrixVecMult.cu //
// Andrew Krepps //
// Module 6 Assignment //
// 3/12/2018 //
/////////////////////////
#include <hip/hip_runtime.h>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#define MAX_SIZE 8192
//////////////////////////////////////////////////////////////////////////... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /////////////////////////
// matrixVecMult.cu //
// Andrew Krepps //
// Module 6 Assignment //
// 3/12/2018 //
/////////////////////////
#include <hip/hip_runtime.h>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#define MAX_SIZE 8192
//////////////////////////////////////////////////////////////////////////... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19matVecMultGlobalMemPKfS0_Pfjj
.globl _Z19matVecMultGlobalMemPKfS0_Pfjj
.p2align 8
.type _Z19matVecMultGlobalMemPKfS0_Pfjj,@function
_Z19matVecMultGlobalMemPKfS0_Pfjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lg... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /////////////////////////
// matrixVecMult.cu //
// Andrew Krepps //
// Module 6 Assignment //
// 3/12/2018 //
/////////////////////////
#include <hip/hip_runtime.h>
#include <chrono>
#include <stdio.h>
#include <stdlib.h>
#define MAX_SIZE 8192
//////////////////////////////////////////////////////////////////////////... | .text
.file "matrixVecMult.hip"
.globl _Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj # -- Begin function _Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj
.p2align 4, 0x90
.type _Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj,@function
_Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj: # @_Z34__device_stub__matVecMul... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007cb44_00000000-6_matrixVecMult.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2167:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "matrixVecMult.hip"
.globl _Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj # -- Begin function _Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj
.p2align 4, 0x90
.type _Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj,@function
_Z34__device_stub__matVecMultGlobalMemPKfS0_Pfjj: # @_Z34__device_stub__matVecMul... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <iostream>
#include <time.h>
#define N 20
#define BLOCK_DIM 10
#define TILE_WIDTH 4
using namespace std;
// 4.2
__global__
void matMultKernel(int *d_M, int *d_N, int *d_P, int Width){
int Row = blockIdx.y*blockDim.y + threadIdx.y;
int Col = blockIdx.x*bl... | .file "tmpxft_00074470_00000000-6_cudaMultMatrix.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <iostream>
#include <time.h>
#define N 20
#define BLOCK_DIM 10
#define TILE_WIDTH 4
using namespace std;
// 4.2
__global__
void matMultKernel(int *d_M, int *d_N, int *d_P, int Width){
int Row = blockIdx.y*blockDim.y + threadIdx.y;
int Col = blockIdx.x*bl... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <iostream>
#include <time.h>
#define N 20
#define BLOCK_DIM 10
#define TILE_WIDTH 4
using namespace std;
// 4.2
__global__
void matMultKernel(int *d_M, int *d_N, int *d_P, int Width){
int Row = blockIdx.y*blockDim.y + threadI... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <iostream>
#include <time.h>
#define N 20
#define BLOCK_DIM 10
#define TILE_WIDTH 4
using namespace std;
// 4.2
__global__
void matMultKernel(int *d_M, int *d_N, int *d_P, int Width){
int Row = blockIdx.y*blockDim.y + threadI... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13matMultKernelPiS_S_i
.globl _Z13matMultKernelPiS_S_i
.p2align 8
.type _Z13matMultKernelPiS_S_i,@function
_Z13matMultKernelPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <iostream>
#include <time.h>
#define N 20
#define BLOCK_DIM 10
#define TILE_WIDTH 4
using namespace std;
// 4.2
__global__
void matMultKernel(int *d_M, int *d_N, int *d_P, int Width){
int Row = blockIdx.y*blockDim.y + threadI... | .text
.file "cudaMultMatrix.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__matMultKernelPiS_S_i # -- Begin function _Z28__device_stub__matMultKernel... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00074470_00000000-6_cudaMultMatrix.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... | .text
.file "cudaMultMatrix.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__matMultKernelPiS_S_i # -- Begin function _Z28__device_stub__matMultKernel... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /************* add vector ******************************************************/
#include <stdio.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <cuda_runtime.h>
#include <curand.h>
#include <curand_kernel.h>
#define PI 3.14159265359
/**************************************************************... | .file "tmpxft_00136fef_00000000-6_genetic_algorithm_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2274:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /************* add vector ******************************************************/
#include <stdio.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <cuda_runtime.h>
#include <curand.h>
#include <curand_kernel.h>
#define PI 3.14159265359
/**************************************************************... | /************* add vector ******************************************************/
#include <stdio.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#define PI 3.14159265359
/*****************************************... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /************* add vector ******************************************************/
#include <stdio.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#define PI 3.14159265359
/*****************************************... | .text
.file "genetic_algorithm_cuda.hip"
.globl _Z29__device_stub__initialize_popPfi # -- Begin function _Z29__device_stub__initialize_popPfi
.p2align 4, 0x90
.type _Z29__device_stub__initialize_popPfi,@function
_Z29__device_stub__initialize_popPfi: # @_Z29__device_stub__initialize_popPfi
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00136fef_00000000-6_genetic_algorithm_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2274:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... | .text
.file "genetic_algorithm_cuda.hip"
.globl _Z29__device_stub__initialize_popPfi # -- Begin function _Z29__device_stub__initialize_popPfi
.p2align 4, 0x90
.type _Z29__device_stub__initialize_popPfi,@function
_Z29__device_stub__initialize_popPfi: # @_Z29__device_stub__initialize_popPfi
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
__global__ void myKernel(int64_t **dA) {
for (int i = 0; i < 2; i++) {
for (int j = 0; j < 256*(i+1); j++) {
dA[i][j] = dA[i][j] + 1;
}
}
}
extern "C" {
void kernelLOW(int64_t **hPtrs, size_t *hPtrSizes, int64_t N) {
int64_t **dA = (int64_t**)malloc(sizeof(int64_t*)*N);
for (int i = 0; i < N; i++) {
c... | .file "tmpxft_000d1929_00000000-6_jagged.kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
__global__ void myKernel(int64_t **dA) {
for (int i = 0; i < 2; i++) {
for (int j = 0; j < 256*(i+1); j++) {
dA[i][j] = dA[i][j] + 1;
}
}
}
extern "C" {
void kernelLOW(int64_t **hPtrs, size_t *hPtrSizes, int64_t N) {
int64_t **dA = (int64_t**)malloc(sizeof(int64_t*)*N);
for (int i = 0; i < N; i++) {
c... | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void myKernel(int64_t **dA) {
for (int i = 0; i < 2; i++) {
for (int j = 0; j < 256*(i+1); j++) {
dA[i][j] = dA[i][j] + 1;
}
}
}
extern "C" {
void kernelLOW(int64_t **hPtrs, size_t *hPtrSizes, int64_t N) {
int64_t **dA = (int64_t**)malloc(sizeof(int64_t*)*N);
fo... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void myKernel(int64_t **dA) {
for (int i = 0; i < 2; i++) {
for (int j = 0; j < 256*(i+1); j++) {
dA[i][j] = dA[i][j] + 1;
}
}
}
extern "C" {
void kernelLOW(int64_t **hPtrs, size_t *hPtrSizes, int64_t N) {
int64_t **dA = (int64_t**)malloc(sizeof(int64_t*)*N);
fo... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8myKernelPPl
.globl _Z8myKernelPPl
.p2align 8
.type _Z8myKernelPPl,@function
_Z8myKernelPPl:
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s3, 0
s_mov_b32 s6, 0
.p2align 6
.LBB0_1:
s_delay_alu in... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
__global__ void myKernel(int64_t **dA) {
for (int i = 0; i < 2; i++) {
for (int j = 0; j < 256*(i+1); j++) {
dA[i][j] = dA[i][j] + 1;
}
}
}
extern "C" {
void kernelLOW(int64_t **hPtrs, size_t *hPtrSizes, int64_t N) {
int64_t **dA = (int64_t**)malloc(sizeof(int64_t*)*N);
fo... | .text
.file "jagged.kernel.hip"
.globl _Z23__device_stub__myKernelPPl # -- Begin function _Z23__device_stub__myKernelPPl
.p2align 4, 0x90
.type _Z23__device_stub__myKernelPPl,@function
_Z23__device_stub__myKernelPPl: # @_Z23__device_stub__myKernelPPl
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 8... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d1929_00000000-6_jagged.kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "jagged.kernel.hip"
.globl _Z23__device_stub__myKernelPPl # -- Begin function _Z23__device_stub__myKernelPPl
.p2align 4, 0x90
.type _Z23__device_stub__myKernelPPl,@function
_Z23__device_stub__myKernelPPl: # @_Z23__device_stub__myKernelPPl
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 8... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////... | code for sm_80
Function : _Z10bestFilterPKdPKbPKiS4_PKfPiPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////... | .file "tmpxft_00087361_00000000-6_bestFilter.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////... | #include <hip/hip_runtime.h>
#include "includes.h"
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10bestFilterPKdPKbPKiS4_PKfPiPf
.globl _Z10bestFilterPKdPKbPKiS4_PKfPiPf
.p2align 8
.type _Z10bestFilterPKdPKbPKiS4_PKfPiPf,@function
_Z10bestFilterPKdPKbPKiS4_PKfPiPf:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s6, s[0:1], 0x44
s_waitcnt... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////... | .text
.file "bestFilter.hip"
.globl _Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf # -- Begin function _Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf
.p2align 4, 0x90
.type _Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf,@function
_Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf: # @_Z25__device_stub__bestFilterPK... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10bestFilterPKdPKbPKiS4_PKfPiPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10bestFilterPKdPKbPKiS4_PKfPiPf
.globl _Z10bestFilterPKdPKbPKiS4_PKfPiPf
.p2align 8
.type _Z10bestFilterPKdPKbPKiS4_PKfPiPf,@function
_Z10bestFilterPKdPKbPKiS4_PKfPiPf:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s6, s[0:1], 0x44
s_waitcnt... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00087361_00000000-6_bestFilter.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "bestFilter.hip"
.globl _Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf # -- Begin function _Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf
.p2align 4, 0x90
.type _Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf,@function
_Z25__device_stub__bestFilterPKdPKbPKiS4_PKfPiPf: # @_Z25__device_stub__bestFilterPK... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define DIM 3
#define GRID 16
#define VALIDATE 10
// function declarations
void validate_grid (const float *c, const float *intervals, const int *grid_c,
const int *points_block_c, int D);
void validate_search (const float *q, const float *c... | .file "tmpxft_000da37a_00000000-6_search_gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define DIM 3
#define GRID 16
#define VALIDATE 10
// function declarations
void validate_grid (const float *c, const float *intervals, const int *grid_c,
const int *points_block_c, int D);
void validate_search (const float *q, const float *c... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define DIM 3
#define GRID 16
#define VALIDATE 10
// function declarations
void validate_grid (const float *c, const float *intervals, const int *grid_c,
const int *points_block_c, int D);
void validate_search (c... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define DIM 3
#define GRID 16
#define VALIDATE 10
// function declarations
void validate_grid (const float *c, const float *intervals, const int *grid_c,
const int *points_block_c, int D);
void validate_search (c... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17find_grid_loc_gpuPfPiiii
.globl _Z17find_grid_loc_gpuPfPiiii
.p2align 8
.type _Z17find_grid_loc_gpuPfPiiii,@function
_Z17find_grid_loc_gpuPfPiiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x10
s_add_u32 s2, s0, 32
s_addc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <math.h>
#define DIM 3
#define GRID 16
#define VALIDATE 10
// function declarations
void validate_grid (const float *c, const float *intervals, const int *grid_c,
const int *points_block_c, int D);
void validate_search (c... | .text
.file "search_gpu.hip"
.globl _Z32__device_stub__find_grid_loc_gpuPfPiiii # -- Begin function _Z32__device_stub__find_grid_loc_gpuPfPiiii
.p2align 4, 0x90
.type _Z32__device_stub__find_grid_loc_gpuPfPiiii,@function
_Z32__device_stub__find_grid_loc_gpuPfPiiii: # @_Z32__device_stub__find_grid_loc_gpuPfPiiii
.cfi_st... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
* Author:易培淮
* Mail:yiph@ihep.ac.cn
* Function:Accelerate simulation with Single GPU
* 2018/11/27
*/
#include <cuda.h>
#include <cuda_runtime_api.h>
#include <curand.h>
#include <curand_kernel.h>
#include <stdio.h>
#include <math_constants.h>
#include <assert.h>
typedef struct res_arr
{
double *arr;
int *pmt_list;
... | /**
* Author:易培淮
* Mail:yiph@ihep.ac.cn
* Function:Accelerate simulation with Single GPU
* 2018/11/27
*/
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <stdio.h>
#include <hip/hip_math_constants.h>
#include <assert.h>
typedef struc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* Author:易培淮
* Mail:yiph@ihep.ac.cn
* Function:Accelerate simulation with Single GPU
* 2018/11/27
*/
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <stdio.h>
#include <hip/hip_math_constants.h>
#include <assert.h>
typedef struc... | .text
.file "check.hip"
.globl _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i # -- Begin function _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
.p2align 4, 0x90
.type _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@function
_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i:... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
#include <cmath>
__global__ void fibonacci_kernel(double* a, int n) {
unsigned int index = threadIdx.x;
if (index < n)
a[index] = (pow((1 + sqrt(5.0)) / 2, index) - pow((1 - sqrt(5... | .file "tmpxft_000286d2_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3677:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
#include <cmath>
__global__ void fibonacci_kernel(double* a, int n) {
unsigned int index = threadIdx.x;
if (index < n)
a[index] = (pow((1 + sqrt(5.0)) / 2, index) - pow((1 - sqrt(5... | #include "hip/hip_runtime.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
#include <cmath>
__global__ void fibonacci_kernel(double* a, int n) {
unsigned int index = threadIdx.x;
if (index < n)
a[index] = (pow((1 + sqrt(5.0)) / 2, index) - pow((1 - sqrt(5.0)) / 2, index)) / sqrt(5.0);
}
cl... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
#include <cmath>
__global__ void fibonacci_kernel(double* a, int n) {
unsigned int index = threadIdx.x;
if (index < n)
a[index] = (pow((1 + sqrt(5.0)) / 2, index) - pow((1 - sqrt(5.0)) / 2, index)) / sqrt(5.0);
}
cl... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16fibonacci_kernelPdi
.globl _Z16fibonacci_kernelPdi
.p2align 8
.type _Z16fibonacci_kernelPdi,@function
_Z16fibonacci_kernelPdi:
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
v_cmp_gt_u32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
#include <cmath>
__global__ void fibonacci_kernel(double* a, int n) {
unsigned int index = threadIdx.x;
if (index < n)
a[index] = (pow((1 + sqrt(5.0)) / 2, index) - pow((1 - sqrt(5.0)) / 2, index)) / sqrt(5.0);
}
cl... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__fibonacci_kernelPdi # -- Begin function _Z31__device_stub__fibonacci_kernelPdi
.p2a... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000286d2_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3677:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__fibonacci_kernelPdi # -- Begin function _Z31__device_stub__fibonacci_kernelPdi
.p2a... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <cuda_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
namespace impl {
template <typename T, int channels>
__global__ void normalize(const T* src, int height, int width, int stride, float* output,
const float3 mean, cons... | code for sm_80
Function : _ZN8mmdeploy9operation4cuda4impl9normalizeIfLi1EEEvPKT_iiiPf6float3S8_b
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <cuda_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
namespace impl {
template <typename T, int channels>
__global__ void normalize(const T* src, int height, int width, int stride, float* output,
const float3 mean, cons... | .file "tmpxft_0010a54c_00000000-6_normalize.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL85__device_stub__ZN8mmdeploy9operation4cuda4impl9normalizeIhLi3EEEvPKT_iiiPf6float3S8_bPKhiiiPfRK6float3S4_b, @function
_ZL85__device_stub__ZN8mmdeploy9operation4cuda4impl9normalizeIhLi3EEEvPKT_iiiPf6float3S8_bPKhiiiPfRK6float3S4_b:
.L... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Copyright (c) OpenMMLab. All rights reserved.
#include <cuda_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
namespace impl {
template <typename T, int channels>
__global__ void normalize(const T* src, int height, int width, int stride, float* output,
const float3 mean, cons... | // Copyright (c) OpenMMLab. All rights reserved.
#include <hip/hip_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
namespace impl {
template <typename T, int channels>
__global__ void normalize(const T* src, int height, int width, int stride, float* output,
const float3 mean, c... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <hip/hip_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
namespace impl {
template <typename T, int channels>
__global__ void normalize(const T* src, int height, int width, int stride, float* output,
const float3 mean, c... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZN8mmdeploy9operation4cuda4impl9normalizeIhLi3EEEvPKT_iiiPf15HIP_vector_typeIfLj3EES9_b,"axG",@progbits,_ZN8mmdeploy9operation4cuda4impl9normalizeIhLi3EEEvPKT_iiiPf15HIP_vector_typeIfLj3EES9_b,comdat
.protected _ZN8mmdeploy9operation4cuda4impl9normalizeI... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <hip/hip_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
namespace impl {
template <typename T, int channels>
__global__ void normalize(const T* src, int height, int width, int stride, float* output,
const float3 mean, c... | .text
.file "normalize.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _ZN8mmdeploy9operation4cuda4impl9NormalizeIhLi3EEEvPKT_iiiPfPKfS9_bP12ihipStream_t
.LCPI0_0:
.long 0x3f800000 # float 1
.section .text._ZN8mmdeploy9operation4cuda4impl9Nor... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //合并 访存
#include<stdio.h>
#include<math.h>
#include<time.h>
#include <stdlib.h>
int Max=16384;
int width=32;
typedef struct {
double A1;
double A2;
double A3;
double A4;
}stru;
__global__ void multi(stru *A,stru *b,double *C,const int Max){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int idy = blockIdx.y * blockD... | code for sm_80
Function : _Z5multiP4struS0_Pdi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e28... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //合并 访存
#include<stdio.h>
#include<math.h>
#include<time.h>
#include <stdlib.h>
int Max=16384;
int width=32;
typedef struct {
double A1;
double A2;
double A3;
double A4;
}stru;
__global__ void multi(stru *A,stru *b,double *C,const int Max){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int idy = blockIdx.y * blockD... | .file "tmpxft_0001da85_00000000-6_ex7_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //合并 访存
#include<stdio.h>
#include<math.h>
#include<time.h>
#include <stdlib.h>
int Max=16384;
int width=32;
typedef struct {
double A1;
double A2;
double A3;
double A4;
}stru;
__global__ void multi(stru *A,stru *b,double *C,const int Max){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
int idy = blockIdx.y * blockD... | //合并 访存
#include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#include<time.h>
#include <stdlib.h>
int Max=16384;
int width=32;
typedef struct {
double A1;
double A2;
double A3;
double A4;
}stru;
__global__ void multi(stru *A,stru *b,double *C,const int Max){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //合并 访存
#include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#include<time.h>
#include <stdlib.h>
int Max=16384;
int width=32;
typedef struct {
double A1;
double A2;
double A3;
double A4;
}stru;
__global__ void multi(stru *A,stru *b,double *C,const int Max){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5multiP4struS0_Pdi
.globl _Z5multiP4struS0_Pdi
.p2align 8
.type _Z5multiP4struS0_Pdi,@function
_Z5multiP4struS0_Pdi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //合并 访存
#include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#include<time.h>
#include <stdlib.h>
int Max=16384;
int width=32;
typedef struct {
double A1;
double A2;
double A3;
double A4;
}stru;
__global__ void multi(stru *A,stru *b,double *C,const int Max){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
... | .text
.file "ex7_2.hip"
.globl _Z20__device_stub__multiP4struS0_Pdi # -- Begin function _Z20__device_stub__multiP4struS0_Pdi
.p2align 4, 0x90
.type _Z20__device_stub__multiP4struS0_Pdi,@function
_Z20__device_stub__multiP4struS0_Pdi: # @_Z20__device_stub__multiP4struS0_Pdi
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5multiP4struS0_Pdi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e28... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5multiP4struS0_Pdi
.globl _Z5multiP4struS0_Pdi
.p2align 8
.type _Z5multiP4struS0_Pdi,@function
_Z5multiP4struS0_Pdi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001da85_00000000-6_ex7_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "ex7_2.hip"
.globl _Z20__device_stub__multiP4struS0_Pdi # -- Begin function _Z20__device_stub__multiP4struS0_Pdi
.p2align 4, 0x90
.type _Z20__device_stub__multiP4struS0_Pdi,@function
_Z20__device_stub__multiP4struS0_Pdi: # @_Z20__device_stub__multiP4struS0_Pdi
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <math.h>
#include <stdint.h>
#include <stdio.h>
__device__ uint8_t median_pixel(uint8_t *pixels, int stride_H, int stride_W, int size_H, int size_W) {
int hist[256];
for (int i = 0; i < 256; i++) {
hist[i] = 0;
}
for (int i = 0; i < size_H; i++) {
for (int j = 0; j < size_W; j++) {
uint8_t pix = pixels[i*strid... | .file "tmpxft_0015a525_00000000-6_median_filter.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <math.h>
#include <stdint.h>
#include <stdio.h>
__device__ uint8_t median_pixel(uint8_t *pixels, int stride_H, int stride_W, int size_H, int size_W) {
int hist[256];
for (int i = 0; i < 256; i++) {
hist[i] = 0;
}
for (int i = 0; i < size_H; i++) {
for (int j = 0; j < size_W; j++) {
uint8_t pix = pixels[i*strid... | #include <hip/hip_runtime.h>
#include <math.h>
#include <stdint.h>
#include <stdio.h>
__device__ uint8_t median_pixel(uint8_t *pixels, int stride_H, int stride_W, int size_H, int size_W) {
int hist[256];
for (int i = 0; i < 256; i++) {
hist[i] = 0;
}
for (int i = 0; i < size_H; i++) {
for (int j = 0; j < size_W; j++) {... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <math.h>
#include <stdint.h>
#include <stdio.h>
__device__ uint8_t median_pixel(uint8_t *pixels, int stride_H, int stride_W, int size_H, int size_W) {
int hist[256];
for (int i = 0; i < 256; i++) {
hist[i] = 0;
}
for (int i = 0; i < size_H; i++) {
for (int j = 0; j < size_W; j++) {... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26apply_median_filter_kernelPhS_iiiii
.globl _Z26apply_median_filter_kernelPhS_iiiii
.p2align 8
.type _Z26apply_median_filter_kernelPhS_iiiii,@function
_Z26apply_median_filter_kernelPhS_iiiii:
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x34
s_load_b128 s[4:7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <math.h>
#include <stdint.h>
#include <stdio.h>
__device__ uint8_t median_pixel(uint8_t *pixels, int stride_H, int stride_W, int size_H, int size_W) {
int hist[256];
for (int i = 0; i < 256; i++) {
hist[i] = 0;
}
for (int i = 0; i < size_H; i++) {
for (int j = 0; j < size_W; j++) {... | .text
.file "median_filter.hip"
.globl _Z41__device_stub__apply_median_filter_kernelPhS_iiiii # -- Begin function _Z41__device_stub__apply_median_filter_kernelPhS_iiiii
.p2align 4, 0x90
.type _Z41__device_stub__apply_median_filter_kernelPhS_iiiii,@function
_Z41__device_stub__apply_median_filter_kernelPhS_iiiii: # @_Z41... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015a525_00000000-6_median_filter.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "median_filter.hip"
.globl _Z41__device_stub__apply_median_filter_kernelPhS_iiiii # -- Begin function _Z41__device_stub__apply_median_filter_kernelPhS_iiiii
.p2align 4, 0x90
.type _Z41__device_stub__apply_median_filter_kernelPhS_iiiii,@function
_Z41__device_stub__apply_median_filter_kernelPhS_iiiii: # @_Z41... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* Adding two vectors using CUDA
*/
#include<iostream>
#include<stdio.h>
#include<math.h>
using namespace::std;
__global__
void add(int n, float *x, float *y){
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for(int i=index; i< n ; i+=stride){
y[i] = x[i] + y[i];
if( blockIdx.... | code for sm_80
Function : _Z3addiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R16, SR_CTAID.X ; /* 0x0000000000107919 */
/* 0x000e2200000025... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* Adding two vectors using CUDA
*/
#include<iostream>
#include<stdio.h>
#include<math.h>
using namespace::std;
__global__
void add(int n, float *x, float *y){
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for(int i=index; i< n ; i+=stride){
y[i] = x[i] + y[i];
if( blockIdx.... | .file "tmpxft_0012abf7_00000000-6_add_cuda.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaU... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* Adding two vectors using CUDA
*/
#include<iostream>
#include<stdio.h>
#include<math.h>
using namespace::std;
__global__
void add(int n, float *x, float *y){
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for(int i=index; i< n ; i+=stride){
y[i] = x[i] + y[i];
if( blockIdx.... | /*
* Adding two vectors using CUDA
*/
#include <hip/hip_runtime.h>
#include<iostream>
#include<stdio.h>
#include<math.h>
using namespace::std;
__global__
void add(int n, float *x, float *y){
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for(int i=index; i< n ; i+=stride){
y[i]... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.