code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module sky130_fd_sc_hd__probe_p (
X,
A
);
// Module ports
output X;
input A;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf0_out_X;
// Name Output Other arguments
buf buf0 (buf0_out_X, A);
buf buf1 (X, buf0_out_X);
endmodu... | 7.212805 |
module sky130_fd_sc_hd__probe_p_8 (
X,
A,
VGND,
VNB,
VPB,
VPWR
);
output X;
input A;
input VGND;
input VNB;
input VPB;
input VPWR;
sky130_fd_sc_hd__probe_p base (
.X(X),
.A(A),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB),
.VPWR(VPWR)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__probe_p_8 (
X,
A
);
output X;
input A;
// Voltage supply signals
supply0 VGND;
supply0 VNB;
supply1 VPB;
supply1 VPWR;
sky130_fd_sc_hd__probe_p base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__probec_p (
X,
A,
VGND,
VNB,
VPB,
VPWR
);
// Module ports
output X;
input A;
input VGND;
input VNB;
input VPB;
input VPWR;
// Local signals
wire buf0_out_X;
wire pwrgood_pp0_out_X;
// Name Output ... | 7.212805 |
module sky130_fd_sc_hd__probec_p (
X,
A
);
// Module ports
output X;
input A;
// Local signals
wire buf0_out_X;
// Name Output Other arguments
buf buf0 (buf0_out_X, A);
buf buf1 (X, buf0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__probec_p (
X,
A
);
// Module ports
output X;
input A;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf0_out_X;
// Name Output Other arguments
buf buf0 (buf0_out_X, A);
buf buf1 (X, buf0_out_X);
endmod... | 7.212805 |
module sky130_fd_sc_hd__probec_p_8 (
X,
A,
VGND,
VNB,
VPB,
VPWR
);
output X;
input A;
input VGND;
input VNB;
input VPB;
input VPWR;
sky130_fd_sc_hd__probec_p base (
.X(X),
.A(A),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB),
.VPWR(VPWR)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__probec_p_8 (
X,
A
);
output X;
input A;
// Voltage supply signals
supply0 VGND;
supply0 VNB;
supply1 VPB;
supply1 VPWR;
sky130_fd_sc_hd__probec_p base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__sdfbbn (
Q,
Q_N,
D,
SCD,
SCE,
CLK_N,
SET_B,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK_N;
input SET_B;
input RESET_B;
input VPWR;
input VGND;
input VPB;
... | 7.212805 |
module sky130_fd_sc_hd__sdfbbn (
Q ,
Q_N ,
D ,
SCD ,
SCE ,
CLK_N ,
SET_B ,
RESET_B
);
// Module ports
output Q ;
output Q_N ;
input D ;
input SCD ;
input SCE ;
input CLK_N ;
input SET_B ;
input RESET_B;
... | 7.212805 |
module sky130_fd_sc_hd__sdfbbn (
Q,
Q_N,
D,
SCD,
SCE,
CLK_N,
SET_B,
RESET_B
);
// Module ports
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK_N;
input SET_B;
input RESET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 V... | 7.212805 |
module sky130_fd_sc_hd__sdfbbn_1 (
Q,
Q_N,
D,
SCD,
SCE,
CLK_N,
SET_B,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK_N;
input SET_B;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sk... | 7.212805 |
module sky130_fd_sc_hd__sdfbbn_1 (
Q,
Q_N,
D,
SCD,
SCE,
CLK_N,
SET_B,
RESET_B
);
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK_N;
input SET_B;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sk... | 7.212805 |
module sky130_fd_sc_hd__sdfbbn_2 (
Q,
Q_N,
D,
SCD,
SCE,
CLK_N,
SET_B,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK_N;
input SET_B;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sk... | 7.212805 |
module sky130_fd_sc_hd__sdfbbn_2 (
Q,
Q_N,
D,
SCD,
SCE,
CLK_N,
SET_B,
RESET_B
);
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK_N;
input SET_B;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sk... | 7.212805 |
module sky130_fd_sc_hd__sdfbbp (
Q,
Q_N,
D,
SCD,
SCE,
CLK,
SET_B,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK;
input SET_B;
input RESET_B;
input VPWR;
input VGND;
input VPB;
inp... | 7.212805 |
module sky130_fd_sc_hd__sdfbbp (
Q ,
Q_N ,
D ,
SCD ,
SCE ,
CLK ,
SET_B ,
RESET_B
);
// Module ports
output Q ;
output Q_N ;
input D ;
input SCD ;
input SCE ;
input CLK ;
input SET_B ;
input RESET_B;
... | 7.212805 |
module sky130_fd_sc_hd__sdfbbp (
Q,
Q_N,
D,
SCD,
SCE,
CLK,
SET_B,
RESET_B
);
// Module ports
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK;
input SET_B;
input RESET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
... | 7.212805 |
module sky130_fd_sc_hd__sdfbbp_1 (
Q,
Q_N,
D,
SCD,
SCE,
CLK,
SET_B,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK;
input SET_B;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130... | 7.212805 |
module sky130_fd_sc_hd__sdfbbp_1 (
Q,
Q_N,
D,
SCD,
SCE,
CLK,
SET_B,
RESET_B
);
output Q;
output Q_N;
input D;
input SCD;
input SCE;
input CLK;
input SET_B;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signal... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp (
Q ,
Q_N ,
CLK ,
D ,
SCD ,
SCE ,
RESET_B
);
// Module ports
output Q ;
output Q_N ;
input CLK ;
input D ;
input SCD ;
input SCE ;
input RESET_B;
// Local signals
wire bu... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
RESET_B
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp_1 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfrbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp_1 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
RESET_B
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfrbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp_2 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfrbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfrbp_2 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
RESET_B
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfrbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfrtn (
Q,
CLK_N,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
input CLK_N;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire buf_Q;
w... | 7.212805 |
module sky130_fd_sc_hd__sdfrtn (
Q ,
CLK_N ,
D ,
SCD ,
SCE ,
RESET_B
);
// Module ports
output Q ;
input CLK_N ;
input D ;
input SCD ;
input SCE ;
input RESET_B;
// Local signals
wire buf_Q ;
wire RESET ;
wire... | 7.212805 |
module sky130_fd_sc_hd__sdfrtn (
Q,
CLK_N,
D,
SCD,
SCE,
RESET_B
);
// Module ports
output Q;
input CLK_N;
input D;
input SCD;
input SCE;
input RESET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q;
wire ... | 7.212805 |
module sky130_fd_sc_hd__sdfrtn_1 (
Q,
CLK_N,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK_N;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfrtn base (
.Q(Q),
.... | 7.212805 |
module sky130_fd_sc_hd__sdfrtn_1 (
Q,
CLK_N,
D,
SCD,
SCE,
RESET_B
);
output Q;
input CLK_N;
input D;
input SCD;
input SCE;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfrtn base (
.Q(Q),
.... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp (
Q,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire buf_Q;
wire ... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp (
Q ,
CLK ,
D ,
SCD ,
SCE ,
RESET_B
);
// Module ports
output Q ;
input CLK ;
input D ;
input SCD ;
input SCE ;
input RESET_B;
// Local signals
wire buf_Q ;
wire RESET ;
wire... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp (
Q,
CLK,
D,
SCD,
SCE,
RESET_B
);
// Module ports
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q;
wire RE... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp_1 (
Q,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfrtp base (
.Q(Q),
.CLK(... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp_1 (
Q,
CLK,
D,
SCD,
SCE,
RESET_B
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfrtp base (
.Q(Q),
.CLK(... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp_2 (
Q,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfrtp base (
.Q(Q),
.CLK(... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp_2 (
Q,
CLK,
D,
SCD,
SCE,
RESET_B
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfrtp base (
.Q(Q),
.CLK(... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp_4 (
Q,
CLK,
D,
SCD,
SCE,
RESET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfrtp base (
.Q(Q),
.CLK(... | 7.212805 |
module sky130_fd_sc_hd__sdfrtp_4 (
Q,
CLK,
D,
SCD,
SCE,
RESET_B
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input RESET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfrtp base (
.Q(Q),
.CLK(... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp (
Q ,
Q_N ,
CLK ,
D ,
SCD ,
SCE ,
SET_B
);
// Module ports
output Q ;
output Q_N ;
input CLK ;
input D ;
input SCD ;
input SCE ;
input SET_B;
// Local signals
wire buf_Q ;
wire SET ;
... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
SET_B
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire ... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp_1 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfsbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp_1 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
SET_B
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfsbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp_2 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfsbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfsbp_2 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
SET_B
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfsbp base (
... | 7.212805 |
module sky130_fd_sc_hd__sdfstp (
Q,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire buf_Q;
wire SET;... | 7.212805 |
module sky130_fd_sc_hd__sdfstp (
Q ,
CLK ,
D ,
SCD ,
SCE ,
SET_B
);
// Module ports
output Q ;
input CLK ;
input D ;
input SCD ;
input SCE ;
input SET_B;
// Local signals
wire buf_Q ;
wire SET ;
wire mux_out;
// ... | 7.212805 |
module sky130_fd_sc_hd__sdfstp (
Q,
CLK,
D,
SCD,
SCE,
SET_B
);
// Module ports
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q;
wire SET;
... | 7.212805 |
module sky130_fd_sc_hd__sdfstp_1 (
Q,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfstp base (
.Q(Q),
.CLK(CLK)... | 7.212805 |
module sky130_fd_sc_hd__sdfstp_1 (
Q,
CLK,
D,
SCD,
SCE,
SET_B
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfstp base (
.Q(Q),
.CLK(CLK)... | 7.212805 |
module sky130_fd_sc_hd__sdfstp_2 (
Q,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfstp base (
.Q(Q),
.CLK(CLK)... | 7.212805 |
module sky130_fd_sc_hd__sdfstp_2 (
Q,
CLK,
D,
SCD,
SCE,
SET_B
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfstp base (
.Q(Q),
.CLK(CLK)... | 7.212805 |
module sky130_fd_sc_hd__sdfstp_4 (
Q,
CLK,
D,
SCD,
SCE,
SET_B,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfstp base (
.Q(Q),
.CLK(CLK)... | 7.212805 |
module sky130_fd_sc_hd__sdfstp_4 (
Q,
CLK,
D,
SCD,
SCE,
SET_B
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input SET_B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfstp base (
.Q(Q),
.CLK(CLK)... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire buf_Q;
wire mux_out... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp (
Q ,
Q_N,
CLK,
D ,
SCD,
SCE
);
// Module ports
output Q ;
output Q_N;
input CLK;
input D ;
input SCD;
input SCE;
// Local signals
wire buf_Q ;
wire mux_out;
// Delay Name ... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp (
Q,
Q_N,
CLK,
D,
SCD,
SCE
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q;
wire mux_out;
... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp_1 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfxbp base (
.Q(Q),
.Q_N(Q_N),
... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp_1 (
Q,
Q_N,
CLK,
D,
SCD,
SCE
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfxbp base (
.Q (Q),
.Q_N(Q_N),... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp_2 (
Q,
Q_N,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfxbp base (
.Q(Q),
.Q_N(Q_N),
... | 7.212805 |
module sky130_fd_sc_hd__sdfxbp_2 (
Q,
Q_N,
CLK,
D,
SCD,
SCE
);
output Q;
output Q_N;
input CLK;
input D;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfxbp base (
.Q (Q),
.Q_N(Q_N),... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp (
Q,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire buf_Q;
wire mux_out;
reg notifier;
wi... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp (
Q ,
CLK,
D ,
SCD,
SCE
);
// Module ports
output Q ;
input CLK;
input D ;
input SCD;
input SCE;
// Local signals
wire buf_Q ;
wire mux_out;
// Delay Name Output Other argument... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp (
Q,
CLK,
D,
SCD,
SCE
);
// Module ports
output Q;
input CLK;
input D;
input SCD;
input SCE;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q;
wire mux_out;
reg notifier;
w... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp_1 (
Q,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfxtp base (
.Q(Q),
.CLK(CLK),
.D(D),
.SCD(... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp_1 (
Q,
CLK,
D,
SCD,
SCE
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfxtp base (
.Q (Q),
.CLK(CLK),
.D (D),
.... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp_2 (
Q,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfxtp base (
.Q(Q),
.CLK(CLK),
.D(D),
.SCD(... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp_2 (
Q,
CLK,
D,
SCD,
SCE
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfxtp base (
.Q (Q),
.CLK(CLK),
.D (D),
.... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp_4 (
Q,
CLK,
D,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdfxtp base (
.Q(Q),
.CLK(CLK),
.D(D),
.SCD(... | 7.212805 |
module sky130_fd_sc_hd__sdfxtp_4 (
Q,
CLK,
D,
SCD,
SCE
);
output Q;
input CLK;
input D;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdfxtp base (
.Q (Q),
.CLK(CLK),
.D (D),
.... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp (
GCLK,
SCE,
GATE,
CLK,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output GCLK;
input SCE;
input GATE;
input CLK;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire m0;
wire m0n;
wire clkn;
wire CLK_delayed;
wi... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp (
GCLK,
SCE,
GATE,
CLK
);
// Module ports
output GCLK;
input SCE;
input GATE;
input CLK;
// Local signals
wire m0;
wire m0n;
wire clkn;
wire SCE_GATE;
// Name Output Other arguments
not not0 (m0n, m0);
not not... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp (
GCLK,
SCE,
GATE,
CLK
);
// Module ports
output GCLK;
input SCE;
input GATE;
input CLK;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire m0;
wire m0n;
wire clkn;
wire CLK_delayed;
... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp_1 (
GCLK,
SCE,
GATE,
CLK,
VPWR,
VGND,
VPB,
VNB
);
output GCLK;
input SCE;
input GATE;
input CLK;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdlclkp base (
.GCLK(GCLK),
.SCE (SCE),
.GATE(GATE),
... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp_1 (
GCLK,
SCE,
GATE,
CLK
);
output GCLK;
input SCE;
input GATE;
input CLK;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdlclkp base (
.GCLK(GCLK),
.SCE (SCE),
.GATE(GATE),
... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp_2 (
GCLK,
SCE,
GATE,
CLK,
VPWR,
VGND,
VPB,
VNB
);
output GCLK;
input SCE;
input GATE;
input CLK;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdlclkp base (
.GCLK(GCLK),
.SCE (SCE),
.GATE(GATE),
... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp_2 (
GCLK,
SCE,
GATE,
CLK
);
output GCLK;
input SCE;
input GATE;
input CLK;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdlclkp base (
.GCLK(GCLK),
.SCE (SCE),
.GATE(GATE),
... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp_4 (
GCLK,
SCE,
GATE,
CLK,
VPWR,
VGND,
VPB,
VNB
);
output GCLK;
input SCE;
input GATE;
input CLK;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sdlclkp base (
.GCLK(GCLK),
.SCE (SCE),
.GATE(GATE),
... | 7.212805 |
module sky130_fd_sc_hd__sdlclkp_4 (
GCLK,
SCE,
GATE,
CLK
);
output GCLK;
input SCE;
input GATE;
input CLK;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sdlclkp base (
.GCLK(GCLK),
.SCE (SCE),
.GATE(GATE),
... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp (
Q,
Q_N,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire ... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp (
Q ,
Q_N,
CLK,
D ,
DE ,
SCD,
SCE
);
// Module ports
output Q ;
output Q_N;
input CLK;
input D ;
input DE ;
input SCD;
input SCE;
// Local signals
wire buf_Q ;
wire mux_out;
wire de_d ;
// ... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp (
Q,
Q_N,
CLK,
D,
DE,
SCD,
SCE
);
// Module ports
output Q;
output Q_N;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp_1 (
Q,
Q_N,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sedfxbp base (
.Q(... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp_1 (
Q,
Q_N,
CLK,
D,
DE,
SCD,
SCE
);
output Q;
output Q_N;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sedfxbp base (
.Q ... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp_2 (
Q,
Q_N,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
output Q_N;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sedfxbp base (
.Q(... | 7.212805 |
module sky130_fd_sc_hd__sedfxbp_2 (
Q,
Q_N,
CLK,
D,
DE,
SCD,
SCE
);
output Q;
output Q_N;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sedfxbp base (
.Q ... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp (
Q,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire buf_Q;
reg notifier;... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp (
Q ,
CLK,
D ,
DE ,
SCD,
SCE
);
// Module ports
output Q ;
input CLK;
input D ;
input DE ;
input SCD;
input SCE;
// Local signals
wire buf_Q ;
wire mux_out;
wire de_d ;
// De... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp (
Q,
CLK,
D,
DE,
SCD,
SCE
);
// Module ports
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire buf_Q;
reg notifier;
... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp_1 (
Q,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sedfxtp base (
.Q(Q),
.CLK(CLK),
... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp_1 (
Q,
CLK,
D,
DE,
SCD,
SCE
);
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sedfxtp base (
.Q (Q),
.CLK(CLK),
... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp_2 (
Q,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sedfxtp base (
.Q(Q),
.CLK(CLK),
... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp_2 (
Q,
CLK,
D,
DE,
SCD,
SCE
);
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sedfxtp base (
.Q (Q),
.CLK(CLK),
... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp_4 (
Q,
CLK,
D,
DE,
SCD,
SCE,
VPWR,
VGND,
VPB,
VNB
);
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__sedfxtp base (
.Q(Q),
.CLK(CLK),
... | 7.212805 |
module sky130_fd_sc_hd__sedfxtp_4 (
Q,
CLK,
D,
DE,
SCD,
SCE
);
output Q;
input CLK;
input D;
input DE;
input SCD;
input SCE;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__sedfxtp base (
.Q (Q),
.CLK(CLK),
... | 7.212805 |
module sky130_fd_sc_hd__tap (
VPWR,
VGND,
VPB,
VNB
);
// Module ports
input VPWR;
input VGND;
input VPB;
input VNB;
// No contents.
endmodule
| 7.212805 |
module sky130_fd_sc_hd__tap ();
// No contents.
endmodule
| 7.212805 |
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