code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module corebit_const #(
parameter value = 1
) (
output out
);
assign out = value;
endmodule
| 7.833235 |
module commonlib_muxn__N2__width8 (
input [7:0] in_data[1:0],
input [0:0] in_sel,
output [7:0] out
);
wire [7:0] _join_out;
coreir_mux #(
.width(8)
) _join (
.in0(in_data[0]),
.in1(in_data[1]),
.sel(in_sel[0]),
.out(_join_out)
);
assign out = _join_out;
endmodule
| 7.978522 |
module Mux2x8 (
input [7:0] I0,
input [7:0] I1,
input S,
output [7:0] O
);
wire [7:0] coreir_commonlib_mux2x8_inst0_out;
wire [7:0] coreir_commonlib_mux2x8_inst0_in_data[1:0];
assign coreir_commonlib_mux2x8_inst0_in_data[1] = I1;
assign coreir_commonlib_mux2x8_inst0_in_data[0] = I0;
commonlib_... | 7.018661 |
module Register8 (
input [7:0] I,
output [7:0] O,
input CLK
);
wire DFF_init0_has_ceFalse_has_resetFalse_has_async_resetFalse_inst0_O;
wire DFF_init0_has_ceFalse_has_resetFalse_has_async_resetFalse_inst1_O;
wire DFF_init0_has_ceFalse_has_resetFalse_has_async_resetFalse_inst2_O;
wire DFF_init0_has_ce... | 6.73316 |
module Add8_cout (
input [7:0] I0,
input [7:0] I1,
output [7:0] O,
output COUT
);
wire bit_const_0_None_out;
wire [8:0] coreir_add9_inst0_out;
corebit_const #(.value(1'b0)) bit_const_0_None (.out(bit_const_0_None_out));
wire [8:0] coreir_add9_inst0_in0;
assign coreir_add9_inst0_in0 = {bit_cons... | 7.265928 |
module CounterLoad8_COUT (
input [7:0] DATA,
input LOAD,
output [7:0] O,
output COUT,
input CLK
);
wire [7:0] Add8_cout_inst0_O;
wire Add8_cout_inst0_COUT;
wire [7:0] Mux2x8_inst0_O;
wire [7:0] Register8_inst0_O;
wire [7:0] const_1_8_out;
Add8_cout Add8_cout_inst0 (
.I0(Register8_i... | 8.059733 |
module FullAdder (
input I0,
input I1,
input CIN,
output O,
output COUT
);
wire SB_LUT4_inst0_O;
wire SB_CARRY_inst0_CO;
SB_LUT4 #(
.LUT_INIT(16'h9696)
) SB_LUT4_inst0 (
.I0(I0),
.I1(I1),
.I2(CIN),
.I3(1'b0),
.O (SB_LUT4_inst0_O)
);
SB_CARRY SB_CARR... | 7.610141 |
module Add8_COUT (
input [7:0] I0,
input [7:0] I1,
output [7:0] O,
output COUT
);
wire FullAdder_inst0_O;
wire FullAdder_inst0_COUT;
wire FullAdder_inst1_O;
wire FullAdder_inst1_COUT;
wire FullAdder_inst2_O;
wire FullAdder_inst2_COUT;
wire FullAdder_inst3_O;
wire FullAdder_inst3_COUT;
... | 7.479272 |
module Mux2 (
input [1:0] I,
input S,
output O
);
wire SB_LUT4_inst0_O;
SB_LUT4 #(
.LUT_INIT(16'hCACA)
) SB_LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(S),
.I3(1'b0),
.O (SB_LUT4_inst0_O)
);
assign O = SB_LUT4_inst0_O;
endmodule
| 7.615389 |
module Mux2x8 (
input [7:0] I0,
input [7:0] I1,
input S,
output [7:0] O
);
wire Mux2_inst0_O;
wire Mux2_inst1_O;
wire Mux2_inst2_O;
wire Mux2_inst3_O;
wire Mux2_inst4_O;
wire Mux2_inst5_O;
wire Mux2_inst6_O;
wire Mux2_inst7_O;
Mux2 Mux2_inst0 (
.I({I1[0], I0[0]}),
.S(S),
... | 7.018661 |
module Register8 (
input [7:0] I,
output [7:0] O,
input CLK
);
wire SB_DFF_inst0_Q;
wire SB_DFF_inst1_Q;
wire SB_DFF_inst2_Q;
wire SB_DFF_inst3_Q;
wire SB_DFF_inst4_Q;
wire SB_DFF_inst5_Q;
wire SB_DFF_inst6_Q;
wire SB_DFF_inst7_Q;
SB_DFF SB_DFF_inst0 (
.C(CLK),
.D(I[0]),
... | 6.73316 |
module CounterLoad8_COUT (input [7:0] DATA, input LOAD, output [7:0] O, output COUT, input CLK);
wire [7:0] Add8_COUT_inst0_O;
wire Add8_COUT_inst0_COUT;
wire [7:0] Mux2x8_inst0_O;
wire [7:0] Register8_inst0_O;
Add8_COUT Add8_COUT_inst0 (.I0(Register8_inst0_O), .I1(8'd1'), .O(Add8_COUT_inst0_O), .COUT(Add8_COUT_ins... | 8.059733 |
module Add8_cout (
input [7:0] I0,
input [7:0] I1,
output [7:0] O,
output COUT
);
wire LUT2_inst0_O;
wire MUXCY_inst0_O;
wire XORCY_inst0_O;
wire LUT2_inst1_O;
wire MUXCY_inst1_O;
wire XORCY_inst1_O;
wire LUT2_inst2_O;
wire MUXCY_inst2_O;
wire XORCY_inst2_O;
wire LUT2_inst3_O;
wire... | 7.265928 |
module Mux2 (
input [1:0] I,
input S,
output O
);
wire LUT3_inst0_O;
LUT3 #(
.INIT(8'hCA)
) LUT3_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(S),
.O (LUT3_inst0_O)
);
assign O = LUT3_inst0_O;
endmodule
| 7.615389 |
module Mux2x8 (
input [7:0] I0,
input [7:0] I1,
input S,
output [7:0] O
);
wire Mux2_inst0_O;
wire Mux2_inst1_O;
wire Mux2_inst2_O;
wire Mux2_inst3_O;
wire Mux2_inst4_O;
wire Mux2_inst5_O;
wire Mux2_inst6_O;
wire Mux2_inst7_O;
Mux2 Mux2_inst0 (
.I({I1[0], I0[0]}),
.S(S),
... | 7.018661 |
module Register8 (
input [7:0] I,
output [7:0] O,
input CLK
);
wire FDRSE_inst0_Q;
wire FDRSE_inst1_Q;
wire FDRSE_inst2_Q;
wire FDRSE_inst3_Q;
wire FDRSE_inst4_Q;
wire FDRSE_inst5_Q;
wire FDRSE_inst6_Q;
wire FDRSE_inst7_Q;
FDRSE #(
.INIT(1'h0)
) FDRSE_inst0 (
.C (CLK),
... | 6.73316 |
module CounterLoad8_COUT (input [7:0] DATA, input LOAD, output [7:0] O, output COUT, input CLK);
wire [7:0] Add8_cout_inst0_O;
wire Add8_cout_inst0_COUT;
wire [7:0] Mux2x8_inst0_O;
wire [7:0] Register8_inst0_O;
Add8_cout Add8_cout_inst0 (.I0(Register8_inst0_O), .I1(8'd1'), .O(Add8_cout_inst0_O), .COUT(Add8_cout_ins... | 8.059733 |
module Add8_cout (
input [7:0] I0,
input [7:0] I1,
output [7:0] O,
output COUT
);
wire LUT6_2_inst0_O5;
wire LUT6_2_inst0_O6;
wire MUXCY_inst0_O;
wire XORCY_inst0_O;
wire LUT6_2_inst1_O5;
wire LUT6_2_inst1_O6;
wire MUXCY_inst1_O;
wire XORCY_inst1_O;
wire LUT6_2_inst2_O5;
wire LUT6_2_... | 7.265928 |
module Mux2 (
input [1:0] I,
input S,
output O
);
wire LUT3_inst0_O;
LUT3 #(
.INIT(8'hCA)
) LUT3_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(S),
.O (LUT3_inst0_O)
);
assign O = LUT3_inst0_O;
endmodule
| 7.615389 |
module Mux2x8 (
input [7:0] I0,
input [7:0] I1,
input S,
output [7:0] O
);
wire Mux2_inst0_O;
wire Mux2_inst1_O;
wire Mux2_inst2_O;
wire Mux2_inst3_O;
wire Mux2_inst4_O;
wire Mux2_inst5_O;
wire Mux2_inst6_O;
wire Mux2_inst7_O;
Mux2 Mux2_inst0 (
.I({I1[0], I0[0]}),
.S(S),
... | 7.018661 |
module Register8 (
input [7:0] I,
output [7:0] O,
input CLK
);
wire FDRSE_inst0_Q;
wire FDRSE_inst1_Q;
wire FDRSE_inst2_Q;
wire FDRSE_inst3_Q;
wire FDRSE_inst4_Q;
wire FDRSE_inst5_Q;
wire FDRSE_inst6_Q;
wire FDRSE_inst7_Q;
FDRSE #(
.INIT(1'h0)
) FDRSE_inst0 (
.C (CLK),
... | 6.73316 |
module CounterLoad8_COUT (input [7:0] DATA, input LOAD, output [7:0] O, output COUT, input CLK);
wire [7:0] Add8_cout_inst0_O;
wire Add8_cout_inst0_COUT;
wire [7:0] Mux2x8_inst0_O;
wire [7:0] Register8_inst0_O;
Add8_cout Add8_cout_inst0 (.I0(Register8_inst0_O), .I1(8'd1'), .O(Add8_cout_inst0_O), .COUT(Add8_cout_ins... | 8.059733 |
module lutN #(
parameter N = 1,
parameter init = 1
) (
input [N-1:0] in,
output out
);
assign out = init[in];
endmodule
| 7.756611 |
module LUT2_8 (
input I0,
input I1,
output O
);
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h8),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(O)
);
endmodule
| 7.722694 |
module LUT2_4 (
input I0,
input I1,
output O
);
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h4),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(O)
);
endmodule
| 7.674267 |
module LUT2_2 (
input I0,
input I1,
output O
);
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h2),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(O)
);
endmodule
| 7.802919 |
module LUT2_1 (
input I0,
input I1,
output O
);
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h1),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(O)
);
endmodule
| 7.464635 |
module lutN #(
parameter N = 1,
parameter init = 1
) (
input [N-1:0] in,
output out
);
assign out = init[in];
endmodule
| 7.756611 |
module LUT2_8 (
input I0,
input I1,
output O
);
wire coreir_lut2_inst0_out;
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h8),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(coreir_lut2_inst0_out)
);
assign O = ... | 7.722694 |
module LUT2_4 (
input I0,
input I1,
output O
);
wire coreir_lut2_inst0_out;
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h4),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(coreir_lut2_inst0_out)
);
assign O = ... | 7.674267 |
module LUT2_2 (
input I0,
input I1,
output O
);
wire coreir_lut2_inst0_out;
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h2),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(coreir_lut2_inst0_out)
);
assign O = ... | 7.802919 |
module LUT2_1 (
input I0,
input I1,
output O
);
wire coreir_lut2_inst0_out;
wire [1:0] coreir_lut2_inst0_in;
assign coreir_lut2_inst0_in = {I1, I0};
lutN #(
.init(4'h1),
.N(2)
) coreir_lut2_inst0 (
.in (coreir_lut2_inst0_in),
.out(coreir_lut2_inst0_out)
);
assign O = ... | 7.464635 |
module Decode_0_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h1)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 7.171146 |
module Decode_1_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h2)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 6.999049 |
module Decode_2_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h4)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 7.241425 |
module Decode_3_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h8)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 6.911161 |
module Decode_0_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h1)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 7.171146 |
module Decode_1_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h2)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 6.999049 |
module Decode_2_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h4)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 7.241425 |
module Decode_3_2 (
input [1:0] I,
output O
);
wire LUT2_inst0_O;
LUT2 #(
.INIT(4'h8)
) LUT2_inst0 (
.I0(I[0]),
.I1(I[1]),
.O (LUT2_inst0_O)
);
assign O = LUT2_inst0_O;
endmodule
| 6.911161 |
module lutN #(
parameter N = 1,
parameter init = 1
) (
input [N-1:0] in,
output out
);
assign out = init[in];
endmodule
| 7.756611 |
module LUT4_8192 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h2000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.163747 |
module LUT4_8 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0008),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.230025 |
module LUT4_64 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0040),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.38822 |
module LUT4_512 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0200),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.483861 |
module LUT4_4096 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h1000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.001901 |
module LUT4_4 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0004),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.261161 |
module LUT4_32768 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h8000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.321004 |
module LUT4_32 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0020),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.112997 |
module LUT4_256 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0100),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.445537 |
module LUT4_2048 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0800),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.636525 |
module LUT4_2 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0002),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.331572 |
module LUT4_16384 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h4000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.343121 |
module LUT4_16 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0010),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.23346 |
module LUT4_128 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0080),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.233738 |
module LUT4_1024 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0400),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.371496 |
module LUT4_1 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0001),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out(O)
);
endmodule
| 7.01998 |
module lutN #(
parameter N = 1,
parameter init = 1
) (
input [N-1:0] in,
output out
);
assign out = init[in];
endmodule
| 7.756611 |
module LUT4_8192 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h2000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.... | 7.163747 |
module LUT4_8 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0008),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out... | 7.230025 |
module LUT4_64 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0040),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.ou... | 7.38822 |
module LUT4_512 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0200),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.o... | 7.483861 |
module LUT4_4096 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h1000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.... | 7.001901 |
module LUT4_4 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0004),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out... | 7.261161 |
module LUT4_32768 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h8000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
... | 7.321004 |
module LUT4_32 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0020),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.ou... | 7.112997 |
module LUT4_256 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0100),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.o... | 7.445537 |
module LUT4_2048 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0800),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.... | 7.636525 |
module LUT4_2 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0002),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out... | 7.331572 |
module LUT4_16384 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h4000),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
... | 7.343121 |
module LUT4_16 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0010),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.ou... | 7.23346 |
module LUT4_128 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0080),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.o... | 7.233738 |
module LUT4_1024 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0400),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.... | 7.371496 |
module LUT4_1 (
input I0,
input I1,
input I2,
input I3,
output O
);
wire coreir_lut4_inst0_out;
wire [3:0] coreir_lut4_inst0_in;
assign coreir_lut4_inst0_in = {I3, I2, I1, I0};
lutN #(
.init(16'h0001),
.N(4)
) coreir_lut4_inst0 (
.in (coreir_lut4_inst0_in),
.out... | 7.01998 |
module Decode_0_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0001)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.963096 |
module Decode_1_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0002)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.899946 |
module Decode_2_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0004)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 7.036981 |
module Decode_3_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0008)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.920603 |
module Decode_4_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0010)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.790518 |
module Decode_5_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0020)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.910791 |
module Decode_6_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0040)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.762068 |
module Decode_8_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0100)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.930401 |
module Decode_9_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0200)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.776007 |
module Decode_10_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0400)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.640603 |
module Decode_11_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0800)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.627838 |
module Decode_12_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h1000)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 7.044434 |
module Decode_13_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h2000)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.810178 |
module Decode_14_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h4000)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.759487 |
module Decode_15_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h8000)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.903914 |
module Decode_0_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0001)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.963096 |
module Decode_1_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0002)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.899946 |
module Decode_2_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0004)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 7.036981 |
module Decode_3_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0008)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.920603 |
module Decode_4_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0010)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.790518 |
module Decode_5_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0020)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.910791 |
module Decode_6_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0040)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.762068 |
module Decode_8_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0100)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.930401 |
module Decode_9_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0200)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.776007 |
module Decode_10_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0400)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.640603 |
module Decode_11_4 (
input [3:0] I,
output O
);
wire LUT4_inst0_O;
LUT4 #(
.INIT(16'h0800)
) LUT4_inst0 (
.I0(I[0]),
.I1(I[1]),
.I2(I[2]),
.I3(I[3]),
.O (LUT4_inst0_O)
);
assign O = LUT4_inst0_O;
endmodule
| 6.627838 |
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